1 files changed, 38 insertions, 29 deletions

diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 68e0907de5d0..5bfe7035b73d 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -33,20 +33,23 @@
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
+#include <asm/smp_scu.h>
 #include <asm/hardware/cache-l2x0.h>
 
 #include "common.h"
 
+void __iomem *zynq_scu_base;
+
 static struct of_device_id zynq_of_bus_ids[] __initdata = {
         { .compatible = "simple-bus", },
         {}
 };
 
 /**
- * xilinx_init_machine() - System specific initialization, intended to be
- *                         called from board specific initialization.
+ * zynq_init_machine - System specific initialization, intended to be
+ *                     called from board specific initialization.
  */
-static void __init xilinx_init_machine(void)
+static void __init zynq_init_machine(void)
 {
         /*
          * 64KB way size, 8-way associativity, parity disabled
@@ -56,50 +59,56 @@ static void __init xilinx_init_machine(void)
         of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
 }
 
-#define SCU_PERIPH_PHYS         0xF8F00000
-#define SCU_PERIPH_SIZE         SZ_8K
-#define SCU_PERIPH_VIRT         (VMALLOC_END - SCU_PERIPH_SIZE)
+static void __init zynq_timer_init(void)
+{
+        zynq_slcr_init();
+        clocksource_of_init();
+}
 
-static struct map_desc scu_desc __initdata = {
-        .virtual        = SCU_PERIPH_VIRT,
-        .pfn            = __phys_to_pfn(SCU_PERIPH_PHYS),
-        .length         = SCU_PERIPH_SIZE,
-        .type           = MT_DEVICE,
+static struct map_desc zynq_cortex_a9_scu_map __initdata = {
+        .length = SZ_256,
+        .type   = MT_DEVICE,
 };
 
-static void __init xilinx_zynq_timer_init(void)
+static void __init zynq_scu_map_io(void)
 {
-        struct device_node *np;
-        void __iomem *slcr;
-
-        np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
-        slcr = of_iomap(np, 0);
-        WARN_ON(!slcr);
+        unsigned long base;
 
-        xilinx_zynq_clocks_init(slcr);
-
-        clocksource_of_init();
+        base = scu_a9_get_base();
+        zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
+        /* Expected address is in vmalloc area that's why simple assign here */
+        zynq_cortex_a9_scu_map.virtual = base;
+        iotable_init(&zynq_cortex_a9_scu_map, 1);
+        zynq_scu_base = (void __iomem *)base;
+        BUG_ON(!zynq_scu_base);
 }
 
 /**
- * xilinx_map_io() - Create memory mappings needed for early I/O.
+ * zynq_map_io - Create memory mappings needed for early I/O.
  */
-static void __init xilinx_map_io(void)
+static void __init zynq_map_io(void)
 {
         debug_ll_io_init();
-        iotable_init(&scu_desc, 1);
+        zynq_scu_map_io();
+}
+
+static void zynq_system_reset(char mode, const char *cmd)
+{
+        zynq_slcr_system_reset();
 }
 
-static const char *xilinx_dt_match[] = {
+static const char * const zynq_dt_match[] = {
         "xlnx,zynq-zc702",
         "xlnx,zynq-7000",
         NULL
 };
 
 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
-        .map_io         = xilinx_map_io,
+        .smp            = smp_ops(zynq_smp_ops),
+        .map_io         = zynq_map_io,
         .init_irq       = irqchip_init,
-        .init_machine   = xilinx_init_machine,
-        .init_time      = xilinx_zynq_timer_init,
-        .dt_compat      = xilinx_dt_match,
+        .init_machine   = zynq_init_machine,
+        .init_time      = zynq_timer_init,
+        .dt_compat      = zynq_dt_match,
+        .restart        = zynq_system_reset,
 MACHINE_END