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-rw-r--r--arch/arm/mach-tegra/reset.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h
index 76a93434c6ee..29c3dec0126a 100644
--- a/arch/arm/mach-tegra/reset.h
+++ b/arch/arm/mach-tegra/reset.h
@@ -35,6 +35,7 @@ extern unsigned long __tegra_cpu_reset_handler_data[TEGRA_RESET_DATA_SIZE];
35 35
36void __tegra_cpu_reset_handler_start(void); 36void __tegra_cpu_reset_handler_start(void);
37void __tegra_cpu_reset_handler(void); 37void __tegra_cpu_reset_handler(void);
38void __tegra20_cpu1_resettable_status_offset(void);
38void __tegra_cpu_reset_handler_end(void); 39void __tegra_cpu_reset_handler_end(void);
39void tegra_secondary_startup(void); 40void tegra_secondary_startup(void);
40 41
@@ -47,6 +48,9 @@ void tegra_secondary_startup(void);
47 (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ 48 (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \
48 ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \ 49 ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \
49 (u32)__tegra_cpu_reset_handler_start))) 50 (u32)__tegra_cpu_reset_handler_start)))
51#define tegra20_cpu1_resettable_status \
52 (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \
53 (u32)__tegra20_cpu1_resettable_status_offset))
50#endif 54#endif
51 55
52#define tegra_cpu_reset_handler_offset \ 56#define tegra_cpu_reset_handler_offset \