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-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c26
1 files changed, 20 insertions, 6 deletions
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a07954fbcd22..c917882424a7 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -58,12 +58,6 @@ static struct map_desc sh7372_io_desc[] __initdata = {
58void __init sh7372_map_io(void) 58void __init sh7372_map_io(void)
59{ 59{
60 iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc)); 60 iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
61
62 /*
63 * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
64 * enough to allocate the frame buffer memory.
65 */
66 init_consistent_dma_size(12 << 20);
67} 61}
68 62
69/* SCIFA0 */ 63/* SCIFA0 */
@@ -408,6 +402,26 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
408 .chcr = CHCR_RX(XMIT_SZ_8BIT), 402 .chcr = CHCR_RX(XMIT_SZ_8BIT),
409 .mid_rid = 0x3e, 403 .mid_rid = 0x3e,
410 }, { 404 }, {
405 .slave_id = SHDMA_SLAVE_FLCTL0_TX,
406 .addr = 0xe6a30050,
407 .chcr = CHCR_TX(XMIT_SZ_32BIT),
408 .mid_rid = 0x83,
409 }, {
410 .slave_id = SHDMA_SLAVE_FLCTL0_RX,
411 .addr = 0xe6a30050,
412 .chcr = CHCR_RX(XMIT_SZ_32BIT),
413 .mid_rid = 0x83,
414 }, {
415 .slave_id = SHDMA_SLAVE_FLCTL1_TX,
416 .addr = 0xe6a30060,
417 .chcr = CHCR_TX(XMIT_SZ_32BIT),
418 .mid_rid = 0x87,
419 }, {
420 .slave_id = SHDMA_SLAVE_FLCTL1_RX,
421 .addr = 0xe6a30060,
422 .chcr = CHCR_RX(XMIT_SZ_32BIT),
423 .mid_rid = 0x87,
424 }, {
411 .slave_id = SHDMA_SLAVE_SDHI0_TX, 425 .slave_id = SHDMA_SLAVE_SDHI0_TX,
412 .addr = 0xe6850030, 426 .addr = 0xe6850030,
413 .chcr = CHCR_TX(XMIT_SZ_16BIT), 427 .chcr = CHCR_TX(XMIT_SZ_16BIT),