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Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach/irqs.h')
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h30
1 files changed, 0 insertions, 30 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index c026f67a80de..443f85b3c203 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -27,36 +27,6 @@
27#define IRQ_VIC0_BASE S3C_IRQ(0) 27#define IRQ_VIC0_BASE S3C_IRQ(0)
28#define IRQ_VIC1_BASE S3C_IRQ(32) 28#define IRQ_VIC1_BASE S3C_IRQ(32)
29 29
30/* UART interrupts, each UART has 4 intterupts per channel so
31 * use the space between the ISA and S3C main interrupts. Note, these
32 * are not in the same order as the S3C24XX series! */
33
34#define IRQ_S3CUART_BASE0 (16)
35#define IRQ_S3CUART_BASE1 (20)
36#define IRQ_S3CUART_BASE2 (24)
37#define IRQ_S3CUART_BASE3 (28)
38
39#define UART_IRQ_RXD (0)
40#define UART_IRQ_ERR (1)
41#define UART_IRQ_TXD (2)
42#define UART_IRQ_MODEM (3)
43
44#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD)
45#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD)
46#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR)
47
48#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD)
49#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD)
50#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR)
51
52#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD)
53#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD)
54#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR)
55
56#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD)
57#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD)
58#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR)
59
60/* VIC based IRQs */ 30/* VIC based IRQs */
61 31
62#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x)) 32#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x))