diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap-wakeupgen.c')
-rw-r--r-- | arch/arm/mach-omap2/omap-wakeupgen.c | 36 |
1 files changed, 35 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c index fc5fb776a710..17558be4bf0a 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.c +++ b/arch/arm/mach-omap2/omap-wakeupgen.c | |||
@@ -50,6 +50,9 @@ | |||
50 | #define OMAP4_NR_BANKS 4 | 50 | #define OMAP4_NR_BANKS 4 |
51 | #define OMAP4_NR_IRQS 128 | 51 | #define OMAP4_NR_IRQS 128 |
52 | 52 | ||
53 | #define SYS_NIRQ1_EXT_SYS_IRQ_1 7 | ||
54 | #define SYS_NIRQ2_EXT_SYS_IRQ_2 119 | ||
55 | |||
53 | static void __iomem *wakeupgen_base; | 56 | static void __iomem *wakeupgen_base; |
54 | static void __iomem *sar_base; | 57 | static void __iomem *sar_base; |
55 | static DEFINE_RAW_SPINLOCK(wakeupgen_lock); | 58 | static DEFINE_RAW_SPINLOCK(wakeupgen_lock); |
@@ -153,6 +156,37 @@ static void wakeupgen_unmask(struct irq_data *d) | |||
153 | irq_chip_unmask_parent(d); | 156 | irq_chip_unmask_parent(d); |
154 | } | 157 | } |
155 | 158 | ||
159 | /* | ||
160 | * The sys_nirq pins bypass peripheral modules and are wired directly | ||
161 | * to MPUSS wakeupgen. They get automatically inverted for GIC. | ||
162 | */ | ||
163 | static int wakeupgen_irq_set_type(struct irq_data *d, unsigned int type) | ||
164 | { | ||
165 | bool inverted = false; | ||
166 | |||
167 | switch (type) { | ||
168 | case IRQ_TYPE_LEVEL_LOW: | ||
169 | type &= ~IRQ_TYPE_LEVEL_MASK; | ||
170 | type |= IRQ_TYPE_LEVEL_HIGH; | ||
171 | inverted = true; | ||
172 | break; | ||
173 | case IRQ_TYPE_EDGE_FALLING: | ||
174 | type &= ~IRQ_TYPE_EDGE_BOTH; | ||
175 | type |= IRQ_TYPE_EDGE_RISING; | ||
176 | inverted = true; | ||
177 | break; | ||
178 | default: | ||
179 | break; | ||
180 | } | ||
181 | |||
182 | if (inverted && d->hwirq != SYS_NIRQ1_EXT_SYS_IRQ_1 && | ||
183 | d->hwirq != SYS_NIRQ2_EXT_SYS_IRQ_2) | ||
184 | pr_warn("wakeupgen: irq%li polarity inverted in dts\n", | ||
185 | d->hwirq); | ||
186 | |||
187 | return irq_chip_set_type_parent(d, type); | ||
188 | } | ||
189 | |||
156 | #ifdef CONFIG_HOTPLUG_CPU | 190 | #ifdef CONFIG_HOTPLUG_CPU |
157 | static DEFINE_PER_CPU(u32 [MAX_NR_REG_BANKS], irqmasks); | 191 | static DEFINE_PER_CPU(u32 [MAX_NR_REG_BANKS], irqmasks); |
158 | 192 | ||
@@ -446,7 +480,7 @@ static struct irq_chip wakeupgen_chip = { | |||
446 | .irq_mask = wakeupgen_mask, | 480 | .irq_mask = wakeupgen_mask, |
447 | .irq_unmask = wakeupgen_unmask, | 481 | .irq_unmask = wakeupgen_unmask, |
448 | .irq_retrigger = irq_chip_retrigger_hierarchy, | 482 | .irq_retrigger = irq_chip_retrigger_hierarchy, |
449 | .irq_set_type = irq_chip_set_type_parent, | 483 | .irq_set_type = wakeupgen_irq_set_type, |
450 | .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, | 484 | .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, |
451 | #ifdef CONFIG_SMP | 485 | #ifdef CONFIG_SMP |
452 | .irq_set_affinity = irq_chip_set_affinity_parent, | 486 | .irq_set_affinity = irq_chip_set_affinity_parent, |