diff options
Diffstat (limited to 'arch/arm/mach-omap1/include/mach')
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/debug-macro.S | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/entry-macro.S | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/gpio.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/hardware.h | 9 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/memory.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/omap1510.h | 113 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/serial.h | 53 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/soc.h | 229 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/tc.h | 89 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/include/mach/uncompress.h | 121 |
10 files changed, 611 insertions, 12 deletions
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index 2b36a281dc84..5c1a26c9f490 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S | |||
| @@ -13,7 +13,7 @@ | |||
| 13 | 13 | ||
| 14 | #include <linux/serial_reg.h> | 14 | #include <linux/serial_reg.h> |
| 15 | 15 | ||
| 16 | #include <plat/serial.h> | 16 | #include "serial.h" |
| 17 | 17 | ||
| 18 | .pushsection .data | 18 | .pushsection .data |
| 19 | omap_uart_phys: .word 0x0 | 19 | omap_uart_phys: .word 0x0 |
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S index 88f08cab1717..78a8c6c24764 100644 --- a/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S | |||
| @@ -13,8 +13,6 @@ | |||
| 13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
| 14 | #include <mach/irqs.h> | 14 | #include <mach/irqs.h> |
| 15 | 15 | ||
| 16 | #include "../../iomap.h" | ||
| 17 | |||
| 18 | .macro get_irqnr_preamble, base, tmp | 16 | .macro get_irqnr_preamble, base, tmp |
| 19 | .endm | 17 | .endm |
| 20 | 18 | ||
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h deleted file mode 100644 index ebf86c0f4f46..000000000000 --- a/arch/arm/mach-omap1/include/mach/gpio.h +++ /dev/null | |||
| @@ -1,3 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/gpio.h | ||
| 3 | */ | ||
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index 84248d250adb..5875a5098d35 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h | |||
| @@ -39,7 +39,7 @@ | |||
| 39 | #include <asm/sizes.h> | 39 | #include <asm/sizes.h> |
| 40 | #ifndef __ASSEMBLER__ | 40 | #ifndef __ASSEMBLER__ |
| 41 | #include <asm/types.h> | 41 | #include <asm/types.h> |
| 42 | #include <plat/cpu.h> | 42 | #include <mach/soc.h> |
| 43 | 43 | ||
| 44 | /* | 44 | /* |
| 45 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these | 45 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these |
| @@ -51,7 +51,7 @@ extern void omap_writeb(u8 v, u32 pa); | |||
| 51 | extern void omap_writew(u16 v, u32 pa); | 51 | extern void omap_writew(u16 v, u32 pa); |
| 52 | extern void omap_writel(u32 v, u32 pa); | 52 | extern void omap_writel(u32 v, u32 pa); |
| 53 | 53 | ||
| 54 | #include <plat/tc.h> | 54 | #include <mach/tc.h> |
| 55 | 55 | ||
| 56 | /* Almost all documentation for chip and board memory maps assumes | 56 | /* Almost all documentation for chip and board memory maps assumes |
| 57 | * BM is clear. Most devel boards have a switch to control booting | 57 | * BM is clear. Most devel boards have a switch to control booting |
| @@ -72,7 +72,10 @@ static inline u32 omap_cs3_phys(void) | |||
| 72 | 72 | ||
| 73 | #endif /* ifndef __ASSEMBLER__ */ | 73 | #endif /* ifndef __ASSEMBLER__ */ |
| 74 | 74 | ||
| 75 | #include <plat/serial.h> | 75 | #define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ |
| 76 | #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) | ||
| 77 | |||
| 78 | #include <mach/serial.h> | ||
| 76 | 79 | ||
| 77 | /* | 80 | /* |
| 78 | * --------------------------------------------------------------------------- | 81 | * --------------------------------------------------------------------------- |
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index 901082def9bd..3c2530523111 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | * because of the strncmp(). | 19 | * because of the strncmp(). |
| 20 | */ | 20 | */ |
| 21 | #if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) | 21 | #if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) |
| 22 | #include <plat/cpu.h> | 22 | #include <mach/soc.h> |
| 23 | 23 | ||
| 24 | /* | 24 | /* |
| 25 | * OMAP-1510 Local Bus address offset | 25 | * OMAP-1510 Local Bus address offset |
diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h index 8fe05d6137c0..3d235244bf5c 100644 --- a/arch/arm/mach-omap1/include/mach/omap1510.h +++ b/arch/arm/mach-omap1/include/mach/omap1510.h | |||
| @@ -45,5 +45,118 @@ | |||
| 45 | 45 | ||
| 46 | #define OMAP1510_DSP_MMU_BASE (0xfffed200) | 46 | #define OMAP1510_DSP_MMU_BASE (0xfffed200) |
| 47 | 47 | ||
| 48 | /* | ||
| 49 | * --------------------------------------------------------------------------- | ||
| 50 | * OMAP-1510 FPGA | ||
| 51 | * --------------------------------------------------------------------------- | ||
| 52 | */ | ||
| 53 | #define OMAP1510_FPGA_BASE 0xE8000000 /* VA */ | ||
| 54 | #define OMAP1510_FPGA_SIZE SZ_4K | ||
| 55 | #define OMAP1510_FPGA_START 0x08000000 /* PA */ | ||
| 56 | |||
| 57 | /* Revision */ | ||
| 58 | #define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0) | ||
| 59 | #define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1) | ||
| 60 | #define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2) | ||
| 61 | #define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3) | ||
| 62 | #define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4) | ||
| 63 | #define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5) | ||
| 64 | |||
| 65 | /* Interrupt status */ | ||
| 66 | #define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6) | ||
| 67 | #define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7) | ||
| 68 | |||
| 69 | /* Interrupt mask */ | ||
| 70 | #define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8) | ||
| 71 | #define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9) | ||
| 72 | |||
| 73 | /* Reset registers */ | ||
| 74 | #define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa) | ||
| 75 | #define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb) | ||
| 76 | |||
| 77 | #define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc) | ||
| 78 | #define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe) | ||
| 79 | #define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf) | ||
| 80 | #define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14) | ||
| 81 | #define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15) | ||
| 82 | #define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16) | ||
| 83 | #define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18) | ||
| 84 | #define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c) | ||
| 85 | #define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100) | ||
| 86 | #define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101) | ||
| 87 | #define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102) | ||
| 88 | |||
| 89 | #define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204) | ||
| 90 | |||
| 91 | #define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205) | ||
| 92 | #define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206) | ||
| 93 | #define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207) | ||
| 94 | #define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208) | ||
| 95 | #define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209) | ||
| 96 | #define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a) | ||
| 97 | #define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b) | ||
| 98 | #define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d) | ||
| 99 | #define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e) | ||
| 100 | #define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210) | ||
| 101 | |||
| 102 | #define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300) | ||
| 103 | |||
| 104 | /* | ||
| 105 | * Power up Giga UART driver, turn on HID clock. | ||
| 106 | * Turn off BT power, since we're not using it and it | ||
| 107 | * draws power. | ||
| 108 | */ | ||
| 109 | #define OMAP1510_FPGA_RESET_VALUE 0x42 | ||
| 110 | |||
| 111 | #define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7) | ||
| 112 | #define OMAP1510_FPGA_PCR_COM2_EN (1 << 6) | ||
| 113 | #define OMAP1510_FPGA_PCR_COM1_EN (1 << 5) | ||
| 114 | #define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4) | ||
| 115 | #define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3) | ||
| 116 | #define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2) | ||
| 117 | #define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1) | ||
| 118 | #define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0) | ||
| 119 | |||
| 120 | /* | ||
| 121 | * Innovator/OMAP1510 FPGA HID register bit definitions | ||
| 122 | */ | ||
| 123 | #define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */ | ||
| 124 | #define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */ | ||
| 125 | #define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */ | ||
| 126 | #define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */ | ||
| 127 | #define OMAP1510_FPGA_HID_MISO (1<<4) /* input */ | ||
| 128 | #define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */ | ||
| 129 | #define OMAP1510_FPGA_HID_rsrvd (1<<6) | ||
| 130 | #define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */ | ||
| 131 | |||
| 132 | /* The FPGA IRQ is cascaded through GPIO_13 */ | ||
| 133 | #define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13) | ||
| 134 | |||
| 135 | /* IRQ Numbers for interrupts muxed through the FPGA */ | ||
| 136 | #define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0) | ||
| 137 | #define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1) | ||
| 138 | #define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2) | ||
| 139 | #define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3) | ||
| 140 | #define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4) | ||
| 141 | #define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5) | ||
| 142 | #define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6) | ||
| 143 | #define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7) | ||
| 144 | #define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8) | ||
| 145 | #define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9) | ||
| 146 | #define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10) | ||
| 147 | #define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11) | ||
| 148 | #define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12) | ||
| 149 | #define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13) | ||
| 150 | #define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14) | ||
| 151 | #define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15) | ||
| 152 | #define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16) | ||
| 153 | #define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17) | ||
| 154 | #define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18) | ||
| 155 | #define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19) | ||
| 156 | #define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20) | ||
| 157 | #define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21) | ||
| 158 | #define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22) | ||
| 159 | #define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) | ||
| 160 | |||
| 48 | #endif /* __ASM_ARCH_OMAP15XX_H */ | 161 | #endif /* __ASM_ARCH_OMAP15XX_H */ |
| 49 | 162 | ||
diff --git a/arch/arm/mach-omap1/include/mach/serial.h b/arch/arm/mach-omap1/include/mach/serial.h new file mode 100644 index 000000000000..2ce6a2db470b --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/serial.h | |||
| @@ -0,0 +1,53 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Texas Instruments | ||
| 3 | * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_SERIAL_H | ||
| 12 | #define __ASM_ARCH_SERIAL_H | ||
| 13 | |||
| 14 | #include <linux/init.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * Memory entry used for the DEBUG_LL UART configuration, relative to | ||
| 18 | * start of RAM. See also uncompress.h and debug-macro.S. | ||
| 19 | * | ||
| 20 | * Note that using a memory location for storing the UART configuration | ||
| 21 | * has at least two limitations: | ||
| 22 | * | ||
| 23 | * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the | ||
| 24 | * uncompress code could then partially overwrite itself | ||
| 25 | * 2. We assume printascii is called at least once before paging_init, | ||
| 26 | * and addruart has a chance to read OMAP_UART_INFO | ||
| 27 | */ | ||
| 28 | #define OMAP_UART_INFO_OFS 0x3ffc | ||
| 29 | |||
| 30 | /* OMAP1 serial ports */ | ||
| 31 | #define OMAP1_UART1_BASE 0xfffb0000 | ||
| 32 | #define OMAP1_UART2_BASE 0xfffb0800 | ||
| 33 | #define OMAP1_UART3_BASE 0xfffb9800 | ||
| 34 | |||
| 35 | #define OMAP_PORT_SHIFT 2 | ||
| 36 | #define OMAP7XX_PORT_SHIFT 0 | ||
| 37 | |||
| 38 | #define OMAP1510_BASE_BAUD (12000000/16) | ||
| 39 | #define OMAP16XX_BASE_BAUD (48000000/16) | ||
| 40 | |||
| 41 | /* | ||
| 42 | * DEBUG_LL port encoding stored into the UART1 scratchpad register by | ||
| 43 | * decomp_setup in uncompress.h | ||
| 44 | */ | ||
| 45 | #define OMAP1UART1 11 | ||
| 46 | #define OMAP1UART2 12 | ||
| 47 | #define OMAP1UART3 13 | ||
| 48 | |||
| 49 | #ifndef __ASSEMBLER__ | ||
| 50 | extern void omap_serial_init(void); | ||
| 51 | #endif | ||
| 52 | |||
| 53 | #endif | ||
diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h new file mode 100644 index 000000000000..6cf9c1cc2bef --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/soc.h | |||
| @@ -0,0 +1,229 @@ | |||
| 1 | /* | ||
| 2 | * OMAP cpu type detection | ||
| 3 | * | ||
| 4 | * Copyright (C) 2004, 2008 Nokia Corporation | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009-11 Texas Instruments. | ||
| 7 | * | ||
| 8 | * Written by Tony Lindgren <tony.lindgren@nokia.com> | ||
| 9 | * | ||
| 10 | * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License as published by | ||
| 14 | * the Free Software Foundation; either version 2 of the License, or | ||
| 15 | * (at your option) any later version. | ||
| 16 | * | ||
| 17 | * This program is distributed in the hope that it will be useful, | ||
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 20 | * GNU General Public License for more details. | ||
| 21 | * | ||
| 22 | * You should have received a copy of the GNU General Public License | ||
| 23 | * along with this program; if not, write to the Free Software | ||
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 25 | * | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef __ASM_ARCH_OMAP_CPU_H | ||
| 29 | #define __ASM_ARCH_OMAP_CPU_H | ||
| 30 | |||
| 31 | #ifndef __ASSEMBLY__ | ||
| 32 | |||
| 33 | #include <linux/bitops.h> | ||
| 34 | |||
| 35 | /* | ||
| 36 | * Test if multicore OMAP support is needed | ||
| 37 | */ | ||
| 38 | #undef MULTI_OMAP1 | ||
| 39 | #undef OMAP_NAME | ||
| 40 | |||
| 41 | #ifdef CONFIG_ARCH_OMAP730 | ||
| 42 | # ifdef OMAP_NAME | ||
| 43 | # undef MULTI_OMAP1 | ||
| 44 | # define MULTI_OMAP1 | ||
| 45 | # else | ||
| 46 | # define OMAP_NAME omap730 | ||
| 47 | # endif | ||
| 48 | #endif | ||
| 49 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 50 | # ifdef OMAP_NAME | ||
| 51 | # undef MULTI_OMAP1 | ||
| 52 | # define MULTI_OMAP1 | ||
| 53 | # else | ||
| 54 | # define OMAP_NAME omap850 | ||
| 55 | # endif | ||
| 56 | #endif | ||
| 57 | #ifdef CONFIG_ARCH_OMAP15XX | ||
| 58 | # ifdef OMAP_NAME | ||
| 59 | # undef MULTI_OMAP1 | ||
| 60 | # define MULTI_OMAP1 | ||
| 61 | # else | ||
| 62 | # define OMAP_NAME omap1510 | ||
| 63 | # endif | ||
| 64 | #endif | ||
| 65 | #ifdef CONFIG_ARCH_OMAP16XX | ||
| 66 | # ifdef OMAP_NAME | ||
| 67 | # undef MULTI_OMAP1 | ||
| 68 | # define MULTI_OMAP1 | ||
| 69 | # else | ||
| 70 | # define OMAP_NAME omap16xx | ||
| 71 | # endif | ||
| 72 | #endif | ||
| 73 | |||
| 74 | /* | ||
| 75 | * omap_rev bits: | ||
| 76 | * CPU id bits (0730, 1510, 1710, 2422...) [31:16] | ||
| 77 | * CPU revision (See _REV_ defined in cpu.h) [15:08] | ||
| 78 | * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] | ||
| 79 | */ | ||
| 80 | unsigned int omap_rev(void); | ||
| 81 | |||
| 82 | /* | ||
| 83 | * Get the CPU revision for OMAP devices | ||
| 84 | */ | ||
| 85 | #define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff) | ||
| 86 | |||
| 87 | /* | ||
| 88 | * Macros to group OMAP into cpu classes. | ||
| 89 | * These can be used in most places. | ||
| 90 | * cpu_is_omap7xx(): True for OMAP730, OMAP850 | ||
| 91 | * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 | ||
| 92 | * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 | ||
| 93 | */ | ||
| 94 | #define GET_OMAP_CLASS (omap_rev() & 0xff) | ||
| 95 | |||
| 96 | #define IS_OMAP_CLASS(class, id) \ | ||
| 97 | static inline int is_omap ##class (void) \ | ||
| 98 | { \ | ||
| 99 | return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ | ||
| 100 | } | ||
| 101 | |||
| 102 | #define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) | ||
| 103 | |||
| 104 | #define IS_OMAP_SUBCLASS(subclass, id) \ | ||
| 105 | static inline int is_omap ##subclass (void) \ | ||
| 106 | { \ | ||
| 107 | return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ | ||
| 108 | } | ||
| 109 | |||
| 110 | IS_OMAP_CLASS(7xx, 0x07) | ||
| 111 | IS_OMAP_CLASS(15xx, 0x15) | ||
| 112 | IS_OMAP_CLASS(16xx, 0x16) | ||
| 113 | |||
| 114 | #define cpu_is_omap7xx() 0 | ||
| 115 | #define cpu_is_omap15xx() 0 | ||
| 116 | #define cpu_is_omap16xx() 0 | ||
| 117 | |||
| 118 | #if defined(MULTI_OMAP1) | ||
| 119 | # if defined(CONFIG_ARCH_OMAP730) | ||
| 120 | # undef cpu_is_omap7xx | ||
| 121 | # define cpu_is_omap7xx() is_omap7xx() | ||
| 122 | # endif | ||
| 123 | # if defined(CONFIG_ARCH_OMAP850) | ||
| 124 | # undef cpu_is_omap7xx | ||
| 125 | # define cpu_is_omap7xx() is_omap7xx() | ||
| 126 | # endif | ||
| 127 | # if defined(CONFIG_ARCH_OMAP15XX) | ||
| 128 | # undef cpu_is_omap15xx | ||
| 129 | # define cpu_is_omap15xx() is_omap15xx() | ||
| 130 | # endif | ||
| 131 | # if defined(CONFIG_ARCH_OMAP16XX) | ||
| 132 | # undef cpu_is_omap16xx | ||
| 133 | # define cpu_is_omap16xx() is_omap16xx() | ||
| 134 | # endif | ||
| 135 | #else | ||
| 136 | # if defined(CONFIG_ARCH_OMAP730) | ||
| 137 | # undef cpu_is_omap7xx | ||
| 138 | # define cpu_is_omap7xx() 1 | ||
| 139 | # endif | ||
| 140 | # if defined(CONFIG_ARCH_OMAP850) | ||
| 141 | # undef cpu_is_omap7xx | ||
| 142 | # define cpu_is_omap7xx() 1 | ||
| 143 | # endif | ||
| 144 | # if defined(CONFIG_ARCH_OMAP15XX) | ||
| 145 | # undef cpu_is_omap15xx | ||
| 146 | # define cpu_is_omap15xx() 1 | ||
| 147 | # endif | ||
| 148 | # if defined(CONFIG_ARCH_OMAP16XX) | ||
| 149 | # undef cpu_is_omap16xx | ||
| 150 | # define cpu_is_omap16xx() 1 | ||
| 151 | # endif | ||
| 152 | #endif | ||
| 153 | |||
| 154 | /* | ||
| 155 | * Macros to detect individual cpu types. | ||
| 156 | * These are only rarely needed. | ||
| 157 | * cpu_is_omap310(): True for OMAP310 | ||
| 158 | * cpu_is_omap1510(): True for OMAP1510 | ||
| 159 | * cpu_is_omap1610(): True for OMAP1610 | ||
| 160 | * cpu_is_omap1611(): True for OMAP1611 | ||
| 161 | * cpu_is_omap5912(): True for OMAP5912 | ||
| 162 | * cpu_is_omap1621(): True for OMAP1621 | ||
| 163 | * cpu_is_omap1710(): True for OMAP1710 | ||
| 164 | */ | ||
| 165 | #define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) | ||
| 166 | |||
| 167 | #define IS_OMAP_TYPE(type, id) \ | ||
| 168 | static inline int is_omap ##type (void) \ | ||
| 169 | { \ | ||
| 170 | return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ | ||
| 171 | } | ||
| 172 | |||
| 173 | IS_OMAP_TYPE(310, 0x0310) | ||
| 174 | IS_OMAP_TYPE(1510, 0x1510) | ||
| 175 | IS_OMAP_TYPE(1610, 0x1610) | ||
| 176 | IS_OMAP_TYPE(1611, 0x1611) | ||
| 177 | IS_OMAP_TYPE(5912, 0x1611) | ||
| 178 | IS_OMAP_TYPE(1621, 0x1621) | ||
| 179 | IS_OMAP_TYPE(1710, 0x1710) | ||
| 180 | |||
| 181 | #define cpu_is_omap310() 0 | ||
| 182 | #define cpu_is_omap1510() 0 | ||
| 183 | #define cpu_is_omap1610() 0 | ||
| 184 | #define cpu_is_omap5912() 0 | ||
| 185 | #define cpu_is_omap1611() 0 | ||
| 186 | #define cpu_is_omap1621() 0 | ||
| 187 | #define cpu_is_omap1710() 0 | ||
| 188 | |||
| 189 | /* These are needed to compile common code */ | ||
| 190 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 191 | #define cpu_is_omap242x() 0 | ||
| 192 | #define cpu_is_omap2430() 0 | ||
| 193 | #define cpu_is_omap243x() 0 | ||
| 194 | #define cpu_is_omap24xx() 0 | ||
| 195 | #define cpu_is_omap34xx() 0 | ||
| 196 | #define cpu_is_omap44xx() 0 | ||
| 197 | #define soc_is_omap54xx() 0 | ||
| 198 | #define soc_is_am33xx() 0 | ||
| 199 | #define cpu_class_is_omap1() 1 | ||
| 200 | #define cpu_class_is_omap2() 0 | ||
| 201 | #endif | ||
| 202 | |||
| 203 | /* | ||
| 204 | * Whether we have MULTI_OMAP1 or not, we still need to distinguish | ||
| 205 | * between 310 vs. 1510 and 1611B/5912 vs. 1710. | ||
| 206 | */ | ||
| 207 | |||
| 208 | #if defined(CONFIG_ARCH_OMAP15XX) | ||
| 209 | # undef cpu_is_omap310 | ||
| 210 | # undef cpu_is_omap1510 | ||
| 211 | # define cpu_is_omap310() is_omap310() | ||
| 212 | # define cpu_is_omap1510() is_omap1510() | ||
| 213 | #endif | ||
| 214 | |||
| 215 | #if defined(CONFIG_ARCH_OMAP16XX) | ||
| 216 | # undef cpu_is_omap1610 | ||
| 217 | # undef cpu_is_omap1611 | ||
| 218 | # undef cpu_is_omap5912 | ||
| 219 | # undef cpu_is_omap1621 | ||
| 220 | # undef cpu_is_omap1710 | ||
| 221 | # define cpu_is_omap1610() is_omap1610() | ||
| 222 | # define cpu_is_omap1611() is_omap1611() | ||
| 223 | # define cpu_is_omap5912() is_omap5912() | ||
| 224 | # define cpu_is_omap1621() is_omap1621() | ||
| 225 | # define cpu_is_omap1710() is_omap1710() | ||
| 226 | #endif | ||
| 227 | |||
| 228 | #endif /* __ASSEMBLY__ */ | ||
| 229 | #endif | ||
diff --git a/arch/arm/mach-omap1/include/mach/tc.h b/arch/arm/mach-omap1/include/mach/tc.h new file mode 100644 index 000000000000..1b4b2da86203 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/tc.h | |||
| @@ -0,0 +1,89 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/plat-omap/include/mach/tc.h | ||
| 3 | * | ||
| 4 | * OMAP Traffic Controller | ||
| 5 | * | ||
| 6 | * Copyright (C) 2004 Nokia Corporation | ||
| 7 | * Author: Imre Deak <imre.deak@nokia.com> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify it | ||
| 10 | * under the terms of the GNU General Public License as published by the | ||
| 11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 12 | * option) any later version. | ||
| 13 | * | ||
| 14 | * This program is distributed in the hope that it will be useful, but | ||
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 17 | * General Public License for more details. | ||
| 18 | * | ||
| 19 | * You should have received a copy of the GNU General Public License along | ||
| 20 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 21 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
| 22 | */ | ||
| 23 | |||
| 24 | #ifndef __ASM_ARCH_TC_H | ||
| 25 | #define __ASM_ARCH_TC_H | ||
| 26 | |||
| 27 | #define TCMIF_BASE 0xfffecc00 | ||
| 28 | #define OMAP_TC_OCPT1_PRIOR (TCMIF_BASE + 0x00) | ||
| 29 | #define OMAP_TC_EMIFS_PRIOR (TCMIF_BASE + 0x04) | ||
| 30 | #define OMAP_TC_EMIFF_PRIOR (TCMIF_BASE + 0x08) | ||
| 31 | #define EMIFS_CONFIG (TCMIF_BASE + 0x0c) | ||
| 32 | #define EMIFS_CS0_CONFIG (TCMIF_BASE + 0x10) | ||
| 33 | #define EMIFS_CS1_CONFIG (TCMIF_BASE + 0x14) | ||
| 34 | #define EMIFS_CS2_CONFIG (TCMIF_BASE + 0x18) | ||
| 35 | #define EMIFS_CS3_CONFIG (TCMIF_BASE + 0x1c) | ||
| 36 | #define EMIFF_SDRAM_CONFIG (TCMIF_BASE + 0x20) | ||
| 37 | #define EMIFF_MRS (TCMIF_BASE + 0x24) | ||
| 38 | #define TC_TIMEOUT1 (TCMIF_BASE + 0x28) | ||
| 39 | #define TC_TIMEOUT2 (TCMIF_BASE + 0x2c) | ||
| 40 | #define TC_TIMEOUT3 (TCMIF_BASE + 0x30) | ||
| 41 | #define TC_ENDIANISM (TCMIF_BASE + 0x34) | ||
| 42 | #define EMIFF_SDRAM_CONFIG_2 (TCMIF_BASE + 0x3c) | ||
| 43 | #define EMIF_CFG_DYNAMIC_WS (TCMIF_BASE + 0x40) | ||
| 44 | #define EMIFS_ACS0 (TCMIF_BASE + 0x50) | ||
| 45 | #define EMIFS_ACS1 (TCMIF_BASE + 0x54) | ||
| 46 | #define EMIFS_ACS2 (TCMIF_BASE + 0x58) | ||
| 47 | #define EMIFS_ACS3 (TCMIF_BASE + 0x5c) | ||
| 48 | #define OMAP_TC_OCPT2_PRIOR (TCMIF_BASE + 0xd0) | ||
| 49 | |||
| 50 | /* external EMIFS chipselect regions */ | ||
| 51 | #define OMAP_CS0_PHYS 0x00000000 | ||
| 52 | #define OMAP_CS0_SIZE SZ_64M | ||
| 53 | |||
| 54 | #define OMAP_CS1_PHYS 0x04000000 | ||
| 55 | #define OMAP_CS1_SIZE SZ_64M | ||
| 56 | |||
| 57 | #define OMAP_CS1A_PHYS OMAP_CS1_PHYS | ||
| 58 | #define OMAP_CS1A_SIZE SZ_32M | ||
| 59 | |||
| 60 | #define OMAP_CS1B_PHYS (OMAP_CS1A_PHYS + OMAP_CS1A_SIZE) | ||
| 61 | #define OMAP_CS1B_SIZE SZ_32M | ||
| 62 | |||
| 63 | #define OMAP_CS2_PHYS 0x08000000 | ||
| 64 | #define OMAP_CS2_SIZE SZ_64M | ||
| 65 | |||
| 66 | #define OMAP_CS2A_PHYS OMAP_CS2_PHYS | ||
| 67 | #define OMAP_CS2A_SIZE SZ_32M | ||
| 68 | |||
| 69 | #define OMAP_CS2B_PHYS (OMAP_CS2A_PHYS + OMAP_CS2A_SIZE) | ||
| 70 | #define OMAP_CS2B_SIZE SZ_32M | ||
| 71 | |||
| 72 | #define OMAP_CS3_PHYS 0x0c000000 | ||
| 73 | #define OMAP_CS3_SIZE SZ_64M | ||
| 74 | |||
| 75 | #ifndef __ASSEMBLER__ | ||
| 76 | |||
| 77 | /* EMIF Slow Interface Configuration Register */ | ||
| 78 | #define OMAP_EMIFS_CONFIG_FR (1 << 4) | ||
| 79 | #define OMAP_EMIFS_CONFIG_PDE (1 << 3) | ||
| 80 | #define OMAP_EMIFS_CONFIG_PWD_EN (1 << 2) | ||
| 81 | #define OMAP_EMIFS_CONFIG_BM (1 << 1) | ||
| 82 | #define OMAP_EMIFS_CONFIG_WP (1 << 0) | ||
| 83 | |||
| 84 | #define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n))) | ||
| 85 | #define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n))) | ||
| 86 | |||
| 87 | #endif /* __ASSEMBLER__ */ | ||
| 88 | |||
| 89 | #endif /* __ASM_ARCH_TC_H */ | ||
diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h index 0ff22dc075c7..ad6fbe7d83f2 100644 --- a/arch/arm/mach-omap1/include/mach/uncompress.h +++ b/arch/arm/mach-omap1/include/mach/uncompress.h | |||
| @@ -1,5 +1,122 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/arm/mach-omap1/include/mach/uncompress.h | 2 | * arch/arm/plat-omap/include/mach/uncompress.h |
| 3 | * | ||
| 4 | * Serial port stubs for kernel decompress status messages | ||
| 5 | * | ||
| 6 | * Initially based on: | ||
| 7 | * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h | ||
| 8 | * Copyright (C) 2000 RidgeRun, Inc. | ||
| 9 | * Author: Greg Lonnon <glonnon@ridgerun.com> | ||
| 10 | * | ||
| 11 | * Rewritten by: | ||
| 12 | * Author: <source@mvista.com> | ||
| 13 | * 2004 (c) MontaVista Software, Inc. | ||
| 14 | * | ||
| 15 | * This file is licensed under the terms of the GNU General Public License | ||
| 16 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 17 | * kind, whether express or implied. | ||
| 3 | */ | 18 | */ |
| 4 | 19 | ||
| 5 | #include <plat/uncompress.h> | 20 | #include <linux/types.h> |
| 21 | #include <linux/serial_reg.h> | ||
| 22 | |||
| 23 | #include <asm/memory.h> | ||
| 24 | #include <asm/mach-types.h> | ||
| 25 | |||
| 26 | #include "serial.h" | ||
| 27 | |||
| 28 | #define MDR1_MODE_MASK 0x07 | ||
| 29 | |||
| 30 | volatile u8 *uart_base; | ||
| 31 | int uart_shift; | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Store the DEBUG_LL uart number into memory. | ||
| 35 | * See also debug-macro.S, and serial.c for related code. | ||
| 36 | */ | ||
| 37 | static void set_omap_uart_info(unsigned char port) | ||
| 38 | { | ||
| 39 | /* | ||
| 40 | * Get address of some.bss variable and round it down | ||
| 41 | * a la CONFIG_AUTO_ZRELADDR. | ||
| 42 | */ | ||
| 43 | u32 ram_start = (u32)&uart_shift & 0xf8000000; | ||
| 44 | u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); | ||
| 45 | *uart_info = port; | ||
| 46 | } | ||
| 47 | |||
| 48 | static void putc(int c) | ||
| 49 | { | ||
| 50 | if (!uart_base) | ||
| 51 | return; | ||
| 52 | |||
| 53 | /* Check for UART 16x mode */ | ||
| 54 | if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) | ||
| 55 | return; | ||
| 56 | |||
| 57 | while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) | ||
| 58 | barrier(); | ||
| 59 | uart_base[UART_TX << uart_shift] = c; | ||
| 60 | } | ||
| 61 | |||
| 62 | static inline void flush(void) | ||
| 63 | { | ||
| 64 | } | ||
| 65 | |||
| 66 | /* | ||
| 67 | * Macros to configure UART1 and debug UART | ||
| 68 | */ | ||
| 69 | #define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \ | ||
| 70 | if (machine_is_##mach()) { \ | ||
| 71 | uart_base = (volatile u8 *)(dbg_uart); \ | ||
| 72 | uart_shift = (dbg_shft); \ | ||
| 73 | port = (dbg_id); \ | ||
| 74 | set_omap_uart_info(port); \ | ||
| 75 | break; \ | ||
| 76 | } | ||
| 77 | |||
| 78 | #define DEBUG_LL_OMAP7XX(p, mach) \ | ||
| 79 | _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \ | ||
| 80 | OMAP1UART##p) | ||
| 81 | |||
| 82 | #define DEBUG_LL_OMAP1(p, mach) \ | ||
| 83 | _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, \ | ||
| 84 | OMAP1UART##p) | ||
| 85 | |||
| 86 | static inline void arch_decomp_setup(void) | ||
| 87 | { | ||
| 88 | int port = 0; | ||
| 89 | |||
| 90 | /* | ||
| 91 | * Initialize the port based on the machine ID from the bootloader. | ||
| 92 | * Note that we're using macros here instead of switch statement | ||
| 93 | * as machine_is functions are optimized out for the boards that | ||
| 94 | * are not selected. | ||
| 95 | */ | ||
| 96 | do { | ||
| 97 | /* omap7xx/8xx based boards using UART1 with shift 0 */ | ||
| 98 | DEBUG_LL_OMAP7XX(1, herald); | ||
| 99 | DEBUG_LL_OMAP7XX(1, omap_perseus2); | ||
| 100 | |||
| 101 | /* omap15xx/16xx based boards using UART1 */ | ||
| 102 | DEBUG_LL_OMAP1(1, ams_delta); | ||
| 103 | DEBUG_LL_OMAP1(1, nokia770); | ||
| 104 | DEBUG_LL_OMAP1(1, omap_h2); | ||
| 105 | DEBUG_LL_OMAP1(1, omap_h3); | ||
| 106 | DEBUG_LL_OMAP1(1, omap_innovator); | ||
| 107 | DEBUG_LL_OMAP1(1, omap_osk); | ||
| 108 | DEBUG_LL_OMAP1(1, omap_palmte); | ||
| 109 | DEBUG_LL_OMAP1(1, omap_palmz71); | ||
| 110 | |||
| 111 | /* omap15xx/16xx based boards using UART2 */ | ||
| 112 | DEBUG_LL_OMAP1(2, omap_palmtt); | ||
| 113 | |||
| 114 | /* omap15xx/16xx based boards using UART3 */ | ||
| 115 | DEBUG_LL_OMAP1(3, sx1); | ||
| 116 | } while (0); | ||
| 117 | } | ||
| 118 | |||
| 119 | /* | ||
| 120 | * nothing to do | ||
| 121 | */ | ||
| 122 | #define arch_decomp_wdog() | ||
