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Diffstat (limited to 'arch/arm/mach-mv78xx0/include/mach/mv78xx0.h')
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 46200a183cf2..723748d8ba7d 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -60,13 +60,18 @@
60 */ 60 */
61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) 61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
62#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE) 62#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE)
63#define BRIDGE_WINS_CPU0_BASE (MV78XX0_CORE0_REGS_PHYS_BASE)
64#define BRIDGE_WINS_CPU1_BASE (MV78XX0_CORE1_REGS_PHYS_BASE)
65#define BRIDGE_WINS_SZ (0xA000)
63 66
64/* 67/*
65 * Register Map 68 * Register Map
66 */ 69 */
67#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x00000) 70#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x00000)
68#define DDR_WINDOW_CPU0_BASE (DDR_VIRT_BASE + 0x1500) 71#define DDR_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x00000)
69#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE + 0x1570) 72#define DDR_WINDOW_CPU0_BASE (DDR_PHYS_BASE + 0x1500)
73#define DDR_WINDOW_CPU1_BASE (DDR_PHYS_BASE + 0x1570)
74#define DDR_WINDOW_CPU_SZ (0x20)
70 75
71#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x10000) 76#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x10000)
72#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x10000) 77#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x10000)