1 files changed, 26 insertions, 1 deletions

diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index 9bdf54795f05..56978199c479 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -20,6 +20,7 @@
 #include <asm/cputype.h>
 #include <asm/cp15.h>
 #include <asm/mcpm.h>
+#include <asm/smp_plat.h>
 
 #include "regs-pmu.h"
 #include "common.h"
@@ -70,7 +71,31 @@ static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
                 cluster >= EXYNOS5420_NR_CLUSTERS)
                 return -EINVAL;
 
-        exynos_cpu_power_up(cpunr);
+        if (!exynos_cpu_power_state(cpunr)) {
+                exynos_cpu_power_up(cpunr);
+
+                /*
+                 * This assumes the cluster number of the big cores(Cortex A15)
+                 * is 0 and the Little cores(Cortex A7) is 1.
+                 * When the system was booted from the Little core,
+                 * they should be reset during power up cpu.
+                 */
+                if (cluster &&
+                    cluster == MPIDR_AFFINITY_LEVEL(cpu_logical_map(0), 1)) {
+                        /*
+                         * Before we reset the Little cores, we should wait
+                         * the SPARE2 register is set to 1 because the init
+                         * codes of the iROM will set the register after
+                         * initialization.
+                         */
+                        while (!pmu_raw_readl(S5P_PMU_SPARE2))
+                                udelay(10);
+
+                        pmu_raw_writel(EXYNOS5420_KFC_CORE_RESET(cpu),
+                                        EXYNOS_SWRESET);
+                }
+        }
+
         return 0;
 }