diff options
Diffstat (limited to 'arch/arm/mach-ep93xx/hardware.h')
| -rw-r--r-- | arch/arm/mach-ep93xx/hardware.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/hardware.h b/arch/arm/mach-ep93xx/hardware.h new file mode 100644 index 000000000000..e7d850e04782 --- /dev/null +++ b/arch/arm/mach-ep93xx/hardware.h | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | /* | ||
| 3 | * arch/arm/mach-ep93xx/include/mach/hardware.h | ||
| 4 | */ | ||
| 5 | |||
| 6 | #ifndef __ASM_ARCH_HARDWARE_H | ||
| 7 | #define __ASM_ARCH_HARDWARE_H | ||
| 8 | |||
| 9 | #include "platform.h" | ||
| 10 | |||
| 11 | /* | ||
| 12 | * The EP93xx has two external crystal oscillators. To generate the | ||
| 13 | * required high-frequency clocks, the processor uses two phase-locked- | ||
| 14 | * loops (PLLs) to multiply the incoming external clock signal to much | ||
| 15 | * higher frequencies that are then divided down by programmable dividers | ||
| 16 | * to produce the needed clocks. The PLLs operate independently of one | ||
| 17 | * another. | ||
| 18 | */ | ||
| 19 | #define EP93XX_EXT_CLK_RATE 14745600 | ||
| 20 | #define EP93XX_EXT_RTC_RATE 32768 | ||
| 21 | |||
| 22 | #define EP93XX_KEYTCHCLK_DIV4 (EP93XX_EXT_CLK_RATE / 4) | ||
| 23 | #define EP93XX_KEYTCHCLK_DIV16 (EP93XX_EXT_CLK_RATE / 16) | ||
| 24 | |||
| 25 | #endif | ||
