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-rw-r--r--arch/arm/kvm/arm.c7
-rw-r--r--arch/arm/kvm/mmio.c5
-rw-r--r--arch/arm/kvm/mmu.c15
-rw-r--r--arch/arm/kvm/psci.c20
4 files changed, 21 insertions, 26 deletions
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index eab83b2435b8..e06fd299de08 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -564,17 +564,12 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
564 vcpu_sleep(vcpu); 564 vcpu_sleep(vcpu);
565 565
566 /* 566 /*
567 * Disarming the background timer must be done in a
568 * preemptible context, as this call may sleep.
569 */
570 kvm_timer_flush_hwstate(vcpu);
571
572 /*
573 * Preparing the interrupts to be injected also 567 * Preparing the interrupts to be injected also
574 * involves poking the GIC, which must be done in a 568 * involves poking the GIC, which must be done in a
575 * non-preemptible context. 569 * non-preemptible context.
576 */ 570 */
577 preempt_disable(); 571 preempt_disable();
572 kvm_timer_flush_hwstate(vcpu);
578 kvm_vgic_flush_hwstate(vcpu); 573 kvm_vgic_flush_hwstate(vcpu);
579 574
580 local_irq_disable(); 575 local_irq_disable();
diff --git a/arch/arm/kvm/mmio.c b/arch/arm/kvm/mmio.c
index 974b1c606d04..3a10c9f1d0a4 100644
--- a/arch/arm/kvm/mmio.c
+++ b/arch/arm/kvm/mmio.c
@@ -115,7 +115,7 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run)
115 trace_kvm_mmio(KVM_TRACE_MMIO_READ, len, run->mmio.phys_addr, 115 trace_kvm_mmio(KVM_TRACE_MMIO_READ, len, run->mmio.phys_addr,
116 data); 116 data);
117 data = vcpu_data_host_to_guest(vcpu, data, len); 117 data = vcpu_data_host_to_guest(vcpu, data, len);
118 *vcpu_reg(vcpu, vcpu->arch.mmio_decode.rt) = data; 118 vcpu_set_reg(vcpu, vcpu->arch.mmio_decode.rt, data);
119 } 119 }
120 120
121 return 0; 121 return 0;
@@ -186,7 +186,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
186 rt = vcpu->arch.mmio_decode.rt; 186 rt = vcpu->arch.mmio_decode.rt;
187 187
188 if (is_write) { 188 if (is_write) {
189 data = vcpu_data_guest_to_host(vcpu, *vcpu_reg(vcpu, rt), len); 189 data = vcpu_data_guest_to_host(vcpu, vcpu_get_reg(vcpu, rt),
190 len);
190 191
191 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, len, fault_ipa, data); 192 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, len, fault_ipa, data);
192 mmio_write_buf(data_buf, len, data); 193 mmio_write_buf(data_buf, len, data);
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 6984342da13d..61d96a645ff3 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -98,6 +98,11 @@ static void kvm_flush_dcache_pud(pud_t pud)
98 __kvm_flush_dcache_pud(pud); 98 __kvm_flush_dcache_pud(pud);
99} 99}
100 100
101static bool kvm_is_device_pfn(unsigned long pfn)
102{
103 return !pfn_valid(pfn);
104}
105
101/** 106/**
102 * stage2_dissolve_pmd() - clear and flush huge PMD entry 107 * stage2_dissolve_pmd() - clear and flush huge PMD entry
103 * @kvm: pointer to kvm structure. 108 * @kvm: pointer to kvm structure.
@@ -213,7 +218,7 @@ static void unmap_ptes(struct kvm *kvm, pmd_t *pmd,
213 kvm_tlb_flush_vmid_ipa(kvm, addr); 218 kvm_tlb_flush_vmid_ipa(kvm, addr);
214 219
215 /* No need to invalidate the cache for device mappings */ 220 /* No need to invalidate the cache for device mappings */
216 if ((pte_val(old_pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE) 221 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
217 kvm_flush_dcache_pte(old_pte); 222 kvm_flush_dcache_pte(old_pte);
218 223
219 put_page(virt_to_page(pte)); 224 put_page(virt_to_page(pte));
@@ -305,8 +310,7 @@ static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
305 310
306 pte = pte_offset_kernel(pmd, addr); 311 pte = pte_offset_kernel(pmd, addr);
307 do { 312 do {
308 if (!pte_none(*pte) && 313 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
309 (pte_val(*pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
310 kvm_flush_dcache_pte(*pte); 314 kvm_flush_dcache_pte(*pte);
311 } while (pte++, addr += PAGE_SIZE, addr != end); 315 } while (pte++, addr += PAGE_SIZE, addr != end);
312} 316}
@@ -1037,11 +1041,6 @@ static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1037 return kvm_vcpu_dabt_iswrite(vcpu); 1041 return kvm_vcpu_dabt_iswrite(vcpu);
1038} 1042}
1039 1043
1040static bool kvm_is_device_pfn(unsigned long pfn)
1041{
1042 return !pfn_valid(pfn);
1043}
1044
1045/** 1044/**
1046 * stage2_wp_ptes - write protect PMD range 1045 * stage2_wp_ptes - write protect PMD range
1047 * @pmd: pointer to pmd entry 1046 * @pmd: pointer to pmd entry
diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c
index 0b556968a6da..a9b3b905e661 100644
--- a/arch/arm/kvm/psci.c
+++ b/arch/arm/kvm/psci.c
@@ -75,7 +75,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
75 unsigned long context_id; 75 unsigned long context_id;
76 phys_addr_t target_pc; 76 phys_addr_t target_pc;
77 77
78 cpu_id = *vcpu_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK; 78 cpu_id = vcpu_get_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
79 if (vcpu_mode_is_32bit(source_vcpu)) 79 if (vcpu_mode_is_32bit(source_vcpu))
80 cpu_id &= ~((u32) 0); 80 cpu_id &= ~((u32) 0);
81 81
@@ -94,8 +94,8 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
94 return PSCI_RET_INVALID_PARAMS; 94 return PSCI_RET_INVALID_PARAMS;
95 } 95 }
96 96
97 target_pc = *vcpu_reg(source_vcpu, 2); 97 target_pc = vcpu_get_reg(source_vcpu, 2);
98 context_id = *vcpu_reg(source_vcpu, 3); 98 context_id = vcpu_get_reg(source_vcpu, 3);
99 99
100 kvm_reset_vcpu(vcpu); 100 kvm_reset_vcpu(vcpu);
101 101
@@ -114,7 +114,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
114 * NOTE: We always update r0 (or x0) because for PSCI v0.1 114 * NOTE: We always update r0 (or x0) because for PSCI v0.1
115 * the general puspose registers are undefined upon CPU_ON. 115 * the general puspose registers are undefined upon CPU_ON.
116 */ 116 */
117 *vcpu_reg(vcpu, 0) = context_id; 117 vcpu_set_reg(vcpu, 0, context_id);
118 vcpu->arch.power_off = false; 118 vcpu->arch.power_off = false;
119 smp_mb(); /* Make sure the above is visible */ 119 smp_mb(); /* Make sure the above is visible */
120 120
@@ -134,8 +134,8 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
134 struct kvm *kvm = vcpu->kvm; 134 struct kvm *kvm = vcpu->kvm;
135 struct kvm_vcpu *tmp; 135 struct kvm_vcpu *tmp;
136 136
137 target_affinity = *vcpu_reg(vcpu, 1); 137 target_affinity = vcpu_get_reg(vcpu, 1);
138 lowest_affinity_level = *vcpu_reg(vcpu, 2); 138 lowest_affinity_level = vcpu_get_reg(vcpu, 2);
139 139
140 /* Determine target affinity mask */ 140 /* Determine target affinity mask */
141 target_affinity_mask = psci_affinity_mask(lowest_affinity_level); 141 target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
@@ -209,7 +209,7 @@ int kvm_psci_version(struct kvm_vcpu *vcpu)
209static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) 209static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
210{ 210{
211 int ret = 1; 211 int ret = 1;
212 unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0); 212 unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
213 unsigned long val; 213 unsigned long val;
214 214
215 switch (psci_fn) { 215 switch (psci_fn) {
@@ -273,13 +273,13 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
273 break; 273 break;
274 } 274 }
275 275
276 *vcpu_reg(vcpu, 0) = val; 276 vcpu_set_reg(vcpu, 0, val);
277 return ret; 277 return ret;
278} 278}
279 279
280static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) 280static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
281{ 281{
282 unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0); 282 unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
283 unsigned long val; 283 unsigned long val;
284 284
285 switch (psci_fn) { 285 switch (psci_fn) {
@@ -295,7 +295,7 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
295 break; 295 break;
296 } 296 }
297 297
298 *vcpu_reg(vcpu, 0) = val; 298 vcpu_set_reg(vcpu, 0, val);
299 return 1; 299 return 1;
300} 300}
301 301