diff options
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 56 | ||||
-rw-r--r-- | arch/arm/boot/dts/zynq-zc702.dts | 4 |
2 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 8b30e596deab..bb3085ca4f06 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi | |||
@@ -53,5 +53,61 @@ | |||
53 | interrupts = <0 50 4>; | 53 | interrupts = <0 50 4>; |
54 | clock = <50000000>; | 54 | clock = <50000000>; |
55 | }; | 55 | }; |
56 | |||
57 | slcr: slcr@f8000000 { | ||
58 | compatible = "xlnx,zynq-slcr"; | ||
59 | reg = <0xF8000000 0x1000>; | ||
60 | |||
61 | clocks { | ||
62 | #address-cells = <1>; | ||
63 | #size-cells = <0>; | ||
64 | |||
65 | ps_clk: ps_clk { | ||
66 | #clock-cells = <0>; | ||
67 | compatible = "fixed-clock"; | ||
68 | /* clock-frequency set in board-specific file */ | ||
69 | clock-output-names = "ps_clk"; | ||
70 | }; | ||
71 | armpll: armpll { | ||
72 | #clock-cells = <0>; | ||
73 | compatible = "xlnx,zynq-pll"; | ||
74 | clocks = <&ps_clk>; | ||
75 | reg = <0x100 0x110>; | ||
76 | clock-output-names = "armpll"; | ||
77 | }; | ||
78 | ddrpll: ddrpll { | ||
79 | #clock-cells = <0>; | ||
80 | compatible = "xlnx,zynq-pll"; | ||
81 | clocks = <&ps_clk>; | ||
82 | reg = <0x104 0x114>; | ||
83 | clock-output-names = "ddrpll"; | ||
84 | }; | ||
85 | iopll: iopll { | ||
86 | #clock-cells = <0>; | ||
87 | compatible = "xlnx,zynq-pll"; | ||
88 | clocks = <&ps_clk>; | ||
89 | reg = <0x108 0x118>; | ||
90 | clock-output-names = "iopll"; | ||
91 | }; | ||
92 | uart_clk: uart_clk { | ||
93 | #clock-cells = <1>; | ||
94 | compatible = "xlnx,zynq-periph-clock"; | ||
95 | clocks = <&iopll &armpll &ddrpll>; | ||
96 | reg = <0x154>; | ||
97 | clock-output-names = "uart0_ref_clk", | ||
98 | "uart1_ref_clk"; | ||
99 | }; | ||
100 | cpu_clk: cpu_clk { | ||
101 | #clock-cells = <1>; | ||
102 | compatible = "xlnx,zynq-cpu-clock"; | ||
103 | clocks = <&iopll &armpll &ddrpll>; | ||
104 | reg = <0x120 0x1C4>; | ||
105 | clock-output-names = "cpu_6x4x", | ||
106 | "cpu_3x2x", | ||
107 | "cpu_2x", | ||
108 | "cpu_1x"; | ||
109 | }; | ||
110 | }; | ||
111 | }; | ||
56 | }; | 112 | }; |
57 | }; | 113 | }; |
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index e25a307438ad..86f44d5b0265 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts | |||
@@ -28,3 +28,7 @@ | |||
28 | }; | 28 | }; |
29 | 29 | ||
30 | }; | 30 | }; |
31 | |||
32 | &ps_clk { | ||
33 | clock-frequency = <33333330>; | ||
34 | }; | ||