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-rw-r--r--arch/arm/boot/dts/k2e-evm.dts81
1 files changed, 81 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/k2e-evm.dts b/arch/arm/boot/dts/k2e-evm.dts
index 74b3b63e94cf..c568f067604d 100644
--- a/arch/arm/boot/dts/k2e-evm.dts
+++ b/arch/arm/boot/dts/k2e-evm.dts
@@ -58,3 +58,84 @@
58&usb1 { 58&usb1 {
59 status = "okay"; 59 status = "okay";
60}; 60};
61
62&i2c0 {
63 dtt@50 {
64 compatible = "at,24c1024";
65 reg = <0x50>;
66 };
67};
68
69&aemif {
70 cs0 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 clock-ranges;
74 ranges;
75
76 ti,cs-chipselect = <0>;
77 /* all timings in nanoseconds */
78 ti,cs-min-turnaround-ns = <12>;
79 ti,cs-read-hold-ns = <6>;
80 ti,cs-read-strobe-ns = <23>;
81 ti,cs-read-setup-ns = <9>;
82 ti,cs-write-hold-ns = <8>;
83 ti,cs-write-strobe-ns = <23>;
84 ti,cs-write-setup-ns = <8>;
85
86 nand@0,0 {
87 compatible = "ti,keystone-nand","ti,davinci-nand";
88 #address-cells = <1>;
89 #size-cells = <1>;
90 reg = <0 0 0x4000000
91 1 0 0x0000100>;
92
93 ti,davinci-chipselect = <0>;
94 ti,davinci-mask-ale = <0x2000>;
95 ti,davinci-mask-cle = <0x4000>;
96 ti,davinci-mask-chipsel = <0>;
97 nand-ecc-mode = "hw";
98 ti,davinci-ecc-bits = <4>;
99 nand-on-flash-bbt;
100
101 partition@0 {
102 label = "u-boot";
103 reg = <0x0 0x100000>;
104 read-only;
105 };
106
107 partition@100000 {
108 label = "params";
109 reg = <0x100000 0x80000>;
110 read-only;
111 };
112
113 partition@180000 {
114 label = "ubifs";
115 reg = <0x180000 0x1FE80000>;
116 };
117 };
118 };
119};
120
121&spi0 {
122 nor_flash: n25q128a11@0 {
123 #address-cells = <1>;
124 #size-cells = <1>;
125 compatible = "Micron,n25q128a11";
126 spi-max-frequency = <54000000>;
127 m25p,fast-read;
128 reg = <0>;
129
130 partition@0 {
131 label = "u-boot-spl";
132 reg = <0x0 0x80000>;
133 read-only;
134 };
135
136 partition@1 {
137 label = "misc";
138 reg = <0x80000 0xf80000>;
139 };
140 };
141};