1 files changed, 54 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index e0302636aff5..8c1cb53464a0 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -95,6 +95,12 @@
         };
 };
 
+&can1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_can1>;
+        status = "okay";
+};
+
 &ecspi5 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi5>;
@@ -118,6 +124,13 @@
         status = "okay";
 };
 
+&i2c1 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c1>;
+        status = "okay";
+};
+
 &i2c2 {
         clock-frequency = <100000>;
         pinctrl-names = "default";
@@ -274,6 +287,13 @@
         };
 };
 
+&i2c3 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c3>;
+        status = "okay";
+};
+
 &iomuxc {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_hog>;
@@ -286,6 +306,13 @@
                         >;
                 };
 
+                pinctrl_can1: can1grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b0
+                                MX6QDL_PAD_GPIO_7__FLEXCAN1_TX          0x1b0b0
+                        >;
+                };
+
                 pinctrl_ecspi5: ecspi5rp-1 {
                         fsl,pins = <
                                 MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO        0x80000000
@@ -316,6 +343,13 @@
                         >;
                 };
 
+                pinctrl_i2c1: i2c1grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
+                                MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
+                        >;
+                };
+
                 pinctrl_i2c2: i2c2grp {
                         fsl,pins = <
                                 MX6QDL_PAD_EIM_EB2__I2C2_SCL            0x4001b8b1
@@ -323,6 +357,19 @@
                         >;
                 };
 
+                pinctrl_i2c3: i2c3grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
+                                MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
+                        >;
+                };
+
+                pinctrl_pcie: pciegrp {
+                        fsl,pins = <
+                                MX6QDL_PAD_KEY_COL1__GPIO4_IO08         0x100b1
+                        >;
+                };
+
                 pinctrl_pfuze: pfuze100grp1 {
                         fsl,pins = <
                                 MX6QDL_PAD_EIM_D20__GPIO3_IO20          0x80000000
@@ -385,6 +432,13 @@
         };
 };
 
+&pcie {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pcie>;
+        reset-gpio = <&gpio4 8 0>;
+        status = "okay";
+};
+
 &sata {
         status = "okay";
 };