1 files changed, 14 insertions, 2 deletions

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 90275f036cd1..fe4d9c3ad761 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -44,7 +44,7 @@
 
 #else
 
-#include <mach/debug-macro.S>
+#include CONFIG_DEBUG_LL_INCLUDE
 
                 .macro  writeb, ch, rb
                 senduart \ch, \rb
@@ -652,6 +652,15 @@ __setup_mmu:	sub	r3, r4, #16384		@ Page directory size
                 mov     pc, lr
 ENDPROC(__setup_mmu)
 
+@ Enable unaligned access on v6, to allow better code generation
+@ for the decompressor C code:
+__armv6_mmu_cache_on:
+                mrc     p15, 0, r0, c1, c0, 0   @ read SCTLR
+                bic     r0, r0, #2              @ A (no unaligned access fault)
+                orr     r0, r0, #1 << 22        @ U (v6 unaligned access model)
+                mcr     p15, 0, r0, c1, c0, 0   @ write SCTLR
+                b       __armv4_mmu_cache_on
+
 __arm926ejs_mmu_cache_on:
 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
                 mov     r0, #4                  @ put dcache in WT mode
@@ -694,6 +703,9 @@ __armv7_mmu_cache_on:
                 bic     r0, r0, #1 << 28        @ clear SCTLR.TRE
                 orr     r0, r0, #0x5000         @ I-cache enable, RR cache replacement
                 orr     r0, r0, #0x003c         @ write buffer
+                bic     r0, r0, #2              @ A (no unaligned access fault)
+                orr     r0, r0, #1 << 22        @ U (v6 unaligned access model)
+                                                @ (needed for ARM1176)
 #ifdef CONFIG_MMU
 #ifdef CONFIG_CPU_ENDIAN_BE8
                 orr     r0, r0, #1 << 25        @ big-endian page tables
@@ -914,7 +926,7 @@ proc_types:
 
                 .word   0x0007b000              @ ARMv6
                 .word   0x000ff000
-                W(b)    __armv4_mmu_cache_on
+                W(b)    __armv6_mmu_cache_on
                 W(b)    __armv4_mmu_cache_off
                 W(b)    __armv6_mmu_cache_flush