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-rw-r--r--Documentation/devicetree/bindings/scsi/hisilicon-sas.txt21
1 files changed, 20 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
index f67e761bcc18..bf2411f366e5 100644
--- a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
+++ b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
@@ -5,6 +5,7 @@ The HiSilicon SAS controller supports SAS/SATA.
5Main node required properties: 5Main node required properties:
6 - compatible : value should be as follows: 6 - compatible : value should be as follows:
7 (a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset 7 (a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset
8 (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
8 - sas-addr : array of 8 bytes for host SAS address 9 - sas-addr : array of 8 bytes for host SAS address
9 - reg : Address and length of the SAS register 10 - reg : Address and length of the SAS register
10 - hisilicon,sas-syscon: phandle of syscon used for sas control 11 - hisilicon,sas-syscon: phandle of syscon used for sas control
@@ -13,7 +14,7 @@ Main node required properties:
13 - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg 14 - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg
14 - queue-count : number of delivery and completion queues in the controller 15 - queue-count : number of delivery and completion queues in the controller
15 - phy-count : number of phys accessible by the controller 16 - phy-count : number of phys accessible by the controller
16 - interrupts : Interrupts for phys, completion queues, and fatal 17 - interrupts : For v1 hw: Interrupts for phys, completion queues, and fatal
17 sources; the interrupts are ordered in 3 groups, as follows: 18 sources; the interrupts are ordered in 3 groups, as follows:
18 - Phy interrupts 19 - Phy interrupts
19 - Completion queue interrupts 20 - Completion queue interrupts
@@ -30,6 +31,24 @@ Main node required properties:
30 Fatal interrupts : the fatal interrupts are ordered as follows: 31 Fatal interrupts : the fatal interrupts are ordered as follows:
31 - ECC 32 - ECC
32 - AXI bus 33 - AXI bus
34 For v2 hw: Interrupts for phys, Sata, and completion queues;
35 the interrupts are ordered in 3 groups, as follows:
36 - Phy interrupts
37 - Sata interrupts
38 - Completion queue interrupts
39 Phy interrupts : Each controller has 2 phy interrupts:
40 - phy up/down
41 - channel interrupt
42 Sata interrupts : Each phy on the controller has 1 Sata
43 interrupt. The interrupts are ordered in increasing
44 order.
45 Completion queue interrupts : each completion queue has 1
46 interrupt source. The interrupts are ordered in
47 increasing order.
48
49Optional main node properties:
50 - hip06-sas-v2-quirk-amt : when set, indicates that the v2 controller has the
51 "am-max-transmissions" limitation.
33 52
34Example: 53Example:
35 sas0: sas@c1000000 { 54 sas0: sas@c1000000 {