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-rw-r--r--Documentation/devicetree/bindings/arm/vexpress.txt15
1 files changed, 10 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/arm/vexpress.txt b/Documentation/devicetree/bindings/arm/vexpress.txt
index ae49161e478a..39844cd0bcce 100644
--- a/Documentation/devicetree/bindings/arm/vexpress.txt
+++ b/Documentation/devicetree/bindings/arm/vexpress.txt
@@ -80,12 +80,17 @@ but also control clock generators, voltage regulators, gather
80environmental data like temperature, power consumption etc. Even 80environmental data like temperature, power consumption etc. Even
81the video output switch (FPGA) is controlled that way. 81the video output switch (FPGA) is controlled that way.
82 82
83Nodes describing devices controlled by this infrastructure should 83The controllers are not mapped into normal memory address space
84point at the bridge device node: 84and must be accessed through bridges - other devices capable
85of generating transactions on the configuration bus.
86
87The nodes describing configuration controllers must define
88the following properties:
89- compatible value:
90 compatible = "arm,vexpress,config-bus";
85- bridge phandle: 91- bridge phandle:
86 arm,vexpress,config-bridge = <phandle>; 92 arm,vexpress,config-bridge = <phandle>;
87This property can be also defined in a parent node (eg. for a DCC) 93and children describing available functions.
88and is effective for all children.
89 94
90 95
91Platform topology 96Platform topology
@@ -197,7 +202,7 @@ Example of a VE tile description (simplified)
197 }; 202 };
198 203
199 dcc { 204 dcc {
200 compatible = "simple-bus"; 205 compatible = "arm,vexpress,config-bus";
201 arm,vexpress,config-bridge = <&v2m_sysreg>; 206 arm,vexpress,config-bridge = <&v2m_sysreg>;
202 207
203 osc@0 { 208 osc@0 {