diff options
Diffstat (limited to 'Documentation/device-mapper/cache.txt')
| -rw-r--r-- | Documentation/device-mapper/cache.txt | 57 |
1 files changed, 51 insertions, 6 deletions
diff --git a/Documentation/device-mapper/cache.txt b/Documentation/device-mapper/cache.txt index 33d45ee0b737..274752f8bdf9 100644 --- a/Documentation/device-mapper/cache.txt +++ b/Documentation/device-mapper/cache.txt | |||
| @@ -68,10 +68,11 @@ So large block sizes are bad because they waste cache space. And small | |||
| 68 | block sizes are bad because they increase the amount of metadata (both | 68 | block sizes are bad because they increase the amount of metadata (both |
| 69 | in core and on disk). | 69 | in core and on disk). |
| 70 | 70 | ||
| 71 | Writeback/writethrough | 71 | Cache operating modes |
| 72 | ---------------------- | 72 | --------------------- |
| 73 | 73 | ||
| 74 | The cache has two modes, writeback and writethrough. | 74 | The cache has three operating modes: writeback, writethrough and |
| 75 | passthrough. | ||
| 75 | 76 | ||
| 76 | If writeback, the default, is selected then a write to a block that is | 77 | If writeback, the default, is selected then a write to a block that is |
| 77 | cached will go only to the cache and the block will be marked dirty in | 78 | cached will go only to the cache and the block will be marked dirty in |
| @@ -81,8 +82,31 @@ If writethrough is selected then a write to a cached block will not | |||
| 81 | complete until it has hit both the origin and cache devices. Clean | 82 | complete until it has hit both the origin and cache devices. Clean |
| 82 | blocks should remain clean. | 83 | blocks should remain clean. |
| 83 | 84 | ||
| 85 | If passthrough is selected, useful when the cache contents are not known | ||
| 86 | to be coherent with the origin device, then all reads are served from | ||
| 87 | the origin device (all reads miss the cache) and all writes are | ||
| 88 | forwarded to the origin device; additionally, write hits cause cache | ||
| 89 | block invalidates. To enable passthrough mode the cache must be clean. | ||
| 90 | Passthrough mode allows a cache device to be activated without having to | ||
| 91 | worry about coherency. Coherency that exists is maintained, although | ||
| 92 | the cache will gradually cool as writes take place. If the coherency of | ||
| 93 | the cache can later be verified, or established through use of the | ||
| 94 | "invalidate_cblocks" message, the cache device can be transitioned to | ||
| 95 | writethrough or writeback mode while still warm. Otherwise, the cache | ||
| 96 | contents can be discarded prior to transitioning to the desired | ||
| 97 | operating mode. | ||
| 98 | |||
| 84 | A simple cleaner policy is provided, which will clean (write back) all | 99 | A simple cleaner policy is provided, which will clean (write back) all |
| 85 | dirty blocks in a cache. Useful for decommissioning a cache. | 100 | dirty blocks in a cache. Useful for decommissioning a cache or when |
| 101 | shrinking a cache. Shrinking the cache's fast device requires all cache | ||
| 102 | blocks, in the area of the cache being removed, to be clean. If the | ||
| 103 | area being removed from the cache still contains dirty blocks the resize | ||
| 104 | will fail. Care must be taken to never reduce the volume used for the | ||
| 105 | cache's fast device until the cache is clean. This is of particular | ||
| 106 | importance if writeback mode is used. Writethrough and passthrough | ||
| 107 | modes already maintain a clean cache. Future support to partially clean | ||
| 108 | the cache, above a specified threshold, will allow for keeping the cache | ||
| 109 | warm and in writeback mode during resize. | ||
| 86 | 110 | ||
| 87 | Migration throttling | 111 | Migration throttling |
| 88 | -------------------- | 112 | -------------------- |
| @@ -161,7 +185,7 @@ Constructor | |||
| 161 | block size : cache unit size in sectors | 185 | block size : cache unit size in sectors |
| 162 | 186 | ||
| 163 | #feature args : number of feature arguments passed | 187 | #feature args : number of feature arguments passed |
| 164 | feature args : writethrough. (The default is writeback.) | 188 | feature args : writethrough or passthrough (The default is writeback.) |
| 165 | 189 | ||
| 166 | policy : the replacement policy to use | 190 | policy : the replacement policy to use |
| 167 | #policy args : an even number of arguments corresponding to | 191 | #policy args : an even number of arguments corresponding to |
| @@ -177,6 +201,13 @@ Optional feature arguments are: | |||
| 177 | back cache block contents later for performance reasons, | 201 | back cache block contents later for performance reasons, |
| 178 | so they may differ from the corresponding origin blocks. | 202 | so they may differ from the corresponding origin blocks. |
| 179 | 203 | ||
| 204 | passthrough : a degraded mode useful for various cache coherency | ||
| 205 | situations (e.g., rolling back snapshots of | ||
| 206 | underlying storage). Reads and writes always go to | ||
| 207 | the origin. If a write goes to a cached origin | ||
| 208 | block, then the cache block is invalidated. | ||
| 209 | To enable passthrough mode the cache must be clean. | ||
| 210 | |||
| 180 | A policy called 'default' is always registered. This is an alias for | 211 | A policy called 'default' is always registered. This is an alias for |
| 181 | the policy we currently think is giving best all round performance. | 212 | the policy we currently think is giving best all round performance. |
| 182 | 213 | ||
| @@ -231,12 +262,26 @@ The message format is: | |||
| 231 | E.g. | 262 | E.g. |
| 232 | dmsetup message my_cache 0 sequential_threshold 1024 | 263 | dmsetup message my_cache 0 sequential_threshold 1024 |
| 233 | 264 | ||
| 265 | |||
| 266 | Invalidation is removing an entry from the cache without writing it | ||
| 267 | back. Cache blocks can be invalidated via the invalidate_cblocks | ||
| 268 | message, which takes an arbitrary number of cblock ranges. Each cblock | ||
| 269 | must be expressed as a decimal value, in the future a variant message | ||
| 270 | that takes cblock ranges expressed in hexidecimal may be needed to | ||
| 271 | better support efficient invalidation of larger caches. The cache must | ||
| 272 | be in passthrough mode when invalidate_cblocks is used. | ||
| 273 | |||
| 274 | invalidate_cblocks [<cblock>|<cblock begin>-<cblock end>]* | ||
| 275 | |||
| 276 | E.g. | ||
| 277 | dmsetup message my_cache 0 invalidate_cblocks 2345 3456-4567 5678-6789 | ||
| 278 | |||
| 234 | Examples | 279 | Examples |
| 235 | ======== | 280 | ======== |
| 236 | 281 | ||
| 237 | The test suite can be found here: | 282 | The test suite can be found here: |
| 238 | 283 | ||
| 239 | https://github.com/jthornber/thinp-test-suite | 284 | https://github.com/jthornber/device-mapper-test-suite |
| 240 | 285 | ||
| 241 | dmsetup create my_cache --table '0 41943040 cache /dev/mapper/metadata \ | 286 | dmsetup create my_cache --table '0 41943040 cache /dev/mapper/metadata \ |
| 242 | /dev/mapper/ssd /dev/mapper/origin 512 1 writeback default 0' | 287 | /dev/mapper/ssd /dev/mapper/origin 512 1 writeback default 0' |
