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220 files changed, 0 insertions, 28837 deletions
diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX index bd7e2d08d790..b56b88e20196 100644 --- a/Documentation/00-INDEX +++ b/Documentation/00-INDEX | |||
@@ -172,8 +172,6 @@ fmc/ | |||
172 | - information about the FMC bus abstraction | 172 | - information about the FMC bus abstraction |
173 | fpga/ | 173 | fpga/ |
174 | - FPGA Manager Core. | 174 | - FPGA Manager Core. |
175 | frv/ | ||
176 | - Fujitsu FR-V Linux documentation. | ||
177 | futex-requeue-pi.txt | 175 | futex-requeue-pi.txt |
178 | - info on requeueing of tasks from a non-PI futex to a PI futex | 176 | - info on requeueing of tasks from a non-PI futex to a PI futex |
179 | gcc-plugins.txt | 177 | gcc-plugins.txt |
diff --git a/Documentation/frv/README.txt b/Documentation/frv/README.txt deleted file mode 100644 index a984faa968e8..000000000000 --- a/Documentation/frv/README.txt +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | ================================ | ||
2 | Fujitsu FR-V LINUX DOCUMENTATION | ||
3 | ================================ | ||
4 | |||
5 | This directory contains documentation for the Fujitsu FR-V CPU architecture | ||
6 | port of Linux. | ||
7 | |||
8 | The following documents are available: | ||
9 | |||
10 | (*) features.txt | ||
11 | |||
12 | A description of the basic features inherent in this architecture port. | ||
13 | |||
14 | |||
15 | (*) configuring.txt | ||
16 | |||
17 | A summary of the configuration options particular to this architecture. | ||
18 | |||
19 | |||
20 | (*) booting.txt | ||
21 | |||
22 | A description of how to boot the kernel image and a summary of the kernel | ||
23 | command line options. | ||
24 | |||
25 | |||
26 | (*) gdbstub.txt | ||
27 | |||
28 | A description of how to debug the kernel using GDB attached by serial | ||
29 | port, and a summary of the services available. | ||
30 | |||
31 | |||
32 | (*) mmu-layout.txt | ||
33 | |||
34 | A description of the virtual and physical memory layout used in the | ||
35 | MMU linux kernel, and the registers used to support it. | ||
36 | |||
37 | |||
38 | (*) gdbinit | ||
39 | |||
40 | An example .gdbinit file for use with GDB. It includes macros for viewing | ||
41 | MMU state on the FR451. See mmu-layout.txt for more information. | ||
42 | |||
43 | |||
44 | (*) clock.txt | ||
45 | |||
46 | A description of the CPU clock scaling interface. | ||
47 | |||
48 | |||
49 | (*) atomic-ops.txt | ||
50 | |||
51 | A description of how the FR-V kernel's atomic operations work. | ||
diff --git a/Documentation/frv/atomic-ops.txt b/Documentation/frv/atomic-ops.txt deleted file mode 100644 index 96638e9b9fe0..000000000000 --- a/Documentation/frv/atomic-ops.txt +++ /dev/null | |||
@@ -1,134 +0,0 @@ | |||
1 | ===================================== | ||
2 | FUJITSU FR-V KERNEL ATOMIC OPERATIONS | ||
3 | ===================================== | ||
4 | |||
5 | On the FR-V CPUs, there is only one atomic Read-Modify-Write operation: the SWAP/SWAPI | ||
6 | instruction. Unfortunately, this alone can't be used to implement the following operations: | ||
7 | |||
8 | (*) Atomic add to memory | ||
9 | |||
10 | (*) Atomic subtract from memory | ||
11 | |||
12 | (*) Atomic bit modification (set, clear or invert) | ||
13 | |||
14 | (*) Atomic compare and exchange | ||
15 | |||
16 | On such CPUs, the standard way of emulating such operations in uniprocessor mode is to disable | ||
17 | interrupts, but on the FR-V CPUs, modifying the PSR takes a lot of clock cycles, and it has to be | ||
18 | done twice. This means the CPU runs for a relatively long time with interrupts disabled, | ||
19 | potentially having a great effect on interrupt latency. | ||
20 | |||
21 | |||
22 | ============= | ||
23 | NEW ALGORITHM | ||
24 | ============= | ||
25 | |||
26 | To get around this, the following algorithm has been implemented. It operates in a way similar to | ||
27 | the LL/SC instruction pairs supported on a number of platforms. | ||
28 | |||
29 | (*) The CCCR.CC3 register is reserved within the kernel to act as an atomic modify abort flag. | ||
30 | |||
31 | (*) In the exception prologues run on kernel->kernel entry, CCCR.CC3 is set to 0 (Undefined | ||
32 | state). | ||
33 | |||
34 | (*) All atomic operations can then be broken down into the following algorithm: | ||
35 | |||
36 | (1) Set ICC3.Z to true and set CC3 to True (ORCC/CKEQ/ORCR). | ||
37 | |||
38 | (2) Load the value currently in the memory to be modified into a register. | ||
39 | |||
40 | (3) Make changes to the value. | ||
41 | |||
42 | (4) If CC3 is still True, simultaneously and atomically (by VLIW packing): | ||
43 | |||
44 | (a) Store the modified value back to memory. | ||
45 | |||
46 | (b) Set ICC3.Z to false (CORCC on GR29 is sufficient for this - GR29 holds the current | ||
47 | task pointer in the kernel, and so is guaranteed to be non-zero). | ||
48 | |||
49 | (5) If ICC3.Z is still true, go back to step (1). | ||
50 | |||
51 | This works in a non-SMP environment because any interrupt or other exception that happens between | ||
52 | steps (1) and (4) will set CC3 to the Undefined, thus aborting the store in (4a), and causing the | ||
53 | condition in ICC3 to remain with the Z flag set, thus causing step (5) to loop back to step (1). | ||
54 | |||
55 | |||
56 | This algorithm suffers from two problems: | ||
57 | |||
58 | (1) The condition CCCR.CC3 is cleared unconditionally by an exception, irrespective of whether or | ||
59 | not any changes were made to the target memory location during that exception. | ||
60 | |||
61 | (2) The branch from step (5) back to step (1) may have to happen more than once until the store | ||
62 | manages to take place. In theory, this loop could cycle forever because there are too many | ||
63 | interrupts coming in, but it's unlikely. | ||
64 | |||
65 | |||
66 | ======= | ||
67 | EXAMPLE | ||
68 | ======= | ||
69 | |||
70 | Taking an example from include/asm-frv/atomic.h: | ||
71 | |||
72 | static inline int atomic_add_return(int i, atomic_t *v) | ||
73 | { | ||
74 | unsigned long val; | ||
75 | |||
76 | asm("0: \n" | ||
77 | |||
78 | It starts by setting ICC3.Z to true for later use, and also transforming that into CC3 being in the | ||
79 | True state. | ||
80 | |||
81 | " orcc gr0,gr0,gr0,icc3 \n" <-- (1) | ||
82 | " ckeq icc3,cc7 \n" <-- (1) | ||
83 | |||
84 | Then it does the load. Note that the final phase of step (1) is done at the same time as the | ||
85 | load. The VLIW packing ensures they are done simultaneously. The ".p" on the load must not be | ||
86 | removed without swapping the order of these two instructions. | ||
87 | |||
88 | " ld.p %M0,%1 \n" <-- (2) | ||
89 | " orcr cc7,cc7,cc3 \n" <-- (1) | ||
90 | |||
91 | Then the proposed modification is generated. Note that the old value can be retained if required | ||
92 | (such as in test_and_set_bit()). | ||
93 | |||
94 | " add%I2 %1,%2,%1 \n" <-- (3) | ||
95 | |||
96 | Then it attempts to store the value back, contingent on no exception having cleared CC3 since it | ||
97 | was set to True. | ||
98 | |||
99 | " cst.p %1,%M0 ,cc3,#1 \n" <-- (4a) | ||
100 | |||
101 | It simultaneously records the success or failure of the store in ICC3.Z. | ||
102 | |||
103 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" <-- (4b) | ||
104 | |||
105 | Such that the branch can then be taken if the operation was aborted. | ||
106 | |||
107 | " beq icc3,#0,0b \n" <-- (5) | ||
108 | : "+U"(v->counter), "=&r"(val) | ||
109 | : "NPr"(i) | ||
110 | : "memory", "cc7", "cc3", "icc3" | ||
111 | ); | ||
112 | |||
113 | return val; | ||
114 | } | ||
115 | |||
116 | |||
117 | ============= | ||
118 | CONFIGURATION | ||
119 | ============= | ||
120 | |||
121 | The atomic ops implementation can be made inline or out-of-line by changing the | ||
122 | CONFIG_FRV_OUTOFLINE_ATOMIC_OPS configuration variable. Making it out-of-line has a number of | ||
123 | advantages: | ||
124 | |||
125 | - The resulting kernel image may be smaller | ||
126 | - Debugging is easier as atomic ops can just be stepped over and they can be breakpointed | ||
127 | |||
128 | Keeping it inline also has a number of advantages: | ||
129 | |||
130 | - The resulting kernel may be Faster | ||
131 | - no out-of-line function calls need to be made | ||
132 | - the compiler doesn't have half its registers clobbered by making a call | ||
133 | |||
134 | The out-of-line implementations live in arch/frv/lib/atomic-ops.S. | ||
diff --git a/Documentation/frv/booting.txt b/Documentation/frv/booting.txt deleted file mode 100644 index cd9dc1dfb144..000000000000 --- a/Documentation/frv/booting.txt +++ /dev/null | |||
@@ -1,182 +0,0 @@ | |||
1 | ========================= | ||
2 | BOOTING FR-V LINUX KERNEL | ||
3 | ========================= | ||
4 | |||
5 | ====================== | ||
6 | PROVIDING A FILESYSTEM | ||
7 | ====================== | ||
8 | |||
9 | First of all, a root filesystem must be made available. This can be done in | ||
10 | one of two ways: | ||
11 | |||
12 | (1) NFS Export | ||
13 | |||
14 | A filesystem should be constructed in a directory on an NFS server that | ||
15 | the target board can reach. This directory should then be NFS exported | ||
16 | such that the target board can read and write into it as root. | ||
17 | |||
18 | (2) Flash Filesystem (JFFS2 Recommended) | ||
19 | |||
20 | In this case, the image must be stored or built up on flash before it | ||
21 | can be used. A complete image can be built using the mkfs.jffs2 or | ||
22 | similar program and then downloaded and stored into flash by RedBoot. | ||
23 | |||
24 | |||
25 | ======================== | ||
26 | LOADING THE KERNEL IMAGE | ||
27 | ======================== | ||
28 | |||
29 | The kernel will need to be loaded into RAM by RedBoot (or by some alternative | ||
30 | boot loader) before it can be run. The kernel image (arch/frv/boot/Image) may | ||
31 | be loaded in one of three ways: | ||
32 | |||
33 | (1) Load from Flash | ||
34 | |||
35 | This is the simplest. RedBoot can store an image in the flash (see the | ||
36 | RedBoot documentation) and then load it back into RAM. RedBoot keeps | ||
37 | track of the load address, entry point and size, so the command to do | ||
38 | this is simply: | ||
39 | |||
40 | fis load linux | ||
41 | |||
42 | The image is then ready to be executed. | ||
43 | |||
44 | (2) Load by TFTP | ||
45 | |||
46 | The following command will download a raw binary kernel image from the | ||
47 | default server (as negotiated by BOOTP) and store it into RAM: | ||
48 | |||
49 | load -b 0x00100000 -r /tftpboot/image.bin | ||
50 | |||
51 | The image is then ready to be executed. | ||
52 | |||
53 | (3) Load by Y-Modem | ||
54 | |||
55 | The following command will download a raw binary kernel image across the | ||
56 | serial port that RedBoot is currently using: | ||
57 | |||
58 | load -m ymodem -b 0x00100000 -r zImage | ||
59 | |||
60 | The serial client (such as minicom) must then be told to transmit the | ||
61 | program by Y-Modem. | ||
62 | |||
63 | When finished, the image will then be ready to be executed. | ||
64 | |||
65 | |||
66 | ================== | ||
67 | BOOTING THE KERNEL | ||
68 | ================== | ||
69 | |||
70 | Boot the image with the following RedBoot command: | ||
71 | |||
72 | exec -c "<CMDLINE>" 0x00100000 | ||
73 | |||
74 | For example: | ||
75 | |||
76 | exec -c "console=ttySM0,115200 ip=:::::dhcp root=/dev/mtdblock2 rw" | ||
77 | |||
78 | This will start the kernel running. Note that if the GDB-stub is compiled in, | ||
79 | then the kernel will immediately wait for GDB to connect over serial before | ||
80 | doing anything else. See the section on kernel debugging with GDB. | ||
81 | |||
82 | The kernel command line <CMDLINE> tells the kernel where its console is and | ||
83 | how to find its root filesystem. This is made up of the following components, | ||
84 | separated by spaces: | ||
85 | |||
86 | (*) console=ttyS<x>[,<baud>[<parity>[<bits>[<flow>]]]] | ||
87 | |||
88 | This specifies that the system console should output through on-chip | ||
89 | serial port <x> (which can be "0" or "1"). | ||
90 | |||
91 | <baud> is a standard baud rate between 1200 and 115200 (default 9600). | ||
92 | |||
93 | <parity> is a parity setting of "N", "O", "E", "M" or "S" for None, Odd, | ||
94 | Even, Mark or Space. "None" is the default. | ||
95 | |||
96 | <stop> is "7" or "8" for the number of bits per character. "8" is the | ||
97 | default. | ||
98 | |||
99 | <flow> is "r" to use flow control (XCTS on serial port 2 only). The | ||
100 | default is to not use flow control. | ||
101 | |||
102 | For example: | ||
103 | |||
104 | console=ttyS0,115200 | ||
105 | |||
106 | To use the first on-chip serial port at baud rate 115200, no parity, 8 | ||
107 | bits, and no flow control. | ||
108 | |||
109 | (*) root=<xxxx> | ||
110 | |||
111 | This specifies the device upon which the root filesystem resides. It | ||
112 | may be specified by major and minor number, device path, or even | ||
113 | partition uuid, if supported. For example: | ||
114 | |||
115 | /dev/nfs NFS root filesystem | ||
116 | /dev/mtdblock3 Fourth RedBoot partition on the System Flash | ||
117 | PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF/PARTNROFF=1 | ||
118 | first partition after the partition with the given UUID | ||
119 | 253:0 Device with major 253 and minor 0 | ||
120 | |||
121 | Authoritative information can be found in | ||
122 | "Documentation/admin-guide/kernel-parameters.rst". | ||
123 | |||
124 | (*) rw | ||
125 | |||
126 | Start with the root filesystem mounted Read/Write. | ||
127 | |||
128 | The remaining components are all optional: | ||
129 | |||
130 | (*) ip=<ip>::::<host>:<iface>:<cfg> | ||
131 | |||
132 | Configure the network interface. If <cfg> is "off" then <ip> should | ||
133 | specify the IP address for the network device <iface>. <host> provide | ||
134 | the hostname for the device. | ||
135 | |||
136 | If <cfg> is "bootp" or "dhcp", then all of these parameters will be | ||
137 | discovered by consulting a BOOTP or DHCP server. | ||
138 | |||
139 | For example, the following might be used: | ||
140 | |||
141 | ip=192.168.73.12::::frv:eth0:off | ||
142 | |||
143 | This sets the IP address on the VDK motherboard RTL8029 ethernet chipset | ||
144 | (eth0) to be 192.168.73.12, and sets the board's hostname to be "frv". | ||
145 | |||
146 | (*) nfsroot=<server>:<dir>[,v<vers>] | ||
147 | |||
148 | This is mandatory if "root=/dev/nfs" is given as an option. It tells the | ||
149 | kernel the IP address of the NFS server providing its root filesystem, | ||
150 | and the pathname on that server of the filesystem. | ||
151 | |||
152 | The NFS version to use can also be specified. v2 and v3 are supported by | ||
153 | Linux. | ||
154 | |||
155 | For example: | ||
156 | |||
157 | nfsroot=192.168.73.1:/nfsroot-frv | ||
158 | |||
159 | (*) profile=1 | ||
160 | |||
161 | Turns on the kernel profiler (accessible through /proc/profile). | ||
162 | |||
163 | (*) console=gdb0 | ||
164 | |||
165 | This can be used as an alternative to the "console=ttyS..." listed | ||
166 | above. I tells the kernel to pass the console output to GDB if the | ||
167 | gdbstub is compiled in to the kernel. | ||
168 | |||
169 | If this is used, then the gdbstub passes the text to GDB, which then | ||
170 | simply dumps it to its standard output. | ||
171 | |||
172 | (*) mem=<xxx>M | ||
173 | |||
174 | Normally the kernel will work out how much SDRAM it has by reading the | ||
175 | SDRAM controller registers. That can be overridden with this | ||
176 | option. This allows the kernel to be told that it has <xxx> megabytes of | ||
177 | memory available. | ||
178 | |||
179 | (*) init=<prog> [<arg> [<arg> [<arg> ...]]] | ||
180 | |||
181 | This tells the kernel what program to run initially. By default this is | ||
182 | /sbin/init, but /sbin/sash or /bin/sh are common alternatives. | ||
diff --git a/Documentation/frv/clock.txt b/Documentation/frv/clock.txt deleted file mode 100644 index c72d350e177a..000000000000 --- a/Documentation/frv/clock.txt +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | Clock scaling | ||
2 | ------------- | ||
3 | |||
4 | The kernel supports scaling of CLCK.CMODE, CLCK.CM and CLKC.P0 clock | ||
5 | registers. If built with CONFIG_PM and CONFIG_SYSCTL options enabled, four | ||
6 | extra files will appear in the directory /proc/sys/pm/. Reading these files | ||
7 | will show: | ||
8 | |||
9 | p0 -- current value of the P0 bit in CLKC register. | ||
10 | cm -- current value of the CM bits in CLKC register. | ||
11 | cmode -- current value of the CMODE bits in CLKC register. | ||
12 | |||
13 | On all boards, the 'p0' file should also be writable, and either '1' or '0' | ||
14 | can be rewritten, to set or clear the CLKC_P0 bit respectively, hence | ||
15 | controlling whether the resource bus rate clock is halved. | ||
16 | |||
17 | The 'cm' file should also be available on all boards. '0' can be written to it | ||
18 | to shift the board into High-Speed mode (normal), and '1' can be written to | ||
19 | shift the board into Medium-Speed mode. Selecting Low-Speed mode is not | ||
20 | supported by this interface, even though some CPUs do support it. | ||
21 | |||
22 | On the boards with FR405 CPU (i.e. CB60 and CB70), the 'cmode' file is also | ||
23 | writable, allowing the CPU core speed (and other clock speeds) to be | ||
24 | controlled from userspace. | ||
25 | |||
26 | |||
27 | Determining current and possible settings | ||
28 | ----------------------------------------- | ||
29 | |||
30 | The current state and the available masks can be found in /proc/cpuinfo. For | ||
31 | example, on the CB70: | ||
32 | |||
33 | # cat /proc/cpuinfo | ||
34 | CPU-Series: fr400 | ||
35 | CPU-Core: fr405, gr0-31, BE, CCCR | ||
36 | CPU: mb93405 | ||
37 | MMU: Prot | ||
38 | FP-Media: fr0-31, Media | ||
39 | System: mb93091-cb70, mb93090-mb00 | ||
40 | PM-Controls: cmode=0xd31f, cm=0x3, p0=0x3, suspend=0x9 | ||
41 | PM-Status: cmode=3, cm=0, p0=0 | ||
42 | Clock-In: 50.00 MHz | ||
43 | Clock-Core: 300.00 MHz | ||
44 | Clock-SDRAM: 100.00 MHz | ||
45 | Clock-CBus: 100.00 MHz | ||
46 | Clock-Res: 50.00 MHz | ||
47 | Clock-Ext: 50.00 MHz | ||
48 | Clock-DSU: 25.00 MHz | ||
49 | BogoMips: 300.00 | ||
50 | |||
51 | And on the PDK, the PM lines look like the following: | ||
52 | |||
53 | PM-Controls: cm=0x3, p0=0x3, suspend=0x9 | ||
54 | PM-Status: cmode=9, cm=0, p0=0 | ||
55 | |||
56 | The PM-Controls line, if present, will indicate which /proc/sys/pm files can | ||
57 | be set to what values. The specification values are bitmasks; so, for example, | ||
58 | "suspend=0x9" indicates that 0 and 3 can be written validly to | ||
59 | /proc/sys/pm/suspend. | ||
60 | |||
61 | The PM-Controls line will only be present if CONFIG_PM is configured to Y. | ||
62 | |||
63 | The PM-Status line indicates which clock controls are set to which value. If | ||
64 | the file can be read, then the suspend value must be 0, and so that's not | ||
65 | included. | ||
diff --git a/Documentation/frv/configuring.txt b/Documentation/frv/configuring.txt deleted file mode 100644 index 36e76a2336fa..000000000000 --- a/Documentation/frv/configuring.txt +++ /dev/null | |||
@@ -1,125 +0,0 @@ | |||
1 | ======================================= | ||
2 | FUJITSU FR-V LINUX KERNEL CONFIGURATION | ||
3 | ======================================= | ||
4 | |||
5 | ===================== | ||
6 | CONFIGURATION OPTIONS | ||
7 | ===================== | ||
8 | |||
9 | The most important setting is in the "MMU support options" tab (the first | ||
10 | presented in the configuration tools available): | ||
11 | |||
12 | (*) "Kernel Type" | ||
13 | |||
14 | This options allows selection of normal, MMU-requiring linux, and uClinux | ||
15 | (which doesn't require an MMU and doesn't have inter-process protection). | ||
16 | |||
17 | There are a number of settings in the "Processor type and features" section of | ||
18 | the kernel configuration that need to be considered. | ||
19 | |||
20 | (*) "CPU" | ||
21 | |||
22 | The register and instruction sets at the core of the processor. This can | ||
23 | only be set to "FR40x/45x/55x" at the moment - but this permits usage of | ||
24 | the kernel with MB93091 CB10, CB11, CB30, CB41, CB60, CB70 and CB451 | ||
25 | CPU boards, and with the MB93093 PDK board. | ||
26 | |||
27 | (*) "System" | ||
28 | |||
29 | This option allows a choice of basic system. This governs the peripherals | ||
30 | that are expected to be available. | ||
31 | |||
32 | (*) "Motherboard" | ||
33 | |||
34 | This specifies the type of motherboard being used, and the peripherals | ||
35 | upon it. Currently only "MB93090-MB00" can be set here. | ||
36 | |||
37 | (*) "Default cache-write mode" | ||
38 | |||
39 | This controls the initial data cache write management mode. By default | ||
40 | Write-Through is selected, but Write-Back (Copy-Back) can also be | ||
41 | selected. This can be changed dynamically once the kernel is running (see | ||
42 | features.txt). | ||
43 | |||
44 | There are some architecture specific configuration options in the "General | ||
45 | Setup" section of the kernel configuration too: | ||
46 | |||
47 | (*) "Reserve memory uncached for (PCI) DMA" | ||
48 | |||
49 | This requests that a uClinux kernel set aside some memory in an uncached | ||
50 | window for the use as consistent DMA memory (mainly for PCI). At least a | ||
51 | megabyte will be allocated in this way, possibly more. Any memory so | ||
52 | reserved will not be available for normal allocations. | ||
53 | |||
54 | (*) "Kernel support for ELF-FDPIC binaries" | ||
55 | |||
56 | This enables the binary-format driver for the new FDPIC ELF binaries that | ||
57 | this platform normally uses. These binaries are totally relocatable - | ||
58 | their separate sections can relocated independently, allowing them to be | ||
59 | shared on uClinux where possible. This should normally be enabled. | ||
60 | |||
61 | (*) "Kernel image protection" | ||
62 | |||
63 | This makes the protection register governing access to the core kernel | ||
64 | image prohibit access by userspace programs. This option is available on | ||
65 | uClinux only. | ||
66 | |||
67 | There are also a number of settings in the "Kernel Hacking" section of the | ||
68 | kernel configuration especially for debugging a kernel on this | ||
69 | architecture. See the "gdbstub.txt" file for information about those. | ||
70 | |||
71 | |||
72 | ====================== | ||
73 | DEFAULT CONFIGURATIONS | ||
74 | ====================== | ||
75 | |||
76 | The kernel sources include a number of example default configurations: | ||
77 | |||
78 | (*) defconfig-mb93091 | ||
79 | |||
80 | Default configuration for the MB93091-VDK with both CPU board and | ||
81 | MB93090-MB00 motherboard running uClinux. | ||
82 | |||
83 | |||
84 | (*) defconfig-mb93091-fb | ||
85 | |||
86 | Default configuration for the MB93091-VDK with CPU board, | ||
87 | MB93090-MB00 motherboard, and DAV board running uClinux. | ||
88 | Includes framebuffer driver. | ||
89 | |||
90 | |||
91 | (*) defconfig-mb93093 | ||
92 | |||
93 | Default configuration for the MB93093-PDK board running uClinux. | ||
94 | |||
95 | |||
96 | (*) defconfig-cb70-standalone | ||
97 | |||
98 | Default configuration for the MB93091-VDK with only CB70 CPU board | ||
99 | running uClinux. This will use the CB70's DM9000 for network access. | ||
100 | |||
101 | |||
102 | (*) defconfig-mmu | ||
103 | |||
104 | Default configuration for the MB93091-VDK with both CB451 CPU board and | ||
105 | MB93090-MB00 motherboard running MMU linux. | ||
106 | |||
107 | (*) defconfig-mmu-audio | ||
108 | |||
109 | Default configuration for the MB93091-VDK with CB451 CPU board, DAV | ||
110 | board, and MB93090-MB00 motherboard running MMU linux. Includes | ||
111 | audio driver. | ||
112 | |||
113 | (*) defconfig-mmu-fb | ||
114 | |||
115 | Default configuration for the MB93091-VDK with CB451 CPU board, DAV | ||
116 | board, and MB93090-MB00 motherboard running MMU linux. Includes | ||
117 | framebuffer driver. | ||
118 | |||
119 | (*) defconfig-mmu-standalone | ||
120 | |||
121 | Default configuration for the MB93091-VDK with only CB451 CPU board | ||
122 | running MMU linux. | ||
123 | |||
124 | |||
125 | |||
diff --git a/Documentation/frv/features.txt b/Documentation/frv/features.txt deleted file mode 100644 index fa20c0e72833..000000000000 --- a/Documentation/frv/features.txt +++ /dev/null | |||
@@ -1,310 +0,0 @@ | |||
1 | =========================== | ||
2 | FUJITSU FR-V LINUX FEATURES | ||
3 | =========================== | ||
4 | |||
5 | This kernel port has a number of features of which the user should be aware: | ||
6 | |||
7 | (*) Linux and uClinux | ||
8 | |||
9 | The FR-V architecture port supports both normal MMU linux and uClinux out | ||
10 | of the same sources. | ||
11 | |||
12 | |||
13 | (*) CPU support | ||
14 | |||
15 | Support for the FR401, FR403, FR405, FR451 and FR555 CPUs should work with | ||
16 | the same uClinux kernel configuration. | ||
17 | |||
18 | In normal (MMU) Linux mode, only the FR451 CPU will work as that is the | ||
19 | only one with a suitably featured CPU. | ||
20 | |||
21 | The kernel is written and compiled with the assumption that only the | ||
22 | bottom 32 GR registers and no FR registers will be used by the kernel | ||
23 | itself, however all extra userspace registers will be saved on context | ||
24 | switch. Note that since most CPUs can't support lazy switching, no attempt | ||
25 | is made to do lazy register saving where that would be possible (FR555 | ||
26 | only currently). | ||
27 | |||
28 | |||
29 | (*) Board support | ||
30 | |||
31 | The board on which the kernel will run can be configured on the "Processor | ||
32 | type and features" configuration tab. | ||
33 | |||
34 | Set the System to "MB93093-PDK" to boot from the MB93093 (FR403) PDK. | ||
35 | |||
36 | Set the System to "MB93091-VDK" to boot from the CB11, CB30, CB41, CB60, | ||
37 | CB70 or CB451 VDK boards. Set the Motherboard setting to "MB93090-MB00" to | ||
38 | boot with the standard ATA90590B VDK motherboard, and set it to "None" to | ||
39 | boot without any motherboard. | ||
40 | |||
41 | |||
42 | (*) Binary Formats | ||
43 | |||
44 | The only userspace binary format supported is FDPIC ELF. Normal ELF, FLAT | ||
45 | and AOUT binaries are not supported for this architecture. | ||
46 | |||
47 | FDPIC ELF supports shared library and program interpreter facilities. | ||
48 | |||
49 | |||
50 | (*) Scheduler Speed | ||
51 | |||
52 | The kernel scheduler runs at 100Hz irrespective of the clock speed on this | ||
53 | architecture. This value is set in asm/param.h (see the HZ macro defined | ||
54 | there). | ||
55 | |||
56 | |||
57 | (*) Normal (MMU) Linux Memory Layout. | ||
58 | |||
59 | See mmu-layout.txt in this directory for a description of the normal linux | ||
60 | memory layout | ||
61 | |||
62 | See include/asm-frv/mem-layout.h for constants pertaining to the memory | ||
63 | layout. | ||
64 | |||
65 | See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus | ||
66 | controller configuration. | ||
67 | |||
68 | |||
69 | (*) uClinux Memory Layout | ||
70 | |||
71 | The memory layout used by the uClinux kernel is as follows: | ||
72 | |||
73 | 0x00000000 - 0x00000FFF Null pointer catch page | ||
74 | 0x20000000 - 0x200FFFFF CS2# [PDK] FPGA | ||
75 | 0xC0000000 - 0xCFFFFFFF SDRAM | ||
76 | 0xC0000000 Base of Linux kernel image | ||
77 | 0xE0000000 - 0xEFFFFFFF CS2# [VDK] SLBUS/PCI window | ||
78 | 0xF0000000 - 0xF0FFFFFF CS5# MB93493 CSC area (DAV daughter board) | ||
79 | 0xF1000000 - 0xF1FFFFFF CS7# [CB70/CB451] CPU-card PCMCIA port space | ||
80 | 0xFC000000 - 0xFC0FFFFF CS1# [VDK] MB86943 config space | ||
81 | 0xFC100000 - 0xFC1FFFFF CS6# [CB70/CB451] CPU-card DM9000 NIC space | ||
82 | 0xFC100000 - 0xFC1FFFFF CS6# [PDK] AX88796 NIC space | ||
83 | 0xFC200000 - 0xFC2FFFFF CS3# MB93493 CSR area (DAV daughter board) | ||
84 | 0xFD000000 - 0xFDFFFFFF CS4# [CB70/CB451] CPU-card extra flash space | ||
85 | 0xFE000000 - 0xFEFFFFFF Internal CPU peripherals | ||
86 | 0xFF000000 - 0xFF1FFFFF CS0# Flash 1 | ||
87 | 0xFF200000 - 0xFF3FFFFF CS0# Flash 2 | ||
88 | 0xFFC00000 - 0xFFC0001F CS0# [VDK] FPGA | ||
89 | |||
90 | The kernel reads the size of the SDRAM from the memory bus controller | ||
91 | registers by default. | ||
92 | |||
93 | The kernel initialisation code (1) adjusts the SDRAM base addresses to | ||
94 | move the SDRAM to desired address, (2) moves the kernel image down to the | ||
95 | bottom of SDRAM, (3) adjusts the bus controller registers to move I/O | ||
96 | windows, and (4) rearranges the protection registers to protect all of | ||
97 | this. | ||
98 | |||
99 | The reasons for doing this are: (1) the page at address 0 should be | ||
100 | inaccessible so that NULL pointer errors can be caught; and (2) the bottom | ||
101 | three quarters are left unoccupied so that an FR-V CPU with an MMU can use | ||
102 | it for virtual userspace mappings. | ||
103 | |||
104 | See include/asm-frv/mem-layout.h for constants pertaining to the memory | ||
105 | layout. | ||
106 | |||
107 | See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus | ||
108 | controller configuration. | ||
109 | |||
110 | |||
111 | (*) uClinux Memory Protection | ||
112 | |||
113 | A DAMPR register is used to cover the entire region used for I/O | ||
114 | (0xE0000000 - 0xFFFFFFFF). This permits the kernel to make uncached | ||
115 | accesses to this region. Userspace is not permitted to access it. | ||
116 | |||
117 | The DAMPR/IAMPR protection registers not in use for any other purpose are | ||
118 | tiled over the top of the SDRAM such that: | ||
119 | |||
120 | (1) The core kernel image is covered by as small a tile as possible | ||
121 | granting only the kernel access to the underlying data, whilst | ||
122 | making sure no SDRAM is actually made unavailable by this approach. | ||
123 | |||
124 | (2) All other tiles are arranged to permit userspace access to the rest | ||
125 | of the SDRAM. | ||
126 | |||
127 | Barring point (1), there is nothing to protect kernel data against | ||
128 | userspace damage - but this is uClinux. | ||
129 | |||
130 | |||
131 | (*) Exceptions and Fixups | ||
132 | |||
133 | Since the FR40x and FR55x CPUs that do not have full MMUs generate | ||
134 | imprecise data error exceptions, there are currently no automatic fixup | ||
135 | services available in uClinux. This includes misaligned memory access | ||
136 | fixups. | ||
137 | |||
138 | Userspace EFAULT errors can be trapped by issuing a MEMBAR instruction and | ||
139 | forcing the fault to happen there. | ||
140 | |||
141 | On the FR451, however, data exceptions are mostly precise, and so | ||
142 | exception fixup handling is implemented as normal. | ||
143 | |||
144 | |||
145 | (*) Userspace Breakpoints | ||
146 | |||
147 | The ptrace() system call supports the following userspace debugging | ||
148 | features: | ||
149 | |||
150 | (1) Hardware assisted single step. | ||
151 | |||
152 | (2) Breakpoint via the FR-V "BREAK" instruction. | ||
153 | |||
154 | (3) Breakpoint via the FR-V "TIRA GR0, #1" instruction. | ||
155 | |||
156 | (4) Syscall entry/exit trap. | ||
157 | |||
158 | Each of the above generates a SIGTRAP. | ||
159 | |||
160 | |||
161 | (*) On-Chip Serial Ports | ||
162 | |||
163 | The FR-V on-chip serial ports are made available as ttyS0 and ttyS1. Note | ||
164 | that if the GDB stub is compiled in, ttyS1 will not actually be available | ||
165 | as it will be being used for the GDB stub. | ||
166 | |||
167 | These ports can be made by: | ||
168 | |||
169 | mknod /dev/ttyS0 c 4 64 | ||
170 | mknod /dev/ttyS1 c 4 65 | ||
171 | |||
172 | |||
173 | (*) Maskable Interrupts | ||
174 | |||
175 | Level 15 (Non-maskable) interrupts are dealt with by the GDB stub if | ||
176 | present, and cause a panic if not. If the GDB stub is present, ttyS1's | ||
177 | interrupts are rated at level 15. | ||
178 | |||
179 | All other interrupts are distributed over the set of available priorities | ||
180 | so that no IRQs are shared where possible. The arch interrupt handling | ||
181 | routines attempt to disentangle the various sources available through the | ||
182 | CPU's own multiplexor, and those on off-CPU peripherals. | ||
183 | |||
184 | |||
185 | (*) Accessing PCI Devices | ||
186 | |||
187 | Where PCI is available, care must be taken when dealing with drivers that | ||
188 | access PCI devices. PCI devices present their data in little-endian form, | ||
189 | but the CPU sees it in big-endian form. The macros in asm/io.h try to get | ||
190 | this right, but may not under all circumstances... | ||
191 | |||
192 | |||
193 | (*) Ax88796 Ethernet Driver | ||
194 | |||
195 | The MB93093 PDK board has an Ax88796 ethernet chipset (an NE2000 clone). A | ||
196 | driver has been written to deal specifically with this. The driver | ||
197 | provides MII services for the card. | ||
198 | |||
199 | The driver can be configured by running make xconfig, and going to: | ||
200 | |||
201 | (*) Network device support | ||
202 | - turn on "Network device support" | ||
203 | (*) Ethernet (10 or 100Mbit) | ||
204 | - turn on "Ethernet (10 or 100Mbit)" | ||
205 | - turn on "AX88796 NE2000 compatible chipset" | ||
206 | |||
207 | The driver can be found in: | ||
208 | |||
209 | drivers/net/ax88796.c | ||
210 | include/asm/ax88796.h | ||
211 | |||
212 | |||
213 | (*) WorkRAM Driver | ||
214 | |||
215 | This driver provides a character device that permits access to the WorkRAM | ||
216 | that can be found on the FR451 CPU. Each page is accessible through a | ||
217 | separate minor number, thereby permitting each page to have its own | ||
218 | filesystem permissions set on the device file. | ||
219 | |||
220 | The device files should be: | ||
221 | |||
222 | mknod /dev/frv/workram0 c 240 0 | ||
223 | mknod /dev/frv/workram1 c 240 1 | ||
224 | mknod /dev/frv/workram2 c 240 2 | ||
225 | ... | ||
226 | |||
227 | The driver will not permit the opening of any device file that does not | ||
228 | correspond to at least a partial page of WorkRAM. So the first device file | ||
229 | is the only one available on the FR451. If any other CPU is detected, none | ||
230 | of the devices will be openable. | ||
231 | |||
232 | The devices can be accessed with read, write and llseek, and can also be | ||
233 | mmapped. If they're mmapped, they will only map at the appropriate | ||
234 | 0x7e8nnnnn address on linux and at the 0xfe8nnnnn address on uClinux. If | ||
235 | MAP_FIXED is not specified, the appropriate address will be chosen anyway. | ||
236 | |||
237 | The mappings must be MAP_SHARED not MAP_PRIVATE, and must not be | ||
238 | PROT_EXEC. They must also start at file offset 0, and must not be longer | ||
239 | than one page in size. | ||
240 | |||
241 | This driver can be configured by running make xconfig, and going to: | ||
242 | |||
243 | (*) Character devices | ||
244 | - turn on "Fujitsu FR-V CPU WorkRAM support" | ||
245 | |||
246 | |||
247 | (*) Dynamic data cache write mode changing | ||
248 | |||
249 | It is possible to view and to change the data cache's write mode through | ||
250 | the /proc/sys/frv/cache-mode file while the kernel is running. There are | ||
251 | two modes available: | ||
252 | |||
253 | NAME MEANING | ||
254 | ===== ========================================== | ||
255 | wthru Data cache is in Write-Through mode | ||
256 | wback Data cache is in Write-Back/Copy-Back mode | ||
257 | |||
258 | To read the cache mode: | ||
259 | |||
260 | # cat /proc/sys/frv/cache-mode | ||
261 | wthru | ||
262 | |||
263 | To change the cache mode: | ||
264 | |||
265 | # echo wback >/proc/sys/frv/cache-mode | ||
266 | # cat /proc/sys/frv/cache-mode | ||
267 | wback | ||
268 | |||
269 | |||
270 | (*) MMU Context IDs and Pinning | ||
271 | |||
272 | On MMU Linux the CPU supports the concept of a context ID in its MMU to | ||
273 | make it more efficient (TLB entries are labelled with a context ID to link | ||
274 | them to specific tasks). | ||
275 | |||
276 | Normally once a context ID is allocated, it will remain affixed to a task | ||
277 | or CLONE_VM'd group of tasks for as long as it exists. However, since the | ||
278 | kernel is capable of supporting more tasks than there are possible ID | ||
279 | numbers, the kernel will pass context IDs from one task to another if | ||
280 | there are insufficient available. | ||
281 | |||
282 | The context ID currently in use by a task can be viewed in /proc: | ||
283 | |||
284 | # grep CXNR /proc/1/status | ||
285 | CXNR: 1 | ||
286 | |||
287 | Note that kernel threads do not have a userspace context, and so will not | ||
288 | show a CXNR entry in that file. | ||
289 | |||
290 | Under some circumstances, however, it is desirable to pin a context ID on | ||
291 | a process such that the kernel won't pass it on. This can be done by | ||
292 | writing the process ID of the target process to a special file: | ||
293 | |||
294 | # echo 17 >/proc/sys/frv/pin-cxnr | ||
295 | |||
296 | Reading from the file will then show the context ID pinned. | ||
297 | |||
298 | # cat /proc/sys/frv/pin-cxnr | ||
299 | 4 | ||
300 | |||
301 | The context ID will remain pinned as long as any process is using that | ||
302 | context, i.e.: when the all the subscribing processes have exited or | ||
303 | exec'd; or when an unpinning request happens: | ||
304 | |||
305 | # echo 0 >/proc/sys/frv/pin-cxnr | ||
306 | |||
307 | When there isn't a pinned context, the file shows -1: | ||
308 | |||
309 | # cat /proc/sys/frv/pin-cxnr | ||
310 | -1 | ||
diff --git a/Documentation/frv/gdbinit b/Documentation/frv/gdbinit deleted file mode 100644 index 51517b6f307f..000000000000 --- a/Documentation/frv/gdbinit +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | set remotebreak 1 | ||
2 | |||
3 | define _amr | ||
4 | |||
5 | printf "AMRx DAMR IAMR \n" | ||
6 | printf "==== ===================== =====================\n" | ||
7 | printf "amr0 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x0].L,__debug_mmu.damr[0x0].P,__debug_mmu.iamr[0x0].L,__debug_mmu.iamr[0x0].P | ||
8 | printf "amr1 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x1].L,__debug_mmu.damr[0x1].P,__debug_mmu.iamr[0x1].L,__debug_mmu.iamr[0x1].P | ||
9 | printf "amr2 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x2].L,__debug_mmu.damr[0x2].P,__debug_mmu.iamr[0x2].L,__debug_mmu.iamr[0x2].P | ||
10 | printf "amr3 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x3].L,__debug_mmu.damr[0x3].P,__debug_mmu.iamr[0x3].L,__debug_mmu.iamr[0x3].P | ||
11 | printf "amr4 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x4].L,__debug_mmu.damr[0x4].P,__debug_mmu.iamr[0x4].L,__debug_mmu.iamr[0x4].P | ||
12 | printf "amr5 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x5].L,__debug_mmu.damr[0x5].P,__debug_mmu.iamr[0x5].L,__debug_mmu.iamr[0x5].P | ||
13 | printf "amr6 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x6].L,__debug_mmu.damr[0x6].P,__debug_mmu.iamr[0x6].L,__debug_mmu.iamr[0x6].P | ||
14 | printf "amr7 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x7].L,__debug_mmu.damr[0x7].P,__debug_mmu.iamr[0x7].L,__debug_mmu.iamr[0x7].P | ||
15 | |||
16 | printf "amr8 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x8].L,__debug_mmu.damr[0x8].P | ||
17 | printf "amr9 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x9].L,__debug_mmu.damr[0x9].P | ||
18 | printf "amr10: L:%08lx P:%08lx\n",__debug_mmu.damr[0xa].L,__debug_mmu.damr[0xa].P | ||
19 | printf "amr11: L:%08lx P:%08lx\n",__debug_mmu.damr[0xb].L,__debug_mmu.damr[0xb].P | ||
20 | |||
21 | end | ||
22 | |||
23 | |||
24 | define _tlb | ||
25 | printf "tlb[0x00]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x0].L,__debug_mmu.tlb[0x0].P,__debug_mmu.tlb[0x40+0x0].L,__debug_mmu.tlb[0x40+0x0].P | ||
26 | printf "tlb[0x01]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1].L,__debug_mmu.tlb[0x1].P,__debug_mmu.tlb[0x40+0x1].L,__debug_mmu.tlb[0x40+0x1].P | ||
27 | printf "tlb[0x02]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2].L,__debug_mmu.tlb[0x2].P,__debug_mmu.tlb[0x40+0x2].L,__debug_mmu.tlb[0x40+0x2].P | ||
28 | printf "tlb[0x03]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3].L,__debug_mmu.tlb[0x3].P,__debug_mmu.tlb[0x40+0x3].L,__debug_mmu.tlb[0x40+0x3].P | ||
29 | printf "tlb[0x04]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x4].L,__debug_mmu.tlb[0x4].P,__debug_mmu.tlb[0x40+0x4].L,__debug_mmu.tlb[0x40+0x4].P | ||
30 | printf "tlb[0x05]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x5].L,__debug_mmu.tlb[0x5].P,__debug_mmu.tlb[0x40+0x5].L,__debug_mmu.tlb[0x40+0x5].P | ||
31 | printf "tlb[0x06]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x6].L,__debug_mmu.tlb[0x6].P,__debug_mmu.tlb[0x40+0x6].L,__debug_mmu.tlb[0x40+0x6].P | ||
32 | printf "tlb[0x07]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x7].L,__debug_mmu.tlb[0x7].P,__debug_mmu.tlb[0x40+0x7].L,__debug_mmu.tlb[0x40+0x7].P | ||
33 | printf "tlb[0x08]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x8].L,__debug_mmu.tlb[0x8].P,__debug_mmu.tlb[0x40+0x8].L,__debug_mmu.tlb[0x40+0x8].P | ||
34 | printf "tlb[0x09]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x9].L,__debug_mmu.tlb[0x9].P,__debug_mmu.tlb[0x40+0x9].L,__debug_mmu.tlb[0x40+0x9].P | ||
35 | printf "tlb[0x0a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xa].L,__debug_mmu.tlb[0xa].P,__debug_mmu.tlb[0x40+0xa].L,__debug_mmu.tlb[0x40+0xa].P | ||
36 | printf "tlb[0x0b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xb].L,__debug_mmu.tlb[0xb].P,__debug_mmu.tlb[0x40+0xb].L,__debug_mmu.tlb[0x40+0xb].P | ||
37 | printf "tlb[0x0c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xc].L,__debug_mmu.tlb[0xc].P,__debug_mmu.tlb[0x40+0xc].L,__debug_mmu.tlb[0x40+0xc].P | ||
38 | printf "tlb[0x0d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xd].L,__debug_mmu.tlb[0xd].P,__debug_mmu.tlb[0x40+0xd].L,__debug_mmu.tlb[0x40+0xd].P | ||
39 | printf "tlb[0x0e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xe].L,__debug_mmu.tlb[0xe].P,__debug_mmu.tlb[0x40+0xe].L,__debug_mmu.tlb[0x40+0xe].P | ||
40 | printf "tlb[0x0f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xf].L,__debug_mmu.tlb[0xf].P,__debug_mmu.tlb[0x40+0xf].L,__debug_mmu.tlb[0x40+0xf].P | ||
41 | printf "tlb[0x10]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x10].L,__debug_mmu.tlb[0x10].P,__debug_mmu.tlb[0x40+0x10].L,__debug_mmu.tlb[0x40+0x10].P | ||
42 | printf "tlb[0x11]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x11].L,__debug_mmu.tlb[0x11].P,__debug_mmu.tlb[0x40+0x11].L,__debug_mmu.tlb[0x40+0x11].P | ||
43 | printf "tlb[0x12]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x12].L,__debug_mmu.tlb[0x12].P,__debug_mmu.tlb[0x40+0x12].L,__debug_mmu.tlb[0x40+0x12].P | ||
44 | printf "tlb[0x13]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x13].L,__debug_mmu.tlb[0x13].P,__debug_mmu.tlb[0x40+0x13].L,__debug_mmu.tlb[0x40+0x13].P | ||
45 | printf "tlb[0x14]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x14].L,__debug_mmu.tlb[0x14].P,__debug_mmu.tlb[0x40+0x14].L,__debug_mmu.tlb[0x40+0x14].P | ||
46 | printf "tlb[0x15]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x15].L,__debug_mmu.tlb[0x15].P,__debug_mmu.tlb[0x40+0x15].L,__debug_mmu.tlb[0x40+0x15].P | ||
47 | printf "tlb[0x16]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x16].L,__debug_mmu.tlb[0x16].P,__debug_mmu.tlb[0x40+0x16].L,__debug_mmu.tlb[0x40+0x16].P | ||
48 | printf "tlb[0x17]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x17].L,__debug_mmu.tlb[0x17].P,__debug_mmu.tlb[0x40+0x17].L,__debug_mmu.tlb[0x40+0x17].P | ||
49 | printf "tlb[0x18]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x18].L,__debug_mmu.tlb[0x18].P,__debug_mmu.tlb[0x40+0x18].L,__debug_mmu.tlb[0x40+0x18].P | ||
50 | printf "tlb[0x19]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x19].L,__debug_mmu.tlb[0x19].P,__debug_mmu.tlb[0x40+0x19].L,__debug_mmu.tlb[0x40+0x19].P | ||
51 | printf "tlb[0x1a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1a].L,__debug_mmu.tlb[0x1a].P,__debug_mmu.tlb[0x40+0x1a].L,__debug_mmu.tlb[0x40+0x1a].P | ||
52 | printf "tlb[0x1b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1b].L,__debug_mmu.tlb[0x1b].P,__debug_mmu.tlb[0x40+0x1b].L,__debug_mmu.tlb[0x40+0x1b].P | ||
53 | printf "tlb[0x1c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1c].L,__debug_mmu.tlb[0x1c].P,__debug_mmu.tlb[0x40+0x1c].L,__debug_mmu.tlb[0x40+0x1c].P | ||
54 | printf "tlb[0x1d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1d].L,__debug_mmu.tlb[0x1d].P,__debug_mmu.tlb[0x40+0x1d].L,__debug_mmu.tlb[0x40+0x1d].P | ||
55 | printf "tlb[0x1e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1e].L,__debug_mmu.tlb[0x1e].P,__debug_mmu.tlb[0x40+0x1e].L,__debug_mmu.tlb[0x40+0x1e].P | ||
56 | printf "tlb[0x1f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1f].L,__debug_mmu.tlb[0x1f].P,__debug_mmu.tlb[0x40+0x1f].L,__debug_mmu.tlb[0x40+0x1f].P | ||
57 | printf "tlb[0x20]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x20].L,__debug_mmu.tlb[0x20].P,__debug_mmu.tlb[0x40+0x20].L,__debug_mmu.tlb[0x40+0x20].P | ||
58 | printf "tlb[0x21]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x21].L,__debug_mmu.tlb[0x21].P,__debug_mmu.tlb[0x40+0x21].L,__debug_mmu.tlb[0x40+0x21].P | ||
59 | printf "tlb[0x22]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x22].L,__debug_mmu.tlb[0x22].P,__debug_mmu.tlb[0x40+0x22].L,__debug_mmu.tlb[0x40+0x22].P | ||
60 | printf "tlb[0x23]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x23].L,__debug_mmu.tlb[0x23].P,__debug_mmu.tlb[0x40+0x23].L,__debug_mmu.tlb[0x40+0x23].P | ||
61 | printf "tlb[0x24]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x24].L,__debug_mmu.tlb[0x24].P,__debug_mmu.tlb[0x40+0x24].L,__debug_mmu.tlb[0x40+0x24].P | ||
62 | printf "tlb[0x25]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x25].L,__debug_mmu.tlb[0x25].P,__debug_mmu.tlb[0x40+0x25].L,__debug_mmu.tlb[0x40+0x25].P | ||
63 | printf "tlb[0x26]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x26].L,__debug_mmu.tlb[0x26].P,__debug_mmu.tlb[0x40+0x26].L,__debug_mmu.tlb[0x40+0x26].P | ||
64 | printf "tlb[0x27]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x27].L,__debug_mmu.tlb[0x27].P,__debug_mmu.tlb[0x40+0x27].L,__debug_mmu.tlb[0x40+0x27].P | ||
65 | printf "tlb[0x28]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x28].L,__debug_mmu.tlb[0x28].P,__debug_mmu.tlb[0x40+0x28].L,__debug_mmu.tlb[0x40+0x28].P | ||
66 | printf "tlb[0x29]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x29].L,__debug_mmu.tlb[0x29].P,__debug_mmu.tlb[0x40+0x29].L,__debug_mmu.tlb[0x40+0x29].P | ||
67 | printf "tlb[0x2a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2a].L,__debug_mmu.tlb[0x2a].P,__debug_mmu.tlb[0x40+0x2a].L,__debug_mmu.tlb[0x40+0x2a].P | ||
68 | printf "tlb[0x2b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2b].L,__debug_mmu.tlb[0x2b].P,__debug_mmu.tlb[0x40+0x2b].L,__debug_mmu.tlb[0x40+0x2b].P | ||
69 | printf "tlb[0x2c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2c].L,__debug_mmu.tlb[0x2c].P,__debug_mmu.tlb[0x40+0x2c].L,__debug_mmu.tlb[0x40+0x2c].P | ||
70 | printf "tlb[0x2d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2d].L,__debug_mmu.tlb[0x2d].P,__debug_mmu.tlb[0x40+0x2d].L,__debug_mmu.tlb[0x40+0x2d].P | ||
71 | printf "tlb[0x2e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2e].L,__debug_mmu.tlb[0x2e].P,__debug_mmu.tlb[0x40+0x2e].L,__debug_mmu.tlb[0x40+0x2e].P | ||
72 | printf "tlb[0x2f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2f].L,__debug_mmu.tlb[0x2f].P,__debug_mmu.tlb[0x40+0x2f].L,__debug_mmu.tlb[0x40+0x2f].P | ||
73 | printf "tlb[0x30]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x30].L,__debug_mmu.tlb[0x30].P,__debug_mmu.tlb[0x40+0x30].L,__debug_mmu.tlb[0x40+0x30].P | ||
74 | printf "tlb[0x31]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x31].L,__debug_mmu.tlb[0x31].P,__debug_mmu.tlb[0x40+0x31].L,__debug_mmu.tlb[0x40+0x31].P | ||
75 | printf "tlb[0x32]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x32].L,__debug_mmu.tlb[0x32].P,__debug_mmu.tlb[0x40+0x32].L,__debug_mmu.tlb[0x40+0x32].P | ||
76 | printf "tlb[0x33]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x33].L,__debug_mmu.tlb[0x33].P,__debug_mmu.tlb[0x40+0x33].L,__debug_mmu.tlb[0x40+0x33].P | ||
77 | printf "tlb[0x34]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x34].L,__debug_mmu.tlb[0x34].P,__debug_mmu.tlb[0x40+0x34].L,__debug_mmu.tlb[0x40+0x34].P | ||
78 | printf "tlb[0x35]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x35].L,__debug_mmu.tlb[0x35].P,__debug_mmu.tlb[0x40+0x35].L,__debug_mmu.tlb[0x40+0x35].P | ||
79 | printf "tlb[0x36]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x36].L,__debug_mmu.tlb[0x36].P,__debug_mmu.tlb[0x40+0x36].L,__debug_mmu.tlb[0x40+0x36].P | ||
80 | printf "tlb[0x37]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x37].L,__debug_mmu.tlb[0x37].P,__debug_mmu.tlb[0x40+0x37].L,__debug_mmu.tlb[0x40+0x37].P | ||
81 | printf "tlb[0x38]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x38].L,__debug_mmu.tlb[0x38].P,__debug_mmu.tlb[0x40+0x38].L,__debug_mmu.tlb[0x40+0x38].P | ||
82 | printf "tlb[0x39]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x39].L,__debug_mmu.tlb[0x39].P,__debug_mmu.tlb[0x40+0x39].L,__debug_mmu.tlb[0x40+0x39].P | ||
83 | printf "tlb[0x3a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3a].L,__debug_mmu.tlb[0x3a].P,__debug_mmu.tlb[0x40+0x3a].L,__debug_mmu.tlb[0x40+0x3a].P | ||
84 | printf "tlb[0x3b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3b].L,__debug_mmu.tlb[0x3b].P,__debug_mmu.tlb[0x40+0x3b].L,__debug_mmu.tlb[0x40+0x3b].P | ||
85 | printf "tlb[0x3c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3c].L,__debug_mmu.tlb[0x3c].P,__debug_mmu.tlb[0x40+0x3c].L,__debug_mmu.tlb[0x40+0x3c].P | ||
86 | printf "tlb[0x3d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3d].L,__debug_mmu.tlb[0x3d].P,__debug_mmu.tlb[0x40+0x3d].L,__debug_mmu.tlb[0x40+0x3d].P | ||
87 | printf "tlb[0x3e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3e].L,__debug_mmu.tlb[0x3e].P,__debug_mmu.tlb[0x40+0x3e].L,__debug_mmu.tlb[0x40+0x3e].P | ||
88 | printf "tlb[0x3f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3f].L,__debug_mmu.tlb[0x3f].P,__debug_mmu.tlb[0x40+0x3f].L,__debug_mmu.tlb[0x40+0x3f].P | ||
89 | end | ||
90 | |||
91 | |||
92 | define _pgd | ||
93 | p (pgd_t[0x40])*(pgd_t*)(__debug_mmu.damr[0x3].L) | ||
94 | end | ||
95 | |||
96 | define _ptd_i | ||
97 | p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x4].L) | ||
98 | end | ||
99 | |||
100 | define _ptd_d | ||
101 | p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x5].L) | ||
102 | end | ||
diff --git a/Documentation/frv/gdbstub.txt b/Documentation/frv/gdbstub.txt deleted file mode 100644 index b92bfd902a4e..000000000000 --- a/Documentation/frv/gdbstub.txt +++ /dev/null | |||
@@ -1,130 +0,0 @@ | |||
1 | ==================== | ||
2 | DEBUGGING FR-V LINUX | ||
3 | ==================== | ||
4 | |||
5 | |||
6 | The kernel contains a GDB stub that talks GDB remote protocol across a serial | ||
7 | port. This permits GDB to single step through the kernel, set breakpoints and | ||
8 | trap exceptions that happen in kernel space and interrupt execution. It also | ||
9 | permits the NMI interrupt button or serial port events to jump the kernel into | ||
10 | the debugger. | ||
11 | |||
12 | On the CPUs that have on-chip UARTs (FR400, FR403, FR405, FR555), the | ||
13 | GDB stub hijacks a serial port for its own purposes, and makes it | ||
14 | generate level 15 interrupts (NMI). The kernel proper cannot see the serial | ||
15 | port in question under these conditions. | ||
16 | |||
17 | On the MB93091-VDK CPU boards, the GDB stub uses UART1, which would otherwise | ||
18 | be /dev/ttyS1. On the MB93093-PDK, the GDB stub uses UART0. Therefore, on the | ||
19 | PDK there is no externally accessible serial port and the serial port to | ||
20 | which the touch screen is attached becomes /dev/ttyS0. | ||
21 | |||
22 | Note that the GDB stub runs entirely within CPU debug mode, and so should not | ||
23 | incur any exceptions or interrupts whilst it is active. In particular, note | ||
24 | that the clock will lose time since it is implemented in software. | ||
25 | |||
26 | |||
27 | ================== | ||
28 | KERNEL PREPARATION | ||
29 | ================== | ||
30 | |||
31 | Firstly, a debuggable kernel must be built. To do this, unpack the kernel tree | ||
32 | and copy the configuration that you wish to use to .config. Then reconfigure | ||
33 | the following things on the "Kernel Hacking" tab: | ||
34 | |||
35 | (*) "Include debugging information" | ||
36 | |||
37 | Set this to "Y". This causes all C and Assembly files to be compiled | ||
38 | to include debugging information. | ||
39 | |||
40 | (*) "In-kernel GDB stub" | ||
41 | |||
42 | Set this to "Y". This causes the GDB stub to be compiled into the | ||
43 | kernel. | ||
44 | |||
45 | (*) "Immediate activation" | ||
46 | |||
47 | Set this to "Y" if you want the GDB stub to activate as soon as possible | ||
48 | and wait for GDB to connect. This allows you to start tracing right from | ||
49 | the beginning of start_kernel() in init/main.c. | ||
50 | |||
51 | (*) "Console through GDB stub" | ||
52 | |||
53 | Set this to "Y" if you wish to be able to use "console=gdb0" on the | ||
54 | command line. That tells the kernel to pass system console messages to | ||
55 | GDB (which then prints them on its standard output). This is useful when | ||
56 | debugging the serial drivers that'd otherwise be used to pass console | ||
57 | messages to the outside world. | ||
58 | |||
59 | Then build as usual, download to the board and execute. Note that if | ||
60 | "Immediate activation" was selected, then the kernel will wait for GDB to | ||
61 | attach. If not, then the kernel will boot immediately and GDB will have to | ||
62 | interrupt it or wait for an exception to occur before doing anything with | ||
63 | the kernel. | ||
64 | |||
65 | |||
66 | ========================= | ||
67 | KERNEL DEBUGGING WITH GDB | ||
68 | ========================= | ||
69 | |||
70 | Set the serial port on the computer that's going to run GDB to the appropriate | ||
71 | baud rate. Assuming the board's debug port is connected to ttyS0/COM1 on the | ||
72 | computer doing the debugging: | ||
73 | |||
74 | stty -F /dev/ttyS0 115200 | ||
75 | |||
76 | Then start GDB in the base of the kernel tree: | ||
77 | |||
78 | frv-uclinux-gdb linux [uClinux] | ||
79 | |||
80 | Or: | ||
81 | |||
82 | frv-uclinux-gdb vmlinux [MMU linux] | ||
83 | |||
84 | When the prompt appears: | ||
85 | |||
86 | GNU gdb frv-031024 | ||
87 | Copyright 2003 Free Software Foundation, Inc. | ||
88 | GDB is free software, covered by the GNU General Public License, and you are | ||
89 | welcome to change it and/or distribute copies of it under certain conditions. | ||
90 | Type "show copying" to see the conditions. | ||
91 | There is absolutely no warranty for GDB. Type "show warranty" for details. | ||
92 | This GDB was configured as "--host=i686-pc-linux-gnu --target=frv-uclinux"... | ||
93 | (gdb) | ||
94 | |||
95 | Attach to the board like this: | ||
96 | |||
97 | (gdb) target remote /dev/ttyS0 | ||
98 | Remote debugging using /dev/ttyS0 | ||
99 | start_kernel () at init/main.c:395 | ||
100 | (gdb) | ||
101 | |||
102 | This should show the appropriate lines from the source too. The kernel can | ||
103 | then be debugged almost as if it's any other program. | ||
104 | |||
105 | |||
106 | =============================== | ||
107 | INTERRUPTING THE RUNNING KERNEL | ||
108 | =============================== | ||
109 | |||
110 | The kernel can be interrupted whilst it is running, causing a jump back to the | ||
111 | GDB stub and the debugger: | ||
112 | |||
113 | (*) Pressing Ctrl-C in GDB. This will cause GDB to try and interrupt the | ||
114 | kernel by sending an RS232 BREAK over the serial line to the GDB | ||
115 | stub. This will (mostly) immediately interrupt the kernel and return it | ||
116 | to the debugger. | ||
117 | |||
118 | (*) Pressing the NMI button on the board will also cause a jump into the | ||
119 | debugger. | ||
120 | |||
121 | (*) Setting a software breakpoint. This sets a break instruction at the | ||
122 | desired location which the GDB stub then traps the exception for. | ||
123 | |||
124 | (*) Setting a hardware breakpoint. The GDB stub is capable of using the IBAR | ||
125 | and DBAR registers to assist debugging. | ||
126 | |||
127 | Furthermore, the GDB stub will intercept a number of exceptions automatically | ||
128 | if they are caused by kernel execution. It will also intercept BUG() macro | ||
129 | invocation. | ||
130 | |||
diff --git a/Documentation/frv/kernel-ABI.txt b/Documentation/frv/kernel-ABI.txt deleted file mode 100644 index aaa1cec86f0b..000000000000 --- a/Documentation/frv/kernel-ABI.txt +++ /dev/null | |||
@@ -1,262 +0,0 @@ | |||
1 | ================================= | ||
2 | INTERNAL KERNEL ABI FOR FR-V ARCH | ||
3 | ================================= | ||
4 | |||
5 | The internal FRV kernel ABI is not quite the same as the userspace ABI. A | ||
6 | number of the registers are used for special purposed, and the ABI is not | ||
7 | consistent between modules vs core, and MMU vs no-MMU. | ||
8 | |||
9 | This partly stems from the fact that FRV CPUs do not have a separate | ||
10 | supervisor stack pointer, and most of them do not have any scratch | ||
11 | registers, thus requiring at least one general purpose register to be | ||
12 | clobbered in such an event. Also, within the kernel core, it is possible to | ||
13 | simply jump or call directly between functions using a relative offset. | ||
14 | This cannot be extended to modules for the displacement is likely to be too | ||
15 | far. Thus in modules the address of a function to call must be calculated | ||
16 | in a register and then used, requiring two extra instructions. | ||
17 | |||
18 | This document has the following sections: | ||
19 | |||
20 | (*) System call register ABI | ||
21 | (*) CPU operating modes | ||
22 | (*) Internal kernel-mode register ABI | ||
23 | (*) Internal debug-mode register ABI | ||
24 | (*) Virtual interrupt handling | ||
25 | |||
26 | |||
27 | ======================== | ||
28 | SYSTEM CALL REGISTER ABI | ||
29 | ======================== | ||
30 | |||
31 | When a system call is made, the following registers are effective: | ||
32 | |||
33 | REGISTERS CALL RETURN | ||
34 | =============== ======================= ======================= | ||
35 | GR7 System call number Preserved | ||
36 | GR8 Syscall arg #1 Return value | ||
37 | GR9-GR13 Syscall arg #2-6 Preserved | ||
38 | |||
39 | |||
40 | =================== | ||
41 | CPU OPERATING MODES | ||
42 | =================== | ||
43 | |||
44 | The FR-V CPU has three basic operating modes. In order of increasing | ||
45 | capability: | ||
46 | |||
47 | (1) User mode. | ||
48 | |||
49 | Basic userspace running mode. | ||
50 | |||
51 | (2) Kernel mode. | ||
52 | |||
53 | Normal kernel mode. There are many additional control registers | ||
54 | available that may be accessed in this mode, in addition to all the | ||
55 | stuff available to user mode. This has two submodes: | ||
56 | |||
57 | (a) Exceptions enabled (PSR.T == 1). | ||
58 | |||
59 | Exceptions will invoke the appropriate normal kernel mode | ||
60 | handler. On entry to the handler, the PSR.T bit will be cleared. | ||
61 | |||
62 | (b) Exceptions disabled (PSR.T == 0). | ||
63 | |||
64 | No exceptions or interrupts may happen. Any mandatory exceptions | ||
65 | will cause the CPU to halt unless the CPU is told to jump into | ||
66 | debug mode instead. | ||
67 | |||
68 | (3) Debug mode. | ||
69 | |||
70 | No exceptions may happen in this mode. Memory protection and | ||
71 | management exceptions will be flagged for later consideration, but | ||
72 | the exception handler won't be invoked. Debugging traps such as | ||
73 | hardware breakpoints and watchpoints will be ignored. This mode is | ||
74 | entered only by debugging events obtained from the other two modes. | ||
75 | |||
76 | All kernel mode registers may be accessed, plus a few extra debugging | ||
77 | specific registers. | ||
78 | |||
79 | |||
80 | ================================= | ||
81 | INTERNAL KERNEL-MODE REGISTER ABI | ||
82 | ================================= | ||
83 | |||
84 | There are a number of permanent register assignments that are set up by | ||
85 | entry.S in the exception prologue. Note that there is a complete set of | ||
86 | exception prologues for each of user->kernel transition and kernel->kernel | ||
87 | transition. There are also user->debug and kernel->debug mode transition | ||
88 | prologues. | ||
89 | |||
90 | |||
91 | REGISTER FLAVOUR USE | ||
92 | =============== ======= ============================================== | ||
93 | GR1 Supervisor stack pointer | ||
94 | GR15 Current thread info pointer | ||
95 | GR16 GP-Rel base register for small data | ||
96 | GR28 Current exception frame pointer (__frame) | ||
97 | GR29 Current task pointer (current) | ||
98 | GR30 Destroyed by kernel mode entry | ||
99 | GR31 NOMMU Destroyed by debug mode entry | ||
100 | GR31 MMU Destroyed by TLB miss kernel mode entry | ||
101 | CCR.ICC2 Virtual interrupt disablement tracking | ||
102 | CCCR.CC3 Cleared by exception prologue | ||
103 | (atomic op emulation) | ||
104 | SCR0 MMU See mmu-layout.txt. | ||
105 | SCR1 MMU See mmu-layout.txt. | ||
106 | SCR2 MMU Save for EAR0 (destroyed by icache insns | ||
107 | in debug mode) | ||
108 | SCR3 MMU Save for GR31 during debug exceptions | ||
109 | DAMR/IAMR NOMMU Fixed memory protection layout. | ||
110 | DAMR/IAMR MMU See mmu-layout.txt. | ||
111 | |||
112 | |||
113 | Certain registers are also used or modified across function calls: | ||
114 | |||
115 | REGISTER CALL RETURN | ||
116 | =============== =============================== ====================== | ||
117 | GR0 Fixed Zero - | ||
118 | GR2 Function call frame pointer | ||
119 | GR3 Special Preserved | ||
120 | GR3-GR7 - Clobbered | ||
121 | GR8 Function call arg #1 Return value | ||
122 | (or clobbered) | ||
123 | GR9 Function call arg #2 Return value MSW | ||
124 | (or clobbered) | ||
125 | GR10-GR13 Function call arg #3-#6 Clobbered | ||
126 | GR14 - Clobbered | ||
127 | GR15-GR16 Special Preserved | ||
128 | GR17-GR27 - Preserved | ||
129 | GR28-GR31 Special Only accessed | ||
130 | explicitly | ||
131 | LR Return address after CALL Clobbered | ||
132 | CCR/CCCR - Mostly Clobbered | ||
133 | |||
134 | |||
135 | ================================ | ||
136 | INTERNAL DEBUG-MODE REGISTER ABI | ||
137 | ================================ | ||
138 | |||
139 | This is the same as the kernel-mode register ABI for functions calls. The | ||
140 | difference is that in debug-mode there's a different stack and a different | ||
141 | exception frame. Almost all the global registers from kernel-mode | ||
142 | (including the stack pointer) may be changed. | ||
143 | |||
144 | REGISTER FLAVOUR USE | ||
145 | =============== ======= ============================================== | ||
146 | GR1 Debug stack pointer | ||
147 | GR16 GP-Rel base register for small data | ||
148 | GR31 Current debug exception frame pointer | ||
149 | (__debug_frame) | ||
150 | SCR3 MMU Saved value of GR31 | ||
151 | |||
152 | |||
153 | Note that debug mode is able to interfere with the kernel's emulated atomic | ||
154 | ops, so it must be exceedingly careful not to do any that would interact | ||
155 | with the main kernel in this regard. Hence the debug mode code (gdbstub) is | ||
156 | almost completely self-contained. The only external code used is the | ||
157 | sprintf family of functions. | ||
158 | |||
159 | Furthermore, break.S is so complicated because single-step mode does not | ||
160 | switch off on entry to an exception. That means unless manually disabled, | ||
161 | single-stepping will blithely go on stepping into things like interrupts. | ||
162 | See gdbstub.txt for more information. | ||
163 | |||
164 | |||
165 | ========================== | ||
166 | VIRTUAL INTERRUPT HANDLING | ||
167 | ========================== | ||
168 | |||
169 | Because accesses to the PSR is so slow, and to disable interrupts we have | ||
170 | to access it twice (once to read and once to write), we don't actually | ||
171 | disable interrupts at all if we don't have to. What we do instead is use | ||
172 | the ICC2 condition code flags to note virtual disablement, such that if we | ||
173 | then do take an interrupt, we note the flag, really disable interrupts, set | ||
174 | another flag and resume execution at the point the interrupt happened. | ||
175 | Setting condition flags as a side effect of an arithmetic or logical | ||
176 | instruction is really fast. This use of the ICC2 only occurs within the | ||
177 | kernel - it does not affect userspace. | ||
178 | |||
179 | The flags we use are: | ||
180 | |||
181 | (*) CCR.ICC2.Z [Zero flag] | ||
182 | |||
183 | Set to virtually disable interrupts, clear when interrupts are | ||
184 | virtually enabled. Can be modified by logical instructions without | ||
185 | affecting the Carry flag. | ||
186 | |||
187 | (*) CCR.ICC2.C [Carry flag] | ||
188 | |||
189 | Clear to indicate hardware interrupts are really disabled, set otherwise. | ||
190 | |||
191 | |||
192 | What happens is this: | ||
193 | |||
194 | (1) Normal kernel-mode operation. | ||
195 | |||
196 | ICC2.Z is 0, ICC2.C is 1. | ||
197 | |||
198 | (2) An interrupt occurs. The exception prologue examines ICC2.Z and | ||
199 | determines that nothing needs doing. This is done simply with an | ||
200 | unlikely BEQ instruction. | ||
201 | |||
202 | (3) The interrupts are disabled (local_irq_disable) | ||
203 | |||
204 | ICC2.Z is set to 1. | ||
205 | |||
206 | (4) If interrupts were then re-enabled (local_irq_enable): | ||
207 | |||
208 | ICC2.Z would be set to 0. | ||
209 | |||
210 | A TIHI #2 instruction (trap #2 if condition HI - Z==0 && C==0) would | ||
211 | be used to trap if interrupts were now virtually enabled, but | ||
212 | physically disabled - which they're not, so the trap isn't taken. The | ||
213 | kernel would then be back to state (1). | ||
214 | |||
215 | (5) An interrupt occurs. The exception prologue examines ICC2.Z and | ||
216 | determines that the interrupt shouldn't actually have happened. It | ||
217 | jumps aside, and there disabled interrupts by setting PSR.PIL to 14 | ||
218 | and then it clears ICC2.C. | ||
219 | |||
220 | (6) If interrupts were then saved and disabled again (local_irq_save): | ||
221 | |||
222 | ICC2.Z would be shifted into the save variable and masked off | ||
223 | (giving a 1). | ||
224 | |||
225 | ICC2.Z would then be set to 1 (thus unchanged), and ICC2.C would be | ||
226 | unaffected (ie: 0). | ||
227 | |||
228 | (7) If interrupts were then restored from state (6) (local_irq_restore): | ||
229 | |||
230 | ICC2.Z would be set to indicate the result of XOR'ing the saved | ||
231 | value (ie: 1) with 1, which gives a result of 0 - thus leaving | ||
232 | ICC2.Z set. | ||
233 | |||
234 | ICC2.C would remain unaffected (ie: 0). | ||
235 | |||
236 | A TIHI #2 instruction would be used to again assay the current state, | ||
237 | but this would do nothing as Z==1. | ||
238 | |||
239 | (8) If interrupts were then enabled (local_irq_enable): | ||
240 | |||
241 | ICC2.Z would be cleared. ICC2.C would be left unaffected. Both | ||
242 | flags would now be 0. | ||
243 | |||
244 | A TIHI #2 instruction again issued to assay the current state would | ||
245 | then trap as both Z==0 [interrupts virtually enabled] and C==0 | ||
246 | [interrupts really disabled] would then be true. | ||
247 | |||
248 | (9) The trap #2 handler would simply enable hardware interrupts | ||
249 | (set PSR.PIL to 0), set ICC2.C to 1 and return. | ||
250 | |||
251 | (10) Immediately upon returning, the pending interrupt would be taken. | ||
252 | |||
253 | (11) The interrupt handler would take the path of actually processing the | ||
254 | interrupt (ICC2.Z is clear, BEQ fails as per step (2)). | ||
255 | |||
256 | (12) The interrupt handler would then set ICC2.C to 1 since hardware | ||
257 | interrupts are definitely enabled - or else the kernel wouldn't be here. | ||
258 | |||
259 | (13) On return from the interrupt handler, things would be back to state (1). | ||
260 | |||
261 | This trap (#2) is only available in kernel mode. In user mode it will | ||
262 | result in SIGILL. | ||
diff --git a/Documentation/frv/mmu-layout.txt b/Documentation/frv/mmu-layout.txt deleted file mode 100644 index db10250df6be..000000000000 --- a/Documentation/frv/mmu-layout.txt +++ /dev/null | |||
@@ -1,306 +0,0 @@ | |||
1 | ================================= | ||
2 | FR451 MMU LINUX MEMORY MANAGEMENT | ||
3 | ================================= | ||
4 | |||
5 | ============ | ||
6 | MMU HARDWARE | ||
7 | ============ | ||
8 | |||
9 | FR451 MMU Linux puts the MMU into EDAT mode whilst running. This means that it uses both the SAT | ||
10 | registers and the DAT TLB to perform address translation. | ||
11 | |||
12 | There are 8 IAMLR/IAMPR register pairs and 16 DAMLR/DAMPR register pairs for SAT mode. | ||
13 | |||
14 | In DAT mode, there is also a TLB organised in cache format as 64 lines x 2 ways. Each line spans a | ||
15 | 16KB range of addresses, but can match a larger region. | ||
16 | |||
17 | |||
18 | =========================== | ||
19 | MEMORY MANAGEMENT REGISTERS | ||
20 | =========================== | ||
21 | |||
22 | Certain control registers are used by the kernel memory management routines: | ||
23 | |||
24 | REGISTERS USAGE | ||
25 | ====================== ================================================== | ||
26 | IAMR0, DAMR0 Kernel image and data mappings | ||
27 | IAMR1, DAMR1 First-chance TLB lookup mapping | ||
28 | DAMR2 Page attachment for cache flush by page | ||
29 | DAMR3 Current PGD mapping | ||
30 | SCR0, DAMR4 Instruction TLB PGE/PTD cache | ||
31 | SCR1, DAMR5 Data TLB PGE/PTD cache | ||
32 | DAMR6-10 kmap_atomic() mappings | ||
33 | DAMR11 I/O mapping | ||
34 | CXNR mm_struct context ID | ||
35 | TTBR Page directory (PGD) pointer (physical address) | ||
36 | |||
37 | |||
38 | ===================== | ||
39 | GENERAL MEMORY LAYOUT | ||
40 | ===================== | ||
41 | |||
42 | The physical memory layout is as follows: | ||
43 | |||
44 | PHYSICAL ADDRESS CONTROLLER DEVICE | ||
45 | =================== ============== ======================================= | ||
46 | 00000000 - BFFFFFFF SDRAM SDRAM area | ||
47 | E0000000 - EFFFFFFF L-BUS CS2# VDK SLBUS/PCI window | ||
48 | F0000000 - F0FFFFFF L-BUS CS5# MB93493 CSC area (DAV daughter board) | ||
49 | F1000000 - F1FFFFFF L-BUS CS7# (CB70 CPU-card PCMCIA port I/O space) | ||
50 | FC000000 - FC0FFFFF L-BUS CS1# VDK MB86943 config space | ||
51 | FC100000 - FC1FFFFF L-BUS CS6# DM9000 NIC I/O space | ||
52 | FC200000 - FC2FFFFF L-BUS CS3# MB93493 CSR area (DAV daughter board) | ||
53 | FD000000 - FDFFFFFF L-BUS CS4# (CB70 CPU-card extra flash space) | ||
54 | FE000000 - FEFFFFFF Internal CPU peripherals | ||
55 | FF000000 - FF1FFFFF L-BUS CS0# Flash 1 | ||
56 | FF200000 - FF3FFFFF L-BUS CS0# Flash 2 | ||
57 | FFC00000 - FFC0001F L-BUS CS0# FPGA | ||
58 | |||
59 | The virtual memory layout is: | ||
60 | |||
61 | VIRTUAL ADDRESS PHYSICAL TRANSLATOR FLAGS SIZE OCCUPATION | ||
62 | ================= ======== ============== ======= ======= =================================== | ||
63 | 00004000-BFFFFFFF various TLB,xAMR1 D-N-??V 3GB Userspace | ||
64 | C0000000-CFFFFFFF 00000000 xAMPR0 -L-S--V 256MB Kernel image and data | ||
65 | D0000000-D7FFFFFF various TLB,xAMR1 D-NS??V 128MB vmalloc area | ||
66 | D8000000-DBFFFFFF various TLB,xAMR1 D-NS??V 64MB kmap() area | ||
67 | DC000000-DCFFFFFF various TLB 1MB Secondary kmap_atomic() frame | ||
68 | DD000000-DD27FFFF various DAMR 160KB Primary kmap_atomic() frame | ||
69 | DD040000 DAMR2/IAMR2 -L-S--V page Page cache flush attachment point | ||
70 | DD080000 DAMR3 -L-SC-V page Page Directory (PGD) | ||
71 | DD0C0000 DAMR4 -L-SC-V page Cached insn TLB Page Table lookup | ||
72 | DD100000 DAMR5 -L-SC-V page Cached data TLB Page Table lookup | ||
73 | DD140000 DAMR6 -L-S--V page kmap_atomic(KM_BOUNCE_READ) | ||
74 | DD180000 DAMR7 -L-S--V page kmap_atomic(KM_SKB_SUNRPC_DATA) | ||
75 | DD1C0000 DAMR8 -L-S--V page kmap_atomic(KM_SKB_DATA_SOFTIRQ) | ||
76 | DD200000 DAMR9 -L-S--V page kmap_atomic(KM_USER0) | ||
77 | DD240000 DAMR10 -L-S--V page kmap_atomic(KM_USER1) | ||
78 | E0000000-FFFFFFFF E0000000 DAMR11 -L-SC-V 512MB I/O region | ||
79 | |||
80 | IAMPR1 and DAMPR1 are used as an extension to the TLB. | ||
81 | |||
82 | |||
83 | ==================== | ||
84 | KMAP AND KMAP_ATOMIC | ||
85 | ==================== | ||
86 | |||
87 | To access pages in the page cache (which may not be directly accessible if highmem is available), | ||
88 | the kernel calls kmap(), does the access and then calls kunmap(); or it calls kmap_atomic(), does | ||
89 | the access and then calls kunmap_atomic(). | ||
90 | |||
91 | kmap() creates an attachment between an arbitrary inaccessible page and a range of virtual | ||
92 | addresses by installing a PTE in a special page table. The kernel can then access this page as it | ||
93 | wills. When it's finished, the kernel calls kunmap() to clear the PTE. | ||
94 | |||
95 | kmap_atomic() does something slightly different. In the interests of speed, it chooses one of two | ||
96 | strategies: | ||
97 | |||
98 | (1) If possible, kmap_atomic() attaches the requested page to one of DAMPR5 through DAMPR10 | ||
99 | register pairs; and the matching kunmap_atomic() clears the DAMPR. This makes high memory | ||
100 | support really fast as there's no need to flush the TLB or modify the page tables. The DAMLR | ||
101 | registers being used for this are preset during boot and don't change over the lifetime of the | ||
102 | process. There's a direct mapping between the first few kmap_atomic() types, DAMR number and | ||
103 | virtual address slot. | ||
104 | |||
105 | However, there are more kmap_atomic() types defined than there are DAMR registers available, | ||
106 | so we fall back to: | ||
107 | |||
108 | (2) kmap_atomic() uses a slot in the secondary frame (determined by the type parameter), and then | ||
109 | locks an entry in the TLB to translate that slot to the specified page. The number of slots is | ||
110 | obviously limited, and their positions are controlled such that each slot is matched by a | ||
111 | different line in the TLB. kunmap() ejects the entry from the TLB. | ||
112 | |||
113 | Note that the first three kmap atomic types are really just declared as placeholders. The DAMPR | ||
114 | registers involved are actually modified directly. | ||
115 | |||
116 | Also note that kmap() itself may sleep, kmap_atomic() may never sleep and both always succeed; | ||
117 | furthermore, a driver using kmap() may sleep before calling kunmap(), but may not sleep before | ||
118 | calling kunmap_atomic() if it had previously called kmap_atomic(). | ||
119 | |||
120 | |||
121 | =============================== | ||
122 | USING MORE THAN 256MB OF MEMORY | ||
123 | =============================== | ||
124 | |||
125 | The kernel cannot access more than 256MB of memory directly. The physical layout, however, permits | ||
126 | up to 3GB of SDRAM (possibly 3.25GB) to be made available. By using CONFIG_HIGHMEM, the kernel can | ||
127 | allow userspace (by way of page tables) and itself (by way of kmap) to deal with the memory | ||
128 | allocation. | ||
129 | |||
130 | External devices can, of course, still DMA to and from all of the SDRAM, even if the kernel can't | ||
131 | see it directly. The kernel translates page references into real addresses for communicating to the | ||
132 | devices. | ||
133 | |||
134 | |||
135 | =================== | ||
136 | PAGE TABLE TOPOLOGY | ||
137 | =================== | ||
138 | |||
139 | The page tables are arranged in 2-layer format. There is a middle layer (PMD) that would be used in | ||
140 | 3-layer format tables but that is folded into the top layer (PGD) and so consumes no extra memory | ||
141 | or processing power. | ||
142 | |||
143 | +------+ PGD PMD | ||
144 | | TTBR |--->+-------------------+ | ||
145 | +------+ | | : STE | | ||
146 | | PGE0 | PME0 : STE | | ||
147 | | | : STE | | ||
148 | +-------------------+ Page Table | ||
149 | | | : STE -------------->+--------+ +0x0000 | ||
150 | | PGE1 | PME0 : STE -----------+ | PTE0 | | ||
151 | | | : STE -------+ | +--------+ | ||
152 | +-------------------+ | | | PTE63 | | ||
153 | | | : STE | | +-->+--------+ +0x0100 | ||
154 | | PGE2 | PME0 : STE | | | PTE64 | | ||
155 | | | : STE | | +--------+ | ||
156 | +-------------------+ | | PTE127 | | ||
157 | | | : STE | +------>+--------+ +0x0200 | ||
158 | | PGE3 | PME0 : STE | | PTE128 | | ||
159 | | | : STE | +--------+ | ||
160 | +-------------------+ | PTE191 | | ||
161 | +--------+ +0x0300 | ||
162 | |||
163 | Each Page Directory (PGD) is 16KB (page size) in size and is divided into 64 entries (PGEs). Each | ||
164 | PGE contains one Page Mid Directory (PMD). | ||
165 | |||
166 | Each PMD is 256 bytes in size and contains a single entry (PME). Each PME holds 64 FR451 MMU | ||
167 | segment table entries of 4 bytes apiece. Each PME "points to" a page table. In practice, each STE | ||
168 | points to a subset of the page table, the first to PT+0x0000, the second to PT+0x0100, the third to | ||
169 | PT+0x200, and so on. | ||
170 | |||
171 | Each PGE and PME covers 64MB of the total virtual address space. | ||
172 | |||
173 | Each Page Table (PTD) is 16KB (page size) in size, and is divided into 4096 entries (PTEs). Each | ||
174 | entry can point to one 16KB page. In practice, each Linux page table is subdivided into 64 FR451 | ||
175 | MMU page tables. But they are all grouped together to make management easier, in particular rmap | ||
176 | support is then trivial. | ||
177 | |||
178 | Grouping page tables in this fashion makes PGE caching in SCR0/SCR1 more efficient because the | ||
179 | coverage of the cached item is greater. | ||
180 | |||
181 | Page tables for the vmalloc area are allocated at boot time and shared between all mm_structs. | ||
182 | |||
183 | |||
184 | ================= | ||
185 | USER SPACE LAYOUT | ||
186 | ================= | ||
187 | |||
188 | For MMU capable Linux, the regions userspace code are allowed to access are kept entirely separate | ||
189 | from those dedicated to the kernel: | ||
190 | |||
191 | VIRTUAL ADDRESS SIZE PURPOSE | ||
192 | ================= ===== =================================== | ||
193 | 00000000-00003fff 4KB NULL pointer access trap | ||
194 | 00004000-01ffffff ~32MB lower mmap space (grows up) | ||
195 | 02000000-021fffff 2MB Stack space (grows down from top) | ||
196 | 02200000-nnnnnnnn Executable mapping | ||
197 | nnnnnnnn- brk space (grows up) | ||
198 | -bfffffff upper mmap space (grows down) | ||
199 | |||
200 | This is so arranged so as to make best use of the 16KB page tables and the way in which PGEs/PMEs | ||
201 | are cached by the TLB handler. The lower mmap space is filled first, and then the upper mmap space | ||
202 | is filled. | ||
203 | |||
204 | |||
205 | =============================== | ||
206 | GDB-STUB MMU DEBUGGING SERVICES | ||
207 | =============================== | ||
208 | |||
209 | The gdb-stub included in this kernel provides a number of services to aid in the debugging of MMU | ||
210 | related kernel services: | ||
211 | |||
212 | (*) Every time the kernel stops, certain state information is dumped into __debug_mmu. This | ||
213 | variable is defined in arch/frv/kernel/gdb-stub.c. Note that the gdbinit file in this | ||
214 | directory has some useful macros for dealing with this. | ||
215 | |||
216 | (*) __debug_mmu.tlb[] | ||
217 | |||
218 | This receives the current TLB contents. This can be viewed with the _tlb GDB macro: | ||
219 | |||
220 | (gdb) _tlb | ||
221 | tlb[0x00]: 01000005 00718203 01000002 00718203 | ||
222 | tlb[0x01]: 01004002 006d4201 01004005 006d4203 | ||
223 | tlb[0x02]: 01008002 006d0201 01008006 00004200 | ||
224 | tlb[0x03]: 0100c006 007f4202 0100c002 0064c202 | ||
225 | tlb[0x04]: 01110005 00774201 01110002 00774201 | ||
226 | tlb[0x05]: 01114005 00770201 01114002 00770201 | ||
227 | tlb[0x06]: 01118002 0076c201 01118005 0076c201 | ||
228 | ... | ||
229 | tlb[0x3d]: 010f4002 00790200 001f4002 0054ca02 | ||
230 | tlb[0x3e]: 010f8005 0078c201 010f8002 0078c201 | ||
231 | tlb[0x3f]: 001fc002 0056ca01 001fc005 00538a01 | ||
232 | |||
233 | (*) __debug_mmu.iamr[] | ||
234 | (*) __debug_mmu.damr[] | ||
235 | |||
236 | These receive the current IAMR and DAMR contents. These can be viewed with the _amr | ||
237 | GDB macro: | ||
238 | |||
239 | (gdb) _amr | ||
240 | AMRx DAMR IAMR | ||
241 | ==== ===================== ===================== | ||
242 | amr0 : L:c0000000 P:00000cb9 : L:c0000000 P:000004b9 | ||
243 | amr1 : L:01070005 P:006f9203 : L:0102c005 P:006a1201 | ||
244 | amr2 : L:d8d00000 P:00000000 : L:d8d00000 P:00000000 | ||
245 | amr3 : L:d8d04000 P:00534c0d : L:00000000 P:00000000 | ||
246 | amr4 : L:d8d08000 P:00554c0d : L:00000000 P:00000000 | ||
247 | amr5 : L:d8d0c000 P:00554c0d : L:00000000 P:00000000 | ||
248 | amr6 : L:d8d10000 P:00000000 : L:00000000 P:00000000 | ||
249 | amr7 : L:d8d14000 P:00000000 : L:00000000 P:00000000 | ||
250 | amr8 : L:d8d18000 P:00000000 | ||
251 | amr9 : L:d8d1c000 P:00000000 | ||
252 | amr10: L:d8d20000 P:00000000 | ||
253 | amr11: L:e0000000 P:e0000ccd | ||
254 | |||
255 | (*) The current task's page directory is bound to DAMR3. | ||
256 | |||
257 | This can be viewed with the _pgd GDB macro: | ||
258 | |||
259 | (gdb) _pgd | ||
260 | $3 = {{pge = {{ste = {0x554001, 0x554101, 0x554201, 0x554301, 0x554401, | ||
261 | 0x554501, 0x554601, 0x554701, 0x554801, 0x554901, 0x554a01, | ||
262 | 0x554b01, 0x554c01, 0x554d01, 0x554e01, 0x554f01, 0x555001, | ||
263 | 0x555101, 0x555201, 0x555301, 0x555401, 0x555501, 0x555601, | ||
264 | 0x555701, 0x555801, 0x555901, 0x555a01, 0x555b01, 0x555c01, | ||
265 | 0x555d01, 0x555e01, 0x555f01, 0x556001, 0x556101, 0x556201, | ||
266 | 0x556301, 0x556401, 0x556501, 0x556601, 0x556701, 0x556801, | ||
267 | 0x556901, 0x556a01, 0x556b01, 0x556c01, 0x556d01, 0x556e01, | ||
268 | 0x556f01, 0x557001, 0x557101, 0x557201, 0x557301, 0x557401, | ||
269 | 0x557501, 0x557601, 0x557701, 0x557801, 0x557901, 0x557a01, | ||
270 | 0x557b01, 0x557c01, 0x557d01, 0x557e01, 0x557f01}}}}, {pge = {{ | ||
271 | ste = {0x0 <repeats 64 times>}}}} <repeats 51 times>, {pge = {{ste = { | ||
272 | 0x248001, 0x248101, 0x248201, 0x248301, 0x248401, 0x248501, | ||
273 | 0x248601, 0x248701, 0x248801, 0x248901, 0x248a01, 0x248b01, | ||
274 | 0x248c01, 0x248d01, 0x248e01, 0x248f01, 0x249001, 0x249101, | ||
275 | 0x249201, 0x249301, 0x249401, 0x249501, 0x249601, 0x249701, | ||
276 | 0x249801, 0x249901, 0x249a01, 0x249b01, 0x249c01, 0x249d01, | ||
277 | 0x249e01, 0x249f01, 0x24a001, 0x24a101, 0x24a201, 0x24a301, | ||
278 | 0x24a401, 0x24a501, 0x24a601, 0x24a701, 0x24a801, 0x24a901, | ||
279 | 0x24aa01, 0x24ab01, 0x24ac01, 0x24ad01, 0x24ae01, 0x24af01, | ||
280 | 0x24b001, 0x24b101, 0x24b201, 0x24b301, 0x24b401, 0x24b501, | ||
281 | 0x24b601, 0x24b701, 0x24b801, 0x24b901, 0x24ba01, 0x24bb01, | ||
282 | 0x24bc01, 0x24bd01, 0x24be01, 0x24bf01}}}}, {pge = {{ste = { | ||
283 | 0x0 <repeats 64 times>}}}} <repeats 11 times>} | ||
284 | |||
285 | (*) The PTD last used by the instruction TLB miss handler is attached to DAMR4. | ||
286 | (*) The PTD last used by the data TLB miss handler is attached to DAMR5. | ||
287 | |||
288 | These can be viewed with the _ptd_i and _ptd_d GDB macros: | ||
289 | |||
290 | (gdb) _ptd_d | ||
291 | $5 = {{pte = 0x0} <repeats 127 times>, {pte = 0x539b01}, { | ||
292 | pte = 0x0} <repeats 896 times>, {pte = 0x719303}, {pte = 0x6d5303}, { | ||
293 | pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, { | ||
294 | pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x6a1303}, { | ||
295 | pte = 0x0} <repeats 12 times>, {pte = 0x709303}, {pte = 0x0}, {pte = 0x0}, | ||
296 | {pte = 0x6fd303}, {pte = 0x6f9303}, {pte = 0x6f5303}, {pte = 0x0}, { | ||
297 | pte = 0x6ed303}, {pte = 0x531b01}, {pte = 0x50db01}, { | ||
298 | pte = 0x0} <repeats 13 times>, {pte = 0x5303}, {pte = 0x7f5303}, { | ||
299 | pte = 0x509b01}, {pte = 0x505b01}, {pte = 0x7c9303}, {pte = 0x7b9303}, { | ||
300 | pte = 0x7b5303}, {pte = 0x7b1303}, {pte = 0x7ad303}, {pte = 0x0}, { | ||
301 | pte = 0x0}, {pte = 0x7a1303}, {pte = 0x0}, {pte = 0x795303}, {pte = 0x0}, { | ||
302 | pte = 0x78d303}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, { | ||
303 | pte = 0x0}, {pte = 0x775303}, {pte = 0x771303}, {pte = 0x76d303}, { | ||
304 | pte = 0x0}, {pte = 0x765303}, {pte = 0x7c5303}, {pte = 0x501b01}, { | ||
305 | pte = 0x4f1b01}, {pte = 0x4edb01}, {pte = 0x0}, {pte = 0x4f9b01}, { | ||
306 | pte = 0x4fdb01}, {pte = 0x0} <repeats 2992 times>} | ||
diff --git a/MAINTAINERS b/MAINTAINERS index 69123be5bb64..3655d284af20 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -5799,10 +5799,6 @@ F: fs/crypto/ | |||
5799 | F: include/linux/fscrypt*.h | 5799 | F: include/linux/fscrypt*.h |
5800 | F: Documentation/filesystems/fscrypt.rst | 5800 | F: Documentation/filesystems/fscrypt.rst |
5801 | 5801 | ||
5802 | FUJITSU FR-V (FRV) PORT | ||
5803 | S: Orphan | ||
5804 | F: arch/frv/ | ||
5805 | |||
5806 | FUJITSU LAPTOP EXTRAS | 5802 | FUJITSU LAPTOP EXTRAS |
5807 | M: Jonathan Woithe <jwoithe@just42.net> | 5803 | M: Jonathan Woithe <jwoithe@just42.net> |
5808 | L: platform-driver-x86@vger.kernel.org | 5804 | L: platform-driver-x86@vger.kernel.org |
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig deleted file mode 100644 index af369b05fed5..000000000000 --- a/arch/frv/Kconfig +++ /dev/null | |||
@@ -1,386 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | config FRV | ||
3 | bool | ||
4 | default y | ||
5 | select HAVE_IDE | ||
6 | select HAVE_ARCH_TRACEHOOK | ||
7 | select HAVE_PERF_EVENTS | ||
8 | select HAVE_UID16 | ||
9 | select VIRT_TO_BUS | ||
10 | select GENERIC_IRQ_SHOW | ||
11 | select HAVE_DEBUG_BUGVERBOSE | ||
12 | select ARCH_HAVE_NMI_SAFE_CMPXCHG | ||
13 | select GENERIC_CPU_DEVICES | ||
14 | select ARCH_HAS_DEVMEM_IS_ALLOWED | ||
15 | select ARCH_WANT_IPC_PARSE_VERSION | ||
16 | select OLD_SIGSUSPEND3 | ||
17 | select OLD_SIGACTION | ||
18 | select HAVE_DEBUG_STACKOVERFLOW | ||
19 | select ARCH_NO_COHERENT_DMA_MMAP | ||
20 | |||
21 | config CPU_BIG_ENDIAN | ||
22 | def_bool y | ||
23 | |||
24 | config ZONE_DMA | ||
25 | bool | ||
26 | default y | ||
27 | |||
28 | config RWSEM_GENERIC_SPINLOCK | ||
29 | bool | ||
30 | default y | ||
31 | |||
32 | config RWSEM_XCHGADD_ALGORITHM | ||
33 | bool | ||
34 | |||
35 | config GENERIC_HWEIGHT | ||
36 | bool | ||
37 | default y | ||
38 | |||
39 | config GENERIC_CALIBRATE_DELAY | ||
40 | bool | ||
41 | default n | ||
42 | |||
43 | config TIME_LOW_RES | ||
44 | bool | ||
45 | default y | ||
46 | |||
47 | config QUICKLIST | ||
48 | bool | ||
49 | default y | ||
50 | |||
51 | config ARCH_HAS_ILOG2_U32 | ||
52 | bool | ||
53 | default y | ||
54 | |||
55 | config ARCH_HAS_ILOG2_U64 | ||
56 | bool | ||
57 | default y | ||
58 | |||
59 | config HZ | ||
60 | int | ||
61 | default 1000 | ||
62 | |||
63 | source "init/Kconfig" | ||
64 | |||
65 | source "kernel/Kconfig.freezer" | ||
66 | |||
67 | |||
68 | menu "Fujitsu FR-V system setup" | ||
69 | |||
70 | config MMU | ||
71 | bool "MMU support" | ||
72 | help | ||
73 | This options switches on and off support for the FR-V MMU | ||
74 | (effectively switching between vmlinux and uClinux). Not all FR-V | ||
75 | CPUs support this. Currently only the FR451 has a sufficiently | ||
76 | featured MMU. | ||
77 | |||
78 | config FRV_OUTOFLINE_ATOMIC_OPS | ||
79 | bool "Out-of-line the FRV atomic operations" | ||
80 | default n | ||
81 | help | ||
82 | Setting this option causes the FR-V atomic operations to be mostly | ||
83 | implemented out-of-line. | ||
84 | |||
85 | See Documentation/frv/atomic-ops.txt for more information. | ||
86 | |||
87 | config HIGHMEM | ||
88 | bool "High memory support" | ||
89 | depends on MMU | ||
90 | default y | ||
91 | help | ||
92 | If you wish to use more than 256MB of memory with your MMU based | ||
93 | system, you will need to select this option. The kernel can only see | ||
94 | the memory between 0xC0000000 and 0xD0000000 directly... everything | ||
95 | else must be kmapped. | ||
96 | |||
97 | The arch is, however, capable of supporting up to 3GB of SDRAM. | ||
98 | |||
99 | config HIGHPTE | ||
100 | bool "Allocate page tables in highmem" | ||
101 | depends on HIGHMEM | ||
102 | default y | ||
103 | help | ||
104 | The VM uses one page of memory for each page table. For systems | ||
105 | with a lot of RAM, this can be wasteful of precious low memory. | ||
106 | Setting this option will put user-space page tables in high memory. | ||
107 | |||
108 | source "mm/Kconfig" | ||
109 | |||
110 | choice | ||
111 | prompt "uClinux kernel load address" | ||
112 | depends on !MMU | ||
113 | default UCPAGE_OFFSET_C0000000 | ||
114 | help | ||
115 | This option sets the base address for the uClinux kernel. The kernel | ||
116 | will rearrange the SDRAM layout to start at this address, and move | ||
117 | itself to start there. It must be greater than 0, and it must be | ||
118 | sufficiently less than 0xE0000000 that the SDRAM does not intersect | ||
119 | the I/O region. | ||
120 | |||
121 | The base address must also be aligned such that the SDRAM controller | ||
122 | can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned. | ||
123 | |||
124 | config UCPAGE_OFFSET_20000000 | ||
125 | bool "0x20000000" | ||
126 | |||
127 | config UCPAGE_OFFSET_40000000 | ||
128 | bool "0x40000000" | ||
129 | |||
130 | config UCPAGE_OFFSET_60000000 | ||
131 | bool "0x60000000" | ||
132 | |||
133 | config UCPAGE_OFFSET_80000000 | ||
134 | bool "0x80000000" | ||
135 | |||
136 | config UCPAGE_OFFSET_A0000000 | ||
137 | bool "0xA0000000" | ||
138 | |||
139 | config UCPAGE_OFFSET_C0000000 | ||
140 | bool "0xC0000000 (Recommended)" | ||
141 | |||
142 | endchoice | ||
143 | |||
144 | config PAGE_OFFSET | ||
145 | hex | ||
146 | default 0x20000000 if UCPAGE_OFFSET_20000000 | ||
147 | default 0x40000000 if UCPAGE_OFFSET_40000000 | ||
148 | default 0x60000000 if UCPAGE_OFFSET_60000000 | ||
149 | default 0x80000000 if UCPAGE_OFFSET_80000000 | ||
150 | default 0xA0000000 if UCPAGE_OFFSET_A0000000 | ||
151 | default 0xC0000000 | ||
152 | |||
153 | config PROTECT_KERNEL | ||
154 | bool "Protect core kernel against userspace" | ||
155 | depends on !MMU | ||
156 | default y | ||
157 | help | ||
158 | Selecting this option causes the uClinux kernel to change the | ||
159 | permittivity of DAMPR register covering the core kernel image to | ||
160 | prevent userspace accessing the underlying memory directly. | ||
161 | |||
162 | choice | ||
163 | prompt "CPU Caching mode" | ||
164 | default FRV_DEFL_CACHE_WBACK | ||
165 | help | ||
166 | This option determines the default caching mode for the kernel. | ||
167 | |||
168 | Write-Back caching mode involves the all reads and writes causing | ||
169 | the affected cacheline to be read into the cache first before being | ||
170 | operated upon. Memory is not then updated by a write until the cache | ||
171 | is filled and a cacheline needs to be displaced from the cache to | ||
172 | make room. Only at that point is it written back. | ||
173 | |||
174 | Write-Behind caching is similar to Write-Back caching, except that a | ||
175 | write won't fetch a cacheline into the cache if there isn't already | ||
176 | one there; it will write directly to memory instead. | ||
177 | |||
178 | Write-Through caching only fetches cachelines from memory on a | ||
179 | read. Writes always get written directly to memory. If the affected | ||
180 | cacheline is also in cache, it will be updated too. | ||
181 | |||
182 | The final option is to turn of caching entirely. | ||
183 | |||
184 | Note that not all CPUs support Write-Behind caching. If the CPU on | ||
185 | which the kernel is running doesn't, it'll fall back to Write-Back | ||
186 | caching. | ||
187 | |||
188 | config FRV_DEFL_CACHE_WBACK | ||
189 | bool "Write-Back" | ||
190 | |||
191 | config FRV_DEFL_CACHE_WBEHIND | ||
192 | bool "Write-Behind" | ||
193 | |||
194 | config FRV_DEFL_CACHE_WTHRU | ||
195 | bool "Write-Through" | ||
196 | |||
197 | config FRV_DEFL_CACHE_DISABLED | ||
198 | bool "Disabled" | ||
199 | |||
200 | endchoice | ||
201 | |||
202 | menu "CPU core support" | ||
203 | |||
204 | config CPU_FR401 | ||
205 | bool "Include FR401 core support" | ||
206 | depends on !MMU | ||
207 | default y | ||
208 | help | ||
209 | This enables support for the FR401, FR401A and FR403 CPUs | ||
210 | |||
211 | config CPU_FR405 | ||
212 | bool "Include FR405 core support" | ||
213 | depends on !MMU | ||
214 | default y | ||
215 | help | ||
216 | This enables support for the FR405 CPU | ||
217 | |||
218 | config CPU_FR451 | ||
219 | bool "Include FR451 core support" | ||
220 | default y | ||
221 | help | ||
222 | This enables support for the FR451 CPU | ||
223 | |||
224 | config CPU_FR451_COMPILE | ||
225 | bool "Specifically compile for FR451 core" | ||
226 | depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551 | ||
227 | default y | ||
228 | help | ||
229 | This causes appropriate flags to be passed to the compiler to | ||
230 | optimise for the FR451 CPU | ||
231 | |||
232 | config CPU_FR551 | ||
233 | bool "Include FR551 core support" | ||
234 | depends on !MMU | ||
235 | default y | ||
236 | help | ||
237 | This enables support for the FR555 CPU | ||
238 | |||
239 | config CPU_FR551_COMPILE | ||
240 | bool "Specifically compile for FR551 core" | ||
241 | depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451 | ||
242 | default y | ||
243 | help | ||
244 | This causes appropriate flags to be passed to the compiler to | ||
245 | optimise for the FR555 CPU | ||
246 | |||
247 | config FRV_L1_CACHE_SHIFT | ||
248 | int | ||
249 | default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451 | ||
250 | default "6" if CPU_FR551 | ||
251 | |||
252 | endmenu | ||
253 | |||
254 | choice | ||
255 | prompt "System support" | ||
256 | default MB93091_VDK | ||
257 | |||
258 | config MB93091_VDK | ||
259 | bool "MB93091 CPU board with or without motherboard" | ||
260 | |||
261 | config MB93093_PDK | ||
262 | bool "MB93093 PDK unit" | ||
263 | |||
264 | endchoice | ||
265 | |||
266 | if MB93091_VDK | ||
267 | choice | ||
268 | prompt "Motherboard support" | ||
269 | default MB93090_MB00 | ||
270 | |||
271 | config MB93090_MB00 | ||
272 | bool "Use the MB93090-MB00 motherboard" | ||
273 | help | ||
274 | Select this option if the MB93091 CPU board is going to be used with | ||
275 | a MB93090-MB00 VDK motherboard | ||
276 | |||
277 | config MB93091_NO_MB | ||
278 | bool "Use standalone" | ||
279 | help | ||
280 | Select this option if the MB93091 CPU board is going to be used | ||
281 | without a motherboard | ||
282 | |||
283 | endchoice | ||
284 | endif | ||
285 | |||
286 | config FUJITSU_MB93493 | ||
287 | bool "MB93493 Multimedia chip" | ||
288 | help | ||
289 | Select this option if the MB93493 multimedia chip is going to be | ||
290 | used. | ||
291 | |||
292 | choice | ||
293 | prompt "GP-Relative data support" | ||
294 | default GPREL_DATA_8 | ||
295 | help | ||
296 | This option controls what data, if any, should be placed in the GP | ||
297 | relative data sections. Using this means that the compiler can | ||
298 | generate accesses to the data using GR16-relative addressing which | ||
299 | is faster than absolute instructions and saves space (2 instructions | ||
300 | per access). | ||
301 | |||
302 | However, the GPREL region is limited in size because the immediate | ||
303 | value used in the load and store instructions is limited to a 12-bit | ||
304 | signed number. | ||
305 | |||
306 | So if the linker starts complaining that accesses to GPREL data are | ||
307 | out of range, try changing this option from the default. | ||
308 | |||
309 | Note that modules will always be compiled with this feature disabled | ||
310 | as the module data will not be in range of the GP base address. | ||
311 | |||
312 | config GPREL_DATA_8 | ||
313 | bool "Put data objects of up to 8 bytes into GP-REL" | ||
314 | |||
315 | config GPREL_DATA_4 | ||
316 | bool "Put data objects of up to 4 bytes into GP-REL" | ||
317 | |||
318 | config GPREL_DATA_NONE | ||
319 | bool "Don't use GP-REL" | ||
320 | |||
321 | endchoice | ||
322 | |||
323 | config FRV_ONCPU_SERIAL | ||
324 | bool "Use on-CPU serial ports" | ||
325 | select SERIAL_8250 | ||
326 | default y | ||
327 | |||
328 | config PCI | ||
329 | bool "Use PCI" | ||
330 | depends on MB93090_MB00 | ||
331 | default y | ||
332 | select GENERIC_PCI_IOMAP | ||
333 | help | ||
334 | Some FR-V systems (such as the MB93090-MB00 VDK) have PCI | ||
335 | onboard. If you have one of these boards and you wish to use the PCI | ||
336 | facilities, say Y here. | ||
337 | |||
338 | config RESERVE_DMA_COHERENT | ||
339 | bool "Reserve DMA coherent memory" | ||
340 | depends on PCI && !MMU | ||
341 | default y | ||
342 | help | ||
343 | Many PCI drivers require access to uncached memory for DMA device | ||
344 | communications (such as is done with some Ethernet buffer rings). If | ||
345 | a fully featured MMU is available, this can be done through page | ||
346 | table settings, but if not, a region has to be set aside and marked | ||
347 | with a special DAMPR register. | ||
348 | |||
349 | Setting this option causes uClinux to set aside a portion of the | ||
350 | available memory for use in this manner. The memory will then be | ||
351 | unavailable for normal kernel use. | ||
352 | |||
353 | source "drivers/pci/Kconfig" | ||
354 | |||
355 | source "drivers/pcmcia/Kconfig" | ||
356 | |||
357 | menu "Power management options" | ||
358 | |||
359 | config ARCH_SUSPEND_POSSIBLE | ||
360 | def_bool y | ||
361 | |||
362 | source kernel/power/Kconfig | ||
363 | endmenu | ||
364 | |||
365 | endmenu | ||
366 | |||
367 | |||
368 | menu "Executable formats" | ||
369 | |||
370 | source "fs/Kconfig.binfmt" | ||
371 | |||
372 | endmenu | ||
373 | |||
374 | source "net/Kconfig" | ||
375 | |||
376 | source "drivers/Kconfig" | ||
377 | |||
378 | source "fs/Kconfig" | ||
379 | |||
380 | source "arch/frv/Kconfig.debug" | ||
381 | |||
382 | source "security/Kconfig" | ||
383 | |||
384 | source "crypto/Kconfig" | ||
385 | |||
386 | source "lib/Kconfig" | ||
diff --git a/arch/frv/Kconfig.debug b/arch/frv/Kconfig.debug deleted file mode 100644 index ecab6d8a79ed..000000000000 --- a/arch/frv/Kconfig.debug +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | menu "Kernel hacking" | ||
3 | |||
4 | source "lib/Kconfig.debug" | ||
5 | |||
6 | config GDBSTUB | ||
7 | bool "Remote GDB kernel debugging" | ||
8 | depends on DEBUG_KERNEL | ||
9 | select DEBUG_INFO | ||
10 | select FRAME_POINTER | ||
11 | help | ||
12 | If you say Y here, it will be possible to remotely debug the kernel | ||
13 | using gdb. This enlarges your kernel ELF image disk size by several | ||
14 | megabytes and requires a machine with more than 16 MB, better 32 MB | ||
15 | RAM to avoid excessive linking time. This is only useful for kernel | ||
16 | hackers. If unsure, say N. | ||
17 | |||
18 | choice | ||
19 | prompt "GDB stub port" | ||
20 | default GDBSTUB_UART1 | ||
21 | depends on GDBSTUB | ||
22 | help | ||
23 | Select the on-CPU port used for GDB-stub | ||
24 | |||
25 | config GDBSTUB_UART0 | ||
26 | bool "/dev/ttyS0" | ||
27 | |||
28 | config GDBSTUB_UART1 | ||
29 | bool "/dev/ttyS1" | ||
30 | |||
31 | endchoice | ||
32 | |||
33 | config GDBSTUB_IMMEDIATE | ||
34 | bool "Break into GDB stub immediately" | ||
35 | depends on GDBSTUB | ||
36 | help | ||
37 | If you say Y here, GDB stub will break into the program as soon as | ||
38 | possible, leaving the program counter at the beginning of | ||
39 | start_kernel() in init/main.c. | ||
40 | |||
41 | config GDB_CONSOLE | ||
42 | bool "Console output to GDB" | ||
43 | depends on GDBSTUB | ||
44 | help | ||
45 | If you are using GDB for remote debugging over a serial port and | ||
46 | would like kernel messages to be formatted into GDB $O packets so | ||
47 | that GDB prints them as program output, say 'Y'. | ||
48 | |||
49 | endmenu | ||
diff --git a/arch/frv/Makefile b/arch/frv/Makefile deleted file mode 100644 index 2a8fb730d1ca..000000000000 --- a/arch/frv/Makefile +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | # | ||
2 | # frv/Makefile | ||
3 | # | ||
4 | # This file is included by the global makefile so that you can add your own | ||
5 | # architecture-specific flags and dependencies. Remember to do have actions | ||
6 | # for "archclean" and "archdep" for cleaning up and making dependencies for | ||
7 | # this architecture | ||
8 | # | ||
9 | # This file is subject to the terms and conditions of the GNU General Public | ||
10 | # License. See the file "COPYING" in the main directory of this archive | ||
11 | # for more details. | ||
12 | # | ||
13 | # Copyright (c) 2003, 2004 Red Hat Inc. | ||
14 | # - Written by David Howells <dhowells@redhat.com> | ||
15 | # - Derived from arch/m68knommu/Makefile, | ||
16 | # Copyright (c) 1999,2001 D. Jeff Dionne <jeff@lineo.ca>, | ||
17 | # Rt-Control Inc. / Lineo, Inc. | ||
18 | # | ||
19 | # Copyright (C) 1998,1999 D. Jeff Dionne <jeff@uclinux.org>, | ||
20 | # Kenneth Albanowski <kjahds@kjahds.com>, | ||
21 | # | ||
22 | # Based on arch/m68k/Makefile: | ||
23 | # Copyright (C) 1994 by Hamish Macdonald | ||
24 | # | ||
25 | |||
26 | ifdef CONFIG_MMU | ||
27 | UTS_SYSNAME = -DUTS_SYSNAME=\"Linux\" | ||
28 | else | ||
29 | UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\" | ||
30 | endif | ||
31 | |||
32 | KBUILD_AFLAGS_MODULE += -G0 -mlong-calls | ||
33 | KBUILD_CFLAGS_MODULE += -G0 -mlong-calls | ||
34 | |||
35 | ifdef CONFIG_GPREL_DATA_8 | ||
36 | KBUILD_CFLAGS += -G8 | ||
37 | else | ||
38 | ifdef CONFIG_GPREL_DATA_4 | ||
39 | KBUILD_CFLAGS += -G4 | ||
40 | else | ||
41 | ifdef CONFIG_GPREL_DATA_NONE | ||
42 | KBUILD_CFLAGS += -G0 | ||
43 | endif | ||
44 | endif | ||
45 | endif | ||
46 | |||
47 | #LDFLAGS_vmlinux := -Map linkmap.txt | ||
48 | |||
49 | ifdef CONFIG_GC_SECTIONS | ||
50 | KBUILD_CFLAGS += -ffunction-sections -fdata-sections | ||
51 | endif | ||
52 | |||
53 | ifndef CONFIG_FRAME_POINTER | ||
54 | KBUILD_CFLAGS += -mno-linked-fp | ||
55 | endif | ||
56 | |||
57 | ifdef CONFIG_CPU_FR451_COMPILE | ||
58 | KBUILD_CFLAGS += -mcpu=fr450 | ||
59 | KBUILD_AFLAGS += -mcpu=fr450 | ||
60 | else | ||
61 | ifdef CONFIG_CPU_FR551_COMPILE | ||
62 | KBUILD_CFLAGS += -mcpu=fr550 | ||
63 | KBUILD_AFLAGS += -mcpu=fr550 | ||
64 | else | ||
65 | KBUILD_CFLAGS += -mcpu=fr400 | ||
66 | KBUILD_AFLAGS += -mcpu=fr400 | ||
67 | endif | ||
68 | endif | ||
69 | |||
70 | # pretend the kernel is going to run on an FR400 with no media-fp unit | ||
71 | # - reserve CC3 for use with atomic ops | ||
72 | # - all the extra registers are dealt with only at context switch time | ||
73 | KBUILD_CFLAGS += -mno-fdpic -mgpr-32 -msoft-float -mno-media | ||
74 | KBUILD_CFLAGS += -ffixed-fcc3 -ffixed-cc3 -ffixed-gr15 -ffixed-icc2 | ||
75 | KBUILD_AFLAGS += -mno-fdpic | ||
76 | |||
77 | head-y := arch/frv/kernel/head.o | ||
78 | |||
79 | core-y += arch/frv/kernel/ arch/frv/mm/ | ||
80 | libs-y += arch/frv/lib/ | ||
81 | |||
82 | core-$(CONFIG_MB93090_MB00) += arch/frv/mb93090-mb00/ | ||
83 | |||
84 | all: Image | ||
85 | |||
86 | Image: vmlinux | ||
87 | $(Q)$(MAKE) $(build)=arch/frv/boot $@ | ||
88 | |||
89 | archclean: | ||
90 | $(Q)$(MAKE) $(clean)=arch/frv/boot | ||
diff --git a/arch/frv/boot/Makefile b/arch/frv/boot/Makefile deleted file mode 100644 index 636d5bbcd53f..000000000000 --- a/arch/frv/boot/Makefile +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | # | ||
2 | # arch/arm/boot/Makefile | ||
3 | # | ||
4 | # This file is subject to the terms and conditions of the GNU General Public | ||
5 | # License. See the file "COPYING" in the main directory of this archive | ||
6 | # for more details. | ||
7 | # | ||
8 | # Copyright (C) 1995-2000 Russell King | ||
9 | # | ||
10 | |||
11 | targets := Image zImage bootpImage | ||
12 | |||
13 | SYSTEM =$(LINUX) | ||
14 | |||
15 | ZTEXTADDR = 0x02080000 | ||
16 | PARAMS_PHYS = 0x0207c000 | ||
17 | INITRD_PHYS = 0x02180000 | ||
18 | INITRD_VIRT = 0x02180000 | ||
19 | |||
20 | OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment | ||
21 | |||
22 | # | ||
23 | # If you don't define ZRELADDR above, | ||
24 | # then it defaults to ZTEXTADDR | ||
25 | # | ||
26 | ifeq ($(ZRELADDR),) | ||
27 | ZRELADDR = $(ZTEXTADDR) | ||
28 | endif | ||
29 | |||
30 | export SYSTEM ZTEXTADDR ZBSSADDR ZRELADDR INITRD_PHYS INITRD_VIRT PARAMS_PHYS | ||
31 | |||
32 | Image: $(obj)/Image | ||
33 | |||
34 | targets: $(obj)/Image | ||
35 | |||
36 | $(obj)/Image: vmlinux FORCE | ||
37 | $(OBJCOPY) $(OBJCOPYFLAGS) -S vmlinux $@ | ||
38 | |||
39 | #$(obj)/Image: $(CONFIGURE) $(SYSTEM) | ||
40 | # $(OBJCOPY) $(OBJCOPYFLAGS) -g -S $(SYSTEM) $@ | ||
41 | |||
42 | bzImage: zImage | ||
43 | |||
44 | zImage: $(CONFIGURE) compressed/$(LINUX) | ||
45 | $(OBJCOPY) $(OBJCOPYFLAGS) -S compressed/$(LINUX) $@ | ||
46 | |||
47 | bootpImage: bootp/bootp | ||
48 | $(OBJCOPY) $(OBJCOPYFLAGS) -S bootp/bootp $@ | ||
49 | |||
50 | compressed/$(LINUX): $(LINUX) dep | ||
51 | @$(MAKE) -C compressed $(LINUX) | ||
52 | |||
53 | bootp/bootp: zImage initrd | ||
54 | @$(MAKE) -C bootp bootp | ||
55 | |||
56 | initrd: | ||
57 | @test "$(INITRD_VIRT)" != "" || (echo This architecture does not support INITRD; exit -1) | ||
58 | @test "$(INITRD)" != "" || (echo You must specify INITRD; exit -1) | ||
59 | |||
60 | # | ||
61 | # installation | ||
62 | # | ||
63 | install: $(CONFIGURE) Image | ||
64 | sh ./install.sh $(KERNELRELEASE) Image System.map "$(INSTALL_PATH)" | ||
65 | |||
66 | zinstall: $(CONFIGURE) zImage | ||
67 | sh ./install.sh $(KERNELRELEASE) zImage System.map "$(INSTALL_PATH)" | ||
68 | |||
69 | # | ||
70 | # miscellany | ||
71 | # | ||
72 | mrproper clean: | ||
73 | # @$(MAKE) -C compressed clean | ||
74 | # @$(MAKE) -C bootp clean | ||
75 | |||
76 | dep: | ||
diff --git a/arch/frv/defconfig b/arch/frv/defconfig deleted file mode 100644 index b1b792610fdf..000000000000 --- a/arch/frv/defconfig +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
6 | CONFIG_EXPERT=y | ||
7 | # CONFIG_HOTPLUG is not set | ||
8 | CONFIG_MMU=y | ||
9 | CONFIG_FRV_OUTOFLINE_ATOMIC_OPS=y | ||
10 | CONFIG_FRV_DEFL_CACHE_WTHRU=y | ||
11 | CONFIG_GPREL_DATA_4=y | ||
12 | CONFIG_NET=y | ||
13 | CONFIG_PACKET=y | ||
14 | CONFIG_UNIX=y | ||
15 | CONFIG_INET=y | ||
16 | CONFIG_IP_PNP=y | ||
17 | # CONFIG_IPV6 is not set | ||
18 | # CONFIG_STANDALONE is not set | ||
19 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
20 | CONFIG_NETDEVICES=y | ||
21 | CONFIG_NET_ETHERNET=y | ||
22 | CONFIG_MII=y | ||
23 | CONFIG_NET_PCI=y | ||
24 | CONFIG_NE2K_PCI=y | ||
25 | # CONFIG_INPUT is not set | ||
26 | # CONFIG_SERIO is not set | ||
27 | # CONFIG_VT is not set | ||
28 | CONFIG_SERIAL_8250_CONSOLE=y | ||
29 | CONFIG_SERIAL_8250_NR_UARTS=1 | ||
30 | CONFIG_SERIAL_8250_RUNTIME_UARTS=1 | ||
31 | CONFIG_SERIAL_8250_EXTENDED=y | ||
32 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
33 | # CONFIG_LEGACY_PTYS is not set | ||
34 | CONFIG_TMPFS=y | ||
35 | CONFIG_NFS_FS=y | ||
36 | CONFIG_ROOT_NFS=y | ||
37 | CONFIG_DEBUG_KERNEL=y | ||
38 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
39 | CONFIG_DEBUG_STACKOVERFLOW=y | ||
diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild deleted file mode 100644 index b16b9c48ea09..000000000000 --- a/arch/frv/include/asm/Kbuild +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | |||
2 | generic-y += device.h | ||
3 | generic-y += exec.h | ||
4 | generic-y += extable.h | ||
5 | generic-y += fb.h | ||
6 | generic-y += irq_work.h | ||
7 | generic-y += mcs_spinlock.h | ||
8 | generic-y += mm-arch-hooks.h | ||
9 | generic-y += preempt.h | ||
10 | generic-y += trace_clock.h | ||
11 | generic-y += word-at-a-time.h | ||
12 | generic-y += kprobes.h | ||
diff --git a/arch/frv/include/asm/asm-offsets.h b/arch/frv/include/asm/asm-offsets.h deleted file mode 100644 index d370ee36a182..000000000000 --- a/arch/frv/include/asm/asm-offsets.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <generated/asm-offsets.h> | ||
diff --git a/arch/frv/include/asm/atomic.h b/arch/frv/include/asm/atomic.h deleted file mode 100644 index e93c9494503a..000000000000 --- a/arch/frv/include/asm/atomic.h +++ /dev/null | |||
@@ -1,224 +0,0 @@ | |||
1 | /* atomic.h: atomic operation emulation for FR-V | ||
2 | * | ||
3 | * For an explanation of how atomic ops work in this arch, see: | ||
4 | * Documentation/frv/atomic-ops.txt | ||
5 | * | ||
6 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
7 | * Written by David Howells (dhowells@redhat.com) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | #ifndef _ASM_ATOMIC_H | ||
15 | #define _ASM_ATOMIC_H | ||
16 | |||
17 | #include <linux/types.h> | ||
18 | #include <asm/cmpxchg.h> | ||
19 | #include <asm/barrier.h> | ||
20 | |||
21 | #ifdef CONFIG_SMP | ||
22 | #error not SMP safe | ||
23 | #endif | ||
24 | |||
25 | #include <asm/atomic_defs.h> | ||
26 | |||
27 | /* | ||
28 | * Atomic operations that C can't guarantee us. Useful for | ||
29 | * resource counting etc.. | ||
30 | * | ||
31 | * We do not have SMP systems, so we don't have to deal with that. | ||
32 | */ | ||
33 | |||
34 | #define ATOMIC_INIT(i) { (i) } | ||
35 | #define atomic_read(v) READ_ONCE((v)->counter) | ||
36 | #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) | ||
37 | |||
38 | static inline int atomic_inc_return(atomic_t *v) | ||
39 | { | ||
40 | return __atomic_add_return(1, &v->counter); | ||
41 | } | ||
42 | |||
43 | static inline int atomic_dec_return(atomic_t *v) | ||
44 | { | ||
45 | return __atomic_sub_return(1, &v->counter); | ||
46 | } | ||
47 | |||
48 | static inline int atomic_add_return(int i, atomic_t *v) | ||
49 | { | ||
50 | return __atomic_add_return(i, &v->counter); | ||
51 | } | ||
52 | |||
53 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
54 | { | ||
55 | return __atomic_sub_return(i, &v->counter); | ||
56 | } | ||
57 | |||
58 | static inline int atomic_add_negative(int i, atomic_t *v) | ||
59 | { | ||
60 | return atomic_add_return(i, v) < 0; | ||
61 | } | ||
62 | |||
63 | static inline void atomic_inc(atomic_t *v) | ||
64 | { | ||
65 | atomic_inc_return(v); | ||
66 | } | ||
67 | |||
68 | static inline void atomic_dec(atomic_t *v) | ||
69 | { | ||
70 | atomic_dec_return(v); | ||
71 | } | ||
72 | |||
73 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) | ||
74 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | ||
75 | #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) | ||
76 | |||
77 | /* | ||
78 | * 64-bit atomic ops | ||
79 | */ | ||
80 | typedef struct { | ||
81 | long long counter; | ||
82 | } atomic64_t; | ||
83 | |||
84 | #define ATOMIC64_INIT(i) { (i) } | ||
85 | |||
86 | static inline long long atomic64_read(const atomic64_t *v) | ||
87 | { | ||
88 | long long counter; | ||
89 | |||
90 | asm("ldd%I1 %M1,%0" | ||
91 | : "=e"(counter) | ||
92 | : "m"(v->counter)); | ||
93 | |||
94 | return counter; | ||
95 | } | ||
96 | |||
97 | static inline void atomic64_set(atomic64_t *v, long long i) | ||
98 | { | ||
99 | asm volatile("std%I0 %1,%M0" | ||
100 | : "=m"(v->counter) | ||
101 | : "e"(i)); | ||
102 | } | ||
103 | |||
104 | static inline long long atomic64_inc_return(atomic64_t *v) | ||
105 | { | ||
106 | return __atomic64_add_return(1, &v->counter); | ||
107 | } | ||
108 | |||
109 | static inline long long atomic64_dec_return(atomic64_t *v) | ||
110 | { | ||
111 | return __atomic64_sub_return(1, &v->counter); | ||
112 | } | ||
113 | |||
114 | static inline long long atomic64_add_return(long long i, atomic64_t *v) | ||
115 | { | ||
116 | return __atomic64_add_return(i, &v->counter); | ||
117 | } | ||
118 | |||
119 | static inline long long atomic64_sub_return(long long i, atomic64_t *v) | ||
120 | { | ||
121 | return __atomic64_sub_return(i, &v->counter); | ||
122 | } | ||
123 | |||
124 | static inline long long atomic64_add_negative(long long i, atomic64_t *v) | ||
125 | { | ||
126 | return atomic64_add_return(i, v) < 0; | ||
127 | } | ||
128 | |||
129 | static inline void atomic64_inc(atomic64_t *v) | ||
130 | { | ||
131 | atomic64_inc_return(v); | ||
132 | } | ||
133 | |||
134 | static inline void atomic64_dec(atomic64_t *v) | ||
135 | { | ||
136 | atomic64_dec_return(v); | ||
137 | } | ||
138 | |||
139 | #define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0) | ||
140 | #define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) | ||
141 | #define atomic64_inc_and_test(v) (atomic64_inc_return((v)) == 0) | ||
142 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) | ||
143 | |||
144 | #define atomic_cmpxchg(v, old, new) (cmpxchg(&(v)->counter, old, new)) | ||
145 | #define atomic_xchg(v, new) (xchg(&(v)->counter, new)) | ||
146 | #define atomic64_cmpxchg(v, old, new) (__cmpxchg_64(old, new, &(v)->counter)) | ||
147 | #define atomic64_xchg(v, new) (__xchg_64(new, &(v)->counter)) | ||
148 | |||
149 | static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) | ||
150 | { | ||
151 | int c, old; | ||
152 | c = atomic_read(v); | ||
153 | for (;;) { | ||
154 | if (unlikely(c == (u))) | ||
155 | break; | ||
156 | old = atomic_cmpxchg((v), c, c + (a)); | ||
157 | if (likely(old == c)) | ||
158 | break; | ||
159 | c = old; | ||
160 | } | ||
161 | return c; | ||
162 | } | ||
163 | |||
164 | static inline int atomic64_add_unless(atomic64_t *v, long long i, long long u) | ||
165 | { | ||
166 | long long c, old; | ||
167 | |||
168 | c = atomic64_read(v); | ||
169 | for (;;) { | ||
170 | if (unlikely(c == u)) | ||
171 | break; | ||
172 | old = atomic64_cmpxchg(v, c, c + i); | ||
173 | if (likely(old == c)) | ||
174 | break; | ||
175 | c = old; | ||
176 | } | ||
177 | return c != u; | ||
178 | } | ||
179 | |||
180 | static inline long long atomic64_dec_if_positive(atomic64_t *v) | ||
181 | { | ||
182 | long long c, old, dec; | ||
183 | |||
184 | c = atomic64_read(v); | ||
185 | for (;;) { | ||
186 | dec = c - 1; | ||
187 | if (unlikely(dec < 0)) | ||
188 | break; | ||
189 | old = atomic64_cmpxchg((v), c, dec); | ||
190 | if (likely(old == c)) | ||
191 | break; | ||
192 | c = old; | ||
193 | } | ||
194 | return dec; | ||
195 | } | ||
196 | |||
197 | #define ATOMIC_OP(op) \ | ||
198 | static inline int atomic_fetch_##op(int i, atomic_t *v) \ | ||
199 | { \ | ||
200 | return __atomic32_fetch_##op(i, &v->counter); \ | ||
201 | } \ | ||
202 | static inline void atomic_##op(int i, atomic_t *v) \ | ||
203 | { \ | ||
204 | (void)__atomic32_fetch_##op(i, &v->counter); \ | ||
205 | } \ | ||
206 | \ | ||
207 | static inline long long atomic64_fetch_##op(long long i, atomic64_t *v) \ | ||
208 | { \ | ||
209 | return __atomic64_fetch_##op(i, &v->counter); \ | ||
210 | } \ | ||
211 | static inline void atomic64_##op(long long i, atomic64_t *v) \ | ||
212 | { \ | ||
213 | (void)__atomic64_fetch_##op(i, &v->counter); \ | ||
214 | } | ||
215 | |||
216 | ATOMIC_OP(or) | ||
217 | ATOMIC_OP(and) | ||
218 | ATOMIC_OP(xor) | ||
219 | ATOMIC_OP(add) | ||
220 | ATOMIC_OP(sub) | ||
221 | |||
222 | #undef ATOMIC_OP | ||
223 | |||
224 | #endif /* _ASM_ATOMIC_H */ | ||
diff --git a/arch/frv/include/asm/atomic_defs.h b/arch/frv/include/asm/atomic_defs.h deleted file mode 100644 index ce3b8a4efc12..000000000000 --- a/arch/frv/include/asm/atomic_defs.h +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | |||
3 | #include <asm/spr-regs.h> | ||
4 | |||
5 | #ifdef __ATOMIC_LIB__ | ||
6 | |||
7 | #ifdef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS | ||
8 | |||
9 | #define ATOMIC_QUALS | ||
10 | #define ATOMIC_EXPORT(x) EXPORT_SYMBOL(x) | ||
11 | |||
12 | #else /* !OUTOFLINE && LIB */ | ||
13 | |||
14 | #define ATOMIC_OP_RETURN(op) | ||
15 | #define ATOMIC_FETCH_OP(op) | ||
16 | |||
17 | #endif /* OUTOFLINE */ | ||
18 | |||
19 | #else /* !__ATOMIC_LIB__ */ | ||
20 | |||
21 | #define ATOMIC_EXPORT(x) | ||
22 | |||
23 | #ifdef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS | ||
24 | |||
25 | #define ATOMIC_OP_RETURN(op) \ | ||
26 | extern int __atomic_##op##_return(int i, int *v); \ | ||
27 | extern long long __atomic64_##op##_return(long long i, long long *v); | ||
28 | |||
29 | #define ATOMIC_FETCH_OP(op) \ | ||
30 | extern int __atomic32_fetch_##op(int i, int *v); \ | ||
31 | extern long long __atomic64_fetch_##op(long long i, long long *v); | ||
32 | |||
33 | #else /* !OUTOFLINE && !LIB */ | ||
34 | |||
35 | #define ATOMIC_QUALS static inline | ||
36 | |||
37 | #endif /* OUTOFLINE */ | ||
38 | #endif /* __ATOMIC_LIB__ */ | ||
39 | |||
40 | |||
41 | /* | ||
42 | * Note on the 64 bit inline asm variants... | ||
43 | * | ||
44 | * CSTD is a conditional instruction and needs a constrained memory reference. | ||
45 | * Normally 'U' provides the correct constraints for conditional instructions | ||
46 | * and this is used for the 32 bit version, however 'U' does not appear to work | ||
47 | * for 64 bit values (gcc-4.9) | ||
48 | * | ||
49 | * The exact constraint is that conditional instructions cannot deal with an | ||
50 | * immediate displacement in the memory reference, so what we do is we read the | ||
51 | * address through a volatile cast into a local variable in order to insure we | ||
52 | * _have_ to compute the correct address without displacement. This allows us | ||
53 | * to use the regular 'm' for the memory address. | ||
54 | * | ||
55 | * Furthermore, the %Ln operand, which prints the low word register (r+1), | ||
56 | * really only works for registers, this means we cannot allow immediate values | ||
57 | * for the 64 bit versions -- like we do for the 32 bit ones. | ||
58 | * | ||
59 | */ | ||
60 | |||
61 | #ifndef ATOMIC_OP_RETURN | ||
62 | #define ATOMIC_OP_RETURN(op) \ | ||
63 | ATOMIC_QUALS int __atomic_##op##_return(int i, int *v) \ | ||
64 | { \ | ||
65 | int val; \ | ||
66 | \ | ||
67 | asm volatile( \ | ||
68 | "0: \n" \ | ||
69 | " orcc gr0,gr0,gr0,icc3 \n" \ | ||
70 | " ckeq icc3,cc7 \n" \ | ||
71 | " ld.p %M0,%1 \n" \ | ||
72 | " orcr cc7,cc7,cc3 \n" \ | ||
73 | " "#op"%I2 %1,%2,%1 \n" \ | ||
74 | " cst.p %1,%M0 ,cc3,#1 \n" \ | ||
75 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" \ | ||
76 | " beq icc3,#0,0b \n" \ | ||
77 | : "+U"(*v), "=&r"(val) \ | ||
78 | : "NPr"(i) \ | ||
79 | : "memory", "cc7", "cc3", "icc3" \ | ||
80 | ); \ | ||
81 | \ | ||
82 | return val; \ | ||
83 | } \ | ||
84 | ATOMIC_EXPORT(__atomic_##op##_return); \ | ||
85 | \ | ||
86 | ATOMIC_QUALS long long __atomic64_##op##_return(long long i, long long *v) \ | ||
87 | { \ | ||
88 | long long *__v = READ_ONCE(v); \ | ||
89 | long long val; \ | ||
90 | \ | ||
91 | asm volatile( \ | ||
92 | "0: \n" \ | ||
93 | " orcc gr0,gr0,gr0,icc3 \n" \ | ||
94 | " ckeq icc3,cc7 \n" \ | ||
95 | " ldd.p %M0,%1 \n" \ | ||
96 | " orcr cc7,cc7,cc3 \n" \ | ||
97 | " "#op"cc %L1,%L2,%L1,icc0 \n" \ | ||
98 | " "#op"x %1,%2,%1,icc0 \n" \ | ||
99 | " cstd.p %1,%M0 ,cc3,#1 \n" \ | ||
100 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" \ | ||
101 | " beq icc3,#0,0b \n" \ | ||
102 | : "+m"(*__v), "=&e"(val) \ | ||
103 | : "e"(i) \ | ||
104 | : "memory", "cc7", "cc3", "icc0", "icc3" \ | ||
105 | ); \ | ||
106 | \ | ||
107 | return val; \ | ||
108 | } \ | ||
109 | ATOMIC_EXPORT(__atomic64_##op##_return); | ||
110 | #endif | ||
111 | |||
112 | #ifndef ATOMIC_FETCH_OP | ||
113 | #define ATOMIC_FETCH_OP(op) \ | ||
114 | ATOMIC_QUALS int __atomic32_fetch_##op(int i, int *v) \ | ||
115 | { \ | ||
116 | int old, tmp; \ | ||
117 | \ | ||
118 | asm volatile( \ | ||
119 | "0: \n" \ | ||
120 | " orcc gr0,gr0,gr0,icc3 \n" \ | ||
121 | " ckeq icc3,cc7 \n" \ | ||
122 | " ld.p %M0,%1 \n" \ | ||
123 | " orcr cc7,cc7,cc3 \n" \ | ||
124 | " "#op"%I3 %1,%3,%2 \n" \ | ||
125 | " cst.p %2,%M0 ,cc3,#1 \n" \ | ||
126 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" \ | ||
127 | " beq icc3,#0,0b \n" \ | ||
128 | : "+U"(*v), "=&r"(old), "=r"(tmp) \ | ||
129 | : "NPr"(i) \ | ||
130 | : "memory", "cc7", "cc3", "icc3" \ | ||
131 | ); \ | ||
132 | \ | ||
133 | return old; \ | ||
134 | } \ | ||
135 | ATOMIC_EXPORT(__atomic32_fetch_##op); \ | ||
136 | \ | ||
137 | ATOMIC_QUALS long long __atomic64_fetch_##op(long long i, long long *v) \ | ||
138 | { \ | ||
139 | long long *__v = READ_ONCE(v); \ | ||
140 | long long old, tmp; \ | ||
141 | \ | ||
142 | asm volatile( \ | ||
143 | "0: \n" \ | ||
144 | " orcc gr0,gr0,gr0,icc3 \n" \ | ||
145 | " ckeq icc3,cc7 \n" \ | ||
146 | " ldd.p %M0,%1 \n" \ | ||
147 | " orcr cc7,cc7,cc3 \n" \ | ||
148 | " "#op" %L1,%L3,%L2 \n" \ | ||
149 | " "#op" %1,%3,%2 \n" \ | ||
150 | " cstd.p %2,%M0 ,cc3,#1 \n" \ | ||
151 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" \ | ||
152 | " beq icc3,#0,0b \n" \ | ||
153 | : "+m"(*__v), "=&e"(old), "=e"(tmp) \ | ||
154 | : "e"(i) \ | ||
155 | : "memory", "cc7", "cc3", "icc3" \ | ||
156 | ); \ | ||
157 | \ | ||
158 | return old; \ | ||
159 | } \ | ||
160 | ATOMIC_EXPORT(__atomic64_fetch_##op); | ||
161 | #endif | ||
162 | |||
163 | ATOMIC_FETCH_OP(or) | ||
164 | ATOMIC_FETCH_OP(and) | ||
165 | ATOMIC_FETCH_OP(xor) | ||
166 | ATOMIC_FETCH_OP(add) | ||
167 | ATOMIC_FETCH_OP(sub) | ||
168 | |||
169 | ATOMIC_OP_RETURN(add) | ||
170 | ATOMIC_OP_RETURN(sub) | ||
171 | |||
172 | #undef ATOMIC_FETCH_OP | ||
173 | #undef ATOMIC_OP_RETURN | ||
174 | #undef ATOMIC_QUALS | ||
175 | #undef ATOMIC_EXPORT | ||
diff --git a/arch/frv/include/asm/ax88796.h b/arch/frv/include/asm/ax88796.h deleted file mode 100644 index 637e980393c5..000000000000 --- a/arch/frv/include/asm/ax88796.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* ax88796.h: access points to the driver for the AX88796 NE2000 clone | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_AX88796_H | ||
13 | #define _ASM_AX88796_H | ||
14 | |||
15 | #include <asm/mb-regs.h> | ||
16 | |||
17 | #define AX88796_IOADDR (__region_CS1 + 0x200) | ||
18 | #define AX88796_IRQ IRQ_CPU_EXTERNAL7 | ||
19 | #define AX88796_FULL_DUPLEX 0 /* force full duplex */ | ||
20 | #define AX88796_BUS_INFO "CS1#+0x200" /* bus info for ethtool */ | ||
21 | |||
22 | #endif /* _ASM_AX88796_H */ | ||
diff --git a/arch/frv/include/asm/barrier.h b/arch/frv/include/asm/barrier.h deleted file mode 100644 index abbef470154c..000000000000 --- a/arch/frv/include/asm/barrier.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* FR-V CPU memory barrier definitions | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_BARRIER_H | ||
13 | #define _ASM_BARRIER_H | ||
14 | |||
15 | #define nop() asm volatile ("nop"::) | ||
16 | |||
17 | #define mb() asm volatile ("membar" : : :"memory") | ||
18 | #define rmb() asm volatile ("membar" : : :"memory") | ||
19 | #define wmb() asm volatile ("membar" : : :"memory") | ||
20 | |||
21 | #include <asm-generic/barrier.h> | ||
22 | |||
23 | #endif /* _ASM_BARRIER_H */ | ||
diff --git a/arch/frv/include/asm/bitops.h b/arch/frv/include/asm/bitops.h deleted file mode 100644 index 0df8e95e3715..000000000000 --- a/arch/frv/include/asm/bitops.h +++ /dev/null | |||
@@ -1,325 +0,0 @@ | |||
1 | /* bitops.h: bit operations for the Fujitsu FR-V CPUs | ||
2 | * | ||
3 | * For an explanation of how atomic ops work in this arch, see: | ||
4 | * Documentation/frv/atomic-ops.txt | ||
5 | * | ||
6 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
7 | * Written by David Howells (dhowells@redhat.com) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | #ifndef _ASM_BITOPS_H | ||
15 | #define _ASM_BITOPS_H | ||
16 | |||
17 | #include <linux/compiler.h> | ||
18 | #include <asm/byteorder.h> | ||
19 | |||
20 | #ifdef __KERNEL__ | ||
21 | |||
22 | #ifndef _LINUX_BITOPS_H | ||
23 | #error only <linux/bitops.h> can be included directly | ||
24 | #endif | ||
25 | |||
26 | #include <asm-generic/bitops/ffz.h> | ||
27 | |||
28 | #include <asm/atomic.h> | ||
29 | |||
30 | static inline int test_and_clear_bit(unsigned long nr, volatile void *addr) | ||
31 | { | ||
32 | unsigned int *ptr = (void *)addr; | ||
33 | unsigned int mask = 1UL << (nr & 31); | ||
34 | ptr += nr >> 5; | ||
35 | return (__atomic32_fetch_and(~mask, ptr) & mask) != 0; | ||
36 | } | ||
37 | |||
38 | static inline int test_and_set_bit(unsigned long nr, volatile void *addr) | ||
39 | { | ||
40 | unsigned int *ptr = (void *)addr; | ||
41 | unsigned int mask = 1UL << (nr & 31); | ||
42 | ptr += nr >> 5; | ||
43 | return (__atomic32_fetch_or(mask, ptr) & mask) != 0; | ||
44 | } | ||
45 | |||
46 | static inline int test_and_change_bit(unsigned long nr, volatile void *addr) | ||
47 | { | ||
48 | unsigned int *ptr = (void *)addr; | ||
49 | unsigned int mask = 1UL << (nr & 31); | ||
50 | ptr += nr >> 5; | ||
51 | return (__atomic32_fetch_xor(mask, ptr) & mask) != 0; | ||
52 | } | ||
53 | |||
54 | static inline void clear_bit(unsigned long nr, volatile void *addr) | ||
55 | { | ||
56 | test_and_clear_bit(nr, addr); | ||
57 | } | ||
58 | |||
59 | static inline void set_bit(unsigned long nr, volatile void *addr) | ||
60 | { | ||
61 | test_and_set_bit(nr, addr); | ||
62 | } | ||
63 | |||
64 | static inline void change_bit(unsigned long nr, volatile void *addr) | ||
65 | { | ||
66 | test_and_change_bit(nr, addr); | ||
67 | } | ||
68 | |||
69 | static inline void __clear_bit(unsigned long nr, volatile void *addr) | ||
70 | { | ||
71 | volatile unsigned long *a = addr; | ||
72 | int mask; | ||
73 | |||
74 | a += nr >> 5; | ||
75 | mask = 1 << (nr & 31); | ||
76 | *a &= ~mask; | ||
77 | } | ||
78 | |||
79 | static inline void __set_bit(unsigned long nr, volatile void *addr) | ||
80 | { | ||
81 | volatile unsigned long *a = addr; | ||
82 | int mask; | ||
83 | |||
84 | a += nr >> 5; | ||
85 | mask = 1 << (nr & 31); | ||
86 | *a |= mask; | ||
87 | } | ||
88 | |||
89 | static inline void __change_bit(unsigned long nr, volatile void *addr) | ||
90 | { | ||
91 | volatile unsigned long *a = addr; | ||
92 | int mask; | ||
93 | |||
94 | a += nr >> 5; | ||
95 | mask = 1 << (nr & 31); | ||
96 | *a ^= mask; | ||
97 | } | ||
98 | |||
99 | static inline int __test_and_clear_bit(unsigned long nr, volatile void *addr) | ||
100 | { | ||
101 | volatile unsigned long *a = addr; | ||
102 | int mask, retval; | ||
103 | |||
104 | a += nr >> 5; | ||
105 | mask = 1 << (nr & 31); | ||
106 | retval = (mask & *a) != 0; | ||
107 | *a &= ~mask; | ||
108 | return retval; | ||
109 | } | ||
110 | |||
111 | static inline int __test_and_set_bit(unsigned long nr, volatile void *addr) | ||
112 | { | ||
113 | volatile unsigned long *a = addr; | ||
114 | int mask, retval; | ||
115 | |||
116 | a += nr >> 5; | ||
117 | mask = 1 << (nr & 31); | ||
118 | retval = (mask & *a) != 0; | ||
119 | *a |= mask; | ||
120 | return retval; | ||
121 | } | ||
122 | |||
123 | static inline int __test_and_change_bit(unsigned long nr, volatile void *addr) | ||
124 | { | ||
125 | volatile unsigned long *a = addr; | ||
126 | int mask, retval; | ||
127 | |||
128 | a += nr >> 5; | ||
129 | mask = 1 << (nr & 31); | ||
130 | retval = (mask & *a) != 0; | ||
131 | *a ^= mask; | ||
132 | return retval; | ||
133 | } | ||
134 | |||
135 | /* | ||
136 | * This routine doesn't need to be atomic. | ||
137 | */ | ||
138 | static inline int | ||
139 | __constant_test_bit(unsigned long nr, const volatile void *addr) | ||
140 | { | ||
141 | return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0; | ||
142 | } | ||
143 | |||
144 | static inline int __test_bit(unsigned long nr, const volatile void *addr) | ||
145 | { | ||
146 | int * a = (int *) addr; | ||
147 | int mask; | ||
148 | |||
149 | a += nr >> 5; | ||
150 | mask = 1 << (nr & 0x1f); | ||
151 | return ((mask & *a) != 0); | ||
152 | } | ||
153 | |||
154 | #define test_bit(nr,addr) \ | ||
155 | (__builtin_constant_p(nr) ? \ | ||
156 | __constant_test_bit((nr),(addr)) : \ | ||
157 | __test_bit((nr),(addr))) | ||
158 | |||
159 | #include <asm-generic/bitops/find.h> | ||
160 | |||
161 | /** | ||
162 | * fls - find last bit set | ||
163 | * @x: the word to search | ||
164 | * | ||
165 | * This is defined the same way as ffs: | ||
166 | * - return 32..1 to indicate bit 31..0 most significant bit set | ||
167 | * - return 0 to indicate no bits set | ||
168 | */ | ||
169 | #define fls(x) \ | ||
170 | ({ \ | ||
171 | int bit; \ | ||
172 | \ | ||
173 | asm(" subcc %1,gr0,gr0,icc0 \n" \ | ||
174 | " ckne icc0,cc4 \n" \ | ||
175 | " cscan.p %1,gr0,%0 ,cc4,#1 \n" \ | ||
176 | " csub %0,%0,%0 ,cc4,#0 \n" \ | ||
177 | " csub %2,%0,%0 ,cc4,#1 \n" \ | ||
178 | : "=&r"(bit) \ | ||
179 | : "r"(x), "r"(32) \ | ||
180 | : "icc0", "cc4" \ | ||
181 | ); \ | ||
182 | \ | ||
183 | bit; \ | ||
184 | }) | ||
185 | |||
186 | /** | ||
187 | * fls64 - find last bit set in a 64-bit value | ||
188 | * @n: the value to search | ||
189 | * | ||
190 | * This is defined the same way as ffs: | ||
191 | * - return 64..1 to indicate bit 63..0 most significant bit set | ||
192 | * - return 0 to indicate no bits set | ||
193 | */ | ||
194 | static inline __attribute__((const)) | ||
195 | int fls64(u64 n) | ||
196 | { | ||
197 | union { | ||
198 | u64 ll; | ||
199 | struct { u32 h, l; }; | ||
200 | } _; | ||
201 | int bit, x, y; | ||
202 | |||
203 | _.ll = n; | ||
204 | |||
205 | asm(" subcc.p %3,gr0,gr0,icc0 \n" | ||
206 | " subcc %4,gr0,gr0,icc1 \n" | ||
207 | " ckne icc0,cc4 \n" | ||
208 | " ckne icc1,cc5 \n" | ||
209 | " norcr cc4,cc5,cc6 \n" | ||
210 | " csub.p %0,%0,%0 ,cc6,1 \n" | ||
211 | " orcr cc5,cc4,cc4 \n" | ||
212 | " andcr cc4,cc5,cc4 \n" | ||
213 | " cscan.p %3,gr0,%0 ,cc4,0 \n" | ||
214 | " setlos #64,%1 \n" | ||
215 | " cscan.p %4,gr0,%0 ,cc4,1 \n" | ||
216 | " setlos #32,%2 \n" | ||
217 | " csub.p %1,%0,%0 ,cc4,0 \n" | ||
218 | " csub %2,%0,%0 ,cc4,1 \n" | ||
219 | : "=&r"(bit), "=r"(x), "=r"(y) | ||
220 | : "0r"(_.h), "r"(_.l) | ||
221 | : "icc0", "icc1", "cc4", "cc5", "cc6" | ||
222 | ); | ||
223 | return bit; | ||
224 | |||
225 | } | ||
226 | |||
227 | /** | ||
228 | * ffs - find first bit set | ||
229 | * @x: the word to search | ||
230 | * | ||
231 | * - return 32..1 to indicate bit 31..0 most least significant bit set | ||
232 | * - return 0 to indicate no bits set | ||
233 | */ | ||
234 | static inline __attribute__((const)) | ||
235 | int ffs(int x) | ||
236 | { | ||
237 | /* Note: (x & -x) gives us a mask that is the least significant | ||
238 | * (rightmost) 1-bit of the value in x. | ||
239 | */ | ||
240 | return fls(x & -x); | ||
241 | } | ||
242 | |||
243 | /** | ||
244 | * __ffs - find first bit set | ||
245 | * @x: the word to search | ||
246 | * | ||
247 | * - return 31..0 to indicate bit 31..0 most least significant bit set | ||
248 | * - if no bits are set in x, the result is undefined | ||
249 | */ | ||
250 | static inline __attribute__((const)) | ||
251 | int __ffs(unsigned long x) | ||
252 | { | ||
253 | int bit; | ||
254 | asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x & -x)); | ||
255 | return 31 - bit; | ||
256 | } | ||
257 | |||
258 | /** | ||
259 | * __fls - find last (most-significant) set bit in a long word | ||
260 | * @word: the word to search | ||
261 | * | ||
262 | * Undefined if no set bit exists, so code should check against 0 first. | ||
263 | */ | ||
264 | static inline unsigned long __fls(unsigned long word) | ||
265 | { | ||
266 | unsigned long bit; | ||
267 | asm("scan %1,gr0,%0" : "=r"(bit) : "r"(word)); | ||
268 | return bit; | ||
269 | } | ||
270 | |||
271 | /* | ||
272 | * special slimline version of fls() for calculating ilog2_u32() | ||
273 | * - note: no protection against n == 0 | ||
274 | */ | ||
275 | #define ARCH_HAS_ILOG2_U32 | ||
276 | static inline __attribute__((const)) | ||
277 | int __ilog2_u32(u32 n) | ||
278 | { | ||
279 | int bit; | ||
280 | asm("scan %1,gr0,%0" : "=r"(bit) : "r"(n)); | ||
281 | return 31 - bit; | ||
282 | } | ||
283 | |||
284 | /* | ||
285 | * special slimline version of fls64() for calculating ilog2_u64() | ||
286 | * - note: no protection against n == 0 | ||
287 | */ | ||
288 | #define ARCH_HAS_ILOG2_U64 | ||
289 | static inline __attribute__((const)) | ||
290 | int __ilog2_u64(u64 n) | ||
291 | { | ||
292 | union { | ||
293 | u64 ll; | ||
294 | struct { u32 h, l; }; | ||
295 | } _; | ||
296 | int bit, x, y; | ||
297 | |||
298 | _.ll = n; | ||
299 | |||
300 | asm(" subcc %3,gr0,gr0,icc0 \n" | ||
301 | " ckeq icc0,cc4 \n" | ||
302 | " cscan.p %3,gr0,%0 ,cc4,0 \n" | ||
303 | " setlos #63,%1 \n" | ||
304 | " cscan.p %4,gr0,%0 ,cc4,1 \n" | ||
305 | " setlos #31,%2 \n" | ||
306 | " csub.p %1,%0,%0 ,cc4,0 \n" | ||
307 | " csub %2,%0,%0 ,cc4,1 \n" | ||
308 | : "=&r"(bit), "=r"(x), "=r"(y) | ||
309 | : "0r"(_.h), "r"(_.l) | ||
310 | : "icc0", "cc4" | ||
311 | ); | ||
312 | return bit; | ||
313 | } | ||
314 | |||
315 | #include <asm-generic/bitops/sched.h> | ||
316 | #include <asm-generic/bitops/hweight.h> | ||
317 | #include <asm-generic/bitops/lock.h> | ||
318 | |||
319 | #include <asm-generic/bitops/le.h> | ||
320 | |||
321 | #include <asm-generic/bitops/ext2-atomic-setbit.h> | ||
322 | |||
323 | #endif /* __KERNEL__ */ | ||
324 | |||
325 | #endif /* _ASM_BITOPS_H */ | ||
diff --git a/arch/frv/include/asm/bug.h b/arch/frv/include/asm/bug.h deleted file mode 100644 index dd01bcf42ee6..000000000000 --- a/arch/frv/include/asm/bug.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* bug.h: FRV bug trapping | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_BUG_H | ||
12 | #define _ASM_BUG_H | ||
13 | |||
14 | #include <linux/linkage.h> | ||
15 | |||
16 | #ifdef CONFIG_BUG | ||
17 | /* | ||
18 | * Tell the user there is some problem. | ||
19 | */ | ||
20 | extern asmlinkage void __debug_bug_trap(int signr); | ||
21 | |||
22 | #ifdef CONFIG_NO_KERNEL_MSG | ||
23 | #define _debug_bug_printk() | ||
24 | #else | ||
25 | extern void __debug_bug_printk(const char *file, unsigned line); | ||
26 | #define _debug_bug_printk() __debug_bug_printk(__FILE__, __LINE__) | ||
27 | #endif | ||
28 | |||
29 | #define _debug_bug_trap(signr) \ | ||
30 | do { \ | ||
31 | __debug_bug_trap(signr); \ | ||
32 | asm volatile("nop"); \ | ||
33 | } while(1) | ||
34 | |||
35 | #define HAVE_ARCH_BUG | ||
36 | #define BUG() \ | ||
37 | do { \ | ||
38 | _debug_bug_printk(); \ | ||
39 | _debug_bug_trap(6 /*SIGABRT*/); \ | ||
40 | } while (0) | ||
41 | |||
42 | #ifdef CONFIG_GDBSTUB | ||
43 | #define HAVE_ARCH_KGDB_RAISE | ||
44 | #define kgdb_raise(signr) do { _debug_bug_trap(signr); } while(0) | ||
45 | |||
46 | #define HAVE_ARCH_KGDB_BAD_PAGE | ||
47 | #define kgdb_bad_page(page) do { kgdb_raise(SIGABRT); } while(0) | ||
48 | #endif | ||
49 | |||
50 | #endif /* CONFIG_BUG */ | ||
51 | |||
52 | #include <asm-generic/bug.h> | ||
53 | |||
54 | extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2))); | ||
55 | |||
56 | #endif | ||
diff --git a/arch/frv/include/asm/bugs.h b/arch/frv/include/asm/bugs.h deleted file mode 100644 index f2382be2b46c..000000000000 --- a/arch/frv/include/asm/bugs.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* bugs.h: arch bug checking entry | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | static inline void check_bugs(void) | ||
13 | { | ||
14 | } | ||
diff --git a/arch/frv/include/asm/busctl-regs.h b/arch/frv/include/asm/busctl-regs.h deleted file mode 100644 index bb0ff4816e27..000000000000 --- a/arch/frv/include/asm/busctl-regs.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* busctl-regs.h: FR400-series CPU bus controller registers | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_BUSCTL_REGS_H | ||
13 | #define _ASM_BUSCTL_REGS_H | ||
14 | |||
15 | /* bus controller registers */ | ||
16 | #define __get_LGCR() ({ *(volatile unsigned long *)(0xfe000010); }) | ||
17 | #define __get_LMAICR() ({ *(volatile unsigned long *)(0xfe000030); }) | ||
18 | #define __get_LEMBR() ({ *(volatile unsigned long *)(0xfe000040); }) | ||
19 | #define __get_LEMAM() ({ *(volatile unsigned long *)(0xfe000048); }) | ||
20 | #define __get_LCR(R) ({ *(volatile unsigned long *)(0xfe000100 + 8*(R)); }) | ||
21 | #define __get_LSBR(R) ({ *(volatile unsigned long *)(0xfe000c00 + 8*(R)); }) | ||
22 | #define __get_LSAM(R) ({ *(volatile unsigned long *)(0xfe000d00 + 8*(R)); }) | ||
23 | |||
24 | #define __set_LGCR(V) do { *(volatile unsigned long *)(0xfe000010) = (V); } while(0) | ||
25 | #define __set_LMAICR(V) do { *(volatile unsigned long *)(0xfe000030) = (V); } while(0) | ||
26 | #define __set_LEMBR(V) do { *(volatile unsigned long *)(0xfe000040) = (V); } while(0) | ||
27 | #define __set_LEMAM(V) do { *(volatile unsigned long *)(0xfe000048) = (V); } while(0) | ||
28 | #define __set_LCR(R,V) do { *(volatile unsigned long *)(0xfe000100 + 8*(R)) = (V); } while(0) | ||
29 | #define __set_LSBR(R,V) do { *(volatile unsigned long *)(0xfe000c00 + 8*(R)) = (V); } while(0) | ||
30 | #define __set_LSAM(R,V) do { *(volatile unsigned long *)(0xfe000d00 + 8*(R)) = (V); } while(0) | ||
31 | |||
32 | /* FR401 SDRAM controller registers */ | ||
33 | #define __get_DBR(R) ({ *(volatile unsigned long *)(0xfe000e00 + 8*(R)); }) | ||
34 | #define __get_DAM(R) ({ *(volatile unsigned long *)(0xfe000f00 + 8*(R)); }) | ||
35 | |||
36 | /* FR551 SDRAM controller registers */ | ||
37 | #define __get_DARS(R) ({ *(volatile unsigned long *)(0xfeff0100 + 8*(R)); }) | ||
38 | #define __get_DAMK(R) ({ *(volatile unsigned long *)(0xfeff0110 + 8*(R)); }) | ||
39 | |||
40 | |||
41 | #endif /* _ASM_BUSCTL_REGS_H */ | ||
diff --git a/arch/frv/include/asm/cache.h b/arch/frv/include/asm/cache.h deleted file mode 100644 index 2797163b8f4f..000000000000 --- a/arch/frv/include/asm/cache.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* cache.h: FRV cache definitions | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_CACHE_H | ||
13 | #define __ASM_CACHE_H | ||
14 | |||
15 | |||
16 | /* bytes per L1 cache line */ | ||
17 | #define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT) | ||
18 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
19 | |||
20 | #define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) | ||
21 | #define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) | ||
22 | |||
23 | #endif | ||
diff --git a/arch/frv/include/asm/cacheflush.h b/arch/frv/include/asm/cacheflush.h deleted file mode 100644 index edbac54ae015..000000000000 --- a/arch/frv/include/asm/cacheflush.h +++ /dev/null | |||
@@ -1,105 +0,0 @@ | |||
1 | /* cacheflush.h: FRV cache flushing routines | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_CACHEFLUSH_H | ||
13 | #define _ASM_CACHEFLUSH_H | ||
14 | |||
15 | /* Keep includes the same across arches. */ | ||
16 | #include <linux/mm.h> | ||
17 | |||
18 | /* | ||
19 | * virtually-indexed cache management (our cache is physically indexed) | ||
20 | */ | ||
21 | #define flush_cache_all() do {} while(0) | ||
22 | #define flush_cache_mm(mm) do {} while(0) | ||
23 | #define flush_cache_dup_mm(mm) do {} while(0) | ||
24 | #define flush_cache_range(mm, start, end) do {} while(0) | ||
25 | #define flush_cache_page(vma, vmaddr, pfn) do {} while(0) | ||
26 | #define flush_cache_vmap(start, end) do {} while(0) | ||
27 | #define flush_cache_vunmap(start, end) do {} while(0) | ||
28 | #define flush_dcache_mmap_lock(mapping) do {} while(0) | ||
29 | #define flush_dcache_mmap_unlock(mapping) do {} while(0) | ||
30 | |||
31 | /* | ||
32 | * physically-indexed cache management | ||
33 | * - see arch/frv/lib/cache.S | ||
34 | */ | ||
35 | extern void frv_dcache_writeback(unsigned long start, unsigned long size); | ||
36 | extern void frv_cache_invalidate(unsigned long start, unsigned long size); | ||
37 | extern void frv_icache_invalidate(unsigned long start, unsigned long size); | ||
38 | extern void frv_cache_wback_inv(unsigned long start, unsigned long size); | ||
39 | |||
40 | static inline void __flush_cache_all(void) | ||
41 | { | ||
42 | asm volatile(" dcef @(gr0,gr0),#1 \n" | ||
43 | " icei @(gr0,gr0),#1 \n" | ||
44 | " membar \n" | ||
45 | : : : "memory" | ||
46 | ); | ||
47 | } | ||
48 | |||
49 | /* dcache/icache coherency... */ | ||
50 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 | ||
51 | #ifdef CONFIG_MMU | ||
52 | extern void flush_dcache_page(struct page *page); | ||
53 | #else | ||
54 | static inline void flush_dcache_page(struct page *page) | ||
55 | { | ||
56 | unsigned long addr = page_to_phys(page); | ||
57 | frv_dcache_writeback(addr, addr + PAGE_SIZE); | ||
58 | } | ||
59 | #endif | ||
60 | |||
61 | static inline void flush_page_to_ram(struct page *page) | ||
62 | { | ||
63 | flush_dcache_page(page); | ||
64 | } | ||
65 | |||
66 | static inline void flush_icache(void) | ||
67 | { | ||
68 | __flush_cache_all(); | ||
69 | } | ||
70 | |||
71 | static inline void flush_icache_range(unsigned long start, unsigned long end) | ||
72 | { | ||
73 | frv_cache_wback_inv(start, end); | ||
74 | } | ||
75 | |||
76 | #ifdef CONFIG_MMU | ||
77 | extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, | ||
78 | unsigned long start, unsigned long len); | ||
79 | #else | ||
80 | static inline void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, | ||
81 | unsigned long start, unsigned long len) | ||
82 | { | ||
83 | frv_cache_wback_inv(start, start + len); | ||
84 | } | ||
85 | #endif | ||
86 | |||
87 | static inline void flush_icache_page(struct vm_area_struct *vma, struct page *page) | ||
88 | { | ||
89 | flush_icache_user_range(vma, page, page_to_phys(page), PAGE_SIZE); | ||
90 | } | ||
91 | |||
92 | /* | ||
93 | * permit ptrace to access another process's address space through the icache | ||
94 | * and the dcache | ||
95 | */ | ||
96 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
97 | do { \ | ||
98 | memcpy((dst), (src), (len)); \ | ||
99 | flush_icache_user_range((vma), (page), (vaddr), (len)); \ | ||
100 | } while(0) | ||
101 | |||
102 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
103 | memcpy((dst), (src), (len)) | ||
104 | |||
105 | #endif /* _ASM_CACHEFLUSH_H */ | ||
diff --git a/arch/frv/include/asm/checksum.h b/arch/frv/include/asm/checksum.h deleted file mode 100644 index b77388c5901d..000000000000 --- a/arch/frv/include/asm/checksum.h +++ /dev/null | |||
@@ -1,180 +0,0 @@ | |||
1 | /* checksum.h: FRV checksumming | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_CHECKSUM_H | ||
13 | #define _ASM_CHECKSUM_H | ||
14 | |||
15 | #include <linux/in6.h> | ||
16 | |||
17 | /* | ||
18 | * computes the checksum of a memory block at buff, length len, | ||
19 | * and adds in "sum" (32-bit) | ||
20 | * | ||
21 | * returns a 32-bit number suitable for feeding into itself | ||
22 | * or csum_tcpudp_magic | ||
23 | * | ||
24 | * this function must be called with even lengths, except | ||
25 | * for the last fragment, which may be odd | ||
26 | * | ||
27 | * it's best to have buff aligned on a 32-bit boundary | ||
28 | */ | ||
29 | __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
30 | |||
31 | /* | ||
32 | * the same as csum_partial, but copies from src while it | ||
33 | * checksums | ||
34 | * | ||
35 | * here even more important to align src and dst on a 32-bit (or even | ||
36 | * better 64-bit) boundary | ||
37 | */ | ||
38 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); | ||
39 | |||
40 | /* | ||
41 | * the same as csum_partial_copy, but copies from user space. | ||
42 | * | ||
43 | * here even more important to align src and dst on a 32-bit (or even | ||
44 | * better 64-bit) boundary | ||
45 | */ | ||
46 | extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
47 | int len, __wsum sum, int *csum_err); | ||
48 | |||
49 | /* | ||
50 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
51 | * which always checksum on 4 octet boundaries. | ||
52 | * | ||
53 | */ | ||
54 | static inline | ||
55 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
56 | { | ||
57 | unsigned int tmp, inc, sum = 0; | ||
58 | |||
59 | asm(" addcc gr0,gr0,gr0,icc0\n" /* clear icc0.C */ | ||
60 | " subi %1,#4,%1 \n" | ||
61 | "0: \n" | ||
62 | " ldu.p @(%1,%3),%4 \n" | ||
63 | " subicc %2,#1,%2,icc1 \n" | ||
64 | " addxcc.p %4,%0,%0,icc0 \n" | ||
65 | " bhi icc1,#2,0b \n" | ||
66 | |||
67 | /* fold the 33-bit result into 16-bits */ | ||
68 | " addxcc gr0,%0,%0,icc0 \n" | ||
69 | " srli %0,#16,%1 \n" | ||
70 | " sethi #0,%0 \n" | ||
71 | " add %1,%0,%0 \n" | ||
72 | " srli %0,#16,%1 \n" | ||
73 | " add %1,%0,%0 \n" | ||
74 | |||
75 | : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (inc), "=&r"(tmp) | ||
76 | : "0" (sum), "1" (iph), "2" (ihl), "3" (4), | ||
77 | "m"(*(volatile struct { int _[100]; } *)iph) | ||
78 | : "icc0", "icc1", "memory" | ||
79 | ); | ||
80 | |||
81 | return (__force __sum16)~sum; | ||
82 | } | ||
83 | |||
84 | /* | ||
85 | * Fold a partial checksum | ||
86 | */ | ||
87 | static inline __sum16 csum_fold(__wsum sum) | ||
88 | { | ||
89 | unsigned int tmp; | ||
90 | |||
91 | asm(" srli %0,#16,%1 \n" | ||
92 | " sethi #0,%0 \n" | ||
93 | " add %1,%0,%0 \n" | ||
94 | " srli %0,#16,%1 \n" | ||
95 | " add %1,%0,%0 \n" | ||
96 | : "=r"(sum), "=&r"(tmp) | ||
97 | : "0"(sum) | ||
98 | ); | ||
99 | |||
100 | return (__force __sum16)~sum; | ||
101 | } | ||
102 | |||
103 | /* | ||
104 | * computes the checksum of the TCP/UDP pseudo-header | ||
105 | * returns a 16-bit checksum, already complemented | ||
106 | */ | ||
107 | static inline __wsum | ||
108 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, __u32 len, | ||
109 | __u8 proto, __wsum sum) | ||
110 | { | ||
111 | asm(" addcc %1,%0,%0,icc0 \n" | ||
112 | " addxcc %2,%0,%0,icc0 \n" | ||
113 | " addxcc %3,%0,%0,icc0 \n" | ||
114 | " addxcc gr0,%0,%0,icc0 \n" | ||
115 | : "=r" (sum) | ||
116 | : "r" (daddr), "r" (saddr), "r" (len + proto), "0"(sum) | ||
117 | : "icc0" | ||
118 | ); | ||
119 | return sum; | ||
120 | } | ||
121 | |||
122 | static inline __sum16 | ||
123 | csum_tcpudp_magic(__be32 saddr, __be32 daddr, __u32 len, | ||
124 | __u8 proto, __wsum sum) | ||
125 | { | ||
126 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | ||
127 | } | ||
128 | |||
129 | /* | ||
130 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
131 | * in icmp.c | ||
132 | */ | ||
133 | extern __sum16 ip_compute_csum(const void *buff, int len); | ||
134 | |||
135 | #define _HAVE_ARCH_IPV6_CSUM | ||
136 | static inline __sum16 | ||
137 | csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, | ||
138 | __u32 len, __u8 proto, __wsum sum) | ||
139 | { | ||
140 | unsigned long tmp, tmp2; | ||
141 | |||
142 | asm(" addcc %2,%0,%0,icc0 \n" | ||
143 | |||
144 | /* add up the source addr */ | ||
145 | " ldi @(%3,0),%1 \n" | ||
146 | " addxcc %1,%0,%0,icc0 \n" | ||
147 | " ldi @(%3,4),%2 \n" | ||
148 | " addxcc %2,%0,%0,icc0 \n" | ||
149 | " ldi @(%3,8),%1 \n" | ||
150 | " addxcc %1,%0,%0,icc0 \n" | ||
151 | " ldi @(%3,12),%2 \n" | ||
152 | " addxcc %2,%0,%0,icc0 \n" | ||
153 | |||
154 | /* add up the dest addr */ | ||
155 | " ldi @(%4,0),%1 \n" | ||
156 | " addxcc %1,%0,%0,icc0 \n" | ||
157 | " ldi @(%4,4),%2 \n" | ||
158 | " addxcc %2,%0,%0,icc0 \n" | ||
159 | " ldi @(%4,8),%1 \n" | ||
160 | " addxcc %1,%0,%0,icc0 \n" | ||
161 | " ldi @(%4,12),%2 \n" | ||
162 | " addxcc %2,%0,%0,icc0 \n" | ||
163 | |||
164 | /* fold the 33-bit result into 16-bits */ | ||
165 | " addxcc gr0,%0,%0,icc0 \n" | ||
166 | " srli %0,#16,%1 \n" | ||
167 | " sethi #0,%0 \n" | ||
168 | " add %1,%0,%0 \n" | ||
169 | " srli %0,#16,%1 \n" | ||
170 | " add %1,%0,%0 \n" | ||
171 | |||
172 | : "=r" (sum), "=&r" (tmp), "=r" (tmp2) | ||
173 | : "r" (saddr), "r" (daddr), "0" (sum), "2" (len + proto) | ||
174 | : "icc0" | ||
175 | ); | ||
176 | |||
177 | return (__force __sum16)~sum; | ||
178 | } | ||
179 | |||
180 | #endif /* _ASM_CHECKSUM_H */ | ||
diff --git a/arch/frv/include/asm/cmpxchg.h b/arch/frv/include/asm/cmpxchg.h deleted file mode 100644 index ad1f11cfa92a..000000000000 --- a/arch/frv/include/asm/cmpxchg.h +++ /dev/null | |||
@@ -1,171 +0,0 @@ | |||
1 | /* xchg and cmpxchg operation emulation for FR-V | ||
2 | * | ||
3 | * For an explanation of how atomic ops work in this arch, see: | ||
4 | * Documentation/frv/atomic-ops.txt | ||
5 | * | ||
6 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
7 | * Written by David Howells (dhowells@redhat.com) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | #ifndef _ASM_CMPXCHG_H | ||
15 | #define _ASM_CMPXCHG_H | ||
16 | |||
17 | #include <linux/types.h> | ||
18 | |||
19 | /*****************************************************************************/ | ||
20 | /* | ||
21 | * exchange value with memory | ||
22 | */ | ||
23 | extern uint64_t __xchg_64(uint64_t i, volatile void *v); | ||
24 | |||
25 | #ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS | ||
26 | |||
27 | #define xchg(ptr, x) \ | ||
28 | ({ \ | ||
29 | __typeof__(ptr) __xg_ptr = (ptr); \ | ||
30 | __typeof__(*(ptr)) __xg_orig; \ | ||
31 | \ | ||
32 | switch (sizeof(__xg_orig)) { \ | ||
33 | case 4: \ | ||
34 | asm volatile( \ | ||
35 | "swap%I0 %M0,%1" \ | ||
36 | : "+m"(*__xg_ptr), "=r"(__xg_orig) \ | ||
37 | : "1"(x) \ | ||
38 | : "memory" \ | ||
39 | ); \ | ||
40 | break; \ | ||
41 | \ | ||
42 | default: \ | ||
43 | __xg_orig = (__typeof__(__xg_orig))0; \ | ||
44 | asm volatile("break"); \ | ||
45 | break; \ | ||
46 | } \ | ||
47 | \ | ||
48 | __xg_orig; \ | ||
49 | }) | ||
50 | |||
51 | #else | ||
52 | |||
53 | extern uint32_t __xchg_32(uint32_t i, volatile void *v); | ||
54 | |||
55 | #define xchg(ptr, x) \ | ||
56 | ({ \ | ||
57 | __typeof__(ptr) __xg_ptr = (ptr); \ | ||
58 | __typeof__(*(ptr)) __xg_orig; \ | ||
59 | \ | ||
60 | switch (sizeof(__xg_orig)) { \ | ||
61 | case 4: __xg_orig = (__typeof__(*(ptr))) __xchg_32((uint32_t) x, __xg_ptr); break; \ | ||
62 | default: \ | ||
63 | __xg_orig = (__typeof__(__xg_orig))0; \ | ||
64 | asm volatile("break"); \ | ||
65 | break; \ | ||
66 | } \ | ||
67 | __xg_orig; \ | ||
68 | }) | ||
69 | |||
70 | #endif | ||
71 | |||
72 | /*****************************************************************************/ | ||
73 | /* | ||
74 | * compare and conditionally exchange value with memory | ||
75 | * - if (*ptr == test) then orig = *ptr; *ptr = test; | ||
76 | * - if (*ptr != test) then orig = *ptr; | ||
77 | */ | ||
78 | extern uint64_t __cmpxchg_64(uint64_t test, uint64_t new, volatile uint64_t *v); | ||
79 | #define cmpxchg64(p, o, n) __cmpxchg_64((o), (n), (p)) | ||
80 | |||
81 | #ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS | ||
82 | |||
83 | #define cmpxchg(ptr, test, new) \ | ||
84 | ({ \ | ||
85 | __typeof__(ptr) __xg_ptr = (ptr); \ | ||
86 | __typeof__(*(ptr)) __xg_orig, __xg_tmp; \ | ||
87 | __typeof__(*(ptr)) __xg_test = (test); \ | ||
88 | __typeof__(*(ptr)) __xg_new = (new); \ | ||
89 | \ | ||
90 | switch (sizeof(__xg_orig)) { \ | ||
91 | case 4: \ | ||
92 | asm volatile( \ | ||
93 | "0: \n" \ | ||
94 | " orcc gr0,gr0,gr0,icc3 \n" \ | ||
95 | " ckeq icc3,cc7 \n" \ | ||
96 | " ld.p %M0,%1 \n" \ | ||
97 | " orcr cc7,cc7,cc3 \n" \ | ||
98 | " sub%I4cc %1,%4,%2,icc0 \n" \ | ||
99 | " bne icc0,#0,1f \n" \ | ||
100 | " cst.p %3,%M0 ,cc3,#1 \n" \ | ||
101 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" \ | ||
102 | " beq icc3,#0,0b \n" \ | ||
103 | "1: \n" \ | ||
104 | : "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \ | ||
105 | : "r"(__xg_new), "NPr"(__xg_test) \ | ||
106 | : "memory", "cc7", "cc3", "icc3", "icc0" \ | ||
107 | ); \ | ||
108 | break; \ | ||
109 | \ | ||
110 | default: \ | ||
111 | __xg_orig = (__typeof__(__xg_orig))0; \ | ||
112 | asm volatile("break"); \ | ||
113 | break; \ | ||
114 | } \ | ||
115 | \ | ||
116 | __xg_orig; \ | ||
117 | }) | ||
118 | |||
119 | #else | ||
120 | |||
121 | extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new); | ||
122 | |||
123 | #define cmpxchg(ptr, test, new) \ | ||
124 | ({ \ | ||
125 | __typeof__(ptr) __xg_ptr = (ptr); \ | ||
126 | __typeof__(*(ptr)) __xg_orig; \ | ||
127 | __typeof__(*(ptr)) __xg_test = (test); \ | ||
128 | __typeof__(*(ptr)) __xg_new = (new); \ | ||
129 | \ | ||
130 | switch (sizeof(__xg_orig)) { \ | ||
131 | case 4: __xg_orig = (__force __typeof__(*ptr)) \ | ||
132 | __cmpxchg_32((__force uint32_t *)__xg_ptr, \ | ||
133 | (__force uint32_t)__xg_test, \ | ||
134 | (__force uint32_t)__xg_new); break; \ | ||
135 | default: \ | ||
136 | __xg_orig = (__typeof__(__xg_orig))0; \ | ||
137 | asm volatile("break"); \ | ||
138 | break; \ | ||
139 | } \ | ||
140 | \ | ||
141 | __xg_orig; \ | ||
142 | }) | ||
143 | |||
144 | #endif | ||
145 | |||
146 | #include <asm-generic/cmpxchg-local.h> | ||
147 | |||
148 | static inline unsigned long __cmpxchg_local(volatile void *ptr, | ||
149 | unsigned long old, | ||
150 | unsigned long new, int size) | ||
151 | { | ||
152 | switch (size) { | ||
153 | case 4: | ||
154 | return cmpxchg((unsigned long *)ptr, old, new); | ||
155 | default: | ||
156 | return __cmpxchg_local_generic(ptr, old, new, size); | ||
157 | } | ||
158 | |||
159 | return old; | ||
160 | } | ||
161 | |||
162 | /* | ||
163 | * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make | ||
164 | * them available. | ||
165 | */ | ||
166 | #define cmpxchg_local(ptr, o, n) \ | ||
167 | ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ | ||
168 | (unsigned long)(n), sizeof(*(ptr)))) | ||
169 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) | ||
170 | |||
171 | #endif /* _ASM_CMPXCHG_H */ | ||
diff --git a/arch/frv/include/asm/cpu-irqs.h b/arch/frv/include/asm/cpu-irqs.h deleted file mode 100644 index 478f3498fcfe..000000000000 --- a/arch/frv/include/asm/cpu-irqs.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* cpu-irqs.h: on-CPU peripheral irqs | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_CPU_IRQS_H | ||
13 | #define _ASM_CPU_IRQS_H | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | |||
17 | /* IRQ to level mappings */ | ||
18 | #define IRQ_GDBSTUB_LEVEL 15 | ||
19 | #define IRQ_UART_LEVEL 13 | ||
20 | |||
21 | #ifdef CONFIG_GDBSTUB_UART0 | ||
22 | #define IRQ_UART0_LEVEL IRQ_GDBSTUB_LEVEL | ||
23 | #else | ||
24 | #define IRQ_UART0_LEVEL IRQ_UART_LEVEL | ||
25 | #endif | ||
26 | |||
27 | #ifdef CONFIG_GDBSTUB_UART1 | ||
28 | #define IRQ_UART1_LEVEL IRQ_GDBSTUB_LEVEL | ||
29 | #else | ||
30 | #define IRQ_UART1_LEVEL IRQ_UART_LEVEL | ||
31 | #endif | ||
32 | |||
33 | #define IRQ_DMA0_LEVEL 14 | ||
34 | #define IRQ_DMA1_LEVEL 14 | ||
35 | #define IRQ_DMA2_LEVEL 14 | ||
36 | #define IRQ_DMA3_LEVEL 14 | ||
37 | #define IRQ_DMA4_LEVEL 14 | ||
38 | #define IRQ_DMA5_LEVEL 14 | ||
39 | #define IRQ_DMA6_LEVEL 14 | ||
40 | #define IRQ_DMA7_LEVEL 14 | ||
41 | |||
42 | #define IRQ_TIMER0_LEVEL 12 | ||
43 | #define IRQ_TIMER1_LEVEL 11 | ||
44 | #define IRQ_TIMER2_LEVEL 10 | ||
45 | |||
46 | #define IRQ_XIRQ0_LEVEL 1 | ||
47 | #define IRQ_XIRQ1_LEVEL 2 | ||
48 | #define IRQ_XIRQ2_LEVEL 3 | ||
49 | #define IRQ_XIRQ3_LEVEL 4 | ||
50 | #define IRQ_XIRQ4_LEVEL 5 | ||
51 | #define IRQ_XIRQ5_LEVEL 6 | ||
52 | #define IRQ_XIRQ6_LEVEL 7 | ||
53 | #define IRQ_XIRQ7_LEVEL 8 | ||
54 | |||
55 | /* IRQ IDs presented to drivers */ | ||
56 | #define IRQ_CPU__UNUSED IRQ_BASE_CPU | ||
57 | #define IRQ_CPU_UART0 (IRQ_BASE_CPU + IRQ_UART0_LEVEL) | ||
58 | #define IRQ_CPU_UART1 (IRQ_BASE_CPU + IRQ_UART1_LEVEL) | ||
59 | #define IRQ_CPU_TIMER0 (IRQ_BASE_CPU + IRQ_TIMER0_LEVEL) | ||
60 | #define IRQ_CPU_TIMER1 (IRQ_BASE_CPU + IRQ_TIMER1_LEVEL) | ||
61 | #define IRQ_CPU_TIMER2 (IRQ_BASE_CPU + IRQ_TIMER2_LEVEL) | ||
62 | #define IRQ_CPU_DMA0 (IRQ_BASE_CPU + IRQ_DMA0_LEVEL) | ||
63 | #define IRQ_CPU_DMA1 (IRQ_BASE_CPU + IRQ_DMA1_LEVEL) | ||
64 | #define IRQ_CPU_DMA2 (IRQ_BASE_CPU + IRQ_DMA2_LEVEL) | ||
65 | #define IRQ_CPU_DMA3 (IRQ_BASE_CPU + IRQ_DMA3_LEVEL) | ||
66 | #define IRQ_CPU_DMA4 (IRQ_BASE_CPU + IRQ_DMA4_LEVEL) | ||
67 | #define IRQ_CPU_DMA5 (IRQ_BASE_CPU + IRQ_DMA5_LEVEL) | ||
68 | #define IRQ_CPU_DMA6 (IRQ_BASE_CPU + IRQ_DMA6_LEVEL) | ||
69 | #define IRQ_CPU_DMA7 (IRQ_BASE_CPU + IRQ_DMA7_LEVEL) | ||
70 | #define IRQ_CPU_EXTERNAL0 (IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL) | ||
71 | #define IRQ_CPU_EXTERNAL1 (IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL) | ||
72 | #define IRQ_CPU_EXTERNAL2 (IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL) | ||
73 | #define IRQ_CPU_EXTERNAL3 (IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL) | ||
74 | #define IRQ_CPU_EXTERNAL4 (IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL) | ||
75 | #define IRQ_CPU_EXTERNAL5 (IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL) | ||
76 | #define IRQ_CPU_EXTERNAL6 (IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL) | ||
77 | #define IRQ_CPU_EXTERNAL7 (IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL) | ||
78 | |||
79 | #endif /* !__ASSEMBLY__ */ | ||
80 | |||
81 | #endif /* _ASM_CPU_IRQS_H */ | ||
diff --git a/arch/frv/include/asm/current.h b/arch/frv/include/asm/current.h deleted file mode 100644 index 86b027491b08..000000000000 --- a/arch/frv/include/asm/current.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* current.h: FRV current task pointer | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_CURRENT_H | ||
13 | #define _ASM_CURRENT_H | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | |||
17 | /* | ||
18 | * dedicate GR29 to keeping the current task pointer | ||
19 | */ | ||
20 | register struct task_struct *current asm("gr29"); | ||
21 | |||
22 | #define get_current() current | ||
23 | |||
24 | #else | ||
25 | |||
26 | #define CURRENT gr29 | ||
27 | |||
28 | #endif | ||
29 | |||
30 | #endif /* _ASM_CURRENT_H */ | ||
diff --git a/arch/frv/include/asm/delay.h b/arch/frv/include/asm/delay.h deleted file mode 100644 index 597b4ebf03b4..000000000000 --- a/arch/frv/include/asm/delay.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* delay.h: FRV delay code | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_DELAY_H | ||
13 | #define _ASM_DELAY_H | ||
14 | |||
15 | #include <asm/param.h> | ||
16 | #include <asm/timer-regs.h> | ||
17 | |||
18 | /* | ||
19 | * delay loop - runs at __core_clock_speed_HZ / 2 [there are 2 insns in the loop] | ||
20 | */ | ||
21 | extern unsigned long __delay_loops_MHz; | ||
22 | |||
23 | static inline void __delay(unsigned long loops) | ||
24 | { | ||
25 | asm volatile("1: subicc %0,#1,%0,icc0 \n" | ||
26 | " bnc icc0,#2,1b \n" | ||
27 | : "=r" (loops) | ||
28 | : "0" (loops) | ||
29 | : "icc0" | ||
30 | ); | ||
31 | } | ||
32 | |||
33 | /* | ||
34 | * Use only for very small delays ( < 1 msec). Should probably use a | ||
35 | * lookup table, really, as the multiplications take much too long with | ||
36 | * short delays. This is a "reasonable" implementation, though (and the | ||
37 | * first constant multiplications gets optimized away if the delay is | ||
38 | * a constant) | ||
39 | */ | ||
40 | |||
41 | extern unsigned long loops_per_jiffy; | ||
42 | |||
43 | static inline void udelay(unsigned long usecs) | ||
44 | { | ||
45 | __delay(usecs * __delay_loops_MHz); | ||
46 | } | ||
47 | |||
48 | #define ndelay(n) udelay((n) * 5) | ||
49 | |||
50 | #endif /* _ASM_DELAY_H */ | ||
diff --git a/arch/frv/include/asm/div64.h b/arch/frv/include/asm/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/arch/frv/include/asm/div64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/div64.h> | ||
diff --git a/arch/frv/include/asm/dm9000.h b/arch/frv/include/asm/dm9000.h deleted file mode 100644 index f6f48fd9ec6e..000000000000 --- a/arch/frv/include/asm/dm9000.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* dm9000.h: Davicom DM9000 adapter configuration | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_DM9000_H | ||
13 | #define _ASM_DM9000_H | ||
14 | |||
15 | #include <asm/mb-regs.h> | ||
16 | |||
17 | #define DM9000_ARCH_IOBASE (__region_CS6 + 0x300) | ||
18 | #define DM9000_ARCH_IRQ IRQ_CPU_EXTERNAL3 /* XIRQ #3 (shared with FPGA) */ | ||
19 | #undef DM9000_ARCH_IRQ_ACTLOW /* IRQ pin active high */ | ||
20 | #define DM9000_ARCH_BUS_INFO "CS6#+0x300" /* bus info for ethtool */ | ||
21 | |||
22 | #undef __is_PCI_IO | ||
23 | #define __is_PCI_IO(addr) 0 /* not PCI */ | ||
24 | |||
25 | #undef inl | ||
26 | #define inl(addr) \ | ||
27 | ({ \ | ||
28 | unsigned long __ioaddr = (unsigned long) addr; \ | ||
29 | uint32_t x = readl(__ioaddr); \ | ||
30 | ((x & 0xff) << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | ((x >> 24) & 0xff); \ | ||
31 | }) | ||
32 | |||
33 | #undef insl | ||
34 | #define insl(a,b,l) __insl(a,b,l,0) /* don't byte-swap */ | ||
35 | |||
36 | |||
37 | #endif /* _ASM_DM9000_H */ | ||
diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h deleted file mode 100644 index fd80e840a1e6..000000000000 --- a/arch/frv/include/asm/dma-mapping.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_DMA_MAPPING_H | ||
3 | #define _ASM_DMA_MAPPING_H | ||
4 | |||
5 | #include <asm/cache.h> | ||
6 | #include <asm/cacheflush.h> | ||
7 | |||
8 | extern unsigned long __nongprelbss dma_coherent_mem_start; | ||
9 | extern unsigned long __nongprelbss dma_coherent_mem_end; | ||
10 | |||
11 | extern const struct dma_map_ops frv_dma_ops; | ||
12 | |||
13 | static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) | ||
14 | { | ||
15 | return &frv_dma_ops; | ||
16 | } | ||
17 | |||
18 | #endif /* _ASM_DMA_MAPPING_H */ | ||
diff --git a/arch/frv/include/asm/dma.h b/arch/frv/include/asm/dma.h deleted file mode 100644 index 683c47d48a5b..000000000000 --- a/arch/frv/include/asm/dma.h +++ /dev/null | |||
@@ -1,125 +0,0 @@ | |||
1 | /* dma.h: FRV DMA controller management | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_DMA_H | ||
13 | #define _ASM_DMA_H | ||
14 | |||
15 | //#define DMA_DEBUG 1 | ||
16 | |||
17 | #include <linux/interrupt.h> | ||
18 | |||
19 | #undef MAX_DMA_CHANNELS /* don't use kernel/dma.c */ | ||
20 | |||
21 | /* under 2.4 this is actually needed by the new bootmem allocator */ | ||
22 | #define MAX_DMA_ADDRESS PAGE_OFFSET | ||
23 | |||
24 | /* | ||
25 | * FRV DMA controller management | ||
26 | */ | ||
27 | typedef irqreturn_t (*dma_irq_handler_t)(int dmachan, unsigned long cstr, void *data); | ||
28 | |||
29 | extern void frv_dma_init(void); | ||
30 | |||
31 | extern int frv_dma_open(const char *devname, | ||
32 | unsigned long dmamask, | ||
33 | int dmacap, | ||
34 | dma_irq_handler_t handler, | ||
35 | unsigned long irq_flags, | ||
36 | void *data); | ||
37 | |||
38 | /* channels required */ | ||
39 | #define FRV_DMA_MASK_ANY ULONG_MAX /* any channel */ | ||
40 | |||
41 | /* capabilities required */ | ||
42 | #define FRV_DMA_CAP_DREQ 0x01 /* DMA request pin */ | ||
43 | #define FRV_DMA_CAP_DACK 0x02 /* DMA ACK pin */ | ||
44 | #define FRV_DMA_CAP_DONE 0x04 /* DMA done pin */ | ||
45 | |||
46 | extern void frv_dma_close(int dma); | ||
47 | |||
48 | extern void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned long apr); | ||
49 | |||
50 | extern void frv_dma_start(int dma, | ||
51 | unsigned long sba, unsigned long dba, | ||
52 | unsigned long pix, unsigned long six, unsigned long bcl); | ||
53 | |||
54 | extern void frv_dma_restart_circular(int dma, unsigned long six); | ||
55 | |||
56 | extern void frv_dma_stop(int dma); | ||
57 | |||
58 | extern int is_frv_dma_interrupting(int dma); | ||
59 | |||
60 | extern void frv_dma_dump(int dma); | ||
61 | |||
62 | extern void frv_dma_status_clear(int dma); | ||
63 | |||
64 | #define FRV_DMA_NCHANS 8 | ||
65 | #define FRV_DMA_4CHANS 4 | ||
66 | #define FRV_DMA_8CHANS 8 | ||
67 | |||
68 | #define DMAC_CCFRx 0x00 /* channel configuration reg */ | ||
69 | #define DMAC_CCFRx_CM_SHIFT 16 | ||
70 | #define DMAC_CCFRx_CM_DA 0x00000000 | ||
71 | #define DMAC_CCFRx_CM_SCA 0x00010000 | ||
72 | #define DMAC_CCFRx_CM_DCA 0x00020000 | ||
73 | #define DMAC_CCFRx_CM_2D 0x00030000 | ||
74 | #define DMAC_CCFRx_ATS_SHIFT 8 | ||
75 | #define DMAC_CCFRx_RS_INTERN 0x00000000 | ||
76 | #define DMAC_CCFRx_RS_EXTERN 0x00000001 | ||
77 | #define DMAC_CCFRx_RS_SHIFT 0 | ||
78 | |||
79 | #define DMAC_CSTRx 0x08 /* channel status reg */ | ||
80 | #define DMAC_CSTRx_FS 0x0000003f | ||
81 | #define DMAC_CSTRx_NE 0x00000100 | ||
82 | #define DMAC_CSTRx_FED 0x00000200 | ||
83 | #define DMAC_CSTRx_WER 0x00000800 | ||
84 | #define DMAC_CSTRx_RER 0x00001000 | ||
85 | #define DMAC_CSTRx_CE 0x00002000 | ||
86 | #define DMAC_CSTRx_INT 0x00800000 | ||
87 | #define DMAC_CSTRx_BUSY 0x80000000 | ||
88 | |||
89 | #define DMAC_CCTRx 0x10 /* channel control reg */ | ||
90 | #define DMAC_CCTRx_DSIZ_1 0x00000000 | ||
91 | #define DMAC_CCTRx_DSIZ_2 0x00000001 | ||
92 | #define DMAC_CCTRx_DSIZ_4 0x00000002 | ||
93 | #define DMAC_CCTRx_DSIZ_32 0x00000005 | ||
94 | #define DMAC_CCTRx_DAU_HOLD 0x00000000 | ||
95 | #define DMAC_CCTRx_DAU_INC 0x00000010 | ||
96 | #define DMAC_CCTRx_DAU_DEC 0x00000020 | ||
97 | #define DMAC_CCTRx_SSIZ_1 0x00000000 | ||
98 | #define DMAC_CCTRx_SSIZ_2 0x00000100 | ||
99 | #define DMAC_CCTRx_SSIZ_4 0x00000200 | ||
100 | #define DMAC_CCTRx_SSIZ_32 0x00000500 | ||
101 | #define DMAC_CCTRx_SAU_HOLD 0x00000000 | ||
102 | #define DMAC_CCTRx_SAU_INC 0x00001000 | ||
103 | #define DMAC_CCTRx_SAU_DEC 0x00002000 | ||
104 | #define DMAC_CCTRx_FC 0x08000000 | ||
105 | #define DMAC_CCTRx_ICE 0x10000000 | ||
106 | #define DMAC_CCTRx_IE 0x40000000 | ||
107 | #define DMAC_CCTRx_ACT 0x80000000 | ||
108 | |||
109 | #define DMAC_SBAx 0x18 /* source base address reg */ | ||
110 | #define DMAC_DBAx 0x20 /* data base address reg */ | ||
111 | #define DMAC_PIXx 0x28 /* primary index reg */ | ||
112 | #define DMAC_SIXx 0x30 /* secondary index reg */ | ||
113 | #define DMAC_BCLx 0x38 /* byte count limit reg */ | ||
114 | #define DMAC_APRx 0x40 /* alternate pointer reg */ | ||
115 | |||
116 | /* | ||
117 | * required for PCI + MODULES | ||
118 | */ | ||
119 | #ifdef CONFIG_PCI | ||
120 | extern int isa_dma_bridge_buggy; | ||
121 | #else | ||
122 | #define isa_dma_bridge_buggy (0) | ||
123 | #endif | ||
124 | |||
125 | #endif /* _ASM_DMA_H */ | ||
diff --git a/arch/frv/include/asm/elf.h b/arch/frv/include/asm/elf.h deleted file mode 100644 index 2bac6446db41..000000000000 --- a/arch/frv/include/asm/elf.h +++ /dev/null | |||
@@ -1,140 +0,0 @@ | |||
1 | /* elf.h: FR-V ELF definitions | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from include/asm-m68knommu/elf.h | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #ifndef __ASM_ELF_H | ||
13 | #define __ASM_ELF_H | ||
14 | |||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/user.h> | ||
17 | |||
18 | struct elf32_hdr; | ||
19 | |||
20 | /* | ||
21 | * ELF header e_flags defines. | ||
22 | */ | ||
23 | #define EF_FRV_GPR_MASK 0x00000003 /* mask for # of gprs */ | ||
24 | #define EF_FRV_GPR32 0x00000001 /* Only uses GR on 32-register */ | ||
25 | #define EF_FRV_GPR64 0x00000002 /* Only uses GR on 64-register */ | ||
26 | #define EF_FRV_FPR_MASK 0x0000000c /* mask for # of fprs */ | ||
27 | #define EF_FRV_FPR32 0x00000004 /* Only uses FR on 32-register */ | ||
28 | #define EF_FRV_FPR64 0x00000008 /* Only uses FR on 64-register */ | ||
29 | #define EF_FRV_FPR_NONE 0x0000000C /* Uses software floating-point */ | ||
30 | #define EF_FRV_DWORD_MASK 0x00000030 /* mask for dword support */ | ||
31 | #define EF_FRV_DWORD_YES 0x00000010 /* Assumes stack aligned to 8-byte boundaries. */ | ||
32 | #define EF_FRV_DWORD_NO 0x00000020 /* Assumes stack aligned to 4-byte boundaries. */ | ||
33 | #define EF_FRV_DOUBLE 0x00000040 /* Uses double instructions. */ | ||
34 | #define EF_FRV_MEDIA 0x00000080 /* Uses media instructions. */ | ||
35 | #define EF_FRV_PIC 0x00000100 /* Uses position independent code. */ | ||
36 | #define EF_FRV_NON_PIC_RELOCS 0x00000200 /* Does not use position Independent code. */ | ||
37 | #define EF_FRV_MULADD 0x00000400 /* -mmuladd */ | ||
38 | #define EF_FRV_BIGPIC 0x00000800 /* -fPIC */ | ||
39 | #define EF_FRV_LIBPIC 0x00001000 /* -mlibrary-pic */ | ||
40 | #define EF_FRV_G0 0x00002000 /* -G 0, no small data ptr */ | ||
41 | #define EF_FRV_NOPACK 0x00004000 /* -mnopack */ | ||
42 | #define EF_FRV_FDPIC 0x00008000 /* -mfdpic */ | ||
43 | #define EF_FRV_CPU_MASK 0xff000000 /* specific cpu bits */ | ||
44 | #define EF_FRV_CPU_GENERIC 0x00000000 /* Set CPU type is FR-V */ | ||
45 | #define EF_FRV_CPU_FR500 0x01000000 /* Set CPU type is FR500 */ | ||
46 | #define EF_FRV_CPU_FR300 0x02000000 /* Set CPU type is FR300 */ | ||
47 | #define EF_FRV_CPU_SIMPLE 0x03000000 /* SIMPLE */ | ||
48 | #define EF_FRV_CPU_TOMCAT 0x04000000 /* Tomcat, FR500 prototype */ | ||
49 | #define EF_FRV_CPU_FR400 0x05000000 /* Set CPU type is FR400 */ | ||
50 | #define EF_FRV_CPU_FR550 0x06000000 /* Set CPU type is FR550 */ | ||
51 | #define EF_FRV_CPU_FR405 0x07000000 /* Set CPU type is FR405 */ | ||
52 | #define EF_FRV_CPU_FR450 0x08000000 /* Set CPU type is FR450 */ | ||
53 | |||
54 | /* | ||
55 | * FR-V ELF relocation types | ||
56 | */ | ||
57 | |||
58 | |||
59 | /* | ||
60 | * ELF register definitions.. | ||
61 | */ | ||
62 | typedef unsigned long elf_greg_t; | ||
63 | |||
64 | #define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t)) | ||
65 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
66 | |||
67 | typedef struct user_fpmedia_regs elf_fpregset_t; | ||
68 | |||
69 | /* | ||
70 | * This is used to ensure we don't load something for the wrong architecture. | ||
71 | */ | ||
72 | extern int elf_check_arch(const struct elf32_hdr *hdr); | ||
73 | |||
74 | #define elf_check_fdpic(x) ((x)->e_flags & EF_FRV_FDPIC && !((x)->e_flags & EF_FRV_NON_PIC_RELOCS)) | ||
75 | #define elf_check_const_displacement(x) ((x)->e_flags & EF_FRV_PIC) | ||
76 | |||
77 | /* | ||
78 | * These are used to set parameters in the core dumps. | ||
79 | */ | ||
80 | #define ELF_CLASS ELFCLASS32 | ||
81 | #define ELF_DATA ELFDATA2MSB | ||
82 | #define ELF_ARCH EM_FRV | ||
83 | |||
84 | #define ELF_PLAT_INIT(_r) \ | ||
85 | do { \ | ||
86 | __kernel_frame0_ptr->gr16 = 0; \ | ||
87 | __kernel_frame0_ptr->gr17 = 0; \ | ||
88 | __kernel_frame0_ptr->gr18 = 0; \ | ||
89 | __kernel_frame0_ptr->gr19 = 0; \ | ||
90 | __kernel_frame0_ptr->gr20 = 0; \ | ||
91 | __kernel_frame0_ptr->gr21 = 0; \ | ||
92 | __kernel_frame0_ptr->gr22 = 0; \ | ||
93 | __kernel_frame0_ptr->gr23 = 0; \ | ||
94 | __kernel_frame0_ptr->gr24 = 0; \ | ||
95 | __kernel_frame0_ptr->gr25 = 0; \ | ||
96 | __kernel_frame0_ptr->gr26 = 0; \ | ||
97 | __kernel_frame0_ptr->gr27 = 0; \ | ||
98 | __kernel_frame0_ptr->gr29 = 0; \ | ||
99 | } while(0) | ||
100 | |||
101 | #define ELF_FDPIC_PLAT_INIT(_regs, _exec_map_addr, _interp_map_addr, _dynamic_addr) \ | ||
102 | do { \ | ||
103 | __kernel_frame0_ptr->gr16 = _exec_map_addr; \ | ||
104 | __kernel_frame0_ptr->gr17 = _interp_map_addr; \ | ||
105 | __kernel_frame0_ptr->gr18 = _dynamic_addr; \ | ||
106 | __kernel_frame0_ptr->gr19 = 0; \ | ||
107 | __kernel_frame0_ptr->gr20 = 0; \ | ||
108 | __kernel_frame0_ptr->gr21 = 0; \ | ||
109 | __kernel_frame0_ptr->gr22 = 0; \ | ||
110 | __kernel_frame0_ptr->gr23 = 0; \ | ||
111 | __kernel_frame0_ptr->gr24 = 0; \ | ||
112 | __kernel_frame0_ptr->gr25 = 0; \ | ||
113 | __kernel_frame0_ptr->gr26 = 0; \ | ||
114 | __kernel_frame0_ptr->gr27 = 0; \ | ||
115 | __kernel_frame0_ptr->gr29 = 0; \ | ||
116 | } while(0) | ||
117 | |||
118 | #define CORE_DUMP_USE_REGSET | ||
119 | #define ELF_FDPIC_CORE_EFLAGS EF_FRV_FDPIC | ||
120 | #define ELF_EXEC_PAGESIZE 16384 | ||
121 | |||
122 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | ||
123 | use of this is to invoke "./ld.so someprog" to test out a new version of | ||
124 | the loader. We need to make sure that it is out of the way of the program | ||
125 | that it will "exec", and that there is sufficient room for the brk. */ | ||
126 | |||
127 | #define ELF_ET_DYN_BASE 0x08000000UL | ||
128 | |||
129 | /* This yields a mask that user programs can use to figure out what | ||
130 | instruction set this cpu supports. */ | ||
131 | |||
132 | #define ELF_HWCAP (0) | ||
133 | |||
134 | /* This yields a string that ld.so will use to load implementation | ||
135 | specific libraries for optimization. This is more specific in | ||
136 | intent than poking at uname or /proc/cpuinfo. */ | ||
137 | |||
138 | #define ELF_PLATFORM (NULL) | ||
139 | |||
140 | #endif | ||
diff --git a/arch/frv/include/asm/emergency-restart.h b/arch/frv/include/asm/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/arch/frv/include/asm/emergency-restart.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_EMERGENCY_RESTART_H | ||
2 | #define _ASM_EMERGENCY_RESTART_H | ||
3 | |||
4 | #include <asm-generic/emergency-restart.h> | ||
5 | |||
6 | #endif /* _ASM_EMERGENCY_RESTART_H */ | ||
diff --git a/arch/frv/include/asm/fpu.h b/arch/frv/include/asm/fpu.h deleted file mode 100644 index 2f0929333f91..000000000000 --- a/arch/frv/include/asm/fpu.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __ASM_FPU_H | ||
3 | #define __ASM_FPU_H | ||
4 | |||
5 | |||
6 | /* | ||
7 | * MAX floating point unit state size (FSAVE/FRESTORE) | ||
8 | */ | ||
9 | |||
10 | #define kernel_fpu_end() do { asm volatile("bar":::"memory"); preempt_enable(); } while(0) | ||
11 | |||
12 | #endif /* __ASM_FPU_H */ | ||
diff --git a/arch/frv/include/asm/ftrace.h b/arch/frv/include/asm/ftrace.h deleted file mode 100644 index 40a8c178f10d..000000000000 --- a/arch/frv/include/asm/ftrace.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* empty */ | ||
diff --git a/arch/frv/include/asm/futex.h b/arch/frv/include/asm/futex.h deleted file mode 100644 index dfcc3484231d..000000000000 --- a/arch/frv/include/asm/futex.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_FUTEX_H | ||
3 | #define _ASM_FUTEX_H | ||
4 | |||
5 | #ifdef __KERNEL__ | ||
6 | |||
7 | #include <linux/futex.h> | ||
8 | #include <asm/errno.h> | ||
9 | #include <linux/uaccess.h> | ||
10 | |||
11 | extern int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, | ||
12 | u32 __user *uaddr); | ||
13 | |||
14 | static inline int | ||
15 | futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, | ||
16 | u32 oldval, u32 newval) | ||
17 | { | ||
18 | return -ENOSYS; | ||
19 | } | ||
20 | |||
21 | #endif | ||
22 | #endif | ||
diff --git a/arch/frv/include/asm/gdb-stub.h b/arch/frv/include/asm/gdb-stub.h deleted file mode 100644 index e6bedd0cd9a5..000000000000 --- a/arch/frv/include/asm/gdb-stub.h +++ /dev/null | |||
@@ -1,146 +0,0 @@ | |||
1 | /* gdb-stub.h: FRV GDB stub | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #ifndef __ASM_GDB_STUB_H | ||
13 | #define __ASM_GDB_STUB_H | ||
14 | |||
15 | #undef GDBSTUB_DEBUG_IO | ||
16 | #undef GDBSTUB_DEBUG_PROTOCOL | ||
17 | |||
18 | #include <asm/ptrace.h> | ||
19 | |||
20 | /* | ||
21 | * important register numbers in GDB protocol | ||
22 | * - GR0, GR1, GR2, GR3, GR4, GR5, GR6, GR7, | ||
23 | * - GR8, GR9, GR10, GR11, GR12, GR13, GR14, GR15, | ||
24 | * - GR16, GR17, GR18, GR19, GR20, GR21, GR22, GR23, | ||
25 | * - GR24, GR25, GR26, GR27, GR28, GR29, GR30, GR31, | ||
26 | * - GR32, GR33, GR34, GR35, GR36, GR37, GR38, GR39, | ||
27 | * - GR40, GR41, GR42, GR43, GR44, GR45, GR46, GR47, | ||
28 | * - GR48, GR49, GR50, GR51, GR52, GR53, GR54, GR55, | ||
29 | * - GR56, GR57, GR58, GR59, GR60, GR61, GR62, GR63, | ||
30 | * - FR0, FR1, FR2, FR3, FR4, FR5, FR6, FR7, | ||
31 | * - FR8, FR9, FR10, FR11, FR12, FR13, FR14, FR15, | ||
32 | * - FR16, FR17, FR18, FR19, FR20, FR21, FR22, FR23, | ||
33 | * - FR24, FR25, FR26, FR27, FR28, FR29, FR30, FR31, | ||
34 | * - FR32, FR33, FR34, FR35, FR36, FR37, FR38, FR39, | ||
35 | * - FR40, FR41, FR42, FR43, FR44, FR45, FR46, FR47, | ||
36 | * - FR48, FR49, FR50, FR51, FR52, FR53, FR54, FR55, | ||
37 | * - FR56, FR57, FR58, FR59, FR60, FR61, FR62, FR63, | ||
38 | * - PC, PSR, CCR, CCCR, | ||
39 | * - _X132, _X133, _X134 | ||
40 | * - TBR, BRR, DBAR0, DBAR1, DBAR2, DBAR3, | ||
41 | * - SCR0, SCR1, SCR2, SCR3, | ||
42 | * - LR, LCR, | ||
43 | * - IACC0H, IACC0L, | ||
44 | * - FSR0, | ||
45 | * - ACC0, ACC1, ACC2, ACC3, ACC4, ACC5, ACC6, ACC7, | ||
46 | * - ACCG0123, ACCG4567, | ||
47 | * - MSR0, MSR1, | ||
48 | * - GNER0, GNER1, | ||
49 | * - FNER0, FNER1, | ||
50 | */ | ||
51 | #define GDB_REG_GR(N) (N) | ||
52 | #define GDB_REG_FR(N) (64+(N)) | ||
53 | #define GDB_REG_PC 128 | ||
54 | #define GDB_REG_PSR 129 | ||
55 | #define GDB_REG_CCR 130 | ||
56 | #define GDB_REG_CCCR 131 | ||
57 | #define GDB_REG_TBR 135 | ||
58 | #define GDB_REG_BRR 136 | ||
59 | #define GDB_REG_DBAR(N) (137+(N)) | ||
60 | #define GDB_REG_SCR(N) (141+(N)) | ||
61 | #define GDB_REG_LR 145 | ||
62 | #define GDB_REG_LCR 146 | ||
63 | #define GDB_REG_FSR0 149 | ||
64 | #define GDB_REG_ACC(N) (150+(N)) | ||
65 | #define GDB_REG_ACCG(N) (158+(N)/4) | ||
66 | #define GDB_REG_MSR(N) (160+(N)) | ||
67 | #define GDB_REG_GNER(N) (162+(N)) | ||
68 | #define GDB_REG_FNER(N) (164+(N)) | ||
69 | |||
70 | #define GDB_REG_SP GDB_REG_GR(1) | ||
71 | #define GDB_REG_FP GDB_REG_GR(2) | ||
72 | |||
73 | #ifndef _LANGUAGE_ASSEMBLY | ||
74 | |||
75 | /* | ||
76 | * Prototypes | ||
77 | */ | ||
78 | extern void show_registers_only(struct pt_regs *regs); | ||
79 | |||
80 | extern void gdbstub_init(void); | ||
81 | extern void gdbstub(int type); | ||
82 | extern void gdbstub_exit(int status); | ||
83 | |||
84 | extern void gdbstub_io_init(void); | ||
85 | extern void gdbstub_set_baud(unsigned baud); | ||
86 | extern int gdbstub_rx_char(unsigned char *_ch, int nonblock); | ||
87 | extern void gdbstub_tx_char(unsigned char ch); | ||
88 | extern void gdbstub_tx_flush(void); | ||
89 | extern void gdbstub_do_rx(void); | ||
90 | |||
91 | extern asmlinkage void __debug_stub_init_break(void); | ||
92 | extern asmlinkage void __break_hijack_kernel_event(void); | ||
93 | extern asmlinkage void __break_hijack_kernel_event_breaks_here(void); | ||
94 | |||
95 | extern asmlinkage void gdbstub_rx_handler(void); | ||
96 | extern asmlinkage void gdbstub_rx_irq(void); | ||
97 | extern asmlinkage void gdbstub_intercept(void); | ||
98 | |||
99 | extern uint32_t __entry_usertrap_table[]; | ||
100 | extern uint32_t __entry_kerneltrap_table[]; | ||
101 | |||
102 | extern volatile u8 gdbstub_rx_buffer[PAGE_SIZE]; | ||
103 | extern volatile u32 gdbstub_rx_inp; | ||
104 | extern volatile u32 gdbstub_rx_outp; | ||
105 | extern volatile u8 gdbstub_rx_overflow; | ||
106 | extern u8 gdbstub_rx_unget; | ||
107 | |||
108 | extern void gdbstub_printk(const char *fmt, ...); | ||
109 | extern void debug_to_serial(const char *p, int n); | ||
110 | extern void console_set_baud(unsigned baud); | ||
111 | |||
112 | #ifdef GDBSTUB_DEBUG_IO | ||
113 | #define gdbstub_io(FMT,...) gdbstub_printk(FMT, ##__VA_ARGS__) | ||
114 | #else | ||
115 | #define gdbstub_io(FMT,...) ({ 0; }) | ||
116 | #endif | ||
117 | |||
118 | #ifdef GDBSTUB_DEBUG_PROTOCOL | ||
119 | #define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__) | ||
120 | #else | ||
121 | #define gdbstub_proto(FMT,...) ({ 0; }) | ||
122 | #endif | ||
123 | |||
124 | /* | ||
125 | * we dedicate GR31 to keeping a pointer to the gdbstub exception frame | ||
126 | * - gr31 is destroyed on entry to the gdbstub if !MMU | ||
127 | * - gr31 is saved in scr3 on entry to the gdbstub if in !MMU | ||
128 | */ | ||
129 | register struct frv_frame0 *__debug_frame0 asm("gr31"); | ||
130 | |||
131 | #define __debug_frame (&__debug_frame0->regs) | ||
132 | #define __debug_user_context (&__debug_frame0->uc) | ||
133 | #define __debug_regs (&__debug_frame0->debug) | ||
134 | #define __debug_reg(X) ((unsigned long *) ((unsigned long) &__debug_frame0 + (X))) | ||
135 | |||
136 | struct frv_debug_status { | ||
137 | unsigned long bpsr; | ||
138 | unsigned long dcr; | ||
139 | unsigned long brr; | ||
140 | unsigned long nmar; | ||
141 | }; | ||
142 | |||
143 | extern struct frv_debug_status __debug_status; | ||
144 | |||
145 | #endif /* _LANGUAGE_ASSEMBLY */ | ||
146 | #endif /* __ASM_GDB_STUB_H */ | ||
diff --git a/arch/frv/include/asm/gpio-regs.h b/arch/frv/include/asm/gpio-regs.h deleted file mode 100644 index 9edf5d5d4d3f..000000000000 --- a/arch/frv/include/asm/gpio-regs.h +++ /dev/null | |||
@@ -1,116 +0,0 @@ | |||
1 | /* gpio-regs.h: on-chip general purpose I/O registers | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_GPIO_REGS | ||
13 | #define _ASM_GPIO_REGS | ||
14 | |||
15 | #define __reg(ADDR) (*(volatile unsigned long *)(ADDR)) | ||
16 | |||
17 | #define __get_PDR() ({ __reg(0xfeff0400); }) | ||
18 | #define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0) | ||
19 | |||
20 | #define __get_GPDR() ({ __reg(0xfeff0408); }) | ||
21 | #define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0) | ||
22 | |||
23 | #define __get_SIR() ({ __reg(0xfeff0410); }) | ||
24 | #define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0) | ||
25 | |||
26 | #define __get_SOR() ({ __reg(0xfeff0418); }) | ||
27 | #define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0) | ||
28 | |||
29 | #define __set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0) | ||
30 | |||
31 | #define __set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0) | ||
32 | |||
33 | #define __get_RSTR() ({ __reg(0xfeff0500); }) | ||
34 | #define __set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0) | ||
35 | |||
36 | |||
37 | |||
38 | /* PDR definitions */ | ||
39 | #define PDR_GPIO_DATA(X) (1 << (X)) | ||
40 | |||
41 | /* GPDR definitions */ | ||
42 | #define GPDR_INPUT 0 | ||
43 | #define GPDR_OUTPUT 1 | ||
44 | #define GPDR_DREQ0_BIT 0x00001000 | ||
45 | #define GPDR_DREQ1_BIT 0x00008000 | ||
46 | #define GPDR_DREQ2_BIT 0x00040000 | ||
47 | #define GPDR_DREQ3_BIT 0x00080000 | ||
48 | #define GPDR_DREQ4_BIT 0x00004000 | ||
49 | #define GPDR_DREQ5_BIT 0x00020000 | ||
50 | #define GPDR_DREQ6_BIT 0x00100000 | ||
51 | #define GPDR_DREQ7_BIT 0x00200000 | ||
52 | #define GPDR_DACK0_BIT 0x00002000 | ||
53 | #define GPDR_DACK1_BIT 0x00010000 | ||
54 | #define GPDR_DACK2_BIT 0x00100000 | ||
55 | #define GPDR_DACK3_BIT 0x00200000 | ||
56 | #define GPDR_DONE0_BIT 0x00004000 | ||
57 | #define GPDR_DONE1_BIT 0x00020000 | ||
58 | #define GPDR_GPIO_DIR(X,D) ((D) << (X)) | ||
59 | |||
60 | /* SIR definitions */ | ||
61 | #define SIR_GPIO_INPUT 0 | ||
62 | #define SIR_DREQ7_INPUT 0x00200000 | ||
63 | #define SIR_DREQ6_INPUT 0x00100000 | ||
64 | #define SIR_DREQ3_INPUT 0x00080000 | ||
65 | #define SIR_DREQ2_INPUT 0x00040000 | ||
66 | #define SIR_DREQ5_INPUT 0x00020000 | ||
67 | #define SIR_DREQ1_INPUT 0x00008000 | ||
68 | #define SIR_DREQ4_INPUT 0x00004000 | ||
69 | #define SIR_DREQ0_INPUT 0x00001000 | ||
70 | #define SIR_RXD1_INPUT 0x00000400 | ||
71 | #define SIR_CTS0_INPUT 0x00000100 | ||
72 | #define SIR_RXD0_INPUT 0x00000040 | ||
73 | #define SIR_GATE1_INPUT 0x00000020 | ||
74 | #define SIR_GATE0_INPUT 0x00000010 | ||
75 | #define SIR_IRQ3_INPUT 0x00000008 | ||
76 | #define SIR_IRQ2_INPUT 0x00000004 | ||
77 | #define SIR_IRQ1_INPUT 0x00000002 | ||
78 | #define SIR_IRQ0_INPUT 0x00000001 | ||
79 | #define SIR_DREQ_BITS (SIR_DREQ0_INPUT | SIR_DREQ1_INPUT | \ | ||
80 | SIR_DREQ2_INPUT | SIR_DREQ3_INPUT | \ | ||
81 | SIR_DREQ4_INPUT | SIR_DREQ5_INPUT | \ | ||
82 | SIR_DREQ6_INPUT | SIR_DREQ7_INPUT) | ||
83 | |||
84 | /* SOR definitions */ | ||
85 | #define SOR_GPIO_OUTPUT 0 | ||
86 | #define SOR_DACK3_OUTPUT 0x00200000 | ||
87 | #define SOR_DACK2_OUTPUT 0x00100000 | ||
88 | #define SOR_DONE1_OUTPUT 0x00020000 | ||
89 | #define SOR_DACK1_OUTPUT 0x00010000 | ||
90 | #define SOR_DONE0_OUTPUT 0x00004000 | ||
91 | #define SOR_DACK0_OUTPUT 0x00002000 | ||
92 | #define SOR_TXD1_OUTPUT 0x00000800 | ||
93 | #define SOR_RTS0_OUTPUT 0x00000200 | ||
94 | #define SOR_TXD0_OUTPUT 0x00000080 | ||
95 | #define SOR_TOUT1_OUTPUT 0x00000020 | ||
96 | #define SOR_TOUT0_OUTPUT 0x00000010 | ||
97 | #define SOR_DONE_BITS (SOR_DONE0_OUTPUT | SOR_DONE1_OUTPUT) | ||
98 | #define SOR_DACK_BITS (SOR_DACK0_OUTPUT | SOR_DACK1_OUTPUT | \ | ||
99 | SOR_DACK2_OUTPUT | SOR_DACK3_OUTPUT) | ||
100 | |||
101 | /* PDSR definitions */ | ||
102 | #define PDSR_UNCHANGED 0 | ||
103 | #define PDSR_SET_BIT(X) (1 << (X)) | ||
104 | |||
105 | /* PDCR definitions */ | ||
106 | #define PDCR_UNCHANGED 0 | ||
107 | #define PDCR_CLEAR_BIT(X) (1 << (X)) | ||
108 | |||
109 | /* RSTR definitions */ | ||
110 | /* Read Only */ | ||
111 | #define RSTR_POWERON 0x00000400 | ||
112 | #define RSTR_SOFTRESET_STATUS 0x00000100 | ||
113 | /* Write Only */ | ||
114 | #define RSTR_SOFTRESET 0x00000001 | ||
115 | |||
116 | #endif /* _ASM_GPIO_REGS */ | ||
diff --git a/arch/frv/include/asm/hardirq.h b/arch/frv/include/asm/hardirq.h deleted file mode 100644 index c62833d6ebbb..000000000000 --- a/arch/frv/include/asm/hardirq.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* hardirq.h: FRV hardware IRQ management | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_HARDIRQ_H | ||
13 | #define __ASM_HARDIRQ_H | ||
14 | |||
15 | #include <linux/atomic.h> | ||
16 | |||
17 | extern atomic_t irq_err_count; | ||
18 | static inline void ack_bad_irq(int irq) | ||
19 | { | ||
20 | atomic_inc(&irq_err_count); | ||
21 | } | ||
22 | #define ack_bad_irq ack_bad_irq | ||
23 | |||
24 | #include <asm-generic/hardirq.h> | ||
25 | |||
26 | #endif | ||
diff --git a/arch/frv/include/asm/highmem.h b/arch/frv/include/asm/highmem.h deleted file mode 100644 index 1f58938703ab..000000000000 --- a/arch/frv/include/asm/highmem.h +++ /dev/null | |||
@@ -1,149 +0,0 @@ | |||
1 | /* highmem.h: virtual kernel memory mappings for high memory | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from include/asm-i386/highmem.h | ||
6 | * | ||
7 | * See Documentation/frv/mmu-layout.txt for more information. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #ifndef _ASM_HIGHMEM_H | ||
16 | #define _ASM_HIGHMEM_H | ||
17 | |||
18 | #ifdef __KERNEL__ | ||
19 | |||
20 | #include <linux/init.h> | ||
21 | #include <linux/highmem.h> | ||
22 | #include <asm/mem-layout.h> | ||
23 | #include <asm/spr-regs.h> | ||
24 | #include <asm/mb-regs.h> | ||
25 | |||
26 | #define NR_TLB_LINES 64 /* number of lines in the TLB */ | ||
27 | |||
28 | #ifndef __ASSEMBLY__ | ||
29 | |||
30 | #include <linux/interrupt.h> | ||
31 | #include <asm/kmap_types.h> | ||
32 | #include <asm/pgtable.h> | ||
33 | |||
34 | #ifdef CONFIG_DEBUG_HIGHMEM | ||
35 | #define HIGHMEM_DEBUG 1 | ||
36 | #else | ||
37 | #define HIGHMEM_DEBUG 0 | ||
38 | #endif | ||
39 | |||
40 | /* declarations for highmem.c */ | ||
41 | extern unsigned long highstart_pfn, highend_pfn; | ||
42 | |||
43 | #define kmap_prot PAGE_KERNEL | ||
44 | #define kmap_pte ______kmap_pte_in_TLB | ||
45 | extern pte_t *pkmap_page_table; | ||
46 | |||
47 | #define flush_cache_kmaps() do { } while (0) | ||
48 | |||
49 | /* | ||
50 | * Right now we initialize only a single pte table. It can be extended | ||
51 | * easily, subsequent pte tables have to be allocated in one physical | ||
52 | * chunk of RAM. | ||
53 | */ | ||
54 | #define LAST_PKMAP PTRS_PER_PTE | ||
55 | #define LAST_PKMAP_MASK (LAST_PKMAP - 1) | ||
56 | #define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT) | ||
57 | #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) | ||
58 | |||
59 | extern void *kmap_high(struct page *page); | ||
60 | extern void kunmap_high(struct page *page); | ||
61 | |||
62 | extern void *kmap(struct page *page); | ||
63 | extern void kunmap(struct page *page); | ||
64 | |||
65 | #endif /* !__ASSEMBLY__ */ | ||
66 | |||
67 | /* | ||
68 | * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap | ||
69 | * gives a more generic (and caching) interface. But kmap_atomic can | ||
70 | * be used in IRQ contexts, so in some (very limited) cases we need | ||
71 | * it. | ||
72 | */ | ||
73 | #define KMAP_ATOMIC_CACHE_DAMR 8 | ||
74 | |||
75 | #ifndef __ASSEMBLY__ | ||
76 | |||
77 | #define __kmap_atomic_primary(cached, paddr, ampr) \ | ||
78 | ({ \ | ||
79 | unsigned long damlr, dampr; \ | ||
80 | \ | ||
81 | dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \ | ||
82 | \ | ||
83 | if (!cached) \ | ||
84 | asm volatile("movgs %0,dampr"#ampr :: "r"(dampr) : "memory"); \ | ||
85 | else \ | ||
86 | /* cache flush page attachment point */ \ | ||
87 | asm volatile("movgs %0,iampr"#ampr"\n" \ | ||
88 | "movgs %0,dampr"#ampr"\n" \ | ||
89 | :: "r"(dampr) : "memory" \ | ||
90 | ); \ | ||
91 | \ | ||
92 | asm("movsg damlr"#ampr",%0" : "=r"(damlr)); \ | ||
93 | \ | ||
94 | /*printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);*/ \ | ||
95 | \ | ||
96 | (void *) damlr; \ | ||
97 | }) | ||
98 | |||
99 | #define __kmap_atomic_secondary(slot, paddr) \ | ||
100 | ({ \ | ||
101 | unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE; \ | ||
102 | unsigned long dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \ | ||
103 | \ | ||
104 | asm volatile("movgs %0,tplr \n" \ | ||
105 | "movgs %1,tppr \n" \ | ||
106 | "tlbpr %0,gr0,#2,#1" \ | ||
107 | : : "r"(damlr), "r"(dampr) : "memory"); \ | ||
108 | \ | ||
109 | /*printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);*/ \ | ||
110 | \ | ||
111 | (void *) damlr; \ | ||
112 | }) | ||
113 | |||
114 | static inline void *kmap_atomic_primary(struct page *page) | ||
115 | { | ||
116 | unsigned long paddr; | ||
117 | |||
118 | pagefault_disable(); | ||
119 | paddr = page_to_phys(page); | ||
120 | |||
121 | return __kmap_atomic_primary(1, paddr, 2); | ||
122 | } | ||
123 | |||
124 | #define __kunmap_atomic_primary(cached, ampr) \ | ||
125 | do { \ | ||
126 | asm volatile("movgs gr0,dampr"#ampr"\n" ::: "memory"); \ | ||
127 | if (cached) \ | ||
128 | asm volatile("movgs gr0,iampr"#ampr"\n" ::: "memory"); \ | ||
129 | } while(0) | ||
130 | |||
131 | #define __kunmap_atomic_secondary(slot, vaddr) \ | ||
132 | do { \ | ||
133 | asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory"); \ | ||
134 | } while(0) | ||
135 | |||
136 | static inline void kunmap_atomic_primary(void *kvaddr) | ||
137 | { | ||
138 | __kunmap_atomic_primary(1, 2); | ||
139 | pagefault_enable(); | ||
140 | } | ||
141 | |||
142 | void *kmap_atomic(struct page *page); | ||
143 | void __kunmap_atomic(void *kvaddr); | ||
144 | |||
145 | #endif /* !__ASSEMBLY__ */ | ||
146 | |||
147 | #endif /* __KERNEL__ */ | ||
148 | |||
149 | #endif /* _ASM_HIGHMEM_H */ | ||
diff --git a/arch/frv/include/asm/hw_irq.h b/arch/frv/include/asm/hw_irq.h deleted file mode 100644 index 522ad37923d8..000000000000 --- a/arch/frv/include/asm/hw_irq.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* hw_irq.h: FR-V specific h/w IRQ stuff | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_HW_IRQ_H | ||
13 | #define _ASM_HW_IRQ_H | ||
14 | |||
15 | |||
16 | #endif /* _ASM_HW_IRQ_H */ | ||
diff --git a/arch/frv/include/asm/io.h b/arch/frv/include/asm/io.h deleted file mode 100644 index 8062fc73fad0..000000000000 --- a/arch/frv/include/asm/io.h +++ /dev/null | |||
@@ -1,414 +0,0 @@ | |||
1 | /* io.h: FRV I/O operations | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * This gets interesting when talking to the PCI bus - the CPU is in big endian | ||
12 | * mode, the PCI bus is little endian and the hardware in the middle can do | ||
13 | * byte swapping | ||
14 | */ | ||
15 | #ifndef _ASM_IO_H | ||
16 | #define _ASM_IO_H | ||
17 | |||
18 | #ifdef __KERNEL__ | ||
19 | |||
20 | #define ARCH_HAS_IOREMAP_WT | ||
21 | |||
22 | #include <linux/types.h> | ||
23 | #include <asm/virtconvert.h> | ||
24 | #include <asm/string.h> | ||
25 | #include <asm/mb-regs.h> | ||
26 | #include <asm-generic/pci_iomap.h> | ||
27 | #include <linux/delay.h> | ||
28 | |||
29 | /* | ||
30 | * swap functions are sometimes needed to interface little-endian hardware | ||
31 | */ | ||
32 | |||
33 | static inline unsigned short _swapw(unsigned short v) | ||
34 | { | ||
35 | return ((v << 8) | (v >> 8)); | ||
36 | } | ||
37 | |||
38 | static inline unsigned long _swapl(unsigned long v) | ||
39 | { | ||
40 | return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24)); | ||
41 | } | ||
42 | |||
43 | //#define __iormb() asm volatile("membar") | ||
44 | //#define __iowmb() asm volatile("membar") | ||
45 | |||
46 | static inline u8 __raw_readb(const volatile void __iomem *addr) | ||
47 | { | ||
48 | return __builtin_read8((volatile void __iomem *)addr); | ||
49 | } | ||
50 | |||
51 | static inline u16 __raw_readw(const volatile void __iomem *addr) | ||
52 | { | ||
53 | return __builtin_read16((volatile void __iomem *)addr); | ||
54 | } | ||
55 | |||
56 | static inline u32 __raw_readl(const volatile void __iomem *addr) | ||
57 | { | ||
58 | return __builtin_read32((volatile void __iomem *)addr); | ||
59 | } | ||
60 | |||
61 | #define __raw_writeb(datum, addr) __builtin_write8(addr, datum) | ||
62 | #define __raw_writew(datum, addr) __builtin_write16(addr, datum) | ||
63 | #define __raw_writel(datum, addr) __builtin_write32(addr, datum) | ||
64 | |||
65 | static inline void io_outsb(unsigned int addr, const void *buf, int len) | ||
66 | { | ||
67 | unsigned long __ioaddr = (unsigned long) addr; | ||
68 | const uint8_t *bp = buf; | ||
69 | |||
70 | while (len--) | ||
71 | __builtin_write8((volatile void __iomem *) __ioaddr, *bp++); | ||
72 | } | ||
73 | |||
74 | static inline void io_outsw(unsigned int addr, const void *buf, int len) | ||
75 | { | ||
76 | unsigned long __ioaddr = (unsigned long) addr; | ||
77 | const uint16_t *bp = buf; | ||
78 | |||
79 | while (len--) | ||
80 | __builtin_write16((volatile void __iomem *) __ioaddr, (*bp++)); | ||
81 | } | ||
82 | |||
83 | extern void __outsl_ns(unsigned int addr, const void *buf, int len); | ||
84 | extern void __outsl_sw(unsigned int addr, const void *buf, int len); | ||
85 | static inline void __outsl(unsigned int addr, const void *buf, int len, int swap) | ||
86 | { | ||
87 | unsigned long __ioaddr = (unsigned long) addr; | ||
88 | |||
89 | if (!swap) | ||
90 | __outsl_ns(__ioaddr, buf, len); | ||
91 | else | ||
92 | __outsl_sw(__ioaddr, buf, len); | ||
93 | } | ||
94 | |||
95 | static inline void io_insb(unsigned long addr, void *buf, int len) | ||
96 | { | ||
97 | uint8_t *bp = buf; | ||
98 | |||
99 | while (len--) | ||
100 | *bp++ = __builtin_read8((volatile void __iomem *) addr); | ||
101 | } | ||
102 | |||
103 | static inline void io_insw(unsigned long addr, void *buf, int len) | ||
104 | { | ||
105 | uint16_t *bp = buf; | ||
106 | |||
107 | while (len--) | ||
108 | *bp++ = __builtin_read16((volatile void __iomem *) addr); | ||
109 | } | ||
110 | |||
111 | extern void __insl_ns(unsigned long addr, void *buf, int len); | ||
112 | extern void __insl_sw(unsigned long addr, void *buf, int len); | ||
113 | static inline void __insl(unsigned long addr, void *buf, int len, int swap) | ||
114 | { | ||
115 | if (!swap) | ||
116 | __insl_ns(addr, buf, len); | ||
117 | else | ||
118 | __insl_sw(addr, buf, len); | ||
119 | } | ||
120 | |||
121 | #define mmiowb() mb() | ||
122 | |||
123 | /* | ||
124 | * make the short names macros so specific devices | ||
125 | * can override them as required | ||
126 | */ | ||
127 | |||
128 | static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) | ||
129 | { | ||
130 | memset((void __force *) addr, val, count); | ||
131 | } | ||
132 | |||
133 | static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) | ||
134 | { | ||
135 | memcpy(dst, (void __force *) src, count); | ||
136 | } | ||
137 | |||
138 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) | ||
139 | { | ||
140 | memcpy((void __force *) dst, src, count); | ||
141 | } | ||
142 | |||
143 | static inline uint8_t inb(unsigned long addr) | ||
144 | { | ||
145 | return __builtin_read8((void __iomem *)addr); | ||
146 | } | ||
147 | |||
148 | static inline uint16_t inw(unsigned long addr) | ||
149 | { | ||
150 | uint16_t ret = __builtin_read16((void __iomem *)addr); | ||
151 | |||
152 | if (__is_PCI_IO(addr)) | ||
153 | ret = _swapw(ret); | ||
154 | |||
155 | return ret; | ||
156 | } | ||
157 | |||
158 | static inline uint32_t inl(unsigned long addr) | ||
159 | { | ||
160 | uint32_t ret = __builtin_read32((void __iomem *)addr); | ||
161 | |||
162 | if (__is_PCI_IO(addr)) | ||
163 | ret = _swapl(ret); | ||
164 | |||
165 | return ret; | ||
166 | } | ||
167 | |||
168 | static inline void outb(uint8_t datum, unsigned long addr) | ||
169 | { | ||
170 | __builtin_write8((void __iomem *)addr, datum); | ||
171 | } | ||
172 | |||
173 | static inline void outw(uint16_t datum, unsigned long addr) | ||
174 | { | ||
175 | if (__is_PCI_IO(addr)) | ||
176 | datum = _swapw(datum); | ||
177 | __builtin_write16((void __iomem *)addr, datum); | ||
178 | } | ||
179 | |||
180 | static inline void outl(uint32_t datum, unsigned long addr) | ||
181 | { | ||
182 | if (__is_PCI_IO(addr)) | ||
183 | datum = _swapl(datum); | ||
184 | __builtin_write32((void __iomem *)addr, datum); | ||
185 | } | ||
186 | |||
187 | #define inb_p(addr) inb(addr) | ||
188 | #define inw_p(addr) inw(addr) | ||
189 | #define inl_p(addr) inl(addr) | ||
190 | #define outb_p(x,addr) outb(x,addr) | ||
191 | #define outw_p(x,addr) outw(x,addr) | ||
192 | #define outl_p(x,addr) outl(x,addr) | ||
193 | |||
194 | #define outsb(a,b,l) io_outsb(a,b,l) | ||
195 | #define outsw(a,b,l) io_outsw(a,b,l) | ||
196 | #define outsl(a,b,l) __outsl(a,b,l,0) | ||
197 | |||
198 | #define insb(a,b,l) io_insb(a,b,l) | ||
199 | #define insw(a,b,l) io_insw(a,b,l) | ||
200 | #define insl(a,b,l) __insl(a,b,l,0) | ||
201 | |||
202 | #define IO_SPACE_LIMIT 0xffffffff | ||
203 | |||
204 | static inline uint8_t readb(const volatile void __iomem *addr) | ||
205 | { | ||
206 | return __builtin_read8((__force void volatile __iomem *) addr); | ||
207 | } | ||
208 | |||
209 | static inline uint16_t readw(const volatile void __iomem *addr) | ||
210 | { | ||
211 | uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr); | ||
212 | |||
213 | if (__is_PCI_MEM(addr)) | ||
214 | ret = _swapw(ret); | ||
215 | return ret; | ||
216 | } | ||
217 | |||
218 | static inline uint32_t readl(const volatile void __iomem *addr) | ||
219 | { | ||
220 | uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr); | ||
221 | |||
222 | if (__is_PCI_MEM(addr)) | ||
223 | ret = _swapl(ret); | ||
224 | |||
225 | return ret; | ||
226 | } | ||
227 | |||
228 | #define readb_relaxed readb | ||
229 | #define readw_relaxed readw | ||
230 | #define readl_relaxed readl | ||
231 | |||
232 | static inline void writeb(uint8_t datum, volatile void __iomem *addr) | ||
233 | { | ||
234 | __builtin_write8(addr, datum); | ||
235 | if (__is_PCI_MEM(addr)) | ||
236 | __flush_PCI_writes(); | ||
237 | } | ||
238 | |||
239 | static inline void writew(uint16_t datum, volatile void __iomem *addr) | ||
240 | { | ||
241 | if (__is_PCI_MEM(addr)) | ||
242 | datum = _swapw(datum); | ||
243 | |||
244 | __builtin_write16(addr, datum); | ||
245 | if (__is_PCI_MEM(addr)) | ||
246 | __flush_PCI_writes(); | ||
247 | } | ||
248 | |||
249 | static inline void writel(uint32_t datum, volatile void __iomem *addr) | ||
250 | { | ||
251 | if (__is_PCI_MEM(addr)) | ||
252 | datum = _swapl(datum); | ||
253 | |||
254 | __builtin_write32(addr, datum); | ||
255 | if (__is_PCI_MEM(addr)) | ||
256 | __flush_PCI_writes(); | ||
257 | } | ||
258 | |||
259 | #define writeb_relaxed writeb | ||
260 | #define writew_relaxed writew | ||
261 | #define writel_relaxed writel | ||
262 | |||
263 | /* Values for nocacheflag and cmode */ | ||
264 | #define IOMAP_FULL_CACHING 0 | ||
265 | #define IOMAP_NOCACHE_SER 1 | ||
266 | #define IOMAP_NOCACHE_NONSER 2 | ||
267 | #define IOMAP_WRITETHROUGH 3 | ||
268 | |||
269 | extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); | ||
270 | |||
271 | static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) | ||
272 | { | ||
273 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | ||
274 | } | ||
275 | |||
276 | static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size) | ||
277 | { | ||
278 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | ||
279 | } | ||
280 | |||
281 | static inline void __iomem *ioremap_wt(unsigned long physaddr, unsigned long size) | ||
282 | { | ||
283 | return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); | ||
284 | } | ||
285 | |||
286 | static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size) | ||
287 | { | ||
288 | return __ioremap(physaddr, size, IOMAP_FULL_CACHING); | ||
289 | } | ||
290 | |||
291 | #define ioremap_wc ioremap_nocache | ||
292 | #define ioremap_uc ioremap_nocache | ||
293 | |||
294 | extern void iounmap(void volatile __iomem *addr); | ||
295 | |||
296 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
297 | { | ||
298 | return (void __iomem *) port; | ||
299 | } | ||
300 | |||
301 | static inline void ioport_unmap(void __iomem *p) | ||
302 | { | ||
303 | } | ||
304 | |||
305 | static inline void flush_write_buffers(void) | ||
306 | { | ||
307 | __asm__ __volatile__ ("membar" : : :"memory"); | ||
308 | } | ||
309 | |||
310 | /* | ||
311 | * do appropriate I/O accesses for token type | ||
312 | */ | ||
313 | static inline unsigned int ioread8(void __iomem *p) | ||
314 | { | ||
315 | return __builtin_read8(p); | ||
316 | } | ||
317 | |||
318 | static inline unsigned int ioread16(void __iomem *p) | ||
319 | { | ||
320 | uint16_t ret = __builtin_read16(p); | ||
321 | if (__is_PCI_addr(p)) | ||
322 | ret = _swapw(ret); | ||
323 | return ret; | ||
324 | } | ||
325 | |||
326 | static inline unsigned int ioread32(void __iomem *p) | ||
327 | { | ||
328 | uint32_t ret = __builtin_read32(p); | ||
329 | if (__is_PCI_addr(p)) | ||
330 | ret = _swapl(ret); | ||
331 | return ret; | ||
332 | } | ||
333 | |||
334 | static inline void iowrite8(u8 val, void __iomem *p) | ||
335 | { | ||
336 | __builtin_write8(p, val); | ||
337 | if (__is_PCI_MEM(p)) | ||
338 | __flush_PCI_writes(); | ||
339 | } | ||
340 | |||
341 | static inline void iowrite16(u16 val, void __iomem *p) | ||
342 | { | ||
343 | if (__is_PCI_addr(p)) | ||
344 | val = _swapw(val); | ||
345 | __builtin_write16(p, val); | ||
346 | if (__is_PCI_MEM(p)) | ||
347 | __flush_PCI_writes(); | ||
348 | } | ||
349 | |||
350 | static inline void iowrite32(u32 val, void __iomem *p) | ||
351 | { | ||
352 | if (__is_PCI_addr(p)) | ||
353 | val = _swapl(val); | ||
354 | __builtin_write32(p, val); | ||
355 | if (__is_PCI_MEM(p)) | ||
356 | __flush_PCI_writes(); | ||
357 | } | ||
358 | |||
359 | #define ioread16be(addr) be16_to_cpu(ioread16(addr)) | ||
360 | #define ioread32be(addr) be32_to_cpu(ioread32(addr)) | ||
361 | #define iowrite16be(v, addr) iowrite16(cpu_to_be16(v), (addr)) | ||
362 | #define iowrite32be(v, addr) iowrite32(cpu_to_be32(v), (addr)) | ||
363 | |||
364 | static inline void ioread8_rep(void __iomem *p, void *dst, unsigned long count) | ||
365 | { | ||
366 | io_insb((unsigned long) p, dst, count); | ||
367 | } | ||
368 | |||
369 | static inline void ioread16_rep(void __iomem *p, void *dst, unsigned long count) | ||
370 | { | ||
371 | io_insw((unsigned long) p, dst, count); | ||
372 | } | ||
373 | |||
374 | static inline void ioread32_rep(void __iomem *p, void *dst, unsigned long count) | ||
375 | { | ||
376 | __insl_ns((unsigned long) p, dst, count); | ||
377 | } | ||
378 | |||
379 | static inline void iowrite8_rep(void __iomem *p, const void *src, unsigned long count) | ||
380 | { | ||
381 | io_outsb((unsigned long) p, src, count); | ||
382 | } | ||
383 | |||
384 | static inline void iowrite16_rep(void __iomem *p, const void *src, unsigned long count) | ||
385 | { | ||
386 | io_outsw((unsigned long) p, src, count); | ||
387 | } | ||
388 | |||
389 | static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long count) | ||
390 | { | ||
391 | __outsl_ns((unsigned long) p, src, count); | ||
392 | } | ||
393 | |||
394 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ | ||
395 | struct pci_dev; | ||
396 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) | ||
397 | { | ||
398 | } | ||
399 | |||
400 | |||
401 | /* | ||
402 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
403 | * access | ||
404 | */ | ||
405 | #define xlate_dev_mem_ptr(p) __va(p) | ||
406 | |||
407 | /* | ||
408 | * Convert a virtual cached pointer to an uncached pointer | ||
409 | */ | ||
410 | #define xlate_dev_kmem_ptr(p) p | ||
411 | |||
412 | #endif /* __KERNEL__ */ | ||
413 | |||
414 | #endif /* _ASM_IO_H */ | ||
diff --git a/arch/frv/include/asm/irc-regs.h b/arch/frv/include/asm/irc-regs.h deleted file mode 100644 index afa30aeacc82..000000000000 --- a/arch/frv/include/asm/irc-regs.h +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* irc-regs.h: on-chip interrupt controller registers | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_IRC_REGS | ||
13 | #define _ASM_IRC_REGS | ||
14 | |||
15 | #define __reg(ADDR) (*(volatile unsigned long *)(ADDR)) | ||
16 | |||
17 | #define __get_TM0() ({ __reg(0xfeff9800); }) | ||
18 | #define __get_TM1() ({ __reg(0xfeff9808); }) | ||
19 | #define __set_TM1(V) do { __reg(0xfeff9808) = (V); mb(); } while(0) | ||
20 | |||
21 | #define __set_TM1x(XI,V) \ | ||
22 | do { \ | ||
23 | int shift = (XI) * 2 + 16; \ | ||
24 | unsigned long tm1 = __reg(0xfeff9808); \ | ||
25 | tm1 &= ~(0x3 << shift); \ | ||
26 | tm1 |= (V) << shift; \ | ||
27 | __reg(0xfeff9808) = tm1; \ | ||
28 | mb(); \ | ||
29 | } while(0) | ||
30 | |||
31 | #define __get_RS(C) ({ (__reg(0xfeff9810) >> ((C)+16)) & 1; }) | ||
32 | |||
33 | #define __clr_RC(C) do { __reg(0xfeff9818) = 1 << ((C)+16); mb(); } while(0) | ||
34 | |||
35 | #define __get_MASK(C) ({ (__reg(0xfeff9820) >> ((C)+16)) & 1; }) | ||
36 | #define __set_MASK(C) do { __reg(0xfeff9820) |= 1 << ((C)+16); mb(); } while(0) | ||
37 | #define __clr_MASK(C) do { __reg(0xfeff9820) &= ~(1 << ((C)+16)); mb(); } while(0) | ||
38 | |||
39 | #define __get_MASK_all() __get_MASK(0) | ||
40 | #define __set_MASK_all() __set_MASK(0) | ||
41 | #define __clr_MASK_all() __clr_MASK(0) | ||
42 | |||
43 | #define __get_IRL() ({ (__reg(0xfeff9828) >> 16) & 0xf; }) | ||
44 | #define __clr_IRL() do { __reg(0xfeff9828) = 0x100000; mb(); } while(0) | ||
45 | |||
46 | #define __get_IRR(N) ({ __reg(0xfeff9840 + (N) * 8); }) | ||
47 | #define __set_IRR(N,V) do { __reg(0xfeff9840 + (N) * 8) = (V); } while(0) | ||
48 | |||
49 | #define __get_IITMR(N) ({ __reg(0xfeff9880 + (N) * 8); }) | ||
50 | #define __set_IITMR(N,V) do { __reg(0xfeff9880 + (N) * 8) = (V); } while(0) | ||
51 | |||
52 | |||
53 | #endif /* _ASM_IRC_REGS */ | ||
diff --git a/arch/frv/include/asm/irq.h b/arch/frv/include/asm/irq.h deleted file mode 100644 index 3a66ebd754bd..000000000000 --- a/arch/frv/include/asm/irq.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* irq.h: FRV IRQ definitions | ||
2 | * | ||
3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_IRQ_H_ | ||
13 | #define _ASM_IRQ_H_ | ||
14 | |||
15 | #define NR_IRQS 48 | ||
16 | #define IRQ_BASE_CPU (0 * 16) | ||
17 | #define IRQ_BASE_FPGA (1 * 16) | ||
18 | #define IRQ_BASE_MB93493 (2 * 16) | ||
19 | |||
20 | /* probe returns a 32-bit IRQ mask:-/ */ | ||
21 | #define MIN_PROBE_IRQ (NR_IRQS - 32) | ||
22 | |||
23 | #ifndef __ASSEMBLY__ | ||
24 | static inline int irq_canonicalize(int irq) | ||
25 | { | ||
26 | return irq; | ||
27 | } | ||
28 | #endif | ||
29 | |||
30 | #endif /* _ASM_IRQ_H_ */ | ||
diff --git a/arch/frv/include/asm/irq_regs.h b/arch/frv/include/asm/irq_regs.h deleted file mode 100644 index d22e83289ad1..000000000000 --- a/arch/frv/include/asm/irq_regs.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* FRV per-CPU frame pointer holder | ||
2 | * | ||
3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_IRQ_REGS_H | ||
13 | #define _ASM_IRQ_REGS_H | ||
14 | |||
15 | /* | ||
16 | * Per-cpu current frame pointer - the location of the last exception frame on | ||
17 | * the stack | ||
18 | * - on FRV, GR28 is dedicated to keeping a pointer to the current exception | ||
19 | * frame | ||
20 | */ | ||
21 | #define ARCH_HAS_OWN_IRQ_REGS | ||
22 | |||
23 | #ifndef __ASSEMBLY__ | ||
24 | #define get_irq_regs() (__frame) | ||
25 | #endif | ||
26 | |||
27 | #endif /* _ASM_IRQ_REGS_H */ | ||
diff --git a/arch/frv/include/asm/irqflags.h b/arch/frv/include/asm/irqflags.h deleted file mode 100644 index 82f0b5363f42..000000000000 --- a/arch/frv/include/asm/irqflags.h +++ /dev/null | |||
@@ -1,158 +0,0 @@ | |||
1 | /* FR-V interrupt handling | ||
2 | * | ||
3 | * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public Licence | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the Licence, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_IRQFLAGS_H | ||
13 | #define _ASM_IRQFLAGS_H | ||
14 | |||
15 | /* | ||
16 | * interrupt flag manipulation | ||
17 | * - use virtual interrupt management since touching the PSR is slow | ||
18 | * - ICC2.Z: T if interrupts virtually disabled | ||
19 | * - ICC2.C: F if interrupts really disabled | ||
20 | * - if Z==1 upon interrupt: | ||
21 | * - C is set to 0 | ||
22 | * - interrupts are really disabled | ||
23 | * - entry.S returns immediately | ||
24 | * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts | ||
25 | * - if taken, the trap: | ||
26 | * - sets ICC2.C | ||
27 | * - enables interrupts | ||
28 | */ | ||
29 | static inline void arch_local_irq_disable(void) | ||
30 | { | ||
31 | /* set Z flag, but don't change the C flag */ | ||
32 | asm volatile(" andcc gr0,gr0,gr0,icc2 \n" | ||
33 | : | ||
34 | : | ||
35 | : "memory", "icc2" | ||
36 | ); | ||
37 | } | ||
38 | |||
39 | static inline void arch_local_irq_enable(void) | ||
40 | { | ||
41 | /* clear Z flag and then test the C flag */ | ||
42 | asm volatile(" oricc gr0,#1,gr0,icc2 \n" | ||
43 | " tihi icc2,gr0,#2 \n" | ||
44 | : | ||
45 | : | ||
46 | : "memory", "icc2" | ||
47 | ); | ||
48 | } | ||
49 | |||
50 | static inline unsigned long arch_local_save_flags(void) | ||
51 | { | ||
52 | unsigned long flags; | ||
53 | |||
54 | asm volatile("movsg ccr,%0" | ||
55 | : "=r"(flags) | ||
56 | : | ||
57 | : "memory"); | ||
58 | |||
59 | /* shift ICC2.Z to bit 0 */ | ||
60 | flags >>= 26; | ||
61 | |||
62 | /* make flags 1 if interrupts disabled, 0 otherwise */ | ||
63 | return flags & 1UL; | ||
64 | |||
65 | } | ||
66 | |||
67 | static inline unsigned long arch_local_irq_save(void) | ||
68 | { | ||
69 | unsigned long flags = arch_local_save_flags(); | ||
70 | arch_local_irq_disable(); | ||
71 | return flags; | ||
72 | } | ||
73 | |||
74 | static inline void arch_local_irq_restore(unsigned long flags) | ||
75 | { | ||
76 | /* load the Z flag by turning 1 if disabled into 0 if disabled | ||
77 | * and thus setting the Z flag but not the C flag */ | ||
78 | asm volatile(" xoricc %0,#1,gr0,icc2 \n" | ||
79 | /* then trap if Z=0 and C=0 */ | ||
80 | " tihi icc2,gr0,#2 \n" | ||
81 | : | ||
82 | : "r"(flags) | ||
83 | : "memory", "icc2" | ||
84 | ); | ||
85 | |||
86 | } | ||
87 | |||
88 | static inline bool arch_irqs_disabled_flags(unsigned long flags) | ||
89 | { | ||
90 | return flags; | ||
91 | } | ||
92 | |||
93 | static inline bool arch_irqs_disabled(void) | ||
94 | { | ||
95 | return arch_irqs_disabled_flags(arch_local_save_flags()); | ||
96 | } | ||
97 | |||
98 | /* | ||
99 | * real interrupt flag manipulation | ||
100 | */ | ||
101 | #define __arch_local_irq_disable() \ | ||
102 | do { \ | ||
103 | unsigned long psr; \ | ||
104 | asm volatile(" movsg psr,%0 \n" \ | ||
105 | " andi %0,%2,%0 \n" \ | ||
106 | " ori %0,%1,%0 \n" \ | ||
107 | " movgs %0,psr \n" \ | ||
108 | : "=r"(psr) \ | ||
109 | : "i" (PSR_PIL_14), "i" (~PSR_PIL) \ | ||
110 | : "memory"); \ | ||
111 | } while (0) | ||
112 | |||
113 | #define __arch_local_irq_enable() \ | ||
114 | do { \ | ||
115 | unsigned long psr; \ | ||
116 | asm volatile(" movsg psr,%0 \n" \ | ||
117 | " andi %0,%1,%0 \n" \ | ||
118 | " movgs %0,psr \n" \ | ||
119 | : "=r"(psr) \ | ||
120 | : "i" (~PSR_PIL) \ | ||
121 | : "memory"); \ | ||
122 | } while (0) | ||
123 | |||
124 | #define __arch_local_save_flags(flags) \ | ||
125 | do { \ | ||
126 | typecheck(unsigned long, flags); \ | ||
127 | asm("movsg psr,%0" \ | ||
128 | : "=r"(flags) \ | ||
129 | : \ | ||
130 | : "memory"); \ | ||
131 | } while (0) | ||
132 | |||
133 | #define __arch_local_irq_save(flags) \ | ||
134 | do { \ | ||
135 | unsigned long npsr; \ | ||
136 | typecheck(unsigned long, flags); \ | ||
137 | asm volatile(" movsg psr,%0 \n" \ | ||
138 | " andi %0,%3,%1 \n" \ | ||
139 | " ori %1,%2,%1 \n" \ | ||
140 | " movgs %1,psr \n" \ | ||
141 | : "=r"(flags), "=r"(npsr) \ | ||
142 | : "i" (PSR_PIL_14), "i" (~PSR_PIL) \ | ||
143 | : "memory"); \ | ||
144 | } while (0) | ||
145 | |||
146 | #define __arch_local_irq_restore(flags) \ | ||
147 | do { \ | ||
148 | typecheck(unsigned long, flags); \ | ||
149 | asm volatile(" movgs %0,psr \n" \ | ||
150 | : \ | ||
151 | : "r" (flags) \ | ||
152 | : "memory"); \ | ||
153 | } while (0) | ||
154 | |||
155 | #define __arch_irqs_disabled() \ | ||
156 | ((__get_PSR() & PSR_PIL) >= PSR_PIL_14) | ||
157 | |||
158 | #endif /* _ASM_IRQFLAGS_H */ | ||
diff --git a/arch/frv/include/asm/kdebug.h b/arch/frv/include/asm/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/arch/frv/include/asm/kdebug.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/kdebug.h> | ||
diff --git a/arch/frv/include/asm/kmap_types.h b/arch/frv/include/asm/kmap_types.h deleted file mode 100644 index 0849db1362d6..000000000000 --- a/arch/frv/include/asm/kmap_types.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | |||
3 | #ifndef _ASM_KMAP_TYPES_H | ||
4 | #define _ASM_KMAP_TYPES_H | ||
5 | |||
6 | #define KM_TYPE_NR 17 | ||
7 | |||
8 | #endif | ||
diff --git a/arch/frv/include/asm/linkage.h b/arch/frv/include/asm/linkage.h deleted file mode 100644 index 636c1bced7d4..000000000000 --- a/arch/frv/include/asm/linkage.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __ASM_LINKAGE_H | ||
2 | #define __ASM_LINKAGE_H | ||
3 | |||
4 | #define __ALIGN .align 4 | ||
5 | #define __ALIGN_STR ".align 4" | ||
6 | |||
7 | #endif | ||
diff --git a/arch/frv/include/asm/local.h b/arch/frv/include/asm/local.h deleted file mode 100644 index 259ae7b041a7..000000000000 --- a/arch/frv/include/asm/local.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_LOCAL_H | ||
3 | #define _ASM_LOCAL_H | ||
4 | |||
5 | #include <asm-generic/local.h> | ||
6 | |||
7 | #endif /* _ASM_LOCAL_H */ | ||
diff --git a/arch/frv/include/asm/local64.h b/arch/frv/include/asm/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/arch/frv/include/asm/local64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/local64.h> | ||
diff --git a/arch/frv/include/asm/math-emu.h b/arch/frv/include/asm/math-emu.h deleted file mode 100644 index 8af762dd6109..000000000000 --- a/arch/frv/include/asm/math-emu.h +++ /dev/null | |||
@@ -1,302 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_MATH_EMU_H | ||
3 | #define _ASM_MATH_EMU_H | ||
4 | |||
5 | #include <asm/setup.h> | ||
6 | #include <linux/linkage.h> | ||
7 | |||
8 | /* Status Register bits */ | ||
9 | |||
10 | /* accrued exception bits */ | ||
11 | #define FPSR_AEXC_INEX 3 | ||
12 | #define FPSR_AEXC_DZ 4 | ||
13 | #define FPSR_AEXC_UNFL 5 | ||
14 | #define FPSR_AEXC_OVFL 6 | ||
15 | #define FPSR_AEXC_IOP 7 | ||
16 | |||
17 | /* exception status bits */ | ||
18 | #define FPSR_EXC_INEX1 8 | ||
19 | #define FPSR_EXC_INEX2 9 | ||
20 | #define FPSR_EXC_DZ 10 | ||
21 | #define FPSR_EXC_UNFL 11 | ||
22 | #define FPSR_EXC_OVFL 12 | ||
23 | #define FPSR_EXC_OPERR 13 | ||
24 | #define FPSR_EXC_SNAN 14 | ||
25 | #define FPSR_EXC_BSUN 15 | ||
26 | |||
27 | /* quotient byte, assumes big-endian, of course */ | ||
28 | #define FPSR_QUOTIENT(fpsr) (*((signed char *) &(fpsr) + 1)) | ||
29 | |||
30 | /* condition code bits */ | ||
31 | #define FPSR_CC_NAN 24 | ||
32 | #define FPSR_CC_INF 25 | ||
33 | #define FPSR_CC_Z 26 | ||
34 | #define FPSR_CC_NEG 27 | ||
35 | |||
36 | |||
37 | /* Control register bits */ | ||
38 | |||
39 | /* rounding mode */ | ||
40 | #define FPCR_ROUND_RN 0 /* round to nearest/even */ | ||
41 | #define FPCR_ROUND_RZ 1 /* round to zero */ | ||
42 | #define FPCR_ROUND_RM 2 /* minus infinity */ | ||
43 | #define FPCR_ROUND_RP 3 /* plus infinity */ | ||
44 | |||
45 | /* rounding precision */ | ||
46 | #define FPCR_PRECISION_X 0 /* long double */ | ||
47 | #define FPCR_PRECISION_S 1 /* double */ | ||
48 | #define FPCR_PRECISION_D 2 /* float */ | ||
49 | |||
50 | |||
51 | /* Flags to select the debugging output */ | ||
52 | #define PDECODE 0 | ||
53 | #define PEXECUTE 1 | ||
54 | #define PCONV 2 | ||
55 | #define PNORM 3 | ||
56 | #define PREGISTER 4 | ||
57 | #define PINSTR 5 | ||
58 | #define PUNIMPL 6 | ||
59 | #define PMOVEM 7 | ||
60 | |||
61 | #define PMDECODE (1<<PDECODE) | ||
62 | #define PMEXECUTE (1<<PEXECUTE) | ||
63 | #define PMCONV (1<<PCONV) | ||
64 | #define PMNORM (1<<PNORM) | ||
65 | #define PMREGISTER (1<<PREGISTER) | ||
66 | #define PMINSTR (1<<PINSTR) | ||
67 | #define PMUNIMPL (1<<PUNIMPL) | ||
68 | #define PMMOVEM (1<<PMOVEM) | ||
69 | |||
70 | #ifndef __ASSEMBLY__ | ||
71 | |||
72 | #include <linux/kernel.h> | ||
73 | #include <linux/sched.h> | ||
74 | |||
75 | union fp_mant64 { | ||
76 | unsigned long long m64; | ||
77 | unsigned long m32[2]; | ||
78 | }; | ||
79 | |||
80 | union fp_mant128 { | ||
81 | unsigned long long m64[2]; | ||
82 | unsigned long m32[4]; | ||
83 | }; | ||
84 | |||
85 | /* internal representation of extended fp numbers */ | ||
86 | struct fp_ext { | ||
87 | unsigned char lowmant; | ||
88 | unsigned char sign; | ||
89 | unsigned short exp; | ||
90 | union fp_mant64 mant; | ||
91 | }; | ||
92 | |||
93 | /* C representation of FPU registers */ | ||
94 | /* NOTE: if you change this, you have to change the assembler offsets | ||
95 | below and the size in <asm/fpu.h>, too */ | ||
96 | struct fp_data { | ||
97 | struct fp_ext fpreg[8]; | ||
98 | unsigned int fpcr; | ||
99 | unsigned int fpsr; | ||
100 | unsigned int fpiar; | ||
101 | unsigned short prec; | ||
102 | unsigned short rnd; | ||
103 | struct fp_ext temp[2]; | ||
104 | }; | ||
105 | |||
106 | #if FPU_EMU_DEBUG | ||
107 | extern unsigned int fp_debugprint; | ||
108 | |||
109 | #define dprint(bit, fmt, args...) ({ \ | ||
110 | if (fp_debugprint & (1 << (bit))) \ | ||
111 | printk(fmt, ## args); \ | ||
112 | }) | ||
113 | #else | ||
114 | #define dprint(bit, fmt, args...) | ||
115 | #endif | ||
116 | |||
117 | #define uprint(str) ({ \ | ||
118 | static int __count = 3; \ | ||
119 | \ | ||
120 | if (__count > 0) { \ | ||
121 | printk("You just hit an unimplemented " \ | ||
122 | "fpu instruction (%s)\n", str); \ | ||
123 | printk("Please report this to ....\n"); \ | ||
124 | __count--; \ | ||
125 | } \ | ||
126 | }) | ||
127 | |||
128 | #define FPDATA ((struct fp_data *)current->thread.fp) | ||
129 | |||
130 | #else /* __ASSEMBLY__ */ | ||
131 | |||
132 | #define FPDATA %a2 | ||
133 | |||
134 | /* offsets from the base register to the floating point data in the task struct */ | ||
135 | #define FPD_FPREG (TASK_THREAD+THREAD_FPREG+0) | ||
136 | #define FPD_FPCR (TASK_THREAD+THREAD_FPREG+96) | ||
137 | #define FPD_FPSR (TASK_THREAD+THREAD_FPREG+100) | ||
138 | #define FPD_FPIAR (TASK_THREAD+THREAD_FPREG+104) | ||
139 | #define FPD_PREC (TASK_THREAD+THREAD_FPREG+108) | ||
140 | #define FPD_RND (TASK_THREAD+THREAD_FPREG+110) | ||
141 | #define FPD_TEMPFP1 (TASK_THREAD+THREAD_FPREG+112) | ||
142 | #define FPD_TEMPFP2 (TASK_THREAD+THREAD_FPREG+124) | ||
143 | #define FPD_SIZEOF (TASK_THREAD+THREAD_FPREG+136) | ||
144 | |||
145 | /* offsets on the stack to access saved registers, | ||
146 | * these are only used during instruction decoding | ||
147 | * where we always know how deep we're on the stack. | ||
148 | */ | ||
149 | #define FPS_DO (PT_D0) | ||
150 | #define FPS_D1 (PT_D1) | ||
151 | #define FPS_D2 (PT_D2) | ||
152 | #define FPS_A0 (PT_A0) | ||
153 | #define FPS_A1 (PT_A1) | ||
154 | #define FPS_A2 (PT_A2) | ||
155 | #define FPS_SR (PT_SR) | ||
156 | #define FPS_PC (PT_PC) | ||
157 | #define FPS_EA (PT_PC+6) | ||
158 | #define FPS_PC2 (PT_PC+10) | ||
159 | |||
160 | .macro fp_get_fp_reg | ||
161 | lea (FPD_FPREG,FPDATA,%d0.w*4),%a0 | ||
162 | lea (%a0,%d0.w*8),%a0 | ||
163 | .endm | ||
164 | |||
165 | /* Macros used to get/put the current program counter. | ||
166 | * 020/030 use a different stack frame then 040/060, for the | ||
167 | * 040/060 the return pc points already to the next location, | ||
168 | * so this only needs to be modified for jump instructions. | ||
169 | */ | ||
170 | .macro fp_get_pc dest | ||
171 | move.l (FPS_PC+4,%sp),\dest | ||
172 | .endm | ||
173 | |||
174 | .macro fp_put_pc src,jump=0 | ||
175 | move.l \src,(FPS_PC+4,%sp) | ||
176 | .endm | ||
177 | |||
178 | .macro fp_get_instr_data f,s,dest,label | ||
179 | getuser \f,%sp@(FPS_PC+4)@(0),\dest,\label,%sp@(FPS_PC+4) | ||
180 | addq.l #\s,%sp@(FPS_PC+4) | ||
181 | .endm | ||
182 | |||
183 | .macro fp_get_instr_word dest,label,addr | ||
184 | fp_get_instr_data w,2,\dest,\label,\addr | ||
185 | .endm | ||
186 | |||
187 | .macro fp_get_instr_long dest,label,addr | ||
188 | fp_get_instr_data l,4,\dest,\label,\addr | ||
189 | .endm | ||
190 | |||
191 | /* These macros are used to read from/write to user space | ||
192 | * on error we jump to the fixup section, load the fault | ||
193 | * address into %a0 and jump to the exit. | ||
194 | * (derived from <asm/uaccess.h>) | ||
195 | */ | ||
196 | .macro getuser size,src,dest,label,addr | ||
197 | | printf ,"[\size<%08x]",1,\addr | ||
198 | .Lu1\@: moves\size \src,\dest | ||
199 | |||
200 | .section .fixup,"ax" | ||
201 | .even | ||
202 | .Lu2\@: move.l \addr,%a0 | ||
203 | jra \label | ||
204 | .previous | ||
205 | |||
206 | .section __ex_table,"a" | ||
207 | .align 4 | ||
208 | .long .Lu1\@,.Lu2\@ | ||
209 | .previous | ||
210 | .endm | ||
211 | |||
212 | .macro putuser size,src,dest,label,addr | ||
213 | | printf ,"[\size>%08x]",1,\addr | ||
214 | .Lu1\@: moves\size \src,\dest | ||
215 | .Lu2\@: | ||
216 | |||
217 | .section .fixup,"ax" | ||
218 | .even | ||
219 | .Lu3\@: move.l \addr,%a0 | ||
220 | jra \label | ||
221 | .previous | ||
222 | |||
223 | .section __ex_table,"a" | ||
224 | .align 4 | ||
225 | .long .Lu1\@,.Lu3\@ | ||
226 | .long .Lu2\@,.Lu3\@ | ||
227 | .previous | ||
228 | .endm | ||
229 | |||
230 | |||
231 | .macro movestack nr,arg1,arg2,arg3,arg4,arg5 | ||
232 | .if \nr | ||
233 | movestack (\nr-1),\arg2,\arg3,\arg4,\arg5 | ||
234 | move.l \arg1,-(%sp) | ||
235 | .endif | ||
236 | .endm | ||
237 | |||
238 | .macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5 | ||
239 | #ifdef FPU_EMU_DEBUG | ||
240 | .data | ||
241 | .Lpdata\@: | ||
242 | .string "\string" | ||
243 | .previous | ||
244 | |||
245 | movem.l %d0/%d1/%a0/%a1,-(%sp) | ||
246 | .if \bit+1 | ||
247 | #if 0 | ||
248 | moveq #\bit,%d0 | ||
249 | andw #7,%d0 | ||
250 | btst %d0,fp_debugprint+((31-\bit)/8) | ||
251 | #else | ||
252 | btst #\bit,fp_debugprint+((31-\bit)/8) | ||
253 | #endif | ||
254 | jeq .Lpskip\@ | ||
255 | .endif | ||
256 | movestack \nr,\arg1,\arg2,\arg3,\arg4,\arg5 | ||
257 | pea .Lpdata\@ | ||
258 | jsr printk | ||
259 | lea ((\nr+1)*4,%sp),%sp | ||
260 | .Lpskip\@: | ||
261 | movem.l (%sp)+,%d0/%d1/%a0/%a1 | ||
262 | #endif | ||
263 | .endm | ||
264 | |||
265 | .macro printx bit,fp | ||
266 | #ifdef FPU_EMU_DEBUG | ||
267 | movem.l %d0/%a0,-(%sp) | ||
268 | lea \fp,%a0 | ||
269 | #if 0 | ||
270 | moveq #'+',%d0 | ||
271 | tst.w (%a0) | ||
272 | jeq .Lx1\@ | ||
273 | moveq #'-',%d0 | ||
274 | .Lx1\@: printf \bit," %c",1,%d0 | ||
275 | move.l (4,%a0),%d0 | ||
276 | bclr #31,%d0 | ||
277 | jne .Lx2\@ | ||
278 | printf \bit,"0." | ||
279 | jra .Lx3\@ | ||
280 | .Lx2\@: printf \bit,"1." | ||
281 | .Lx3\@: printf \bit,"%08x%08x",2,%d0,%a0@(8) | ||
282 | move.w (2,%a0),%d0 | ||
283 | ext.l %d0 | ||
284 | printf \bit,"E%04x",1,%d0 | ||
285 | #else | ||
286 | printf \bit," %08x%08x%08x",3,%a0@,%a0@(4),%a0@(8) | ||
287 | #endif | ||
288 | movem.l (%sp)+,%d0/%a0 | ||
289 | #endif | ||
290 | .endm | ||
291 | |||
292 | .macro debug instr,args | ||
293 | #ifdef FPU_EMU_DEBUG | ||
294 | \instr \args | ||
295 | #endif | ||
296 | .endm | ||
297 | |||
298 | |||
299 | #endif /* __ASSEMBLY__ */ | ||
300 | |||
301 | #endif /* _ASM_FRV_MATH_EMU_H */ | ||
302 | |||
diff --git a/arch/frv/include/asm/mb-regs.h b/arch/frv/include/asm/mb-regs.h deleted file mode 100644 index 219e5f926f18..000000000000 --- a/arch/frv/include/asm/mb-regs.h +++ /dev/null | |||
@@ -1,200 +0,0 @@ | |||
1 | /* mb-regs.h: motherboard registers | ||
2 | * | ||
3 | * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MB_REGS_H | ||
13 | #define _ASM_MB_REGS_H | ||
14 | |||
15 | #include <asm/cpu-irqs.h> | ||
16 | #include <asm/sections.h> | ||
17 | #include <asm/mem-layout.h> | ||
18 | |||
19 | #ifndef __ASSEMBLY__ | ||
20 | /* gcc builtins, annotated */ | ||
21 | |||
22 | unsigned long __builtin_read8(volatile void __iomem *); | ||
23 | unsigned long __builtin_read16(volatile void __iomem *); | ||
24 | unsigned long __builtin_read32(volatile void __iomem *); | ||
25 | void __builtin_write8(volatile void __iomem *, unsigned char); | ||
26 | void __builtin_write16(volatile void __iomem *, unsigned short); | ||
27 | void __builtin_write32(volatile void __iomem *, unsigned long); | ||
28 | #endif | ||
29 | |||
30 | #define __region_IO KERNEL_IO_START /* the region from 0xe0000000 to 0xffffffff has suitable | ||
31 | * protection laid over the top for use in memory-mapped | ||
32 | * I/O | ||
33 | */ | ||
34 | |||
35 | #define __region_CS0 0xff000000 /* Boot ROMs area */ | ||
36 | |||
37 | #ifdef CONFIG_MB93091_VDK | ||
38 | /* | ||
39 | * VDK motherboard and CPU card specific stuff | ||
40 | */ | ||
41 | |||
42 | #include <asm/mb93091-fpga-irqs.h> | ||
43 | |||
44 | #define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0 | ||
45 | #define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1 | ||
46 | |||
47 | #define __region_CS2 0xe0000000 /* SLBUS/PCI I/O space */ | ||
48 | #define __region_CS2_M 0x0fffffff /* mask */ | ||
49 | #define __region_CS2_C 0x00000000 /* control */ | ||
50 | #define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */ | ||
51 | #define __region_CS5_M 0x00ffffff | ||
52 | #define __region_CS5_C 0x00010000 | ||
53 | #define __region_CS7 0xf1000000 /* CB70 CPU-card PCMCIA port I/O space */ | ||
54 | #define __region_CS7_M 0x00ffffff | ||
55 | #define __region_CS7_C 0x00410701 | ||
56 | #define __region_CS1 0xfc000000 /* SLBUS/PCI bridge control registers */ | ||
57 | #define __region_CS1_M 0x000fffff | ||
58 | #define __region_CS1_C 0x00000000 | ||
59 | #define __region_CS6 0xfc100000 /* CB70 CPU-card DM9000 LAN I/O space */ | ||
60 | #define __region_CS6_M 0x000fffff | ||
61 | #define __region_CS6_C 0x00400707 | ||
62 | #define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */ | ||
63 | #define __region_CS3_M 0x000fffff | ||
64 | #define __region_CS3_C 0xc8100000 | ||
65 | #define __region_CS4 0xfd000000 /* CB70 CPU-card extra flash space */ | ||
66 | #define __region_CS4_M 0x00ffffff | ||
67 | #define __region_CS4_C 0x00000f07 | ||
68 | |||
69 | #define __region_PCI_IO (__region_CS2 + 0x04000000UL) | ||
70 | #define __region_PCI_MEM (__region_CS2 + 0x08000000UL) | ||
71 | #define __flush_PCI_writes() \ | ||
72 | do { \ | ||
73 | __builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0); \ | ||
74 | } while(0) | ||
75 | |||
76 | #define __is_PCI_IO(addr) \ | ||
77 | (((unsigned long)(addr) >> 24) - (__region_PCI_IO >> 24) < (0x04000000UL >> 24)) | ||
78 | |||
79 | #define __is_PCI_MEM(addr) \ | ||
80 | ((unsigned long)(addr) - __region_PCI_MEM < 0x08000000UL) | ||
81 | |||
82 | #define __is_PCI_addr(addr) \ | ||
83 | ((unsigned long)(addr) - __region_PCI_IO < 0x0c000000UL) | ||
84 | |||
85 | #define __get_CLKSW() ({ *(volatile unsigned long *)(__region_CS2 + 0x0130000cUL) & 0xffUL; }) | ||
86 | #define __get_CLKIN() (__get_CLKSW() * 125U * 100000U / 24U) | ||
87 | |||
88 | #ifndef __ASSEMBLY__ | ||
89 | extern int __nongprelbss mb93090_mb00_detected; | ||
90 | #endif | ||
91 | |||
92 | #define __addr_LEDS() (__region_CS2 + 0x01200004UL) | ||
93 | #ifdef CONFIG_MB93090_MB00 | ||
94 | #define __set_LEDS(X) \ | ||
95 | do { \ | ||
96 | if (mb93090_mb00_detected) \ | ||
97 | __builtin_write32((void __iomem *) __addr_LEDS(), ~(X)); \ | ||
98 | } while (0) | ||
99 | #else | ||
100 | #define __set_LEDS(X) | ||
101 | #endif | ||
102 | |||
103 | #define __addr_LCD() (__region_CS2 + 0x01200008UL) | ||
104 | #define __get_LCD(B) __builtin_read32((volatile void __iomem *) (B)) | ||
105 | #define __set_LCD(B,X) __builtin_write32((volatile void __iomem *) (B), (X)) | ||
106 | |||
107 | #define LCD_D 0x000000ff /* LCD data bus */ | ||
108 | #define LCD_RW 0x00000100 /* LCD R/W signal */ | ||
109 | #define LCD_RS 0x00000200 /* LCD Register Select */ | ||
110 | #define LCD_E 0x00000400 /* LCD Start Enable Signal */ | ||
111 | |||
112 | #define LCD_CMD_CLEAR (LCD_E|0x001) | ||
113 | #define LCD_CMD_HOME (LCD_E|0x002) | ||
114 | #define LCD_CMD_CURSOR_INC (LCD_E|0x004) | ||
115 | #define LCD_CMD_SCROLL_INC (LCD_E|0x005) | ||
116 | #define LCD_CMD_CURSOR_DEC (LCD_E|0x006) | ||
117 | #define LCD_CMD_SCROLL_DEC (LCD_E|0x007) | ||
118 | #define LCD_CMD_OFF (LCD_E|0x008) | ||
119 | #define LCD_CMD_ON(CRSR,BLINK) (LCD_E|0x00c|(CRSR<<1)|BLINK) | ||
120 | #define LCD_CMD_CURSOR_MOVE_L (LCD_E|0x010) | ||
121 | #define LCD_CMD_CURSOR_MOVE_R (LCD_E|0x014) | ||
122 | #define LCD_CMD_DISPLAY_SHIFT_L (LCD_E|0x018) | ||
123 | #define LCD_CMD_DISPLAY_SHIFT_R (LCD_E|0x01c) | ||
124 | #define LCD_CMD_FUNCSET(DL,N,F) (LCD_E|0x020|(DL<<4)|(N<<3)|(F<<2)) | ||
125 | #define LCD_CMD_SET_CG_ADDR(X) (LCD_E|0x040|X) | ||
126 | #define LCD_CMD_SET_DD_ADDR(X) (LCD_E|0x080|X) | ||
127 | #define LCD_CMD_READ_BUSY (LCD_E|LCD_RW) | ||
128 | #define LCD_DATA_WRITE(X) (LCD_E|LCD_RS|(X)) | ||
129 | #define LCD_DATA_READ (LCD_E|LCD_RS|LCD_RW) | ||
130 | |||
131 | #else | ||
132 | /* | ||
133 | * PDK unit specific stuff | ||
134 | */ | ||
135 | |||
136 | #include <asm/mb93093-fpga-irqs.h> | ||
137 | |||
138 | #define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0 | ||
139 | #define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1 | ||
140 | |||
141 | #define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */ | ||
142 | #define __region_CS5_M 0x00ffffff /* mask */ | ||
143 | #define __region_CS5_C 0x00010000 /* control */ | ||
144 | #define __region_CS2 0x20000000 /* FPGA registers */ | ||
145 | #define __region_CS2_M 0x000fffff | ||
146 | #define __region_CS2_C 0x00000000 | ||
147 | #define __region_CS1 0xfc100000 /* LAN registers */ | ||
148 | #define __region_CS1_M 0x000fffff | ||
149 | #define __region_CS1_C 0x00010404 | ||
150 | #define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */ | ||
151 | #define __region_CS3_M 0x000fffff | ||
152 | #define __region_CS3_C 0xc8000000 | ||
153 | #define __region_CS4 0xfd000000 /* extra ROMs area */ | ||
154 | #define __region_CS4_M 0x00ffffff | ||
155 | #define __region_CS4_C 0x00000f07 | ||
156 | |||
157 | #define __region_CS6 0xfe000000 /* not used - hide behind CPU resource I/O regs */ | ||
158 | #define __region_CS6_M 0x000fffff | ||
159 | #define __region_CS6_C 0x00000f07 | ||
160 | #define __region_CS7 0xfe000000 /* not used - hide behind CPU resource I/O regs */ | ||
161 | #define __region_CS7_M 0x000fffff | ||
162 | #define __region_CS7_C 0x00000f07 | ||
163 | |||
164 | #define __is_PCI_IO(addr) 0 /* no PCI */ | ||
165 | #define __is_PCI_MEM(addr) 0 | ||
166 | #define __is_PCI_addr(addr) 0 | ||
167 | #define __region_PCI_IO 0 | ||
168 | #define __region_PCI_MEM 0 | ||
169 | #define __flush_PCI_writes() do { } while(0) | ||
170 | |||
171 | #define __get_CLKSW() 0UL | ||
172 | #define __get_CLKIN() 66000000UL | ||
173 | |||
174 | #define __addr_LEDS() (__region_CS2 + 0x00000023UL) | ||
175 | #define __set_LEDS(X) __builtin_write8((volatile void __iomem *) __addr_LEDS(), (X)) | ||
176 | |||
177 | #define __addr_FPGATR() (__region_CS2 + 0x00000030UL) | ||
178 | #define __set_FPGATR(X) __builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X)) | ||
179 | #define __get_FPGATR() __builtin_read32((volatile void __iomem *) __addr_FPGATR()) | ||
180 | |||
181 | #define MB93093_FPGA_FPGATR_AUDIO_CLK 0x00000003 | ||
182 | |||
183 | #define __set_FPGATR_AUDIO_CLK(V) \ | ||
184 | __set_FPGATR((__get_FPGATR() & ~MB93093_FPGA_FPGATR_AUDIO_CLK) | (V)) | ||
185 | |||
186 | #define MB93093_FPGA_FPGATR_AUDIO_CLK_OFF 0x0 | ||
187 | #define MB93093_FPGA_FPGATR_AUDIO_CLK_11MHz 0x1 | ||
188 | #define MB93093_FPGA_FPGATR_AUDIO_CLK_12MHz 0x2 | ||
189 | #define MB93093_FPGA_FPGATR_AUDIO_CLK_02MHz 0x3 | ||
190 | |||
191 | #define MB93093_FPGA_SWR_PUSHSWMASK (0x1F<<26) | ||
192 | #define MB93093_FPGA_SWR_PUSHSW4 (1<<29) | ||
193 | |||
194 | #define __addr_FPGA_SWR ((volatile void __iomem *)(__region_CS2 + 0x28UL)) | ||
195 | #define __get_FPGA_PUSHSW1_5() (__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK) | ||
196 | |||
197 | |||
198 | #endif | ||
199 | |||
200 | #endif /* _ASM_MB_REGS_H */ | ||
diff --git a/arch/frv/include/asm/mb86943a.h b/arch/frv/include/asm/mb86943a.h deleted file mode 100644 index e87ef924bfb4..000000000000 --- a/arch/frv/include/asm/mb86943a.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* mb86943a.h: MB86943 SPARClite <-> PCI bridge registers | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MB86943A_H | ||
13 | #define _ASM_MB86943A_H | ||
14 | |||
15 | #include <asm/mb-regs.h> | ||
16 | |||
17 | #define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00) | ||
18 | |||
19 | #define MB86943_SL_CTL_BUS_WIDTH_64 0x00000001 | ||
20 | #define MB86943_SL_CTL_AS_HOST 0x00000002 | ||
21 | #define MB86943_SL_CTL_DRCT_MASTER_SWAP 0x00000004 | ||
22 | #define MB86943_SL_CTL_DRCT_SLAVE_SWAP 0x00000008 | ||
23 | #define MB86943_SL_CTL_PCI_CONFIG_SWAP 0x00000010 | ||
24 | #define MB86943_SL_CTL_ECS0_ENABLE 0x00000020 | ||
25 | #define MB86943_SL_CTL_ECS1_ENABLE 0x00000040 | ||
26 | #define MB86943_SL_CTL_ECS2_ENABLE 0x00000080 | ||
27 | |||
28 | #define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N))) | ||
29 | #define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N))) | ||
30 | #define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N))) | ||
31 | |||
32 | #define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50) | ||
33 | #define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58) | ||
34 | #define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60) | ||
35 | #define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68) | ||
36 | #define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70) | ||
37 | #define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78) | ||
38 | |||
39 | #define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014) | ||
40 | #define MB86943_PCIARB_EN 0x00000001 | ||
41 | |||
42 | #endif /* _ASM_MB86943A_H */ | ||
diff --git a/arch/frv/include/asm/mb93091-fpga-irqs.h b/arch/frv/include/asm/mb93091-fpga-irqs.h deleted file mode 100644 index 19778c5ba9d6..000000000000 --- a/arch/frv/include/asm/mb93091-fpga-irqs.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* mb93091-fpga-irqs.h: MB93091 CPU board FPGA IRQs | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MB93091_FPGA_IRQS_H | ||
13 | #define _ASM_MB93091_FPGA_IRQS_H | ||
14 | |||
15 | #include <asm/irq.h> | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | |||
19 | /* IRQ IDs presented to drivers */ | ||
20 | enum { | ||
21 | IRQ_FPGA__UNUSED = IRQ_BASE_FPGA, | ||
22 | IRQ_FPGA_SYSINT_BUS_EXPANSION_1, | ||
23 | IRQ_FPGA_SL_BUS_EXPANSION_2, | ||
24 | IRQ_FPGA_PCI_INTD, | ||
25 | IRQ_FPGA_PCI_INTC, | ||
26 | IRQ_FPGA_PCI_INTB, | ||
27 | IRQ_FPGA_PCI_INTA, | ||
28 | IRQ_FPGA_SL_BUS_EXPANSION_7, | ||
29 | IRQ_FPGA_SYSINT_BUS_EXPANSION_8, | ||
30 | IRQ_FPGA_SL_BUS_EXPANSION_9, | ||
31 | IRQ_FPGA_MB86943_PCI_INTA, | ||
32 | IRQ_FPGA_MB86943_SLBUS_SIDE, | ||
33 | IRQ_FPGA_RTL8029_INTA, | ||
34 | IRQ_FPGA_SYSINT_BUS_EXPANSION_13, | ||
35 | IRQ_FPGA_SL_BUS_EXPANSION_14, | ||
36 | IRQ_FPGA_NMI, | ||
37 | }; | ||
38 | |||
39 | |||
40 | #endif /* !__ASSEMBLY__ */ | ||
41 | |||
42 | #endif /* _ASM_MB93091_FPGA_IRQS_H */ | ||
diff --git a/arch/frv/include/asm/mb93093-fpga-irqs.h b/arch/frv/include/asm/mb93093-fpga-irqs.h deleted file mode 100644 index 590266b1a6d3..000000000000 --- a/arch/frv/include/asm/mb93093-fpga-irqs.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* mb93093-fpga-irqs.h: MB93093 CPU board FPGA IRQs | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MB93093_FPGA_IRQS_H | ||
13 | #define _ASM_MB93093_FPGA_IRQS_H | ||
14 | |||
15 | #include <asm/irq.h> | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | |||
19 | /* IRQ IDs presented to drivers */ | ||
20 | enum { | ||
21 | IRQ_FPGA_PUSH_BUTTON_SW1_5 = IRQ_BASE_FPGA + 8, | ||
22 | IRQ_FPGA_ROCKER_C_SW8 = IRQ_BASE_FPGA + 9, | ||
23 | IRQ_FPGA_ROCKER_C_SW9 = IRQ_BASE_FPGA + 10, | ||
24 | }; | ||
25 | |||
26 | |||
27 | #endif /* !__ASSEMBLY__ */ | ||
28 | |||
29 | #endif /* _ASM_MB93093_FPGA_IRQS_H */ | ||
diff --git a/arch/frv/include/asm/mb93493-irqs.h b/arch/frv/include/asm/mb93493-irqs.h deleted file mode 100644 index 82c7aeddd333..000000000000 --- a/arch/frv/include/asm/mb93493-irqs.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* mb93493-irqs.h: MB93493 companion chip IRQs | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MB93493_IRQS_H | ||
13 | #define _ASM_MB93493_IRQS_H | ||
14 | |||
15 | #include <asm/irq.h> | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | |||
19 | /* IRQ IDs presented to drivers */ | ||
20 | enum { | ||
21 | IRQ_MB93493_VDC = IRQ_BASE_MB93493 + 0, | ||
22 | IRQ_MB93493_VCC = IRQ_BASE_MB93493 + 1, | ||
23 | IRQ_MB93493_AUDIO_OUT = IRQ_BASE_MB93493 + 2, | ||
24 | IRQ_MB93493_I2C_0 = IRQ_BASE_MB93493 + 3, | ||
25 | IRQ_MB93493_I2C_1 = IRQ_BASE_MB93493 + 4, | ||
26 | IRQ_MB93493_USB = IRQ_BASE_MB93493 + 5, | ||
27 | IRQ_MB93493_LOCAL_BUS = IRQ_BASE_MB93493 + 7, | ||
28 | IRQ_MB93493_PCMCIA = IRQ_BASE_MB93493 + 8, | ||
29 | IRQ_MB93493_GPIO = IRQ_BASE_MB93493 + 9, | ||
30 | IRQ_MB93493_AUDIO_IN = IRQ_BASE_MB93493 + 10, | ||
31 | }; | ||
32 | |||
33 | /* IRQ multiplexor mappings */ | ||
34 | #define ROUTE_VIA_IRQ0 0 /* route IRQ by way of CPU external IRQ 0 */ | ||
35 | #define ROUTE_VIA_IRQ1 1 /* route IRQ by way of CPU external IRQ 1 */ | ||
36 | |||
37 | #define IRQ_MB93493_VDC_ROUTE ROUTE_VIA_IRQ0 | ||
38 | #define IRQ_MB93493_VCC_ROUTE ROUTE_VIA_IRQ1 | ||
39 | #define IRQ_MB93493_AUDIO_OUT_ROUTE ROUTE_VIA_IRQ1 | ||
40 | #define IRQ_MB93493_I2C_0_ROUTE ROUTE_VIA_IRQ1 | ||
41 | #define IRQ_MB93493_I2C_1_ROUTE ROUTE_VIA_IRQ1 | ||
42 | #define IRQ_MB93493_USB_ROUTE ROUTE_VIA_IRQ1 | ||
43 | #define IRQ_MB93493_LOCAL_BUS_ROUTE ROUTE_VIA_IRQ1 | ||
44 | #define IRQ_MB93493_PCMCIA_ROUTE ROUTE_VIA_IRQ1 | ||
45 | #define IRQ_MB93493_GPIO_ROUTE ROUTE_VIA_IRQ1 | ||
46 | #define IRQ_MB93493_AUDIO_IN_ROUTE ROUTE_VIA_IRQ1 | ||
47 | |||
48 | #endif /* !__ASSEMBLY__ */ | ||
49 | |||
50 | #endif /* _ASM_MB93493_IRQS_H */ | ||
diff --git a/arch/frv/include/asm/mb93493-regs.h b/arch/frv/include/asm/mb93493-regs.h deleted file mode 100644 index 8a1f6aac8cf1..000000000000 --- a/arch/frv/include/asm/mb93493-regs.h +++ /dev/null | |||
@@ -1,281 +0,0 @@ | |||
1 | /* mb93493-regs.h: MB93493 companion chip registers | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MB93493_REGS_H | ||
13 | #define _ASM_MB93493_REGS_H | ||
14 | |||
15 | #include <asm/mb-regs.h> | ||
16 | #include <asm/mb93493-irqs.h> | ||
17 | |||
18 | #define __addr_MB93493(X) ((volatile unsigned long *)(__region_CS3 + (X))) | ||
19 | #define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); }) | ||
20 | |||
21 | #define __set_MB93493(X,V) \ | ||
22 | do { \ | ||
23 | *(volatile unsigned long *)(__region_CS3 + (X)) = (V); mb(); \ | ||
24 | } while(0) | ||
25 | |||
26 | #define __get_MB93493_STSR(X) __get_MB93493(0x3c0 + (X) * 4) | ||
27 | #define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V)) | ||
28 | #define MB93493_STSR_EN | ||
29 | |||
30 | #define __addr_MB93493_IQSR(X) __addr_MB93493(0x3d0 + (X) * 4) | ||
31 | #define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4) | ||
32 | #define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V)) | ||
33 | |||
34 | #define __get_MB93493_DQSR(X) __get_MB93493(0x3e0 + (X) * 4) | ||
35 | #define __set_MB93493_DQSR(X,V) __set_MB93493(0x3e0 + (X) * 4, (V)) | ||
36 | |||
37 | #define __get_MB93493_LBSER() __get_MB93493(0x3f0) | ||
38 | #define __set_MB93493_LBSER(V) __set_MB93493(0x3f0, (V)) | ||
39 | |||
40 | #define MB93493_LBSER_VDC 0x00010000 | ||
41 | #define MB93493_LBSER_VCC 0x00020000 | ||
42 | #define MB93493_LBSER_AUDIO 0x00040000 | ||
43 | #define MB93493_LBSER_I2C_0 0x00080000 | ||
44 | #define MB93493_LBSER_I2C_1 0x00100000 | ||
45 | #define MB93493_LBSER_USB 0x00200000 | ||
46 | #define MB93493_LBSER_GPIO 0x00800000 | ||
47 | #define MB93493_LBSER_PCMCIA 0x01000000 | ||
48 | |||
49 | #define __get_MB93493_LBSR() __get_MB93493(0x3fc) | ||
50 | #define __set_MB93493_LBSR(V) __set_MB93493(0x3fc, (V)) | ||
51 | |||
52 | /* | ||
53 | * video display controller | ||
54 | */ | ||
55 | #define __get_MB93493_VDC(X) __get_MB93493(MB93493_VDC_##X) | ||
56 | #define __set_MB93493_VDC(X,V) __set_MB93493(MB93493_VDC_##X, (V)) | ||
57 | |||
58 | #define MB93493_VDC_RCURSOR 0x140 /* cursor position */ | ||
59 | #define MB93493_VDC_RCT1 0x144 /* cursor colour 1 */ | ||
60 | #define MB93493_VDC_RCT2 0x148 /* cursor colour 2 */ | ||
61 | #define MB93493_VDC_RHDC 0x150 /* horizontal display period */ | ||
62 | #define MB93493_VDC_RH_MARGINS 0x154 /* horizontal margin sizes */ | ||
63 | #define MB93493_VDC_RVDC 0x158 /* vertical display period */ | ||
64 | #define MB93493_VDC_RV_MARGINS 0x15c /* vertical margin sizes */ | ||
65 | #define MB93493_VDC_RC 0x170 /* VDC control */ | ||
66 | #define MB93493_VDC_RCLOCK 0x174 /* clock divider, DMA req delay */ | ||
67 | #define MB93493_VDC_RBLACK 0x178 /* black insert sizes */ | ||
68 | #define MB93493_VDC_RS 0x17c /* VDC status */ | ||
69 | |||
70 | #define __addr_MB93493_VDC_BCI(X) ({ (volatile unsigned long *)(__region_CS3 + 0x000 + (X)); }) | ||
71 | #define __addr_MB93493_VDC_TPO(X) (__region_CS3 + 0x1c0 + (X)) | ||
72 | |||
73 | #define VDC_TPO_WIDTH 32 | ||
74 | |||
75 | #define VDC_RC_DSR 0x00000080 /* VDC master reset */ | ||
76 | |||
77 | #define VDC_RS_IT 0x00060000 /* interrupt indicators */ | ||
78 | #define VDC_RS_IT_UNDERFLOW 0x00040000 /* - underflow event */ | ||
79 | #define VDC_RS_IT_VSYNC 0x00020000 /* - VSYNC event */ | ||
80 | #define VDC_RS_DFI 0x00010000 /* current interlace field number */ | ||
81 | #define VDC_RS_DFI_TOP 0x00000000 /* - top field */ | ||
82 | #define VDC_RS_DFI_BOTTOM 0x00010000 /* - bottom field */ | ||
83 | #define VDC_RS_DCSR 0x00000010 /* cursor state */ | ||
84 | #define VDC_RS_DCM 0x00000003 /* display mode */ | ||
85 | #define VDC_RS_DCM_DISABLED 0x00000000 /* - display disabled */ | ||
86 | #define VDC_RS_DCM_STOPPED 0x00000001 /* - VDC stopped */ | ||
87 | #define VDC_RS_DCM_FREERUNNING 0x00000002 /* - VDC free-running */ | ||
88 | #define VDC_RS_DCM_TRANSFERRING 0x00000003 /* - data being transferred to VDC */ | ||
89 | |||
90 | /* | ||
91 | * video capture controller | ||
92 | */ | ||
93 | #define __get_MB93493_VCC(X) __get_MB93493(MB93493_VCC_##X) | ||
94 | #define __set_MB93493_VCC(X,V) __set_MB93493(MB93493_VCC_##X, (V)) | ||
95 | |||
96 | #define MB93493_VCC_RREDUCT 0x104 /* reduction rate */ | ||
97 | #define MB93493_VCC_RHY 0x108 /* horizontal brightness filter coefficients */ | ||
98 | #define MB93493_VCC_RHC 0x10c /* horizontal colour-difference filter coefficients */ | ||
99 | #define MB93493_VCC_RHSIZE 0x110 /* horizontal cycle sizes */ | ||
100 | #define MB93493_VCC_RHBC 0x114 /* horizontal back porch size */ | ||
101 | #define MB93493_VCC_RVCC 0x118 /* vertical capture period */ | ||
102 | #define MB93493_VCC_RVBC 0x11c /* vertical back porch period */ | ||
103 | #define MB93493_VCC_RV 0x120 /* vertical filter coefficients */ | ||
104 | #define MB93493_VCC_RDTS 0x128 /* DMA transfer size */ | ||
105 | #define MB93493_VCC_RDTS_4B 0x01000000 /* 4-byte transfer */ | ||
106 | #define MB93493_VCC_RDTS_32B 0x03000000 /* 32-byte transfer */ | ||
107 | #define MB93493_VCC_RDTS_SHIFT 24 | ||
108 | #define MB93493_VCC_RCC 0x130 /* VCC control */ | ||
109 | #define MB93493_VCC_RIS 0x134 /* VCC interrupt status */ | ||
110 | |||
111 | #define __addr_MB93493_VCC_TPI(X) (__region_CS3 + 0x180 + (X)) | ||
112 | |||
113 | #define VCC_RHSIZE_RHCC 0x000007ff | ||
114 | #define VCC_RHSIZE_RHCC_SHIFT 0 | ||
115 | #define VCC_RHSIZE_RHTCC 0x0fff0000 | ||
116 | #define VCC_RHSIZE_RHTCC_SHIFT 16 | ||
117 | |||
118 | #define VCC_RVBC_RVBC 0x00003f00 | ||
119 | #define VCC_RVBC_RVBC_SHIFT 8 | ||
120 | |||
121 | #define VCC_RREDUCT_RHR 0x07ff0000 | ||
122 | #define VCC_RREDUCT_RHR_SHIFT 16 | ||
123 | #define VCC_RREDUCT_RVR 0x000007ff | ||
124 | #define VCC_RREDUCT_RVR_SHIFT 0 | ||
125 | |||
126 | #define VCC_RCC_CE 0x00000001 /* VCC enable */ | ||
127 | #define VCC_RCC_CS 0x00000002 /* request video capture start */ | ||
128 | #define VCC_RCC_CPF 0x0000000c /* pixel format */ | ||
129 | #define VCC_RCC_CPF_YCBCR_16 0x00000000 /* - YCbCr 4:2:2 16-bit format */ | ||
130 | #define VCC_RCC_CPF_RGB 0x00000004 /* - RGB 4:4:4 format */ | ||
131 | #define VCC_RCC_CPF_YCBCR_24 0x00000008 /* - YCbCr 4:2:2 24-bit format */ | ||
132 | #define VCC_RCC_CPF_BT656 0x0000000c /* - ITU R-BT.656 format */ | ||
133 | #define VCC_RCC_CPF_SHIFT 2 | ||
134 | #define VCC_RCC_CSR 0x00000080 /* request reset */ | ||
135 | #define VCC_RCC_HSIP 0x00000100 /* HSYNC polarity */ | ||
136 | #define VCC_RCC_HSIP_LOACT 0x00000000 /* - low active */ | ||
137 | #define VCC_RCC_HSIP_HIACT 0x00000100 /* - high active */ | ||
138 | #define VCC_RCC_VSIP 0x00000200 /* VSYNC polarity */ | ||
139 | #define VCC_RCC_VSIP_LOACT 0x00000000 /* - low active */ | ||
140 | #define VCC_RCC_VSIP_HIACT 0x00000200 /* - high active */ | ||
141 | #define VCC_RCC_CIE 0x00000800 /* interrupt enable */ | ||
142 | #define VCC_RCC_CFP 0x00001000 /* RGB pixel packing */ | ||
143 | #define VCC_RCC_CFP_4TO3 0x00000000 /* - pack 4 pixels into 3 words */ | ||
144 | #define VCC_RCC_CFP_1TO1 0x00001000 /* - pack 1 pixel into 1 words */ | ||
145 | #define VCC_RCC_CSM 0x00006000 /* interlace specification */ | ||
146 | #define VCC_RCC_CSM_ONEPASS 0x00002000 /* - non-interlaced */ | ||
147 | #define VCC_RCC_CSM_INTERLACE 0x00004000 /* - interlaced */ | ||
148 | #define VCC_RCC_CSM_SHIFT 13 | ||
149 | #define VCC_RCC_ES 0x00008000 /* capture start polarity */ | ||
150 | #define VCC_RCC_ES_NEG 0x00000000 /* - negative edge */ | ||
151 | #define VCC_RCC_ES_POS 0x00008000 /* - positive edge */ | ||
152 | #define VCC_RCC_IFI 0x00080000 /* inferlace field evaluation reverse */ | ||
153 | #define VCC_RCC_FDTS 0x00300000 /* interlace field start */ | ||
154 | #define VCC_RCC_FDTS_3_8 0x00000000 /* - 3/8 of horizontal entire cycle */ | ||
155 | #define VCC_RCC_FDTS_1_4 0x00100000 /* - 1/4 of horizontal entire cycle */ | ||
156 | #define VCC_RCC_FDTS_7_16 0x00200000 /* - 7/16 of horizontal entire cycle */ | ||
157 | #define VCC_RCC_FDTS_SHIFT 20 | ||
158 | #define VCC_RCC_MOV 0x00400000 /* test bit - always set to 1 */ | ||
159 | #define VCC_RCC_STP 0x00800000 /* request video capture stop */ | ||
160 | #define VCC_RCC_TO 0x01000000 /* input during top-field only */ | ||
161 | |||
162 | #define VCC_RIS_VSYNC 0x01000000 /* VSYNC interrupt */ | ||
163 | #define VCC_RIS_OV 0x02000000 /* overflow interrupt */ | ||
164 | #define VCC_RIS_BOTTOM 0x08000000 /* interlace bottom field */ | ||
165 | #define VCC_RIS_STARTED 0x10000000 /* capture started */ | ||
166 | |||
167 | /* | ||
168 | * I2C | ||
169 | */ | ||
170 | #define MB93493_I2C_BSR 0x340 /* bus status */ | ||
171 | #define MB93493_I2C_BCR 0x344 /* bus control */ | ||
172 | #define MB93493_I2C_CCR 0x348 /* clock control */ | ||
173 | #define MB93493_I2C_ADR 0x34c /* address */ | ||
174 | #define MB93493_I2C_DTR 0x350 /* data */ | ||
175 | #define MB93493_I2C_BC2R 0x35c /* bus control 2 */ | ||
176 | |||
177 | #define __addr_MB93493_I2C(port,X) (__region_CS3 + MB93493_I2C_##X + ((port)*0x20)) | ||
178 | #define __get_MB93493_I2C(port,X) __get_MB93493(MB93493_I2C_##X + ((port)*0x20)) | ||
179 | #define __set_MB93493_I2C(port,X,V) __set_MB93493(MB93493_I2C_##X + ((port)*0x20), (V)) | ||
180 | |||
181 | #define I2C_BSR_BB (1 << 7) | ||
182 | |||
183 | /* | ||
184 | * audio controller (I2S) registers | ||
185 | */ | ||
186 | #define __get_MB93493_I2S(X) __get_MB93493(MB93493_I2S_##X) | ||
187 | #define __set_MB93493_I2S(X,V) __set_MB93493(MB93493_I2S_##X, (V)) | ||
188 | |||
189 | #define MB93493_I2S_ALDR 0x300 /* L-channel data */ | ||
190 | #define MB93493_I2S_ARDR 0x304 /* R-channel data */ | ||
191 | #define MB93493_I2S_APDR 0x308 /* 16-bit packed data */ | ||
192 | #define MB93493_I2S_AISTR 0x310 /* status */ | ||
193 | #define MB93493_I2S_AICR 0x314 /* control */ | ||
194 | |||
195 | #define __addr_MB93493_I2S_ALDR(X) (__region_CS3 + MB93493_I2S_ALDR + (X)) | ||
196 | #define __addr_MB93493_I2S_ARDR(X) (__region_CS3 + MB93493_I2S_ARDR + (X)) | ||
197 | #define __addr_MB93493_I2S_APDR(X) (__region_CS3 + MB93493_I2S_APDR + (X)) | ||
198 | #define __addr_MB93493_I2S_ADR(X) (__region_CS3 + 0x320 + (X)) | ||
199 | |||
200 | #define I2S_AISTR_OTST 0x00000003 /* status of output data transfer */ | ||
201 | #define I2S_AISTR_OTR 0x00000010 /* output transfer request pending */ | ||
202 | #define I2S_AISTR_OUR 0x00000020 /* output FIFO underrun detected */ | ||
203 | #define I2S_AISTR_OOR 0x00000040 /* output FIFO overrun detected */ | ||
204 | #define I2S_AISTR_ODS 0x00000100 /* output DMA transfer size */ | ||
205 | #define I2S_AISTR_ODE 0x00000400 /* output DMA transfer request enable */ | ||
206 | #define I2S_AISTR_OTRIE 0x00001000 /* output transfer request interrupt enable */ | ||
207 | #define I2S_AISTR_OURIE 0x00002000 /* output FIFO underrun interrupt enable */ | ||
208 | #define I2S_AISTR_OORIE 0x00004000 /* output FIFO overrun interrupt enable */ | ||
209 | #define I2S_AISTR__OUT_MASK 0x00007570 | ||
210 | #define I2S_AISTR_ITST 0x00030000 /* status of input data transfer */ | ||
211 | #define I2S_AISTR_ITST_SHIFT 16 | ||
212 | #define I2S_AISTR_ITR 0x00100000 /* input transfer request pending */ | ||
213 | #define I2S_AISTR_IUR 0x00200000 /* input FIFO underrun detected */ | ||
214 | #define I2S_AISTR_IOR 0x00400000 /* input FIFO overrun detected */ | ||
215 | #define I2S_AISTR_IDS 0x01000000 /* input DMA transfer size */ | ||
216 | #define I2S_AISTR_IDE 0x04000000 /* input DMA transfer request enable */ | ||
217 | #define I2S_AISTR_ITRIE 0x10000000 /* input transfer request interrupt enable */ | ||
218 | #define I2S_AISTR_IURIE 0x20000000 /* input FIFO underrun interrupt enable */ | ||
219 | #define I2S_AISTR_IORIE 0x40000000 /* input FIFO overrun interrupt enable */ | ||
220 | #define I2S_AISTR__IN_MASK 0x75700000 | ||
221 | |||
222 | #define I2S_AICR_MI 0x00000001 /* mono input requested */ | ||
223 | #define I2S_AICR_AMI 0x00000002 /* relation between LRCKI/FS1 and SDI */ | ||
224 | #define I2S_AICR_LRI 0x00000004 /* function of LRCKI pin */ | ||
225 | #define I2S_AICR_SDMI 0x00000070 /* format of input audio data */ | ||
226 | #define I2S_AICR_SDMI_SHIFT 4 | ||
227 | #define I2S_AICR_CLI 0x00000080 /* input FIFO clearing control */ | ||
228 | #define I2S_AICR_IM 0x00000300 /* input state control */ | ||
229 | #define I2S_AICR_IM_SHIFT 8 | ||
230 | #define I2S_AICR__IN_MASK 0x000003f7 | ||
231 | #define I2S_AICR_MO 0x00001000 /* mono output requested */ | ||
232 | #define I2S_AICR_AMO 0x00002000 /* relation between LRCKO/FS0 and SDO */ | ||
233 | #define I2S_AICR_AMO_SHIFT 13 | ||
234 | #define I2S_AICR_LRO 0x00004000 /* function of LRCKO pin */ | ||
235 | #define I2S_AICR_SDMO 0x00070000 /* format of output audio data */ | ||
236 | #define I2S_AICR_SDMO_SHIFT 16 | ||
237 | #define I2S_AICR_CLO 0x00080000 /* output FIFO clearing control */ | ||
238 | #define I2S_AICR_OM 0x00100000 /* output state control */ | ||
239 | #define I2S_AICR__OUT_MASK 0x001f7000 | ||
240 | #define I2S_AICR_DIV 0x03000000 /* frequency division rate */ | ||
241 | #define I2S_AICR_DIV_SHIFT 24 | ||
242 | #define I2S_AICR_FL 0x20000000 /* frame length */ | ||
243 | #define I2S_AICR_FS 0x40000000 /* frame sync method */ | ||
244 | #define I2S_AICR_ME 0x80000000 /* master enable */ | ||
245 | |||
246 | /* | ||
247 | * PCMCIA | ||
248 | */ | ||
249 | #define __addr_MB93493_PCMCIA(X) ((volatile unsigned long *)(__region_CS5 + (X))) | ||
250 | |||
251 | /* | ||
252 | * GPIO | ||
253 | */ | ||
254 | #define __get_MB93493_GPIO_PDR(X) __get_MB93493(0x380 + (X) * 0xc0) | ||
255 | #define __set_MB93493_GPIO_PDR(X,V) __set_MB93493(0x380 + (X) * 0xc0, (V)) | ||
256 | |||
257 | #define __get_MB93493_GPIO_GPDR(X) __get_MB93493(0x384 + (X) * 0xc0) | ||
258 | #define __set_MB93493_GPIO_GPDR(X,V) __set_MB93493(0x384 + (X) * 0xc0, (V)) | ||
259 | |||
260 | #define __get_MB93493_GPIO_SIR(X) __get_MB93493(0x388 + (X) * 0xc0) | ||
261 | #define __set_MB93493_GPIO_SIR(X,V) __set_MB93493(0x388 + (X) * 0xc0, (V)) | ||
262 | |||
263 | #define __get_MB93493_GPIO_SOR(X) __get_MB93493(0x38c + (X) * 0xc0) | ||
264 | #define __set_MB93493_GPIO_SOR(X,V) __set_MB93493(0x38c + (X) * 0xc0, (V)) | ||
265 | |||
266 | #define __get_MB93493_GPIO_PDSR(X) __get_MB93493(0x390 + (X) * 0xc0) | ||
267 | #define __set_MB93493_GPIO_PDSR(X,V) __set_MB93493(0x390 + (X) * 0xc0, (V)) | ||
268 | |||
269 | #define __get_MB93493_GPIO_PDCR(X) __get_MB93493(0x394 + (X) * 0xc0) | ||
270 | #define __set_MB93493_GPIO_PDCR(X,V) __set_MB93493(0x394 + (X) * 0xc0, (V)) | ||
271 | |||
272 | #define __get_MB93493_GPIO_INTST(X) __get_MB93493(0x398 + (X) * 0xc0) | ||
273 | #define __set_MB93493_GPIO_INTST(X,V) __set_MB93493(0x398 + (X) * 0xc0, (V)) | ||
274 | |||
275 | #define __get_MB93493_GPIO_IEHL(X) __get_MB93493(0x39c + (X) * 0xc0) | ||
276 | #define __set_MB93493_GPIO_IEHL(X,V) __set_MB93493(0x39c + (X) * 0xc0, (V)) | ||
277 | |||
278 | #define __get_MB93493_GPIO_IELH(X) __get_MB93493(0x3a0 + (X) * 0xc0) | ||
279 | #define __set_MB93493_GPIO_IELH(X,V) __set_MB93493(0x3a0 + (X) * 0xc0, (V)) | ||
280 | |||
281 | #endif /* _ASM_MB93493_REGS_H */ | ||
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h deleted file mode 100644 index e9a0ec85a402..000000000000 --- a/arch/frv/include/asm/mem-layout.h +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | /* mem-layout.h: memory layout | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MEM_LAYOUT_H | ||
13 | #define _ASM_MEM_LAYOUT_H | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | #define __UL(X) ((unsigned long) (X)) | ||
17 | #else | ||
18 | #define __UL(X) (X) | ||
19 | #endif | ||
20 | |||
21 | /* | ||
22 | * PAGE_SHIFT determines the page size | ||
23 | */ | ||
24 | #define PAGE_SHIFT 14 | ||
25 | |||
26 | #ifndef __ASSEMBLY__ | ||
27 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | ||
28 | #else | ||
29 | #define PAGE_SIZE (1 << PAGE_SHIFT) | ||
30 | #endif | ||
31 | |||
32 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
33 | |||
34 | /* | ||
35 | * the slab must be aligned such that load- and store-double instructions don't | ||
36 | * fault if used | ||
37 | */ | ||
38 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES | ||
39 | #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES | ||
40 | |||
41 | /*****************************************************************************/ | ||
42 | /* | ||
43 | * virtual memory layout from kernel's point of view | ||
44 | */ | ||
45 | #define PAGE_OFFSET ((unsigned long) &__page_offset) | ||
46 | |||
47 | #ifdef CONFIG_MMU | ||
48 | |||
49 | /* see Documentation/frv/mmu-layout.txt */ | ||
50 | #define KERNEL_LOWMEM_START __UL(0xc0000000) | ||
51 | #define KERNEL_LOWMEM_END __UL(0xd0000000) | ||
52 | #define VMALLOC_START __UL(0xd0000000) | ||
53 | #define VMALLOC_END __UL(0xd8000000) | ||
54 | #define PKMAP_BASE __UL(0xd8000000) | ||
55 | #define PKMAP_END __UL(0xdc000000) | ||
56 | #define KMAP_ATOMIC_SECONDARY_FRAME __UL(0xdc000000) | ||
57 | #define KMAP_ATOMIC_PRIMARY_FRAME __UL(0xdd000000) | ||
58 | |||
59 | #endif | ||
60 | |||
61 | #define KERNEL_IO_START __UL(0xe0000000) | ||
62 | |||
63 | |||
64 | /*****************************************************************************/ | ||
65 | /* | ||
66 | * memory layout from userspace's point of view | ||
67 | */ | ||
68 | #define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE) | ||
69 | #define STACK_TOP __UL(2 * 1024 * 1024) | ||
70 | #define STACK_TOP_MAX __UL(0xc0000000) | ||
71 | |||
72 | /* userspace process size */ | ||
73 | #ifdef CONFIG_MMU | ||
74 | #define TASK_SIZE (PAGE_OFFSET) | ||
75 | #else | ||
76 | #define TASK_SIZE __UL(0xFFFFFFFFUL) | ||
77 | #endif | ||
78 | |||
79 | /* base of area at which unspecified mmaps will start */ | ||
80 | #ifdef CONFIG_BINFMT_ELF_FDPIC | ||
81 | #define TASK_UNMAPPED_BASE __UL(16 * 1024 * 1024) | ||
82 | #else | ||
83 | #define TASK_UNMAPPED_BASE __UL(TASK_SIZE / 3) | ||
84 | #endif | ||
85 | |||
86 | #endif /* _ASM_MEM_LAYOUT_H */ | ||
diff --git a/arch/frv/include/asm/mmu.h b/arch/frv/include/asm/mmu.h deleted file mode 100644 index 86ca0e86e7d2..000000000000 --- a/arch/frv/include/asm/mmu.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* mmu.h: memory management context for FR-V with or without MMU support | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_MMU_H | ||
12 | #define _ASM_MMU_H | ||
13 | |||
14 | typedef struct { | ||
15 | #ifdef CONFIG_MMU | ||
16 | struct list_head id_link; /* link in list of context ID owners */ | ||
17 | unsigned short id; /* MMU context ID */ | ||
18 | unsigned short id_busy; /* true if ID is in CXNR */ | ||
19 | unsigned long itlb_cached_pge; /* [SCR0] PGE cached for insn TLB handler */ | ||
20 | unsigned long itlb_ptd_mapping; /* [DAMR4] PTD mapping for itlb cached PGE */ | ||
21 | unsigned long dtlb_cached_pge; /* [SCR1] PGE cached for data TLB handler */ | ||
22 | unsigned long dtlb_ptd_mapping; /* [DAMR5] PTD mapping for dtlb cached PGE */ | ||
23 | |||
24 | #else | ||
25 | unsigned long end_brk; | ||
26 | |||
27 | #endif | ||
28 | |||
29 | #ifdef CONFIG_BINFMT_ELF_FDPIC | ||
30 | unsigned long exec_fdpic_loadmap; | ||
31 | unsigned long interp_fdpic_loadmap; | ||
32 | #endif | ||
33 | |||
34 | } mm_context_t; | ||
35 | |||
36 | #ifdef CONFIG_MMU | ||
37 | extern int __nongpreldata cxn_pinned; | ||
38 | extern int cxn_pin_by_pid(pid_t pid); | ||
39 | #endif | ||
40 | |||
41 | #endif /* _ASM_MMU_H */ | ||
diff --git a/arch/frv/include/asm/mmu_context.h b/arch/frv/include/asm/mmu_context.h deleted file mode 100644 index c7daa395156a..000000000000 --- a/arch/frv/include/asm/mmu_context.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* mmu_context.h: MMU context management routines | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MMU_CONTEXT_H | ||
13 | #define _ASM_MMU_CONTEXT_H | ||
14 | |||
15 | #include <asm/setup.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/pgalloc.h> | ||
18 | #include <asm-generic/mm_hooks.h> | ||
19 | |||
20 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | ||
21 | { | ||
22 | } | ||
23 | |||
24 | #ifdef CONFIG_MMU | ||
25 | extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); | ||
26 | extern void change_mm_context(mm_context_t *old, mm_context_t *ctx, pgd_t *_pgd); | ||
27 | extern void destroy_context(struct mm_struct *mm); | ||
28 | |||
29 | #else | ||
30 | #define init_new_context(tsk, mm) ({ 0; }) | ||
31 | #define change_mm_context(old, ctx, _pml4) do {} while(0) | ||
32 | #define destroy_context(mm) do {} while(0) | ||
33 | #endif | ||
34 | |||
35 | #define switch_mm(prev, next, tsk) \ | ||
36 | do { \ | ||
37 | if (prev != next) \ | ||
38 | change_mm_context(&prev->context, &next->context, next->pgd); \ | ||
39 | } while(0) | ||
40 | |||
41 | #define activate_mm(prev, next) \ | ||
42 | do { \ | ||
43 | change_mm_context(&prev->context, &next->context, next->pgd); \ | ||
44 | } while(0) | ||
45 | |||
46 | #define deactivate_mm(tsk, mm) \ | ||
47 | do { \ | ||
48 | } while(0) | ||
49 | |||
50 | #endif | ||
diff --git a/arch/frv/include/asm/module.h b/arch/frv/include/asm/module.h deleted file mode 100644 index a8848f09a217..000000000000 --- a/arch/frv/include/asm/module.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* module.h: FRV module stuff | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_MODULE_H | ||
12 | #define _ASM_MODULE_H | ||
13 | |||
14 | #include <asm-generic/module.h> | ||
15 | |||
16 | /* | ||
17 | * Include the architecture version. | ||
18 | */ | ||
19 | #define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " " | ||
20 | |||
21 | #endif /* _ASM_MODULE_H */ | ||
22 | |||
diff --git a/arch/frv/include/asm/page.h b/arch/frv/include/asm/page.h deleted file mode 100644 index 0f76a0d586f6..000000000000 --- a/arch/frv/include/asm/page.h +++ /dev/null | |||
@@ -1,74 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_PAGE_H | ||
3 | #define _ASM_PAGE_H | ||
4 | |||
5 | #include <asm/virtconvert.h> | ||
6 | #include <asm/mem-layout.h> | ||
7 | #include <asm/sections.h> | ||
8 | #include <asm/setup.h> | ||
9 | |||
10 | #ifndef __ASSEMBLY__ | ||
11 | |||
12 | #define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE) | ||
13 | #define copy_page(to,from) memcpy((to), (from), PAGE_SIZE) | ||
14 | |||
15 | #define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE) | ||
16 | #define copy_user_page(vto, vfrom, vaddr, topg) memcpy((vto), (vfrom), PAGE_SIZE) | ||
17 | |||
18 | /* | ||
19 | * These are used to make use of C type-checking.. | ||
20 | */ | ||
21 | typedef struct { unsigned long pte; } pte_t; | ||
22 | typedef struct { unsigned long ste[64];} pmd_t; | ||
23 | typedef struct { pmd_t pue[1]; } pud_t; | ||
24 | typedef struct { pud_t pge[1]; } pgd_t; | ||
25 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
26 | typedef struct page *pgtable_t; | ||
27 | |||
28 | #define pte_val(x) ((x).pte) | ||
29 | #define pmd_val(x) ((x).ste[0]) | ||
30 | #define pud_val(x) ((x).pue[0]) | ||
31 | #define pgd_val(x) ((x).pge[0]) | ||
32 | #define pgprot_val(x) ((x).pgprot) | ||
33 | |||
34 | #define __pte(x) ((pte_t) { (x) } ) | ||
35 | #define __pmd(x) ((pmd_t) { { (x) } } ) | ||
36 | #define __pud(x) ((pud_t) { (x) } ) | ||
37 | #define __pgd(x) ((pgd_t) { (x) } ) | ||
38 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
39 | #define PTE_MASK PAGE_MASK | ||
40 | |||
41 | #define devmem_is_allowed(pfn) 1 | ||
42 | |||
43 | #define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr)) | ||
44 | #define __va(paddr) phys_to_virt((unsigned long) (paddr)) | ||
45 | |||
46 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) | ||
47 | |||
48 | extern unsigned long max_low_pfn; | ||
49 | extern unsigned long min_low_pfn; | ||
50 | extern unsigned long max_pfn; | ||
51 | |||
52 | #ifdef CONFIG_MMU | ||
53 | #define pfn_valid(pfn) ((pfn) < max_mapnr) | ||
54 | #else | ||
55 | #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) | ||
56 | #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn) | ||
57 | |||
58 | #endif | ||
59 | |||
60 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) | ||
61 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | ||
62 | |||
63 | |||
64 | #define VM_DATA_DEFAULT_FLAGS \ | ||
65 | (VM_READ | VM_WRITE | \ | ||
66 | ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ | ||
67 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
68 | |||
69 | #endif /* __ASSEMBLY__ */ | ||
70 | |||
71 | #include <asm-generic/memory_model.h> | ||
72 | #include <asm-generic/getorder.h> | ||
73 | |||
74 | #endif /* _ASM_PAGE_H */ | ||
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h deleted file mode 100644 index 895af9d558ba..000000000000 --- a/arch/frv/include/asm/pci.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* pci.h: FR-V specific PCI declarations | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from include/asm-m68k/pci.h | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef _ASM_FRV_PCI_H | ||
14 | #define _ASM_FRV_PCI_H | ||
15 | |||
16 | #include <linux/mm.h> | ||
17 | #include <linux/scatterlist.h> | ||
18 | #include <asm-generic/pci.h> | ||
19 | |||
20 | #define pcibios_assign_all_busses() 0 | ||
21 | |||
22 | #ifdef CONFIG_MMU | ||
23 | extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle); | ||
24 | extern void consistent_free(void *vaddr); | ||
25 | extern void consistent_sync(void *vaddr, size_t size, int direction); | ||
26 | extern void consistent_sync_page(struct page *page, unsigned long offset, | ||
27 | size_t size, int direction); | ||
28 | #endif | ||
29 | |||
30 | /* Return the index of the PCI controller for device PDEV. */ | ||
31 | #define pci_controller_num(PDEV) (0) | ||
32 | |||
33 | /* | ||
34 | * These are pretty much arbitrary with the CoMEM implementation. | ||
35 | * We have the whole address space to ourselves. | ||
36 | */ | ||
37 | #define PCIBIOS_MIN_IO 0x100 | ||
38 | #define PCIBIOS_MIN_MEM 0x00010000 | ||
39 | |||
40 | #endif /* _ASM_FRV_PCI_H */ | ||
diff --git a/arch/frv/include/asm/percpu.h b/arch/frv/include/asm/percpu.h deleted file mode 100644 index 4209fe5fe0a2..000000000000 --- a/arch/frv/include/asm/percpu.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __ASM_PERCPU_H | ||
3 | #define __ASM_PERCPU_H | ||
4 | |||
5 | #include <asm-generic/percpu.h> | ||
6 | |||
7 | #endif /* __ASM_PERCPU_H */ | ||
diff --git a/arch/frv/include/asm/perf_event.h b/arch/frv/include/asm/perf_event.h deleted file mode 100644 index c52ea5546b5b..000000000000 --- a/arch/frv/include/asm/perf_event.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* FRV performance event support | ||
2 | * | ||
3 | * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public Licence | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the Licence, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_PERF_EVENT_H | ||
13 | #define _ASM_PERF_EVENT_H | ||
14 | |||
15 | #endif /* _ASM_PERF_EVENT_H */ | ||
diff --git a/arch/frv/include/asm/pgalloc.h b/arch/frv/include/asm/pgalloc.h deleted file mode 100644 index 416d19a632f2..000000000000 --- a/arch/frv/include/asm/pgalloc.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* pgalloc.h: Page allocation routines for FRV | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * Derived from: | ||
12 | * include/asm-m68knommu/pgalloc.h | ||
13 | * include/asm-i386/pgalloc.h | ||
14 | */ | ||
15 | #ifndef _ASM_PGALLOC_H | ||
16 | #define _ASM_PGALLOC_H | ||
17 | |||
18 | #include <asm/setup.h> | ||
19 | #include <asm/virtconvert.h> | ||
20 | |||
21 | #ifdef CONFIG_MMU | ||
22 | |||
23 | #define pmd_populate_kernel(mm, pmd, pte) __set_pmd(pmd, __pa(pte) | _PAGE_TABLE) | ||
24 | #define pmd_populate(MM, PMD, PAGE) \ | ||
25 | do { \ | ||
26 | __set_pmd((PMD), page_to_pfn(PAGE) << PAGE_SHIFT | _PAGE_TABLE); \ | ||
27 | } while(0) | ||
28 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
29 | |||
30 | /* | ||
31 | * Allocate and free page tables. | ||
32 | */ | ||
33 | |||
34 | extern pgd_t *pgd_alloc(struct mm_struct *); | ||
35 | extern void pgd_free(struct mm_struct *mm, pgd_t *); | ||
36 | |||
37 | extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long); | ||
38 | |||
39 | extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long); | ||
40 | |||
41 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | ||
42 | { | ||
43 | free_page((unsigned long)pte); | ||
44 | } | ||
45 | |||
46 | static inline void pte_free(struct mm_struct *mm, pgtable_t pte) | ||
47 | { | ||
48 | pgtable_page_dtor(pte); | ||
49 | __free_page(pte); | ||
50 | } | ||
51 | |||
52 | #define __pte_free_tlb(tlb,pte,address) \ | ||
53 | do { \ | ||
54 | pgtable_page_dtor(pte); \ | ||
55 | tlb_remove_page((tlb),(pte)); \ | ||
56 | } while (0) | ||
57 | |||
58 | /* | ||
59 | * allocating and freeing a pmd is trivial: the 1-entry pmd is | ||
60 | * inside the pgd, so has no extra memory associated with it. | ||
61 | * (In the PAE case we free the pmds as part of the pgd.) | ||
62 | */ | ||
63 | #define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *) 2); }) | ||
64 | #define pmd_free(mm, x) do { } while (0) | ||
65 | #define __pmd_free_tlb(tlb,x,a) do { } while (0) | ||
66 | |||
67 | #endif /* CONFIG_MMU */ | ||
68 | |||
69 | #endif /* _ASM_PGALLOC_H */ | ||
diff --git a/arch/frv/include/asm/pgtable.h b/arch/frv/include/asm/pgtable.h deleted file mode 100644 index ab6e7e961b54..000000000000 --- a/arch/frv/include/asm/pgtable.h +++ /dev/null | |||
@@ -1,528 +0,0 @@ | |||
1 | /* pgtable.h: FR-V page table mangling | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * Derived from: | ||
12 | * include/asm-m68knommu/pgtable.h | ||
13 | * include/asm-i386/pgtable.h | ||
14 | */ | ||
15 | |||
16 | #ifndef _ASM_PGTABLE_H | ||
17 | #define _ASM_PGTABLE_H | ||
18 | |||
19 | #include <asm-generic/5level-fixup.h> | ||
20 | #include <asm/mem-layout.h> | ||
21 | #include <asm/setup.h> | ||
22 | #include <asm/processor.h> | ||
23 | |||
24 | #ifndef __ASSEMBLY__ | ||
25 | #include <linux/threads.h> | ||
26 | #include <linux/slab.h> | ||
27 | #include <linux/list.h> | ||
28 | #include <linux/spinlock.h> | ||
29 | #include <linux/sched.h> | ||
30 | struct vm_area_struct; | ||
31 | #endif | ||
32 | |||
33 | #ifndef __ASSEMBLY__ | ||
34 | #if defined(CONFIG_HIGHPTE) | ||
35 | typedef unsigned long pte_addr_t; | ||
36 | #else | ||
37 | typedef pte_t *pte_addr_t; | ||
38 | #endif | ||
39 | #endif | ||
40 | |||
41 | /*****************************************************************************/ | ||
42 | /* | ||
43 | * MMU-less operation case first | ||
44 | */ | ||
45 | #ifndef CONFIG_MMU | ||
46 | |||
47 | #define pgd_present(pgd) (1) /* pages are always present on NO_MM */ | ||
48 | #define pgd_none(pgd) (0) | ||
49 | #define pgd_bad(pgd) (0) | ||
50 | #define pgd_clear(pgdp) | ||
51 | #define kern_addr_valid(addr) (1) | ||
52 | #define pmd_offset(a, b) ((void *) 0) | ||
53 | |||
54 | #define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */ | ||
55 | #define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */ | ||
56 | #define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */ | ||
57 | #define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */ | ||
58 | #define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */ | ||
59 | |||
60 | #define __swp_type(x) (0) | ||
61 | #define __swp_offset(x) (0) | ||
62 | #define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) | ||
63 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
64 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
65 | |||
66 | #define ZERO_PAGE(vaddr) ({ BUG(); NULL; }) | ||
67 | |||
68 | #define swapper_pg_dir ((pgd_t *) NULL) | ||
69 | |||
70 | #define pgtable_cache_init() do {} while (0) | ||
71 | |||
72 | #include <asm-generic/pgtable.h> | ||
73 | |||
74 | #else /* !CONFIG_MMU */ | ||
75 | /*****************************************************************************/ | ||
76 | /* | ||
77 | * then MMU operation | ||
78 | */ | ||
79 | |||
80 | /* | ||
81 | * ZERO_PAGE is a global shared page that is always zero: used | ||
82 | * for zero-mapped memory areas etc.. | ||
83 | */ | ||
84 | #ifndef __ASSEMBLY__ | ||
85 | extern unsigned long empty_zero_page; | ||
86 | #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page) | ||
87 | #endif | ||
88 | |||
89 | /* | ||
90 | * we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry) | ||
91 | * [see Documentation/frv/mmu-layout.txt] | ||
92 | * | ||
93 | * Page Directory: | ||
94 | * - Size: 16KB | ||
95 | * - 64 PGEs per PGD | ||
96 | * - Each PGE holds 1 PUD and covers 64MB | ||
97 | * | ||
98 | * Page Upper Directory: | ||
99 | * - Size: 256B | ||
100 | * - 1 PUE per PUD | ||
101 | * - Each PUE holds 1 PMD and covers 64MB | ||
102 | * | ||
103 | * Page Mid-Level Directory | ||
104 | * - Size: 256B | ||
105 | * - 1 PME per PMD | ||
106 | * - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table | ||
107 | * - All STEs are instantiated at the same time | ||
108 | * | ||
109 | * Page Table | ||
110 | * - Size: 16KB | ||
111 | * - 4096 PTEs per PT | ||
112 | * - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries | ||
113 | * | ||
114 | * Pages | ||
115 | * - Size: 4KB | ||
116 | * | ||
117 | * total PTEs | ||
118 | * = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs | ||
119 | * = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT | ||
120 | * = 262144 (or 256 * 1024) | ||
121 | */ | ||
122 | #define PGDIR_SHIFT 26 | ||
123 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
124 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
125 | #define PTRS_PER_PGD 64 | ||
126 | |||
127 | #define __PAGETABLE_PUD_FOLDED | ||
128 | #define PUD_SHIFT 26 | ||
129 | #define PTRS_PER_PUD 1 | ||
130 | #define PUD_SIZE (1UL << PUD_SHIFT) | ||
131 | #define PUD_MASK (~(PUD_SIZE - 1)) | ||
132 | #define PUE_SIZE 256 | ||
133 | |||
134 | #define __PAGETABLE_PMD_FOLDED | ||
135 | #define PMD_SHIFT 26 | ||
136 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
137 | #define PMD_MASK (~(PMD_SIZE - 1)) | ||
138 | #define PTRS_PER_PMD 1 | ||
139 | #define PME_SIZE 256 | ||
140 | |||
141 | #define __frv_PT_SIZE 256 | ||
142 | |||
143 | #define PTRS_PER_PTE 4096 | ||
144 | |||
145 | #define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE) | ||
146 | #define FIRST_USER_ADDRESS 0UL | ||
147 | |||
148 | #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT) | ||
149 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS) | ||
150 | |||
151 | #define TWOLEVEL_PGDIR_SHIFT 26 | ||
152 | #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT) | ||
153 | #define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS) | ||
154 | |||
155 | #ifndef __ASSEMBLY__ | ||
156 | |||
157 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; | ||
158 | |||
159 | #define pte_ERROR(e) \ | ||
160 | printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte) | ||
161 | #define pmd_ERROR(e) \ | ||
162 | printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) | ||
163 | #define pud_ERROR(e) \ | ||
164 | printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e))) | ||
165 | #define pgd_ERROR(e) \ | ||
166 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e)))) | ||
167 | |||
168 | /* | ||
169 | * Certain architectures need to do special things when PTEs | ||
170 | * within a page table are directly modified. Thus, the following | ||
171 | * hook is made available. | ||
172 | */ | ||
173 | #define set_pte(pteptr, pteval) \ | ||
174 | do { \ | ||
175 | *(pteptr) = (pteval); \ | ||
176 | asm volatile("dcf %M0" :: "U"(*pteptr)); \ | ||
177 | } while(0) | ||
178 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | ||
179 | |||
180 | /* | ||
181 | * pgd_offset() returns a (pgd_t *) | ||
182 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | ||
183 | */ | ||
184 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) | ||
185 | |||
186 | /* | ||
187 | * a shortcut which implies the use of the kernel's pgd, instead | ||
188 | * of a process's | ||
189 | */ | ||
190 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
191 | |||
192 | /* | ||
193 | * The "pgd_xxx()" functions here are trivial for a folded two-level | ||
194 | * setup: the pud is never bad, and a pud always exists (as it's folded | ||
195 | * into the pgd entry) | ||
196 | */ | ||
197 | static inline int pgd_none(pgd_t pgd) { return 0; } | ||
198 | static inline int pgd_bad(pgd_t pgd) { return 0; } | ||
199 | static inline int pgd_present(pgd_t pgd) { return 1; } | ||
200 | static inline void pgd_clear(pgd_t *pgd) { } | ||
201 | |||
202 | #define pgd_populate(mm, pgd, pud) do { } while (0) | ||
203 | /* | ||
204 | * (puds are folded into pgds so this doesn't get actually called, | ||
205 | * but the define is needed for a generic inline function.) | ||
206 | */ | ||
207 | #define set_pgd(pgdptr, pgdval) \ | ||
208 | do { \ | ||
209 | memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \ | ||
210 | asm volatile("dcf %M0" :: "U"(*(pgdptr))); \ | ||
211 | } while(0) | ||
212 | |||
213 | static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) | ||
214 | { | ||
215 | return (pud_t *) pgd; | ||
216 | } | ||
217 | |||
218 | #define pgd_page(pgd) (pud_page((pud_t){ pgd })) | ||
219 | #define pgd_page_vaddr(pgd) (pud_page_vaddr((pud_t){ pgd })) | ||
220 | |||
221 | /* | ||
222 | * allocating and freeing a pud is trivial: the 1-entry pud is | ||
223 | * inside the pgd, so has no extra memory associated with it. | ||
224 | */ | ||
225 | #define pud_alloc_one(mm, address) NULL | ||
226 | #define pud_free(mm, x) do { } while (0) | ||
227 | #define __pud_free_tlb(tlb, x, address) do { } while (0) | ||
228 | |||
229 | /* | ||
230 | * The "pud_xxx()" functions here are trivial for a folded two-level | ||
231 | * setup: the pmd is never bad, and a pmd always exists (as it's folded | ||
232 | * into the pud entry) | ||
233 | */ | ||
234 | static inline int pud_none(pud_t pud) { return 0; } | ||
235 | static inline int pud_bad(pud_t pud) { return 0; } | ||
236 | static inline int pud_present(pud_t pud) { return 1; } | ||
237 | static inline void pud_clear(pud_t *pud) { } | ||
238 | |||
239 | #define pud_populate(mm, pmd, pte) do { } while (0) | ||
240 | |||
241 | /* | ||
242 | * (pmds are folded into puds so this doesn't get actually called, | ||
243 | * but the define is needed for a generic inline function.) | ||
244 | */ | ||
245 | #define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval }) | ||
246 | |||
247 | #define pud_page(pud) (pmd_page((pmd_t){ pud })) | ||
248 | #define pud_page_vaddr(pud) (pmd_page_vaddr((pmd_t){ pud })) | ||
249 | |||
250 | /* | ||
251 | * (pmds are folded into pgds so this doesn't get actually called, | ||
252 | * but the define is needed for a generic inline function.) | ||
253 | */ | ||
254 | extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd); | ||
255 | |||
256 | #define set_pmd(pmdptr, pmdval) \ | ||
257 | do { \ | ||
258 | __set_pmd((pmdptr), (pmdval).ste[0]); \ | ||
259 | } while(0) | ||
260 | |||
261 | #define __pmd_index(address) 0 | ||
262 | |||
263 | static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address) | ||
264 | { | ||
265 | return (pmd_t *) dir + __pmd_index(address); | ||
266 | } | ||
267 | |||
268 | #define pte_same(a, b) ((a).pte == (b).pte) | ||
269 | #define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT)))) | ||
270 | #define pte_none(x) (!(x).pte) | ||
271 | #define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT))) | ||
272 | #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
273 | #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
274 | |||
275 | #define VMALLOC_VMADDR(x) ((unsigned long) (x)) | ||
276 | |||
277 | #endif /* !__ASSEMBLY__ */ | ||
278 | |||
279 | /* | ||
280 | * control flags in AMPR registers and TLB entries | ||
281 | */ | ||
282 | #define _PAGE_BIT_PRESENT xAMPRx_V_BIT | ||
283 | #define _PAGE_BIT_WP DAMPRx_WP_BIT | ||
284 | #define _PAGE_BIT_NOCACHE xAMPRx_C_BIT | ||
285 | #define _PAGE_BIT_SUPER xAMPRx_S_BIT | ||
286 | #define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT | ||
287 | #define _PAGE_BIT_DIRTY xAMPRx_M_BIT | ||
288 | #define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT | ||
289 | |||
290 | #define _PAGE_PRESENT xAMPRx_V | ||
291 | #define _PAGE_WP DAMPRx_WP | ||
292 | #define _PAGE_NOCACHE xAMPRx_C | ||
293 | #define _PAGE_SUPER xAMPRx_S | ||
294 | #define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */ | ||
295 | #define _PAGE_DIRTY xAMPRx_M | ||
296 | #define _PAGE_NOTGLOBAL xAMPRx_NG | ||
297 | |||
298 | #define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 | xAMPRx_RESERVED13) | ||
299 | |||
300 | #define _PAGE_PROTNONE 0x000 /* If not present */ | ||
301 | |||
302 | #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
303 | |||
304 | #define __PGPROT_BASE \ | ||
305 | (_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED) | ||
306 | |||
307 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) | ||
308 | #define PAGE_SHARED __pgprot(__PGPROT_BASE) | ||
309 | #define PAGE_COPY __pgprot(__PGPROT_BASE | _PAGE_WP) | ||
310 | #define PAGE_READONLY __pgprot(__PGPROT_BASE | _PAGE_WP) | ||
311 | |||
312 | #define __PAGE_KERNEL (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY) | ||
313 | #define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE) | ||
314 | #define __PAGE_KERNEL_RO (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP) | ||
315 | |||
316 | #define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL) | ||
317 | |||
318 | #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL) | ||
319 | #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO) | ||
320 | #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE) | ||
321 | |||
322 | #define _PAGE_TABLE (_PAGE_PRESENT | xAMPRx_SS_16Kb) | ||
323 | |||
324 | #ifndef __ASSEMBLY__ | ||
325 | |||
326 | /* | ||
327 | * The FR451 can do execute protection by virtue of having separate TLB miss handlers for | ||
328 | * instruction access and for data access. However, we don't have enough reserved bits to say | ||
329 | * "execute only", so we don't bother. If you can read it, you can execute it and vice versa. | ||
330 | */ | ||
331 | #define __P000 PAGE_NONE | ||
332 | #define __P001 PAGE_READONLY | ||
333 | #define __P010 PAGE_COPY | ||
334 | #define __P011 PAGE_COPY | ||
335 | #define __P100 PAGE_READONLY | ||
336 | #define __P101 PAGE_READONLY | ||
337 | #define __P110 PAGE_COPY | ||
338 | #define __P111 PAGE_COPY | ||
339 | |||
340 | #define __S000 PAGE_NONE | ||
341 | #define __S001 PAGE_READONLY | ||
342 | #define __S010 PAGE_SHARED | ||
343 | #define __S011 PAGE_SHARED | ||
344 | #define __S100 PAGE_READONLY | ||
345 | #define __S101 PAGE_READONLY | ||
346 | #define __S110 PAGE_SHARED | ||
347 | #define __S111 PAGE_SHARED | ||
348 | |||
349 | /* | ||
350 | * Define this to warn about kernel memory accesses that are | ||
351 | * done without a 'access_ok(VERIFY_WRITE,..)' | ||
352 | */ | ||
353 | #undef TEST_ACCESS_OK | ||
354 | |||
355 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) | ||
356 | #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) | ||
357 | |||
358 | #define pmd_none(x) (!pmd_val(x)) | ||
359 | #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) | ||
360 | #define pmd_bad(x) (pmd_val(x) & xAMPRx_SS) | ||
361 | #define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0) | ||
362 | |||
363 | #define pmd_page_vaddr(pmd) \ | ||
364 | ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) | ||
365 | |||
366 | #ifndef CONFIG_DISCONTIGMEM | ||
367 | #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) | ||
368 | #endif | ||
369 | |||
370 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | ||
371 | |||
372 | /* | ||
373 | * The following only work if pte_present() is true. | ||
374 | * Undefined behaviour if not.. | ||
375 | */ | ||
376 | static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; } | ||
377 | static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; } | ||
378 | static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); } | ||
379 | static inline int pte_special(pte_t pte) { return 0; } | ||
380 | |||
381 | static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; } | ||
382 | static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; } | ||
383 | static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte |= _PAGE_WP; return pte; } | ||
384 | static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte |= _PAGE_DIRTY; return pte; } | ||
385 | static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte |= _PAGE_ACCESSED; return pte; } | ||
386 | static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; } | ||
387 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } | ||
388 | |||
389 | static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) | ||
390 | { | ||
391 | int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep); | ||
392 | asm volatile("dcf %M0" :: "U"(*ptep)); | ||
393 | return i; | ||
394 | } | ||
395 | |||
396 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | ||
397 | { | ||
398 | unsigned long x = xchg(&ptep->pte, 0); | ||
399 | asm volatile("dcf %M0" :: "U"(*ptep)); | ||
400 | return __pte(x); | ||
401 | } | ||
402 | |||
403 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | ||
404 | { | ||
405 | set_bit(_PAGE_BIT_WP, ptep); | ||
406 | asm volatile("dcf %M0" :: "U"(*ptep)); | ||
407 | } | ||
408 | |||
409 | /* | ||
410 | * Macro to mark a page protection value as "uncacheable" | ||
411 | */ | ||
412 | #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE)) | ||
413 | |||
414 | /* | ||
415 | * Conversion functions: convert a page and protection to a page entry, | ||
416 | * and a page entry and page directory to the page they refer to. | ||
417 | */ | ||
418 | |||
419 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | ||
420 | #define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE) | ||
421 | |||
422 | /* This takes a physical page address that is used by the remapping functions */ | ||
423 | #define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot) | ||
424 | |||
425 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
426 | { | ||
427 | pte.pte &= _PAGE_CHG_MASK; | ||
428 | pte.pte |= pgprot_val(newprot); | ||
429 | return pte; | ||
430 | } | ||
431 | |||
432 | /* to find an entry in a page-table-directory. */ | ||
433 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | ||
434 | #define pgd_index_k(addr) pgd_index(addr) | ||
435 | |||
436 | /* Find an entry in the bottom-level page table.. */ | ||
437 | #define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
438 | |||
439 | /* | ||
440 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | ||
441 | * | ||
442 | * this macro returns the index of the entry in the pte page which would | ||
443 | * control the given virtual address | ||
444 | */ | ||
445 | #define pte_index(address) \ | ||
446 | (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
447 | #define pte_offset_kernel(dir, address) \ | ||
448 | ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) | ||
449 | |||
450 | #if defined(CONFIG_HIGHPTE) | ||
451 | #define pte_offset_map(dir, address) \ | ||
452 | ((pte_t *)kmap_atomic(pmd_page(*(dir))) + pte_index(address)) | ||
453 | #define pte_unmap(pte) kunmap_atomic(pte) | ||
454 | #else | ||
455 | #define pte_offset_map(dir, address) \ | ||
456 | ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address)) | ||
457 | #define pte_unmap(pte) do { } while (0) | ||
458 | #endif | ||
459 | |||
460 | /* | ||
461 | * Handle swap and file entries | ||
462 | * - the PTE is encoded in the following format: | ||
463 | * bit 0: Must be 0 (!_PAGE_PRESENT) | ||
464 | * bits 1-6: Swap type | ||
465 | * bits 7-31: Swap offset | ||
466 | */ | ||
467 | #define __swp_type(x) (((x).val >> 1) & 0x1f) | ||
468 | #define __swp_offset(x) ((x).val >> 7) | ||
469 | #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 7) }) | ||
470 | #define __pte_to_swp_entry(_pte) ((swp_entry_t) { (_pte).pte }) | ||
471 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
472 | |||
473 | /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ | ||
474 | #define PageSkip(page) (0) | ||
475 | #define kern_addr_valid(addr) (1) | ||
476 | |||
477 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | ||
478 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | ||
479 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | ||
480 | #define __HAVE_ARCH_PTE_SAME | ||
481 | #include <asm-generic/pgtable.h> | ||
482 | |||
483 | /* | ||
484 | * preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache | ||
485 | */ | ||
486 | static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) | ||
487 | { | ||
488 | struct mm_struct *mm; | ||
489 | unsigned long ampr; | ||
490 | |||
491 | mm = current->mm; | ||
492 | if (mm) { | ||
493 | pgd_t *pge = pgd_offset(mm, address); | ||
494 | pud_t *pue = pud_offset(pge, address); | ||
495 | pmd_t *pme = pmd_offset(pue, address); | ||
496 | |||
497 | ampr = pme->ste[0] & 0xffffff00; | ||
498 | ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C | | ||
499 | xAMPRx_V; | ||
500 | } else { | ||
501 | address = ULONG_MAX; | ||
502 | ampr = 0; | ||
503 | } | ||
504 | |||
505 | asm volatile("movgs %0,scr0\n" | ||
506 | "movgs %0,scr1\n" | ||
507 | "movgs %1,dampr4\n" | ||
508 | "movgs %1,dampr5\n" | ||
509 | : | ||
510 | : "r"(address), "r"(ampr) | ||
511 | ); | ||
512 | } | ||
513 | |||
514 | #ifdef CONFIG_PROC_FS | ||
515 | extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer); | ||
516 | #endif | ||
517 | |||
518 | extern void __init pgtable_cache_init(void); | ||
519 | |||
520 | #endif /* !__ASSEMBLY__ */ | ||
521 | #endif /* !CONFIG_MMU */ | ||
522 | |||
523 | #ifndef __ASSEMBLY__ | ||
524 | extern void __init paging_init(void); | ||
525 | #endif /* !__ASSEMBLY__ */ | ||
526 | #define HAVE_ARCH_UNMAPPED_AREA | ||
527 | |||
528 | #endif /* _ASM_PGTABLE_H */ | ||
diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h deleted file mode 100644 index 021cce78b401..000000000000 --- a/arch/frv/include/asm/processor.h +++ /dev/null | |||
@@ -1,110 +0,0 @@ | |||
1 | /* processor.h: FRV processor definitions | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_PROCESSOR_H | ||
13 | #define _ASM_PROCESSOR_H | ||
14 | |||
15 | #include <asm/mem-layout.h> | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | /* | ||
19 | * Default implementation of macro that returns current | ||
20 | * instruction pointer ("program counter"). | ||
21 | */ | ||
22 | #define current_text_addr() ({ __label__ _l; _l: &&_l;}) | ||
23 | |||
24 | #include <linux/compiler.h> | ||
25 | #include <linux/linkage.h> | ||
26 | #include <asm/sections.h> | ||
27 | #include <asm/segment.h> | ||
28 | #include <asm/fpu.h> | ||
29 | #include <asm/registers.h> | ||
30 | #include <asm/ptrace.h> | ||
31 | #include <asm/current.h> | ||
32 | #include <asm/cache.h> | ||
33 | |||
34 | /* Forward declaration, a strange C thing */ | ||
35 | struct task_struct; | ||
36 | |||
37 | /* | ||
38 | * Bus types | ||
39 | */ | ||
40 | #define EISA_bus 0 | ||
41 | |||
42 | struct thread_struct { | ||
43 | struct pt_regs *frame; /* [GR28] exception frame ptr for this thread */ | ||
44 | struct task_struct *curr; /* [GR29] current pointer for this thread */ | ||
45 | unsigned long sp; /* [GR1 ] kernel stack pointer */ | ||
46 | unsigned long fp; /* [GR2 ] kernel frame pointer */ | ||
47 | unsigned long lr; /* link register */ | ||
48 | unsigned long pc; /* program counter */ | ||
49 | unsigned long gr[12]; /* [GR16-GR27] */ | ||
50 | unsigned long sched_lr; /* LR from schedule() */ | ||
51 | |||
52 | union { | ||
53 | struct pt_regs *frame0; /* top (user) stack frame */ | ||
54 | struct user_context *user; /* userspace context */ | ||
55 | }; | ||
56 | } __attribute__((aligned(8))); | ||
57 | |||
58 | extern struct pt_regs *__kernel_frame0_ptr; | ||
59 | extern struct task_struct *__kernel_current_task; | ||
60 | |||
61 | #endif | ||
62 | |||
63 | #ifndef __ASSEMBLY__ | ||
64 | #define INIT_THREAD_FRAME0 \ | ||
65 | ((struct pt_regs *) \ | ||
66 | (sizeof(init_stack) + (unsigned long) init_stack - sizeof(struct user_context))) | ||
67 | |||
68 | #define INIT_THREAD { \ | ||
69 | NULL, \ | ||
70 | (struct task_struct *) init_stack, \ | ||
71 | 0, 0, 0, 0, \ | ||
72 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \ | ||
73 | 0, \ | ||
74 | { INIT_THREAD_FRAME0 }, \ | ||
75 | } | ||
76 | |||
77 | /* | ||
78 | * do necessary setup to start up a newly executed thread. | ||
79 | */ | ||
80 | #define start_thread(_regs, _pc, _usp) \ | ||
81 | do { \ | ||
82 | _regs->pc = (_pc); \ | ||
83 | _regs->psr &= ~PSR_S; \ | ||
84 | _regs->sp = (_usp); \ | ||
85 | } while(0) | ||
86 | |||
87 | /* Free all resources held by a thread. */ | ||
88 | static inline void release_thread(struct task_struct *dead_task) | ||
89 | { | ||
90 | } | ||
91 | |||
92 | extern asmlinkage void save_user_regs(struct user_context *target); | ||
93 | extern asmlinkage void *restore_user_regs(const struct user_context *target, ...); | ||
94 | |||
95 | unsigned long get_wchan(struct task_struct *p); | ||
96 | |||
97 | #define KSTK_EIP(tsk) ((tsk)->thread.frame0->pc) | ||
98 | #define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp) | ||
99 | |||
100 | #define cpu_relax() barrier() | ||
101 | |||
102 | /* data cache prefetch */ | ||
103 | #define ARCH_HAS_PREFETCH | ||
104 | static inline void prefetch(const void *x) | ||
105 | { | ||
106 | asm volatile("dcpl %0,gr0,#0" : : "r"(x)); | ||
107 | } | ||
108 | |||
109 | #endif /* __ASSEMBLY__ */ | ||
110 | #endif /* _ASM_PROCESSOR_H */ | ||
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h deleted file mode 100644 index 034f17934192..000000000000 --- a/arch/frv/include/asm/ptrace.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* ptrace.h: ptrace() relevant definitions | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_PTRACE_H | ||
12 | #define _ASM_PTRACE_H | ||
13 | |||
14 | #include <asm/irq_regs.h> | ||
15 | #include <uapi/asm/ptrace.h> | ||
16 | |||
17 | #define in_syscall(regs) (((regs)->tbr & TBR_TT) == TBR_TT_TRAP0) | ||
18 | #ifndef __ASSEMBLY__ | ||
19 | |||
20 | struct task_struct; | ||
21 | |||
22 | /* | ||
23 | * we dedicate GR28 to keeping a pointer to the current exception frame | ||
24 | * - gr28 is destroyed on entry to the kernel from userspace | ||
25 | */ | ||
26 | register struct pt_regs *__frame asm("gr28"); | ||
27 | |||
28 | #define user_mode(regs) (!((regs)->psr & PSR_S)) | ||
29 | #define instruction_pointer(regs) ((regs)->pc) | ||
30 | #define user_stack_pointer(regs) ((regs)->sp) | ||
31 | #define current_pt_regs() (__frame) | ||
32 | |||
33 | extern unsigned long user_stack(const struct pt_regs *); | ||
34 | #define profile_pc(regs) ((regs)->pc) | ||
35 | |||
36 | #define task_pt_regs(task) ((task)->thread.frame0) | ||
37 | |||
38 | #define arch_has_single_step() (1) | ||
39 | |||
40 | #endif /* !__ASSEMBLY__ */ | ||
41 | #endif /* _ASM_PTRACE_H */ | ||
diff --git a/arch/frv/include/asm/sections.h b/arch/frv/include/asm/sections.h deleted file mode 100644 index d03fb64e93e9..000000000000 --- a/arch/frv/include/asm/sections.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* sections.h: linkage layout variables | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SECTIONS_H | ||
13 | #define _ASM_SECTIONS_H | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | |||
17 | #include <linux/types.h> | ||
18 | #include <asm-generic/sections.h> | ||
19 | |||
20 | #ifdef __KERNEL__ | ||
21 | |||
22 | /* | ||
23 | * we don't want to put variables in the GP-REL section if they're not used very much - that would | ||
24 | * be waste since GP-REL addressing is limited to GP16+/-2048 | ||
25 | */ | ||
26 | #define __nongpreldata __attribute__((section(".data"))) | ||
27 | #define __nongprelbss __attribute__((section(".bss"))) | ||
28 | |||
29 | /* | ||
30 | * linker symbols | ||
31 | */ | ||
32 | extern const void __kernel_image_start, __kernel_image_end, __page_offset; | ||
33 | |||
34 | extern unsigned long __nongprelbss memory_start; | ||
35 | extern unsigned long __nongprelbss memory_end; | ||
36 | extern unsigned long __nongprelbss rom_length; | ||
37 | |||
38 | #endif | ||
39 | #endif | ||
40 | #endif /* _ASM_SECTIONS_H */ | ||
diff --git a/arch/frv/include/asm/segment.h b/arch/frv/include/asm/segment.h deleted file mode 100644 index 2305142d4cf8..000000000000 --- a/arch/frv/include/asm/segment.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* segment.h: MMU segment settings | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SEGMENT_H | ||
13 | #define _ASM_SEGMENT_H | ||
14 | |||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | |||
18 | typedef struct { | ||
19 | unsigned long seg; | ||
20 | } mm_segment_t; | ||
21 | |||
22 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
23 | |||
24 | #ifdef CONFIG_MMU | ||
25 | #define USER_DS MAKE_MM_SEG(TASK_SIZE - 1) | ||
26 | #define KERNEL_DS MAKE_MM_SEG(0xdfffffffUL) | ||
27 | #else | ||
28 | #define USER_DS MAKE_MM_SEG(memory_end) | ||
29 | #define KERNEL_DS MAKE_MM_SEG(0xe0000000UL) | ||
30 | #endif | ||
31 | |||
32 | #define get_ds() (KERNEL_DS) | ||
33 | #define get_fs() (__current_thread_info->addr_limit) | ||
34 | #define segment_eq(a, b) ((a).seg == (b).seg) | ||
35 | #define get_addr_limit() (get_fs().seg) | ||
36 | |||
37 | #define set_fs(_x) \ | ||
38 | do { \ | ||
39 | __current_thread_info->addr_limit = (_x); \ | ||
40 | } while(0) | ||
41 | |||
42 | |||
43 | #endif /* __ASSEMBLY__ */ | ||
44 | #endif /* _ASM_SEGMENT_H */ | ||
diff --git a/arch/frv/include/asm/serial-regs.h b/arch/frv/include/asm/serial-regs.h deleted file mode 100644 index e1286bda00eb..000000000000 --- a/arch/frv/include/asm/serial-regs.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* serial-regs.h: serial port registers | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SERIAL_REGS_H | ||
13 | #define _ASM_SERIAL_REGS_H | ||
14 | |||
15 | #include <linux/serial_reg.h> | ||
16 | #include <asm/irc-regs.h> | ||
17 | |||
18 | #define SERIAL_ICLK 33333333 /* the target serial input clock */ | ||
19 | #define UART0_BASE 0xfeff9c00 | ||
20 | #define UART1_BASE 0xfeff9c40 | ||
21 | |||
22 | #define __get_UART0(R) ({ __reg(UART0_BASE + (R) * 8) >> 24; }) | ||
23 | #define __get_UART1(R) ({ __reg(UART1_BASE + (R) * 8) >> 24; }) | ||
24 | #define __set_UART0(R,V) do { __reg(UART0_BASE + (R) * 8) = (V) << 24; } while(0) | ||
25 | #define __set_UART1(R,V) do { __reg(UART1_BASE + (R) * 8) = (V) << 24; } while(0) | ||
26 | |||
27 | #define __get_UART0_LSR() ({ __get_UART0(UART_LSR); }) | ||
28 | #define __get_UART1_LSR() ({ __get_UART1(UART_LSR); }) | ||
29 | |||
30 | #define __set_UART0_IER(V) __set_UART0(UART_IER,(V)) | ||
31 | #define __set_UART1_IER(V) __set_UART1(UART_IER,(V)) | ||
32 | |||
33 | /* serial prescaler select register */ | ||
34 | #define __get_UCPSR() ({ *(volatile unsigned long *)(0xfeff9c90); }) | ||
35 | #define __set_UCPSR(V) do { *(volatile unsigned long *)(0xfeff9c90) = (V); } while(0) | ||
36 | #define UCPSR_SELECT0 0x07000000 | ||
37 | #define UCPSR_SELECT1 0x38000000 | ||
38 | |||
39 | /* serial prescaler base value register */ | ||
40 | #define __get_UCPVR() ({ *(volatile unsigned long *)(0xfeff9c98); mb(); }) | ||
41 | #define __set_UCPVR(V) do { *(volatile unsigned long *)(0xfeff9c98) = (V) << 24; mb(); } while(0) | ||
42 | |||
43 | |||
44 | #endif /* _ASM_SERIAL_REGS_H */ | ||
diff --git a/arch/frv/include/asm/serial.h b/arch/frv/include/asm/serial.h deleted file mode 100644 index 614c6d76789a..000000000000 --- a/arch/frv/include/asm/serial.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * serial.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Develer S.r.l. (http://www.develer.com/) | ||
5 | * Author: Bernardo Innocenti <bernie@codewiz.org> | ||
6 | * | ||
7 | * Based on linux/include/asm-i386/serial.h | ||
8 | */ | ||
9 | #include <asm/serial-regs.h> | ||
10 | |||
11 | /* | ||
12 | * the base baud is derived from the clock speed and so is variable | ||
13 | */ | ||
14 | #define BASE_BAUD 0 | ||
diff --git a/arch/frv/include/asm/setup.h b/arch/frv/include/asm/setup.h deleted file mode 100644 index aa76f2eac09a..000000000000 --- a/arch/frv/include/asm/setup.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* setup.h: setup stuff | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_SETUP_H | ||
12 | #define _ASM_SETUP_H | ||
13 | |||
14 | |||
15 | #include <linux/init.h> | ||
16 | #include <uapi/asm/setup.h> | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | |||
20 | #ifdef CONFIG_MMU | ||
21 | extern unsigned long __initdata num_mappedpages; | ||
22 | #endif | ||
23 | |||
24 | #endif /* !__ASSEMBLY__ */ | ||
25 | |||
26 | #endif /* _ASM_SETUP_H */ | ||
diff --git a/arch/frv/include/asm/shmparam.h b/arch/frv/include/asm/shmparam.h deleted file mode 100644 index 50ea51f26c46..000000000000 --- a/arch/frv/include/asm/shmparam.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_SHMPARAM_H | ||
3 | #define _ASM_SHMPARAM_H | ||
4 | |||
5 | #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ | ||
6 | |||
7 | #endif /* _ASM_SHMPARAM_H */ | ||
8 | |||
diff --git a/arch/frv/include/asm/signal.h b/arch/frv/include/asm/signal.h deleted file mode 100644 index 796394113904..000000000000 --- a/arch/frv/include/asm/signal.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_SIGNAL_H | ||
3 | #define _ASM_SIGNAL_H | ||
4 | |||
5 | #include <uapi/asm/signal.h> | ||
6 | |||
7 | #endif /* _ASM_SIGNAL_H */ | ||
diff --git a/arch/frv/include/asm/smp.h b/arch/frv/include/asm/smp.h deleted file mode 100644 index 0d7fa409312d..000000000000 --- a/arch/frv/include/asm/smp.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __ASM_SMP_H | ||
3 | #define __ASM_SMP_H | ||
4 | |||
5 | |||
6 | #ifdef CONFIG_SMP | ||
7 | #error SMP not supported | ||
8 | #endif | ||
9 | |||
10 | #endif | ||
diff --git a/arch/frv/include/asm/spinlock.h b/arch/frv/include/asm/spinlock.h deleted file mode 100644 index fe385f45d1fd..000000000000 --- a/arch/frv/include/asm/spinlock.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* spinlock.h: spinlocks for FR-V | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SPINLOCK_H | ||
13 | #define _ASM_SPINLOCK_H | ||
14 | |||
15 | #error no spinlocks for FR-V yet | ||
16 | |||
17 | #endif /* _ASM_SPINLOCK_H */ | ||
diff --git a/arch/frv/include/asm/spr-regs.h b/arch/frv/include/asm/spr-regs.h deleted file mode 100644 index d3883021f236..000000000000 --- a/arch/frv/include/asm/spr-regs.h +++ /dev/null | |||
@@ -1,416 +0,0 @@ | |||
1 | /* spr-regs.h: special-purpose registers on the FRV | ||
2 | * | ||
3 | * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SPR_REGS_H | ||
13 | #define _ASM_SPR_REGS_H | ||
14 | |||
15 | /* | ||
16 | * PSR - Processor Status Register | ||
17 | */ | ||
18 | #define PSR_ET 0x00000001 /* enable interrupts/exceptions flag */ | ||
19 | #define PSR_PS 0x00000002 /* previous supervisor mode flag */ | ||
20 | #define PSR_S 0x00000004 /* supervisor mode flag */ | ||
21 | #define PSR_PIL 0x00000078 /* processor external interrupt level */ | ||
22 | #define PSR_PIL_0 0x00000000 /* - no interrupt in progress */ | ||
23 | #define PSR_PIL_13 0x00000068 /* - debugging only */ | ||
24 | #define PSR_PIL_14 0x00000070 /* - debugging in progress */ | ||
25 | #define PSR_PIL_15 0x00000078 /* - NMI in progress */ | ||
26 | #define PSR_EM 0x00000080 /* enable media operation */ | ||
27 | #define PSR_EF 0x00000100 /* enable FPU operation */ | ||
28 | #define PSR_BE 0x00001000 /* endianness mode */ | ||
29 | #define PSR_BE_LE 0x00000000 /* - little endian mode */ | ||
30 | #define PSR_BE_BE 0x00001000 /* - big endian mode */ | ||
31 | #define PSR_CM 0x00002000 /* conditional mode */ | ||
32 | #define PSR_NEM 0x00004000 /* non-excepting mode */ | ||
33 | #define PSR_ICE 0x00010000 /* in-circuit emulation mode */ | ||
34 | #define PSR_VERSION_SHIFT 24 /* CPU silicon ID */ | ||
35 | #define PSR_IMPLE_SHIFT 28 /* CPU core ID */ | ||
36 | |||
37 | #define PSR_VERSION(psr) (((psr) >> PSR_VERSION_SHIFT) & 0xf) | ||
38 | #define PSR_IMPLE(psr) (((psr) >> PSR_IMPLE_SHIFT) & 0xf) | ||
39 | |||
40 | #define PSR_IMPLE_FR401 0x2 | ||
41 | #define PSR_VERSION_FR401_MB93401 0x0 | ||
42 | #define PSR_VERSION_FR401_MB93401A 0x1 | ||
43 | #define PSR_VERSION_FR401_MB93403 0x2 | ||
44 | |||
45 | #define PSR_IMPLE_FR405 0x4 | ||
46 | #define PSR_VERSION_FR405_MB93405 0x0 | ||
47 | |||
48 | #define PSR_IMPLE_FR451 0x5 | ||
49 | #define PSR_VERSION_FR451_MB93451 0x0 | ||
50 | |||
51 | #define PSR_IMPLE_FR501 0x1 | ||
52 | #define PSR_VERSION_FR501_MB93501 0x1 | ||
53 | #define PSR_VERSION_FR501_MB93501A 0x2 | ||
54 | |||
55 | #define PSR_IMPLE_FR551 0x3 | ||
56 | #define PSR_VERSION_FR551_MB93555 0x1 | ||
57 | |||
58 | #define __get_PSR() ({ unsigned long x; asm volatile("movsg psr,%0" : "=r"(x)); x; }) | ||
59 | #define __set_PSR(V) do { asm volatile("movgs %0,psr" : : "r"(V)); } while(0) | ||
60 | |||
61 | /* | ||
62 | * TBR - Trap Base Register | ||
63 | */ | ||
64 | #define TBR_TT 0x00000ff0 | ||
65 | #define TBR_TT_INSTR_MMU_MISS (0x01 << 4) | ||
66 | #define TBR_TT_INSTR_ACC_ERROR (0x02 << 4) | ||
67 | #define TBR_TT_INSTR_ACC_EXCEP (0x03 << 4) | ||
68 | #define TBR_TT_PRIV_INSTR (0x06 << 4) | ||
69 | #define TBR_TT_ILLEGAL_INSTR (0x07 << 4) | ||
70 | #define TBR_TT_FP_EXCEPTION (0x0d << 4) | ||
71 | #define TBR_TT_MP_EXCEPTION (0x0e << 4) | ||
72 | #define TBR_TT_DATA_ACC_ERROR (0x11 << 4) | ||
73 | #define TBR_TT_DATA_MMU_MISS (0x12 << 4) | ||
74 | #define TBR_TT_DATA_ACC_EXCEP (0x13 << 4) | ||
75 | #define TBR_TT_DATA_STR_ERROR (0x14 << 4) | ||
76 | #define TBR_TT_DIVISION_EXCEP (0x17 << 4) | ||
77 | #define TBR_TT_COMMIT_EXCEP (0x19 << 4) | ||
78 | #define TBR_TT_INSTR_TLB_MISS (0x1a << 4) | ||
79 | #define TBR_TT_DATA_TLB_MISS (0x1b << 4) | ||
80 | #define TBR_TT_DATA_DAT_EXCEP (0x1d << 4) | ||
81 | #define TBR_TT_DECREMENT_TIMER (0x1f << 4) | ||
82 | #define TBR_TT_COMPOUND_EXCEP (0x20 << 4) | ||
83 | #define TBR_TT_INTERRUPT_1 (0x21 << 4) | ||
84 | #define TBR_TT_INTERRUPT_2 (0x22 << 4) | ||
85 | #define TBR_TT_INTERRUPT_3 (0x23 << 4) | ||
86 | #define TBR_TT_INTERRUPT_4 (0x24 << 4) | ||
87 | #define TBR_TT_INTERRUPT_5 (0x25 << 4) | ||
88 | #define TBR_TT_INTERRUPT_6 (0x26 << 4) | ||
89 | #define TBR_TT_INTERRUPT_7 (0x27 << 4) | ||
90 | #define TBR_TT_INTERRUPT_8 (0x28 << 4) | ||
91 | #define TBR_TT_INTERRUPT_9 (0x29 << 4) | ||
92 | #define TBR_TT_INTERRUPT_10 (0x2a << 4) | ||
93 | #define TBR_TT_INTERRUPT_11 (0x2b << 4) | ||
94 | #define TBR_TT_INTERRUPT_12 (0x2c << 4) | ||
95 | #define TBR_TT_INTERRUPT_13 (0x2d << 4) | ||
96 | #define TBR_TT_INTERRUPT_14 (0x2e << 4) | ||
97 | #define TBR_TT_INTERRUPT_15 (0x2f << 4) | ||
98 | #define TBR_TT_TRAP0 (0x80 << 4) | ||
99 | #define TBR_TT_TRAP1 (0x81 << 4) | ||
100 | #define TBR_TT_TRAP2 (0x82 << 4) | ||
101 | #define TBR_TT_TRAP3 (0x83 << 4) | ||
102 | #define TBR_TT_TRAP120 (0xf8 << 4) | ||
103 | #define TBR_TT_TRAP121 (0xf9 << 4) | ||
104 | #define TBR_TT_TRAP122 (0xfa << 4) | ||
105 | #define TBR_TT_TRAP123 (0xfb << 4) | ||
106 | #define TBR_TT_TRAP124 (0xfc << 4) | ||
107 | #define TBR_TT_TRAP125 (0xfd << 4) | ||
108 | #define TBR_TT_TRAP126 (0xfe << 4) | ||
109 | #define TBR_TT_BREAK (0xff << 4) | ||
110 | |||
111 | #define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120 | ||
112 | #define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121 | ||
113 | #define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122 | ||
114 | #define TBR_TT_ATOMIC_OR TBR_TT_TRAP123 | ||
115 | #define TBR_TT_ATOMIC_AND TBR_TT_TRAP124 | ||
116 | #define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125 | ||
117 | #define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126 | ||
118 | |||
119 | #define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; }) | ||
120 | |||
121 | /* | ||
122 | * HSR0 - Hardware Status Register 0 | ||
123 | */ | ||
124 | #define HSR0_PDM 0x00000007 /* power down mode */ | ||
125 | #define HSR0_PDM_NORMAL 0x00000000 /* - normal mode */ | ||
126 | #define HSR0_PDM_CORE_SLEEP 0x00000001 /* - CPU core sleep mode */ | ||
127 | #define HSR0_PDM_BUS_SLEEP 0x00000003 /* - bus sleep mode */ | ||
128 | #define HSR0_PDM_PLL_RUN 0x00000005 /* - PLL run */ | ||
129 | #define HSR0_PDM_PLL_STOP 0x00000007 /* - PLL stop */ | ||
130 | #define HSR0_GRLE 0x00000040 /* GR lower register set enable */ | ||
131 | #define HSR0_GRHE 0x00000080 /* GR higher register set enable */ | ||
132 | #define HSR0_FRLE 0x00000100 /* FR lower register set enable */ | ||
133 | #define HSR0_FRHE 0x00000200 /* FR higher register set enable */ | ||
134 | #define HSR0_GRN 0x00000400 /* GR quantity */ | ||
135 | #define HSR0_GRN_64 0x00000000 /* - 64 GR registers */ | ||
136 | #define HSR0_GRN_32 0x00000400 /* - 32 GR registers */ | ||
137 | #define HSR0_FRN 0x00000800 /* FR quantity */ | ||
138 | #define HSR0_FRN_64 0x00000000 /* - 64 FR registers */ | ||
139 | #define HSR0_FRN_32 0x00000800 /* - 32 FR registers */ | ||
140 | #define HSR0_SA 0x00001000 /* start address (RAMBOOT#) */ | ||
141 | #define HSR0_ETMI 0x00008000 /* enable TIMERI (64-bit up timer) */ | ||
142 | #define HSR0_ETMD 0x00004000 /* enable TIMERD (32-bit down timer) */ | ||
143 | #define HSR0_PEDAT 0x00010000 /* previous DAT mode */ | ||
144 | #define HSR0_XEDAT 0x00020000 /* exception DAT mode */ | ||
145 | #define HSR0_EDAT 0x00080000 /* enable DAT mode */ | ||
146 | #define HSR0_RME 0x00400000 /* enable RAM mode */ | ||
147 | #define HSR0_EMEM 0x00800000 /* enable MMU_Miss mask */ | ||
148 | #define HSR0_EXMMU 0x01000000 /* enable extended MMU mode */ | ||
149 | #define HSR0_EDMMU 0x02000000 /* enable data MMU */ | ||
150 | #define HSR0_EIMMU 0x04000000 /* enable instruction MMU */ | ||
151 | #define HSR0_CBM 0x08000000 /* copy back mode */ | ||
152 | #define HSR0_CBM_WRITE_THRU 0x00000000 /* - write through */ | ||
153 | #define HSR0_CBM_COPY_BACK 0x08000000 /* - copy back */ | ||
154 | #define HSR0_NWA 0x10000000 /* no write allocate */ | ||
155 | #define HSR0_DCE 0x40000000 /* data cache enable */ | ||
156 | #define HSR0_ICE 0x80000000 /* instruction cache enable */ | ||
157 | |||
158 | #define __get_HSR(R) ({ unsigned long x; asm volatile("movsg hsr"#R",%0" : "=r"(x)); x; }) | ||
159 | #define __set_HSR(R,V) do { asm volatile("movgs %0,hsr"#R : : "r"(V)); } while(0) | ||
160 | |||
161 | /* | ||
162 | * CCR - Condition Codes Register | ||
163 | */ | ||
164 | #define CCR_FCC0 0x0000000f /* FP/Media condition 0 (fcc0 reg) */ | ||
165 | #define CCR_FCC1 0x000000f0 /* FP/Media condition 1 (fcc1 reg) */ | ||
166 | #define CCR_FCC2 0x00000f00 /* FP/Media condition 2 (fcc2 reg) */ | ||
167 | #define CCR_FCC3 0x0000f000 /* FP/Media condition 3 (fcc3 reg) */ | ||
168 | #define CCR_ICC0 0x000f0000 /* Integer condition 0 (icc0 reg) */ | ||
169 | #define CCR_ICC0_C 0x00010000 /* - Carry flag */ | ||
170 | #define CCR_ICC0_V 0x00020000 /* - Overflow flag */ | ||
171 | #define CCR_ICC0_Z 0x00040000 /* - Zero flag */ | ||
172 | #define CCR_ICC0_N 0x00080000 /* - Negative flag */ | ||
173 | #define CCR_ICC1 0x00f00000 /* Integer condition 1 (icc1 reg) */ | ||
174 | #define CCR_ICC2 0x0f000000 /* Integer condition 2 (icc2 reg) */ | ||
175 | #define CCR_ICC3 0xf0000000 /* Integer condition 3 (icc3 reg) */ | ||
176 | |||
177 | /* | ||
178 | * CCCR - Condition Codes for Conditional Instructions Register | ||
179 | */ | ||
180 | #define CCCR_CC0 0x00000003 /* condition 0 (cc0 reg) */ | ||
181 | #define CCCR_CC0_FALSE 0x00000002 /* - condition is false */ | ||
182 | #define CCCR_CC0_TRUE 0x00000003 /* - condition is true */ | ||
183 | #define CCCR_CC1 0x0000000c /* condition 1 (cc1 reg) */ | ||
184 | #define CCCR_CC2 0x00000030 /* condition 2 (cc2 reg) */ | ||
185 | #define CCCR_CC3 0x000000c0 /* condition 3 (cc3 reg) */ | ||
186 | #define CCCR_CC4 0x00000300 /* condition 4 (cc4 reg) */ | ||
187 | #define CCCR_CC5 0x00000c00 /* condition 5 (cc5 reg) */ | ||
188 | #define CCCR_CC6 0x00003000 /* condition 6 (cc6 reg) */ | ||
189 | #define CCCR_CC7 0x0000c000 /* condition 7 (cc7 reg) */ | ||
190 | |||
191 | /* | ||
192 | * ISR - Integer Status Register | ||
193 | */ | ||
194 | #define ISR_EMAM 0x00000001 /* memory misaligned access handling */ | ||
195 | #define ISR_EMAM_EXCEPTION 0x00000000 /* - generate exception */ | ||
196 | #define ISR_EMAM_FUDGE 0x00000001 /* - mask out invalid address bits */ | ||
197 | #define ISR_AEXC 0x00000004 /* accrued [overflow] exception */ | ||
198 | #define ISR_DTT 0x00000018 /* division type trap */ | ||
199 | #define ISR_DTT_IGNORE 0x00000000 /* - ignore division error */ | ||
200 | #define ISR_DTT_DIVBYZERO 0x00000008 /* - generate exception */ | ||
201 | #define ISR_DTT_OVERFLOW 0x00000010 /* - record overflow */ | ||
202 | #define ISR_EDE 0x00000020 /* enable division exception */ | ||
203 | #define ISR_PLI 0x20000000 /* pre-load instruction information */ | ||
204 | #define ISR_QI 0x80000000 /* quad data implementation information */ | ||
205 | |||
206 | /* | ||
207 | * EPCR0 - Exception PC Register | ||
208 | */ | ||
209 | #define EPCR0_V 0x00000001 /* register content validity indicator */ | ||
210 | #define EPCR0_PC 0xfffffffc /* faulting instruction address */ | ||
211 | |||
212 | /* | ||
213 | * ESR0/14/15 - Exception Status Register | ||
214 | */ | ||
215 | #define ESRx_VALID 0x00000001 /* register content validity indicator */ | ||
216 | #define ESRx_EC 0x0000003e /* exception type */ | ||
217 | #define ESRx_EC_DATA_STORE 0x00000000 /* - data_store_error */ | ||
218 | #define ESRx_EC_INSN_ACCESS 0x00000006 /* - instruction_access_error */ | ||
219 | #define ESRx_EC_PRIV_INSN 0x00000008 /* - privileged_instruction */ | ||
220 | #define ESRx_EC_ILL_INSN 0x0000000a /* - illegal_instruction */ | ||
221 | #define ESRx_EC_MP_EXCEP 0x0000001c /* - mp_exception */ | ||
222 | #define ESRx_EC_DATA_ACCESS 0x00000020 /* - data_access_error */ | ||
223 | #define ESRx_EC_DIVISION 0x00000026 /* - division_exception */ | ||
224 | #define ESRx_EC_ITLB_MISS 0x00000034 /* - instruction_access_TLB_miss */ | ||
225 | #define ESRx_EC_DTLB_MISS 0x00000036 /* - data_access_TLB_miss */ | ||
226 | #define ESRx_EC_DATA_ACCESS_DAT 0x0000003a /* - data_access_DAT_exception */ | ||
227 | |||
228 | #define ESR0_IAEC 0x00000100 /* info for instruction-access-exception */ | ||
229 | #define ESR0_IAEC_RESV 0x00000000 /* - reserved */ | ||
230 | #define ESR0_IAEC_PROT_VIOL 0x00000100 /* - protection violation */ | ||
231 | |||
232 | #define ESR0_ATXC 0x00f00000 /* address translation exception code */ | ||
233 | #define ESR0_ATXC_MMU_MISS 0x00000000 /* - MMU miss exception and more (?) */ | ||
234 | #define ESR0_ATXC_MULTI_DAT 0x00800000 /* - multiple DAT entry hit */ | ||
235 | #define ESR0_ATXC_MULTI_SAT 0x00900000 /* - multiple SAT entry hit */ | ||
236 | #define ESR0_ATXC_AMRTLB_MISS 0x00a00000 /* - MMU/TLB miss exception */ | ||
237 | #define ESR0_ATXC_PRIV_EXCEP 0x00c00000 /* - privilege protection fault */ | ||
238 | #define ESR0_ATXC_WP_EXCEP 0x00d00000 /* - write protection fault */ | ||
239 | |||
240 | #define ESR0_EAV 0x00000800 /* true if EAR0 register valid */ | ||
241 | #define ESR15_EAV 0x00000800 /* true if EAR15 register valid */ | ||
242 | |||
243 | /* | ||
244 | * ESFR1 - Exception Status Valid Flag Register | ||
245 | */ | ||
246 | #define ESFR1_ESR0 0x00000001 /* true if ESR0 is valid */ | ||
247 | #define ESFR1_ESR14 0x00004000 /* true if ESR14 is valid */ | ||
248 | #define ESFR1_ESR15 0x00008000 /* true if ESR15 is valid */ | ||
249 | |||
250 | /* | ||
251 | * MSR - Media Status Register | ||
252 | */ | ||
253 | #define MSR0_AOVF 0x00000001 /* overflow exception accrued */ | ||
254 | #define MSRx_OVF 0x00000002 /* overflow exception detected */ | ||
255 | #define MSRx_SIE 0x0000003c /* last SIMD instruction exception detected */ | ||
256 | #define MSRx_SIE_NONE 0x00000000 /* - none detected */ | ||
257 | #define MSRx_SIE_FRkHI_ACCk 0x00000020 /* - exception at FRkHI or ACCk */ | ||
258 | #define MSRx_SIE_FRkLO_ACCk1 0x00000010 /* - exception at FRkLO or ACCk+1 */ | ||
259 | #define MSRx_SIE_FRk1HI_ACCk2 0x00000008 /* - exception at FRk+1HI or ACCk+2 */ | ||
260 | #define MSRx_SIE_FRk1LO_ACCk3 0x00000004 /* - exception at FRk+1LO or ACCk+3 */ | ||
261 | #define MSR0_MTT 0x00007000 /* type of last media trap detected */ | ||
262 | #define MSR0_MTT_NONE 0x00000000 /* - none detected */ | ||
263 | #define MSR0_MTT_OVERFLOW 0x00001000 /* - overflow detected */ | ||
264 | #define MSR0_HI 0x00c00000 /* hardware implementation */ | ||
265 | #define MSR0_HI_ROUNDING 0x00000000 /* - rounding mode */ | ||
266 | #define MSR0_HI_NONROUNDING 0x00c00000 /* - non-rounding mode */ | ||
267 | #define MSR0_EMCI 0x01000000 /* enable media custom instructions */ | ||
268 | #define MSR0_SRDAV 0x10000000 /* select rounding mode of MAVEH */ | ||
269 | #define MSR0_SRDAV_RDAV 0x00000000 /* - controlled by MSR.RDAV */ | ||
270 | #define MSR0_SRDAV_RD 0x10000000 /* - controlled by MSR.RD */ | ||
271 | #define MSR0_RDAV 0x20000000 /* rounding mode of MAVEH */ | ||
272 | #define MSR0_RDAV_NEAREST_MI 0x00000000 /* - round to nearest minus */ | ||
273 | #define MSR0_RDAV_NEAREST_PL 0x20000000 /* - round to nearest plus */ | ||
274 | #define MSR0_RD 0xc0000000 /* rounding mode */ | ||
275 | #define MSR0_RD_NEAREST 0x00000000 /* - nearest */ | ||
276 | #define MSR0_RD_ZERO 0x40000000 /* - zero */ | ||
277 | #define MSR0_RD_POS_INF 0x80000000 /* - positive infinity */ | ||
278 | #define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */ | ||
279 | |||
280 | /* | ||
281 | * IAMPR0-7 - Instruction Address Mapping Register | ||
282 | * DAMPR0-7 - Data Address Mapping Register | ||
283 | */ | ||
284 | #define xAMPRx_V 0x00000001 /* register content validity indicator */ | ||
285 | #define DAMPRx_WP 0x00000002 /* write protect */ | ||
286 | #define DAMPRx_WP_RW 0x00000000 /* - read/write */ | ||
287 | #define DAMPRx_WP_RO 0x00000002 /* - read-only */ | ||
288 | #define xAMPRx_C 0x00000004 /* cached/uncached */ | ||
289 | #define xAMPRx_C_CACHED 0x00000000 /* - cached */ | ||
290 | #define xAMPRx_C_UNCACHED 0x00000004 /* - uncached */ | ||
291 | #define xAMPRx_S 0x00000008 /* supervisor only */ | ||
292 | #define xAMPRx_S_USER 0x00000000 /* - userspace can access */ | ||
293 | #define xAMPRx_S_KERNEL 0x00000008 /* - kernel only */ | ||
294 | #define xAMPRx_SS 0x000000f0 /* segment size */ | ||
295 | #define xAMPRx_SS_16Kb 0x00000000 /* - 16 kilobytes */ | ||
296 | #define xAMPRx_SS_64Kb 0x00000010 /* - 64 kilobytes */ | ||
297 | #define xAMPRx_SS_256Kb 0x00000020 /* - 256 kilobytes */ | ||
298 | #define xAMPRx_SS_1Mb 0x00000030 /* - 1 megabyte */ | ||
299 | #define xAMPRx_SS_2Mb 0x00000040 /* - 2 megabytes */ | ||
300 | #define xAMPRx_SS_4Mb 0x00000050 /* - 4 megabytes */ | ||
301 | #define xAMPRx_SS_8Mb 0x00000060 /* - 8 megabytes */ | ||
302 | #define xAMPRx_SS_16Mb 0x00000070 /* - 16 megabytes */ | ||
303 | #define xAMPRx_SS_32Mb 0x00000080 /* - 32 megabytes */ | ||
304 | #define xAMPRx_SS_64Mb 0x00000090 /* - 64 megabytes */ | ||
305 | #define xAMPRx_SS_128Mb 0x000000a0 /* - 128 megabytes */ | ||
306 | #define xAMPRx_SS_256Mb 0x000000b0 /* - 256 megabytes */ | ||
307 | #define xAMPRx_SS_512Mb 0x000000c0 /* - 512 megabytes */ | ||
308 | #define xAMPRx_RESERVED8 0x00000100 /* reserved bit */ | ||
309 | #define xAMPRx_NG 0x00000200 /* non-global */ | ||
310 | #define xAMPRx_L 0x00000400 /* locked */ | ||
311 | #define xAMPRx_M 0x00000800 /* modified */ | ||
312 | #define xAMPRx_D 0x00001000 /* DAT entry */ | ||
313 | #define xAMPRx_RESERVED13 0x00002000 /* reserved bit */ | ||
314 | #define xAMPRx_PPFN 0xfff00000 /* physical page frame number */ | ||
315 | |||
316 | #define xAMPRx_V_BIT 0 | ||
317 | #define DAMPRx_WP_BIT 1 | ||
318 | #define xAMPRx_C_BIT 2 | ||
319 | #define xAMPRx_S_BIT 3 | ||
320 | #define xAMPRx_RESERVED8_BIT 8 | ||
321 | #define xAMPRx_NG_BIT 9 | ||
322 | #define xAMPRx_L_BIT 10 | ||
323 | #define xAMPRx_M_BIT 11 | ||
324 | #define xAMPRx_D_BIT 12 | ||
325 | #define xAMPRx_RESERVED13_BIT 13 | ||
326 | |||
327 | #define __get_IAMPR(R) ({ unsigned long x; asm volatile("movsg iampr"#R",%0" : "=r"(x)); x; }) | ||
328 | #define __get_DAMPR(R) ({ unsigned long x; asm volatile("movsg dampr"#R",%0" : "=r"(x)); x; }) | ||
329 | |||
330 | #define __get_IAMLR(R) ({ unsigned long x; asm volatile("movsg iamlr"#R",%0" : "=r"(x)); x; }) | ||
331 | #define __get_DAMLR(R) ({ unsigned long x; asm volatile("movsg damlr"#R",%0" : "=r"(x)); x; }) | ||
332 | |||
333 | #define __set_IAMPR(R,V) do { asm volatile("movgs %0,iampr"#R : : "r"(V)); } while(0) | ||
334 | #define __set_DAMPR(R,V) do { asm volatile("movgs %0,dampr"#R : : "r"(V)); } while(0) | ||
335 | |||
336 | #define __set_IAMLR(R,V) do { asm volatile("movgs %0,iamlr"#R : : "r"(V)); } while(0) | ||
337 | #define __set_DAMLR(R,V) do { asm volatile("movgs %0,damlr"#R : : "r"(V)); } while(0) | ||
338 | |||
339 | #define save_dampr(R, _dampr) \ | ||
340 | do { \ | ||
341 | asm volatile("movsg dampr"R",%0" : "=r"(_dampr)); \ | ||
342 | } while(0) | ||
343 | |||
344 | #define restore_dampr(R, _dampr) \ | ||
345 | do { \ | ||
346 | asm volatile("movgs %0,dampr"R :: "r"(_dampr)); \ | ||
347 | } while(0) | ||
348 | |||
349 | /* | ||
350 | * AMCR - Address Mapping Control Register | ||
351 | */ | ||
352 | #define AMCR_IAMRN 0x000000ff /* quantity of IAMPR registers */ | ||
353 | #define AMCR_DAMRN 0x0000ff00 /* quantity of DAMPR registers */ | ||
354 | |||
355 | /* | ||
356 | * TTBR - Address Translation Table Base Register | ||
357 | */ | ||
358 | #define __get_TTBR() ({ unsigned long x; asm volatile("movsg ttbr,%0" : "=r"(x)); x; }) | ||
359 | |||
360 | /* | ||
361 | * TPXR - TLB Probe Extend Register | ||
362 | */ | ||
363 | #define TPXR_E 0x00000001 | ||
364 | #define TPXR_LMAX_SHIFT 20 | ||
365 | #define TPXR_LMAX_SMASK 0xf | ||
366 | #define TPXR_WMAX_SHIFT 24 | ||
367 | #define TPXR_WMAX_SMASK 0xf | ||
368 | #define TPXR_WAY_SHIFT 28 | ||
369 | #define TPXR_WAY_SMASK 0xf | ||
370 | |||
371 | /* | ||
372 | * DCR - Debug Control Register | ||
373 | */ | ||
374 | #define DCR_IBCE3 0x00000001 /* break on conditional insn pointed to by IBAR3 */ | ||
375 | #define DCR_IBE3 0x00000002 /* break on insn pointed to by IBAR3 */ | ||
376 | #define DCR_IBCE1 0x00000004 /* break on conditional insn pointed to by IBAR2 */ | ||
377 | #define DCR_IBE1 0x00000008 /* break on insn pointed to by IBAR2 */ | ||
378 | #define DCR_IBCE2 0x00000010 /* break on conditional insn pointed to by IBAR1 */ | ||
379 | #define DCR_IBE2 0x00000020 /* break on insn pointed to by IBAR1 */ | ||
380 | #define DCR_IBCE0 0x00000040 /* break on conditional insn pointed to by IBAR0 */ | ||
381 | #define DCR_IBE0 0x00000080 /* break on insn pointed to by IBAR0 */ | ||
382 | |||
383 | #define DCR_DDBE1 0x00004000 /* use DBDR1x when checking DBAR1 */ | ||
384 | #define DCR_DWBE1 0x00008000 /* break on store to address in DBAR1/DBMR1x */ | ||
385 | #define DCR_DRBE1 0x00010000 /* break on load from address in DBAR1/DBMR1x */ | ||
386 | #define DCR_DDBE0 0x00020000 /* use DBDR0x when checking DBAR0 */ | ||
387 | #define DCR_DWBE0 0x00040000 /* break on store to address in DBAR0/DBMR0x */ | ||
388 | #define DCR_DRBE0 0x00080000 /* break on load from address in DBAR0/DBMR0x */ | ||
389 | |||
390 | #define DCR_EIM 0x0c000000 /* external interrupt disable */ | ||
391 | #define DCR_IBM 0x10000000 /* instruction break disable */ | ||
392 | #define DCR_SE 0x20000000 /* single step enable */ | ||
393 | #define DCR_EBE 0x40000000 /* exception break enable */ | ||
394 | |||
395 | /* | ||
396 | * BRR - Break Interrupt Request Register | ||
397 | */ | ||
398 | #define BRR_ST 0x00000001 /* single-step detected */ | ||
399 | #define BRR_SB 0x00000002 /* break instruction detected */ | ||
400 | #define BRR_BB 0x00000004 /* branch with hint detected */ | ||
401 | #define BRR_CBB 0x00000008 /* branch to LR detected */ | ||
402 | #define BRR_IBx 0x000000f0 /* hardware breakpoint detected */ | ||
403 | #define BRR_DBx 0x00000f00 /* hardware watchpoint detected */ | ||
404 | #define BRR_DBNEx 0x0000f000 /* ? */ | ||
405 | #define BRR_EBTT 0x00ff0000 /* trap type of exception break */ | ||
406 | #define BRR_TB 0x10000000 /* external break request detected */ | ||
407 | #define BRR_CB 0x20000000 /* ICE break command detected */ | ||
408 | #define BRR_EB 0x40000000 /* exception break detected */ | ||
409 | |||
410 | /* | ||
411 | * BPSR - Break PSR Save Register | ||
412 | */ | ||
413 | #define BPSR_BET 0x00000001 /* former PSR.ET */ | ||
414 | #define BPSR_BS 0x00001000 /* former PSR.S */ | ||
415 | |||
416 | #endif /* _ASM_SPR_REGS_H */ | ||
diff --git a/arch/frv/include/asm/string.h b/arch/frv/include/asm/string.h deleted file mode 100644 index 1f6c35990439..000000000000 --- a/arch/frv/include/asm/string.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* string.h: FRV string handling | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_STRING_H_ | ||
13 | #define _ASM_STRING_H_ | ||
14 | |||
15 | #ifdef __KERNEL__ /* only set these up for kernel code */ | ||
16 | |||
17 | #define __HAVE_ARCH_MEMSET 1 | ||
18 | #define __HAVE_ARCH_MEMCPY 1 | ||
19 | |||
20 | extern void *memset(void *, int, __kernel_size_t); | ||
21 | extern void *memcpy(void *, const void *, __kernel_size_t); | ||
22 | |||
23 | #else /* KERNEL */ | ||
24 | |||
25 | /* | ||
26 | * let user libraries deal with these, | ||
27 | * IMHO the kernel has no place defining these functions for user apps | ||
28 | */ | ||
29 | |||
30 | #define __HAVE_ARCH_STRCPY 1 | ||
31 | #define __HAVE_ARCH_STRNCPY 1 | ||
32 | #define __HAVE_ARCH_STRCAT 1 | ||
33 | #define __HAVE_ARCH_STRNCAT 1 | ||
34 | #define __HAVE_ARCH_STRCMP 1 | ||
35 | #define __HAVE_ARCH_STRNCMP 1 | ||
36 | #define __HAVE_ARCH_STRCHR 1 | ||
37 | #define __HAVE_ARCH_STRRCHR 1 | ||
38 | #define __HAVE_ARCH_STRSTR 1 | ||
39 | #define __HAVE_ARCH_STRLEN 1 | ||
40 | #define __HAVE_ARCH_STRNLEN 1 | ||
41 | #define __HAVE_ARCH_MEMSET 1 | ||
42 | #define __HAVE_ARCH_MEMCPY 1 | ||
43 | #define __HAVE_ARCH_MEMMOVE 1 | ||
44 | #define __HAVE_ARCH_MEMSCAN 1 | ||
45 | #define __HAVE_ARCH_MEMCMP 1 | ||
46 | #define __HAVE_ARCH_MEMCHR 1 | ||
47 | #define __HAVE_ARCH_STRTOK 1 | ||
48 | |||
49 | #endif /* KERNEL */ | ||
50 | #endif /* _ASM_STRING_H_ */ | ||
diff --git a/arch/frv/include/asm/switch_to.h b/arch/frv/include/asm/switch_to.h deleted file mode 100644 index 2cf0f6a7fbb1..000000000000 --- a/arch/frv/include/asm/switch_to.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* FR-V CPU basic task switching | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SWITCH_TO_H | ||
13 | #define _ASM_SWITCH_TO_H | ||
14 | |||
15 | #include <linux/thread_info.h> | ||
16 | |||
17 | /* | ||
18 | * switch_to(prev, next) should switch from task `prev' to `next' | ||
19 | * `prev' will never be the same as `next'. | ||
20 | * The `mb' is to tell GCC not to cache `current' across this call. | ||
21 | */ | ||
22 | extern asmlinkage | ||
23 | struct task_struct *__switch_to(struct thread_struct *prev_thread, | ||
24 | struct thread_struct *next_thread, | ||
25 | struct task_struct *prev); | ||
26 | |||
27 | #define switch_to(prev, next, last) \ | ||
28 | do { \ | ||
29 | (prev)->thread.sched_lr = \ | ||
30 | (unsigned long) __builtin_return_address(0); \ | ||
31 | (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \ | ||
32 | mb(); \ | ||
33 | } while(0) | ||
34 | |||
35 | #endif /* _ASM_SWITCH_TO_H */ | ||
diff --git a/arch/frv/include/asm/syscall.h b/arch/frv/include/asm/syscall.h deleted file mode 100644 index 70689eb29b98..000000000000 --- a/arch/frv/include/asm/syscall.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* syscall parameter access functions | ||
2 | * | ||
3 | * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public Licence | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the Licence, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SYSCALL_H | ||
13 | #define _ASM_SYSCALL_H | ||
14 | |||
15 | #include <linux/err.h> | ||
16 | #include <asm/ptrace.h> | ||
17 | |||
18 | /* | ||
19 | * Get the system call number or -1 | ||
20 | */ | ||
21 | static inline long syscall_get_nr(struct task_struct *task, | ||
22 | struct pt_regs *regs) | ||
23 | { | ||
24 | return regs->syscallno; | ||
25 | } | ||
26 | |||
27 | /* | ||
28 | * Restore the clobbered GR8 register | ||
29 | * (1st syscall arg was overwritten with syscall return or error) | ||
30 | */ | ||
31 | static inline void syscall_rollback(struct task_struct *task, | ||
32 | struct pt_regs *regs) | ||
33 | { | ||
34 | regs->gr8 = regs->orig_gr8; | ||
35 | } | ||
36 | |||
37 | /* | ||
38 | * See if the syscall return value is an error, returning it if it is and 0 if | ||
39 | * not | ||
40 | */ | ||
41 | static inline long syscall_get_error(struct task_struct *task, | ||
42 | struct pt_regs *regs) | ||
43 | { | ||
44 | return IS_ERR_VALUE(regs->gr8) ? regs->gr8 : 0; | ||
45 | } | ||
46 | |||
47 | /* | ||
48 | * Get the syscall return value | ||
49 | */ | ||
50 | static inline long syscall_get_return_value(struct task_struct *task, | ||
51 | struct pt_regs *regs) | ||
52 | { | ||
53 | return regs->gr8; | ||
54 | } | ||
55 | |||
56 | /* | ||
57 | * Set the syscall return value | ||
58 | */ | ||
59 | static inline void syscall_set_return_value(struct task_struct *task, | ||
60 | struct pt_regs *regs, | ||
61 | int error, long val) | ||
62 | { | ||
63 | if (error) | ||
64 | regs->gr8 = -error; | ||
65 | else | ||
66 | regs->gr8 = val; | ||
67 | } | ||
68 | |||
69 | /* | ||
70 | * Retrieve the system call arguments | ||
71 | */ | ||
72 | static inline void syscall_get_arguments(struct task_struct *task, | ||
73 | struct pt_regs *regs, | ||
74 | unsigned int i, unsigned int n, | ||
75 | unsigned long *args) | ||
76 | { | ||
77 | /* | ||
78 | * Do this simply for now. If we need to start supporting | ||
79 | * fetching arguments from arbitrary indices, this will need some | ||
80 | * extra logic. Presently there are no in-tree users that depend | ||
81 | * on this behaviour. | ||
82 | */ | ||
83 | BUG_ON(i); | ||
84 | |||
85 | /* Argument pattern is: GR8, GR9, GR10, GR11, GR12, GR13 */ | ||
86 | switch (n) { | ||
87 | case 6: args[5] = regs->gr13; | ||
88 | case 5: args[4] = regs->gr12; | ||
89 | case 4: args[3] = regs->gr11; | ||
90 | case 3: args[2] = regs->gr10; | ||
91 | case 2: args[1] = regs->gr9; | ||
92 | case 1: args[0] = regs->gr8; | ||
93 | break; | ||
94 | default: | ||
95 | BUG(); | ||
96 | } | ||
97 | } | ||
98 | |||
99 | /* | ||
100 | * Alter the system call arguments | ||
101 | */ | ||
102 | static inline void syscall_set_arguments(struct task_struct *task, | ||
103 | struct pt_regs *regs, | ||
104 | unsigned int i, unsigned int n, | ||
105 | const unsigned long *args) | ||
106 | { | ||
107 | /* Same note as above applies */ | ||
108 | BUG_ON(i); | ||
109 | |||
110 | switch (n) { | ||
111 | case 6: regs->gr13 = args[5]; | ||
112 | case 5: regs->gr12 = args[4]; | ||
113 | case 4: regs->gr11 = args[3]; | ||
114 | case 3: regs->gr10 = args[2]; | ||
115 | case 2: regs->gr9 = args[1]; | ||
116 | case 1: regs->gr8 = args[0]; | ||
117 | break; | ||
118 | default: | ||
119 | BUG(); | ||
120 | } | ||
121 | } | ||
122 | |||
123 | #endif /* _ASM_SYSCALL_H */ | ||
diff --git a/arch/frv/include/asm/termios.h b/arch/frv/include/asm/termios.h deleted file mode 100644 index 5a8c63554617..000000000000 --- a/arch/frv/include/asm/termios.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_TERMIOS_H | ||
3 | #define _ASM_TERMIOS_H | ||
4 | |||
5 | #include <uapi/asm/termios.h> | ||
6 | |||
7 | /* intr=^C quit=^| erase=del kill=^U | ||
8 | eof=^D vtime=\0 vmin=\1 sxtc=\0 | ||
9 | start=^Q stop=^S susp=^Z eol=\0 | ||
10 | reprint=^R discard=^U werase=^W lnext=^V | ||
11 | eol2=\0 | ||
12 | */ | ||
13 | #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" | ||
14 | #include <asm-generic/termios-base.h> | ||
15 | #endif /* _ASM_TERMIOS_H */ | ||
diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h deleted file mode 100644 index 0f950845fad9..000000000000 --- a/arch/frv/include/asm/thread_info.h +++ /dev/null | |||
@@ -1,116 +0,0 @@ | |||
1 | /* thread_info.h: description | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * Derived from include/asm-i386/thread_info.h | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef _ASM_THREAD_INFO_H | ||
14 | #define _ASM_THREAD_INFO_H | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | #include <asm/processor.h> | ||
20 | #endif | ||
21 | |||
22 | #define THREAD_SIZE 8192 | ||
23 | |||
24 | /* | ||
25 | * low level task data that entry.S needs immediate access to | ||
26 | * - this struct should fit entirely inside of one cache line | ||
27 | * - this struct shares the supervisor stack pages | ||
28 | * - if the contents of this structure are changed, the assembly constants must also be changed | ||
29 | */ | ||
30 | #ifndef __ASSEMBLY__ | ||
31 | |||
32 | struct thread_info { | ||
33 | struct task_struct *task; /* main task structure */ | ||
34 | unsigned long flags; /* low level flags */ | ||
35 | unsigned long status; /* thread-synchronous flags */ | ||
36 | __u32 cpu; /* current CPU */ | ||
37 | int preempt_count; /* 0 => preemptable, <0 => BUG */ | ||
38 | |||
39 | mm_segment_t addr_limit; /* thread address space: | ||
40 | * 0-0xBFFFFFFF for user-thead | ||
41 | * 0-0xFFFFFFFF for kernel-thread | ||
42 | */ | ||
43 | |||
44 | __u8 supervisor_stack[0]; | ||
45 | }; | ||
46 | |||
47 | #else /* !__ASSEMBLY__ */ | ||
48 | |||
49 | #include <asm/asm-offsets.h> | ||
50 | |||
51 | #endif | ||
52 | |||
53 | /* | ||
54 | * macros/functions for gaining access to the thread information structure | ||
55 | */ | ||
56 | #ifndef __ASSEMBLY__ | ||
57 | |||
58 | #define INIT_THREAD_INFO(tsk) \ | ||
59 | { \ | ||
60 | .task = &tsk, \ | ||
61 | .flags = 0, \ | ||
62 | .cpu = 0, \ | ||
63 | .preempt_count = INIT_PREEMPT_COUNT, \ | ||
64 | .addr_limit = KERNEL_DS, \ | ||
65 | } | ||
66 | |||
67 | /* how to get the thread information struct from C */ | ||
68 | register struct thread_info *__current_thread_info asm("gr15"); | ||
69 | |||
70 | #define current_thread_info() ({ __current_thread_info; }) | ||
71 | |||
72 | #endif /* __ASSEMBLY__ */ | ||
73 | |||
74 | /* | ||
75 | * thread information flags | ||
76 | * - these are process state flags that various assembly files may need to access | ||
77 | * - pending work-to-be-done flags are in LSW | ||
78 | * - other flags in MSW | ||
79 | */ | ||
80 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
81 | #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ | ||
82 | #define TIF_SIGPENDING 2 /* signal pending */ | ||
83 | #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ | ||
84 | #define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ | ||
85 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ | ||
86 | #define TIF_MEMDIE 7 /* is terminating due to OOM killer */ | ||
87 | |||
88 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) | ||
89 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) | ||
90 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) | ||
91 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) | ||
92 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) | ||
93 | |||
94 | /* work to do on interrupt/exception return */ | ||
95 | #define _TIF_WORK_MASK \ | ||
96 | (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_SINGLESTEP) | ||
97 | |||
98 | /* work to do on any return to u-space */ | ||
99 | #define _TIF_ALLWORK_MASK (_TIF_WORK_MASK | _TIF_SYSCALL_TRACE) | ||
100 | |||
101 | #if _TIF_ALLWORK_MASK >= 0x2000 | ||
102 | #error "_TIF_ALLWORK_MASK won't fit in an ANDI now (see entry.S)" | ||
103 | #endif | ||
104 | |||
105 | /* | ||
106 | * Thread-synchronous status. | ||
107 | * | ||
108 | * This is different from the flags in that nobody else | ||
109 | * ever touches our thread-synchronous status, so we don't | ||
110 | * have to worry about atomic accesses. | ||
111 | */ | ||
112 | #define TS_USEDFPM 0x0001 /* FPU/Media was used by this task this quantum (SMP) */ | ||
113 | |||
114 | #endif /* __KERNEL__ */ | ||
115 | |||
116 | #endif /* _ASM_THREAD_INFO_H */ | ||
diff --git a/arch/frv/include/asm/timer-regs.h b/arch/frv/include/asm/timer-regs.h deleted file mode 100644 index 6c5a871ce5e9..000000000000 --- a/arch/frv/include/asm/timer-regs.h +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /* timer-regs.h: hardware timer register definitions | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_TIMER_REGS_H | ||
13 | #define _ASM_TIMER_REGS_H | ||
14 | |||
15 | #include <asm/sections.h> | ||
16 | |||
17 | extern unsigned long __nongprelbss __clkin_clock_speed_HZ; | ||
18 | extern unsigned long __nongprelbss __ext_bus_clock_speed_HZ; | ||
19 | extern unsigned long __nongprelbss __res_bus_clock_speed_HZ; | ||
20 | extern unsigned long __nongprelbss __sdram_clock_speed_HZ; | ||
21 | extern unsigned long __nongprelbss __core_bus_clock_speed_HZ; | ||
22 | extern unsigned long __nongprelbss __core_clock_speed_HZ; | ||
23 | extern unsigned long __nongprelbss __dsu_clock_speed_HZ; | ||
24 | extern unsigned long __nongprelbss __serial_clock_speed_HZ; | ||
25 | |||
26 | #define __get_CLKC() ({ *(volatile unsigned long *)(0xfeff9a00); }) | ||
27 | |||
28 | static inline void __set_CLKC(unsigned long v) | ||
29 | { | ||
30 | int tmp; | ||
31 | |||
32 | asm volatile(" st%I0.p %2,%M0 \n" | ||
33 | " setlos %3,%1 \n" | ||
34 | " membar \n" | ||
35 | "0: \n" | ||
36 | " subicc %1,#1,%1,icc0 \n" | ||
37 | " bnc icc0,#1,0b \n" | ||
38 | : "=m"(*(volatile unsigned long *) 0xfeff9a00), "=r"(tmp) | ||
39 | : "r"(v), "i"(256) | ||
40 | : "icc0"); | ||
41 | } | ||
42 | |||
43 | #define __get_TCTR() ({ *(volatile unsigned long *)(0xfeff9418); }) | ||
44 | #define __get_TPRV() ({ *(volatile unsigned long *)(0xfeff9420); }) | ||
45 | #define __get_TPRCKSL() ({ *(volatile unsigned long *)(0xfeff9428); }) | ||
46 | #define __get_TCSR(T) ({ *(volatile unsigned long *)(0xfeff9400 + 8 * (T)); }) | ||
47 | #define __get_TxCKSL(T) ({ *(volatile unsigned long *)(0xfeff9430 + 8 * (T)); }) | ||
48 | |||
49 | #define __get_TCSR_DATA(T) ({ __get_TCSR(T) >> 24; }) | ||
50 | |||
51 | #define __set_TCTR(V) do { *(volatile unsigned long *)(0xfeff9418) = (V); mb(); } while(0) | ||
52 | #define __set_TPRV(V) do { *(volatile unsigned long *)(0xfeff9420) = (V) << 24; mb(); } while(0) | ||
53 | #define __set_TPRCKSL(V) do { *(volatile unsigned long *)(0xfeff9428) = (V); mb(); } while(0) | ||
54 | #define __set_TCSR(T,V) \ | ||
55 | do { *(volatile unsigned long *)(0xfeff9400 + 8 * (T)) = (V); mb(); } while(0) | ||
56 | |||
57 | #define __set_TxCKSL(T,V) \ | ||
58 | do { *(volatile unsigned long *)(0xfeff9430 + 8 * (T)) = (V); mb(); } while(0) | ||
59 | |||
60 | #define __set_TCSR_DATA(T,V) __set_TCSR(T, (V) << 24) | ||
61 | #define __set_TxCKSL_DATA(T,V) __set_TxCKSL(T, TxCKSL_EIGHT | __TxCKSL_SELECT((V))) | ||
62 | |||
63 | /* clock control register */ | ||
64 | #define CLKC_CMODE 0x0f000000 | ||
65 | #define CLKC_SLPL 0x000f0000 | ||
66 | #define CLKC_P0 0x00000100 | ||
67 | #define CLKC_CM 0x00000003 | ||
68 | |||
69 | #define CLKC_CMODE_s 24 | ||
70 | |||
71 | /* timer control register - non-readback mode */ | ||
72 | #define TCTR_MODE_0 0x00000000 | ||
73 | #define TCTR_MODE_2 0x04000000 | ||
74 | #define TCTR_MODE_4 0x08000000 | ||
75 | #define TCTR_MODE_5 0x0a000000 | ||
76 | #define TCTR_RL_LATCH 0x00000000 | ||
77 | #define TCTR_RL_RW_LOW8 0x10000000 | ||
78 | #define TCTR_RL_RW_HIGH8 0x20000000 | ||
79 | #define TCTR_RL_RW_LH8 0x30000000 | ||
80 | #define TCTR_SC_CTR0 0x00000000 | ||
81 | #define TCTR_SC_CTR1 0x40000000 | ||
82 | #define TCTR_SC_CTR2 0x80000000 | ||
83 | |||
84 | /* timer control register - readback mode */ | ||
85 | #define TCTR_CNT0 0x02000000 | ||
86 | #define TCTR_CNT1 0x04000000 | ||
87 | #define TCTR_CNT2 0x08000000 | ||
88 | #define TCTR_NSTATUS 0x10000000 | ||
89 | #define TCTR_NCOUNT 0x20000000 | ||
90 | #define TCTR_SC_READBACK 0xc0000000 | ||
91 | |||
92 | /* timer control status registers - non-readback mode */ | ||
93 | #define TCSRx_DATA 0xff000000 | ||
94 | |||
95 | /* timer control status registers - readback mode */ | ||
96 | #define TCSRx_OUTPUT 0x80000000 | ||
97 | #define TCSRx_NULLCOUNT 0x40000000 | ||
98 | #define TCSRx_RL 0x30000000 | ||
99 | #define TCSRx_MODE 0x07000000 | ||
100 | |||
101 | /* timer clock select registers */ | ||
102 | #define TxCKSL_SELECT 0x0f000000 | ||
103 | #define __TxCKSL_SELECT(X) ((X) << 24) | ||
104 | #define TxCKSL_EIGHT 0xf0000000 | ||
105 | |||
106 | #endif /* _ASM_TIMER_REGS_H */ | ||
diff --git a/arch/frv/include/asm/timex.h b/arch/frv/include/asm/timex.h deleted file mode 100644 index bf53166f2793..000000000000 --- a/arch/frv/include/asm/timex.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* timex.h: FR-V architecture timex specifications | ||
3 | */ | ||
4 | #ifndef _ASM_TIMEX_H | ||
5 | #define _ASM_TIMEX_H | ||
6 | |||
7 | #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ | ||
8 | #define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ | ||
9 | |||
10 | typedef unsigned long cycles_t; | ||
11 | |||
12 | static inline cycles_t get_cycles(void) | ||
13 | { | ||
14 | return 0; | ||
15 | } | ||
16 | |||
17 | #define vxtime_lock() do {} while (0) | ||
18 | #define vxtime_unlock() do {} while (0) | ||
19 | |||
20 | /* This attribute is used in include/linux/jiffies.h alongside with | ||
21 | * __cacheline_aligned_in_smp. It is assumed that __cacheline_aligned_in_smp | ||
22 | * for frv does not contain another section specification. | ||
23 | */ | ||
24 | #define __jiffy_arch_data __attribute__((__section__(".data"))) | ||
25 | |||
26 | #endif | ||
27 | |||
diff --git a/arch/frv/include/asm/tlb.h b/arch/frv/include/asm/tlb.h deleted file mode 100644 index d3e361ad725a..000000000000 --- a/arch/frv/include/asm/tlb.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_TLB_H | ||
3 | #define _ASM_TLB_H | ||
4 | |||
5 | #include <asm/tlbflush.h> | ||
6 | |||
7 | #ifdef CONFIG_MMU | ||
8 | extern void check_pgt_cache(void); | ||
9 | #else | ||
10 | #define check_pgt_cache() do {} while(0) | ||
11 | #endif | ||
12 | |||
13 | /* | ||
14 | * we don't need any special per-pte or per-vma handling... | ||
15 | */ | ||
16 | #define tlb_start_vma(tlb, vma) do { } while (0) | ||
17 | #define tlb_end_vma(tlb, vma) do { } while (0) | ||
18 | #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) | ||
19 | |||
20 | /* | ||
21 | * .. because we flush the whole mm when it fills up | ||
22 | */ | ||
23 | #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) | ||
24 | |||
25 | #include <asm-generic/tlb.h> | ||
26 | |||
27 | #endif /* _ASM_TLB_H */ | ||
28 | |||
diff --git a/arch/frv/include/asm/tlbflush.h b/arch/frv/include/asm/tlbflush.h deleted file mode 100644 index 75879420f578..000000000000 --- a/arch/frv/include/asm/tlbflush.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* tlbflush.h: TLB flushing functions | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_TLBFLUSH_H | ||
13 | #define _ASM_TLBFLUSH_H | ||
14 | |||
15 | #include <linux/mm.h> | ||
16 | #include <asm/processor.h> | ||
17 | |||
18 | #ifdef CONFIG_MMU | ||
19 | |||
20 | #ifndef __ASSEMBLY__ | ||
21 | extern asmlinkage void __flush_tlb_all(void); | ||
22 | extern asmlinkage void __flush_tlb_mm(unsigned long contextid); | ||
23 | extern asmlinkage void __flush_tlb_page(unsigned long contextid, unsigned long start); | ||
24 | extern asmlinkage void __flush_tlb_range(unsigned long contextid, | ||
25 | unsigned long start, unsigned long end); | ||
26 | #endif /* !__ASSEMBLY__ */ | ||
27 | |||
28 | #define flush_tlb_all() \ | ||
29 | do { \ | ||
30 | preempt_disable(); \ | ||
31 | __flush_tlb_all(); \ | ||
32 | preempt_enable(); \ | ||
33 | } while(0) | ||
34 | |||
35 | #define flush_tlb_mm(mm) \ | ||
36 | do { \ | ||
37 | preempt_disable(); \ | ||
38 | __flush_tlb_mm((mm)->context.id); \ | ||
39 | preempt_enable(); \ | ||
40 | } while(0) | ||
41 | |||
42 | #define flush_tlb_range(vma,start,end) \ | ||
43 | do { \ | ||
44 | preempt_disable(); \ | ||
45 | __flush_tlb_range((vma)->vm_mm->context.id, start, end); \ | ||
46 | preempt_enable(); \ | ||
47 | } while(0) | ||
48 | |||
49 | #define flush_tlb_page(vma,addr) \ | ||
50 | do { \ | ||
51 | preempt_disable(); \ | ||
52 | __flush_tlb_page((vma)->vm_mm->context.id, addr); \ | ||
53 | preempt_enable(); \ | ||
54 | } while(0) | ||
55 | |||
56 | |||
57 | #define __flush_tlb_global() flush_tlb_all() | ||
58 | #define flush_tlb() flush_tlb_all() | ||
59 | #define flush_tlb_kernel_range(start, end) flush_tlb_all() | ||
60 | |||
61 | #else | ||
62 | |||
63 | #define flush_tlb() BUG() | ||
64 | #define flush_tlb_all() BUG() | ||
65 | #define flush_tlb_mm(mm) BUG() | ||
66 | #define flush_tlb_page(vma,addr) BUG() | ||
67 | #define flush_tlb_range(mm,start,end) BUG() | ||
68 | #define flush_tlb_kernel_range(start, end) BUG() | ||
69 | |||
70 | #endif | ||
71 | |||
72 | |||
73 | #endif /* _ASM_TLBFLUSH_H */ | ||
diff --git a/arch/frv/include/asm/topology.h b/arch/frv/include/asm/topology.h deleted file mode 100644 index 207603071f78..000000000000 --- a/arch/frv/include/asm/topology.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_TOPOLOGY_H | ||
3 | #define _ASM_TOPOLOGY_H | ||
4 | |||
5 | #ifdef CONFIG_NUMA | ||
6 | |||
7 | #error NUMA not supported yet | ||
8 | |||
9 | #endif /* CONFIG_NUMA */ | ||
10 | |||
11 | #include <asm-generic/topology.h> | ||
12 | |||
13 | #endif /* _ASM_TOPOLOGY_H */ | ||
diff --git a/arch/frv/include/asm/types.h b/arch/frv/include/asm/types.h deleted file mode 100644 index 6bc63650d832..000000000000 --- a/arch/frv/include/asm/types.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* types.h: FRV types | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_TYPES_H | ||
12 | #define _ASM_TYPES_H | ||
13 | |||
14 | #include <uapi/asm/types.h> | ||
15 | |||
16 | /* | ||
17 | * These aren't exported outside the kernel to avoid name space clashes | ||
18 | */ | ||
19 | |||
20 | #define BITS_PER_LONG 32 | ||
21 | |||
22 | #endif /* _ASM_TYPES_H */ | ||
diff --git a/arch/frv/include/asm/uaccess.h b/arch/frv/include/asm/uaccess.h deleted file mode 100644 index ff9562dc6825..000000000000 --- a/arch/frv/include/asm/uaccess.h +++ /dev/null | |||
@@ -1,285 +0,0 @@ | |||
1 | /* uaccess.h: userspace accessor functions | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_UACCESS_H | ||
13 | #define _ASM_UACCESS_H | ||
14 | |||
15 | /* | ||
16 | * User space memory access functions | ||
17 | */ | ||
18 | #include <linux/mm.h> | ||
19 | #include <asm/segment.h> | ||
20 | #include <asm/sections.h> | ||
21 | #include <asm/extable.h> | ||
22 | |||
23 | #define __ptr(x) ((unsigned long __force *)(x)) | ||
24 | |||
25 | /* | ||
26 | * check that a range of addresses falls within the current address limit | ||
27 | */ | ||
28 | static inline int ___range_ok(unsigned long addr, unsigned long size) | ||
29 | { | ||
30 | #ifdef CONFIG_MMU | ||
31 | int flag = -EFAULT, tmp; | ||
32 | |||
33 | asm volatile ( | ||
34 | " addcc %3,%2,%1,icc0 \n" /* set C-flag if addr+size>4GB */ | ||
35 | " subcc.p %1,%4,gr0,icc1 \n" /* jump if addr+size>limit */ | ||
36 | " bc icc0,#0,0f \n" | ||
37 | " bhi icc1,#0,0f \n" | ||
38 | " setlos #0,%0 \n" /* mark okay */ | ||
39 | "0: \n" | ||
40 | : "=r"(flag), "=&r"(tmp) | ||
41 | : "r"(addr), "r"(size), "r"(get_addr_limit()), "0"(flag) | ||
42 | ); | ||
43 | |||
44 | return flag; | ||
45 | |||
46 | #else | ||
47 | |||
48 | if (addr < memory_start || | ||
49 | addr > memory_end || | ||
50 | size > memory_end - memory_start || | ||
51 | addr + size > memory_end) | ||
52 | return -EFAULT; | ||
53 | |||
54 | return 0; | ||
55 | #endif | ||
56 | } | ||
57 | |||
58 | #define __range_ok(addr,size) ___range_ok((unsigned long) (addr), (unsigned long) (size)) | ||
59 | |||
60 | #define access_ok(type,addr,size) (__range_ok((void __user *)(addr), (size)) == 0) | ||
61 | #define __access_ok(addr,size) (__range_ok((addr), (size)) == 0) | ||
62 | |||
63 | |||
64 | /* | ||
65 | * These are the main single-value transfer routines. They automatically | ||
66 | * use the right size if we just have the right pointer type. | ||
67 | */ | ||
68 | #define __put_user(x, ptr) \ | ||
69 | ({ \ | ||
70 | int __pu_err = 0; \ | ||
71 | \ | ||
72 | typeof(*(ptr)) __pu_val = (x); \ | ||
73 | __chk_user_ptr(ptr); \ | ||
74 | \ | ||
75 | switch (sizeof (*(ptr))) { \ | ||
76 | case 1: \ | ||
77 | __put_user_asm(__pu_err, __pu_val, ptr, "b", "r"); \ | ||
78 | break; \ | ||
79 | case 2: \ | ||
80 | __put_user_asm(__pu_err, __pu_val, ptr, "h", "r"); \ | ||
81 | break; \ | ||
82 | case 4: \ | ||
83 | __put_user_asm(__pu_err, __pu_val, ptr, "", "r"); \ | ||
84 | break; \ | ||
85 | case 8: \ | ||
86 | __put_user_asm(__pu_err, __pu_val, ptr, "d", "e"); \ | ||
87 | break; \ | ||
88 | default: \ | ||
89 | __pu_err = __put_user_bad(); \ | ||
90 | break; \ | ||
91 | } \ | ||
92 | __pu_err; \ | ||
93 | }) | ||
94 | |||
95 | #define put_user(x, ptr) \ | ||
96 | ({ \ | ||
97 | typeof(*(ptr)) __user *_p = (ptr); \ | ||
98 | int _e; \ | ||
99 | \ | ||
100 | _e = __range_ok(_p, sizeof(*_p)); \ | ||
101 | if (_e == 0) \ | ||
102 | _e = __put_user((x), _p); \ | ||
103 | _e; \ | ||
104 | }) | ||
105 | |||
106 | extern int __put_user_bad(void); | ||
107 | |||
108 | /* | ||
109 | * Tell gcc we read from memory instead of writing: this is because | ||
110 | * we do not write to any memory gcc knows about, so there are no | ||
111 | * aliasing issues. | ||
112 | */ | ||
113 | |||
114 | #ifdef CONFIG_MMU | ||
115 | |||
116 | #define __put_user_asm(err,x,ptr,dsize,constraint) \ | ||
117 | do { \ | ||
118 | asm volatile("1: st"dsize"%I1 %2,%M1 \n" \ | ||
119 | "2: \n" \ | ||
120 | ".subsection 2 \n" \ | ||
121 | "3: setlos %3,%0 \n" \ | ||
122 | " bra 2b \n" \ | ||
123 | ".previous \n" \ | ||
124 | ".section __ex_table,\"a\" \n" \ | ||
125 | " .balign 8 \n" \ | ||
126 | " .long 1b,3b \n" \ | ||
127 | ".previous" \ | ||
128 | : "=r" (err) \ | ||
129 | : "m" (*__ptr(ptr)), constraint (x), "i"(-EFAULT), "0"(err) \ | ||
130 | : "memory"); \ | ||
131 | } while (0) | ||
132 | |||
133 | #else | ||
134 | |||
135 | #define __put_user_asm(err,x,ptr,bwl,con) \ | ||
136 | do { \ | ||
137 | asm(" st"bwl"%I0 %1,%M0 \n" \ | ||
138 | " membar \n" \ | ||
139 | : \ | ||
140 | : "m" (*__ptr(ptr)), con (x) \ | ||
141 | : "memory"); \ | ||
142 | } while (0) | ||
143 | |||
144 | #endif | ||
145 | |||
146 | /*****************************************************************************/ | ||
147 | /* | ||
148 | * | ||
149 | */ | ||
150 | #define __get_user(x, ptr) \ | ||
151 | ({ \ | ||
152 | int __gu_err = 0; \ | ||
153 | __chk_user_ptr(ptr); \ | ||
154 | \ | ||
155 | switch (sizeof(*(ptr))) { \ | ||
156 | case 1: { \ | ||
157 | unsigned char __gu_val; \ | ||
158 | __get_user_asm(__gu_err, __gu_val, ptr, "ub", "=r"); \ | ||
159 | (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \ | ||
160 | break; \ | ||
161 | } \ | ||
162 | case 2: { \ | ||
163 | unsigned short __gu_val; \ | ||
164 | __get_user_asm(__gu_err, __gu_val, ptr, "uh", "=r"); \ | ||
165 | (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \ | ||
166 | break; \ | ||
167 | } \ | ||
168 | case 4: { \ | ||
169 | unsigned int __gu_val; \ | ||
170 | __get_user_asm(__gu_err, __gu_val, ptr, "", "=r"); \ | ||
171 | (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \ | ||
172 | break; \ | ||
173 | } \ | ||
174 | case 8: { \ | ||
175 | unsigned long long __gu_val; \ | ||
176 | __get_user_asm(__gu_err, __gu_val, ptr, "d", "=e"); \ | ||
177 | (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \ | ||
178 | break; \ | ||
179 | } \ | ||
180 | default: \ | ||
181 | __gu_err = __get_user_bad(); \ | ||
182 | break; \ | ||
183 | } \ | ||
184 | __gu_err; \ | ||
185 | }) | ||
186 | |||
187 | #define get_user(x, ptr) \ | ||
188 | ({ \ | ||
189 | const typeof(*(ptr)) __user *_p = (ptr);\ | ||
190 | int _e; \ | ||
191 | \ | ||
192 | _e = __range_ok(_p, sizeof(*_p)); \ | ||
193 | if (likely(_e == 0)) \ | ||
194 | _e = __get_user((x), _p); \ | ||
195 | else \ | ||
196 | (x) = (typeof(x)) 0; \ | ||
197 | _e; \ | ||
198 | }) | ||
199 | |||
200 | extern int __get_user_bad(void); | ||
201 | |||
202 | #ifdef CONFIG_MMU | ||
203 | |||
204 | #define __get_user_asm(err,x,ptr,dtype,constraint) \ | ||
205 | do { \ | ||
206 | asm("1: ld"dtype"%I2 %M2,%1 \n" \ | ||
207 | "2: \n" \ | ||
208 | ".subsection 2 \n" \ | ||
209 | "3: setlos %3,%0 \n" \ | ||
210 | " setlos #0,%1 \n" \ | ||
211 | " bra 2b \n" \ | ||
212 | ".previous \n" \ | ||
213 | ".section __ex_table,\"a\" \n" \ | ||
214 | " .balign 8 \n" \ | ||
215 | " .long 1b,3b \n" \ | ||
216 | ".previous" \ | ||
217 | : "=r" (err), constraint (x) \ | ||
218 | : "m" (*__ptr(ptr)), "i"(-EFAULT), "0"(err) \ | ||
219 | ); \ | ||
220 | } while(0) | ||
221 | |||
222 | #else | ||
223 | |||
224 | #define __get_user_asm(err,x,ptr,bwl,con) \ | ||
225 | asm(" ld"bwl"%I1 %M1,%0 \n" \ | ||
226 | " membar \n" \ | ||
227 | : con(x) \ | ||
228 | : "m" (*__ptr(ptr))) | ||
229 | |||
230 | #endif | ||
231 | |||
232 | /*****************************************************************************/ | ||
233 | /* | ||
234 | * | ||
235 | */ | ||
236 | |||
237 | #define ____force(x) (__force void *)(void __user *)(x) | ||
238 | #ifdef CONFIG_MMU | ||
239 | extern long __memset_user(void *dst, unsigned long count); | ||
240 | extern long __memcpy_user(void *dst, const void *src, unsigned long count); | ||
241 | |||
242 | #define __clear_user(dst,count) __memset_user(____force(dst), (count)) | ||
243 | |||
244 | #else | ||
245 | |||
246 | #define __clear_user(dst,count) (memset(____force(dst), 0, (count)), 0) | ||
247 | |||
248 | #endif | ||
249 | |||
250 | static inline unsigned long | ||
251 | raw_copy_from_user(void *to, const void __user *from, unsigned long n) | ||
252 | { | ||
253 | #ifdef CONFIG_MMU | ||
254 | return __memcpy_user(to, (__force const void *)from, n); | ||
255 | #else | ||
256 | memcpy(to, (__force const void *)from, n); | ||
257 | return 0; | ||
258 | #endif | ||
259 | } | ||
260 | |||
261 | static inline unsigned long | ||
262 | raw_copy_to_user(void __user *to, const void *from, unsigned long n) | ||
263 | { | ||
264 | #ifdef CONFIG_MMU | ||
265 | return __memcpy_user((__force void *)to, from, n); | ||
266 | #else | ||
267 | memcpy((__force void *)to, from, n); | ||
268 | return 0; | ||
269 | #endif | ||
270 | } | ||
271 | #define INLINE_COPY_TO_USER | ||
272 | #define INLINE_COPY_FROM_USER | ||
273 | |||
274 | static inline unsigned long __must_check | ||
275 | clear_user(void __user *to, unsigned long n) | ||
276 | { | ||
277 | if (likely(__access_ok(to, n))) | ||
278 | n = __clear_user(to, n); | ||
279 | return n; | ||
280 | } | ||
281 | |||
282 | extern long strncpy_from_user(char *dst, const char __user *src, long count); | ||
283 | extern long strnlen_user(const char __user *src, long count); | ||
284 | |||
285 | #endif /* _ASM_UACCESS_H */ | ||
diff --git a/arch/frv/include/asm/ucontext.h b/arch/frv/include/asm/ucontext.h deleted file mode 100644 index 0cc2d95dd209..000000000000 --- a/arch/frv/include/asm/ucontext.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_UCONTEXT_H | ||
3 | #define _ASM_UCONTEXT_H | ||
4 | |||
5 | struct ucontext { | ||
6 | unsigned long uc_flags; | ||
7 | struct ucontext *uc_link; | ||
8 | stack_t uc_stack; | ||
9 | struct sigcontext uc_mcontext; | ||
10 | sigset_t uc_sigmask; /* mask last for extensibility */ | ||
11 | }; | ||
12 | |||
13 | #endif | ||
diff --git a/arch/frv/include/asm/unaligned.h b/arch/frv/include/asm/unaligned.h deleted file mode 100644 index 6c61c05b2e0c..000000000000 --- a/arch/frv/include/asm/unaligned.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* unaligned.h: unaligned access handler | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_UNALIGNED_H | ||
13 | #define _ASM_UNALIGNED_H | ||
14 | |||
15 | #include <linux/unaligned/le_byteshift.h> | ||
16 | #include <linux/unaligned/be_struct.h> | ||
17 | #include <linux/unaligned/generic.h> | ||
18 | |||
19 | #define get_unaligned __get_unaligned_be | ||
20 | #define put_unaligned __put_unaligned_be | ||
21 | |||
22 | #endif /* _ASM_UNALIGNED_H */ | ||
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h deleted file mode 100644 index b4b3f9b26b81..000000000000 --- a/arch/frv/include/asm/unistd.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_UNISTD_H_ | ||
3 | #define _ASM_UNISTD_H_ | ||
4 | |||
5 | #include <uapi/asm/unistd.h> | ||
6 | |||
7 | |||
8 | #define NR_syscalls 338 | ||
9 | |||
10 | /* #define __ARCH_WANT_OLD_READDIR */ | ||
11 | #define __ARCH_WANT_OLD_STAT | ||
12 | #define __ARCH_WANT_STAT64 | ||
13 | #define __ARCH_WANT_SYS_ALARM | ||
14 | /* #define __ARCH_WANT_SYS_GETHOSTNAME */ | ||
15 | #define __ARCH_WANT_SYS_IPC | ||
16 | #define __ARCH_WANT_SYS_PAUSE | ||
17 | /* #define __ARCH_WANT_SYS_SIGNAL */ | ||
18 | #define __ARCH_WANT_SYS_TIME | ||
19 | #define __ARCH_WANT_SYS_UTIME | ||
20 | #define __ARCH_WANT_SYS_WAITPID | ||
21 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
22 | #define __ARCH_WANT_SYS_FADVISE64 | ||
23 | #define __ARCH_WANT_SYS_GETPGRP | ||
24 | #define __ARCH_WANT_SYS_LLSEEK | ||
25 | #define __ARCH_WANT_SYS_NICE | ||
26 | /* #define __ARCH_WANT_SYS_OLD_GETRLIMIT */ | ||
27 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
28 | /* #define __ARCH_WANT_SYS_SIGPENDING */ | ||
29 | #define __ARCH_WANT_SYS_SIGPROCMASK | ||
30 | #define __ARCH_WANT_SYS_FORK | ||
31 | #define __ARCH_WANT_SYS_VFORK | ||
32 | #define __ARCH_WANT_SYS_CLONE | ||
33 | |||
34 | #endif /* _ASM_UNISTD_H_ */ | ||
diff --git a/arch/frv/include/asm/user.h b/arch/frv/include/asm/user.h deleted file mode 100644 index 82fa8fab64ae..000000000000 --- a/arch/frv/include/asm/user.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | /* user.h: FR-V core file format stuff | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_USER_H | ||
12 | #define _ASM_USER_H | ||
13 | |||
14 | #include <asm/page.h> | ||
15 | #include <asm/registers.h> | ||
16 | |||
17 | /* Core file format: The core file is written in such a way that gdb | ||
18 | * can understand it and provide useful information to the user (under | ||
19 | * linux we use the 'trad-core' bfd). There are quite a number of | ||
20 | * obstacles to being able to view the contents of the floating point | ||
21 | * registers, and until these are solved you will not be able to view | ||
22 | * the contents of them. Actually, you can read in the core file and | ||
23 | * look at the contents of the user struct to find out what the | ||
24 | * floating point registers contain. | ||
25 | * | ||
26 | * The actual file contents are as follows: | ||
27 | * UPAGE: | ||
28 | * 1 page consisting of a user struct that tells gdb what is present | ||
29 | * in the file. Directly after this is a copy of the task_struct, | ||
30 | * which is currently not used by gdb, but it may come in useful at | ||
31 | * some point. All of the registers are stored as part of the | ||
32 | * upage. The upage should always be only one page. | ||
33 | * | ||
34 | * DATA: | ||
35 | * The data area is stored. We use current->end_text to | ||
36 | * current->brk to pick up all of the user variables, plus any | ||
37 | * memory that may have been malloced. No attempt is made to | ||
38 | * determine if a page is demand-zero or if a page is totally | ||
39 | * unused, we just cover the entire range. All of the addresses are | ||
40 | * rounded in such a way that an integral number of pages is | ||
41 | * written. | ||
42 | * | ||
43 | * STACK: | ||
44 | * We need the stack information in order to get a meaningful | ||
45 | * backtrace. We need to write the data from (esp) to | ||
46 | * current->start_stack, so we round each of these off in order to | ||
47 | * be able to write an integer number of pages. The minimum core | ||
48 | * file size is 3 pages, or 12288 bytes. | ||
49 | */ | ||
50 | |||
51 | /* When the kernel dumps core, it starts by dumping the user struct - | ||
52 | * this will be used by gdb to figure out where the data and stack segments | ||
53 | * are within the file, and what virtual addresses to use. | ||
54 | */ | ||
55 | struct user { | ||
56 | /* We start with the registers, to mimic the way that "memory" is returned | ||
57 | * from the ptrace(3,...) function. */ | ||
58 | struct user_context regs; | ||
59 | |||
60 | /* The rest of this junk is to help gdb figure out what goes where */ | ||
61 | unsigned long u_tsize; /* Text segment size (pages). */ | ||
62 | unsigned long u_dsize; /* Data segment size (pages). */ | ||
63 | unsigned long u_ssize; /* Stack segment size (pages). */ | ||
64 | unsigned long start_code; /* Starting virtual address of text. */ | ||
65 | unsigned long start_stack; /* Starting virtual address of stack area. | ||
66 | * This is actually the bottom of the stack, | ||
67 | * the top of the stack is always found in the | ||
68 | * esp register. */ | ||
69 | long int signal; /* Signal that caused the core dump. */ | ||
70 | |||
71 | unsigned long magic; /* To uniquely identify a core file */ | ||
72 | char u_comm[32]; /* User command that was responsible */ | ||
73 | }; | ||
74 | |||
75 | #define NBPG PAGE_SIZE | ||
76 | #define UPAGES 1 | ||
77 | #define HOST_TEXT_START_ADDR (u.start_code) | ||
78 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) | ||
79 | |||
80 | #endif | ||
diff --git a/arch/frv/include/asm/vga.h b/arch/frv/include/asm/vga.h deleted file mode 100644 index a702c800a229..000000000000 --- a/arch/frv/include/asm/vga.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* vga.h: VGA register stuff | ||
2 | * | ||
3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_VGA_H | ||
13 | #define _ASM_VGA_H | ||
14 | |||
15 | |||
16 | |||
17 | #endif /* _ASM_VGA_H */ | ||
diff --git a/arch/frv/include/asm/virtconvert.h b/arch/frv/include/asm/virtconvert.h deleted file mode 100644 index b26d70ab9111..000000000000 --- a/arch/frv/include/asm/virtconvert.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* virtconvert.h: virtual/physical/page address conversion | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef _ASM_VIRTCONVERT_H | ||
12 | #define _ASM_VIRTCONVERT_H | ||
13 | |||
14 | /* | ||
15 | * Macros used for converting between virtual and physical mappings. | ||
16 | */ | ||
17 | |||
18 | #ifdef __KERNEL__ | ||
19 | |||
20 | #include <asm/setup.h> | ||
21 | |||
22 | #ifdef CONFIG_MMU | ||
23 | |||
24 | #define phys_to_virt(vaddr) ((void *) ((unsigned long)(vaddr) + PAGE_OFFSET)) | ||
25 | #define virt_to_phys(vaddr) ((unsigned long) (vaddr) - PAGE_OFFSET) | ||
26 | |||
27 | #else | ||
28 | |||
29 | #define phys_to_virt(vaddr) ((void *) (vaddr)) | ||
30 | #define virt_to_phys(vaddr) ((unsigned long) (vaddr)) | ||
31 | |||
32 | #endif | ||
33 | |||
34 | #define virt_to_bus virt_to_phys | ||
35 | #define bus_to_virt phys_to_virt | ||
36 | |||
37 | #define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) | ||
38 | #define page_to_phys(page) virt_to_phys((void *)__page_address(page)) | ||
39 | |||
40 | #endif | ||
41 | #endif | ||
diff --git a/arch/frv/include/asm/xor.h b/arch/frv/include/asm/xor.h deleted file mode 100644 index c82eb12a5b18..000000000000 --- a/arch/frv/include/asm/xor.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/xor.h> | ||
diff --git a/arch/frv/include/uapi/asm/Kbuild b/arch/frv/include/uapi/asm/Kbuild deleted file mode 100644 index 5354b0f84d41..000000000000 --- a/arch/frv/include/uapi/asm/Kbuild +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # UAPI Header export list | ||
2 | include include/uapi/asm-generic/Kbuild.asm | ||
3 | |||
4 | generic-y += siginfo.h | ||
5 | generic-y += bpf_perf_event.h | ||
diff --git a/arch/frv/include/uapi/asm/auxvec.h b/arch/frv/include/uapi/asm/auxvec.h deleted file mode 100644 index 07710778fa10..000000000000 --- a/arch/frv/include/uapi/asm/auxvec.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef __FRV_AUXVEC_H | ||
2 | #define __FRV_AUXVEC_H | ||
3 | |||
4 | #endif | ||
diff --git a/arch/frv/include/uapi/asm/bitsperlong.h b/arch/frv/include/uapi/asm/bitsperlong.h deleted file mode 100644 index 76da34b10f59..000000000000 --- a/arch/frv/include/uapi/asm/bitsperlong.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/bitsperlong.h> | ||
diff --git a/arch/frv/include/uapi/asm/byteorder.h b/arch/frv/include/uapi/asm/byteorder.h deleted file mode 100644 index a46f6472acdc..000000000000 --- a/arch/frv/include/uapi/asm/byteorder.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_BYTEORDER_H | ||
3 | #define _ASM_BYTEORDER_H | ||
4 | |||
5 | #include <linux/byteorder/big_endian.h> | ||
6 | |||
7 | #endif /* _ASM_BYTEORDER_H */ | ||
diff --git a/arch/frv/include/uapi/asm/errno.h b/arch/frv/include/uapi/asm/errno.h deleted file mode 100644 index c5b82f2f2970..000000000000 --- a/arch/frv/include/uapi/asm/errno.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_ERRNO_H | ||
3 | #define _ASM_ERRNO_H | ||
4 | |||
5 | #include <asm-generic/errno.h> | ||
6 | |||
7 | #endif /* _ASM_ERRNO_H */ | ||
8 | |||
diff --git a/arch/frv/include/uapi/asm/fcntl.h b/arch/frv/include/uapi/asm/fcntl.h deleted file mode 100644 index a77648c505d1..000000000000 --- a/arch/frv/include/uapi/asm/fcntl.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/fcntl.h> | ||
diff --git a/arch/frv/include/uapi/asm/ioctl.h b/arch/frv/include/uapi/asm/ioctl.h deleted file mode 100644 index b809c4566e5f..000000000000 --- a/arch/frv/include/uapi/asm/ioctl.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/ioctl.h> | ||
diff --git a/arch/frv/include/uapi/asm/ioctls.h b/arch/frv/include/uapi/asm/ioctls.h deleted file mode 100644 index dd9f5eb9feda..000000000000 --- a/arch/frv/include/uapi/asm/ioctls.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef __ASM_IOCTLS_H__ | ||
3 | #define __ASM_IOCTLS_H__ | ||
4 | |||
5 | #define TIOCTTYGSTRUCT 0x5426 /* For debugging only */ | ||
6 | #define FIOQSIZE 0x545E | ||
7 | |||
8 | #include <asm-generic/ioctls.h> | ||
9 | |||
10 | #endif /* __ASM_IOCTLS_H__ */ | ||
11 | |||
diff --git a/arch/frv/include/uapi/asm/ipcbuf.h b/arch/frv/include/uapi/asm/ipcbuf.h deleted file mode 100644 index 90d6445a14df..000000000000 --- a/arch/frv/include/uapi/asm/ipcbuf.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/ipcbuf.h> | ||
diff --git a/arch/frv/include/uapi/asm/kvm_para.h b/arch/frv/include/uapi/asm/kvm_para.h deleted file mode 100644 index baacc4996d18..000000000000 --- a/arch/frv/include/uapi/asm/kvm_para.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/kvm_para.h> | ||
diff --git a/arch/frv/include/uapi/asm/mman.h b/arch/frv/include/uapi/asm/mman.h deleted file mode 100644 index 306fc0460b80..000000000000 --- a/arch/frv/include/uapi/asm/mman.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/mman.h> | ||
diff --git a/arch/frv/include/uapi/asm/msgbuf.h b/arch/frv/include/uapi/asm/msgbuf.h deleted file mode 100644 index 156c81bb46d7..000000000000 --- a/arch/frv/include/uapi/asm/msgbuf.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_MSGBUF_H | ||
3 | #define _ASM_MSGBUF_H | ||
4 | |||
5 | /* | ||
6 | * The msqid64_ds structure for FR-V architecture. | ||
7 | * Note extra padding because this structure is passed back and forth | ||
8 | * between kernel and user space. | ||
9 | * | ||
10 | * Pad space is left for: | ||
11 | * - 64-bit time_t to solve y2038 problem | ||
12 | * - 2 miscellaneous 32-bit values | ||
13 | */ | ||
14 | |||
15 | struct msqid64_ds { | ||
16 | struct ipc64_perm msg_perm; | ||
17 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
20 | unsigned long __unused2; | ||
21 | __kernel_time_t msg_ctime; /* last change time */ | ||
22 | unsigned long __unused3; | ||
23 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
24 | unsigned long msg_qnum; /* number of messages in queue */ | ||
25 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
26 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
27 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
28 | unsigned long __unused4; | ||
29 | unsigned long __unused5; | ||
30 | }; | ||
31 | |||
32 | #endif /* _ASM_MSGBUF_H */ | ||
33 | |||
diff --git a/arch/frv/include/uapi/asm/param.h b/arch/frv/include/uapi/asm/param.h deleted file mode 100644 index d3e0168d8937..000000000000 --- a/arch/frv/include/uapi/asm/param.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_PARAM_H | ||
3 | #define _ASM_PARAM_H | ||
4 | |||
5 | #define EXEC_PAGESIZE 16384 | ||
6 | |||
7 | #include <asm-generic/param.h> | ||
8 | |||
9 | #endif /* _ASM_PARAM_H */ | ||
diff --git a/arch/frv/include/uapi/asm/poll.h b/arch/frv/include/uapi/asm/poll.h deleted file mode 100644 index f55b45f475ec..000000000000 --- a/arch/frv/include/uapi/asm/poll.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_POLL_H | ||
3 | #define _ASM_POLL_H | ||
4 | |||
5 | #define POLLWRNORM POLLOUT | ||
6 | #define POLLWRBAND 256 | ||
7 | |||
8 | #include <asm-generic/poll.h> | ||
9 | #undef POLLREMOVE | ||
10 | |||
11 | #endif | ||
diff --git a/arch/frv/include/uapi/asm/posix_types.h b/arch/frv/include/uapi/asm/posix_types.h deleted file mode 100644 index 2995777227b3..000000000000 --- a/arch/frv/include/uapi/asm/posix_types.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_POSIX_TYPES_H | ||
3 | #define _ASM_POSIX_TYPES_H | ||
4 | |||
5 | /* | ||
6 | * This file is generally used by user-level software, so you need to | ||
7 | * be a little careful about namespace pollution etc. Also, we cannot | ||
8 | * assume GCC is being used. | ||
9 | */ | ||
10 | |||
11 | typedef unsigned short __kernel_mode_t; | ||
12 | #define __kernel_mode_t __kernel_mode_t | ||
13 | |||
14 | typedef unsigned short __kernel_ipc_pid_t; | ||
15 | #define __kernel_ipc_pid_t __kernel_ipc_pid_t | ||
16 | |||
17 | typedef unsigned short __kernel_uid_t; | ||
18 | typedef unsigned short __kernel_gid_t; | ||
19 | #define __kernel_uid_t __kernel_uid_t | ||
20 | |||
21 | typedef unsigned short __kernel_old_dev_t; | ||
22 | #define __kernel_old_dev_t __kernel_old_dev_t | ||
23 | |||
24 | #include <asm-generic/posix_types.h> | ||
25 | |||
26 | #endif | ||
27 | |||
diff --git a/arch/frv/include/uapi/asm/ptrace.h b/arch/frv/include/uapi/asm/ptrace.h deleted file mode 100644 index f1d2f652d083..000000000000 --- a/arch/frv/include/uapi/asm/ptrace.h +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ | ||
2 | /* ptrace.h: ptrace() relevant definitions | ||
3 | * | ||
4 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
5 | * Written by David Howells (dhowells@redhat.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #ifndef _UAPI_ASM_PTRACE_H | ||
13 | #define _UAPI_ASM_PTRACE_H | ||
14 | |||
15 | #include <asm/registers.h> | ||
16 | |||
17 | |||
18 | #define PT_PSR 0 | ||
19 | #define PT_ISR 1 | ||
20 | #define PT_CCR 2 | ||
21 | #define PT_CCCR 3 | ||
22 | #define PT_LR 4 | ||
23 | #define PT_LCR 5 | ||
24 | #define PT_PC 6 | ||
25 | |||
26 | #define PT__STATUS 7 /* exception status */ | ||
27 | #define PT_SYSCALLNO 8 /* syscall number or -1 */ | ||
28 | #define PT_ORIG_GR8 9 /* saved GR8 for signal handling */ | ||
29 | #define PT_GNER0 10 | ||
30 | #define PT_GNER1 11 | ||
31 | #define PT_IACC0H 12 | ||
32 | #define PT_IACC0L 13 | ||
33 | |||
34 | #define PT_GR(j) ( 14 + (j)) /* GRj for 0<=j<=63 */ | ||
35 | #define PT_FR(j) ( 78 + (j)) /* FRj for 0<=j<=63 */ | ||
36 | #define PT_FNER(j) (142 + (j)) /* FNERj for 0<=j<=1 */ | ||
37 | #define PT_MSR(j) (144 + (j)) /* MSRj for 0<=j<=2 */ | ||
38 | #define PT_ACC(j) (146 + (j)) /* ACCj for 0<=j<=7 */ | ||
39 | #define PT_ACCG(jklm) (154 + (jklm)) /* ACCGjklm for 0<=jklm<=1 (reads four regs per slot) */ | ||
40 | #define PT_FSR(j) (156 + (j)) /* FSRj for 0<=j<=0 */ | ||
41 | #define PT__GPEND 78 | ||
42 | #define PT__END 157 | ||
43 | |||
44 | #define PT_TBR PT_GR(0) | ||
45 | #define PT_SP PT_GR(1) | ||
46 | #define PT_FP PT_GR(2) | ||
47 | #define PT_PREV_FRAME PT_GR(28) /* previous exception frame pointer (old gr28 value) */ | ||
48 | #define PT_CURR_TASK PT_GR(29) /* current task */ | ||
49 | |||
50 | |||
51 | /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ | ||
52 | #define PTRACE_GETREGS 12 | ||
53 | #define PTRACE_SETREGS 13 | ||
54 | #define PTRACE_GETFPREGS 14 | ||
55 | #define PTRACE_SETFPREGS 15 | ||
56 | #define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ | ||
57 | |||
58 | #define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ | ||
59 | #define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ | ||
60 | |||
61 | #endif /* _UAPI_ASM_PTRACE_H */ | ||
diff --git a/arch/frv/include/uapi/asm/registers.h b/arch/frv/include/uapi/asm/registers.h deleted file mode 100644 index 4caf09b6c193..000000000000 --- a/arch/frv/include/uapi/asm/registers.h +++ /dev/null | |||
@@ -1,233 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ | ||
2 | /* registers.h: register frame declarations | ||
3 | * | ||
4 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
5 | * Written by David Howells (dhowells@redhat.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | /* | ||
14 | * notes: | ||
15 | * | ||
16 | * (1) that the members of all these structures are carefully aligned to permit | ||
17 | * usage of STD/STDF instructions | ||
18 | * | ||
19 | * (2) if you change these structures, you must change the code in | ||
20 | * arch/frvnommu/kernel/{break.S,entry.S,switch_to.S,gdb-stub.c} | ||
21 | * | ||
22 | * | ||
23 | * the kernel stack space block looks like this: | ||
24 | * | ||
25 | * +0x2000 +---------------------- | ||
26 | * | union { | ||
27 | * | struct frv_frame0 { | ||
28 | * | struct user_context { | ||
29 | * | struct user_int_regs | ||
30 | * | struct user_fpmedia_regs | ||
31 | * | } | ||
32 | * | struct frv_debug_regs | ||
33 | * | } | ||
34 | * | struct pt_regs [user exception] | ||
35 | * | } | ||
36 | * +---------------------- <-- __kernel_frame0_ptr (maybe GR28) | ||
37 | * | | ||
38 | * | kernel stack | ||
39 | * | | ||
40 | * |...................... | ||
41 | * | struct pt_regs [kernel exception] | ||
42 | * |...................... <-- __kernel_frame0_ptr (maybe GR28) | ||
43 | * | | ||
44 | * | kernel stack | ||
45 | * | | ||
46 | * |...................... <-- stack pointer (GR1) | ||
47 | * | | ||
48 | * | unused stack space | ||
49 | * | | ||
50 | * +---------------------- | ||
51 | * | struct thread_info | ||
52 | * +0x0000 +---------------------- <-- __current_thread_info (GR15); | ||
53 | * | ||
54 | * note that GR28 points to the current exception frame | ||
55 | */ | ||
56 | |||
57 | #ifndef _ASM_REGISTERS_H | ||
58 | #define _ASM_REGISTERS_H | ||
59 | |||
60 | #ifndef __ASSEMBLY__ | ||
61 | #define __OFFSET(X,N) ((X)+(N)*4) | ||
62 | #define __OFFSETC(X,N) xxxxxxxxxxxxxxxxxxxxxxxx | ||
63 | #else | ||
64 | #define __OFFSET(X,N) ((X)+(N)*4) | ||
65 | #define __OFFSETC(X,N) ((X)+(N)) | ||
66 | #endif | ||
67 | |||
68 | /*****************************************************************************/ | ||
69 | /* | ||
70 | * Exception/Interrupt frame | ||
71 | * - held on kernel stack | ||
72 | * - 8-byte aligned on stack (old SP is saved in frame) | ||
73 | * - GR0 is fixed 0, so we don't save it | ||
74 | */ | ||
75 | #ifndef __ASSEMBLY__ | ||
76 | |||
77 | struct pt_regs { | ||
78 | unsigned long psr; /* Processor Status Register */ | ||
79 | unsigned long isr; /* Integer Status Register */ | ||
80 | unsigned long ccr; /* Condition Code Register */ | ||
81 | unsigned long cccr; /* Condition Code for Conditional Insns Register */ | ||
82 | unsigned long lr; /* Link Register */ | ||
83 | unsigned long lcr; /* Loop Count Register */ | ||
84 | unsigned long pc; /* Program Counter Register */ | ||
85 | unsigned long __status; /* exception status */ | ||
86 | unsigned long syscallno; /* syscall number or -1 */ | ||
87 | unsigned long orig_gr8; /* original syscall arg #1 */ | ||
88 | unsigned long gner0; | ||
89 | unsigned long gner1; | ||
90 | unsigned long long iacc0; | ||
91 | unsigned long tbr; /* GR0 is fixed zero, so we use this for TBR */ | ||
92 | unsigned long sp; /* GR1: USP/KSP */ | ||
93 | unsigned long fp; /* GR2: FP */ | ||
94 | unsigned long gr3; | ||
95 | unsigned long gr4; | ||
96 | unsigned long gr5; | ||
97 | unsigned long gr6; | ||
98 | unsigned long gr7; /* syscall number */ | ||
99 | unsigned long gr8; /* 1st syscall param; syscall return */ | ||
100 | unsigned long gr9; /* 2nd syscall param */ | ||
101 | unsigned long gr10; /* 3rd syscall param */ | ||
102 | unsigned long gr11; /* 4th syscall param */ | ||
103 | unsigned long gr12; /* 5th syscall param */ | ||
104 | unsigned long gr13; /* 6th syscall param */ | ||
105 | unsigned long gr14; | ||
106 | unsigned long gr15; | ||
107 | unsigned long gr16; /* GP pointer */ | ||
108 | unsigned long gr17; /* small data */ | ||
109 | unsigned long gr18; /* PIC/PID */ | ||
110 | unsigned long gr19; | ||
111 | unsigned long gr20; | ||
112 | unsigned long gr21; | ||
113 | unsigned long gr22; | ||
114 | unsigned long gr23; | ||
115 | unsigned long gr24; | ||
116 | unsigned long gr25; | ||
117 | unsigned long gr26; | ||
118 | unsigned long gr27; | ||
119 | struct pt_regs *next_frame; /* GR28 - next exception frame */ | ||
120 | unsigned long gr29; /* GR29 - OS reserved */ | ||
121 | unsigned long gr30; /* GR30 - OS reserved */ | ||
122 | unsigned long gr31; /* GR31 - OS reserved */ | ||
123 | } __attribute__((aligned(8))); | ||
124 | |||
125 | #endif | ||
126 | |||
127 | #define REG__STATUS_STEP 0x00000001 /* - reenable single stepping on return */ | ||
128 | #define REG__STATUS_STEPPED 0x00000002 /* - single step caused exception */ | ||
129 | #define REG__STATUS_BROKE 0x00000004 /* - BREAK insn caused exception */ | ||
130 | #define REG__STATUS_SYSC_ENTRY 0x40000000 /* - T on syscall entry (ptrace.c only) */ | ||
131 | #define REG__STATUS_SYSC_EXIT 0x80000000 /* - T on syscall exit (ptrace.c only) */ | ||
132 | |||
133 | #define REG_GR(R) __OFFSET(REG_GR0, (R)) | ||
134 | |||
135 | #define REG_SP REG_GR(1) | ||
136 | #define REG_FP REG_GR(2) | ||
137 | #define REG_PREV_FRAME REG_GR(28) /* previous exception frame pointer (old gr28 value) */ | ||
138 | #define REG_CURR_TASK REG_GR(29) /* current task */ | ||
139 | |||
140 | /*****************************************************************************/ | ||
141 | /* | ||
142 | * debugging registers | ||
143 | */ | ||
144 | #ifndef __ASSEMBLY__ | ||
145 | |||
146 | struct frv_debug_regs | ||
147 | { | ||
148 | unsigned long dcr; | ||
149 | unsigned long ibar[4] __attribute__((aligned(8))); | ||
150 | unsigned long dbar[4] __attribute__((aligned(8))); | ||
151 | unsigned long dbdr[4][4] __attribute__((aligned(8))); | ||
152 | unsigned long dbmr[4][4] __attribute__((aligned(8))); | ||
153 | } __attribute__((aligned(8))); | ||
154 | |||
155 | #endif | ||
156 | |||
157 | /*****************************************************************************/ | ||
158 | /* | ||
159 | * userspace registers | ||
160 | */ | ||
161 | #ifndef __ASSEMBLY__ | ||
162 | |||
163 | struct user_int_regs | ||
164 | { | ||
165 | /* integer registers | ||
166 | * - up to gr[31] mirror pt_regs | ||
167 | * - total size must be multiple of 8 bytes | ||
168 | */ | ||
169 | unsigned long psr; /* Processor Status Register */ | ||
170 | unsigned long isr; /* Integer Status Register */ | ||
171 | unsigned long ccr; /* Condition Code Register */ | ||
172 | unsigned long cccr; /* Condition Code for Conditional Insns Register */ | ||
173 | unsigned long lr; /* Link Register */ | ||
174 | unsigned long lcr; /* Loop Count Register */ | ||
175 | unsigned long pc; /* Program Counter Register */ | ||
176 | unsigned long __status; /* exception status */ | ||
177 | unsigned long syscallno; /* syscall number or -1 */ | ||
178 | unsigned long orig_gr8; /* original syscall arg #1 */ | ||
179 | unsigned long gner[2]; | ||
180 | unsigned long long iacc[1]; | ||
181 | |||
182 | union { | ||
183 | unsigned long tbr; | ||
184 | unsigned long gr[64]; | ||
185 | }; | ||
186 | }; | ||
187 | |||
188 | struct user_fpmedia_regs | ||
189 | { | ||
190 | /* FP/Media registers */ | ||
191 | unsigned long fr[64]; | ||
192 | unsigned long fner[2]; | ||
193 | unsigned long msr[2]; | ||
194 | unsigned long acc[8]; | ||
195 | unsigned char accg[8]; | ||
196 | unsigned long fsr[1]; | ||
197 | }; | ||
198 | |||
199 | struct user_context | ||
200 | { | ||
201 | struct user_int_regs i; | ||
202 | struct user_fpmedia_regs f; | ||
203 | |||
204 | /* we provide a context extension so that we can save the regs for CPUs that | ||
205 | * implement many more of Fujitsu's lavish register spec | ||
206 | */ | ||
207 | void *extension; | ||
208 | } __attribute__((aligned(8))); | ||
209 | |||
210 | struct frv_frame0 { | ||
211 | union { | ||
212 | struct pt_regs regs; | ||
213 | struct user_context uc; | ||
214 | }; | ||
215 | |||
216 | struct frv_debug_regs debug; | ||
217 | |||
218 | } __attribute__((aligned(32))); | ||
219 | |||
220 | #endif | ||
221 | |||
222 | #define __INT_GR(R) __OFFSET(__INT_GR0, (R)) | ||
223 | |||
224 | #define __FPMEDIA_FR(R) __OFFSET(__FPMEDIA_FR0, (R)) | ||
225 | #define __FPMEDIA_FNER(R) __OFFSET(__FPMEDIA_FNER0, (R)) | ||
226 | #define __FPMEDIA_MSR(R) __OFFSET(__FPMEDIA_MSR0, (R)) | ||
227 | #define __FPMEDIA_ACC(R) __OFFSET(__FPMEDIA_ACC0, (R)) | ||
228 | #define __FPMEDIA_ACCG(R) __OFFSETC(__FPMEDIA_ACCG0, (R)) | ||
229 | #define __FPMEDIA_FSR(R) __OFFSET(__FPMEDIA_FSR0, (R)) | ||
230 | |||
231 | #define __THREAD_GR(R) __OFFSET(__THREAD_GR16, (R) - 16) | ||
232 | |||
233 | #endif /* _ASM_REGISTERS_H */ | ||
diff --git a/arch/frv/include/uapi/asm/resource.h b/arch/frv/include/uapi/asm/resource.h deleted file mode 100644 index 2100305f9b3e..000000000000 --- a/arch/frv/include/uapi/asm/resource.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_RESOURCE_H | ||
3 | #define _ASM_RESOURCE_H | ||
4 | |||
5 | #include <asm-generic/resource.h> | ||
6 | |||
7 | #endif /* _ASM_RESOURCE_H */ | ||
8 | |||
diff --git a/arch/frv/include/uapi/asm/sembuf.h b/arch/frv/include/uapi/asm/sembuf.h deleted file mode 100644 index d5477f95832b..000000000000 --- a/arch/frv/include/uapi/asm/sembuf.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_SEMBUF_H | ||
3 | #define _ASM_SEMBUF_H | ||
4 | |||
5 | /* | ||
6 | * The semid64_ds structure for FR-V architecture. | ||
7 | * Note extra padding because this structure is passed back and forth | ||
8 | * between kernel and user space. | ||
9 | * | ||
10 | * Pad space is left for: | ||
11 | * - 64-bit time_t to solve y2038 problem | ||
12 | * - 2 miscellaneous 32-bit values | ||
13 | */ | ||
14 | |||
15 | struct semid64_ds { | ||
16 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
17 | __kernel_time_t sem_otime; /* last semop time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t sem_ctime; /* last change time */ | ||
20 | unsigned long __unused2; | ||
21 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
22 | unsigned long __unused3; | ||
23 | unsigned long __unused4; | ||
24 | }; | ||
25 | |||
26 | #endif /* _ASM_SEMBUF_H */ | ||
27 | |||
diff --git a/arch/frv/include/uapi/asm/setup.h b/arch/frv/include/uapi/asm/setup.h deleted file mode 100644 index f54957047900..000000000000 --- a/arch/frv/include/uapi/asm/setup.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ | ||
2 | /* setup.h: setup stuff | ||
3 | * | ||
4 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
5 | * Written by David Howells (dhowells@redhat.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef _UAPI_ASM_SETUP_H | ||
14 | #define _UAPI_ASM_SETUP_H | ||
15 | |||
16 | #define COMMAND_LINE_SIZE 512 | ||
17 | |||
18 | |||
19 | #endif /* _UAPI_ASM_SETUP_H */ | ||
diff --git a/arch/frv/include/uapi/asm/shmbuf.h b/arch/frv/include/uapi/asm/shmbuf.h deleted file mode 100644 index 1de8f892e412..000000000000 --- a/arch/frv/include/uapi/asm/shmbuf.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_SHMBUF_H | ||
3 | #define _ASM_SHMBUF_H | ||
4 | |||
5 | /* | ||
6 | * The shmid64_ds structure for FR-V architecture. | ||
7 | * Note extra padding because this structure is passed back and forth | ||
8 | * between kernel and user space. | ||
9 | * | ||
10 | * Pad space is left for: | ||
11 | * - 64-bit time_t to solve y2038 problem | ||
12 | * - 2 miscellaneous 32-bit values | ||
13 | */ | ||
14 | |||
15 | struct shmid64_ds { | ||
16 | struct ipc64_perm shm_perm; /* operation perms */ | ||
17 | size_t shm_segsz; /* size of segment (bytes) */ | ||
18 | __kernel_time_t shm_atime; /* last attach time */ | ||
19 | unsigned long __unused1; | ||
20 | __kernel_time_t shm_dtime; /* last detach time */ | ||
21 | unsigned long __unused2; | ||
22 | __kernel_time_t shm_ctime; /* last change time */ | ||
23 | unsigned long __unused3; | ||
24 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
25 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
26 | unsigned long shm_nattch; /* no. of current attaches */ | ||
27 | unsigned long __unused4; | ||
28 | unsigned long __unused5; | ||
29 | }; | ||
30 | |||
31 | struct shminfo64 { | ||
32 | unsigned long shmmax; | ||
33 | unsigned long shmmin; | ||
34 | unsigned long shmmni; | ||
35 | unsigned long shmseg; | ||
36 | unsigned long shmall; | ||
37 | unsigned long __unused1; | ||
38 | unsigned long __unused2; | ||
39 | unsigned long __unused3; | ||
40 | unsigned long __unused4; | ||
41 | }; | ||
42 | |||
43 | #endif /* _ASM_SHMBUF_H */ | ||
44 | |||
diff --git a/arch/frv/include/uapi/asm/sigcontext.h b/arch/frv/include/uapi/asm/sigcontext.h deleted file mode 100644 index 8fbb0b00afdd..000000000000 --- a/arch/frv/include/uapi/asm/sigcontext.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ | ||
2 | /* sigcontext.h: FRV signal context | ||
3 | * | ||
4 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
5 | * Written by David Howells (dhowells@redhat.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #ifndef _ASM_SIGCONTEXT_H | ||
13 | #define _ASM_SIGCONTEXT_H | ||
14 | |||
15 | #include <asm/registers.h> | ||
16 | |||
17 | /* | ||
18 | * Signal context structure - contains all info to do with the state | ||
19 | * before the signal handler was invoked. Note: only add new entries | ||
20 | * to the end of the structure. | ||
21 | */ | ||
22 | struct sigcontext { | ||
23 | struct user_context sc_context; | ||
24 | unsigned long sc_oldmask; /* old sigmask */ | ||
25 | } __attribute__((aligned(8))); | ||
26 | |||
27 | #endif | ||
diff --git a/arch/frv/include/uapi/asm/signal.h b/arch/frv/include/uapi/asm/signal.h deleted file mode 100644 index 603bb796cf46..000000000000 --- a/arch/frv/include/uapi/asm/signal.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _UAPI_ASM_SIGNAL_H | ||
3 | #define _UAPI_ASM_SIGNAL_H | ||
4 | |||
5 | #include <linux/types.h> | ||
6 | |||
7 | #ifndef __KERNEL__ | ||
8 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
9 | |||
10 | #define NSIG 32 | ||
11 | typedef unsigned long sigset_t; | ||
12 | |||
13 | #endif /* !__KERNEL__ */ | ||
14 | |||
15 | #define SA_RESTORER 0x04000000 /* to get struct sigaction correct */ | ||
16 | |||
17 | #include <asm-generic/signal.h> | ||
18 | |||
19 | #ifndef __KERNEL__ | ||
20 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
21 | |||
22 | struct sigaction { | ||
23 | union { | ||
24 | __sighandler_t _sa_handler; | ||
25 | void (*_sa_sigaction)(int, struct siginfo *, void *); | ||
26 | } _u; | ||
27 | sigset_t sa_mask; | ||
28 | unsigned long sa_flags; | ||
29 | void (*sa_restorer)(void); | ||
30 | }; | ||
31 | |||
32 | #define sa_handler _u._sa_handler | ||
33 | #define sa_sigaction _u._sa_sigaction | ||
34 | |||
35 | #endif /* __KERNEL__ */ | ||
36 | |||
37 | #endif /* _UAPI_ASM_SIGNAL_H */ | ||
diff --git a/arch/frv/include/uapi/asm/socket.h b/arch/frv/include/uapi/asm/socket.h deleted file mode 100644 index 9168e78fa32a..000000000000 --- a/arch/frv/include/uapi/asm/socket.h +++ /dev/null | |||
@@ -1,109 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_SOCKET_H | ||
3 | #define _ASM_SOCKET_H | ||
4 | |||
5 | #include <asm/sockios.h> | ||
6 | |||
7 | /* For setsockopt(2) */ | ||
8 | #define SOL_SOCKET 1 | ||
9 | |||
10 | #define SO_DEBUG 1 | ||
11 | #define SO_REUSEADDR 2 | ||
12 | #define SO_TYPE 3 | ||
13 | #define SO_ERROR 4 | ||
14 | #define SO_DONTROUTE 5 | ||
15 | #define SO_BROADCAST 6 | ||
16 | #define SO_SNDBUF 7 | ||
17 | #define SO_RCVBUF 8 | ||
18 | #define SO_SNDBUFFORCE 32 | ||
19 | #define SO_RCVBUFFORCE 33 | ||
20 | #define SO_KEEPALIVE 9 | ||
21 | #define SO_OOBINLINE 10 | ||
22 | #define SO_NO_CHECK 11 | ||
23 | #define SO_PRIORITY 12 | ||
24 | #define SO_LINGER 13 | ||
25 | #define SO_BSDCOMPAT 14 | ||
26 | #define SO_REUSEPORT 15 | ||
27 | #define SO_PASSCRED 16 | ||
28 | #define SO_PEERCRED 17 | ||
29 | #define SO_RCVLOWAT 18 | ||
30 | #define SO_SNDLOWAT 19 | ||
31 | #define SO_RCVTIMEO 20 | ||
32 | #define SO_SNDTIMEO 21 | ||
33 | |||
34 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
35 | #define SO_SECURITY_AUTHENTICATION 22 | ||
36 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 23 | ||
37 | #define SO_SECURITY_ENCRYPTION_NETWORK 24 | ||
38 | |||
39 | #define SO_BINDTODEVICE 25 | ||
40 | |||
41 | /* Socket filtering */ | ||
42 | #define SO_ATTACH_FILTER 26 | ||
43 | #define SO_DETACH_FILTER 27 | ||
44 | #define SO_GET_FILTER SO_ATTACH_FILTER | ||
45 | |||
46 | #define SO_PEERNAME 28 | ||
47 | #define SO_TIMESTAMP 29 | ||
48 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
49 | |||
50 | #define SO_ACCEPTCONN 30 | ||
51 | |||
52 | #define SO_PEERSEC 31 | ||
53 | #define SO_PASSSEC 34 | ||
54 | #define SO_TIMESTAMPNS 35 | ||
55 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
56 | |||
57 | #define SO_MARK 36 | ||
58 | |||
59 | #define SO_TIMESTAMPING 37 | ||
60 | #define SCM_TIMESTAMPING SO_TIMESTAMPING | ||
61 | |||
62 | #define SO_PROTOCOL 38 | ||
63 | #define SO_DOMAIN 39 | ||
64 | |||
65 | #define SO_RXQ_OVFL 40 | ||
66 | |||
67 | #define SO_WIFI_STATUS 41 | ||
68 | #define SCM_WIFI_STATUS SO_WIFI_STATUS | ||
69 | #define SO_PEEK_OFF 42 | ||
70 | |||
71 | /* Instruct lower device to use last 4-bytes of skb data as FCS */ | ||
72 | #define SO_NOFCS 43 | ||
73 | |||
74 | #define SO_LOCK_FILTER 44 | ||
75 | |||
76 | #define SO_SELECT_ERR_QUEUE 45 | ||
77 | |||
78 | #define SO_BUSY_POLL 46 | ||
79 | |||
80 | #define SO_MAX_PACING_RATE 47 | ||
81 | |||
82 | #define SO_BPF_EXTENSIONS 48 | ||
83 | |||
84 | #define SO_INCOMING_CPU 49 | ||
85 | |||
86 | #define SO_ATTACH_BPF 50 | ||
87 | #define SO_DETACH_BPF SO_DETACH_FILTER | ||
88 | |||
89 | #define SO_ATTACH_REUSEPORT_CBPF 51 | ||
90 | #define SO_ATTACH_REUSEPORT_EBPF 52 | ||
91 | |||
92 | #define SO_CNX_ADVICE 53 | ||
93 | |||
94 | #define SCM_TIMESTAMPING_OPT_STATS 54 | ||
95 | |||
96 | #define SO_MEMINFO 55 | ||
97 | |||
98 | #define SO_INCOMING_NAPI_ID 56 | ||
99 | |||
100 | #define SO_COOKIE 57 | ||
101 | |||
102 | #define SCM_TIMESTAMPING_PKTINFO 58 | ||
103 | |||
104 | #define SO_PEERGROUPS 59 | ||
105 | |||
106 | #define SO_ZEROCOPY 60 | ||
107 | |||
108 | #endif /* _ASM_SOCKET_H */ | ||
109 | |||
diff --git a/arch/frv/include/uapi/asm/sockios.h b/arch/frv/include/uapi/asm/sockios.h deleted file mode 100644 index 2f62caf1ce84..000000000000 --- a/arch/frv/include/uapi/asm/sockios.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_SOCKIOS__ | ||
3 | #define _ASM_SOCKIOS__ | ||
4 | |||
5 | /* Socket-level I/O control calls. */ | ||
6 | #define FIOSETOWN 0x8901 | ||
7 | #define SIOCSPGRP 0x8902 | ||
8 | #define FIOGETOWN 0x8903 | ||
9 | #define SIOCGPGRP 0x8904 | ||
10 | #define SIOCATMARK 0x8905 | ||
11 | #define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ | ||
12 | #define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ | ||
13 | |||
14 | #endif /* _ASM_SOCKIOS__ */ | ||
15 | |||
diff --git a/arch/frv/include/uapi/asm/stat.h b/arch/frv/include/uapi/asm/stat.h deleted file mode 100644 index 0ff9fab915a4..000000000000 --- a/arch/frv/include/uapi/asm/stat.h +++ /dev/null | |||
@@ -1,101 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_STAT_H | ||
3 | #define _ASM_STAT_H | ||
4 | |||
5 | struct __old_kernel_stat { | ||
6 | unsigned short st_dev; | ||
7 | unsigned short st_ino; | ||
8 | unsigned short st_mode; | ||
9 | unsigned short st_nlink; | ||
10 | unsigned short st_uid; | ||
11 | unsigned short st_gid; | ||
12 | unsigned short st_rdev; | ||
13 | unsigned long st_size; | ||
14 | unsigned long st_atime; | ||
15 | unsigned long st_mtime; | ||
16 | unsigned long st_ctime; | ||
17 | }; | ||
18 | |||
19 | /* This matches struct stat in uClibc/glibc. */ | ||
20 | struct stat { | ||
21 | unsigned char __pad1[6]; | ||
22 | unsigned short st_dev; | ||
23 | |||
24 | unsigned long __pad2; | ||
25 | unsigned long st_ino; | ||
26 | |||
27 | unsigned short __pad3; | ||
28 | unsigned short st_mode; | ||
29 | unsigned short __pad4; | ||
30 | unsigned short st_nlink; | ||
31 | |||
32 | unsigned short __pad5; | ||
33 | unsigned short st_uid; | ||
34 | unsigned short __pad6; | ||
35 | unsigned short st_gid; | ||
36 | |||
37 | unsigned char __pad7[6]; | ||
38 | unsigned short st_rdev; | ||
39 | |||
40 | unsigned long __pad8; | ||
41 | unsigned long st_size; | ||
42 | |||
43 | unsigned long __pad9; /* align 64-bit st_blocks to 2-word */ | ||
44 | unsigned long st_blksize; | ||
45 | |||
46 | unsigned long __pad10; /* future possible st_blocks high bits */ | ||
47 | unsigned long st_blocks; /* Number 512-byte blocks allocated. */ | ||
48 | |||
49 | unsigned long __unused1; | ||
50 | unsigned long st_atime; | ||
51 | |||
52 | unsigned long __unused2; | ||
53 | unsigned long st_mtime; | ||
54 | |||
55 | unsigned long __unused3; | ||
56 | unsigned long st_ctime; | ||
57 | |||
58 | unsigned long long __unused4; | ||
59 | }; | ||
60 | |||
61 | /* This matches struct stat64 in uClibc/glibc. The layout is exactly | ||
62 | the same as that of struct stat above, with 64-bit types taking up | ||
63 | space that was formerly used by padding. stat syscalls are still | ||
64 | different from stat64, though, in that the former tests for | ||
65 | overflow. */ | ||
66 | struct stat64 { | ||
67 | unsigned char __pad1[6]; | ||
68 | unsigned short st_dev; | ||
69 | |||
70 | unsigned long long st_ino; | ||
71 | |||
72 | unsigned int st_mode; | ||
73 | unsigned int st_nlink; | ||
74 | |||
75 | unsigned long st_uid; | ||
76 | unsigned long st_gid; | ||
77 | |||
78 | unsigned char __pad2[6]; | ||
79 | unsigned short st_rdev; | ||
80 | |||
81 | long long st_size; | ||
82 | |||
83 | unsigned long __pad3; /* align 64-bit st_blocks to 2-word */ | ||
84 | unsigned long st_blksize; | ||
85 | |||
86 | unsigned long __pad4; /* future possible st_blocks high bits */ | ||
87 | unsigned long st_blocks; /* Number 512-byte blocks allocated. */ | ||
88 | |||
89 | unsigned long st_atime_nsec; | ||
90 | unsigned long st_atime; | ||
91 | |||
92 | unsigned int st_mtime_nsec; | ||
93 | unsigned long st_mtime; | ||
94 | |||
95 | unsigned long st_ctime_nsec; | ||
96 | unsigned long st_ctime; | ||
97 | |||
98 | unsigned long long __unused4; | ||
99 | }; | ||
100 | |||
101 | #endif /* _ASM_STAT_H */ | ||
diff --git a/arch/frv/include/uapi/asm/statfs.h b/arch/frv/include/uapi/asm/statfs.h deleted file mode 100644 index 2a378cbff07f..000000000000 --- a/arch/frv/include/uapi/asm/statfs.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_STATFS_H | ||
3 | #define _ASM_STATFS_H | ||
4 | |||
5 | #include <asm-generic/statfs.h> | ||
6 | |||
7 | #endif /* _ASM_STATFS_H */ | ||
8 | |||
diff --git a/arch/frv/include/uapi/asm/swab.h b/arch/frv/include/uapi/asm/swab.h deleted file mode 100644 index c78257d172e5..000000000000 --- a/arch/frv/include/uapi/asm/swab.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_SWAB_H | ||
3 | #define _ASM_SWAB_H | ||
4 | |||
5 | #include <linux/types.h> | ||
6 | |||
7 | #if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
8 | # define __SWAB_64_THRU_32__ | ||
9 | #endif | ||
10 | |||
11 | #endif /* _ASM_SWAB_H */ | ||
diff --git a/arch/frv/include/uapi/asm/termbits.h b/arch/frv/include/uapi/asm/termbits.h deleted file mode 100644 index b1dcd8d0ff78..000000000000 --- a/arch/frv/include/uapi/asm/termbits.h +++ /dev/null | |||
@@ -1,204 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_TERMBITS_H__ | ||
3 | #define _ASM_TERMBITS_H__ | ||
4 | |||
5 | #include <linux/posix_types.h> | ||
6 | |||
7 | typedef unsigned char cc_t; | ||
8 | typedef unsigned int speed_t; | ||
9 | typedef unsigned int tcflag_t; | ||
10 | |||
11 | #define NCCS 19 | ||
12 | struct termios { | ||
13 | tcflag_t c_iflag; /* input mode flags */ | ||
14 | tcflag_t c_oflag; /* output mode flags */ | ||
15 | tcflag_t c_cflag; /* control mode flags */ | ||
16 | tcflag_t c_lflag; /* local mode flags */ | ||
17 | cc_t c_line; /* line discipline */ | ||
18 | cc_t c_cc[NCCS]; /* control characters */ | ||
19 | }; | ||
20 | |||
21 | struct termios2 { | ||
22 | tcflag_t c_iflag; /* input mode flags */ | ||
23 | tcflag_t c_oflag; /* output mode flags */ | ||
24 | tcflag_t c_cflag; /* control mode flags */ | ||
25 | tcflag_t c_lflag; /* local mode flags */ | ||
26 | cc_t c_line; /* line discipline */ | ||
27 | cc_t c_cc[NCCS]; /* control characters */ | ||
28 | speed_t c_ispeed; /* input speed */ | ||
29 | speed_t c_ospeed; /* output speed */ | ||
30 | }; | ||
31 | |||
32 | struct ktermios { | ||
33 | tcflag_t c_iflag; /* input mode flags */ | ||
34 | tcflag_t c_oflag; /* output mode flags */ | ||
35 | tcflag_t c_cflag; /* control mode flags */ | ||
36 | tcflag_t c_lflag; /* local mode flags */ | ||
37 | cc_t c_line; /* line discipline */ | ||
38 | cc_t c_cc[NCCS]; /* control characters */ | ||
39 | speed_t c_ispeed; /* input speed */ | ||
40 | speed_t c_ospeed; /* output speed */ | ||
41 | }; | ||
42 | |||
43 | /* c_cc characters */ | ||
44 | #define VINTR 0 | ||
45 | #define VQUIT 1 | ||
46 | #define VERASE 2 | ||
47 | #define VKILL 3 | ||
48 | #define VEOF 4 | ||
49 | #define VTIME 5 | ||
50 | #define VMIN 6 | ||
51 | #define VSWTC 7 | ||
52 | #define VSTART 8 | ||
53 | #define VSTOP 9 | ||
54 | #define VSUSP 10 | ||
55 | #define VEOL 11 | ||
56 | #define VREPRINT 12 | ||
57 | #define VDISCARD 13 | ||
58 | #define VWERASE 14 | ||
59 | #define VLNEXT 15 | ||
60 | #define VEOL2 16 | ||
61 | |||
62 | |||
63 | /* c_iflag bits */ | ||
64 | #define IGNBRK 0000001 | ||
65 | #define BRKINT 0000002 | ||
66 | #define IGNPAR 0000004 | ||
67 | #define PARMRK 0000010 | ||
68 | #define INPCK 0000020 | ||
69 | #define ISTRIP 0000040 | ||
70 | #define INLCR 0000100 | ||
71 | #define IGNCR 0000200 | ||
72 | #define ICRNL 0000400 | ||
73 | #define IUCLC 0001000 | ||
74 | #define IXON 0002000 | ||
75 | #define IXANY 0004000 | ||
76 | #define IXOFF 0010000 | ||
77 | #define IMAXBEL 0020000 | ||
78 | #define IUTF8 0040000 | ||
79 | |||
80 | /* c_oflag bits */ | ||
81 | #define OPOST 0000001 | ||
82 | #define OLCUC 0000002 | ||
83 | #define ONLCR 0000004 | ||
84 | #define OCRNL 0000010 | ||
85 | #define ONOCR 0000020 | ||
86 | #define ONLRET 0000040 | ||
87 | #define OFILL 0000100 | ||
88 | #define OFDEL 0000200 | ||
89 | #define NLDLY 0000400 | ||
90 | #define NL0 0000000 | ||
91 | #define NL1 0000400 | ||
92 | #define CRDLY 0003000 | ||
93 | #define CR0 0000000 | ||
94 | #define CR1 0001000 | ||
95 | #define CR2 0002000 | ||
96 | #define CR3 0003000 | ||
97 | #define TABDLY 0014000 | ||
98 | #define TAB0 0000000 | ||
99 | #define TAB1 0004000 | ||
100 | #define TAB2 0010000 | ||
101 | #define TAB3 0014000 | ||
102 | #define XTABS 0014000 | ||
103 | #define BSDLY 0020000 | ||
104 | #define BS0 0000000 | ||
105 | #define BS1 0020000 | ||
106 | #define VTDLY 0040000 | ||
107 | #define VT0 0000000 | ||
108 | #define VT1 0040000 | ||
109 | #define FFDLY 0100000 | ||
110 | #define FF0 0000000 | ||
111 | #define FF1 0100000 | ||
112 | |||
113 | /* c_cflag bit meaning */ | ||
114 | #define CBAUD 0010017 | ||
115 | #define B0 0000000 /* hang up */ | ||
116 | #define B50 0000001 | ||
117 | #define B75 0000002 | ||
118 | #define B110 0000003 | ||
119 | #define B134 0000004 | ||
120 | #define B150 0000005 | ||
121 | #define B200 0000006 | ||
122 | #define B300 0000007 | ||
123 | #define B600 0000010 | ||
124 | #define B1200 0000011 | ||
125 | #define B1800 0000012 | ||
126 | #define B2400 0000013 | ||
127 | #define B4800 0000014 | ||
128 | #define B9600 0000015 | ||
129 | #define B19200 0000016 | ||
130 | #define B38400 0000017 | ||
131 | #define EXTA B19200 | ||
132 | #define EXTB B38400 | ||
133 | #define CSIZE 0000060 | ||
134 | #define CS5 0000000 | ||
135 | #define CS6 0000020 | ||
136 | #define CS7 0000040 | ||
137 | #define CS8 0000060 | ||
138 | #define CSTOPB 0000100 | ||
139 | #define CREAD 0000200 | ||
140 | #define PARENB 0000400 | ||
141 | #define PARODD 0001000 | ||
142 | #define HUPCL 0002000 | ||
143 | #define CLOCAL 0004000 | ||
144 | #define CBAUDEX 0010000 | ||
145 | #define BOTHER 0010000 | ||
146 | #define B57600 0010001 | ||
147 | #define B115200 0010002 | ||
148 | #define B230400 0010003 | ||
149 | #define B460800 0010004 | ||
150 | #define B500000 0010005 | ||
151 | #define B576000 0010006 | ||
152 | #define B921600 0010007 | ||
153 | #define B1000000 0010010 | ||
154 | #define B1152000 0010011 | ||
155 | #define B1500000 0010012 | ||
156 | #define B2000000 0010013 | ||
157 | #define B2500000 0010014 | ||
158 | #define B3000000 0010015 | ||
159 | #define B3500000 0010016 | ||
160 | #define B4000000 0010017 | ||
161 | #define CIBAUD 002003600000 /* Input baud rate */ | ||
162 | #define CTVB 004000000000 /* VisioBraille Terminal flow control */ | ||
163 | #define CMSPAR 010000000000 /* mark or space (stick) parity */ | ||
164 | #define CRTSCTS 020000000000 /* flow control */ | ||
165 | |||
166 | #define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ | ||
167 | |||
168 | /* c_lflag bits */ | ||
169 | #define ISIG 0000001 | ||
170 | #define ICANON 0000002 | ||
171 | #define XCASE 0000004 | ||
172 | #define ECHO 0000010 | ||
173 | #define ECHOE 0000020 | ||
174 | #define ECHOK 0000040 | ||
175 | #define ECHONL 0000100 | ||
176 | #define NOFLSH 0000200 | ||
177 | #define TOSTOP 0000400 | ||
178 | #define ECHOCTL 0001000 | ||
179 | #define ECHOPRT 0002000 | ||
180 | #define ECHOKE 0004000 | ||
181 | #define FLUSHO 0010000 | ||
182 | #define PENDIN 0040000 | ||
183 | #define IEXTEN 0100000 | ||
184 | #define EXTPROC 0200000 | ||
185 | |||
186 | |||
187 | /* tcflow() and TCXONC use these */ | ||
188 | #define TCOOFF 0 | ||
189 | #define TCOON 1 | ||
190 | #define TCIOFF 2 | ||
191 | #define TCION 3 | ||
192 | |||
193 | /* tcflush() and TCFLSH use these */ | ||
194 | #define TCIFLUSH 0 | ||
195 | #define TCOFLUSH 1 | ||
196 | #define TCIOFLUSH 2 | ||
197 | |||
198 | /* tcsetattr uses these */ | ||
199 | #define TCSANOW 0 | ||
200 | #define TCSADRAIN 1 | ||
201 | #define TCSAFLUSH 2 | ||
202 | |||
203 | #endif /* _ASM_TERMBITS_H__ */ | ||
204 | |||
diff --git a/arch/frv/include/uapi/asm/termios.h b/arch/frv/include/uapi/asm/termios.h deleted file mode 100644 index ae35bedae6a2..000000000000 --- a/arch/frv/include/uapi/asm/termios.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _UAPI_ASM_TERMIOS_H | ||
3 | #define _UAPI_ASM_TERMIOS_H | ||
4 | |||
5 | #include <asm/termbits.h> | ||
6 | #include <asm/ioctls.h> | ||
7 | |||
8 | struct winsize { | ||
9 | unsigned short ws_row; | ||
10 | unsigned short ws_col; | ||
11 | unsigned short ws_xpixel; | ||
12 | unsigned short ws_ypixel; | ||
13 | }; | ||
14 | |||
15 | #define NCC 8 | ||
16 | struct termio { | ||
17 | unsigned short c_iflag; /* input mode flags */ | ||
18 | unsigned short c_oflag; /* output mode flags */ | ||
19 | unsigned short c_cflag; /* control mode flags */ | ||
20 | unsigned short c_lflag; /* local mode flags */ | ||
21 | unsigned char c_line; /* line discipline */ | ||
22 | unsigned char c_cc[NCC]; /* control characters */ | ||
23 | }; | ||
24 | |||
25 | |||
26 | /* modem lines */ | ||
27 | #define TIOCM_LE 0x001 | ||
28 | #define TIOCM_DTR 0x002 | ||
29 | #define TIOCM_RTS 0x004 | ||
30 | #define TIOCM_ST 0x008 | ||
31 | #define TIOCM_SR 0x010 | ||
32 | #define TIOCM_CTS 0x020 | ||
33 | #define TIOCM_CAR 0x040 | ||
34 | #define TIOCM_RNG 0x080 | ||
35 | #define TIOCM_DSR 0x100 | ||
36 | #define TIOCM_CD TIOCM_CAR | ||
37 | #define TIOCM_RI TIOCM_RNG | ||
38 | #define TIOCM_OUT1 0x2000 | ||
39 | #define TIOCM_OUT2 0x4000 | ||
40 | #define TIOCM_LOOP 0x8000 | ||
41 | |||
42 | #define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */ | ||
43 | |||
44 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
45 | |||
46 | |||
47 | #endif /* _UAPI_ASM_TERMIOS_H */ | ||
diff --git a/arch/frv/include/uapi/asm/types.h b/arch/frv/include/uapi/asm/types.h deleted file mode 100644 index db74ad9ba6c0..000000000000 --- a/arch/frv/include/uapi/asm/types.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ | ||
2 | /* types.h: FRV types | ||
3 | * | ||
4 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
5 | * Written by David Howells (dhowells@redhat.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #include <asm-generic/int-ll64.h> | ||
diff --git a/arch/frv/include/uapi/asm/unistd.h b/arch/frv/include/uapi/asm/unistd.h deleted file mode 100644 index 4b46acaf832b..000000000000 --- a/arch/frv/include/uapi/asm/unistd.h +++ /dev/null | |||
@@ -1,349 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _UAPI_ASM_UNISTD_H_ | ||
3 | #define _UAPI_ASM_UNISTD_H_ | ||
4 | |||
5 | /* | ||
6 | * This file contains the system call numbers. | ||
7 | */ | ||
8 | |||
9 | #define __NR_restart_syscall 0 | ||
10 | #define __NR_exit 1 | ||
11 | #define __NR_fork 2 | ||
12 | #define __NR_read 3 | ||
13 | #define __NR_write 4 | ||
14 | #define __NR_open 5 | ||
15 | #define __NR_close 6 | ||
16 | #define __NR_waitpid 7 | ||
17 | #define __NR_creat 8 | ||
18 | #define __NR_link 9 | ||
19 | #define __NR_unlink 10 | ||
20 | #define __NR_execve 11 | ||
21 | #define __NR_chdir 12 | ||
22 | #define __NR_time 13 | ||
23 | #define __NR_mknod 14 | ||
24 | #define __NR_chmod 15 | ||
25 | #define __NR_lchown 16 | ||
26 | #define __NR_break 17 | ||
27 | #define __NR_oldstat 18 | ||
28 | #define __NR_lseek 19 | ||
29 | #define __NR_getpid 20 | ||
30 | #define __NR_mount 21 | ||
31 | #define __NR_umount 22 | ||
32 | #define __NR_setuid 23 | ||
33 | #define __NR_getuid 24 | ||
34 | #define __NR_stime 25 | ||
35 | #define __NR_ptrace 26 | ||
36 | #define __NR_alarm 27 | ||
37 | #define __NR_oldfstat 28 | ||
38 | #define __NR_pause 29 | ||
39 | #define __NR_utime 30 | ||
40 | #define __NR_stty 31 | ||
41 | #define __NR_gtty 32 | ||
42 | #define __NR_access 33 | ||
43 | #define __NR_nice 34 | ||
44 | #define __NR_ftime 35 | ||
45 | #define __NR_sync 36 | ||
46 | #define __NR_kill 37 | ||
47 | #define __NR_rename 38 | ||
48 | #define __NR_mkdir 39 | ||
49 | #define __NR_rmdir 40 | ||
50 | #define __NR_dup 41 | ||
51 | #define __NR_pipe 42 | ||
52 | #define __NR_times 43 | ||
53 | #define __NR_prof 44 | ||
54 | #define __NR_brk 45 | ||
55 | #define __NR_setgid 46 | ||
56 | #define __NR_getgid 47 | ||
57 | #define __NR_signal 48 | ||
58 | #define __NR_geteuid 49 | ||
59 | #define __NR_getegid 50 | ||
60 | #define __NR_acct 51 | ||
61 | #define __NR_umount2 52 | ||
62 | #define __NR_lock 53 | ||
63 | #define __NR_ioctl 54 | ||
64 | #define __NR_fcntl 55 | ||
65 | #define __NR_mpx 56 | ||
66 | #define __NR_setpgid 57 | ||
67 | #define __NR_ulimit 58 | ||
68 | // #define __NR_oldolduname /* 59 */ obsolete | ||
69 | #define __NR_umask 60 | ||
70 | #define __NR_chroot 61 | ||
71 | #define __NR_ustat 62 | ||
72 | #define __NR_dup2 63 | ||
73 | #define __NR_getppid 64 | ||
74 | #define __NR_getpgrp 65 | ||
75 | #define __NR_setsid 66 | ||
76 | #define __NR_sigaction 67 | ||
77 | #define __NR_sgetmask 68 | ||
78 | #define __NR_ssetmask 69 | ||
79 | #define __NR_setreuid 70 | ||
80 | #define __NR_setregid 71 | ||
81 | #define __NR_sigsuspend 72 | ||
82 | #define __NR_sigpending 73 | ||
83 | #define __NR_sethostname 74 | ||
84 | #define __NR_setrlimit 75 | ||
85 | #define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */ | ||
86 | #define __NR_getrusage 77 | ||
87 | #define __NR_gettimeofday 78 | ||
88 | #define __NR_settimeofday 79 | ||
89 | #define __NR_getgroups 80 | ||
90 | #define __NR_setgroups 81 | ||
91 | #define __NR_select 82 | ||
92 | #define __NR_symlink 83 | ||
93 | #define __NR_oldlstat 84 | ||
94 | #define __NR_readlink 85 | ||
95 | #define __NR_uselib 86 | ||
96 | #define __NR_swapon 87 | ||
97 | #define __NR_reboot 88 | ||
98 | #define __NR_readdir 89 | ||
99 | // #define __NR_mmap 90 /* obsolete - not implemented */ | ||
100 | #define __NR_munmap 91 | ||
101 | #define __NR_truncate 92 | ||
102 | #define __NR_ftruncate 93 | ||
103 | #define __NR_fchmod 94 | ||
104 | #define __NR_fchown 95 | ||
105 | #define __NR_getpriority 96 | ||
106 | #define __NR_setpriority 97 | ||
107 | // #define __NR_profil /* 98 */ obsolete | ||
108 | #define __NR_statfs 99 | ||
109 | #define __NR_fstatfs 100 | ||
110 | // #define __NR_ioperm /* 101 */ not supported | ||
111 | #define __NR_socketcall 102 | ||
112 | #define __NR_syslog 103 | ||
113 | #define __NR_setitimer 104 | ||
114 | #define __NR_getitimer 105 | ||
115 | #define __NR_stat 106 | ||
116 | #define __NR_lstat 107 | ||
117 | #define __NR_fstat 108 | ||
118 | // #define __NR_olduname /* 109 */ obsolete | ||
119 | // #define __NR_iopl /* 110 */ not supported | ||
120 | #define __NR_vhangup 111 | ||
121 | // #define __NR_idle /* 112 */ Obsolete | ||
122 | // #define __NR_vm86old /* 113 */ not supported | ||
123 | #define __NR_wait4 114 | ||
124 | #define __NR_swapoff 115 | ||
125 | #define __NR_sysinfo 116 | ||
126 | #define __NR_ipc 117 | ||
127 | #define __NR_fsync 118 | ||
128 | #define __NR_sigreturn 119 | ||
129 | #define __NR_clone 120 | ||
130 | #define __NR_setdomainname 121 | ||
131 | #define __NR_uname 122 | ||
132 | // #define __NR_modify_ldt /* 123 */ not supported | ||
133 | #define __NR_cacheflush 123 | ||
134 | #define __NR_adjtimex 124 | ||
135 | #define __NR_mprotect 125 | ||
136 | #define __NR_sigprocmask 126 | ||
137 | #define __NR_create_module 127 | ||
138 | #define __NR_init_module 128 | ||
139 | #define __NR_delete_module 129 | ||
140 | #define __NR_get_kernel_syms 130 | ||
141 | #define __NR_quotactl 131 | ||
142 | #define __NR_getpgid 132 | ||
143 | #define __NR_fchdir 133 | ||
144 | #define __NR_bdflush 134 | ||
145 | #define __NR_sysfs 135 | ||
146 | #define __NR_personality 136 | ||
147 | #define __NR_afs_syscall 137 /* Syscall for Andrew File System */ | ||
148 | #define __NR_setfsuid 138 | ||
149 | #define __NR_setfsgid 139 | ||
150 | #define __NR__llseek 140 | ||
151 | #define __NR_getdents 141 | ||
152 | #define __NR__newselect 142 | ||
153 | #define __NR_flock 143 | ||
154 | #define __NR_msync 144 | ||
155 | #define __NR_readv 145 | ||
156 | #define __NR_writev 146 | ||
157 | #define __NR_getsid 147 | ||
158 | #define __NR_fdatasync 148 | ||
159 | #define __NR__sysctl 149 | ||
160 | #define __NR_mlock 150 | ||
161 | #define __NR_munlock 151 | ||
162 | #define __NR_mlockall 152 | ||
163 | #define __NR_munlockall 153 | ||
164 | #define __NR_sched_setparam 154 | ||
165 | #define __NR_sched_getparam 155 | ||
166 | #define __NR_sched_setscheduler 156 | ||
167 | #define __NR_sched_getscheduler 157 | ||
168 | #define __NR_sched_yield 158 | ||
169 | #define __NR_sched_get_priority_max 159 | ||
170 | #define __NR_sched_get_priority_min 160 | ||
171 | #define __NR_sched_rr_get_interval 161 | ||
172 | #define __NR_nanosleep 162 | ||
173 | #define __NR_mremap 163 | ||
174 | #define __NR_setresuid 164 | ||
175 | #define __NR_getresuid 165 | ||
176 | // #define __NR_vm86 /* 166 */ not supported | ||
177 | #define __NR_query_module 167 | ||
178 | #define __NR_poll 168 | ||
179 | #define __NR_nfsservctl 169 | ||
180 | #define __NR_setresgid 170 | ||
181 | #define __NR_getresgid 171 | ||
182 | #define __NR_prctl 172 | ||
183 | #define __NR_rt_sigreturn 173 | ||
184 | #define __NR_rt_sigaction 174 | ||
185 | #define __NR_rt_sigprocmask 175 | ||
186 | #define __NR_rt_sigpending 176 | ||
187 | #define __NR_rt_sigtimedwait 177 | ||
188 | #define __NR_rt_sigqueueinfo 178 | ||
189 | #define __NR_rt_sigsuspend 179 | ||
190 | #define __NR_pread64 180 | ||
191 | #define __NR_pwrite64 181 | ||
192 | #define __NR_chown 182 | ||
193 | #define __NR_getcwd 183 | ||
194 | #define __NR_capget 184 | ||
195 | #define __NR_capset 185 | ||
196 | #define __NR_sigaltstack 186 | ||
197 | #define __NR_sendfile 187 | ||
198 | #define __NR_getpmsg 188 /* some people actually want streams */ | ||
199 | #define __NR_putpmsg 189 /* some people actually want streams */ | ||
200 | #define __NR_vfork 190 | ||
201 | #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ | ||
202 | #define __NR_mmap2 192 | ||
203 | #define __NR_truncate64 193 | ||
204 | #define __NR_ftruncate64 194 | ||
205 | #define __NR_stat64 195 | ||
206 | #define __NR_lstat64 196 | ||
207 | #define __NR_fstat64 197 | ||
208 | #define __NR_lchown32 198 | ||
209 | #define __NR_getuid32 199 | ||
210 | #define __NR_getgid32 200 | ||
211 | #define __NR_geteuid32 201 | ||
212 | #define __NR_getegid32 202 | ||
213 | #define __NR_setreuid32 203 | ||
214 | #define __NR_setregid32 204 | ||
215 | #define __NR_getgroups32 205 | ||
216 | #define __NR_setgroups32 206 | ||
217 | #define __NR_fchown32 207 | ||
218 | #define __NR_setresuid32 208 | ||
219 | #define __NR_getresuid32 209 | ||
220 | #define __NR_setresgid32 210 | ||
221 | #define __NR_getresgid32 211 | ||
222 | #define __NR_chown32 212 | ||
223 | #define __NR_setuid32 213 | ||
224 | #define __NR_setgid32 214 | ||
225 | #define __NR_setfsuid32 215 | ||
226 | #define __NR_setfsgid32 216 | ||
227 | #define __NR_pivot_root 217 | ||
228 | #define __NR_mincore 218 | ||
229 | #define __NR_madvise 219 | ||
230 | |||
231 | #define __NR_getdents64 220 | ||
232 | #define __NR_fcntl64 221 | ||
233 | #define __NR_security 223 /* syscall for security modules */ | ||
234 | #define __NR_gettid 224 | ||
235 | #define __NR_readahead 225 | ||
236 | #define __NR_setxattr 226 | ||
237 | #define __NR_lsetxattr 227 | ||
238 | #define __NR_fsetxattr 228 | ||
239 | #define __NR_getxattr 229 | ||
240 | #define __NR_lgetxattr 230 | ||
241 | #define __NR_fgetxattr 231 | ||
242 | #define __NR_listxattr 232 | ||
243 | #define __NR_llistxattr 233 | ||
244 | #define __NR_flistxattr 234 | ||
245 | #define __NR_removexattr 235 | ||
246 | #define __NR_lremovexattr 236 | ||
247 | #define __NR_fremovexattr 237 | ||
248 | #define __NR_tkill 238 | ||
249 | #define __NR_sendfile64 239 | ||
250 | #define __NR_futex 240 | ||
251 | #define __NR_sched_setaffinity 241 | ||
252 | #define __NR_sched_getaffinity 242 | ||
253 | #define __NR_set_thread_area 243 | ||
254 | #define __NR_get_thread_area 244 | ||
255 | #define __NR_io_setup 245 | ||
256 | #define __NR_io_destroy 246 | ||
257 | #define __NR_io_getevents 247 | ||
258 | #define __NR_io_submit 248 | ||
259 | #define __NR_io_cancel 249 | ||
260 | #define __NR_fadvise64 250 | ||
261 | |||
262 | #define __NR_exit_group 252 | ||
263 | #define __NR_lookup_dcookie 253 | ||
264 | #define __NR_epoll_create 254 | ||
265 | #define __NR_epoll_ctl 255 | ||
266 | #define __NR_epoll_wait 256 | ||
267 | #define __NR_remap_file_pages 257 | ||
268 | #define __NR_set_tid_address 258 | ||
269 | #define __NR_timer_create 259 | ||
270 | #define __NR_timer_settime (__NR_timer_create+1) | ||
271 | #define __NR_timer_gettime (__NR_timer_create+2) | ||
272 | #define __NR_timer_getoverrun (__NR_timer_create+3) | ||
273 | #define __NR_timer_delete (__NR_timer_create+4) | ||
274 | #define __NR_clock_settime (__NR_timer_create+5) | ||
275 | #define __NR_clock_gettime (__NR_timer_create+6) | ||
276 | #define __NR_clock_getres (__NR_timer_create+7) | ||
277 | #define __NR_clock_nanosleep (__NR_timer_create+8) | ||
278 | #define __NR_statfs64 268 | ||
279 | #define __NR_fstatfs64 269 | ||
280 | #define __NR_tgkill 270 | ||
281 | #define __NR_utimes 271 | ||
282 | #define __NR_fadvise64_64 272 | ||
283 | #define __NR_vserver 273 | ||
284 | #define __NR_mbind 274 | ||
285 | #define __NR_get_mempolicy 275 | ||
286 | #define __NR_set_mempolicy 276 | ||
287 | #define __NR_mq_open 277 | ||
288 | #define __NR_mq_unlink (__NR_mq_open+1) | ||
289 | #define __NR_mq_timedsend (__NR_mq_open+2) | ||
290 | #define __NR_mq_timedreceive (__NR_mq_open+3) | ||
291 | #define __NR_mq_notify (__NR_mq_open+4) | ||
292 | #define __NR_mq_getsetattr (__NR_mq_open+5) | ||
293 | #define __NR_kexec_load 283 | ||
294 | #define __NR_waitid 284 | ||
295 | /* #define __NR_sys_setaltroot 285 */ | ||
296 | #define __NR_add_key 286 | ||
297 | #define __NR_request_key 287 | ||
298 | #define __NR_keyctl 288 | ||
299 | #define __NR_ioprio_set 289 | ||
300 | #define __NR_ioprio_get 290 | ||
301 | #define __NR_inotify_init 291 | ||
302 | #define __NR_inotify_add_watch 292 | ||
303 | #define __NR_inotify_rm_watch 293 | ||
304 | #define __NR_migrate_pages 294 | ||
305 | #define __NR_openat 295 | ||
306 | #define __NR_mkdirat 296 | ||
307 | #define __NR_mknodat 297 | ||
308 | #define __NR_fchownat 298 | ||
309 | #define __NR_futimesat 299 | ||
310 | #define __NR_fstatat64 300 | ||
311 | #define __NR_unlinkat 301 | ||
312 | #define __NR_renameat 302 | ||
313 | #define __NR_linkat 303 | ||
314 | #define __NR_symlinkat 304 | ||
315 | #define __NR_readlinkat 305 | ||
316 | #define __NR_fchmodat 306 | ||
317 | #define __NR_faccessat 307 | ||
318 | #define __NR_pselect6 308 | ||
319 | #define __NR_ppoll 309 | ||
320 | #define __NR_unshare 310 | ||
321 | #define __NR_set_robust_list 311 | ||
322 | #define __NR_get_robust_list 312 | ||
323 | #define __NR_splice 313 | ||
324 | #define __NR_sync_file_range 314 | ||
325 | #define __NR_tee 315 | ||
326 | #define __NR_vmsplice 316 | ||
327 | #define __NR_move_pages 317 | ||
328 | #define __NR_getcpu 318 | ||
329 | #define __NR_epoll_pwait 319 | ||
330 | #define __NR_utimensat 320 | ||
331 | #define __NR_signalfd 321 | ||
332 | #define __NR_timerfd_create 322 | ||
333 | #define __NR_eventfd 323 | ||
334 | #define __NR_fallocate 324 | ||
335 | #define __NR_timerfd_settime 325 | ||
336 | #define __NR_timerfd_gettime 326 | ||
337 | #define __NR_signalfd4 327 | ||
338 | #define __NR_eventfd2 328 | ||
339 | #define __NR_epoll_create1 329 | ||
340 | #define __NR_dup3 330 | ||
341 | #define __NR_pipe2 331 | ||
342 | #define __NR_inotify_init1 332 | ||
343 | #define __NR_preadv 333 | ||
344 | #define __NR_pwritev 334 | ||
345 | #define __NR_rt_tgsigqueueinfo 335 | ||
346 | #define __NR_perf_event_open 336 | ||
347 | #define __NR_setns 337 | ||
348 | |||
349 | #endif /* _UAPI_ASM_UNISTD_H_ */ | ||
diff --git a/arch/frv/kernel/.gitignore b/arch/frv/kernel/.gitignore deleted file mode 100644 index c5f676c3c224..000000000000 --- a/arch/frv/kernel/.gitignore +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | vmlinux.lds | ||
diff --git a/arch/frv/kernel/Makefile b/arch/frv/kernel/Makefile deleted file mode 100644 index 216ddf30c3c1..000000000000 --- a/arch/frv/kernel/Makefile +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | # | ||
3 | # Makefile for the linux kernel. | ||
4 | # | ||
5 | |||
6 | heads-y := head-uc-fr401.o head-uc-fr451.o head-uc-fr555.o | ||
7 | heads-$(CONFIG_MMU) := head-mmu-fr451.o | ||
8 | |||
9 | extra-y:= head.o vmlinux.lds | ||
10 | |||
11 | obj-y := $(heads-y) entry.o entry-table.o break.o switch_to.o \ | ||
12 | process.o traps.o ptrace.o signal.o dma.o \ | ||
13 | sys_frv.o time.o setup.o frv_ksyms.o \ | ||
14 | debug-stub.o irq.o sleep.o uaccess.o | ||
15 | |||
16 | obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-io.o | ||
17 | |||
18 | obj-$(CONFIG_MB93091_VDK) += irq-mb93091.o | ||
19 | obj-$(CONFIG_PM) += pm.o cmode.o | ||
20 | obj-$(CONFIG_MB93093_PDK) += pm-mb93093.o | ||
21 | obj-$(CONFIG_FUJITSU_MB93493) += irq-mb93493.o | ||
22 | obj-$(CONFIG_SYSCTL) += sysctl.o | ||
23 | obj-$(CONFIG_FUTEX) += futex.o | ||
24 | obj-$(CONFIG_MODULES) += module.o | ||
diff --git a/arch/frv/kernel/asm-offsets.c b/arch/frv/kernel/asm-offsets.c deleted file mode 100644 index 0a468e9b51ad..000000000000 --- a/arch/frv/kernel/asm-offsets.c +++ /dev/null | |||
@@ -1,96 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * Generate definitions needed by assembly language modules. | ||
4 | * This code generates raw asm output which is post-processed | ||
5 | * to extract and format the required data. | ||
6 | */ | ||
7 | |||
8 | #include <linux/sched.h> | ||
9 | #include <linux/signal.h> | ||
10 | #include <linux/personality.h> | ||
11 | #include <linux/kbuild.h> | ||
12 | #include <asm/registers.h> | ||
13 | #include <asm/ucontext.h> | ||
14 | #include <asm/processor.h> | ||
15 | #include <asm/thread_info.h> | ||
16 | #include <asm/gdb-stub.h> | ||
17 | |||
18 | #define DEF_PTREG(sym, reg) OFFSET(sym, pt_regs, reg) | ||
19 | #define DEF_IREG(sym, reg) OFFSET(sym, user_context, reg) | ||
20 | #define DEF_FREG(sym, reg) OFFSET(sym, user_context, reg) | ||
21 | #define DEF_0REG(sym, reg) OFFSET(sym, frv_frame0, reg) | ||
22 | |||
23 | void foo(void) | ||
24 | { | ||
25 | /* offsets into the thread_info structure */ | ||
26 | OFFSET(TI_TASK, thread_info, task); | ||
27 | OFFSET(TI_FLAGS, thread_info, flags); | ||
28 | OFFSET(TI_STATUS, thread_info, status); | ||
29 | OFFSET(TI_CPU, thread_info, cpu); | ||
30 | OFFSET(TI_PREEMPT_COUNT, thread_info, preempt_count); | ||
31 | OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit); | ||
32 | BLANK(); | ||
33 | |||
34 | /* offsets into register file storage */ | ||
35 | DEF_PTREG(REG_PSR, psr); | ||
36 | DEF_PTREG(REG_ISR, isr); | ||
37 | DEF_PTREG(REG_CCR, ccr); | ||
38 | DEF_PTREG(REG_CCCR, cccr); | ||
39 | DEF_PTREG(REG_LR, lr); | ||
40 | DEF_PTREG(REG_LCR, lcr); | ||
41 | DEF_PTREG(REG_PC, pc); | ||
42 | DEF_PTREG(REG__STATUS, __status); | ||
43 | DEF_PTREG(REG_SYSCALLNO, syscallno); | ||
44 | DEF_PTREG(REG_ORIG_GR8, orig_gr8); | ||
45 | DEF_PTREG(REG_GNER0, gner0); | ||
46 | DEF_PTREG(REG_GNER1, gner1); | ||
47 | DEF_PTREG(REG_IACC0, iacc0); | ||
48 | DEF_PTREG(REG_TBR, tbr); | ||
49 | DEF_PTREG(REG_GR0, tbr); | ||
50 | DEFINE(REG__END, sizeof(struct pt_regs)); | ||
51 | BLANK(); | ||
52 | |||
53 | DEF_0REG(REG_DCR, debug.dcr); | ||
54 | DEF_0REG(REG_IBAR0, debug.ibar[0]); | ||
55 | DEF_0REG(REG_DBAR0, debug.dbar[0]); | ||
56 | DEF_0REG(REG_DBDR00, debug.dbdr[0][0]); | ||
57 | DEF_0REG(REG_DBMR00, debug.dbmr[0][0]); | ||
58 | BLANK(); | ||
59 | |||
60 | DEF_IREG(__INT_GR0, i.gr[0]); | ||
61 | DEF_FREG(__USER_FPMEDIA, f); | ||
62 | DEF_FREG(__FPMEDIA_FR0, f.fr[0]); | ||
63 | DEF_FREG(__FPMEDIA_FNER0, f.fner[0]); | ||
64 | DEF_FREG(__FPMEDIA_MSR0, f.msr[0]); | ||
65 | DEF_FREG(__FPMEDIA_ACC0, f.acc[0]); | ||
66 | DEF_FREG(__FPMEDIA_ACCG0, f.accg[0]); | ||
67 | DEF_FREG(__FPMEDIA_FSR0, f.fsr[0]); | ||
68 | BLANK(); | ||
69 | |||
70 | DEFINE(NR_PT_REGS, sizeof(struct pt_regs) / 4); | ||
71 | DEFINE(NR_USER_INT_REGS, sizeof(struct user_int_regs) / 4); | ||
72 | DEFINE(NR_USER_FPMEDIA_REGS, sizeof(struct user_fpmedia_regs) / 4); | ||
73 | DEFINE(NR_USER_CONTEXT, sizeof(struct user_context) / 4); | ||
74 | DEFINE(FRV_FRAME0_SIZE, sizeof(struct frv_frame0)); | ||
75 | BLANK(); | ||
76 | |||
77 | /* offsets into thread_struct */ | ||
78 | OFFSET(__THREAD_FRAME, thread_struct, frame); | ||
79 | OFFSET(__THREAD_CURR, thread_struct, curr); | ||
80 | OFFSET(__THREAD_SP, thread_struct, sp); | ||
81 | OFFSET(__THREAD_FP, thread_struct, fp); | ||
82 | OFFSET(__THREAD_LR, thread_struct, lr); | ||
83 | OFFSET(__THREAD_PC, thread_struct, pc); | ||
84 | OFFSET(__THREAD_GR16, thread_struct, gr[0]); | ||
85 | OFFSET(__THREAD_SCHED_LR, thread_struct, sched_lr); | ||
86 | OFFSET(__THREAD_FRAME0, thread_struct, frame0); | ||
87 | OFFSET(__THREAD_USER, thread_struct, user); | ||
88 | BLANK(); | ||
89 | |||
90 | /* offsets into frv_debug_status */ | ||
91 | OFFSET(DEBUG_BPSR, frv_debug_status, bpsr); | ||
92 | OFFSET(DEBUG_DCR, frv_debug_status, dcr); | ||
93 | OFFSET(DEBUG_BRR, frv_debug_status, brr); | ||
94 | OFFSET(DEBUG_NMAR, frv_debug_status, nmar); | ||
95 | BLANK(); | ||
96 | } | ||
diff --git a/arch/frv/kernel/break.S b/arch/frv/kernel/break.S deleted file mode 100644 index cbb6958a3147..000000000000 --- a/arch/frv/kernel/break.S +++ /dev/null | |||
@@ -1,792 +0,0 @@ | |||
1 | /* break.S: Break interrupt handling (kept separate from entry.S) | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/linkage.h> | ||
13 | #include <asm/setup.h> | ||
14 | #include <asm/segment.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/thread_info.h> | ||
17 | #include <asm/spr-regs.h> | ||
18 | |||
19 | #include <asm/errno.h> | ||
20 | |||
21 | # | ||
22 | # the break handler has its own stack | ||
23 | # | ||
24 | .section .bss..stack | ||
25 | .globl __break_user_context | ||
26 | .balign THREAD_SIZE | ||
27 | __break_stack: | ||
28 | .space THREAD_SIZE - FRV_FRAME0_SIZE | ||
29 | __break_frame_0: | ||
30 | .space FRV_FRAME0_SIZE | ||
31 | |||
32 | # | ||
33 | # miscellaneous variables | ||
34 | # | ||
35 | .section .bss | ||
36 | #ifdef CONFIG_MMU | ||
37 | .globl __break_tlb_miss_real_return_info | ||
38 | __break_tlb_miss_real_return_info: | ||
39 | .balign 8 | ||
40 | .space 2*4 /* saved PCSR, PSR for TLB-miss handler fixup */ | ||
41 | #endif | ||
42 | |||
43 | __break_trace_through_exceptions: | ||
44 | .space 4 | ||
45 | |||
46 | #define CS2_ECS1 0xe1200000 | ||
47 | #define CS2_USERLED 0x4 | ||
48 | |||
49 | .macro LEDS val,reg | ||
50 | # sethi.p %hi(CS2_ECS1+CS2_USERLED),gr30 | ||
51 | # setlo %lo(CS2_ECS1+CS2_USERLED),gr30 | ||
52 | # setlos #~\val,\reg | ||
53 | # st \reg,@(gr30,gr0) | ||
54 | # setlos #0x5555,\reg | ||
55 | # sethi.p %hi(0xffc00100),gr30 | ||
56 | # setlo %lo(0xffc00100),gr30 | ||
57 | # sth \reg,@(gr30,gr0) | ||
58 | # membar | ||
59 | .endm | ||
60 | |||
61 | ############################################################################### | ||
62 | # | ||
63 | # entry point for Break Exceptions/Interrupts | ||
64 | # | ||
65 | ############################################################################### | ||
66 | .section .text..break | ||
67 | .balign 4 | ||
68 | .globl __entry_break | ||
69 | __entry_break: | ||
70 | #ifdef CONFIG_MMU | ||
71 | movgs gr31,scr3 | ||
72 | #endif | ||
73 | LEDS 0x1001,gr31 | ||
74 | |||
75 | sethi.p %hi(__break_frame_0),gr31 | ||
76 | setlo %lo(__break_frame_0),gr31 | ||
77 | |||
78 | stdi gr2,@(gr31,#REG_GR(2)) | ||
79 | movsg ccr,gr3 | ||
80 | sti gr3,@(gr31,#REG_CCR) | ||
81 | |||
82 | # catch the return from a TLB-miss handler that had single-step disabled | ||
83 | # traps will be enabled, so we have to do this now | ||
84 | #ifdef CONFIG_MMU | ||
85 | movsg bpcsr,gr3 | ||
86 | sethi.p %hi(__break_tlb_miss_return_breaks_here),gr2 | ||
87 | setlo %lo(__break_tlb_miss_return_breaks_here),gr2 | ||
88 | subcc gr2,gr3,gr0,icc0 | ||
89 | beq icc0,#2,__break_return_singlestep_tlbmiss | ||
90 | #endif | ||
91 | |||
92 | # determine whether we have stepped through into an exception | ||
93 | # - we need to take special action to suspend h/w single stepping if we've done | ||
94 | # that, so that the gdbstub doesn't get bogged down endlessly stepping through | ||
95 | # external interrupt handling | ||
96 | movsg bpsr,gr3 | ||
97 | andicc gr3,#BPSR_BET,gr0,icc0 | ||
98 | bne icc0,#2,__break_maybe_userspace /* jump if PSR.ET was 1 */ | ||
99 | |||
100 | LEDS 0x1003,gr2 | ||
101 | |||
102 | movsg brr,gr3 | ||
103 | andicc gr3,#BRR_ST,gr0,icc0 | ||
104 | andicc.p gr3,#BRR_SB,gr0,icc1 | ||
105 | bne icc0,#2,__break_step /* jump if single-step caused break */ | ||
106 | beq icc1,#2,__break_continue /* jump if BREAK didn't cause break */ | ||
107 | |||
108 | LEDS 0x1007,gr2 | ||
109 | |||
110 | # handle special breaks | ||
111 | movsg bpcsr,gr3 | ||
112 | |||
113 | sethi.p %hi(__entry_return_singlestep_breaks_here),gr2 | ||
114 | setlo %lo(__entry_return_singlestep_breaks_here),gr2 | ||
115 | subcc gr2,gr3,gr0,icc0 | ||
116 | beq icc0,#2,__break_return_singlestep | ||
117 | |||
118 | bra __break_continue | ||
119 | |||
120 | |||
121 | ############################################################################### | ||
122 | # | ||
123 | # handle BREAK instruction in kernel-mode exception epilogue | ||
124 | # | ||
125 | ############################################################################### | ||
126 | __break_return_singlestep: | ||
127 | LEDS 0x100f,gr2 | ||
128 | |||
129 | # special break insn requests single-stepping to be turned back on | ||
130 | # HERE RETT | ||
131 | # PSR.ET 0 0 | ||
132 | # PSR.PS old PSR.S ? | ||
133 | # PSR.S 1 1 | ||
134 | # BPSR.ET 0 1 (can't have caused orig excep otherwise) | ||
135 | # BPSR.BS 1 old PSR.S | ||
136 | movsg dcr,gr2 | ||
137 | sethi.p %hi(DCR_SE),gr3 | ||
138 | setlo %lo(DCR_SE),gr3 | ||
139 | or gr2,gr3,gr2 | ||
140 | movgs gr2,dcr | ||
141 | |||
142 | movsg psr,gr2 | ||
143 | andi gr2,#PSR_PS,gr2 | ||
144 | slli gr2,#11,gr2 /* PSR.PS -> BPSR.BS */ | ||
145 | ori gr2,#BPSR_BET,gr2 /* 1 -> BPSR.BET */ | ||
146 | movgs gr2,bpsr | ||
147 | |||
148 | # return to the invoker of the original kernel exception | ||
149 | movsg pcsr,gr2 | ||
150 | movgs gr2,bpcsr | ||
151 | |||
152 | LEDS 0x101f,gr2 | ||
153 | |||
154 | ldi @(gr31,#REG_CCR),gr3 | ||
155 | movgs gr3,ccr | ||
156 | lddi.p @(gr31,#REG_GR(2)),gr2 | ||
157 | xor gr31,gr31,gr31 | ||
158 | movgs gr0,brr | ||
159 | #ifdef CONFIG_MMU | ||
160 | movsg scr3,gr31 | ||
161 | #endif | ||
162 | rett #1 | ||
163 | |||
164 | ############################################################################### | ||
165 | # | ||
166 | # handle BREAK instruction in TLB-miss handler return path | ||
167 | # | ||
168 | ############################################################################### | ||
169 | #ifdef CONFIG_MMU | ||
170 | __break_return_singlestep_tlbmiss: | ||
171 | LEDS 0x1100,gr2 | ||
172 | |||
173 | sethi.p %hi(__break_tlb_miss_real_return_info),gr3 | ||
174 | setlo %lo(__break_tlb_miss_real_return_info),gr3 | ||
175 | lddi @(gr3,#0),gr2 | ||
176 | movgs gr2,pcsr | ||
177 | movgs gr3,psr | ||
178 | |||
179 | bra __break_return_singlestep | ||
180 | #endif | ||
181 | |||
182 | |||
183 | ############################################################################### | ||
184 | # | ||
185 | # handle single stepping into an exception prologue from kernel mode | ||
186 | # - we try and catch it whilst it is still in the main vector table | ||
187 | # - if we catch it there, we have to jump to the fixup handler | ||
188 | # - there is a fixup table that has a pointer for every 16b slot in the trap | ||
189 | # table | ||
190 | # | ||
191 | ############################################################################### | ||
192 | __break_step: | ||
193 | LEDS 0x2003,gr2 | ||
194 | |||
195 | # external interrupts seem to escape from the trap table before single | ||
196 | # step catches up with them | ||
197 | movsg bpcsr,gr2 | ||
198 | sethi.p %hi(__entry_kernel_external_interrupt),gr3 | ||
199 | setlo %lo(__entry_kernel_external_interrupt),gr3 | ||
200 | subcc.p gr2,gr3,gr0,icc0 | ||
201 | sethi %hi(__entry_uspace_external_interrupt),gr3 | ||
202 | setlo.p %lo(__entry_uspace_external_interrupt),gr3 | ||
203 | beq icc0,#2,__break_step_kernel_external_interrupt | ||
204 | subcc.p gr2,gr3,gr0,icc0 | ||
205 | sethi %hi(__entry_kernel_external_interrupt_virtually_disabled),gr3 | ||
206 | setlo.p %lo(__entry_kernel_external_interrupt_virtually_disabled),gr3 | ||
207 | beq icc0,#2,__break_step_uspace_external_interrupt | ||
208 | subcc.p gr2,gr3,gr0,icc0 | ||
209 | sethi %hi(__entry_kernel_external_interrupt_virtual_reenable),gr3 | ||
210 | setlo.p %lo(__entry_kernel_external_interrupt_virtual_reenable),gr3 | ||
211 | beq icc0,#2,__break_step_kernel_external_interrupt_virtually_disabled | ||
212 | subcc gr2,gr3,gr0,icc0 | ||
213 | beq icc0,#2,__break_step_kernel_external_interrupt_virtual_reenable | ||
214 | |||
215 | LEDS 0x2007,gr2 | ||
216 | |||
217 | # the two main vector tables are adjacent on one 8Kb slab | ||
218 | movsg bpcsr,gr2 | ||
219 | setlos #0xffffe000,gr3 | ||
220 | and gr2,gr3,gr2 | ||
221 | sethi.p %hi(__trap_tables),gr3 | ||
222 | setlo %lo(__trap_tables),gr3 | ||
223 | subcc gr2,gr3,gr0,icc0 | ||
224 | bne icc0,#2,__break_continue | ||
225 | |||
226 | LEDS 0x200f,gr2 | ||
227 | |||
228 | # skip workaround if so requested by GDB | ||
229 | sethi.p %hi(__break_trace_through_exceptions),gr3 | ||
230 | setlo %lo(__break_trace_through_exceptions),gr3 | ||
231 | ld @(gr3,gr0),gr3 | ||
232 | subcc gr3,gr0,gr0,icc0 | ||
233 | bne icc0,#0,__break_continue | ||
234 | |||
235 | LEDS 0x201f,gr2 | ||
236 | |||
237 | # access the fixup table - there's a 1:1 mapping between the slots in the trap tables and | ||
238 | # the slots in the trap fixup tables allowing us to simply divide the offset into the | ||
239 | # former by 4 to access the latter | ||
240 | sethi.p %hi(__trap_tables),gr3 | ||
241 | setlo %lo(__trap_tables),gr3 | ||
242 | movsg bpcsr,gr2 | ||
243 | sub gr2,gr3,gr2 | ||
244 | srli.p gr2,#2,gr2 | ||
245 | |||
246 | sethi %hi(__trap_fixup_tables),gr3 | ||
247 | setlo.p %lo(__trap_fixup_tables),gr3 | ||
248 | andi gr2,#~3,gr2 | ||
249 | ld @(gr2,gr3),gr2 | ||
250 | jmpil @(gr2,#0) | ||
251 | |||
252 | # step through an internal exception from kernel mode | ||
253 | .globl __break_step_kernel_softprog_interrupt | ||
254 | __break_step_kernel_softprog_interrupt: | ||
255 | sethi.p %hi(__entry_kernel_softprog_interrupt_reentry),gr3 | ||
256 | setlo %lo(__entry_kernel_softprog_interrupt_reentry),gr3 | ||
257 | bra __break_return_as_kernel_prologue | ||
258 | |||
259 | # step through an external interrupt from kernel mode | ||
260 | .globl __break_step_kernel_external_interrupt | ||
261 | __break_step_kernel_external_interrupt: | ||
262 | # deal with virtual interrupt disablement | ||
263 | beq icc2,#0,__break_step_kernel_external_interrupt_virtually_disabled | ||
264 | |||
265 | sethi.p %hi(__entry_kernel_external_interrupt_reentry),gr3 | ||
266 | setlo %lo(__entry_kernel_external_interrupt_reentry),gr3 | ||
267 | |||
268 | __break_return_as_kernel_prologue: | ||
269 | LEDS 0x203f,gr2 | ||
270 | |||
271 | movgs gr3,bpcsr | ||
272 | |||
273 | # do the bit we had to skip | ||
274 | #ifdef CONFIG_MMU | ||
275 | movsg ear0,gr2 /* EAR0 can get clobbered by gdb-stub (ICI/ICEI) */ | ||
276 | movgs gr2,scr2 | ||
277 | #endif | ||
278 | |||
279 | or.p sp,gr0,gr2 /* set up the stack pointer */ | ||
280 | subi sp,#REG__END,sp | ||
281 | sti.p gr2,@(sp,#REG_SP) | ||
282 | |||
283 | setlos #REG__STATUS_STEP,gr2 | ||
284 | sti gr2,@(sp,#REG__STATUS) /* record single step status */ | ||
285 | |||
286 | # cancel single-stepping mode | ||
287 | movsg dcr,gr2 | ||
288 | sethi.p %hi(~DCR_SE),gr3 | ||
289 | setlo %lo(~DCR_SE),gr3 | ||
290 | and gr2,gr3,gr2 | ||
291 | movgs gr2,dcr | ||
292 | |||
293 | LEDS 0x207f,gr2 | ||
294 | |||
295 | ldi @(gr31,#REG_CCR),gr3 | ||
296 | movgs gr3,ccr | ||
297 | lddi.p @(gr31,#REG_GR(2)),gr2 | ||
298 | xor gr31,gr31,gr31 | ||
299 | movgs gr0,brr | ||
300 | #ifdef CONFIG_MMU | ||
301 | movsg scr3,gr31 | ||
302 | #endif | ||
303 | rett #1 | ||
304 | |||
305 | # we single-stepped into an interrupt handler whilst interrupts were merely virtually disabled | ||
306 | # need to really disable interrupts, set flag, fix up and return | ||
307 | __break_step_kernel_external_interrupt_virtually_disabled: | ||
308 | movsg psr,gr2 | ||
309 | andi gr2,#~PSR_PIL,gr2 | ||
310 | ori gr2,#PSR_PIL_14,gr2 /* debugging interrupts only */ | ||
311 | movgs gr2,psr | ||
312 | |||
313 | ldi @(gr31,#REG_CCR),gr3 | ||
314 | movgs gr3,ccr | ||
315 | subcc.p gr0,gr0,gr0,icc2 /* leave Z set, clear C */ | ||
316 | |||
317 | # exceptions must've been enabled and we must've been in supervisor mode | ||
318 | setlos BPSR_BET|BPSR_BS,gr3 | ||
319 | movgs gr3,bpsr | ||
320 | |||
321 | # return to where the interrupt happened | ||
322 | movsg pcsr,gr2 | ||
323 | movgs gr2,bpcsr | ||
324 | |||
325 | lddi.p @(gr31,#REG_GR(2)),gr2 | ||
326 | |||
327 | xor gr31,gr31,gr31 | ||
328 | movgs gr0,brr | ||
329 | #ifdef CONFIG_MMU | ||
330 | movsg scr3,gr31 | ||
331 | #endif | ||
332 | rett #1 | ||
333 | |||
334 | # we stepped through into the virtual interrupt reenablement trap | ||
335 | # | ||
336 | # we also want to single step anyway, but after fixing up so that we get an event on the | ||
337 | # instruction after the broken-into exception returns | ||
338 | .globl __break_step_kernel_external_interrupt_virtual_reenable | ||
339 | __break_step_kernel_external_interrupt_virtual_reenable: | ||
340 | movsg psr,gr2 | ||
341 | andi gr2,#~PSR_PIL,gr2 | ||
342 | movgs gr2,psr | ||
343 | |||
344 | ldi @(gr31,#REG_CCR),gr3 | ||
345 | movgs gr3,ccr | ||
346 | subicc gr0,#1,gr0,icc2 /* clear Z, set C */ | ||
347 | |||
348 | # save the adjusted ICC2 | ||
349 | movsg ccr,gr3 | ||
350 | sti gr3,@(gr31,#REG_CCR) | ||
351 | |||
352 | # exceptions must've been enabled and we must've been in supervisor mode | ||
353 | setlos BPSR_BET|BPSR_BS,gr3 | ||
354 | movgs gr3,bpsr | ||
355 | |||
356 | # return to where the trap happened | ||
357 | movsg pcsr,gr2 | ||
358 | movgs gr2,bpcsr | ||
359 | |||
360 | # and then process the single step | ||
361 | bra __break_continue | ||
362 | |||
363 | # step through an internal exception from uspace mode | ||
364 | .globl __break_step_uspace_softprog_interrupt | ||
365 | __break_step_uspace_softprog_interrupt: | ||
366 | sethi.p %hi(__entry_uspace_softprog_interrupt_reentry),gr3 | ||
367 | setlo %lo(__entry_uspace_softprog_interrupt_reentry),gr3 | ||
368 | bra __break_return_as_uspace_prologue | ||
369 | |||
370 | # step through an external interrupt from kernel mode | ||
371 | .globl __break_step_uspace_external_interrupt | ||
372 | __break_step_uspace_external_interrupt: | ||
373 | sethi.p %hi(__entry_uspace_external_interrupt_reentry),gr3 | ||
374 | setlo %lo(__entry_uspace_external_interrupt_reentry),gr3 | ||
375 | |||
376 | __break_return_as_uspace_prologue: | ||
377 | LEDS 0x20ff,gr2 | ||
378 | |||
379 | movgs gr3,bpcsr | ||
380 | |||
381 | # do the bit we had to skip | ||
382 | sethi.p %hi(__kernel_frame0_ptr),gr28 | ||
383 | setlo %lo(__kernel_frame0_ptr),gr28 | ||
384 | ldi.p @(gr28,#0),gr28 | ||
385 | |||
386 | setlos #REG__STATUS_STEP,gr2 | ||
387 | sti gr2,@(gr28,#REG__STATUS) /* record single step status */ | ||
388 | |||
389 | # cancel single-stepping mode | ||
390 | movsg dcr,gr2 | ||
391 | sethi.p %hi(~DCR_SE),gr3 | ||
392 | setlo %lo(~DCR_SE),gr3 | ||
393 | and gr2,gr3,gr2 | ||
394 | movgs gr2,dcr | ||
395 | |||
396 | LEDS 0x20fe,gr2 | ||
397 | |||
398 | ldi @(gr31,#REG_CCR),gr3 | ||
399 | movgs gr3,ccr | ||
400 | lddi.p @(gr31,#REG_GR(2)),gr2 | ||
401 | xor gr31,gr31,gr31 | ||
402 | movgs gr0,brr | ||
403 | #ifdef CONFIG_MMU | ||
404 | movsg scr3,gr31 | ||
405 | #endif | ||
406 | rett #1 | ||
407 | |||
408 | #ifdef CONFIG_MMU | ||
409 | # step through an ITLB-miss handler from user mode | ||
410 | .globl __break_user_insn_tlb_miss | ||
411 | __break_user_insn_tlb_miss: | ||
412 | # we'll want to try the trap stub again | ||
413 | sethi.p %hi(__trap_user_insn_tlb_miss),gr2 | ||
414 | setlo %lo(__trap_user_insn_tlb_miss),gr2 | ||
415 | movgs gr2,bpcsr | ||
416 | |||
417 | __break_tlb_miss_common: | ||
418 | LEDS 0x2101,gr2 | ||
419 | |||
420 | # cancel single-stepping mode | ||
421 | movsg dcr,gr2 | ||
422 | sethi.p %hi(~DCR_SE),gr3 | ||
423 | setlo %lo(~DCR_SE),gr3 | ||
424 | and gr2,gr3,gr2 | ||
425 | movgs gr2,dcr | ||
426 | |||
427 | # we'll swap the real return address for one with a BREAK insn so that we can re-enable | ||
428 | # single stepping on return | ||
429 | movsg pcsr,gr2 | ||
430 | sethi.p %hi(__break_tlb_miss_real_return_info),gr3 | ||
431 | setlo %lo(__break_tlb_miss_real_return_info),gr3 | ||
432 | sti gr2,@(gr3,#0) | ||
433 | |||
434 | sethi.p %hi(__break_tlb_miss_return_break),gr2 | ||
435 | setlo %lo(__break_tlb_miss_return_break),gr2 | ||
436 | movgs gr2,pcsr | ||
437 | |||
438 | # we also have to fudge PSR because the return BREAK is in kernel space and we want | ||
439 | # to get a BREAK fault not an access violation should the return be to userspace | ||
440 | movsg psr,gr2 | ||
441 | sti.p gr2,@(gr3,#4) | ||
442 | ori gr2,#PSR_PS,gr2 | ||
443 | movgs gr2,psr | ||
444 | |||
445 | LEDS 0x2102,gr2 | ||
446 | |||
447 | ldi @(gr31,#REG_CCR),gr3 | ||
448 | movgs gr3,ccr | ||
449 | lddi @(gr31,#REG_GR(2)),gr2 | ||
450 | movsg scr3,gr31 | ||
451 | movgs gr0,brr | ||
452 | rett #1 | ||
453 | |||
454 | # step through a DTLB-miss handler from user mode | ||
455 | .globl __break_user_data_tlb_miss | ||
456 | __break_user_data_tlb_miss: | ||
457 | # we'll want to try the trap stub again | ||
458 | sethi.p %hi(__trap_user_data_tlb_miss),gr2 | ||
459 | setlo %lo(__trap_user_data_tlb_miss),gr2 | ||
460 | movgs gr2,bpcsr | ||
461 | bra __break_tlb_miss_common | ||
462 | |||
463 | # step through an ITLB-miss handler from kernel mode | ||
464 | .globl __break_kernel_insn_tlb_miss | ||
465 | __break_kernel_insn_tlb_miss: | ||
466 | # we'll want to try the trap stub again | ||
467 | sethi.p %hi(__trap_kernel_insn_tlb_miss),gr2 | ||
468 | setlo %lo(__trap_kernel_insn_tlb_miss),gr2 | ||
469 | movgs gr2,bpcsr | ||
470 | bra __break_tlb_miss_common | ||
471 | |||
472 | # step through a DTLB-miss handler from kernel mode | ||
473 | .globl __break_kernel_data_tlb_miss | ||
474 | __break_kernel_data_tlb_miss: | ||
475 | # we'll want to try the trap stub again | ||
476 | sethi.p %hi(__trap_kernel_data_tlb_miss),gr2 | ||
477 | setlo %lo(__trap_kernel_data_tlb_miss),gr2 | ||
478 | movgs gr2,bpcsr | ||
479 | bra __break_tlb_miss_common | ||
480 | #endif | ||
481 | |||
482 | ############################################################################### | ||
483 | # | ||
484 | # handle debug events originating with userspace | ||
485 | # | ||
486 | ############################################################################### | ||
487 | __break_maybe_userspace: | ||
488 | LEDS 0x3003,gr2 | ||
489 | |||
490 | setlos #BPSR_BS,gr2 | ||
491 | andcc gr3,gr2,gr0,icc0 | ||
492 | bne icc0,#0,__break_continue /* skip if PSR.S was 1 */ | ||
493 | |||
494 | movsg brr,gr2 | ||
495 | andicc gr2,#BRR_ST|BRR_SB,gr0,icc0 | ||
496 | beq icc0,#0,__break_continue /* jump if not BREAK or single-step */ | ||
497 | |||
498 | LEDS 0x3007,gr2 | ||
499 | |||
500 | # do the first part of the exception prologue here | ||
501 | sethi.p %hi(__kernel_frame0_ptr),gr28 | ||
502 | setlo %lo(__kernel_frame0_ptr),gr28 | ||
503 | ldi @(gr28,#0),gr28 | ||
504 | andi gr28,#~7,gr28 | ||
505 | |||
506 | # set up the kernel stack pointer | ||
507 | sti sp ,@(gr28,#REG_SP) | ||
508 | ori gr28,0,sp | ||
509 | sti gr0 ,@(gr28,#REG_GR(28)) | ||
510 | |||
511 | stdi gr20,@(gr28,#REG_GR(20)) | ||
512 | stdi gr22,@(gr28,#REG_GR(22)) | ||
513 | |||
514 | movsg tbr,gr20 | ||
515 | movsg bpcsr,gr21 | ||
516 | movsg psr,gr22 | ||
517 | |||
518 | # determine the exception type and cancel single-stepping mode | ||
519 | or gr0,gr0,gr23 | ||
520 | |||
521 | movsg dcr,gr2 | ||
522 | sethi.p %hi(DCR_SE),gr3 | ||
523 | setlo %lo(DCR_SE),gr3 | ||
524 | andcc gr2,gr3,gr0,icc0 | ||
525 | beq icc0,#0,__break_no_user_sstep /* must have been a BREAK insn */ | ||
526 | |||
527 | not gr3,gr3 | ||
528 | and gr2,gr3,gr2 | ||
529 | movgs gr2,dcr | ||
530 | ori gr23,#REG__STATUS_STEP,gr23 | ||
531 | |||
532 | __break_no_user_sstep: | ||
533 | LEDS 0x300f,gr2 | ||
534 | |||
535 | movsg brr,gr2 | ||
536 | andi gr2,#BRR_ST|BRR_SB,gr2 | ||
537 | slli gr2,#1,gr2 | ||
538 | or gr23,gr2,gr23 | ||
539 | sti.p gr23,@(gr28,#REG__STATUS) /* record single step status */ | ||
540 | |||
541 | # adjust the value acquired from TBR - this indicates the exception | ||
542 | setlos #~TBR_TT,gr2 | ||
543 | and.p gr20,gr2,gr20 | ||
544 | setlos #TBR_TT_BREAK,gr2 | ||
545 | or.p gr20,gr2,gr20 | ||
546 | |||
547 | # fudge PSR.PS and BPSR.BS to return to kernel mode through the trap | ||
548 | # table as trap 126 | ||
549 | andi gr22,#~PSR_PS,gr22 /* PSR.PS should be 0 */ | ||
550 | movgs gr22,psr | ||
551 | |||
552 | setlos #BPSR_BS,gr2 /* BPSR.BS should be 1 and BPSR.BET 0 */ | ||
553 | movgs gr2,bpsr | ||
554 | |||
555 | # return through remainder of the exception prologue | ||
556 | # - need to load gr23 with return handler address | ||
557 | sethi.p %hi(__entry_return_from_user_exception),gr23 | ||
558 | setlo %lo(__entry_return_from_user_exception),gr23 | ||
559 | sethi.p %hi(__entry_common),gr3 | ||
560 | setlo %lo(__entry_common),gr3 | ||
561 | movgs gr3,bpcsr | ||
562 | |||
563 | LEDS 0x301f,gr2 | ||
564 | |||
565 | ldi @(gr31,#REG_CCR),gr3 | ||
566 | movgs gr3,ccr | ||
567 | lddi.p @(gr31,#REG_GR(2)),gr2 | ||
568 | xor gr31,gr31,gr31 | ||
569 | movgs gr0,brr | ||
570 | #ifdef CONFIG_MMU | ||
571 | movsg scr3,gr31 | ||
572 | #endif | ||
573 | rett #1 | ||
574 | |||
575 | ############################################################################### | ||
576 | # | ||
577 | # resume normal debug-mode entry | ||
578 | # | ||
579 | ############################################################################### | ||
580 | __break_continue: | ||
581 | LEDS 0x4003,gr2 | ||
582 | |||
583 | # set up the kernel stack pointer | ||
584 | sti sp,@(gr31,#REG_SP) | ||
585 | |||
586 | sethi.p %hi(__break_frame_0),sp | ||
587 | setlo %lo(__break_frame_0),sp | ||
588 | |||
589 | # finish building the exception frame | ||
590 | stdi gr4 ,@(gr31,#REG_GR(4)) | ||
591 | stdi gr6 ,@(gr31,#REG_GR(6)) | ||
592 | stdi gr8 ,@(gr31,#REG_GR(8)) | ||
593 | stdi gr10,@(gr31,#REG_GR(10)) | ||
594 | stdi gr12,@(gr31,#REG_GR(12)) | ||
595 | stdi gr14,@(gr31,#REG_GR(14)) | ||
596 | stdi gr16,@(gr31,#REG_GR(16)) | ||
597 | stdi gr18,@(gr31,#REG_GR(18)) | ||
598 | stdi gr20,@(gr31,#REG_GR(20)) | ||
599 | stdi gr22,@(gr31,#REG_GR(22)) | ||
600 | stdi gr24,@(gr31,#REG_GR(24)) | ||
601 | stdi gr26,@(gr31,#REG_GR(26)) | ||
602 | sti gr0 ,@(gr31,#REG_GR(28)) /* NULL frame pointer */ | ||
603 | sti gr29,@(gr31,#REG_GR(29)) | ||
604 | sti gr30,@(gr31,#REG_GR(30)) | ||
605 | sti gr8 ,@(gr31,#REG_ORIG_GR8) | ||
606 | |||
607 | #ifdef CONFIG_MMU | ||
608 | movsg scr3,gr19 | ||
609 | sti gr19,@(gr31,#REG_GR(31)) | ||
610 | #endif | ||
611 | |||
612 | movsg bpsr ,gr19 | ||
613 | movsg tbr ,gr20 | ||
614 | movsg bpcsr,gr21 | ||
615 | movsg psr ,gr22 | ||
616 | movsg isr ,gr23 | ||
617 | movsg cccr ,gr25 | ||
618 | movsg lr ,gr26 | ||
619 | movsg lcr ,gr27 | ||
620 | |||
621 | andi.p gr22,#~(PSR_S|PSR_ET),gr5 /* rebuild PSR */ | ||
622 | andi gr19,#PSR_ET,gr4 | ||
623 | or.p gr4,gr5,gr5 | ||
624 | srli gr19,#10,gr4 | ||
625 | andi gr4,#PSR_S,gr4 | ||
626 | or.p gr4,gr5,gr5 | ||
627 | |||
628 | setlos #-1,gr6 | ||
629 | sti gr20,@(gr31,#REG_TBR) | ||
630 | sti gr21,@(gr31,#REG_PC) | ||
631 | sti gr5 ,@(gr31,#REG_PSR) | ||
632 | sti gr23,@(gr31,#REG_ISR) | ||
633 | sti gr25,@(gr31,#REG_CCCR) | ||
634 | stdi gr26,@(gr31,#REG_LR) | ||
635 | sti gr6 ,@(gr31,#REG_SYSCALLNO) | ||
636 | |||
637 | # store CPU-specific regs | ||
638 | movsg iacc0h,gr4 | ||
639 | movsg iacc0l,gr5 | ||
640 | stdi gr4,@(gr31,#REG_IACC0) | ||
641 | |||
642 | movsg gner0,gr4 | ||
643 | movsg gner1,gr5 | ||
644 | stdi gr4,@(gr31,#REG_GNER0) | ||
645 | |||
646 | # build the debug register frame | ||
647 | movsg brr,gr4 | ||
648 | movgs gr0,brr | ||
649 | movsg nmar,gr5 | ||
650 | movsg dcr,gr6 | ||
651 | |||
652 | sethi.p %hi(__debug_status),gr7 | ||
653 | setlo %lo(__debug_status),gr7 | ||
654 | |||
655 | stdi gr4 ,@(gr7,#DEBUG_BRR) | ||
656 | sti gr19,@(gr7,#DEBUG_BPSR) | ||
657 | sti.p gr6 ,@(gr7,#DEBUG_DCR) | ||
658 | |||
659 | # trap exceptions during break handling and disable h/w breakpoints/watchpoints | ||
660 | sethi %hi(DCR_EBE),gr5 | ||
661 | setlo.p %lo(DCR_EBE),gr5 | ||
662 | sethi %hi(__entry_breaktrap_table),gr4 | ||
663 | setlo %lo(__entry_breaktrap_table),gr4 | ||
664 | movgs gr5,dcr | ||
665 | movgs gr4,tbr | ||
666 | |||
667 | # set up kernel global registers | ||
668 | sethi.p %hi(__kernel_current_task),gr5 | ||
669 | setlo %lo(__kernel_current_task),gr5 | ||
670 | ld @(gr5,gr0),gr29 | ||
671 | ldi.p @(gr29,#4),gr15 ; __current_thread_info = current->thread_info | ||
672 | |||
673 | sethi %hi(_gp),gr16 | ||
674 | setlo.p %lo(_gp),gr16 | ||
675 | |||
676 | # make sure we (the kernel) get div-zero and misalignment exceptions | ||
677 | setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5 | ||
678 | movgs gr5,isr | ||
679 | |||
680 | # enter the GDB stub | ||
681 | LEDS 0x4007,gr2 | ||
682 | |||
683 | or.p gr0,gr0,fp | ||
684 | call debug_stub | ||
685 | |||
686 | LEDS 0x403f,gr2 | ||
687 | |||
688 | # return from break | ||
689 | lddi @(gr31,#REG_IACC0),gr4 | ||
690 | movgs gr4,iacc0h | ||
691 | movgs gr5,iacc0l | ||
692 | |||
693 | lddi @(gr31,#REG_GNER0),gr4 | ||
694 | movgs gr4,gner0 | ||
695 | movgs gr5,gner1 | ||
696 | |||
697 | lddi @(gr31,#REG_LR) ,gr26 | ||
698 | lddi @(gr31,#REG_CCR) ,gr24 | ||
699 | lddi @(gr31,#REG_PSR) ,gr22 | ||
700 | ldi @(gr31,#REG_PC) ,gr21 | ||
701 | ldi @(gr31,#REG_TBR) ,gr20 | ||
702 | |||
703 | sethi.p %hi(__debug_status),gr6 | ||
704 | setlo %lo(__debug_status),gr6 | ||
705 | ldi.p @(gr6,#DEBUG_DCR) ,gr6 | ||
706 | |||
707 | andi gr22,#PSR_S,gr19 /* rebuild BPSR */ | ||
708 | andi.p gr22,#PSR_ET,gr5 | ||
709 | slli gr19,#10,gr19 | ||
710 | or gr5,gr19,gr19 | ||
711 | |||
712 | movgs gr6 ,dcr | ||
713 | movgs gr19,bpsr | ||
714 | movgs gr20,tbr | ||
715 | movgs gr21,bpcsr | ||
716 | movgs gr23,isr | ||
717 | movgs gr24,ccr | ||
718 | movgs gr25,cccr | ||
719 | movgs gr26,lr | ||
720 | movgs gr27,lcr | ||
721 | |||
722 | LEDS 0x407f,gr2 | ||
723 | |||
724 | #ifdef CONFIG_MMU | ||
725 | ldi @(gr31,#REG_GR(31)),gr2 | ||
726 | movgs gr2,scr3 | ||
727 | #endif | ||
728 | |||
729 | ldi @(gr31,#REG_GR(30)),gr30 | ||
730 | ldi @(gr31,#REG_GR(29)),gr29 | ||
731 | lddi @(gr31,#REG_GR(26)),gr26 | ||
732 | lddi @(gr31,#REG_GR(24)),gr24 | ||
733 | lddi @(gr31,#REG_GR(22)),gr22 | ||
734 | lddi @(gr31,#REG_GR(20)),gr20 | ||
735 | lddi @(gr31,#REG_GR(18)),gr18 | ||
736 | lddi @(gr31,#REG_GR(16)),gr16 | ||
737 | lddi @(gr31,#REG_GR(14)),gr14 | ||
738 | lddi @(gr31,#REG_GR(12)),gr12 | ||
739 | lddi @(gr31,#REG_GR(10)),gr10 | ||
740 | lddi @(gr31,#REG_GR(8)) ,gr8 | ||
741 | lddi @(gr31,#REG_GR(6)) ,gr6 | ||
742 | lddi @(gr31,#REG_GR(4)) ,gr4 | ||
743 | lddi @(gr31,#REG_GR(2)) ,gr2 | ||
744 | ldi.p @(gr31,#REG_SP) ,sp | ||
745 | |||
746 | xor gr31,gr31,gr31 | ||
747 | movgs gr0,brr | ||
748 | #ifdef CONFIG_MMU | ||
749 | movsg scr3,gr31 | ||
750 | #endif | ||
751 | rett #1 | ||
752 | |||
753 | ################################################################################################### | ||
754 | # | ||
755 | # GDB stub "system calls" | ||
756 | # | ||
757 | ################################################################################################### | ||
758 | |||
759 | #ifdef CONFIG_GDBSTUB | ||
760 | # void gdbstub_console_write(struct console *con, const char *p, unsigned n) | ||
761 | .globl gdbstub_console_write | ||
762 | gdbstub_console_write: | ||
763 | break | ||
764 | bralr | ||
765 | #endif | ||
766 | |||
767 | # GDB stub BUG() trap | ||
768 | # GR8 is the proposed signal number | ||
769 | .globl __debug_bug_trap | ||
770 | __debug_bug_trap: | ||
771 | break | ||
772 | bralr | ||
773 | |||
774 | # transfer kernel exeception to GDB for handling | ||
775 | .globl __break_hijack_kernel_event | ||
776 | __break_hijack_kernel_event: | ||
777 | break | ||
778 | .globl __break_hijack_kernel_event_breaks_here | ||
779 | __break_hijack_kernel_event_breaks_here: | ||
780 | nop | ||
781 | |||
782 | #ifdef CONFIG_MMU | ||
783 | # handle a return from TLB-miss that requires single-step reactivation | ||
784 | .globl __break_tlb_miss_return_break | ||
785 | __break_tlb_miss_return_break: | ||
786 | break | ||
787 | __break_tlb_miss_return_breaks_here: | ||
788 | nop | ||
789 | #endif | ||
790 | |||
791 | # guard the first .text label in the next file from confusion | ||
792 | nop | ||
diff --git a/arch/frv/kernel/cmode.S b/arch/frv/kernel/cmode.S deleted file mode 100644 index 53deeb5d7e87..000000000000 --- a/arch/frv/kernel/cmode.S +++ /dev/null | |||
@@ -1,189 +0,0 @@ | |||
1 | /* cmode.S: clock mode management | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Woodhouse (dwmw2@infradead.org) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/sys.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/setup.h> | ||
16 | #include <asm/segment.h> | ||
17 | #include <asm/ptrace.h> | ||
18 | #include <asm/errno.h> | ||
19 | #include <asm/cache.h> | ||
20 | #include <asm/spr-regs.h> | ||
21 | |||
22 | #define __addr_MASK 0xfeff9820 /* interrupt controller mask */ | ||
23 | |||
24 | #define __addr_SDRAMC 0xfe000400 /* SDRAM controller regs */ | ||
25 | #define SDRAMC_DSTS 0x28 /* SDRAM status */ | ||
26 | #define SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is in self-refresh mode */ | ||
27 | #define SDRAMC_DRCN 0x30 /* SDRAM refresh control */ | ||
28 | #define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh mode */ | ||
29 | #define __addr_CLKC 0xfeff9a00 | ||
30 | #define CLKC_SWCMODE 0x00000008 | ||
31 | #define __addr_LEDS 0xe1200004 | ||
32 | |||
33 | .macro li v r | ||
34 | sethi.p %hi(\v),\r | ||
35 | setlo %lo(\v),\r | ||
36 | .endm | ||
37 | |||
38 | .text | ||
39 | .balign 4 | ||
40 | |||
41 | |||
42 | ############################################################################### | ||
43 | # | ||
44 | # Change CMODE | ||
45 | # - void frv_change_cmode(int cmode) | ||
46 | # | ||
47 | ############################################################################### | ||
48 | .globl frv_change_cmode | ||
49 | .type frv_change_cmode,@function | ||
50 | |||
51 | .macro LEDS v | ||
52 | #ifdef DEBUG_CMODE | ||
53 | setlos #~\v,gr10 | ||
54 | sti gr10,@(gr11,#0) | ||
55 | membar | ||
56 | #endif | ||
57 | .endm | ||
58 | |||
59 | frv_change_cmode: | ||
60 | movsg lr,gr9 | ||
61 | #ifdef DEBUG_CMODE | ||
62 | li __addr_LEDS,gr11 | ||
63 | #endif | ||
64 | dcef @(gr0,gr0),#1 | ||
65 | |||
66 | # Shift argument left by 24 bits to fit in SWCMODE register later. | ||
67 | slli gr8,#24,gr8 | ||
68 | |||
69 | # (1) Set '0' in the PSR.ET bit, and prohibit interrupts. | ||
70 | movsg psr,gr14 | ||
71 | andi gr14,#~PSR_ET,gr3 | ||
72 | movgs gr3,psr | ||
73 | |||
74 | #if 0 // Fujitsu recommend to skip this and will update docs. | ||
75 | # (2) Set '0' to all bits of the MASK register of the interrupt | ||
76 | # controller, and mask interrupts. | ||
77 | li __addr_MASK,gr12 | ||
78 | ldi @(gr12,#0),gr13 | ||
79 | li 0xffff0000,gr4 | ||
80 | sti gr4,@(gr12,#0) | ||
81 | #endif | ||
82 | |||
83 | # (3) Stop the transfer function of DMAC. Stop all the bus masters | ||
84 | # to access SDRAM and the internal resources. | ||
85 | |||
86 | # (already done by caller) | ||
87 | |||
88 | # (4) Preload a series of following instructions to the instruction | ||
89 | # cache. | ||
90 | li #__cmode_icache_lock_start,gr3 | ||
91 | li #__cmode_icache_lock_end,gr4 | ||
92 | |||
93 | 1: icpl gr3,gr0,#1 | ||
94 | addi gr3,#L1_CACHE_BYTES,gr3 | ||
95 | cmp gr4,gr3,icc0 | ||
96 | bhi icc0,#0,1b | ||
97 | |||
98 | # Set up addresses in regs for later steps. | ||
99 | setlos SDRAMC_DRCN_SR,gr3 | ||
100 | li __addr_SDRAMC,gr4 | ||
101 | li __addr_CLKC,gr5 | ||
102 | ldi @(gr5,#0),gr6 | ||
103 | li #0x80000000,gr7 | ||
104 | or gr6,gr7,gr6 | ||
105 | |||
106 | bra __cmode_icache_lock_start | ||
107 | |||
108 | .balign L1_CACHE_BYTES | ||
109 | __cmode_icache_lock_start: | ||
110 | |||
111 | # (5) Flush the content of all caches by the DCEF instruction. | ||
112 | dcef @(gr0,gr0),#1 | ||
113 | |||
114 | # (6) Execute loading the dummy for SDRAM. | ||
115 | ldi @(gr9,#0),gr0 | ||
116 | |||
117 | # (7) Set '1' to the DRCN.SR bit, and change SDRAM to the | ||
118 | # self-refresh mode. Execute the dummy load to all memory | ||
119 | # devices set to cacheable on the external bus side in parallel | ||
120 | # with this. | ||
121 | sti gr3,@(gr4,#SDRAMC_DRCN) | ||
122 | |||
123 | # (8) Execute memory barrier instruction (MEMBAR). | ||
124 | membar | ||
125 | |||
126 | # (9) Read the DSTS register repeatedly until '1' stands in the | ||
127 | # DSTS.SSI field. | ||
128 | 1: ldi @(gr4,#SDRAMC_DSTS),gr3 | ||
129 | andicc gr3,#SDRAMC_DSTS_SSI,gr3,icc0 | ||
130 | beq icc0,#0,1b | ||
131 | |||
132 | # (10) Execute memory barrier instruction (MEMBAR). | ||
133 | membar | ||
134 | |||
135 | #if 1 | ||
136 | # (11) Set the value of CMODE that you want to change to | ||
137 | # SWCMODE.SWCM[3:0]. | ||
138 | sti gr8,@(gr5,#CLKC_SWCMODE) | ||
139 | |||
140 | # (12) Set '1' to the CLKC.SWEN bit. In that case, do not change | ||
141 | # fields other than SWEN of the CLKC register. | ||
142 | sti gr6,@(gr5,#0) | ||
143 | #endif | ||
144 | # (13) Execute the instruction just after the memory barrier | ||
145 | # instruction that executes the self-loop 256 times. (Meanwhile, | ||
146 | # the CMODE switch is done.) | ||
147 | membar | ||
148 | setlos #256,gr7 | ||
149 | 2: subicc gr7,#1,gr7,icc0 | ||
150 | bne icc0,#2,2b | ||
151 | |||
152 | LEDS 0x36 | ||
153 | |||
154 | # (14) Release the self-refresh of SDRAM. | ||
155 | sti gr0,@(gr4,#SDRAMC_DRCN) | ||
156 | |||
157 | # Wait for it... | ||
158 | 3: ldi @(gr4,#SDRAMC_DSTS),gr3 | ||
159 | andicc gr3,#SDRAMC_DSTS_SSI,gr3,icc0 | ||
160 | bne icc0,#2,3b | ||
161 | |||
162 | #if 0 | ||
163 | li 0x0100000,gr10 | ||
164 | 4: subicc gr10,#1,gr10,icc0 | ||
165 | |||
166 | bne icc0,#0,4b | ||
167 | #endif | ||
168 | |||
169 | __cmode_icache_lock_end: | ||
170 | |||
171 | li #__cmode_icache_lock_start,gr3 | ||
172 | li #__cmode_icache_lock_end,gr4 | ||
173 | |||
174 | 4: icul gr3 | ||
175 | addi gr3,#L1_CACHE_BYTES,gr3 | ||
176 | cmp gr4,gr3,icc0 | ||
177 | bhi icc0,#0,4b | ||
178 | |||
179 | #if 0 // Fujitsu recommend to skip this and will update docs. | ||
180 | # (15) Release the interrupt mask setting of the MASK register of | ||
181 | # the interrupt controller if necessary. | ||
182 | sti gr13,@(gr12,#0) | ||
183 | #endif | ||
184 | # (16) Set 1' in the PSR.ET bit, and permit interrupt. | ||
185 | movgs gr14,psr | ||
186 | |||
187 | bralr | ||
188 | |||
189 | .size frv_change_cmode, .-frv_change_cmode | ||
diff --git a/arch/frv/kernel/debug-stub.c b/arch/frv/kernel/debug-stub.c deleted file mode 100644 index a0228f717ef2..000000000000 --- a/arch/frv/kernel/debug-stub.c +++ /dev/null | |||
@@ -1,258 +0,0 @@ | |||
1 | /* debug-stub.c: debug-mode stub | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/string.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/signal.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/serial_reg.h> | ||
18 | #include <linux/start_kernel.h> | ||
19 | |||
20 | #include <asm/serial-regs.h> | ||
21 | #include <asm/timer-regs.h> | ||
22 | #include <asm/irc-regs.h> | ||
23 | #include <asm/gdb-stub.h> | ||
24 | #include "gdb-io.h" | ||
25 | |||
26 | /* CPU board CON5 */ | ||
27 | #define __UART0(X) (*(volatile uint8_t *)(UART0_BASE + (UART_##X))) | ||
28 | |||
29 | #define LSR_WAIT_FOR0(STATE) \ | ||
30 | do { \ | ||
31 | } while (!(__UART0(LSR) & UART_LSR_##STATE)) | ||
32 | |||
33 | #define FLOWCTL_QUERY0(LINE) ({ __UART0(MSR) & UART_MSR_##LINE; }) | ||
34 | #define FLOWCTL_CLEAR0(LINE) do { __UART0(MCR) &= ~UART_MCR_##LINE; } while (0) | ||
35 | #define FLOWCTL_SET0(LINE) do { __UART0(MCR) |= UART_MCR_##LINE; } while (0) | ||
36 | |||
37 | #define FLOWCTL_WAIT_FOR0(LINE) \ | ||
38 | do { \ | ||
39 | gdbstub_do_rx(); \ | ||
40 | } while(!FLOWCTL_QUERY(LINE)) | ||
41 | |||
42 | struct frv_debug_status __debug_status; | ||
43 | |||
44 | static void __init debug_stub_init(void); | ||
45 | |||
46 | /*****************************************************************************/ | ||
47 | /* | ||
48 | * debug mode handler stub | ||
49 | * - we come here with the CPU in debug mode and with exceptions disabled | ||
50 | * - handle debugging services for userspace | ||
51 | */ | ||
52 | asmlinkage void debug_stub(void) | ||
53 | { | ||
54 | unsigned long hsr0; | ||
55 | int type = 0; | ||
56 | |||
57 | static u8 inited = 0; | ||
58 | if (!inited) { | ||
59 | debug_stub_init(); | ||
60 | type = -1; | ||
61 | inited = 1; | ||
62 | } | ||
63 | |||
64 | hsr0 = __get_HSR(0); | ||
65 | if (hsr0 & HSR0_ETMD) | ||
66 | __set_HSR(0, hsr0 & ~HSR0_ETMD); | ||
67 | |||
68 | /* disable single stepping */ | ||
69 | __debug_status.dcr &= ~DCR_SE; | ||
70 | |||
71 | /* kernel mode can propose an exception be handled in debug mode by jumping to a special | ||
72 | * location */ | ||
73 | if (__debug_frame->pc == (unsigned long) __break_hijack_kernel_event_breaks_here) { | ||
74 | /* replace the debug frame with the kernel frame and discard | ||
75 | * the top kernel context */ | ||
76 | *__debug_frame = *__frame; | ||
77 | __frame = __debug_frame->next_frame; | ||
78 | __debug_status.brr = (__debug_frame->tbr & TBR_TT) << 12; | ||
79 | __debug_status.brr |= BRR_EB; | ||
80 | } | ||
81 | |||
82 | if (__debug_frame->pc == (unsigned long) __debug_bug_trap + 4) { | ||
83 | __debug_frame->pc = __debug_frame->lr; | ||
84 | type = __debug_frame->gr8; | ||
85 | } | ||
86 | |||
87 | #ifdef CONFIG_GDBSTUB | ||
88 | gdbstub(type); | ||
89 | #endif | ||
90 | |||
91 | if (hsr0 & HSR0_ETMD) | ||
92 | __set_HSR(0, __get_HSR(0) | HSR0_ETMD); | ||
93 | |||
94 | } /* end debug_stub() */ | ||
95 | |||
96 | /*****************************************************************************/ | ||
97 | /* | ||
98 | * debug stub initialisation | ||
99 | */ | ||
100 | static void __init debug_stub_init(void) | ||
101 | { | ||
102 | __set_IRR(6, 0xff000000); /* map ERRs to NMI */ | ||
103 | __set_IITMR(1, 0x20000000); /* ERR0/1, UART0/1 IRQ detect levels */ | ||
104 | |||
105 | asm volatile(" movgs gr0,ibar0 \n" | ||
106 | " movgs gr0,ibar1 \n" | ||
107 | " movgs gr0,ibar2 \n" | ||
108 | " movgs gr0,ibar3 \n" | ||
109 | " movgs gr0,dbar0 \n" | ||
110 | " movgs gr0,dbmr00 \n" | ||
111 | " movgs gr0,dbmr01 \n" | ||
112 | " movgs gr0,dbdr00 \n" | ||
113 | " movgs gr0,dbdr01 \n" | ||
114 | " movgs gr0,dbar1 \n" | ||
115 | " movgs gr0,dbmr10 \n" | ||
116 | " movgs gr0,dbmr11 \n" | ||
117 | " movgs gr0,dbdr10 \n" | ||
118 | " movgs gr0,dbdr11 \n" | ||
119 | ); | ||
120 | |||
121 | /* deal with debugging stub initialisation and initial pause */ | ||
122 | if (__debug_frame->pc == (unsigned long) __debug_stub_init_break) | ||
123 | __debug_frame->pc = (unsigned long) start_kernel; | ||
124 | |||
125 | /* enable the debug events we want to trap */ | ||
126 | __debug_status.dcr = DCR_EBE; | ||
127 | |||
128 | #ifdef CONFIG_GDBSTUB | ||
129 | gdbstub_init(); | ||
130 | #endif | ||
131 | |||
132 | __clr_MASK_all(); | ||
133 | __clr_MASK(15); | ||
134 | __clr_RC(15); | ||
135 | |||
136 | } /* end debug_stub_init() */ | ||
137 | |||
138 | /*****************************************************************************/ | ||
139 | /* | ||
140 | * kernel "exit" trap for gdb stub | ||
141 | */ | ||
142 | void debug_stub_exit(int status) | ||
143 | { | ||
144 | |||
145 | #ifdef CONFIG_GDBSTUB | ||
146 | gdbstub_exit(status); | ||
147 | #endif | ||
148 | |||
149 | } /* end debug_stub_exit() */ | ||
150 | |||
151 | /*****************************************************************************/ | ||
152 | /* | ||
153 | * send string to serial port | ||
154 | */ | ||
155 | void debug_to_serial(const char *p, int n) | ||
156 | { | ||
157 | char ch; | ||
158 | |||
159 | for (; n > 0; n--) { | ||
160 | ch = *p++; | ||
161 | FLOWCTL_SET0(DTR); | ||
162 | LSR_WAIT_FOR0(THRE); | ||
163 | // FLOWCTL_WAIT_FOR(CTS); | ||
164 | |||
165 | if (ch == 0x0a) { | ||
166 | __UART0(TX) = 0x0d; | ||
167 | mb(); | ||
168 | LSR_WAIT_FOR0(THRE); | ||
169 | // FLOWCTL_WAIT_FOR(CTS); | ||
170 | } | ||
171 | __UART0(TX) = ch; | ||
172 | mb(); | ||
173 | |||
174 | FLOWCTL_CLEAR0(DTR); | ||
175 | } | ||
176 | |||
177 | } /* end debug_to_serial() */ | ||
178 | |||
179 | /*****************************************************************************/ | ||
180 | /* | ||
181 | * send string to serial port | ||
182 | */ | ||
183 | void debug_to_serial2(const char *fmt, ...) | ||
184 | { | ||
185 | va_list va; | ||
186 | char buf[64]; | ||
187 | int n; | ||
188 | |||
189 | va_start(va, fmt); | ||
190 | n = vsprintf(buf, fmt, va); | ||
191 | va_end(va); | ||
192 | |||
193 | debug_to_serial(buf, n); | ||
194 | |||
195 | } /* end debug_to_serial2() */ | ||
196 | |||
197 | /*****************************************************************************/ | ||
198 | /* | ||
199 | * set up the ttyS0 serial port baud rate timers | ||
200 | */ | ||
201 | void __init console_set_baud(unsigned baud) | ||
202 | { | ||
203 | unsigned value, high, low; | ||
204 | u8 lcr; | ||
205 | |||
206 | /* work out the divisor to give us the nearest higher baud rate */ | ||
207 | value = __serial_clock_speed_HZ / 16 / baud; | ||
208 | |||
209 | /* determine the baud rate range */ | ||
210 | high = __serial_clock_speed_HZ / 16 / value; | ||
211 | low = __serial_clock_speed_HZ / 16 / (value + 1); | ||
212 | |||
213 | /* pick the nearest bound */ | ||
214 | if (low + (high - low) / 2 > baud) | ||
215 | value++; | ||
216 | |||
217 | lcr = __UART0(LCR); | ||
218 | __UART0(LCR) |= UART_LCR_DLAB; | ||
219 | mb(); | ||
220 | __UART0(DLL) = value & 0xff; | ||
221 | __UART0(DLM) = (value >> 8) & 0xff; | ||
222 | mb(); | ||
223 | __UART0(LCR) = lcr; | ||
224 | mb(); | ||
225 | |||
226 | } /* end console_set_baud() */ | ||
227 | |||
228 | /*****************************************************************************/ | ||
229 | /* | ||
230 | * | ||
231 | */ | ||
232 | int __init console_get_baud(void) | ||
233 | { | ||
234 | unsigned value; | ||
235 | u8 lcr; | ||
236 | |||
237 | lcr = __UART0(LCR); | ||
238 | __UART0(LCR) |= UART_LCR_DLAB; | ||
239 | mb(); | ||
240 | value = __UART0(DLM) << 8; | ||
241 | value |= __UART0(DLL); | ||
242 | __UART0(LCR) = lcr; | ||
243 | mb(); | ||
244 | |||
245 | return value; | ||
246 | } /* end console_get_baud() */ | ||
247 | |||
248 | /*****************************************************************************/ | ||
249 | /* | ||
250 | * display BUG() info | ||
251 | */ | ||
252 | #ifndef CONFIG_NO_KERNEL_MSG | ||
253 | void __debug_bug_printk(const char *file, unsigned line) | ||
254 | { | ||
255 | printk("kernel BUG at %s:%d!\n", file, line); | ||
256 | |||
257 | } /* end __debug_bug_printk() */ | ||
258 | #endif | ||
diff --git a/arch/frv/kernel/dma.c b/arch/frv/kernel/dma.c deleted file mode 100644 index 370dc9fa0b11..000000000000 --- a/arch/frv/kernel/dma.c +++ /dev/null | |||
@@ -1,463 +0,0 @@ | |||
1 | /* dma.c: DMA controller management on FR401 and the like | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/module.h> | ||
13 | #include <linux/sched.h> | ||
14 | #include <linux/spinlock.h> | ||
15 | #include <linux/errno.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <asm/dma.h> | ||
18 | #include <asm/gpio-regs.h> | ||
19 | #include <asm/irc-regs.h> | ||
20 | #include <asm/cpu-irqs.h> | ||
21 | |||
22 | struct frv_dma_channel { | ||
23 | uint8_t flags; | ||
24 | #define FRV_DMA_FLAGS_RESERVED 0x01 | ||
25 | #define FRV_DMA_FLAGS_INUSE 0x02 | ||
26 | #define FRV_DMA_FLAGS_PAUSED 0x04 | ||
27 | uint8_t cap; /* capabilities available */ | ||
28 | int irq; /* completion IRQ */ | ||
29 | uint32_t dreqbit; | ||
30 | uint32_t dackbit; | ||
31 | uint32_t donebit; | ||
32 | const unsigned long ioaddr; /* DMA controller regs addr */ | ||
33 | const char *devname; | ||
34 | dma_irq_handler_t handler; | ||
35 | void *data; | ||
36 | }; | ||
37 | |||
38 | |||
39 | #define __get_DMAC(IO,X) ({ *(volatile unsigned long *)((IO) + DMAC_##X##x); }) | ||
40 | |||
41 | #define __set_DMAC(IO,X,V) \ | ||
42 | do { \ | ||
43 | *(volatile unsigned long *)((IO) + DMAC_##X##x) = (V); \ | ||
44 | mb(); \ | ||
45 | } while(0) | ||
46 | |||
47 | #define ___set_DMAC(IO,X,V) \ | ||
48 | do { \ | ||
49 | *(volatile unsigned long *)((IO) + DMAC_##X##x) = (V); \ | ||
50 | } while(0) | ||
51 | |||
52 | |||
53 | static struct frv_dma_channel frv_dma_channels[FRV_DMA_NCHANS] = { | ||
54 | [0] = { | ||
55 | .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK | FRV_DMA_CAP_DONE, | ||
56 | .irq = IRQ_CPU_DMA0, | ||
57 | .dreqbit = SIR_DREQ0_INPUT, | ||
58 | .dackbit = SOR_DACK0_OUTPUT, | ||
59 | .donebit = SOR_DONE0_OUTPUT, | ||
60 | .ioaddr = 0xfe000900, | ||
61 | }, | ||
62 | [1] = { | ||
63 | .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK | FRV_DMA_CAP_DONE, | ||
64 | .irq = IRQ_CPU_DMA1, | ||
65 | .dreqbit = SIR_DREQ1_INPUT, | ||
66 | .dackbit = SOR_DACK1_OUTPUT, | ||
67 | .donebit = SOR_DONE1_OUTPUT, | ||
68 | .ioaddr = 0xfe000980, | ||
69 | }, | ||
70 | [2] = { | ||
71 | .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK, | ||
72 | .irq = IRQ_CPU_DMA2, | ||
73 | .dreqbit = SIR_DREQ2_INPUT, | ||
74 | .dackbit = SOR_DACK2_OUTPUT, | ||
75 | .ioaddr = 0xfe000a00, | ||
76 | }, | ||
77 | [3] = { | ||
78 | .cap = FRV_DMA_CAP_DREQ | FRV_DMA_CAP_DACK, | ||
79 | .irq = IRQ_CPU_DMA3, | ||
80 | .dreqbit = SIR_DREQ3_INPUT, | ||
81 | .dackbit = SOR_DACK3_OUTPUT, | ||
82 | .ioaddr = 0xfe000a80, | ||
83 | }, | ||
84 | [4] = { | ||
85 | .cap = FRV_DMA_CAP_DREQ, | ||
86 | .irq = IRQ_CPU_DMA4, | ||
87 | .dreqbit = SIR_DREQ4_INPUT, | ||
88 | .ioaddr = 0xfe001000, | ||
89 | }, | ||
90 | [5] = { | ||
91 | .cap = FRV_DMA_CAP_DREQ, | ||
92 | .irq = IRQ_CPU_DMA5, | ||
93 | .dreqbit = SIR_DREQ5_INPUT, | ||
94 | .ioaddr = 0xfe001080, | ||
95 | }, | ||
96 | [6] = { | ||
97 | .cap = FRV_DMA_CAP_DREQ, | ||
98 | .irq = IRQ_CPU_DMA6, | ||
99 | .dreqbit = SIR_DREQ6_INPUT, | ||
100 | .ioaddr = 0xfe001100, | ||
101 | }, | ||
102 | [7] = { | ||
103 | .cap = FRV_DMA_CAP_DREQ, | ||
104 | .irq = IRQ_CPU_DMA7, | ||
105 | .dreqbit = SIR_DREQ7_INPUT, | ||
106 | .ioaddr = 0xfe001180, | ||
107 | }, | ||
108 | }; | ||
109 | |||
110 | static DEFINE_RWLOCK(frv_dma_channels_lock); | ||
111 | |||
112 | unsigned int frv_dma_inprogress; | ||
113 | |||
114 | #define frv_clear_dma_inprogress(channel) \ | ||
115 | (void)__atomic32_fetch_and(~(1 << (channel)), &frv_dma_inprogress); | ||
116 | |||
117 | #define frv_set_dma_inprogress(channel) \ | ||
118 | (void)__atomic32_fetch_or(1 << (channel), &frv_dma_inprogress); | ||
119 | |||
120 | /*****************************************************************************/ | ||
121 | /* | ||
122 | * DMA irq handler - determine channel involved, grab status and call real handler | ||
123 | */ | ||
124 | static irqreturn_t dma_irq_handler(int irq, void *_channel) | ||
125 | { | ||
126 | struct frv_dma_channel *channel = _channel; | ||
127 | |||
128 | frv_clear_dma_inprogress(channel - frv_dma_channels); | ||
129 | return channel->handler(channel - frv_dma_channels, | ||
130 | __get_DMAC(channel->ioaddr, CSTR), | ||
131 | channel->data); | ||
132 | |||
133 | } /* end dma_irq_handler() */ | ||
134 | |||
135 | /*****************************************************************************/ | ||
136 | /* | ||
137 | * Determine which DMA controllers are present on this CPU | ||
138 | */ | ||
139 | void __init frv_dma_init(void) | ||
140 | { | ||
141 | unsigned long psr = __get_PSR(); | ||
142 | int num_dma, i; | ||
143 | |||
144 | /* First, determine how many DMA channels are available */ | ||
145 | switch (PSR_IMPLE(psr)) { | ||
146 | case PSR_IMPLE_FR405: | ||
147 | case PSR_IMPLE_FR451: | ||
148 | case PSR_IMPLE_FR501: | ||
149 | case PSR_IMPLE_FR551: | ||
150 | num_dma = FRV_DMA_8CHANS; | ||
151 | break; | ||
152 | |||
153 | case PSR_IMPLE_FR401: | ||
154 | default: | ||
155 | num_dma = FRV_DMA_4CHANS; | ||
156 | break; | ||
157 | } | ||
158 | |||
159 | /* Now mark all of the non-existent channels as reserved */ | ||
160 | for(i = num_dma; i < FRV_DMA_NCHANS; i++) | ||
161 | frv_dma_channels[i].flags = FRV_DMA_FLAGS_RESERVED; | ||
162 | |||
163 | } /* end frv_dma_init() */ | ||
164 | |||
165 | /*****************************************************************************/ | ||
166 | /* | ||
167 | * allocate a DMA controller channel and the IRQ associated with it | ||
168 | */ | ||
169 | int frv_dma_open(const char *devname, | ||
170 | unsigned long dmamask, | ||
171 | int dmacap, | ||
172 | dma_irq_handler_t handler, | ||
173 | unsigned long irq_flags, | ||
174 | void *data) | ||
175 | { | ||
176 | struct frv_dma_channel *channel; | ||
177 | int dma, ret; | ||
178 | uint32_t val; | ||
179 | |||
180 | write_lock(&frv_dma_channels_lock); | ||
181 | |||
182 | ret = -ENOSPC; | ||
183 | |||
184 | for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) { | ||
185 | channel = &frv_dma_channels[dma]; | ||
186 | |||
187 | if (!test_bit(dma, &dmamask)) | ||
188 | continue; | ||
189 | |||
190 | if ((channel->cap & dmacap) != dmacap) | ||
191 | continue; | ||
192 | |||
193 | if (!frv_dma_channels[dma].flags) | ||
194 | goto found; | ||
195 | } | ||
196 | |||
197 | goto out; | ||
198 | |||
199 | found: | ||
200 | ret = request_irq(channel->irq, dma_irq_handler, irq_flags, devname, channel); | ||
201 | if (ret < 0) | ||
202 | goto out; | ||
203 | |||
204 | /* okay, we've allocated all the resources */ | ||
205 | channel = &frv_dma_channels[dma]; | ||
206 | |||
207 | channel->flags |= FRV_DMA_FLAGS_INUSE; | ||
208 | channel->devname = devname; | ||
209 | channel->handler = handler; | ||
210 | channel->data = data; | ||
211 | |||
212 | /* Now make sure we are set up for DMA and not GPIO */ | ||
213 | /* SIR bit must be set for DMA to work */ | ||
214 | __set_SIR(channel->dreqbit | __get_SIR()); | ||
215 | /* SOR bits depend on what the caller requests */ | ||
216 | val = __get_SOR(); | ||
217 | if(dmacap & FRV_DMA_CAP_DACK) | ||
218 | val |= channel->dackbit; | ||
219 | else | ||
220 | val &= ~channel->dackbit; | ||
221 | if(dmacap & FRV_DMA_CAP_DONE) | ||
222 | val |= channel->donebit; | ||
223 | else | ||
224 | val &= ~channel->donebit; | ||
225 | __set_SOR(val); | ||
226 | |||
227 | ret = dma; | ||
228 | out: | ||
229 | write_unlock(&frv_dma_channels_lock); | ||
230 | return ret; | ||
231 | } /* end frv_dma_open() */ | ||
232 | |||
233 | EXPORT_SYMBOL(frv_dma_open); | ||
234 | |||
235 | /*****************************************************************************/ | ||
236 | /* | ||
237 | * close a DMA channel and its associated interrupt | ||
238 | */ | ||
239 | void frv_dma_close(int dma) | ||
240 | { | ||
241 | struct frv_dma_channel *channel = &frv_dma_channels[dma]; | ||
242 | unsigned long flags; | ||
243 | |||
244 | write_lock_irqsave(&frv_dma_channels_lock, flags); | ||
245 | |||
246 | free_irq(channel->irq, channel); | ||
247 | frv_dma_stop(dma); | ||
248 | |||
249 | channel->flags &= ~FRV_DMA_FLAGS_INUSE; | ||
250 | |||
251 | write_unlock_irqrestore(&frv_dma_channels_lock, flags); | ||
252 | } /* end frv_dma_close() */ | ||
253 | |||
254 | EXPORT_SYMBOL(frv_dma_close); | ||
255 | |||
256 | /*****************************************************************************/ | ||
257 | /* | ||
258 | * set static configuration on a DMA channel | ||
259 | */ | ||
260 | void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned long apr) | ||
261 | { | ||
262 | unsigned long ioaddr = frv_dma_channels[dma].ioaddr; | ||
263 | |||
264 | ___set_DMAC(ioaddr, CCFR, ccfr); | ||
265 | ___set_DMAC(ioaddr, CCTR, cctr); | ||
266 | ___set_DMAC(ioaddr, APR, apr); | ||
267 | mb(); | ||
268 | |||
269 | } /* end frv_dma_config() */ | ||
270 | |||
271 | EXPORT_SYMBOL(frv_dma_config); | ||
272 | |||
273 | /*****************************************************************************/ | ||
274 | /* | ||
275 | * start a DMA channel | ||
276 | */ | ||
277 | void frv_dma_start(int dma, | ||
278 | unsigned long sba, unsigned long dba, | ||
279 | unsigned long pix, unsigned long six, unsigned long bcl) | ||
280 | { | ||
281 | unsigned long ioaddr = frv_dma_channels[dma].ioaddr; | ||
282 | |||
283 | ___set_DMAC(ioaddr, SBA, sba); | ||
284 | ___set_DMAC(ioaddr, DBA, dba); | ||
285 | ___set_DMAC(ioaddr, PIX, pix); | ||
286 | ___set_DMAC(ioaddr, SIX, six); | ||
287 | ___set_DMAC(ioaddr, BCL, bcl); | ||
288 | ___set_DMAC(ioaddr, CSTR, 0); | ||
289 | mb(); | ||
290 | |||
291 | __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT); | ||
292 | frv_set_dma_inprogress(dma); | ||
293 | |||
294 | } /* end frv_dma_start() */ | ||
295 | |||
296 | EXPORT_SYMBOL(frv_dma_start); | ||
297 | |||
298 | /*****************************************************************************/ | ||
299 | /* | ||
300 | * restart a DMA channel that's been stopped in circular addressing mode by comparison-end | ||
301 | */ | ||
302 | void frv_dma_restart_circular(int dma, unsigned long six) | ||
303 | { | ||
304 | unsigned long ioaddr = frv_dma_channels[dma].ioaddr; | ||
305 | |||
306 | ___set_DMAC(ioaddr, SIX, six); | ||
307 | ___set_DMAC(ioaddr, CSTR, __get_DMAC(ioaddr, CSTR) & ~DMAC_CSTRx_CE); | ||
308 | mb(); | ||
309 | |||
310 | __set_DMAC(ioaddr, CCTR, __get_DMAC(ioaddr, CCTR) | DMAC_CCTRx_ACT); | ||
311 | frv_set_dma_inprogress(dma); | ||
312 | |||
313 | } /* end frv_dma_restart_circular() */ | ||
314 | |||
315 | EXPORT_SYMBOL(frv_dma_restart_circular); | ||
316 | |||
317 | /*****************************************************************************/ | ||
318 | /* | ||
319 | * stop a DMA channel | ||
320 | */ | ||
321 | void frv_dma_stop(int dma) | ||
322 | { | ||
323 | unsigned long ioaddr = frv_dma_channels[dma].ioaddr; | ||
324 | uint32_t cctr; | ||
325 | |||
326 | ___set_DMAC(ioaddr, CSTR, 0); | ||
327 | cctr = __get_DMAC(ioaddr, CCTR); | ||
328 | cctr &= ~(DMAC_CCTRx_IE | DMAC_CCTRx_ACT); | ||
329 | cctr |= DMAC_CCTRx_FC; /* fifo clear */ | ||
330 | __set_DMAC(ioaddr, CCTR, cctr); | ||
331 | __set_DMAC(ioaddr, BCL, 0); | ||
332 | frv_clear_dma_inprogress(dma); | ||
333 | } /* end frv_dma_stop() */ | ||
334 | |||
335 | EXPORT_SYMBOL(frv_dma_stop); | ||
336 | |||
337 | /*****************************************************************************/ | ||
338 | /* | ||
339 | * test interrupt status of DMA channel | ||
340 | */ | ||
341 | int is_frv_dma_interrupting(int dma) | ||
342 | { | ||
343 | unsigned long ioaddr = frv_dma_channels[dma].ioaddr; | ||
344 | |||
345 | return __get_DMAC(ioaddr, CSTR) & (1 << 23); | ||
346 | |||
347 | } /* end is_frv_dma_interrupting() */ | ||
348 | |||
349 | EXPORT_SYMBOL(is_frv_dma_interrupting); | ||
350 | |||
351 | /*****************************************************************************/ | ||
352 | /* | ||
353 | * dump data about a DMA channel | ||
354 | */ | ||
355 | void frv_dma_dump(int dma) | ||
356 | { | ||
357 | unsigned long ioaddr = frv_dma_channels[dma].ioaddr; | ||
358 | unsigned long cstr, pix, six, bcl; | ||
359 | |||
360 | cstr = __get_DMAC(ioaddr, CSTR); | ||
361 | pix = __get_DMAC(ioaddr, PIX); | ||
362 | six = __get_DMAC(ioaddr, SIX); | ||
363 | bcl = __get_DMAC(ioaddr, BCL); | ||
364 | |||
365 | printk("DMA[%d] cstr=%lx pix=%lx six=%lx bcl=%lx\n", dma, cstr, pix, six, bcl); | ||
366 | |||
367 | } /* end frv_dma_dump() */ | ||
368 | |||
369 | EXPORT_SYMBOL(frv_dma_dump); | ||
370 | |||
371 | /*****************************************************************************/ | ||
372 | /* | ||
373 | * pause all DMA controllers | ||
374 | * - called by clock mangling routines | ||
375 | * - caller must be holding interrupts disabled | ||
376 | */ | ||
377 | void frv_dma_pause_all(void) | ||
378 | { | ||
379 | struct frv_dma_channel *channel; | ||
380 | unsigned long ioaddr; | ||
381 | unsigned long cstr, cctr; | ||
382 | int dma; | ||
383 | |||
384 | write_lock(&frv_dma_channels_lock); | ||
385 | |||
386 | for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) { | ||
387 | channel = &frv_dma_channels[dma]; | ||
388 | |||
389 | if (!(channel->flags & FRV_DMA_FLAGS_INUSE)) | ||
390 | continue; | ||
391 | |||
392 | ioaddr = channel->ioaddr; | ||
393 | cctr = __get_DMAC(ioaddr, CCTR); | ||
394 | if (cctr & DMAC_CCTRx_ACT) { | ||
395 | cctr &= ~DMAC_CCTRx_ACT; | ||
396 | __set_DMAC(ioaddr, CCTR, cctr); | ||
397 | |||
398 | do { | ||
399 | cstr = __get_DMAC(ioaddr, CSTR); | ||
400 | } while (cstr & DMAC_CSTRx_BUSY); | ||
401 | |||
402 | if (cstr & DMAC_CSTRx_FED) | ||
403 | channel->flags |= FRV_DMA_FLAGS_PAUSED; | ||
404 | frv_clear_dma_inprogress(dma); | ||
405 | } | ||
406 | } | ||
407 | |||
408 | } /* end frv_dma_pause_all() */ | ||
409 | |||
410 | EXPORT_SYMBOL(frv_dma_pause_all); | ||
411 | |||
412 | /*****************************************************************************/ | ||
413 | /* | ||
414 | * resume paused DMA controllers | ||
415 | * - called by clock mangling routines | ||
416 | * - caller must be holding interrupts disabled | ||
417 | */ | ||
418 | void frv_dma_resume_all(void) | ||
419 | { | ||
420 | struct frv_dma_channel *channel; | ||
421 | unsigned long ioaddr; | ||
422 | unsigned long cstr, cctr; | ||
423 | int dma; | ||
424 | |||
425 | for (dma = FRV_DMA_NCHANS - 1; dma >= 0; dma--) { | ||
426 | channel = &frv_dma_channels[dma]; | ||
427 | |||
428 | if (!(channel->flags & FRV_DMA_FLAGS_PAUSED)) | ||
429 | continue; | ||
430 | |||
431 | ioaddr = channel->ioaddr; | ||
432 | cstr = __get_DMAC(ioaddr, CSTR); | ||
433 | cstr &= ~(DMAC_CSTRx_FED | DMAC_CSTRx_INT); | ||
434 | __set_DMAC(ioaddr, CSTR, cstr); | ||
435 | |||
436 | cctr = __get_DMAC(ioaddr, CCTR); | ||
437 | cctr |= DMAC_CCTRx_ACT; | ||
438 | __set_DMAC(ioaddr, CCTR, cctr); | ||
439 | |||
440 | channel->flags &= ~FRV_DMA_FLAGS_PAUSED; | ||
441 | frv_set_dma_inprogress(dma); | ||
442 | } | ||
443 | |||
444 | write_unlock(&frv_dma_channels_lock); | ||
445 | |||
446 | } /* end frv_dma_resume_all() */ | ||
447 | |||
448 | EXPORT_SYMBOL(frv_dma_resume_all); | ||
449 | |||
450 | /*****************************************************************************/ | ||
451 | /* | ||
452 | * dma status clear | ||
453 | */ | ||
454 | void frv_dma_status_clear(int dma) | ||
455 | { | ||
456 | unsigned long ioaddr = frv_dma_channels[dma].ioaddr; | ||
457 | uint32_t cctr; | ||
458 | ___set_DMAC(ioaddr, CSTR, 0); | ||
459 | |||
460 | cctr = __get_DMAC(ioaddr, CCTR); | ||
461 | } /* end frv_dma_status_clear() */ | ||
462 | |||
463 | EXPORT_SYMBOL(frv_dma_status_clear); | ||
diff --git a/arch/frv/kernel/entry-table.S b/arch/frv/kernel/entry-table.S deleted file mode 100644 index 06c5ae191e59..000000000000 --- a/arch/frv/kernel/entry-table.S +++ /dev/null | |||
@@ -1,329 +0,0 @@ | |||
1 | /* entry-table.S: main trap vector tables and exception jump table | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/sys.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/spr-regs.h> | ||
16 | |||
17 | ############################################################################### | ||
18 | # | ||
19 | # Declare the main trap and vector tables | ||
20 | # | ||
21 | # There are six tables: | ||
22 | # | ||
23 | # (1) The trap table for debug mode | ||
24 | # (2) The trap table for kernel mode | ||
25 | # (3) The trap table for user mode | ||
26 | # | ||
27 | # The CPU jumps to an appropriate slot in the appropriate table to perform | ||
28 | # exception processing. We have three different tables for the three | ||
29 | # different CPU modes because there is no hardware differentiation between | ||
30 | # stack pointers for these three modes, and so we have to invent one when | ||
31 | # crossing mode boundaries. | ||
32 | # | ||
33 | # (4) The exception handler vector table | ||
34 | # | ||
35 | # The user and kernel trap tables use the same prologue for normal | ||
36 | # exception processing. The prologue then jumps to the handler in this | ||
37 | # table, as indexed by the exception ID from the TBR. | ||
38 | # | ||
39 | # (5) The fixup table for kernel-trap single-step | ||
40 | # (6) The fixup table for user-trap single-step | ||
41 | # | ||
42 | # Due to the way single-stepping works on this CPU (single-step is not | ||
43 | # disabled when crossing exception boundaries, only when in debug mode), | ||
44 | # we have to catch the single-step event in break.S and jump to the fixup | ||
45 | # routine pointed to by this table. | ||
46 | # | ||
47 | # The linker script places the user mode and kernel mode trap tables on to | ||
48 | # the same 8Kb page, so that break.S can be more efficient when performing | ||
49 | # single-step bypass management | ||
50 | # | ||
51 | ############################################################################### | ||
52 | |||
53 | # trap table for entry from debug mode | ||
54 | .section .trap.break,"ax" | ||
55 | .balign 256*16 | ||
56 | .globl __entry_breaktrap_table | ||
57 | __entry_breaktrap_table: | ||
58 | |||
59 | # trap table for entry from user mode | ||
60 | .section .trap.user,"ax" | ||
61 | .balign 256*16 | ||
62 | .globl __entry_usertrap_table | ||
63 | __entry_usertrap_table: | ||
64 | |||
65 | # trap table for entry from kernel mode | ||
66 | .section .trap.kernel,"ax" | ||
67 | .balign 256*16 | ||
68 | .globl __entry_kerneltrap_table | ||
69 | __entry_kerneltrap_table: | ||
70 | |||
71 | # exception handler jump table | ||
72 | .section .trap.vector,"ax" | ||
73 | .balign 256*4 | ||
74 | .globl __entry_vector_table | ||
75 | __entry_vector_table: | ||
76 | |||
77 | # trap fixup table for single-stepping in user mode | ||
78 | .section .trap.fixup.user,"a" | ||
79 | .balign 256*4 | ||
80 | .globl __break_usertrap_fixup_table | ||
81 | __break_usertrap_fixup_table: | ||
82 | |||
83 | # trap fixup table for single-stepping in user mode | ||
84 | .section .trap.fixup.kernel,"a" | ||
85 | .balign 256*4 | ||
86 | .globl __break_kerneltrap_fixup_table | ||
87 | __break_kerneltrap_fixup_table: | ||
88 | |||
89 | # handler declaration for a software or program interrupt | ||
90 | .macro VECTOR_SOFTPROG tbr_tt, vec | ||
91 | .section .trap.user | ||
92 | .org \tbr_tt | ||
93 | bra __entry_uspace_softprog_interrupt | ||
94 | .section .trap.fixup.user | ||
95 | .org \tbr_tt >> 2 | ||
96 | .long __break_step_uspace_softprog_interrupt | ||
97 | .section .trap.kernel | ||
98 | .org \tbr_tt | ||
99 | bra __entry_kernel_softprog_interrupt | ||
100 | .section .trap.fixup.kernel | ||
101 | .org \tbr_tt >> 2 | ||
102 | .long __break_step_kernel_softprog_interrupt | ||
103 | .section .trap.vector | ||
104 | .org \tbr_tt >> 2 | ||
105 | .long \vec | ||
106 | .endm | ||
107 | |||
108 | # handler declaration for a maskable external interrupt | ||
109 | .macro VECTOR_IRQ tbr_tt, vec | ||
110 | .section .trap.user | ||
111 | .org \tbr_tt | ||
112 | bra __entry_uspace_external_interrupt | ||
113 | .section .trap.fixup.user | ||
114 | .org \tbr_tt >> 2 | ||
115 | .long __break_step_uspace_external_interrupt | ||
116 | .section .trap.kernel | ||
117 | .org \tbr_tt | ||
118 | # deal with virtual interrupt disablement | ||
119 | beq icc2,#0,__entry_kernel_external_interrupt_virtually_disabled | ||
120 | bra __entry_kernel_external_interrupt | ||
121 | .section .trap.fixup.kernel | ||
122 | .org \tbr_tt >> 2 | ||
123 | .long __break_step_kernel_external_interrupt | ||
124 | .section .trap.vector | ||
125 | .org \tbr_tt >> 2 | ||
126 | .long \vec | ||
127 | .endm | ||
128 | |||
129 | # handler declaration for an NMI external interrupt | ||
130 | .macro VECTOR_NMI tbr_tt, vec | ||
131 | .section .trap.user | ||
132 | .org \tbr_tt | ||
133 | break | ||
134 | break | ||
135 | break | ||
136 | break | ||
137 | .section .trap.kernel | ||
138 | .org \tbr_tt | ||
139 | break | ||
140 | break | ||
141 | break | ||
142 | break | ||
143 | .section .trap.vector | ||
144 | .org \tbr_tt >> 2 | ||
145 | .long \vec | ||
146 | .endm | ||
147 | |||
148 | # handler declaration for an MMU only software or program interrupt | ||
149 | .macro VECTOR_SP_MMU tbr_tt, vec | ||
150 | #ifdef CONFIG_MMU | ||
151 | VECTOR_SOFTPROG \tbr_tt, \vec | ||
152 | #else | ||
153 | VECTOR_NMI \tbr_tt, 0 | ||
154 | #endif | ||
155 | .endm | ||
156 | |||
157 | |||
158 | ############################################################################### | ||
159 | # | ||
160 | # specification of the vectors | ||
161 | # - note: each macro inserts code into multiple sections | ||
162 | # | ||
163 | ############################################################################### | ||
164 | VECTOR_SP_MMU TBR_TT_INSTR_MMU_MISS, __entry_insn_mmu_miss | ||
165 | VECTOR_SOFTPROG TBR_TT_INSTR_ACC_ERROR, __entry_insn_access_error | ||
166 | VECTOR_SOFTPROG TBR_TT_INSTR_ACC_EXCEP, __entry_insn_access_exception | ||
167 | VECTOR_SOFTPROG TBR_TT_PRIV_INSTR, __entry_privileged_instruction | ||
168 | VECTOR_SOFTPROG TBR_TT_ILLEGAL_INSTR, __entry_illegal_instruction | ||
169 | VECTOR_SOFTPROG TBR_TT_FP_EXCEPTION, __entry_media_exception | ||
170 | VECTOR_SOFTPROG TBR_TT_MP_EXCEPTION, __entry_media_exception | ||
171 | VECTOR_SOFTPROG TBR_TT_DATA_ACC_ERROR, __entry_data_access_error | ||
172 | VECTOR_SP_MMU TBR_TT_DATA_MMU_MISS, __entry_data_mmu_miss | ||
173 | VECTOR_SOFTPROG TBR_TT_DATA_ACC_EXCEP, __entry_data_access_exception | ||
174 | VECTOR_SOFTPROG TBR_TT_DATA_STR_ERROR, __entry_data_store_error | ||
175 | VECTOR_SOFTPROG TBR_TT_DIVISION_EXCEP, __entry_division_exception | ||
176 | |||
177 | #ifdef CONFIG_MMU | ||
178 | .section .trap.user | ||
179 | .org TBR_TT_INSTR_TLB_MISS | ||
180 | .globl __trap_user_insn_tlb_miss | ||
181 | __trap_user_insn_tlb_miss: | ||
182 | movsg ear0,gr28 /* faulting address */ | ||
183 | movsg scr0,gr31 /* get mapped PTD coverage start address */ | ||
184 | xor.p gr28,gr31,gr31 /* compare addresses */ | ||
185 | bra __entry_user_insn_tlb_miss | ||
186 | |||
187 | .org TBR_TT_DATA_TLB_MISS | ||
188 | .globl __trap_user_data_tlb_miss | ||
189 | __trap_user_data_tlb_miss: | ||
190 | movsg ear0,gr28 /* faulting address */ | ||
191 | movsg scr1,gr31 /* get mapped PTD coverage start address */ | ||
192 | xor.p gr28,gr31,gr31 /* compare addresses */ | ||
193 | bra __entry_user_data_tlb_miss | ||
194 | |||
195 | .section .trap.kernel | ||
196 | .org TBR_TT_INSTR_TLB_MISS | ||
197 | .globl __trap_kernel_insn_tlb_miss | ||
198 | __trap_kernel_insn_tlb_miss: | ||
199 | movsg ear0,gr29 /* faulting address */ | ||
200 | movsg scr0,gr31 /* get mapped PTD coverage start address */ | ||
201 | xor.p gr29,gr31,gr31 /* compare addresses */ | ||
202 | bra __entry_kernel_insn_tlb_miss | ||
203 | |||
204 | .org TBR_TT_DATA_TLB_MISS | ||
205 | .globl __trap_kernel_data_tlb_miss | ||
206 | __trap_kernel_data_tlb_miss: | ||
207 | movsg ear0,gr29 /* faulting address */ | ||
208 | movsg scr1,gr31 /* get mapped PTD coverage start address */ | ||
209 | xor.p gr29,gr31,gr31 /* compare addresses */ | ||
210 | bra __entry_kernel_data_tlb_miss | ||
211 | |||
212 | .section .trap.fixup.user | ||
213 | .org TBR_TT_INSTR_TLB_MISS >> 2 | ||
214 | .globl __trap_fixup_user_insn_tlb_miss | ||
215 | __trap_fixup_user_insn_tlb_miss: | ||
216 | .long __break_user_insn_tlb_miss | ||
217 | .org TBR_TT_DATA_TLB_MISS >> 2 | ||
218 | .globl __trap_fixup_user_data_tlb_miss | ||
219 | __trap_fixup_user_data_tlb_miss: | ||
220 | .long __break_user_data_tlb_miss | ||
221 | |||
222 | .section .trap.fixup.kernel | ||
223 | .org TBR_TT_INSTR_TLB_MISS >> 2 | ||
224 | .globl __trap_fixup_kernel_insn_tlb_miss | ||
225 | __trap_fixup_kernel_insn_tlb_miss: | ||
226 | .long __break_kernel_insn_tlb_miss | ||
227 | .org TBR_TT_DATA_TLB_MISS >> 2 | ||
228 | .globl __trap_fixup_kernel_data_tlb_miss | ||
229 | __trap_fixup_kernel_data_tlb_miss: | ||
230 | .long __break_kernel_data_tlb_miss | ||
231 | |||
232 | .section .trap.vector | ||
233 | .org TBR_TT_INSTR_TLB_MISS >> 2 | ||
234 | .long __entry_insn_mmu_fault | ||
235 | .org TBR_TT_DATA_TLB_MISS >> 2 | ||
236 | .long __entry_data_mmu_fault | ||
237 | #endif | ||
238 | |||
239 | VECTOR_SP_MMU TBR_TT_DATA_DAT_EXCEP, __entry_data_dat_fault | ||
240 | VECTOR_NMI TBR_TT_DECREMENT_TIMER, __entry_do_NMI | ||
241 | VECTOR_SOFTPROG TBR_TT_COMPOUND_EXCEP, __entry_compound_exception | ||
242 | VECTOR_IRQ TBR_TT_INTERRUPT_1, __entry_do_IRQ | ||
243 | VECTOR_IRQ TBR_TT_INTERRUPT_2, __entry_do_IRQ | ||
244 | VECTOR_IRQ TBR_TT_INTERRUPT_3, __entry_do_IRQ | ||
245 | VECTOR_IRQ TBR_TT_INTERRUPT_4, __entry_do_IRQ | ||
246 | VECTOR_IRQ TBR_TT_INTERRUPT_5, __entry_do_IRQ | ||
247 | VECTOR_IRQ TBR_TT_INTERRUPT_6, __entry_do_IRQ | ||
248 | VECTOR_IRQ TBR_TT_INTERRUPT_7, __entry_do_IRQ | ||
249 | VECTOR_IRQ TBR_TT_INTERRUPT_8, __entry_do_IRQ | ||
250 | VECTOR_IRQ TBR_TT_INTERRUPT_9, __entry_do_IRQ | ||
251 | VECTOR_IRQ TBR_TT_INTERRUPT_10, __entry_do_IRQ | ||
252 | VECTOR_IRQ TBR_TT_INTERRUPT_11, __entry_do_IRQ | ||
253 | VECTOR_IRQ TBR_TT_INTERRUPT_12, __entry_do_IRQ | ||
254 | VECTOR_IRQ TBR_TT_INTERRUPT_13, __entry_do_IRQ | ||
255 | VECTOR_IRQ TBR_TT_INTERRUPT_14, __entry_do_IRQ | ||
256 | VECTOR_NMI TBR_TT_INTERRUPT_15, __entry_do_NMI | ||
257 | |||
258 | # miscellaneous user mode entry points | ||
259 | .section .trap.user | ||
260 | .org TBR_TT_TRAP0 | ||
261 | .rept 127 | ||
262 | bra __entry_uspace_softprog_interrupt | ||
263 | .long 0,0,0 | ||
264 | .endr | ||
265 | .org TBR_TT_BREAK | ||
266 | bra __entry_break | ||
267 | .long 0,0,0 | ||
268 | |||
269 | .section .trap.fixup.user | ||
270 | .org TBR_TT_TRAP0 >> 2 | ||
271 | .rept 127 | ||
272 | .long __break_step_uspace_softprog_interrupt | ||
273 | .endr | ||
274 | .org TBR_TT_BREAK >> 2 | ||
275 | .long 0 | ||
276 | |||
277 | # miscellaneous kernel mode entry points | ||
278 | .section .trap.kernel | ||
279 | .org TBR_TT_TRAP0 | ||
280 | bra __entry_kernel_softprog_interrupt | ||
281 | .org TBR_TT_TRAP1 | ||
282 | bra __entry_kernel_softprog_interrupt | ||
283 | |||
284 | # trap #2 in kernel - reenable interrupts | ||
285 | .org TBR_TT_TRAP2 | ||
286 | bra __entry_kernel_external_interrupt_virtual_reenable | ||
287 | |||
288 | # miscellaneous kernel traps | ||
289 | .org TBR_TT_TRAP3 | ||
290 | .rept 124 | ||
291 | bra __entry_kernel_softprog_interrupt | ||
292 | .long 0,0,0 | ||
293 | .endr | ||
294 | .org TBR_TT_BREAK | ||
295 | bra __entry_break | ||
296 | .long 0,0,0 | ||
297 | |||
298 | .section .trap.fixup.kernel | ||
299 | .org TBR_TT_TRAP0 >> 2 | ||
300 | .long __break_step_kernel_softprog_interrupt | ||
301 | .long __break_step_kernel_softprog_interrupt | ||
302 | .long __break_step_kernel_external_interrupt_virtual_reenable | ||
303 | .rept 124 | ||
304 | .long __break_step_kernel_softprog_interrupt | ||
305 | .endr | ||
306 | .org TBR_TT_BREAK >> 2 | ||
307 | .long 0 | ||
308 | |||
309 | # miscellaneous debug mode entry points | ||
310 | .section .trap.break | ||
311 | .org TBR_TT_BREAK | ||
312 | movsg bpcsr,gr30 | ||
313 | jmpl @(gr30,gr0) | ||
314 | |||
315 | # miscellaneous vectors | ||
316 | .section .trap.vector | ||
317 | .org TBR_TT_TRAP0 >> 2 | ||
318 | .long system_call | ||
319 | .rept 119 | ||
320 | .long __entry_unsupported_trap | ||
321 | .endr | ||
322 | |||
323 | # userspace atomic op emulation, traps 120-126 | ||
324 | .rept 7 | ||
325 | .long __entry_atomic_op | ||
326 | .endr | ||
327 | |||
328 | .org TBR_TT_BREAK >> 2 | ||
329 | .long __entry_debug_exception | ||
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S deleted file mode 100644 index dfcd263c0517..000000000000 --- a/arch/frv/kernel/entry.S +++ /dev/null | |||
@@ -1,1519 +0,0 @@ | |||
1 | /* entry.S: FR-V entry | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * | ||
12 | * Entry to the kernel is "interesting": | ||
13 | * (1) There are no stack pointers, not even for the kernel | ||
14 | * (2) General Registers should not be clobbered | ||
15 | * (3) There are no kernel-only data registers | ||
16 | * (4) Since all addressing modes are wrt to a General Register, no global | ||
17 | * variables can be reached | ||
18 | * | ||
19 | * We deal with this by declaring that we shall kill GR28 on entering the | ||
20 | * kernel from userspace | ||
21 | * | ||
22 | * However, since break interrupts can interrupt the CPU even when PSR.ET==0, | ||
23 | * they can't rely on GR28 to be anything useful, and so need to clobber a | ||
24 | * separate register (GR31). Break interrupts are managed in break.S | ||
25 | * | ||
26 | * GR29 _is_ saved, and holds the current task pointer globally | ||
27 | * | ||
28 | */ | ||
29 | |||
30 | #include <linux/linkage.h> | ||
31 | #include <asm/thread_info.h> | ||
32 | #include <asm/setup.h> | ||
33 | #include <asm/segment.h> | ||
34 | #include <asm/ptrace.h> | ||
35 | #include <asm/errno.h> | ||
36 | #include <asm/cache.h> | ||
37 | #include <asm/spr-regs.h> | ||
38 | |||
39 | #define nr_syscalls ((syscall_table_size)/4) | ||
40 | |||
41 | .section .text..entry | ||
42 | .balign 4 | ||
43 | |||
44 | .macro LEDS val | ||
45 | # sethi.p %hi(0xe1200004),gr30 | ||
46 | # setlo %lo(0xe1200004),gr30 | ||
47 | # setlos #~\val,gr31 | ||
48 | # st gr31,@(gr30,gr0) | ||
49 | # sethi.p %hi(0xffc00100),gr30 | ||
50 | # setlo %lo(0xffc00100),gr30 | ||
51 | # sth gr0,@(gr30,gr0) | ||
52 | # membar | ||
53 | .endm | ||
54 | |||
55 | .macro LEDS32 | ||
56 | # not gr31,gr31 | ||
57 | # sethi.p %hi(0xe1200004),gr30 | ||
58 | # setlo %lo(0xe1200004),gr30 | ||
59 | # st.p gr31,@(gr30,gr0) | ||
60 | # srli gr31,#16,gr31 | ||
61 | # sethi.p %hi(0xffc00100),gr30 | ||
62 | # setlo %lo(0xffc00100),gr30 | ||
63 | # sth gr31,@(gr30,gr0) | ||
64 | # membar | ||
65 | .endm | ||
66 | |||
67 | ############################################################################### | ||
68 | # | ||
69 | # entry point for External interrupts received whilst executing userspace code | ||
70 | # | ||
71 | ############################################################################### | ||
72 | .globl __entry_uspace_external_interrupt | ||
73 | .type __entry_uspace_external_interrupt,@function | ||
74 | __entry_uspace_external_interrupt: | ||
75 | LEDS 0x6200 | ||
76 | sethi.p %hi(__kernel_frame0_ptr),gr28 | ||
77 | setlo %lo(__kernel_frame0_ptr),gr28 | ||
78 | ldi @(gr28,#0),gr28 | ||
79 | |||
80 | # handle h/w single-step through exceptions | ||
81 | sti gr0,@(gr28,#REG__STATUS) | ||
82 | |||
83 | .globl __entry_uspace_external_interrupt_reentry | ||
84 | __entry_uspace_external_interrupt_reentry: | ||
85 | LEDS 0x6201 | ||
86 | |||
87 | setlos #REG__END,gr30 | ||
88 | dcpl gr28,gr30,#0 | ||
89 | |||
90 | # finish building the exception frame | ||
91 | sti sp, @(gr28,#REG_SP) | ||
92 | stdi gr2, @(gr28,#REG_GR(2)) | ||
93 | stdi gr4, @(gr28,#REG_GR(4)) | ||
94 | stdi gr6, @(gr28,#REG_GR(6)) | ||
95 | stdi gr8, @(gr28,#REG_GR(8)) | ||
96 | stdi gr10,@(gr28,#REG_GR(10)) | ||
97 | stdi gr12,@(gr28,#REG_GR(12)) | ||
98 | stdi gr14,@(gr28,#REG_GR(14)) | ||
99 | stdi gr16,@(gr28,#REG_GR(16)) | ||
100 | stdi gr18,@(gr28,#REG_GR(18)) | ||
101 | stdi gr20,@(gr28,#REG_GR(20)) | ||
102 | stdi gr22,@(gr28,#REG_GR(22)) | ||
103 | stdi gr24,@(gr28,#REG_GR(24)) | ||
104 | stdi gr26,@(gr28,#REG_GR(26)) | ||
105 | sti gr0, @(gr28,#REG_GR(28)) | ||
106 | sti gr29,@(gr28,#REG_GR(29)) | ||
107 | stdi.p gr30,@(gr28,#REG_GR(30)) | ||
108 | |||
109 | # set up the kernel stack pointer | ||
110 | ori gr28,0,sp | ||
111 | |||
112 | movsg tbr ,gr20 | ||
113 | movsg psr ,gr22 | ||
114 | movsg pcsr,gr21 | ||
115 | movsg isr ,gr23 | ||
116 | movsg ccr ,gr24 | ||
117 | movsg cccr,gr25 | ||
118 | movsg lr ,gr26 | ||
119 | movsg lcr ,gr27 | ||
120 | |||
121 | setlos.p #-1,gr4 | ||
122 | andi gr22,#PSR_PS,gr5 /* try to rebuild original PSR value */ | ||
123 | andi.p gr22,#~(PSR_PS|PSR_S),gr6 | ||
124 | slli gr5,#1,gr5 | ||
125 | or gr6,gr5,gr5 | ||
126 | andi gr5,#~PSR_ET,gr5 | ||
127 | |||
128 | sti gr20,@(gr28,#REG_TBR) | ||
129 | sti gr21,@(gr28,#REG_PC) | ||
130 | sti gr5 ,@(gr28,#REG_PSR) | ||
131 | sti gr23,@(gr28,#REG_ISR) | ||
132 | stdi gr24,@(gr28,#REG_CCR) | ||
133 | stdi gr26,@(gr28,#REG_LR) | ||
134 | sti gr4 ,@(gr28,#REG_SYSCALLNO) | ||
135 | |||
136 | movsg iacc0h,gr4 | ||
137 | movsg iacc0l,gr5 | ||
138 | stdi gr4,@(gr28,#REG_IACC0) | ||
139 | |||
140 | movsg gner0,gr4 | ||
141 | movsg gner1,gr5 | ||
142 | stdi.p gr4,@(gr28,#REG_GNER0) | ||
143 | |||
144 | # interrupts start off fully disabled in the interrupt handler | ||
145 | subcc gr0,gr0,gr0,icc2 /* set Z and clear C */ | ||
146 | |||
147 | # set up kernel global registers | ||
148 | sethi.p %hi(__kernel_current_task),gr5 | ||
149 | setlo %lo(__kernel_current_task),gr5 | ||
150 | sethi.p %hi(_gp),gr16 | ||
151 | setlo %lo(_gp),gr16 | ||
152 | ldi @(gr5,#0),gr29 | ||
153 | ldi.p @(gr29,#4),gr15 ; __current_thread_info = current->thread_info | ||
154 | |||
155 | # make sure we (the kernel) get div-zero and misalignment exceptions | ||
156 | setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5 | ||
157 | movgs gr5,isr | ||
158 | |||
159 | # switch to the kernel trap table | ||
160 | sethi.p %hi(__entry_kerneltrap_table),gr6 | ||
161 | setlo %lo(__entry_kerneltrap_table),gr6 | ||
162 | movgs gr6,tbr | ||
163 | |||
164 | # set the return address | ||
165 | sethi.p %hi(__entry_return_from_user_interrupt),gr4 | ||
166 | setlo %lo(__entry_return_from_user_interrupt),gr4 | ||
167 | movgs gr4,lr | ||
168 | |||
169 | # raise the minimum interrupt priority to 15 (NMI only) and enable exceptions | ||
170 | movsg psr,gr4 | ||
171 | |||
172 | ori gr4,#PSR_PIL_14,gr4 | ||
173 | movgs gr4,psr | ||
174 | ori gr4,#PSR_PIL_14|PSR_ET,gr4 | ||
175 | movgs gr4,psr | ||
176 | |||
177 | LEDS 0x6202 | ||
178 | bra do_IRQ | ||
179 | |||
180 | .size __entry_uspace_external_interrupt,.-__entry_uspace_external_interrupt | ||
181 | |||
182 | ############################################################################### | ||
183 | # | ||
184 | # entry point for External interrupts received whilst executing kernel code | ||
185 | # - on arriving here, the following registers should already be set up: | ||
186 | # GR15 - current thread_info struct pointer | ||
187 | # GR16 - kernel GP-REL pointer | ||
188 | # GR29 - current task struct pointer | ||
189 | # TBR - kernel trap vector table | ||
190 | # ISR - kernel's preferred integer controls | ||
191 | # | ||
192 | ############################################################################### | ||
193 | .globl __entry_kernel_external_interrupt | ||
194 | .type __entry_kernel_external_interrupt,@function | ||
195 | __entry_kernel_external_interrupt: | ||
196 | LEDS 0x6210 | ||
197 | // sub sp,gr15,gr31 | ||
198 | // LEDS32 | ||
199 | |||
200 | # set up the stack pointer | ||
201 | or.p sp,gr0,gr30 | ||
202 | subi sp,#REG__END,sp | ||
203 | sti gr30,@(sp,#REG_SP) | ||
204 | |||
205 | # handle h/w single-step through exceptions | ||
206 | sti gr0,@(sp,#REG__STATUS) | ||
207 | |||
208 | .globl __entry_kernel_external_interrupt_reentry | ||
209 | __entry_kernel_external_interrupt_reentry: | ||
210 | LEDS 0x6211 | ||
211 | |||
212 | # set up the exception frame | ||
213 | setlos #REG__END,gr30 | ||
214 | dcpl sp,gr30,#0 | ||
215 | |||
216 | sti.p gr28,@(sp,#REG_GR(28)) | ||
217 | ori sp,0,gr28 | ||
218 | |||
219 | # finish building the exception frame | ||
220 | stdi gr2,@(gr28,#REG_GR(2)) | ||
221 | stdi gr4,@(gr28,#REG_GR(4)) | ||
222 | stdi gr6,@(gr28,#REG_GR(6)) | ||
223 | stdi gr8,@(gr28,#REG_GR(8)) | ||
224 | stdi gr10,@(gr28,#REG_GR(10)) | ||
225 | stdi gr12,@(gr28,#REG_GR(12)) | ||
226 | stdi gr14,@(gr28,#REG_GR(14)) | ||
227 | stdi gr16,@(gr28,#REG_GR(16)) | ||
228 | stdi gr18,@(gr28,#REG_GR(18)) | ||
229 | stdi gr20,@(gr28,#REG_GR(20)) | ||
230 | stdi gr22,@(gr28,#REG_GR(22)) | ||
231 | stdi gr24,@(gr28,#REG_GR(24)) | ||
232 | stdi gr26,@(gr28,#REG_GR(26)) | ||
233 | sti gr29,@(gr28,#REG_GR(29)) | ||
234 | stdi.p gr30,@(gr28,#REG_GR(30)) | ||
235 | |||
236 | # note virtual interrupts will be fully enabled upon return | ||
237 | subicc gr0,#1,gr0,icc2 /* clear Z, set C */ | ||
238 | |||
239 | movsg tbr ,gr20 | ||
240 | movsg psr ,gr22 | ||
241 | movsg pcsr,gr21 | ||
242 | movsg isr ,gr23 | ||
243 | movsg ccr ,gr24 | ||
244 | movsg cccr,gr25 | ||
245 | movsg lr ,gr26 | ||
246 | movsg lcr ,gr27 | ||
247 | |||
248 | setlos.p #-1,gr4 | ||
249 | andi gr22,#PSR_PS,gr5 /* try to rebuild original PSR value */ | ||
250 | andi.p gr22,#~(PSR_PS|PSR_S),gr6 | ||
251 | slli gr5,#1,gr5 | ||
252 | or gr6,gr5,gr5 | ||
253 | andi.p gr5,#~PSR_ET,gr5 | ||
254 | |||
255 | # set CCCR.CC3 to Undefined to abort atomic-modify completion inside the kernel | ||
256 | # - for an explanation of how it works, see: Documentation/frv/atomic-ops.txt | ||
257 | andi gr25,#~0xc0,gr25 | ||
258 | |||
259 | sti gr20,@(gr28,#REG_TBR) | ||
260 | sti gr21,@(gr28,#REG_PC) | ||
261 | sti gr5 ,@(gr28,#REG_PSR) | ||
262 | sti gr23,@(gr28,#REG_ISR) | ||
263 | stdi gr24,@(gr28,#REG_CCR) | ||
264 | stdi gr26,@(gr28,#REG_LR) | ||
265 | sti gr4 ,@(gr28,#REG_SYSCALLNO) | ||
266 | |||
267 | movsg iacc0h,gr4 | ||
268 | movsg iacc0l,gr5 | ||
269 | stdi gr4,@(gr28,#REG_IACC0) | ||
270 | |||
271 | movsg gner0,gr4 | ||
272 | movsg gner1,gr5 | ||
273 | stdi.p gr4,@(gr28,#REG_GNER0) | ||
274 | |||
275 | # interrupts start off fully disabled in the interrupt handler | ||
276 | subcc gr0,gr0,gr0,icc2 /* set Z and clear C */ | ||
277 | |||
278 | # set the return address | ||
279 | sethi.p %hi(__entry_return_from_kernel_interrupt),gr4 | ||
280 | setlo %lo(__entry_return_from_kernel_interrupt),gr4 | ||
281 | movgs gr4,lr | ||
282 | |||
283 | # clear power-saving mode flags | ||
284 | movsg hsr0,gr4 | ||
285 | andi gr4,#~HSR0_PDM,gr4 | ||
286 | movgs gr4,hsr0 | ||
287 | |||
288 | # raise the minimum interrupt priority to 15 (NMI only) and enable exceptions | ||
289 | movsg psr,gr4 | ||
290 | ori gr4,#PSR_PIL_14,gr4 | ||
291 | movgs gr4,psr | ||
292 | ori gr4,#PSR_ET,gr4 | ||
293 | movgs gr4,psr | ||
294 | |||
295 | LEDS 0x6212 | ||
296 | bra do_IRQ | ||
297 | |||
298 | .size __entry_kernel_external_interrupt,.-__entry_kernel_external_interrupt | ||
299 | |||
300 | ############################################################################### | ||
301 | # | ||
302 | # deal with interrupts that were actually virtually disabled | ||
303 | # - we need to really disable them, flag the fact and return immediately | ||
304 | # - if you change this, you must alter break.S also | ||
305 | # | ||
306 | ############################################################################### | ||
307 | .balign L1_CACHE_BYTES | ||
308 | .globl __entry_kernel_external_interrupt_virtually_disabled | ||
309 | .type __entry_kernel_external_interrupt_virtually_disabled,@function | ||
310 | __entry_kernel_external_interrupt_virtually_disabled: | ||
311 | movsg psr,gr30 | ||
312 | andi gr30,#~PSR_PIL,gr30 | ||
313 | ori gr30,#PSR_PIL_14,gr30 ; debugging interrupts only | ||
314 | movgs gr30,psr | ||
315 | subcc gr0,gr0,gr0,icc2 ; leave Z set, clear C | ||
316 | rett #0 | ||
317 | |||
318 | .size __entry_kernel_external_interrupt_virtually_disabled,.-__entry_kernel_external_interrupt_virtually_disabled | ||
319 | |||
320 | ############################################################################### | ||
321 | # | ||
322 | # deal with re-enablement of interrupts that were pending when virtually re-enabled | ||
323 | # - set ICC2.C, re-enable the real interrupts and return | ||
324 | # - we can clear ICC2.Z because we shouldn't be here if it's not 0 [due to TIHI] | ||
325 | # - if you change this, you must alter break.S also | ||
326 | # | ||
327 | ############################################################################### | ||
328 | .balign L1_CACHE_BYTES | ||
329 | .globl __entry_kernel_external_interrupt_virtual_reenable | ||
330 | .type __entry_kernel_external_interrupt_virtual_reenable,@function | ||
331 | __entry_kernel_external_interrupt_virtual_reenable: | ||
332 | movsg psr,gr30 | ||
333 | andi gr30,#~PSR_PIL,gr30 ; re-enable interrupts | ||
334 | movgs gr30,psr | ||
335 | subicc gr0,#1,gr0,icc2 ; clear Z, set C | ||
336 | rett #0 | ||
337 | |||
338 | .size __entry_kernel_external_interrupt_virtual_reenable,.-__entry_kernel_external_interrupt_virtual_reenable | ||
339 | |||
340 | ############################################################################### | ||
341 | # | ||
342 | # entry point for Software and Progam interrupts generated whilst executing userspace code | ||
343 | # | ||
344 | ############################################################################### | ||
345 | .globl __entry_uspace_softprog_interrupt | ||
346 | .type __entry_uspace_softprog_interrupt,@function | ||
347 | .globl __entry_uspace_handle_mmu_fault | ||
348 | __entry_uspace_softprog_interrupt: | ||
349 | LEDS 0x6000 | ||
350 | #ifdef CONFIG_MMU | ||
351 | movsg ear0,gr28 | ||
352 | __entry_uspace_handle_mmu_fault: | ||
353 | movgs gr28,scr2 | ||
354 | #endif | ||
355 | sethi.p %hi(__kernel_frame0_ptr),gr28 | ||
356 | setlo %lo(__kernel_frame0_ptr),gr28 | ||
357 | ldi @(gr28,#0),gr28 | ||
358 | |||
359 | # handle h/w single-step through exceptions | ||
360 | sti gr0,@(gr28,#REG__STATUS) | ||
361 | |||
362 | .globl __entry_uspace_softprog_interrupt_reentry | ||
363 | __entry_uspace_softprog_interrupt_reentry: | ||
364 | LEDS 0x6001 | ||
365 | |||
366 | setlos #REG__END,gr30 | ||
367 | dcpl gr28,gr30,#0 | ||
368 | |||
369 | # set up the kernel stack pointer | ||
370 | sti.p sp,@(gr28,#REG_SP) | ||
371 | ori gr28,0,sp | ||
372 | sti gr0,@(gr28,#REG_GR(28)) | ||
373 | |||
374 | stdi gr20,@(gr28,#REG_GR(20)) | ||
375 | stdi gr22,@(gr28,#REG_GR(22)) | ||
376 | |||
377 | movsg tbr,gr20 | ||
378 | movsg pcsr,gr21 | ||
379 | movsg psr,gr22 | ||
380 | |||
381 | sethi.p %hi(__entry_return_from_user_exception),gr23 | ||
382 | setlo %lo(__entry_return_from_user_exception),gr23 | ||
383 | |||
384 | bra __entry_common | ||
385 | |||
386 | .size __entry_uspace_softprog_interrupt,.-__entry_uspace_softprog_interrupt | ||
387 | |||
388 | # single-stepping was disabled on entry to a TLB handler that then faulted | ||
389 | #ifdef CONFIG_MMU | ||
390 | .globl __entry_uspace_handle_mmu_fault_sstep | ||
391 | __entry_uspace_handle_mmu_fault_sstep: | ||
392 | movgs gr28,scr2 | ||
393 | sethi.p %hi(__kernel_frame0_ptr),gr28 | ||
394 | setlo %lo(__kernel_frame0_ptr),gr28 | ||
395 | ldi @(gr28,#0),gr28 | ||
396 | |||
397 | # flag single-step re-enablement | ||
398 | sti gr0,@(gr28,#REG__STATUS) | ||
399 | bra __entry_uspace_softprog_interrupt_reentry | ||
400 | #endif | ||
401 | |||
402 | |||
403 | ############################################################################### | ||
404 | # | ||
405 | # entry point for Software and Progam interrupts generated whilst executing kernel code | ||
406 | # | ||
407 | ############################################################################### | ||
408 | .globl __entry_kernel_softprog_interrupt | ||
409 | .type __entry_kernel_softprog_interrupt,@function | ||
410 | __entry_kernel_softprog_interrupt: | ||
411 | LEDS 0x6004 | ||
412 | |||
413 | #ifdef CONFIG_MMU | ||
414 | movsg ear0,gr30 | ||
415 | movgs gr30,scr2 | ||
416 | #endif | ||
417 | |||
418 | .globl __entry_kernel_handle_mmu_fault | ||
419 | __entry_kernel_handle_mmu_fault: | ||
420 | # set up the stack pointer | ||
421 | subi sp,#REG__END,sp | ||
422 | sti sp,@(sp,#REG_SP) | ||
423 | sti sp,@(sp,#REG_SP-4) | ||
424 | andi sp,#~7,sp | ||
425 | |||
426 | # handle h/w single-step through exceptions | ||
427 | sti gr0,@(sp,#REG__STATUS) | ||
428 | |||
429 | .globl __entry_kernel_softprog_interrupt_reentry | ||
430 | __entry_kernel_softprog_interrupt_reentry: | ||
431 | LEDS 0x6005 | ||
432 | |||
433 | setlos #REG__END,gr30 | ||
434 | dcpl sp,gr30,#0 | ||
435 | |||
436 | # set up the exception frame | ||
437 | sti.p gr28,@(sp,#REG_GR(28)) | ||
438 | ori sp,0,gr28 | ||
439 | |||
440 | stdi gr20,@(gr28,#REG_GR(20)) | ||
441 | stdi gr22,@(gr28,#REG_GR(22)) | ||
442 | |||
443 | ldi @(sp,#REG_SP),gr22 /* reconstruct the old SP */ | ||
444 | addi gr22,#REG__END,gr22 | ||
445 | sti gr22,@(sp,#REG_SP) | ||
446 | |||
447 | # set CCCR.CC3 to Undefined to abort atomic-modify completion inside the kernel | ||
448 | # - for an explanation of how it works, see: Documentation/frv/atomic-ops.txt | ||
449 | movsg cccr,gr20 | ||
450 | andi gr20,#~0xc0,gr20 | ||
451 | movgs gr20,cccr | ||
452 | |||
453 | movsg tbr,gr20 | ||
454 | movsg pcsr,gr21 | ||
455 | movsg psr,gr22 | ||
456 | |||
457 | sethi.p %hi(__entry_return_from_kernel_exception),gr23 | ||
458 | setlo %lo(__entry_return_from_kernel_exception),gr23 | ||
459 | bra __entry_common | ||
460 | |||
461 | .size __entry_kernel_softprog_interrupt,.-__entry_kernel_softprog_interrupt | ||
462 | |||
463 | # single-stepping was disabled on entry to a TLB handler that then faulted | ||
464 | #ifdef CONFIG_MMU | ||
465 | .globl __entry_kernel_handle_mmu_fault_sstep | ||
466 | __entry_kernel_handle_mmu_fault_sstep: | ||
467 | # set up the stack pointer | ||
468 | subi sp,#REG__END,sp | ||
469 | sti sp,@(sp,#REG_SP) | ||
470 | sti sp,@(sp,#REG_SP-4) | ||
471 | andi sp,#~7,sp | ||
472 | |||
473 | # flag single-step re-enablement | ||
474 | sethi #REG__STATUS_STEP,gr30 | ||
475 | sti gr30,@(sp,#REG__STATUS) | ||
476 | bra __entry_kernel_softprog_interrupt_reentry | ||
477 | #endif | ||
478 | |||
479 | |||
480 | ############################################################################### | ||
481 | # | ||
482 | # the rest of the kernel entry point code | ||
483 | # - on arriving here, the following registers should be set up: | ||
484 | # GR1 - kernel stack pointer | ||
485 | # GR7 - syscall number (trap 0 only) | ||
486 | # GR8-13 - syscall args (trap 0 only) | ||
487 | # GR20 - saved TBR | ||
488 | # GR21 - saved PC | ||
489 | # GR22 - saved PSR | ||
490 | # GR23 - return handler address | ||
491 | # GR28 - exception frame on stack | ||
492 | # SCR2 - saved EAR0 where applicable (clobbered by ICI & ICEF insns on FR451) | ||
493 | # PSR - PSR.S 1, PSR.ET 0 | ||
494 | # | ||
495 | ############################################################################### | ||
496 | .globl __entry_common | ||
497 | .type __entry_common,@function | ||
498 | __entry_common: | ||
499 | LEDS 0x6008 | ||
500 | |||
501 | # finish building the exception frame | ||
502 | stdi gr2,@(gr28,#REG_GR(2)) | ||
503 | stdi gr4,@(gr28,#REG_GR(4)) | ||
504 | stdi gr6,@(gr28,#REG_GR(6)) | ||
505 | stdi gr8,@(gr28,#REG_GR(8)) | ||
506 | stdi gr10,@(gr28,#REG_GR(10)) | ||
507 | stdi gr12,@(gr28,#REG_GR(12)) | ||
508 | stdi gr14,@(gr28,#REG_GR(14)) | ||
509 | stdi gr16,@(gr28,#REG_GR(16)) | ||
510 | stdi gr18,@(gr28,#REG_GR(18)) | ||
511 | stdi gr24,@(gr28,#REG_GR(24)) | ||
512 | stdi gr26,@(gr28,#REG_GR(26)) | ||
513 | sti gr29,@(gr28,#REG_GR(29)) | ||
514 | stdi gr30,@(gr28,#REG_GR(30)) | ||
515 | |||
516 | movsg lcr ,gr27 | ||
517 | movsg lr ,gr26 | ||
518 | movgs gr23,lr | ||
519 | movsg cccr,gr25 | ||
520 | movsg ccr ,gr24 | ||
521 | movsg isr ,gr23 | ||
522 | |||
523 | setlos.p #-1,gr4 | ||
524 | andi gr22,#PSR_PS,gr5 /* try to rebuild original PSR value */ | ||
525 | andi.p gr22,#~(PSR_PS|PSR_S),gr6 | ||
526 | slli gr5,#1,gr5 | ||
527 | or gr6,gr5,gr5 | ||
528 | andi gr5,#~PSR_ET,gr5 | ||
529 | |||
530 | sti gr20,@(gr28,#REG_TBR) | ||
531 | sti gr21,@(gr28,#REG_PC) | ||
532 | sti gr5 ,@(gr28,#REG_PSR) | ||
533 | sti gr23,@(gr28,#REG_ISR) | ||
534 | stdi gr24,@(gr28,#REG_CCR) | ||
535 | stdi gr26,@(gr28,#REG_LR) | ||
536 | sti gr4 ,@(gr28,#REG_SYSCALLNO) | ||
537 | |||
538 | movsg iacc0h,gr4 | ||
539 | movsg iacc0l,gr5 | ||
540 | stdi gr4,@(gr28,#REG_IACC0) | ||
541 | |||
542 | movsg gner0,gr4 | ||
543 | movsg gner1,gr5 | ||
544 | stdi.p gr4,@(gr28,#REG_GNER0) | ||
545 | |||
546 | # set up virtual interrupt disablement | ||
547 | subicc gr0,#1,gr0,icc2 /* clear Z flag, set C flag */ | ||
548 | |||
549 | # set up kernel global registers | ||
550 | sethi.p %hi(__kernel_current_task),gr5 | ||
551 | setlo %lo(__kernel_current_task),gr5 | ||
552 | sethi.p %hi(_gp),gr16 | ||
553 | setlo %lo(_gp),gr16 | ||
554 | ldi @(gr5,#0),gr29 | ||
555 | ldi @(gr29,#4),gr15 ; __current_thread_info = current->thread_info | ||
556 | |||
557 | # switch to the kernel trap table | ||
558 | sethi.p %hi(__entry_kerneltrap_table),gr6 | ||
559 | setlo %lo(__entry_kerneltrap_table),gr6 | ||
560 | movgs gr6,tbr | ||
561 | |||
562 | # make sure we (the kernel) get div-zero and misalignment exceptions | ||
563 | setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5 | ||
564 | movgs gr5,isr | ||
565 | |||
566 | # clear power-saving mode flags | ||
567 | movsg hsr0,gr4 | ||
568 | andi gr4,#~HSR0_PDM,gr4 | ||
569 | movgs gr4,hsr0 | ||
570 | |||
571 | # multiplex again using old TBR as a guide | ||
572 | setlos.p #TBR_TT,gr3 | ||
573 | sethi %hi(__entry_vector_table),gr6 | ||
574 | and.p gr20,gr3,gr5 | ||
575 | setlo %lo(__entry_vector_table),gr6 | ||
576 | srli gr5,#2,gr5 | ||
577 | ld @(gr5,gr6),gr5 | ||
578 | |||
579 | LEDS 0x6009 | ||
580 | jmpl @(gr5,gr0) | ||
581 | |||
582 | |||
583 | .size __entry_common,.-__entry_common | ||
584 | |||
585 | ############################################################################### | ||
586 | # | ||
587 | # handle instruction MMU fault | ||
588 | # | ||
589 | ############################################################################### | ||
590 | #ifdef CONFIG_MMU | ||
591 | .globl __entry_insn_mmu_fault | ||
592 | __entry_insn_mmu_fault: | ||
593 | LEDS 0x6010 | ||
594 | setlos #0,gr8 | ||
595 | movsg esr0,gr9 | ||
596 | movsg scr2,gr10 | ||
597 | |||
598 | # now that we've accessed the exception regs, we can enable exceptions | ||
599 | movsg psr,gr4 | ||
600 | ori gr4,#PSR_ET,gr4 | ||
601 | movgs gr4,psr | ||
602 | |||
603 | sethi.p %hi(do_page_fault),gr5 | ||
604 | setlo %lo(do_page_fault),gr5 | ||
605 | jmpl @(gr5,gr0) ; call do_page_fault(0,esr0,ear0) | ||
606 | #endif | ||
607 | |||
608 | |||
609 | ############################################################################### | ||
610 | # | ||
611 | # handle instruction access error | ||
612 | # | ||
613 | ############################################################################### | ||
614 | .globl __entry_insn_access_error | ||
615 | __entry_insn_access_error: | ||
616 | LEDS 0x6011 | ||
617 | sethi.p %hi(insn_access_error),gr5 | ||
618 | setlo %lo(insn_access_error),gr5 | ||
619 | movsg esfr1,gr8 | ||
620 | movsg epcr0,gr9 | ||
621 | movsg esr0,gr10 | ||
622 | |||
623 | # now that we've accessed the exception regs, we can enable exceptions | ||
624 | movsg psr,gr4 | ||
625 | ori gr4,#PSR_ET,gr4 | ||
626 | movgs gr4,psr | ||
627 | jmpl @(gr5,gr0) ; call insn_access_error(esfr1,epcr0,esr0) | ||
628 | |||
629 | ############################################################################### | ||
630 | # | ||
631 | # handle various instructions of dubious legality | ||
632 | # | ||
633 | ############################################################################### | ||
634 | .globl __entry_unsupported_trap | ||
635 | .globl __entry_illegal_instruction | ||
636 | .globl __entry_privileged_instruction | ||
637 | .globl __entry_debug_exception | ||
638 | __entry_unsupported_trap: | ||
639 | subi gr21,#4,gr21 | ||
640 | sti gr21,@(gr28,#REG_PC) | ||
641 | __entry_illegal_instruction: | ||
642 | __entry_privileged_instruction: | ||
643 | __entry_debug_exception: | ||
644 | LEDS 0x6012 | ||
645 | sethi.p %hi(illegal_instruction),gr5 | ||
646 | setlo %lo(illegal_instruction),gr5 | ||
647 | movsg esfr1,gr8 | ||
648 | movsg epcr0,gr9 | ||
649 | movsg esr0,gr10 | ||
650 | |||
651 | # now that we've accessed the exception regs, we can enable exceptions | ||
652 | movsg psr,gr4 | ||
653 | ori gr4,#PSR_ET,gr4 | ||
654 | movgs gr4,psr | ||
655 | jmpl @(gr5,gr0) ; call ill_insn(esfr1,epcr0,esr0) | ||
656 | |||
657 | ############################################################################### | ||
658 | # | ||
659 | # handle atomic operation emulation for userspace | ||
660 | # | ||
661 | ############################################################################### | ||
662 | .globl __entry_atomic_op | ||
663 | __entry_atomic_op: | ||
664 | LEDS 0x6012 | ||
665 | sethi.p %hi(atomic_operation),gr5 | ||
666 | setlo %lo(atomic_operation),gr5 | ||
667 | movsg esfr1,gr8 | ||
668 | movsg epcr0,gr9 | ||
669 | movsg esr0,gr10 | ||
670 | |||
671 | # now that we've accessed the exception regs, we can enable exceptions | ||
672 | movsg psr,gr4 | ||
673 | ori gr4,#PSR_ET,gr4 | ||
674 | movgs gr4,psr | ||
675 | jmpl @(gr5,gr0) ; call atomic_operation(esfr1,epcr0,esr0) | ||
676 | |||
677 | ############################################################################### | ||
678 | # | ||
679 | # handle media exception | ||
680 | # | ||
681 | ############################################################################### | ||
682 | .globl __entry_media_exception | ||
683 | __entry_media_exception: | ||
684 | LEDS 0x6013 | ||
685 | sethi.p %hi(media_exception),gr5 | ||
686 | setlo %lo(media_exception),gr5 | ||
687 | movsg msr0,gr8 | ||
688 | movsg msr1,gr9 | ||
689 | |||
690 | # now that we've accessed the exception regs, we can enable exceptions | ||
691 | movsg psr,gr4 | ||
692 | ori gr4,#PSR_ET,gr4 | ||
693 | movgs gr4,psr | ||
694 | jmpl @(gr5,gr0) ; call media_excep(msr0,msr1) | ||
695 | |||
696 | ############################################################################### | ||
697 | # | ||
698 | # handle data MMU fault | ||
699 | # handle data DAT fault (write-protect exception) | ||
700 | # | ||
701 | ############################################################################### | ||
702 | #ifdef CONFIG_MMU | ||
703 | .globl __entry_data_mmu_fault | ||
704 | __entry_data_mmu_fault: | ||
705 | .globl __entry_data_dat_fault | ||
706 | __entry_data_dat_fault: | ||
707 | LEDS 0x6014 | ||
708 | setlos #1,gr8 | ||
709 | movsg esr0,gr9 | ||
710 | movsg scr2,gr10 ; saved EAR0 | ||
711 | |||
712 | # now that we've accessed the exception regs, we can enable exceptions | ||
713 | movsg psr,gr4 | ||
714 | ori gr4,#PSR_ET,gr4 | ||
715 | movgs gr4,psr | ||
716 | |||
717 | sethi.p %hi(do_page_fault),gr5 | ||
718 | setlo %lo(do_page_fault),gr5 | ||
719 | jmpl @(gr5,gr0) ; call do_page_fault(1,esr0,ear0) | ||
720 | #endif | ||
721 | |||
722 | ############################################################################### | ||
723 | # | ||
724 | # handle data and instruction access exceptions | ||
725 | # | ||
726 | ############################################################################### | ||
727 | .globl __entry_insn_access_exception | ||
728 | .globl __entry_data_access_exception | ||
729 | __entry_insn_access_exception: | ||
730 | __entry_data_access_exception: | ||
731 | LEDS 0x6016 | ||
732 | sethi.p %hi(memory_access_exception),gr5 | ||
733 | setlo %lo(memory_access_exception),gr5 | ||
734 | movsg esr0,gr8 | ||
735 | movsg scr2,gr9 ; saved EAR0 | ||
736 | movsg epcr0,gr10 | ||
737 | |||
738 | # now that we've accessed the exception regs, we can enable exceptions | ||
739 | movsg psr,gr4 | ||
740 | ori gr4,#PSR_ET,gr4 | ||
741 | movgs gr4,psr | ||
742 | jmpl @(gr5,gr0) ; call memory_access_error(esr0,ear0,epcr0) | ||
743 | |||
744 | ############################################################################### | ||
745 | # | ||
746 | # handle data access error | ||
747 | # | ||
748 | ############################################################################### | ||
749 | .globl __entry_data_access_error | ||
750 | __entry_data_access_error: | ||
751 | LEDS 0x6016 | ||
752 | sethi.p %hi(data_access_error),gr5 | ||
753 | setlo %lo(data_access_error),gr5 | ||
754 | movsg esfr1,gr8 | ||
755 | movsg esr15,gr9 | ||
756 | movsg ear15,gr10 | ||
757 | |||
758 | # now that we've accessed the exception regs, we can enable exceptions | ||
759 | movsg psr,gr4 | ||
760 | ori gr4,#PSR_ET,gr4 | ||
761 | movgs gr4,psr | ||
762 | jmpl @(gr5,gr0) ; call data_access_error(esfr1,esr15,ear15) | ||
763 | |||
764 | ############################################################################### | ||
765 | # | ||
766 | # handle data store error | ||
767 | # | ||
768 | ############################################################################### | ||
769 | .globl __entry_data_store_error | ||
770 | __entry_data_store_error: | ||
771 | LEDS 0x6017 | ||
772 | sethi.p %hi(data_store_error),gr5 | ||
773 | setlo %lo(data_store_error),gr5 | ||
774 | movsg esfr1,gr8 | ||
775 | movsg esr14,gr9 | ||
776 | |||
777 | # now that we've accessed the exception regs, we can enable exceptions | ||
778 | movsg psr,gr4 | ||
779 | ori gr4,#PSR_ET,gr4 | ||
780 | movgs gr4,psr | ||
781 | jmpl @(gr5,gr0) ; call data_store_error(esfr1,esr14) | ||
782 | |||
783 | ############################################################################### | ||
784 | # | ||
785 | # handle division exception | ||
786 | # | ||
787 | ############################################################################### | ||
788 | .globl __entry_division_exception | ||
789 | __entry_division_exception: | ||
790 | LEDS 0x6018 | ||
791 | sethi.p %hi(division_exception),gr5 | ||
792 | setlo %lo(division_exception),gr5 | ||
793 | movsg esfr1,gr8 | ||
794 | movsg esr0,gr9 | ||
795 | movsg isr,gr10 | ||
796 | |||
797 | # now that we've accessed the exception regs, we can enable exceptions | ||
798 | movsg psr,gr4 | ||
799 | ori gr4,#PSR_ET,gr4 | ||
800 | movgs gr4,psr | ||
801 | jmpl @(gr5,gr0) ; call div_excep(esfr1,esr0,isr) | ||
802 | |||
803 | ############################################################################### | ||
804 | # | ||
805 | # handle compound exception | ||
806 | # | ||
807 | ############################################################################### | ||
808 | .globl __entry_compound_exception | ||
809 | __entry_compound_exception: | ||
810 | LEDS 0x6019 | ||
811 | sethi.p %hi(compound_exception),gr5 | ||
812 | setlo %lo(compound_exception),gr5 | ||
813 | movsg esfr1,gr8 | ||
814 | movsg esr0,gr9 | ||
815 | movsg esr14,gr10 | ||
816 | movsg esr15,gr11 | ||
817 | movsg msr0,gr12 | ||
818 | movsg msr1,gr13 | ||
819 | |||
820 | # now that we've accessed the exception regs, we can enable exceptions | ||
821 | movsg psr,gr4 | ||
822 | ori gr4,#PSR_ET,gr4 | ||
823 | movgs gr4,psr | ||
824 | jmpl @(gr5,gr0) ; call comp_excep(esfr1,esr0,esr14,esr15,msr0,msr1) | ||
825 | |||
826 | ############################################################################### | ||
827 | # | ||
828 | # handle interrupts and NMIs | ||
829 | # | ||
830 | ############################################################################### | ||
831 | .globl __entry_do_IRQ | ||
832 | __entry_do_IRQ: | ||
833 | LEDS 0x6020 | ||
834 | |||
835 | # we can enable exceptions | ||
836 | movsg psr,gr4 | ||
837 | ori gr4,#PSR_ET,gr4 | ||
838 | movgs gr4,psr | ||
839 | bra do_IRQ | ||
840 | |||
841 | .globl __entry_do_NMI | ||
842 | __entry_do_NMI: | ||
843 | LEDS 0x6021 | ||
844 | |||
845 | # we can enable exceptions | ||
846 | movsg psr,gr4 | ||
847 | ori gr4,#PSR_ET,gr4 | ||
848 | movgs gr4,psr | ||
849 | bra do_NMI | ||
850 | |||
851 | ############################################################################### | ||
852 | # | ||
853 | # the return path for a newly forked child process | ||
854 | # - __switch_to() saved the old current pointer in GR8 for us | ||
855 | # | ||
856 | ############################################################################### | ||
857 | .globl ret_from_fork | ||
858 | ret_from_fork: | ||
859 | LEDS 0x6100 | ||
860 | call schedule_tail | ||
861 | |||
862 | # fork & co. return 0 to child | ||
863 | setlos.p #0,gr8 | ||
864 | bra __syscall_exit | ||
865 | |||
866 | .globl ret_from_kernel_thread | ||
867 | ret_from_kernel_thread: | ||
868 | lddi.p @(gr28,#REG_GR(8)),gr20 | ||
869 | call schedule_tail | ||
870 | calll.p @(gr21,gr0) | ||
871 | or gr20,gr20,gr8 | ||
872 | bra __syscall_exit | ||
873 | |||
874 | ################################################################################################### | ||
875 | # | ||
876 | # Return to user mode is not as complex as all this looks, | ||
877 | # but we want the default path for a system call return to | ||
878 | # go as quickly as possible which is why some of this is | ||
879 | # less clear than it otherwise should be. | ||
880 | # | ||
881 | ################################################################################################### | ||
882 | .balign L1_CACHE_BYTES | ||
883 | .globl system_call | ||
884 | system_call: | ||
885 | LEDS 0x6101 | ||
886 | movsg psr,gr4 ; enable exceptions | ||
887 | ori gr4,#PSR_ET,gr4 | ||
888 | movgs gr4,psr | ||
889 | |||
890 | sti gr7,@(gr28,#REG_SYSCALLNO) | ||
891 | sti.p gr8,@(gr28,#REG_ORIG_GR8) | ||
892 | |||
893 | subicc gr7,#nr_syscalls,gr0,icc0 | ||
894 | bnc icc0,#0,__syscall_badsys | ||
895 | |||
896 | ldi @(gr15,#TI_FLAGS),gr4 | ||
897 | andicc gr4,#_TIF_SYSCALL_TRACE,gr0,icc0 | ||
898 | bne icc0,#0,__syscall_trace_entry | ||
899 | |||
900 | __syscall_call: | ||
901 | slli.p gr7,#2,gr7 | ||
902 | sethi %hi(sys_call_table),gr5 | ||
903 | setlo %lo(sys_call_table),gr5 | ||
904 | ld @(gr5,gr7),gr4 | ||
905 | calll @(gr4,gr0) | ||
906 | |||
907 | |||
908 | ############################################################################### | ||
909 | # | ||
910 | # return to interrupted process | ||
911 | # | ||
912 | ############################################################################### | ||
913 | __syscall_exit: | ||
914 | LEDS 0x6300 | ||
915 | |||
916 | # keep current PSR in GR23 | ||
917 | movsg psr,gr23 | ||
918 | |||
919 | ldi @(gr28,#REG_PSR),gr22 | ||
920 | |||
921 | sti.p gr8,@(gr28,#REG_GR(8)) ; save return value | ||
922 | |||
923 | # rebuild saved psr - execve will change it for init/main.c | ||
924 | srli gr22,#1,gr5 | ||
925 | andi.p gr22,#~PSR_PS,gr22 | ||
926 | andi gr5,#PSR_PS,gr5 | ||
927 | or gr5,gr22,gr22 | ||
928 | ori.p gr22,#PSR_S,gr22 | ||
929 | |||
930 | # make sure we don't miss an interrupt setting need_resched or sigpending between | ||
931 | # sampling and the RETT | ||
932 | ori gr23,#PSR_PIL_14,gr23 | ||
933 | movgs gr23,psr | ||
934 | |||
935 | ldi @(gr15,#TI_FLAGS),gr4 | ||
936 | andicc gr4,#_TIF_ALLWORK_MASK,gr0,icc0 | ||
937 | bne icc0,#0,__syscall_exit_work | ||
938 | |||
939 | # restore all registers and return | ||
940 | __entry_return_direct: | ||
941 | LEDS 0x6301 | ||
942 | |||
943 | andi gr22,#~PSR_ET,gr22 | ||
944 | movgs gr22,psr | ||
945 | |||
946 | ldi @(gr28,#REG_ISR),gr23 | ||
947 | lddi @(gr28,#REG_CCR),gr24 | ||
948 | lddi @(gr28,#REG_LR) ,gr26 | ||
949 | ldi @(gr28,#REG_PC) ,gr21 | ||
950 | ldi @(gr28,#REG_TBR),gr20 | ||
951 | |||
952 | movgs gr20,tbr | ||
953 | movgs gr21,pcsr | ||
954 | movgs gr23,isr | ||
955 | movgs gr24,ccr | ||
956 | movgs gr25,cccr | ||
957 | movgs gr26,lr | ||
958 | movgs gr27,lcr | ||
959 | |||
960 | lddi @(gr28,#REG_GNER0),gr4 | ||
961 | movgs gr4,gner0 | ||
962 | movgs gr5,gner1 | ||
963 | |||
964 | lddi @(gr28,#REG_IACC0),gr4 | ||
965 | movgs gr4,iacc0h | ||
966 | movgs gr5,iacc0l | ||
967 | |||
968 | lddi @(gr28,#REG_GR(4)) ,gr4 | ||
969 | lddi @(gr28,#REG_GR(6)) ,gr6 | ||
970 | lddi @(gr28,#REG_GR(8)) ,gr8 | ||
971 | lddi @(gr28,#REG_GR(10)),gr10 | ||
972 | lddi @(gr28,#REG_GR(12)),gr12 | ||
973 | lddi @(gr28,#REG_GR(14)),gr14 | ||
974 | lddi @(gr28,#REG_GR(16)),gr16 | ||
975 | lddi @(gr28,#REG_GR(18)),gr18 | ||
976 | lddi @(gr28,#REG_GR(20)),gr20 | ||
977 | lddi @(gr28,#REG_GR(22)),gr22 | ||
978 | lddi @(gr28,#REG_GR(24)),gr24 | ||
979 | lddi @(gr28,#REG_GR(26)),gr26 | ||
980 | ldi @(gr28,#REG_GR(29)),gr29 | ||
981 | lddi @(gr28,#REG_GR(30)),gr30 | ||
982 | |||
983 | # check to see if a debugging return is required | ||
984 | LEDS 0x67f0 | ||
985 | movsg ccr,gr2 | ||
986 | ldi @(gr28,#REG__STATUS),gr3 | ||
987 | andicc gr3,#REG__STATUS_STEP,gr0,icc0 | ||
988 | bne icc0,#0,__entry_return_singlestep | ||
989 | movgs gr2,ccr | ||
990 | |||
991 | ldi @(gr28,#REG_SP) ,sp | ||
992 | lddi @(gr28,#REG_GR(2)) ,gr2 | ||
993 | ldi @(gr28,#REG_GR(28)),gr28 | ||
994 | |||
995 | LEDS 0x67fe | ||
996 | // movsg pcsr,gr31 | ||
997 | // LEDS32 | ||
998 | |||
999 | #if 0 | ||
1000 | # store the current frame in the workram on the FR451 | ||
1001 | movgs gr28,scr2 | ||
1002 | sethi.p %hi(0xfe800000),gr28 | ||
1003 | setlo %lo(0xfe800000),gr28 | ||
1004 | |||
1005 | stdi gr2,@(gr28,#REG_GR(2)) | ||
1006 | stdi gr4,@(gr28,#REG_GR(4)) | ||
1007 | stdi gr6,@(gr28,#REG_GR(6)) | ||
1008 | stdi gr8,@(gr28,#REG_GR(8)) | ||
1009 | stdi gr10,@(gr28,#REG_GR(10)) | ||
1010 | stdi gr12,@(gr28,#REG_GR(12)) | ||
1011 | stdi gr14,@(gr28,#REG_GR(14)) | ||
1012 | stdi gr16,@(gr28,#REG_GR(16)) | ||
1013 | stdi gr18,@(gr28,#REG_GR(18)) | ||
1014 | stdi gr24,@(gr28,#REG_GR(24)) | ||
1015 | stdi gr26,@(gr28,#REG_GR(26)) | ||
1016 | sti gr29,@(gr28,#REG_GR(29)) | ||
1017 | stdi gr30,@(gr28,#REG_GR(30)) | ||
1018 | |||
1019 | movsg tbr ,gr30 | ||
1020 | sti gr30,@(gr28,#REG_TBR) | ||
1021 | movsg pcsr,gr30 | ||
1022 | sti gr30,@(gr28,#REG_PC) | ||
1023 | movsg psr ,gr30 | ||
1024 | sti gr30,@(gr28,#REG_PSR) | ||
1025 | movsg isr ,gr30 | ||
1026 | sti gr30,@(gr28,#REG_ISR) | ||
1027 | movsg ccr ,gr30 | ||
1028 | movsg cccr,gr31 | ||
1029 | stdi gr30,@(gr28,#REG_CCR) | ||
1030 | movsg lr ,gr30 | ||
1031 | movsg lcr ,gr31 | ||
1032 | stdi gr30,@(gr28,#REG_LR) | ||
1033 | sti gr0 ,@(gr28,#REG_SYSCALLNO) | ||
1034 | movsg scr2,gr28 | ||
1035 | #endif | ||
1036 | |||
1037 | rett #0 | ||
1038 | |||
1039 | # return via break.S | ||
1040 | __entry_return_singlestep: | ||
1041 | movgs gr2,ccr | ||
1042 | lddi @(gr28,#REG_GR(2)) ,gr2 | ||
1043 | ldi @(gr28,#REG_SP) ,sp | ||
1044 | ldi @(gr28,#REG_GR(28)),gr28 | ||
1045 | LEDS 0x67ff | ||
1046 | break | ||
1047 | .globl __entry_return_singlestep_breaks_here | ||
1048 | __entry_return_singlestep_breaks_here: | ||
1049 | nop | ||
1050 | |||
1051 | |||
1052 | ############################################################################### | ||
1053 | # | ||
1054 | # return to a process interrupted in kernel space | ||
1055 | # - we need to consider preemption if that is enabled | ||
1056 | # | ||
1057 | ############################################################################### | ||
1058 | .balign L1_CACHE_BYTES | ||
1059 | __entry_return_from_kernel_exception: | ||
1060 | LEDS 0x6302 | ||
1061 | movsg psr,gr23 | ||
1062 | ori gr23,#PSR_PIL_14,gr23 | ||
1063 | movgs gr23,psr | ||
1064 | bra __entry_return_direct | ||
1065 | |||
1066 | .balign L1_CACHE_BYTES | ||
1067 | __entry_return_from_kernel_interrupt: | ||
1068 | LEDS 0x6303 | ||
1069 | movsg psr,gr23 | ||
1070 | ori gr23,#PSR_PIL_14,gr23 | ||
1071 | movgs gr23,psr | ||
1072 | |||
1073 | #ifdef CONFIG_PREEMPT | ||
1074 | ldi @(gr15,#TI_PRE_COUNT),gr5 | ||
1075 | subicc gr5,#0,gr0,icc0 | ||
1076 | beq icc0,#0,__entry_return_direct | ||
1077 | |||
1078 | subcc gr0,gr0,gr0,icc2 /* set Z and clear C */ | ||
1079 | call preempt_schedule_irq | ||
1080 | #endif | ||
1081 | bra __entry_return_direct | ||
1082 | |||
1083 | |||
1084 | ############################################################################### | ||
1085 | # | ||
1086 | # perform work that needs to be done immediately before resumption | ||
1087 | # | ||
1088 | ############################################################################### | ||
1089 | .globl __entry_return_from_user_exception | ||
1090 | .balign L1_CACHE_BYTES | ||
1091 | __entry_return_from_user_exception: | ||
1092 | LEDS 0x6501 | ||
1093 | |||
1094 | __entry_resume_userspace: | ||
1095 | # make sure we don't miss an interrupt setting need_resched or sigpending between | ||
1096 | # sampling and the RETT | ||
1097 | movsg psr,gr23 | ||
1098 | ori gr23,#PSR_PIL_14,gr23 | ||
1099 | movgs gr23,psr | ||
1100 | |||
1101 | __entry_return_from_user_interrupt: | ||
1102 | LEDS 0x6402 | ||
1103 | ldi @(gr15,#TI_FLAGS),gr4 | ||
1104 | andicc gr4,#_TIF_WORK_MASK,gr0,icc0 | ||
1105 | beq icc0,#1,__entry_return_direct | ||
1106 | |||
1107 | __entry_work_pending: | ||
1108 | LEDS 0x6404 | ||
1109 | andicc gr4,#_TIF_NEED_RESCHED,gr0,icc0 | ||
1110 | beq icc0,#1,__entry_work_notifysig | ||
1111 | |||
1112 | __entry_work_resched: | ||
1113 | LEDS 0x6408 | ||
1114 | movsg psr,gr23 | ||
1115 | andi gr23,#~PSR_PIL,gr23 | ||
1116 | movgs gr23,psr | ||
1117 | call schedule | ||
1118 | movsg psr,gr23 | ||
1119 | ori gr23,#PSR_PIL_14,gr23 | ||
1120 | movgs gr23,psr | ||
1121 | |||
1122 | LEDS 0x6401 | ||
1123 | ldi @(gr15,#TI_FLAGS),gr4 | ||
1124 | andicc gr4,#_TIF_WORK_MASK,gr0,icc0 | ||
1125 | beq icc0,#1,__entry_return_direct | ||
1126 | andicc gr4,#_TIF_NEED_RESCHED,gr0,icc0 | ||
1127 | bne icc0,#1,__entry_work_resched | ||
1128 | |||
1129 | __entry_work_notifysig: | ||
1130 | LEDS 0x6410 | ||
1131 | ori.p gr4,#0,gr8 | ||
1132 | call do_notify_resume | ||
1133 | bra __entry_resume_userspace | ||
1134 | |||
1135 | # perform syscall entry tracing | ||
1136 | __syscall_trace_entry: | ||
1137 | LEDS 0x6320 | ||
1138 | call syscall_trace_entry | ||
1139 | |||
1140 | lddi.p @(gr28,#REG_GR(8)) ,gr8 | ||
1141 | ori gr8,#0,gr7 ; syscall_trace_entry() returned new syscallno | ||
1142 | lddi @(gr28,#REG_GR(10)),gr10 | ||
1143 | lddi.p @(gr28,#REG_GR(12)),gr12 | ||
1144 | |||
1145 | subicc gr7,#nr_syscalls,gr0,icc0 | ||
1146 | bnc icc0,#0,__syscall_badsys | ||
1147 | bra __syscall_call | ||
1148 | |||
1149 | # perform syscall exit tracing | ||
1150 | __syscall_exit_work: | ||
1151 | LEDS 0x6340 | ||
1152 | andicc gr22,#PSR_PS,gr0,icc1 ; don't handle on return to kernel mode | ||
1153 | andicc.p gr4,#_TIF_SYSCALL_TRACE,gr0,icc0 | ||
1154 | bne icc1,#0,__entry_return_direct | ||
1155 | beq icc0,#1,__entry_work_pending | ||
1156 | |||
1157 | movsg psr,gr23 | ||
1158 | andi gr23,#~PSR_PIL,gr23 ; could let syscall_trace_exit() call schedule() | ||
1159 | movgs gr23,psr | ||
1160 | |||
1161 | call syscall_trace_exit | ||
1162 | bra __entry_resume_userspace | ||
1163 | |||
1164 | __syscall_badsys: | ||
1165 | LEDS 0x6380 | ||
1166 | setlos #-ENOSYS,gr8 | ||
1167 | sti gr8,@(gr28,#REG_GR(8)) ; save return value | ||
1168 | bra __entry_resume_userspace | ||
1169 | |||
1170 | |||
1171 | ############################################################################### | ||
1172 | # | ||
1173 | # syscall vector table | ||
1174 | # | ||
1175 | ############################################################################### | ||
1176 | .section .rodata | ||
1177 | ALIGN | ||
1178 | .globl sys_call_table | ||
1179 | sys_call_table: | ||
1180 | .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */ | ||
1181 | .long sys_exit | ||
1182 | .long sys_fork | ||
1183 | .long sys_read | ||
1184 | .long sys_write | ||
1185 | .long sys_open /* 5 */ | ||
1186 | .long sys_close | ||
1187 | .long sys_waitpid | ||
1188 | .long sys_creat | ||
1189 | .long sys_link | ||
1190 | .long sys_unlink /* 10 */ | ||
1191 | .long sys_execve | ||
1192 | .long sys_chdir | ||
1193 | .long sys_time | ||
1194 | .long sys_mknod | ||
1195 | .long sys_chmod /* 15 */ | ||
1196 | .long sys_lchown16 | ||
1197 | .long sys_ni_syscall /* old break syscall holder */ | ||
1198 | .long sys_stat | ||
1199 | .long sys_lseek | ||
1200 | .long sys_getpid /* 20 */ | ||
1201 | .long sys_mount | ||
1202 | .long sys_oldumount | ||
1203 | .long sys_setuid16 | ||
1204 | .long sys_getuid16 | ||
1205 | .long sys_ni_syscall // sys_stime /* 25 */ | ||
1206 | .long sys_ptrace | ||
1207 | .long sys_alarm | ||
1208 | .long sys_fstat | ||
1209 | .long sys_pause | ||
1210 | .long sys_utime /* 30 */ | ||
1211 | .long sys_ni_syscall /* old stty syscall holder */ | ||
1212 | .long sys_ni_syscall /* old gtty syscall holder */ | ||
1213 | .long sys_access | ||
1214 | .long sys_nice | ||
1215 | .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */ | ||
1216 | .long sys_sync | ||
1217 | .long sys_kill | ||
1218 | .long sys_rename | ||
1219 | .long sys_mkdir | ||
1220 | .long sys_rmdir /* 40 */ | ||
1221 | .long sys_dup | ||
1222 | .long sys_pipe | ||
1223 | .long sys_times | ||
1224 | .long sys_ni_syscall /* old prof syscall holder */ | ||
1225 | .long sys_brk /* 45 */ | ||
1226 | .long sys_setgid16 | ||
1227 | .long sys_getgid16 | ||
1228 | .long sys_ni_syscall // sys_signal | ||
1229 | .long sys_geteuid16 | ||
1230 | .long sys_getegid16 /* 50 */ | ||
1231 | .long sys_acct | ||
1232 | .long sys_umount /* recycled never used phys( */ | ||
1233 | .long sys_ni_syscall /* old lock syscall holder */ | ||
1234 | .long sys_ioctl | ||
1235 | .long sys_fcntl /* 55 */ | ||
1236 | .long sys_ni_syscall /* old mpx syscall holder */ | ||
1237 | .long sys_setpgid | ||
1238 | .long sys_ni_syscall /* old ulimit syscall holder */ | ||
1239 | .long sys_ni_syscall /* old old uname syscall */ | ||
1240 | .long sys_umask /* 60 */ | ||
1241 | .long sys_chroot | ||
1242 | .long sys_ustat | ||
1243 | .long sys_dup2 | ||
1244 | .long sys_getppid | ||
1245 | .long sys_getpgrp /* 65 */ | ||
1246 | .long sys_setsid | ||
1247 | .long sys_sigaction | ||
1248 | .long sys_ni_syscall // sys_sgetmask | ||
1249 | .long sys_ni_syscall // sys_ssetmask | ||
1250 | .long sys_setreuid16 /* 70 */ | ||
1251 | .long sys_setregid16 | ||
1252 | .long sys_sigsuspend | ||
1253 | .long sys_ni_syscall // sys_sigpending | ||
1254 | .long sys_sethostname | ||
1255 | .long sys_setrlimit /* 75 */ | ||
1256 | .long sys_ni_syscall // sys_old_getrlimit | ||
1257 | .long sys_getrusage | ||
1258 | .long sys_gettimeofday | ||
1259 | .long sys_settimeofday | ||
1260 | .long sys_getgroups16 /* 80 */ | ||
1261 | .long sys_setgroups16 | ||
1262 | .long sys_ni_syscall /* old_select slot */ | ||
1263 | .long sys_symlink | ||
1264 | .long sys_lstat | ||
1265 | .long sys_readlink /* 85 */ | ||
1266 | .long sys_uselib | ||
1267 | .long sys_swapon | ||
1268 | .long sys_reboot | ||
1269 | .long sys_ni_syscall // old_readdir | ||
1270 | .long sys_ni_syscall /* 90 */ /* old_mmap slot */ | ||
1271 | .long sys_munmap | ||
1272 | .long sys_truncate | ||
1273 | .long sys_ftruncate | ||
1274 | .long sys_fchmod | ||
1275 | .long sys_fchown16 /* 95 */ | ||
1276 | .long sys_getpriority | ||
1277 | .long sys_setpriority | ||
1278 | .long sys_ni_syscall /* old profil syscall holder */ | ||
1279 | .long sys_statfs | ||
1280 | .long sys_fstatfs /* 100 */ | ||
1281 | .long sys_ni_syscall /* ioperm for i386 */ | ||
1282 | .long sys_socketcall | ||
1283 | .long sys_syslog | ||
1284 | .long sys_setitimer | ||
1285 | .long sys_getitimer /* 105 */ | ||
1286 | .long sys_newstat | ||
1287 | .long sys_newlstat | ||
1288 | .long sys_newfstat | ||
1289 | .long sys_ni_syscall /* obsolete olduname( syscall */ | ||
1290 | .long sys_ni_syscall /* iopl for i386 */ /* 110 */ | ||
1291 | .long sys_vhangup | ||
1292 | .long sys_ni_syscall /* obsolete idle( syscall */ | ||
1293 | .long sys_ni_syscall /* vm86old for i386 */ | ||
1294 | .long sys_wait4 | ||
1295 | .long sys_swapoff /* 115 */ | ||
1296 | .long sys_sysinfo | ||
1297 | .long sys_ipc | ||
1298 | .long sys_fsync | ||
1299 | .long sys_sigreturn | ||
1300 | .long sys_clone /* 120 */ | ||
1301 | .long sys_setdomainname | ||
1302 | .long sys_newuname | ||
1303 | .long sys_ni_syscall /* old "cacheflush" */ | ||
1304 | .long sys_adjtimex | ||
1305 | .long sys_mprotect /* 125 */ | ||
1306 | .long sys_sigprocmask | ||
1307 | .long sys_ni_syscall /* old "create_module" */ | ||
1308 | .long sys_init_module | ||
1309 | .long sys_delete_module | ||
1310 | .long sys_ni_syscall /* old "get_kernel_syms" */ | ||
1311 | .long sys_quotactl | ||
1312 | .long sys_getpgid | ||
1313 | .long sys_fchdir | ||
1314 | .long sys_bdflush | ||
1315 | .long sys_sysfs /* 135 */ | ||
1316 | .long sys_personality | ||
1317 | .long sys_ni_syscall /* for afs_syscall */ | ||
1318 | .long sys_setfsuid16 | ||
1319 | .long sys_setfsgid16 | ||
1320 | .long sys_llseek /* 140 */ | ||
1321 | .long sys_getdents | ||
1322 | .long sys_select | ||
1323 | .long sys_flock | ||
1324 | .long sys_msync | ||
1325 | .long sys_readv /* 145 */ | ||
1326 | .long sys_writev | ||
1327 | .long sys_getsid | ||
1328 | .long sys_fdatasync | ||
1329 | .long sys_sysctl | ||
1330 | .long sys_mlock /* 150 */ | ||
1331 | .long sys_munlock | ||
1332 | .long sys_mlockall | ||
1333 | .long sys_munlockall | ||
1334 | .long sys_sched_setparam | ||
1335 | .long sys_sched_getparam /* 155 */ | ||
1336 | .long sys_sched_setscheduler | ||
1337 | .long sys_sched_getscheduler | ||
1338 | .long sys_sched_yield | ||
1339 | .long sys_sched_get_priority_max | ||
1340 | .long sys_sched_get_priority_min /* 160 */ | ||
1341 | .long sys_sched_rr_get_interval | ||
1342 | .long sys_nanosleep | ||
1343 | .long sys_mremap | ||
1344 | .long sys_setresuid16 | ||
1345 | .long sys_getresuid16 /* 165 */ | ||
1346 | .long sys_ni_syscall /* for vm86 */ | ||
1347 | .long sys_ni_syscall /* Old sys_query_module */ | ||
1348 | .long sys_poll | ||
1349 | .long sys_ni_syscall /* Old nfsservctl */ | ||
1350 | .long sys_setresgid16 /* 170 */ | ||
1351 | .long sys_getresgid16 | ||
1352 | .long sys_prctl | ||
1353 | .long sys_rt_sigreturn | ||
1354 | .long sys_rt_sigaction | ||
1355 | .long sys_rt_sigprocmask /* 175 */ | ||
1356 | .long sys_rt_sigpending | ||
1357 | .long sys_rt_sigtimedwait | ||
1358 | .long sys_rt_sigqueueinfo | ||
1359 | .long sys_rt_sigsuspend | ||
1360 | .long sys_pread64 /* 180 */ | ||
1361 | .long sys_pwrite64 | ||
1362 | .long sys_chown16 | ||
1363 | .long sys_getcwd | ||
1364 | .long sys_capget | ||
1365 | .long sys_capset /* 185 */ | ||
1366 | .long sys_sigaltstack | ||
1367 | .long sys_sendfile | ||
1368 | .long sys_ni_syscall /* streams1 */ | ||
1369 | .long sys_ni_syscall /* streams2 */ | ||
1370 | .long sys_vfork /* 190 */ | ||
1371 | .long sys_getrlimit | ||
1372 | .long sys_mmap2 | ||
1373 | .long sys_truncate64 | ||
1374 | .long sys_ftruncate64 | ||
1375 | .long sys_stat64 /* 195 */ | ||
1376 | .long sys_lstat64 | ||
1377 | .long sys_fstat64 | ||
1378 | .long sys_lchown | ||
1379 | .long sys_getuid | ||
1380 | .long sys_getgid /* 200 */ | ||
1381 | .long sys_geteuid | ||
1382 | .long sys_getegid | ||
1383 | .long sys_setreuid | ||
1384 | .long sys_setregid | ||
1385 | .long sys_getgroups /* 205 */ | ||
1386 | .long sys_setgroups | ||
1387 | .long sys_fchown | ||
1388 | .long sys_setresuid | ||
1389 | .long sys_getresuid | ||
1390 | .long sys_setresgid /* 210 */ | ||
1391 | .long sys_getresgid | ||
1392 | .long sys_chown | ||
1393 | .long sys_setuid | ||
1394 | .long sys_setgid | ||
1395 | .long sys_setfsuid /* 215 */ | ||
1396 | .long sys_setfsgid | ||
1397 | .long sys_pivot_root | ||
1398 | .long sys_mincore | ||
1399 | .long sys_madvise | ||
1400 | .long sys_getdents64 /* 220 */ | ||
1401 | .long sys_fcntl64 | ||
1402 | .long sys_ni_syscall /* reserved for TUX */ | ||
1403 | .long sys_ni_syscall /* Reserved for Security */ | ||
1404 | .long sys_gettid | ||
1405 | .long sys_readahead /* 225 */ | ||
1406 | .long sys_setxattr | ||
1407 | .long sys_lsetxattr | ||
1408 | .long sys_fsetxattr | ||
1409 | .long sys_getxattr | ||
1410 | .long sys_lgetxattr /* 230 */ | ||
1411 | .long sys_fgetxattr | ||
1412 | .long sys_listxattr | ||
1413 | .long sys_llistxattr | ||
1414 | .long sys_flistxattr | ||
1415 | .long sys_removexattr /* 235 */ | ||
1416 | .long sys_lremovexattr | ||
1417 | .long sys_fremovexattr | ||
1418 | .long sys_tkill | ||
1419 | .long sys_sendfile64 | ||
1420 | .long sys_futex /* 240 */ | ||
1421 | .long sys_sched_setaffinity | ||
1422 | .long sys_sched_getaffinity | ||
1423 | .long sys_ni_syscall //sys_set_thread_area | ||
1424 | .long sys_ni_syscall //sys_get_thread_area | ||
1425 | .long sys_io_setup /* 245 */ | ||
1426 | .long sys_io_destroy | ||
1427 | .long sys_io_getevents | ||
1428 | .long sys_io_submit | ||
1429 | .long sys_io_cancel | ||
1430 | .long sys_fadvise64 /* 250 */ | ||
1431 | .long sys_ni_syscall | ||
1432 | .long sys_exit_group | ||
1433 | .long sys_lookup_dcookie | ||
1434 | .long sys_epoll_create | ||
1435 | .long sys_epoll_ctl /* 255 */ | ||
1436 | .long sys_epoll_wait | ||
1437 | .long sys_remap_file_pages | ||
1438 | .long sys_set_tid_address | ||
1439 | .long sys_timer_create | ||
1440 | .long sys_timer_settime /* 260 */ | ||
1441 | .long sys_timer_gettime | ||
1442 | .long sys_timer_getoverrun | ||
1443 | .long sys_timer_delete | ||
1444 | .long sys_clock_settime | ||
1445 | .long sys_clock_gettime /* 265 */ | ||
1446 | .long sys_clock_getres | ||
1447 | .long sys_clock_nanosleep | ||
1448 | .long sys_statfs64 | ||
1449 | .long sys_fstatfs64 | ||
1450 | .long sys_tgkill /* 270 */ | ||
1451 | .long sys_utimes | ||
1452 | .long sys_fadvise64_64 | ||
1453 | .long sys_ni_syscall /* sys_vserver */ | ||
1454 | .long sys_mbind | ||
1455 | .long sys_get_mempolicy | ||
1456 | .long sys_set_mempolicy | ||
1457 | .long sys_mq_open | ||
1458 | .long sys_mq_unlink | ||
1459 | .long sys_mq_timedsend | ||
1460 | .long sys_mq_timedreceive /* 280 */ | ||
1461 | .long sys_mq_notify | ||
1462 | .long sys_mq_getsetattr | ||
1463 | .long sys_ni_syscall /* reserved for kexec */ | ||
1464 | .long sys_waitid | ||
1465 | .long sys_ni_syscall /* 285 */ /* available */ | ||
1466 | .long sys_add_key | ||
1467 | .long sys_request_key | ||
1468 | .long sys_keyctl | ||
1469 | .long sys_ioprio_set | ||
1470 | .long sys_ioprio_get /* 290 */ | ||
1471 | .long sys_inotify_init | ||
1472 | .long sys_inotify_add_watch | ||
1473 | .long sys_inotify_rm_watch | ||
1474 | .long sys_migrate_pages | ||
1475 | .long sys_openat /* 295 */ | ||
1476 | .long sys_mkdirat | ||
1477 | .long sys_mknodat | ||
1478 | .long sys_fchownat | ||
1479 | .long sys_futimesat | ||
1480 | .long sys_fstatat64 /* 300 */ | ||
1481 | .long sys_unlinkat | ||
1482 | .long sys_renameat | ||
1483 | .long sys_linkat | ||
1484 | .long sys_symlinkat | ||
1485 | .long sys_readlinkat /* 305 */ | ||
1486 | .long sys_fchmodat | ||
1487 | .long sys_faccessat | ||
1488 | .long sys_pselect6 | ||
1489 | .long sys_ppoll | ||
1490 | .long sys_unshare /* 310 */ | ||
1491 | .long sys_set_robust_list | ||
1492 | .long sys_get_robust_list | ||
1493 | .long sys_splice | ||
1494 | .long sys_sync_file_range | ||
1495 | .long sys_tee /* 315 */ | ||
1496 | .long sys_vmsplice | ||
1497 | .long sys_move_pages | ||
1498 | .long sys_getcpu | ||
1499 | .long sys_epoll_pwait | ||
1500 | .long sys_utimensat /* 320 */ | ||
1501 | .long sys_signalfd | ||
1502 | .long sys_timerfd_create | ||
1503 | .long sys_eventfd | ||
1504 | .long sys_fallocate | ||
1505 | .long sys_timerfd_settime /* 325 */ | ||
1506 | .long sys_timerfd_gettime | ||
1507 | .long sys_signalfd4 | ||
1508 | .long sys_eventfd2 | ||
1509 | .long sys_epoll_create1 | ||
1510 | .long sys_dup3 /* 330 */ | ||
1511 | .long sys_pipe2 | ||
1512 | .long sys_inotify_init1 | ||
1513 | .long sys_preadv | ||
1514 | .long sys_pwritev | ||
1515 | .long sys_rt_tgsigqueueinfo /* 335 */ | ||
1516 | .long sys_perf_event_open | ||
1517 | .long sys_setns | ||
1518 | |||
1519 | syscall_table_size = (. - sys_call_table) | ||
diff --git a/arch/frv/kernel/frv_ksyms.c b/arch/frv/kernel/frv_ksyms.c deleted file mode 100644 index 6ea430d58149..000000000000 --- a/arch/frv/kernel/frv_ksyms.c +++ /dev/null | |||
@@ -1,109 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | #include <linux/module.h> | ||
3 | #include <linux/linkage.h> | ||
4 | #include <linux/sched.h> | ||
5 | #include <linux/string.h> | ||
6 | #include <linux/mm.h> | ||
7 | #include <linux/user.h> | ||
8 | #include <linux/elfcore.h> | ||
9 | #include <linux/in6.h> | ||
10 | #include <linux/interrupt.h> | ||
11 | |||
12 | #include <asm/setup.h> | ||
13 | #include <asm/pgalloc.h> | ||
14 | #include <asm/irq.h> | ||
15 | #include <asm/io.h> | ||
16 | #include <asm/checksum.h> | ||
17 | #include <asm/hardirq.h> | ||
18 | #include <asm/cacheflush.h> | ||
19 | |||
20 | extern long __memcpy_user(void *dst, const void *src, size_t count); | ||
21 | extern long __memset_user(void *dst, const void *src, size_t count); | ||
22 | |||
23 | /* platform dependent support */ | ||
24 | |||
25 | EXPORT_SYMBOL(__ioremap); | ||
26 | EXPORT_SYMBOL(iounmap); | ||
27 | |||
28 | EXPORT_SYMBOL(ip_fast_csum); | ||
29 | |||
30 | #if 0 | ||
31 | EXPORT_SYMBOL(local_irq_count); | ||
32 | EXPORT_SYMBOL(local_bh_count); | ||
33 | #endif | ||
34 | |||
35 | EXPORT_SYMBOL(__res_bus_clock_speed_HZ); | ||
36 | EXPORT_SYMBOL(__page_offset); | ||
37 | EXPORT_SYMBOL(__memcpy_user); | ||
38 | EXPORT_SYMBOL(__memset_user); | ||
39 | EXPORT_SYMBOL(frv_dcache_writeback); | ||
40 | EXPORT_SYMBOL(frv_cache_invalidate); | ||
41 | EXPORT_SYMBOL(frv_icache_invalidate); | ||
42 | EXPORT_SYMBOL(frv_cache_wback_inv); | ||
43 | |||
44 | #ifndef CONFIG_MMU | ||
45 | EXPORT_SYMBOL(memory_start); | ||
46 | EXPORT_SYMBOL(memory_end); | ||
47 | #endif | ||
48 | |||
49 | EXPORT_SYMBOL(__debug_bug_trap); | ||
50 | |||
51 | /* The following are special because they're not called | ||
52 | explicitly (the C compiler generates them). Fortunately, | ||
53 | their interface isn't gonna change any time soon now, so | ||
54 | it's OK to leave it out of version control. */ | ||
55 | EXPORT_SYMBOL(memcpy); | ||
56 | EXPORT_SYMBOL(memset); | ||
57 | |||
58 | EXPORT_SYMBOL(__outsl_ns); | ||
59 | EXPORT_SYMBOL(__insl_ns); | ||
60 | |||
61 | #ifdef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS | ||
62 | EXPORT_SYMBOL(__xchg_32); | ||
63 | EXPORT_SYMBOL(__cmpxchg_32); | ||
64 | #endif | ||
65 | EXPORT_SYMBOL(atomic64_add_return); | ||
66 | EXPORT_SYMBOL(atomic64_sub_return); | ||
67 | EXPORT_SYMBOL(__xchg_64); | ||
68 | EXPORT_SYMBOL(__cmpxchg_64); | ||
69 | |||
70 | EXPORT_SYMBOL(__debug_bug_printk); | ||
71 | EXPORT_SYMBOL(__delay_loops_MHz); | ||
72 | |||
73 | /* | ||
74 | * libgcc functions - functions that are used internally by the | ||
75 | * compiler... (prototypes are not correct though, but that | ||
76 | * doesn't really matter since they're not versioned). | ||
77 | */ | ||
78 | extern void __gcc_bcmp(void); | ||
79 | extern void __ashldi3(void); | ||
80 | extern void __ashrdi3(void); | ||
81 | extern void __cmpdi2(void); | ||
82 | extern void __divdi3(void); | ||
83 | extern void __lshrdi3(void); | ||
84 | extern void __moddi3(void); | ||
85 | extern void __muldi3(void); | ||
86 | extern void __mulll(void); | ||
87 | extern void __umulll(void); | ||
88 | extern void __negdi2(void); | ||
89 | extern void __ucmpdi2(void); | ||
90 | extern void __udivdi3(void); | ||
91 | extern void __udivmoddi4(void); | ||
92 | extern void __umoddi3(void); | ||
93 | |||
94 | /* gcc lib functions */ | ||
95 | //EXPORT_SYMBOL(__gcc_bcmp); | ||
96 | EXPORT_SYMBOL(__ashldi3); | ||
97 | EXPORT_SYMBOL(__ashrdi3); | ||
98 | //EXPORT_SYMBOL(__cmpdi2); | ||
99 | //EXPORT_SYMBOL(__divdi3); | ||
100 | EXPORT_SYMBOL(__lshrdi3); | ||
101 | //EXPORT_SYMBOL(__moddi3); | ||
102 | EXPORT_SYMBOL(__muldi3); | ||
103 | EXPORT_SYMBOL(__mulll); | ||
104 | EXPORT_SYMBOL(__umulll); | ||
105 | EXPORT_SYMBOL(__negdi2); | ||
106 | EXPORT_SYMBOL(__ucmpdi2); | ||
107 | //EXPORT_SYMBOL(__udivdi3); | ||
108 | //EXPORT_SYMBOL(__udivmoddi4); | ||
109 | //EXPORT_SYMBOL(__umoddi3); | ||
diff --git a/arch/frv/kernel/futex.c b/arch/frv/kernel/futex.c deleted file mode 100644 index 37f7b2bf7f73..000000000000 --- a/arch/frv/kernel/futex.c +++ /dev/null | |||
@@ -1,223 +0,0 @@ | |||
1 | /* futex.c: futex operations | ||
2 | * | ||
3 | * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/futex.h> | ||
13 | #include <linux/uaccess.h> | ||
14 | #include <asm/futex.h> | ||
15 | #include <asm/errno.h> | ||
16 | |||
17 | /* | ||
18 | * the various futex operations; MMU fault checking is ignored under no-MMU | ||
19 | * conditions | ||
20 | */ | ||
21 | static inline int atomic_futex_op_xchg_set(int oparg, u32 __user *uaddr, int *_oldval) | ||
22 | { | ||
23 | int oldval, ret; | ||
24 | |||
25 | asm("0: \n" | ||
26 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
27 | " ckeq icc3,cc7 \n" | ||
28 | "1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */ | ||
29 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
30 | "2: cst.p %3,%M0 ,cc3,#1 \n" | ||
31 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */ | ||
32 | " beq icc3,#0,0b \n" | ||
33 | " setlos 0,%2 \n" | ||
34 | "3: \n" | ||
35 | ".subsection 2 \n" | ||
36 | "4: setlos %5,%2 \n" | ||
37 | " bra 3b \n" | ||
38 | ".previous \n" | ||
39 | ".section __ex_table,\"a\" \n" | ||
40 | " .balign 8 \n" | ||
41 | " .long 1b,4b \n" | ||
42 | " .long 2b,4b \n" | ||
43 | ".previous" | ||
44 | : "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg) | ||
45 | : "3"(oparg), "i"(-EFAULT) | ||
46 | : "memory", "cc7", "cc3", "icc3" | ||
47 | ); | ||
48 | |||
49 | *_oldval = oldval; | ||
50 | return ret; | ||
51 | } | ||
52 | |||
53 | static inline int atomic_futex_op_xchg_add(int oparg, u32 __user *uaddr, int *_oldval) | ||
54 | { | ||
55 | int oldval, ret; | ||
56 | |||
57 | asm("0: \n" | ||
58 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
59 | " ckeq icc3,cc7 \n" | ||
60 | "1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */ | ||
61 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
62 | " add %1,%3,%3 \n" | ||
63 | "2: cst.p %3,%M0 ,cc3,#1 \n" | ||
64 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */ | ||
65 | " beq icc3,#0,0b \n" | ||
66 | " setlos 0,%2 \n" | ||
67 | "3: \n" | ||
68 | ".subsection 2 \n" | ||
69 | "4: setlos %5,%2 \n" | ||
70 | " bra 3b \n" | ||
71 | ".previous \n" | ||
72 | ".section __ex_table,\"a\" \n" | ||
73 | " .balign 8 \n" | ||
74 | " .long 1b,4b \n" | ||
75 | " .long 2b,4b \n" | ||
76 | ".previous" | ||
77 | : "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg) | ||
78 | : "3"(oparg), "i"(-EFAULT) | ||
79 | : "memory", "cc7", "cc3", "icc3" | ||
80 | ); | ||
81 | |||
82 | *_oldval = oldval; | ||
83 | return ret; | ||
84 | } | ||
85 | |||
86 | static inline int atomic_futex_op_xchg_or(int oparg, u32 __user *uaddr, int *_oldval) | ||
87 | { | ||
88 | int oldval, ret; | ||
89 | |||
90 | asm("0: \n" | ||
91 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
92 | " ckeq icc3,cc7 \n" | ||
93 | "1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */ | ||
94 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
95 | " or %1,%3,%3 \n" | ||
96 | "2: cst.p %3,%M0 ,cc3,#1 \n" | ||
97 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */ | ||
98 | " beq icc3,#0,0b \n" | ||
99 | " setlos 0,%2 \n" | ||
100 | "3: \n" | ||
101 | ".subsection 2 \n" | ||
102 | "4: setlos %5,%2 \n" | ||
103 | " bra 3b \n" | ||
104 | ".previous \n" | ||
105 | ".section __ex_table,\"a\" \n" | ||
106 | " .balign 8 \n" | ||
107 | " .long 1b,4b \n" | ||
108 | " .long 2b,4b \n" | ||
109 | ".previous" | ||
110 | : "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg) | ||
111 | : "3"(oparg), "i"(-EFAULT) | ||
112 | : "memory", "cc7", "cc3", "icc3" | ||
113 | ); | ||
114 | |||
115 | *_oldval = oldval; | ||
116 | return ret; | ||
117 | } | ||
118 | |||
119 | static inline int atomic_futex_op_xchg_and(int oparg, u32 __user *uaddr, int *_oldval) | ||
120 | { | ||
121 | int oldval, ret; | ||
122 | |||
123 | asm("0: \n" | ||
124 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
125 | " ckeq icc3,cc7 \n" | ||
126 | "1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */ | ||
127 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
128 | " and %1,%3,%3 \n" | ||
129 | "2: cst.p %3,%M0 ,cc3,#1 \n" | ||
130 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */ | ||
131 | " beq icc3,#0,0b \n" | ||
132 | " setlos 0,%2 \n" | ||
133 | "3: \n" | ||
134 | ".subsection 2 \n" | ||
135 | "4: setlos %5,%2 \n" | ||
136 | " bra 3b \n" | ||
137 | ".previous \n" | ||
138 | ".section __ex_table,\"a\" \n" | ||
139 | " .balign 8 \n" | ||
140 | " .long 1b,4b \n" | ||
141 | " .long 2b,4b \n" | ||
142 | ".previous" | ||
143 | : "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg) | ||
144 | : "3"(oparg), "i"(-EFAULT) | ||
145 | : "memory", "cc7", "cc3", "icc3" | ||
146 | ); | ||
147 | |||
148 | *_oldval = oldval; | ||
149 | return ret; | ||
150 | } | ||
151 | |||
152 | static inline int atomic_futex_op_xchg_xor(int oparg, u32 __user *uaddr, int *_oldval) | ||
153 | { | ||
154 | int oldval, ret; | ||
155 | |||
156 | asm("0: \n" | ||
157 | " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */ | ||
158 | " ckeq icc3,cc7 \n" | ||
159 | "1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */ | ||
160 | " orcr cc7,cc7,cc3 \n" /* set CC3 to true */ | ||
161 | " xor %1,%3,%3 \n" | ||
162 | "2: cst.p %3,%M0 ,cc3,#1 \n" | ||
163 | " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */ | ||
164 | " beq icc3,#0,0b \n" | ||
165 | " setlos 0,%2 \n" | ||
166 | "3: \n" | ||
167 | ".subsection 2 \n" | ||
168 | "4: setlos %5,%2 \n" | ||
169 | " bra 3b \n" | ||
170 | ".previous \n" | ||
171 | ".section __ex_table,\"a\" \n" | ||
172 | " .balign 8 \n" | ||
173 | " .long 1b,4b \n" | ||
174 | " .long 2b,4b \n" | ||
175 | ".previous" | ||
176 | : "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg) | ||
177 | : "3"(oparg), "i"(-EFAULT) | ||
178 | : "memory", "cc7", "cc3", "icc3" | ||
179 | ); | ||
180 | |||
181 | *_oldval = oldval; | ||
182 | return ret; | ||
183 | } | ||
184 | |||
185 | /*****************************************************************************/ | ||
186 | /* | ||
187 | * do the futex operations | ||
188 | */ | ||
189 | int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) | ||
190 | { | ||
191 | int oldval = 0, ret; | ||
192 | |||
193 | pagefault_disable(); | ||
194 | |||
195 | switch (op) { | ||
196 | case FUTEX_OP_SET: | ||
197 | ret = atomic_futex_op_xchg_set(oparg, uaddr, &oldval); | ||
198 | break; | ||
199 | case FUTEX_OP_ADD: | ||
200 | ret = atomic_futex_op_xchg_add(oparg, uaddr, &oldval); | ||
201 | break; | ||
202 | case FUTEX_OP_OR: | ||
203 | ret = atomic_futex_op_xchg_or(oparg, uaddr, &oldval); | ||
204 | break; | ||
205 | case FUTEX_OP_ANDN: | ||
206 | ret = atomic_futex_op_xchg_and(~oparg, uaddr, &oldval); | ||
207 | break; | ||
208 | case FUTEX_OP_XOR: | ||
209 | ret = atomic_futex_op_xchg_xor(oparg, uaddr, &oldval); | ||
210 | break; | ||
211 | default: | ||
212 | ret = -ENOSYS; | ||
213 | break; | ||
214 | } | ||
215 | |||
216 | pagefault_enable(); | ||
217 | |||
218 | if (!ret) | ||
219 | *oval = oldval; | ||
220 | |||
221 | return ret; | ||
222 | |||
223 | } /* end arch_futex_atomic_op_inuser() */ | ||
diff --git a/arch/frv/kernel/gdb-io.c b/arch/frv/kernel/gdb-io.c deleted file mode 100644 index 0707d35079ba..000000000000 --- a/arch/frv/kernel/gdb-io.c +++ /dev/null | |||
@@ -1,215 +0,0 @@ | |||
1 | /* gdb-io.c: FR403 GDB stub I/O | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/string.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/signal.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/console.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/serial_reg.h> | ||
20 | |||
21 | #include <asm/pgtable.h> | ||
22 | #include <asm/irc-regs.h> | ||
23 | #include <asm/timer-regs.h> | ||
24 | #include <asm/gdb-stub.h> | ||
25 | #include "gdb-io.h" | ||
26 | |||
27 | #ifdef CONFIG_GDBSTUB_UART0 | ||
28 | #define __UART(X) (*(volatile uint8_t *)(UART0_BASE + (UART_##X))) | ||
29 | #define __UART_IRR_NMI 0xff0f0000 | ||
30 | #else /* CONFIG_GDBSTUB_UART1 */ | ||
31 | #define __UART(X) (*(volatile uint8_t *)(UART1_BASE + (UART_##X))) | ||
32 | #define __UART_IRR_NMI 0xfff00000 | ||
33 | #endif | ||
34 | |||
35 | #define LSR_WAIT_FOR(STATE) \ | ||
36 | do { \ | ||
37 | gdbstub_do_rx(); \ | ||
38 | } while (!(__UART(LSR) & UART_LSR_##STATE)) | ||
39 | |||
40 | #define FLOWCTL_QUERY(LINE) ({ __UART(MSR) & UART_MSR_##LINE; }) | ||
41 | #define FLOWCTL_CLEAR(LINE) do { __UART(MCR) &= ~UART_MCR_##LINE; mb(); } while (0) | ||
42 | #define FLOWCTL_SET(LINE) do { __UART(MCR) |= UART_MCR_##LINE; mb(); } while (0) | ||
43 | |||
44 | #define FLOWCTL_WAIT_FOR(LINE) \ | ||
45 | do { \ | ||
46 | gdbstub_do_rx(); \ | ||
47 | } while(!FLOWCTL_QUERY(LINE)) | ||
48 | |||
49 | /*****************************************************************************/ | ||
50 | /* | ||
51 | * initialise the GDB stub | ||
52 | * - called with PSR.ET==0, so can't incur external interrupts | ||
53 | */ | ||
54 | void gdbstub_io_init(void) | ||
55 | { | ||
56 | /* set up the serial port */ | ||
57 | __UART(LCR) = UART_LCR_WLEN8; /* 1N8 */ | ||
58 | __UART(FCR) = | ||
59 | UART_FCR_ENABLE_FIFO | | ||
60 | UART_FCR_CLEAR_RCVR | | ||
61 | UART_FCR_CLEAR_XMIT | | ||
62 | UART_FCR_TRIGGER_1; | ||
63 | |||
64 | FLOWCTL_CLEAR(DTR); | ||
65 | FLOWCTL_SET(RTS); | ||
66 | |||
67 | // gdbstub_set_baud(115200); | ||
68 | |||
69 | /* we want to get serial receive interrupts */ | ||
70 | __UART(IER) = UART_IER_RDI | UART_IER_RLSI; | ||
71 | mb(); | ||
72 | |||
73 | __set_IRR(6, __UART_IRR_NMI); /* map ERRs and UARTx to NMI */ | ||
74 | |||
75 | } /* end gdbstub_io_init() */ | ||
76 | |||
77 | /*****************************************************************************/ | ||
78 | /* | ||
79 | * set up the GDB stub serial port baud rate timers | ||
80 | */ | ||
81 | void gdbstub_set_baud(unsigned baud) | ||
82 | { | ||
83 | unsigned value, high, low; | ||
84 | u8 lcr; | ||
85 | |||
86 | /* work out the divisor to give us the nearest higher baud rate */ | ||
87 | value = __serial_clock_speed_HZ / 16 / baud; | ||
88 | |||
89 | /* determine the baud rate range */ | ||
90 | high = __serial_clock_speed_HZ / 16 / value; | ||
91 | low = __serial_clock_speed_HZ / 16 / (value + 1); | ||
92 | |||
93 | /* pick the nearest bound */ | ||
94 | if (low + (high - low) / 2 > baud) | ||
95 | value++; | ||
96 | |||
97 | lcr = __UART(LCR); | ||
98 | __UART(LCR) |= UART_LCR_DLAB; | ||
99 | mb(); | ||
100 | __UART(DLL) = value & 0xff; | ||
101 | __UART(DLM) = (value >> 8) & 0xff; | ||
102 | mb(); | ||
103 | __UART(LCR) = lcr; | ||
104 | mb(); | ||
105 | |||
106 | } /* end gdbstub_set_baud() */ | ||
107 | |||
108 | /*****************************************************************************/ | ||
109 | /* | ||
110 | * receive characters into the receive FIFO | ||
111 | */ | ||
112 | void gdbstub_do_rx(void) | ||
113 | { | ||
114 | unsigned ix, nix; | ||
115 | |||
116 | ix = gdbstub_rx_inp; | ||
117 | |||
118 | while (__UART(LSR) & UART_LSR_DR) { | ||
119 | nix = (ix + 2) & 0xfff; | ||
120 | if (nix == gdbstub_rx_outp) | ||
121 | break; | ||
122 | |||
123 | gdbstub_rx_buffer[ix++] = __UART(LSR); | ||
124 | gdbstub_rx_buffer[ix++] = __UART(RX); | ||
125 | ix = nix; | ||
126 | } | ||
127 | |||
128 | gdbstub_rx_inp = ix; | ||
129 | |||
130 | __clr_RC(15); | ||
131 | __clr_IRL(); | ||
132 | |||
133 | } /* end gdbstub_do_rx() */ | ||
134 | |||
135 | /*****************************************************************************/ | ||
136 | /* | ||
137 | * wait for a character to come from the debugger | ||
138 | */ | ||
139 | int gdbstub_rx_char(unsigned char *_ch, int nonblock) | ||
140 | { | ||
141 | unsigned ix; | ||
142 | u8 ch, st; | ||
143 | |||
144 | *_ch = 0xff; | ||
145 | |||
146 | if (gdbstub_rx_unget) { | ||
147 | *_ch = gdbstub_rx_unget; | ||
148 | gdbstub_rx_unget = 0; | ||
149 | return 0; | ||
150 | } | ||
151 | |||
152 | try_again: | ||
153 | gdbstub_do_rx(); | ||
154 | |||
155 | /* pull chars out of the buffer */ | ||
156 | ix = gdbstub_rx_outp; | ||
157 | if (ix == gdbstub_rx_inp) { | ||
158 | if (nonblock) | ||
159 | return -EAGAIN; | ||
160 | //watchdog_alert_counter = 0; | ||
161 | goto try_again; | ||
162 | } | ||
163 | |||
164 | st = gdbstub_rx_buffer[ix++]; | ||
165 | ch = gdbstub_rx_buffer[ix++]; | ||
166 | gdbstub_rx_outp = ix & 0x00000fff; | ||
167 | |||
168 | if (st & UART_LSR_BI) { | ||
169 | gdbstub_proto("### GDB Rx Break Detected ###\n"); | ||
170 | return -EINTR; | ||
171 | } | ||
172 | else if (st & (UART_LSR_FE|UART_LSR_OE|UART_LSR_PE)) { | ||
173 | gdbstub_io("### GDB Rx Error (st=%02x) ###\n",st); | ||
174 | return -EIO; | ||
175 | } | ||
176 | else { | ||
177 | gdbstub_io("### GDB Rx %02x (st=%02x) ###\n",ch,st); | ||
178 | *_ch = ch & 0x7f; | ||
179 | return 0; | ||
180 | } | ||
181 | |||
182 | } /* end gdbstub_rx_char() */ | ||
183 | |||
184 | /*****************************************************************************/ | ||
185 | /* | ||
186 | * send a character to the debugger | ||
187 | */ | ||
188 | void gdbstub_tx_char(unsigned char ch) | ||
189 | { | ||
190 | FLOWCTL_SET(DTR); | ||
191 | LSR_WAIT_FOR(THRE); | ||
192 | // FLOWCTL_WAIT_FOR(CTS); | ||
193 | |||
194 | if (ch == 0x0a) { | ||
195 | __UART(TX) = 0x0d; | ||
196 | mb(); | ||
197 | LSR_WAIT_FOR(THRE); | ||
198 | // FLOWCTL_WAIT_FOR(CTS); | ||
199 | } | ||
200 | __UART(TX) = ch; | ||
201 | mb(); | ||
202 | |||
203 | FLOWCTL_CLEAR(DTR); | ||
204 | } /* end gdbstub_tx_char() */ | ||
205 | |||
206 | /*****************************************************************************/ | ||
207 | /* | ||
208 | * send a character to the debugger | ||
209 | */ | ||
210 | void gdbstub_tx_flush(void) | ||
211 | { | ||
212 | LSR_WAIT_FOR(TEMT); | ||
213 | LSR_WAIT_FOR(THRE); | ||
214 | FLOWCTL_CLEAR(DTR); | ||
215 | } /* end gdbstub_tx_flush() */ | ||
diff --git a/arch/frv/kernel/gdb-io.h b/arch/frv/kernel/gdb-io.h deleted file mode 100644 index 138714bacc40..000000000000 --- a/arch/frv/kernel/gdb-io.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | /* gdb-io.h: FR403 GDB I/O port defs | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _GDB_IO_H | ||
13 | #define _GDB_IO_H | ||
14 | |||
15 | #include <asm/serial-regs.h> | ||
16 | |||
17 | #undef UART_RX | ||
18 | #undef UART_TX | ||
19 | #undef UART_DLL | ||
20 | #undef UART_DLM | ||
21 | #undef UART_IER | ||
22 | #undef UART_IIR | ||
23 | #undef UART_FCR | ||
24 | #undef UART_LCR | ||
25 | #undef UART_MCR | ||
26 | #undef UART_LSR | ||
27 | #undef UART_MSR | ||
28 | #undef UART_SCR | ||
29 | |||
30 | #define UART_RX 0*8 /* In: Receive buffer (DLAB=0) */ | ||
31 | #define UART_TX 0*8 /* Out: Transmit buffer (DLAB=0) */ | ||
32 | #define UART_DLL 0*8 /* Out: Divisor Latch Low (DLAB=1) */ | ||
33 | #define UART_DLM 1*8 /* Out: Divisor Latch High (DLAB=1) */ | ||
34 | #define UART_IER 1*8 /* Out: Interrupt Enable Register */ | ||
35 | #define UART_IIR 2*8 /* In: Interrupt ID Register */ | ||
36 | #define UART_FCR 2*8 /* Out: FIFO Control Register */ | ||
37 | #define UART_LCR 3*8 /* Out: Line Control Register */ | ||
38 | #define UART_MCR 4*8 /* Out: Modem Control Register */ | ||
39 | #define UART_LSR 5*8 /* In: Line Status Register */ | ||
40 | #define UART_MSR 6*8 /* In: Modem Status Register */ | ||
41 | #define UART_SCR 7*8 /* I/O: Scratch Register */ | ||
42 | |||
43 | #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ | ||
44 | #define UART_LCR_SBC 0x40 /* Set break control */ | ||
45 | #define UART_LCR_SPAR 0x20 /* Stick parity (?) */ | ||
46 | #define UART_LCR_EPAR 0x10 /* Even parity select */ | ||
47 | #define UART_LCR_PARITY 0x08 /* Parity Enable */ | ||
48 | #define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */ | ||
49 | #define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ | ||
50 | #define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ | ||
51 | #define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ | ||
52 | #define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ | ||
53 | |||
54 | |||
55 | #endif /* _GDB_IO_H */ | ||
diff --git a/arch/frv/kernel/gdb-stub.c b/arch/frv/kernel/gdb-stub.c deleted file mode 100644 index bbe78b0bffec..000000000000 --- a/arch/frv/kernel/gdb-stub.c +++ /dev/null | |||
@@ -1,2149 +0,0 @@ | |||
1 | /* gdb-stub.c: FRV GDB stub | ||
2 | * | ||
3 | * Copyright (C) 2003,4 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from Linux/MIPS version, Copyright (C) 1995 Andreas Busse | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | /* | ||
14 | * To enable debugger support, two things need to happen. One, a | ||
15 | * call to set_debug_traps() is necessary in order to allow any breakpoints | ||
16 | * or error conditions to be properly intercepted and reported to gdb. | ||
17 | * Two, a breakpoint needs to be generated to begin communication. This | ||
18 | * is most easily accomplished by a call to breakpoint(). Breakpoint() | ||
19 | * simulates a breakpoint by executing a BREAK instruction. | ||
20 | * | ||
21 | * | ||
22 | * The following gdb commands are supported: | ||
23 | * | ||
24 | * command function Return value | ||
25 | * | ||
26 | * g return the value of the CPU registers hex data or ENN | ||
27 | * G set the value of the CPU registers OK or ENN | ||
28 | * | ||
29 | * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN | ||
30 | * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN | ||
31 | * | ||
32 | * c Resume at current address SNN ( signal NN) | ||
33 | * cAA..AA Continue at address AA..AA SNN | ||
34 | * | ||
35 | * s Step one instruction SNN | ||
36 | * sAA..AA Step one instruction from AA..AA SNN | ||
37 | * | ||
38 | * k kill | ||
39 | * | ||
40 | * ? What was the last sigval ? SNN (signal NN) | ||
41 | * | ||
42 | * bBB..BB Set baud rate to BB..BB OK or BNN, then sets | ||
43 | * baud rate | ||
44 | * | ||
45 | * All commands and responses are sent with a packet which includes a | ||
46 | * checksum. A packet consists of | ||
47 | * | ||
48 | * $<packet info>#<checksum>. | ||
49 | * | ||
50 | * where | ||
51 | * <packet info> :: <characters representing the command or response> | ||
52 | * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>> | ||
53 | * | ||
54 | * When a packet is received, it is first acknowledged with either '+' or '-'. | ||
55 | * '+' indicates a successful transfer. '-' indicates a failed transfer. | ||
56 | * | ||
57 | * Example: | ||
58 | * | ||
59 | * Host: Reply: | ||
60 | * $m0,10#2a +$00010203040506070809101112131415#42 | ||
61 | * | ||
62 | * | ||
63 | * ============== | ||
64 | * MORE EXAMPLES: | ||
65 | * ============== | ||
66 | * | ||
67 | * For reference -- the following are the steps that one | ||
68 | * company took (RidgeRun Inc) to get remote gdb debugging | ||
69 | * going. In this scenario the host machine was a PC and the | ||
70 | * target platform was a Galileo EVB64120A MIPS evaluation | ||
71 | * board. | ||
72 | * | ||
73 | * Step 1: | ||
74 | * First download gdb-5.0.tar.gz from the internet. | ||
75 | * and then build/install the package. | ||
76 | * | ||
77 | * Example: | ||
78 | * $ tar zxf gdb-5.0.tar.gz | ||
79 | * $ cd gdb-5.0 | ||
80 | * $ ./configure --target=frv-elf-gdb | ||
81 | * $ make | ||
82 | * $ frv-elf-gdb | ||
83 | * | ||
84 | * Step 2: | ||
85 | * Configure linux for remote debugging and build it. | ||
86 | * | ||
87 | * Example: | ||
88 | * $ cd ~/linux | ||
89 | * $ make menuconfig <go to "Kernel Hacking" and turn on remote debugging> | ||
90 | * $ make vmlinux | ||
91 | * | ||
92 | * Step 3: | ||
93 | * Download the kernel to the remote target and start | ||
94 | * the kernel running. It will promptly halt and wait | ||
95 | * for the host gdb session to connect. It does this | ||
96 | * since the "Kernel Hacking" option has defined | ||
97 | * CONFIG_REMOTE_DEBUG which in turn enables your calls | ||
98 | * to: | ||
99 | * set_debug_traps(); | ||
100 | * breakpoint(); | ||
101 | * | ||
102 | * Step 4: | ||
103 | * Start the gdb session on the host. | ||
104 | * | ||
105 | * Example: | ||
106 | * $ frv-elf-gdb vmlinux | ||
107 | * (gdb) set remotebaud 115200 | ||
108 | * (gdb) target remote /dev/ttyS1 | ||
109 | * ...at this point you are connected to | ||
110 | * the remote target and can use gdb | ||
111 | * in the normal fasion. Setting | ||
112 | * breakpoints, single stepping, | ||
113 | * printing variables, etc. | ||
114 | * | ||
115 | */ | ||
116 | |||
117 | #include <linux/string.h> | ||
118 | #include <linux/kernel.h> | ||
119 | #include <linux/signal.h> | ||
120 | #include <linux/sched.h> | ||
121 | #include <linux/mm.h> | ||
122 | #include <linux/console.h> | ||
123 | #include <linux/init.h> | ||
124 | #include <linux/slab.h> | ||
125 | #include <linux/nmi.h> | ||
126 | |||
127 | #include <asm/asm-offsets.h> | ||
128 | #include <asm/pgtable.h> | ||
129 | #include <asm/gdb-stub.h> | ||
130 | |||
131 | #define LEDS(x) do { /* *(u32*)0xe1200004 = ~(x); mb(); */ } while(0) | ||
132 | |||
133 | #undef GDBSTUB_DEBUG_PROTOCOL | ||
134 | |||
135 | extern void debug_to_serial(const char *p, int n); | ||
136 | extern void gdbstub_console_write(struct console *co, const char *p, unsigned n); | ||
137 | |||
138 | extern volatile uint32_t __break_error_detect[3]; /* ESFR1, ESR15, EAR15 */ | ||
139 | |||
140 | struct __debug_amr { | ||
141 | unsigned long L, P; | ||
142 | } __attribute__((aligned(8))); | ||
143 | |||
144 | struct __debug_mmu { | ||
145 | struct { | ||
146 | unsigned long hsr0, pcsr, esr0, ear0, epcr0; | ||
147 | #ifdef CONFIG_MMU | ||
148 | unsigned long tplr, tppr, tpxr, cxnr; | ||
149 | #endif | ||
150 | } regs; | ||
151 | |||
152 | struct __debug_amr iamr[16]; | ||
153 | struct __debug_amr damr[16]; | ||
154 | |||
155 | #ifdef CONFIG_MMU | ||
156 | struct __debug_amr tlb[64*2]; | ||
157 | #endif | ||
158 | }; | ||
159 | |||
160 | static struct __debug_mmu __debug_mmu; | ||
161 | |||
162 | /* | ||
163 | * BUFMAX defines the maximum number of characters in inbound/outbound buffers | ||
164 | * at least NUMREGBYTES*2 are needed for register packets | ||
165 | */ | ||
166 | #define BUFMAX 2048 | ||
167 | |||
168 | #define BREAK_INSN 0x801000c0 /* use "break" as bkpt */ | ||
169 | |||
170 | static const char gdbstub_banner[] = "Linux/FR-V GDB Stub (c) RedHat 2003\n"; | ||
171 | |||
172 | volatile u8 gdbstub_rx_buffer[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE))); | ||
173 | volatile u32 gdbstub_rx_inp = 0; | ||
174 | volatile u32 gdbstub_rx_outp = 0; | ||
175 | volatile u8 gdbstub_rx_overflow = 0; | ||
176 | u8 gdbstub_rx_unget = 0; | ||
177 | |||
178 | /* set with GDB whilst running to permit step through exceptions */ | ||
179 | extern volatile u32 __attribute__((section(".bss"))) gdbstub_trace_through_exceptions; | ||
180 | |||
181 | static char input_buffer[BUFMAX]; | ||
182 | static char output_buffer[BUFMAX]; | ||
183 | |||
184 | static const char *regnames[] = { | ||
185 | "PSR ", "ISR ", "CCR ", "CCCR", | ||
186 | "LR ", "LCR ", "PC ", "_stt", | ||
187 | "sys ", "GR8*", "GNE0", "GNE1", | ||
188 | "IACH", "IACL", | ||
189 | "TBR ", "SP ", "FP ", "GR3 ", | ||
190 | "GR4 ", "GR5 ", "GR6 ", "GR7 ", | ||
191 | "GR8 ", "GR9 ", "GR10", "GR11", | ||
192 | "GR12", "GR13", "GR14", "GR15", | ||
193 | "GR16", "GR17", "GR18", "GR19", | ||
194 | "GR20", "GR21", "GR22", "GR23", | ||
195 | "GR24", "GR25", "GR26", "GR27", | ||
196 | "EFRM", "CURR", "GR30", "BFRM" | ||
197 | }; | ||
198 | |||
199 | struct gdbstub_bkpt { | ||
200 | unsigned long addr; /* address of breakpoint */ | ||
201 | unsigned len; /* size of breakpoint */ | ||
202 | uint32_t originsns[7]; /* original instructions */ | ||
203 | }; | ||
204 | |||
205 | static struct gdbstub_bkpt gdbstub_bkpts[256]; | ||
206 | |||
207 | /* | ||
208 | * local prototypes | ||
209 | */ | ||
210 | |||
211 | static void gdbstub_recv_packet(char *buffer); | ||
212 | static int gdbstub_send_packet(char *buffer); | ||
213 | static int gdbstub_compute_signal(unsigned long tbr); | ||
214 | static int hex(unsigned char ch); | ||
215 | static int hexToInt(char **ptr, unsigned long *intValue); | ||
216 | static unsigned char *mem2hex(const void *mem, char *buf, int count, int may_fault); | ||
217 | static char *hex2mem(const char *buf, void *_mem, int count); | ||
218 | |||
219 | /* | ||
220 | * Convert ch from a hex digit to an int | ||
221 | */ | ||
222 | static int hex(unsigned char ch) | ||
223 | { | ||
224 | if (ch >= 'a' && ch <= 'f') | ||
225 | return ch-'a'+10; | ||
226 | if (ch >= '0' && ch <= '9') | ||
227 | return ch-'0'; | ||
228 | if (ch >= 'A' && ch <= 'F') | ||
229 | return ch-'A'+10; | ||
230 | return -1; | ||
231 | } | ||
232 | |||
233 | void gdbstub_printk(const char *fmt, ...) | ||
234 | { | ||
235 | static char buf[1024]; | ||
236 | va_list args; | ||
237 | int len; | ||
238 | |||
239 | /* Emit the output into the temporary buffer */ | ||
240 | va_start(args, fmt); | ||
241 | len = vsnprintf(buf, sizeof(buf), fmt, args); | ||
242 | va_end(args); | ||
243 | debug_to_serial(buf, len); | ||
244 | } | ||
245 | |||
246 | static inline char *gdbstub_strcpy(char *dst, const char *src) | ||
247 | { | ||
248 | int loop = 0; | ||
249 | while ((dst[loop] = src[loop])) | ||
250 | loop++; | ||
251 | return dst; | ||
252 | } | ||
253 | |||
254 | static void gdbstub_purge_cache(void) | ||
255 | { | ||
256 | asm volatile(" dcef @(gr0,gr0),#1 \n" | ||
257 | " icei @(gr0,gr0),#1 \n" | ||
258 | " membar \n" | ||
259 | " bar \n" | ||
260 | ); | ||
261 | } | ||
262 | |||
263 | /*****************************************************************************/ | ||
264 | /* | ||
265 | * scan for the sequence $<data>#<checksum> | ||
266 | */ | ||
267 | static void gdbstub_recv_packet(char *buffer) | ||
268 | { | ||
269 | unsigned char checksum; | ||
270 | unsigned char xmitcsum; | ||
271 | unsigned char ch; | ||
272 | int count, i, ret, error; | ||
273 | |||
274 | for (;;) { | ||
275 | /* wait around for the start character, ignore all other characters */ | ||
276 | do { | ||
277 | gdbstub_rx_char(&ch, 0); | ||
278 | } while (ch != '$'); | ||
279 | |||
280 | checksum = 0; | ||
281 | xmitcsum = -1; | ||
282 | count = 0; | ||
283 | error = 0; | ||
284 | |||
285 | /* now, read until a # or end of buffer is found */ | ||
286 | while (count < BUFMAX) { | ||
287 | ret = gdbstub_rx_char(&ch, 0); | ||
288 | if (ret < 0) | ||
289 | error = ret; | ||
290 | |||
291 | if (ch == '#') | ||
292 | break; | ||
293 | checksum += ch; | ||
294 | buffer[count] = ch; | ||
295 | count++; | ||
296 | } | ||
297 | |||
298 | if (error == -EIO) { | ||
299 | gdbstub_proto("### GDB Rx Error - Skipping packet ###\n"); | ||
300 | gdbstub_proto("### GDB Tx NAK\n"); | ||
301 | gdbstub_tx_char('-'); | ||
302 | continue; | ||
303 | } | ||
304 | |||
305 | if (count >= BUFMAX || error) | ||
306 | continue; | ||
307 | |||
308 | buffer[count] = 0; | ||
309 | |||
310 | /* read the checksum */ | ||
311 | ret = gdbstub_rx_char(&ch, 0); | ||
312 | if (ret < 0) | ||
313 | error = ret; | ||
314 | xmitcsum = hex(ch) << 4; | ||
315 | |||
316 | ret = gdbstub_rx_char(&ch, 0); | ||
317 | if (ret < 0) | ||
318 | error = ret; | ||
319 | xmitcsum |= hex(ch); | ||
320 | |||
321 | if (error) { | ||
322 | if (error == -EIO) | ||
323 | gdbstub_proto("### GDB Rx Error - Skipping packet\n"); | ||
324 | gdbstub_proto("### GDB Tx NAK\n"); | ||
325 | gdbstub_tx_char('-'); | ||
326 | continue; | ||
327 | } | ||
328 | |||
329 | /* check the checksum */ | ||
330 | if (checksum != xmitcsum) { | ||
331 | gdbstub_proto("### GDB Tx NAK\n"); | ||
332 | gdbstub_tx_char('-'); /* failed checksum */ | ||
333 | continue; | ||
334 | } | ||
335 | |||
336 | gdbstub_proto("### GDB Rx '$%s#%02x' ###\n", buffer, checksum); | ||
337 | gdbstub_proto("### GDB Tx ACK\n"); | ||
338 | gdbstub_tx_char('+'); /* successful transfer */ | ||
339 | |||
340 | /* if a sequence char is present, reply the sequence ID */ | ||
341 | if (buffer[2] == ':') { | ||
342 | gdbstub_tx_char(buffer[0]); | ||
343 | gdbstub_tx_char(buffer[1]); | ||
344 | |||
345 | /* remove sequence chars from buffer */ | ||
346 | count = 0; | ||
347 | while (buffer[count]) count++; | ||
348 | for (i=3; i <= count; i++) | ||
349 | buffer[i - 3] = buffer[i]; | ||
350 | } | ||
351 | |||
352 | break; | ||
353 | } | ||
354 | } /* end gdbstub_recv_packet() */ | ||
355 | |||
356 | /*****************************************************************************/ | ||
357 | /* | ||
358 | * send the packet in buffer. | ||
359 | * - return 0 if successfully ACK'd | ||
360 | * - return 1 if abandoned due to new incoming packet | ||
361 | */ | ||
362 | static int gdbstub_send_packet(char *buffer) | ||
363 | { | ||
364 | unsigned char checksum; | ||
365 | int count; | ||
366 | unsigned char ch; | ||
367 | |||
368 | /* $<packet info>#<checksum> */ | ||
369 | gdbstub_proto("### GDB Tx '%s' ###\n", buffer); | ||
370 | |||
371 | do { | ||
372 | gdbstub_tx_char('$'); | ||
373 | checksum = 0; | ||
374 | count = 0; | ||
375 | |||
376 | while ((ch = buffer[count]) != 0) { | ||
377 | gdbstub_tx_char(ch); | ||
378 | checksum += ch; | ||
379 | count += 1; | ||
380 | } | ||
381 | |||
382 | gdbstub_tx_char('#'); | ||
383 | gdbstub_tx_char(hex_asc_hi(checksum)); | ||
384 | gdbstub_tx_char(hex_asc_lo(checksum)); | ||
385 | |||
386 | } while (gdbstub_rx_char(&ch,0), | ||
387 | #ifdef GDBSTUB_DEBUG_PROTOCOL | ||
388 | ch=='-' && (gdbstub_proto("### GDB Rx NAK\n"),0), | ||
389 | ch!='-' && ch!='+' && (gdbstub_proto("### GDB Rx ??? %02x\n",ch),0), | ||
390 | #endif | ||
391 | ch!='+' && ch!='$'); | ||
392 | |||
393 | if (ch=='+') { | ||
394 | gdbstub_proto("### GDB Rx ACK\n"); | ||
395 | return 0; | ||
396 | } | ||
397 | |||
398 | gdbstub_proto("### GDB Tx Abandoned\n"); | ||
399 | gdbstub_rx_unget = ch; | ||
400 | return 1; | ||
401 | } /* end gdbstub_send_packet() */ | ||
402 | |||
403 | /* | ||
404 | * While we find nice hex chars, build an int. | ||
405 | * Return number of chars processed. | ||
406 | */ | ||
407 | static int hexToInt(char **ptr, unsigned long *_value) | ||
408 | { | ||
409 | int count = 0, ch; | ||
410 | |||
411 | *_value = 0; | ||
412 | while (**ptr) { | ||
413 | ch = hex(**ptr); | ||
414 | if (ch < 0) | ||
415 | break; | ||
416 | |||
417 | *_value = (*_value << 4) | ((uint8_t) ch & 0xf); | ||
418 | count++; | ||
419 | |||
420 | (*ptr)++; | ||
421 | } | ||
422 | |||
423 | return count; | ||
424 | } | ||
425 | |||
426 | /*****************************************************************************/ | ||
427 | /* | ||
428 | * probe an address to see whether it maps to anything | ||
429 | */ | ||
430 | static inline int gdbstub_addr_probe(const void *vaddr) | ||
431 | { | ||
432 | #ifdef CONFIG_MMU | ||
433 | unsigned long paddr; | ||
434 | |||
435 | asm("lrad %1,%0,#1,#0,#0" : "=r"(paddr) : "r"(vaddr)); | ||
436 | if (!(paddr & xAMPRx_V)) | ||
437 | return 0; | ||
438 | #endif | ||
439 | |||
440 | return 1; | ||
441 | } /* end gdbstub_addr_probe() */ | ||
442 | |||
443 | #ifdef CONFIG_MMU | ||
444 | static unsigned long __saved_dampr, __saved_damlr; | ||
445 | |||
446 | static inline unsigned long gdbstub_virt_to_pte(unsigned long vaddr) | ||
447 | { | ||
448 | pgd_t *pgd; | ||
449 | pud_t *pud; | ||
450 | pmd_t *pmd; | ||
451 | pte_t *pte; | ||
452 | unsigned long val, dampr5; | ||
453 | |||
454 | pgd = (pgd_t *) __get_DAMLR(3) + pgd_index(vaddr); | ||
455 | pud = pud_offset(pgd, vaddr); | ||
456 | pmd = pmd_offset(pud, vaddr); | ||
457 | |||
458 | if (pmd_bad(*pmd) || !pmd_present(*pmd)) | ||
459 | return 0; | ||
460 | |||
461 | /* make sure dampr5 maps to the correct pmd */ | ||
462 | dampr5 = __get_DAMPR(5); | ||
463 | val = pmd_val(*pmd); | ||
464 | __set_DAMPR(5, val | xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C | xAMPRx_V); | ||
465 | |||
466 | /* now its safe to access pmd */ | ||
467 | pte = (pte_t *)__get_DAMLR(5) + __pte_index(vaddr); | ||
468 | if (pte_present(*pte)) | ||
469 | val = pte_val(*pte); | ||
470 | else | ||
471 | val = 0; | ||
472 | |||
473 | /* restore original dampr5 */ | ||
474 | __set_DAMPR(5, dampr5); | ||
475 | |||
476 | return val; | ||
477 | } | ||
478 | #endif | ||
479 | |||
480 | static inline int gdbstub_addr_map(const void *vaddr) | ||
481 | { | ||
482 | #ifdef CONFIG_MMU | ||
483 | unsigned long pte; | ||
484 | |||
485 | __saved_dampr = __get_DAMPR(2); | ||
486 | __saved_damlr = __get_DAMLR(2); | ||
487 | #endif | ||
488 | if (gdbstub_addr_probe(vaddr)) | ||
489 | return 1; | ||
490 | #ifdef CONFIG_MMU | ||
491 | pte = gdbstub_virt_to_pte((unsigned long) vaddr); | ||
492 | if (pte) { | ||
493 | __set_DAMPR(2, pte); | ||
494 | __set_DAMLR(2, (unsigned long) vaddr & PAGE_MASK); | ||
495 | return 1; | ||
496 | } | ||
497 | #endif | ||
498 | return 0; | ||
499 | } | ||
500 | |||
501 | static inline void gdbstub_addr_unmap(void) | ||
502 | { | ||
503 | #ifdef CONFIG_MMU | ||
504 | __set_DAMPR(2, __saved_dampr); | ||
505 | __set_DAMLR(2, __saved_damlr); | ||
506 | #endif | ||
507 | } | ||
508 | |||
509 | /* | ||
510 | * access potentially dodgy memory through a potentially dodgy pointer | ||
511 | */ | ||
512 | static inline int gdbstub_read_dword(const void *addr, uint32_t *_res) | ||
513 | { | ||
514 | unsigned long brr; | ||
515 | uint32_t res; | ||
516 | |||
517 | if (!gdbstub_addr_map(addr)) | ||
518 | return 0; | ||
519 | |||
520 | asm volatile(" movgs gr0,brr \n" | ||
521 | " ld%I2 %M2,%0 \n" | ||
522 | " movsg brr,%1 \n" | ||
523 | : "=r"(res), "=r"(brr) | ||
524 | : "m"(*(uint32_t *) addr)); | ||
525 | *_res = res; | ||
526 | gdbstub_addr_unmap(); | ||
527 | return likely(!brr); | ||
528 | } | ||
529 | |||
530 | static inline int gdbstub_write_dword(void *addr, uint32_t val) | ||
531 | { | ||
532 | unsigned long brr; | ||
533 | |||
534 | if (!gdbstub_addr_map(addr)) | ||
535 | return 0; | ||
536 | |||
537 | asm volatile(" movgs gr0,brr \n" | ||
538 | " st%I2 %1,%M2 \n" | ||
539 | " movsg brr,%0 \n" | ||
540 | : "=r"(brr) | ||
541 | : "r"(val), "m"(*(uint32_t *) addr)); | ||
542 | gdbstub_addr_unmap(); | ||
543 | return likely(!brr); | ||
544 | } | ||
545 | |||
546 | static inline int gdbstub_read_word(const void *addr, uint16_t *_res) | ||
547 | { | ||
548 | unsigned long brr; | ||
549 | uint16_t res; | ||
550 | |||
551 | if (!gdbstub_addr_map(addr)) | ||
552 | return 0; | ||
553 | |||
554 | asm volatile(" movgs gr0,brr \n" | ||
555 | " lduh%I2 %M2,%0 \n" | ||
556 | " movsg brr,%1 \n" | ||
557 | : "=r"(res), "=r"(brr) | ||
558 | : "m"(*(uint16_t *) addr)); | ||
559 | *_res = res; | ||
560 | gdbstub_addr_unmap(); | ||
561 | return likely(!brr); | ||
562 | } | ||
563 | |||
564 | static inline int gdbstub_write_word(void *addr, uint16_t val) | ||
565 | { | ||
566 | unsigned long brr; | ||
567 | |||
568 | if (!gdbstub_addr_map(addr)) | ||
569 | return 0; | ||
570 | |||
571 | asm volatile(" movgs gr0,brr \n" | ||
572 | " sth%I2 %1,%M2 \n" | ||
573 | " movsg brr,%0 \n" | ||
574 | : "=r"(brr) | ||
575 | : "r"(val), "m"(*(uint16_t *) addr)); | ||
576 | gdbstub_addr_unmap(); | ||
577 | return likely(!brr); | ||
578 | } | ||
579 | |||
580 | static inline int gdbstub_read_byte(const void *addr, uint8_t *_res) | ||
581 | { | ||
582 | unsigned long brr; | ||
583 | uint8_t res; | ||
584 | |||
585 | if (!gdbstub_addr_map(addr)) | ||
586 | return 0; | ||
587 | |||
588 | asm volatile(" movgs gr0,brr \n" | ||
589 | " ldub%I2 %M2,%0 \n" | ||
590 | " movsg brr,%1 \n" | ||
591 | : "=r"(res), "=r"(brr) | ||
592 | : "m"(*(uint8_t *) addr)); | ||
593 | *_res = res; | ||
594 | gdbstub_addr_unmap(); | ||
595 | return likely(!brr); | ||
596 | } | ||
597 | |||
598 | static inline int gdbstub_write_byte(void *addr, uint8_t val) | ||
599 | { | ||
600 | unsigned long brr; | ||
601 | |||
602 | if (!gdbstub_addr_map(addr)) | ||
603 | return 0; | ||
604 | |||
605 | asm volatile(" movgs gr0,brr \n" | ||
606 | " stb%I2 %1,%M2 \n" | ||
607 | " movsg brr,%0 \n" | ||
608 | : "=r"(brr) | ||
609 | : "r"(val), "m"(*(uint8_t *) addr)); | ||
610 | gdbstub_addr_unmap(); | ||
611 | return likely(!brr); | ||
612 | } | ||
613 | |||
614 | static void __gdbstub_console_write(struct console *co, const char *p, unsigned n) | ||
615 | { | ||
616 | char outbuf[26]; | ||
617 | int qty; | ||
618 | |||
619 | outbuf[0] = 'O'; | ||
620 | |||
621 | while (n > 0) { | ||
622 | qty = 1; | ||
623 | |||
624 | while (n > 0 && qty < 20) { | ||
625 | mem2hex(p, outbuf + qty, 2, 0); | ||
626 | qty += 2; | ||
627 | if (*p == 0x0a) { | ||
628 | outbuf[qty++] = '0'; | ||
629 | outbuf[qty++] = 'd'; | ||
630 | } | ||
631 | p++; | ||
632 | n--; | ||
633 | } | ||
634 | |||
635 | outbuf[qty] = 0; | ||
636 | gdbstub_send_packet(outbuf); | ||
637 | } | ||
638 | } | ||
639 | |||
640 | #if 0 | ||
641 | void debug_to_serial(const char *p, int n) | ||
642 | { | ||
643 | gdbstub_console_write(NULL,p,n); | ||
644 | } | ||
645 | #endif | ||
646 | |||
647 | #ifdef CONFIG_GDB_CONSOLE | ||
648 | |||
649 | static struct console gdbstub_console = { | ||
650 | .name = "gdb", | ||
651 | .write = gdbstub_console_write, /* in break.S */ | ||
652 | .flags = CON_PRINTBUFFER, | ||
653 | .index = -1, | ||
654 | }; | ||
655 | |||
656 | #endif | ||
657 | |||
658 | /*****************************************************************************/ | ||
659 | /* | ||
660 | * Convert the memory pointed to by mem into hex, placing result in buf. | ||
661 | * - if successful, return a pointer to the last char put in buf (NUL) | ||
662 | * - in case of mem fault, return NULL | ||
663 | * may_fault is non-zero if we are reading from arbitrary memory, but is currently | ||
664 | * not used. | ||
665 | */ | ||
666 | static unsigned char *mem2hex(const void *_mem, char *buf, int count, int may_fault) | ||
667 | { | ||
668 | const uint8_t *mem = _mem; | ||
669 | uint8_t ch[4] __attribute__((aligned(4))); | ||
670 | |||
671 | if ((uint32_t)mem&1 && count>=1) { | ||
672 | if (!gdbstub_read_byte(mem,ch)) | ||
673 | return NULL; | ||
674 | buf = hex_byte_pack(buf, ch[0]); | ||
675 | mem++; | ||
676 | count--; | ||
677 | } | ||
678 | |||
679 | if ((uint32_t)mem&3 && count>=2) { | ||
680 | if (!gdbstub_read_word(mem,(uint16_t *)ch)) | ||
681 | return NULL; | ||
682 | buf = hex_byte_pack(buf, ch[0]); | ||
683 | buf = hex_byte_pack(buf, ch[1]); | ||
684 | mem += 2; | ||
685 | count -= 2; | ||
686 | } | ||
687 | |||
688 | while (count>=4) { | ||
689 | if (!gdbstub_read_dword(mem,(uint32_t *)ch)) | ||
690 | return NULL; | ||
691 | buf = hex_byte_pack(buf, ch[0]); | ||
692 | buf = hex_byte_pack(buf, ch[1]); | ||
693 | buf = hex_byte_pack(buf, ch[2]); | ||
694 | buf = hex_byte_pack(buf, ch[3]); | ||
695 | mem += 4; | ||
696 | count -= 4; | ||
697 | } | ||
698 | |||
699 | if (count>=2) { | ||
700 | if (!gdbstub_read_word(mem,(uint16_t *)ch)) | ||
701 | return NULL; | ||
702 | buf = hex_byte_pack(buf, ch[0]); | ||
703 | buf = hex_byte_pack(buf, ch[1]); | ||
704 | mem += 2; | ||
705 | count -= 2; | ||
706 | } | ||
707 | |||
708 | if (count>=1) { | ||
709 | if (!gdbstub_read_byte(mem,ch)) | ||
710 | return NULL; | ||
711 | buf = hex_byte_pack(buf, ch[0]); | ||
712 | } | ||
713 | |||
714 | *buf = 0; | ||
715 | |||
716 | return buf; | ||
717 | } /* end mem2hex() */ | ||
718 | |||
719 | /*****************************************************************************/ | ||
720 | /* | ||
721 | * convert the hex array pointed to by buf into binary to be placed in mem | ||
722 | * return a pointer to the character AFTER the last byte of buffer consumed | ||
723 | */ | ||
724 | static char *hex2mem(const char *buf, void *_mem, int count) | ||
725 | { | ||
726 | uint8_t *mem = _mem; | ||
727 | union { | ||
728 | uint32_t l; | ||
729 | uint16_t w; | ||
730 | uint8_t b[4]; | ||
731 | } ch; | ||
732 | |||
733 | if ((u32)mem&1 && count>=1) { | ||
734 | ch.b[0] = hex(*buf++) << 4; | ||
735 | ch.b[0] |= hex(*buf++); | ||
736 | if (!gdbstub_write_byte(mem,ch.b[0])) | ||
737 | return NULL; | ||
738 | mem++; | ||
739 | count--; | ||
740 | } | ||
741 | |||
742 | if ((u32)mem&3 && count>=2) { | ||
743 | ch.b[0] = hex(*buf++) << 4; | ||
744 | ch.b[0] |= hex(*buf++); | ||
745 | ch.b[1] = hex(*buf++) << 4; | ||
746 | ch.b[1] |= hex(*buf++); | ||
747 | if (!gdbstub_write_word(mem,ch.w)) | ||
748 | return NULL; | ||
749 | mem += 2; | ||
750 | count -= 2; | ||
751 | } | ||
752 | |||
753 | while (count>=4) { | ||
754 | ch.b[0] = hex(*buf++) << 4; | ||
755 | ch.b[0] |= hex(*buf++); | ||
756 | ch.b[1] = hex(*buf++) << 4; | ||
757 | ch.b[1] |= hex(*buf++); | ||
758 | ch.b[2] = hex(*buf++) << 4; | ||
759 | ch.b[2] |= hex(*buf++); | ||
760 | ch.b[3] = hex(*buf++) << 4; | ||
761 | ch.b[3] |= hex(*buf++); | ||
762 | if (!gdbstub_write_dword(mem,ch.l)) | ||
763 | return NULL; | ||
764 | mem += 4; | ||
765 | count -= 4; | ||
766 | } | ||
767 | |||
768 | if (count>=2) { | ||
769 | ch.b[0] = hex(*buf++) << 4; | ||
770 | ch.b[0] |= hex(*buf++); | ||
771 | ch.b[1] = hex(*buf++) << 4; | ||
772 | ch.b[1] |= hex(*buf++); | ||
773 | if (!gdbstub_write_word(mem,ch.w)) | ||
774 | return NULL; | ||
775 | mem += 2; | ||
776 | count -= 2; | ||
777 | } | ||
778 | |||
779 | if (count>=1) { | ||
780 | ch.b[0] = hex(*buf++) << 4; | ||
781 | ch.b[0] |= hex(*buf++); | ||
782 | if (!gdbstub_write_byte(mem,ch.b[0])) | ||
783 | return NULL; | ||
784 | } | ||
785 | |||
786 | return (char *) buf; | ||
787 | } /* end hex2mem() */ | ||
788 | |||
789 | /*****************************************************************************/ | ||
790 | /* | ||
791 | * This table contains the mapping between FRV TBR.TT exception codes, | ||
792 | * and signals, which are primarily what GDB understands. It also | ||
793 | * indicates which hardware traps we need to commandeer when | ||
794 | * initializing the stub. | ||
795 | */ | ||
796 | static const struct brr_to_sig_map { | ||
797 | unsigned long brr_mask; /* BRR bitmask */ | ||
798 | unsigned long tbr_tt; /* TBR.TT code (in BRR.EBTT) */ | ||
799 | unsigned int signo; /* Signal that we map this into */ | ||
800 | } brr_to_sig_map[] = { | ||
801 | { BRR_EB, TBR_TT_INSTR_ACC_ERROR, SIGSEGV }, | ||
802 | { BRR_EB, TBR_TT_ILLEGAL_INSTR, SIGILL }, | ||
803 | { BRR_EB, TBR_TT_PRIV_INSTR, SIGILL }, | ||
804 | { BRR_EB, TBR_TT_MP_EXCEPTION, SIGFPE }, | ||
805 | { BRR_EB, TBR_TT_DATA_ACC_ERROR, SIGSEGV }, | ||
806 | { BRR_EB, TBR_TT_DATA_STR_ERROR, SIGSEGV }, | ||
807 | { BRR_EB, TBR_TT_DIVISION_EXCEP, SIGFPE }, | ||
808 | { BRR_EB, TBR_TT_COMPOUND_EXCEP, SIGSEGV }, | ||
809 | { BRR_EB, TBR_TT_INTERRUPT_13, SIGALRM }, /* watchdog */ | ||
810 | { BRR_EB, TBR_TT_INTERRUPT_14, SIGINT }, /* GDB serial */ | ||
811 | { BRR_EB, TBR_TT_INTERRUPT_15, SIGQUIT }, /* NMI */ | ||
812 | { BRR_CB, 0, SIGUSR1 }, | ||
813 | { BRR_TB, 0, SIGUSR2 }, | ||
814 | { BRR_DBNEx, 0, SIGTRAP }, | ||
815 | { BRR_DBx, 0, SIGTRAP }, /* h/w watchpoint */ | ||
816 | { BRR_IBx, 0, SIGTRAP }, /* h/w breakpoint */ | ||
817 | { BRR_CBB, 0, SIGTRAP }, | ||
818 | { BRR_SB, 0, SIGTRAP }, | ||
819 | { BRR_ST, 0, SIGTRAP }, /* single step */ | ||
820 | { 0, 0, SIGHUP } /* default */ | ||
821 | }; | ||
822 | |||
823 | /*****************************************************************************/ | ||
824 | /* | ||
825 | * convert the FRV BRR register contents into a UNIX signal number | ||
826 | */ | ||
827 | static inline int gdbstub_compute_signal(unsigned long brr) | ||
828 | { | ||
829 | const struct brr_to_sig_map *map; | ||
830 | unsigned long tbr = (brr & BRR_EBTT) >> 12; | ||
831 | |||
832 | for (map = brr_to_sig_map; map->brr_mask; map++) | ||
833 | if (map->brr_mask & brr) | ||
834 | if (!map->tbr_tt || map->tbr_tt == tbr) | ||
835 | break; | ||
836 | |||
837 | return map->signo; | ||
838 | } /* end gdbstub_compute_signal() */ | ||
839 | |||
840 | /*****************************************************************************/ | ||
841 | /* | ||
842 | * set a software breakpoint or a hardware breakpoint or watchpoint | ||
843 | */ | ||
844 | static int gdbstub_set_breakpoint(unsigned long type, unsigned long addr, unsigned long len) | ||
845 | { | ||
846 | unsigned long tmp; | ||
847 | int bkpt, loop, xloop; | ||
848 | |||
849 | union { | ||
850 | struct { | ||
851 | unsigned long mask0, mask1; | ||
852 | }; | ||
853 | uint8_t bytes[8]; | ||
854 | } dbmr; | ||
855 | |||
856 | //gdbstub_printk("setbkpt(%ld,%08lx,%ld)\n", type, addr, len); | ||
857 | |||
858 | switch (type) { | ||
859 | /* set software breakpoint */ | ||
860 | case 0: | ||
861 | if (addr & 3 || len > 7*4) | ||
862 | return -EINVAL; | ||
863 | |||
864 | for (bkpt = 255; bkpt >= 0; bkpt--) | ||
865 | if (!gdbstub_bkpts[bkpt].addr) | ||
866 | break; | ||
867 | if (bkpt < 0) | ||
868 | return -ENOSPC; | ||
869 | |||
870 | for (loop = 0; loop < len/4; loop++) | ||
871 | if (!gdbstub_read_dword(&((uint32_t *) addr)[loop], | ||
872 | &gdbstub_bkpts[bkpt].originsns[loop])) | ||
873 | return -EFAULT; | ||
874 | |||
875 | for (loop = 0; loop < len/4; loop++) | ||
876 | if (!gdbstub_write_dword(&((uint32_t *) addr)[loop], | ||
877 | BREAK_INSN) | ||
878 | ) { | ||
879 | /* need to undo the changes if possible */ | ||
880 | for (xloop = 0; xloop < loop; xloop++) | ||
881 | gdbstub_write_dword(&((uint32_t *) addr)[xloop], | ||
882 | gdbstub_bkpts[bkpt].originsns[xloop]); | ||
883 | return -EFAULT; | ||
884 | } | ||
885 | |||
886 | gdbstub_bkpts[bkpt].addr = addr; | ||
887 | gdbstub_bkpts[bkpt].len = len; | ||
888 | |||
889 | #if 0 | ||
890 | gdbstub_printk("Set BKPT[%02x]: %08lx #%d {%04x, %04x} -> { %04x, %04x }\n", | ||
891 | bkpt, | ||
892 | gdbstub_bkpts[bkpt].addr, | ||
893 | gdbstub_bkpts[bkpt].len, | ||
894 | gdbstub_bkpts[bkpt].originsns[0], | ||
895 | gdbstub_bkpts[bkpt].originsns[1], | ||
896 | ((uint32_t *) addr)[0], | ||
897 | ((uint32_t *) addr)[1] | ||
898 | ); | ||
899 | #endif | ||
900 | return 0; | ||
901 | |||
902 | /* set hardware breakpoint */ | ||
903 | case 1: | ||
904 | if (addr & 3 || len != 4) | ||
905 | return -EINVAL; | ||
906 | |||
907 | if (!(__debug_regs->dcr & DCR_IBE0)) { | ||
908 | //gdbstub_printk("set h/w break 0: %08lx\n", addr); | ||
909 | __debug_regs->dcr |= DCR_IBE0; | ||
910 | __debug_regs->ibar[0] = addr; | ||
911 | asm volatile("movgs %0,ibar0" : : "r"(addr)); | ||
912 | return 0; | ||
913 | } | ||
914 | |||
915 | if (!(__debug_regs->dcr & DCR_IBE1)) { | ||
916 | //gdbstub_printk("set h/w break 1: %08lx\n", addr); | ||
917 | __debug_regs->dcr |= DCR_IBE1; | ||
918 | __debug_regs->ibar[1] = addr; | ||
919 | asm volatile("movgs %0,ibar1" : : "r"(addr)); | ||
920 | return 0; | ||
921 | } | ||
922 | |||
923 | if (!(__debug_regs->dcr & DCR_IBE2)) { | ||
924 | //gdbstub_printk("set h/w break 2: %08lx\n", addr); | ||
925 | __debug_regs->dcr |= DCR_IBE2; | ||
926 | __debug_regs->ibar[2] = addr; | ||
927 | asm volatile("movgs %0,ibar2" : : "r"(addr)); | ||
928 | return 0; | ||
929 | } | ||
930 | |||
931 | if (!(__debug_regs->dcr & DCR_IBE3)) { | ||
932 | //gdbstub_printk("set h/w break 3: %08lx\n", addr); | ||
933 | __debug_regs->dcr |= DCR_IBE3; | ||
934 | __debug_regs->ibar[3] = addr; | ||
935 | asm volatile("movgs %0,ibar3" : : "r"(addr)); | ||
936 | return 0; | ||
937 | } | ||
938 | |||
939 | return -ENOSPC; | ||
940 | |||
941 | /* set data read/write/access watchpoint */ | ||
942 | case 2: | ||
943 | case 3: | ||
944 | case 4: | ||
945 | if ((addr & ~7) != ((addr + len - 1) & ~7)) | ||
946 | return -EINVAL; | ||
947 | |||
948 | tmp = addr & 7; | ||
949 | |||
950 | memset(dbmr.bytes, 0xff, sizeof(dbmr.bytes)); | ||
951 | for (loop = 0; loop < len; loop++) | ||
952 | dbmr.bytes[tmp + loop] = 0; | ||
953 | |||
954 | addr &= ~7; | ||
955 | |||
956 | if (!(__debug_regs->dcr & (DCR_DRBE0|DCR_DWBE0))) { | ||
957 | //gdbstub_printk("set h/w watchpoint 0 type %ld: %08lx\n", type, addr); | ||
958 | tmp = type==2 ? DCR_DWBE0 : type==3 ? DCR_DRBE0 : DCR_DRBE0|DCR_DWBE0; | ||
959 | |||
960 | __debug_regs->dcr |= tmp; | ||
961 | __debug_regs->dbar[0] = addr; | ||
962 | __debug_regs->dbmr[0][0] = dbmr.mask0; | ||
963 | __debug_regs->dbmr[0][1] = dbmr.mask1; | ||
964 | __debug_regs->dbdr[0][0] = 0; | ||
965 | __debug_regs->dbdr[0][1] = 0; | ||
966 | |||
967 | asm volatile(" movgs %0,dbar0 \n" | ||
968 | " movgs %1,dbmr00 \n" | ||
969 | " movgs %2,dbmr01 \n" | ||
970 | " movgs gr0,dbdr00 \n" | ||
971 | " movgs gr0,dbdr01 \n" | ||
972 | : : "r"(addr), "r"(dbmr.mask0), "r"(dbmr.mask1)); | ||
973 | return 0; | ||
974 | } | ||
975 | |||
976 | if (!(__debug_regs->dcr & (DCR_DRBE1|DCR_DWBE1))) { | ||
977 | //gdbstub_printk("set h/w watchpoint 1 type %ld: %08lx\n", type, addr); | ||
978 | tmp = type==2 ? DCR_DWBE1 : type==3 ? DCR_DRBE1 : DCR_DRBE1|DCR_DWBE1; | ||
979 | |||
980 | __debug_regs->dcr |= tmp; | ||
981 | __debug_regs->dbar[1] = addr; | ||
982 | __debug_regs->dbmr[1][0] = dbmr.mask0; | ||
983 | __debug_regs->dbmr[1][1] = dbmr.mask1; | ||
984 | __debug_regs->dbdr[1][0] = 0; | ||
985 | __debug_regs->dbdr[1][1] = 0; | ||
986 | |||
987 | asm volatile(" movgs %0,dbar1 \n" | ||
988 | " movgs %1,dbmr10 \n" | ||
989 | " movgs %2,dbmr11 \n" | ||
990 | " movgs gr0,dbdr10 \n" | ||
991 | " movgs gr0,dbdr11 \n" | ||
992 | : : "r"(addr), "r"(dbmr.mask0), "r"(dbmr.mask1)); | ||
993 | return 0; | ||
994 | } | ||
995 | |||
996 | return -ENOSPC; | ||
997 | |||
998 | default: | ||
999 | return -EINVAL; | ||
1000 | } | ||
1001 | |||
1002 | } /* end gdbstub_set_breakpoint() */ | ||
1003 | |||
1004 | /*****************************************************************************/ | ||
1005 | /* | ||
1006 | * clear a breakpoint or watchpoint | ||
1007 | */ | ||
1008 | int gdbstub_clear_breakpoint(unsigned long type, unsigned long addr, unsigned long len) | ||
1009 | { | ||
1010 | unsigned long tmp; | ||
1011 | int bkpt, loop; | ||
1012 | |||
1013 | union { | ||
1014 | struct { | ||
1015 | unsigned long mask0, mask1; | ||
1016 | }; | ||
1017 | uint8_t bytes[8]; | ||
1018 | } dbmr; | ||
1019 | |||
1020 | //gdbstub_printk("clearbkpt(%ld,%08lx,%ld)\n", type, addr, len); | ||
1021 | |||
1022 | switch (type) { | ||
1023 | /* clear software breakpoint */ | ||
1024 | case 0: | ||
1025 | for (bkpt = 255; bkpt >= 0; bkpt--) | ||
1026 | if (gdbstub_bkpts[bkpt].addr == addr && gdbstub_bkpts[bkpt].len == len) | ||
1027 | break; | ||
1028 | if (bkpt < 0) | ||
1029 | return -ENOENT; | ||
1030 | |||
1031 | gdbstub_bkpts[bkpt].addr = 0; | ||
1032 | |||
1033 | for (loop = 0; loop < len/4; loop++) | ||
1034 | if (!gdbstub_write_dword(&((uint32_t *) addr)[loop], | ||
1035 | gdbstub_bkpts[bkpt].originsns[loop])) | ||
1036 | return -EFAULT; | ||
1037 | return 0; | ||
1038 | |||
1039 | /* clear hardware breakpoint */ | ||
1040 | case 1: | ||
1041 | if (addr & 3 || len != 4) | ||
1042 | return -EINVAL; | ||
1043 | |||
1044 | #define __get_ibar(X) ({ unsigned long x; asm volatile("movsg ibar"#X",%0" : "=r"(x)); x; }) | ||
1045 | |||
1046 | if (__debug_regs->dcr & DCR_IBE0 && __get_ibar(0) == addr) { | ||
1047 | //gdbstub_printk("clear h/w break 0: %08lx\n", addr); | ||
1048 | __debug_regs->dcr &= ~DCR_IBE0; | ||
1049 | __debug_regs->ibar[0] = 0; | ||
1050 | asm volatile("movgs gr0,ibar0"); | ||
1051 | return 0; | ||
1052 | } | ||
1053 | |||
1054 | if (__debug_regs->dcr & DCR_IBE1 && __get_ibar(1) == addr) { | ||
1055 | //gdbstub_printk("clear h/w break 1: %08lx\n", addr); | ||
1056 | __debug_regs->dcr &= ~DCR_IBE1; | ||
1057 | __debug_regs->ibar[1] = 0; | ||
1058 | asm volatile("movgs gr0,ibar1"); | ||
1059 | return 0; | ||
1060 | } | ||
1061 | |||
1062 | if (__debug_regs->dcr & DCR_IBE2 && __get_ibar(2) == addr) { | ||
1063 | //gdbstub_printk("clear h/w break 2: %08lx\n", addr); | ||
1064 | __debug_regs->dcr &= ~DCR_IBE2; | ||
1065 | __debug_regs->ibar[2] = 0; | ||
1066 | asm volatile("movgs gr0,ibar2"); | ||
1067 | return 0; | ||
1068 | } | ||
1069 | |||
1070 | if (__debug_regs->dcr & DCR_IBE3 && __get_ibar(3) == addr) { | ||
1071 | //gdbstub_printk("clear h/w break 3: %08lx\n", addr); | ||
1072 | __debug_regs->dcr &= ~DCR_IBE3; | ||
1073 | __debug_regs->ibar[3] = 0; | ||
1074 | asm volatile("movgs gr0,ibar3"); | ||
1075 | return 0; | ||
1076 | } | ||
1077 | |||
1078 | return -EINVAL; | ||
1079 | |||
1080 | /* clear data read/write/access watchpoint */ | ||
1081 | case 2: | ||
1082 | case 3: | ||
1083 | case 4: | ||
1084 | if ((addr & ~7) != ((addr + len - 1) & ~7)) | ||
1085 | return -EINVAL; | ||
1086 | |||
1087 | tmp = addr & 7; | ||
1088 | |||
1089 | memset(dbmr.bytes, 0xff, sizeof(dbmr.bytes)); | ||
1090 | for (loop = 0; loop < len; loop++) | ||
1091 | dbmr.bytes[tmp + loop] = 0; | ||
1092 | |||
1093 | addr &= ~7; | ||
1094 | |||
1095 | #define __get_dbar(X) ({ unsigned long x; asm volatile("movsg dbar"#X",%0" : "=r"(x)); x; }) | ||
1096 | #define __get_dbmr0(X) ({ unsigned long x; asm volatile("movsg dbmr"#X"0,%0" : "=r"(x)); x; }) | ||
1097 | #define __get_dbmr1(X) ({ unsigned long x; asm volatile("movsg dbmr"#X"1,%0" : "=r"(x)); x; }) | ||
1098 | |||
1099 | /* consider DBAR 0 */ | ||
1100 | tmp = type==2 ? DCR_DWBE0 : type==3 ? DCR_DRBE0 : DCR_DRBE0|DCR_DWBE0; | ||
1101 | |||
1102 | if ((__debug_regs->dcr & (DCR_DRBE0|DCR_DWBE0)) != tmp || | ||
1103 | __get_dbar(0) != addr || | ||
1104 | __get_dbmr0(0) != dbmr.mask0 || | ||
1105 | __get_dbmr1(0) != dbmr.mask1) | ||
1106 | goto skip_dbar0; | ||
1107 | |||
1108 | //gdbstub_printk("clear h/w watchpoint 0 type %ld: %08lx\n", type, addr); | ||
1109 | __debug_regs->dcr &= ~(DCR_DRBE0|DCR_DWBE0); | ||
1110 | __debug_regs->dbar[0] = 0; | ||
1111 | __debug_regs->dbmr[0][0] = 0; | ||
1112 | __debug_regs->dbmr[0][1] = 0; | ||
1113 | __debug_regs->dbdr[0][0] = 0; | ||
1114 | __debug_regs->dbdr[0][1] = 0; | ||
1115 | |||
1116 | asm volatile(" movgs gr0,dbar0 \n" | ||
1117 | " movgs gr0,dbmr00 \n" | ||
1118 | " movgs gr0,dbmr01 \n" | ||
1119 | " movgs gr0,dbdr00 \n" | ||
1120 | " movgs gr0,dbdr01 \n"); | ||
1121 | return 0; | ||
1122 | |||
1123 | skip_dbar0: | ||
1124 | /* consider DBAR 0 */ | ||
1125 | tmp = type==2 ? DCR_DWBE1 : type==3 ? DCR_DRBE1 : DCR_DRBE1|DCR_DWBE1; | ||
1126 | |||
1127 | if ((__debug_regs->dcr & (DCR_DRBE1|DCR_DWBE1)) != tmp || | ||
1128 | __get_dbar(1) != addr || | ||
1129 | __get_dbmr0(1) != dbmr.mask0 || | ||
1130 | __get_dbmr1(1) != dbmr.mask1) | ||
1131 | goto skip_dbar1; | ||
1132 | |||
1133 | //gdbstub_printk("clear h/w watchpoint 1 type %ld: %08lx\n", type, addr); | ||
1134 | __debug_regs->dcr &= ~(DCR_DRBE1|DCR_DWBE1); | ||
1135 | __debug_regs->dbar[1] = 0; | ||
1136 | __debug_regs->dbmr[1][0] = 0; | ||
1137 | __debug_regs->dbmr[1][1] = 0; | ||
1138 | __debug_regs->dbdr[1][0] = 0; | ||
1139 | __debug_regs->dbdr[1][1] = 0; | ||
1140 | |||
1141 | asm volatile(" movgs gr0,dbar1 \n" | ||
1142 | " movgs gr0,dbmr10 \n" | ||
1143 | " movgs gr0,dbmr11 \n" | ||
1144 | " movgs gr0,dbdr10 \n" | ||
1145 | " movgs gr0,dbdr11 \n"); | ||
1146 | return 0; | ||
1147 | |||
1148 | skip_dbar1: | ||
1149 | return -ENOSPC; | ||
1150 | |||
1151 | default: | ||
1152 | return -EINVAL; | ||
1153 | } | ||
1154 | } /* end gdbstub_clear_breakpoint() */ | ||
1155 | |||
1156 | /*****************************************************************************/ | ||
1157 | /* | ||
1158 | * check a for an internal software breakpoint, and wind the PC back if necessary | ||
1159 | */ | ||
1160 | static void gdbstub_check_breakpoint(void) | ||
1161 | { | ||
1162 | unsigned long addr = __debug_frame->pc - 4; | ||
1163 | int bkpt; | ||
1164 | |||
1165 | for (bkpt = 255; bkpt >= 0; bkpt--) | ||
1166 | if (gdbstub_bkpts[bkpt].addr == addr) | ||
1167 | break; | ||
1168 | if (bkpt >= 0) | ||
1169 | __debug_frame->pc = addr; | ||
1170 | |||
1171 | //gdbstub_printk("alter pc [%d] %08lx\n", bkpt, __debug_frame->pc); | ||
1172 | |||
1173 | } /* end gdbstub_check_breakpoint() */ | ||
1174 | |||
1175 | /*****************************************************************************/ | ||
1176 | /* | ||
1177 | * | ||
1178 | */ | ||
1179 | static void __maybe_unused gdbstub_show_regs(void) | ||
1180 | { | ||
1181 | unsigned long *reg; | ||
1182 | int loop; | ||
1183 | |||
1184 | gdbstub_printk("\n"); | ||
1185 | |||
1186 | gdbstub_printk("Frame: @%p [%s]\n", | ||
1187 | __debug_frame, | ||
1188 | __debug_frame->psr & PSR_S ? "kernel" : "user"); | ||
1189 | |||
1190 | reg = (unsigned long *) __debug_frame; | ||
1191 | for (loop = 0; loop < NR_PT_REGS; loop++) { | ||
1192 | printk("%s %08lx", regnames[loop + 0], reg[loop + 0]); | ||
1193 | |||
1194 | if (loop == NR_PT_REGS - 1 || loop % 5 == 4) | ||
1195 | printk("\n"); | ||
1196 | else | ||
1197 | printk(" | "); | ||
1198 | } | ||
1199 | |||
1200 | gdbstub_printk("Process %s (pid: %d)\n", current->comm, current->pid); | ||
1201 | } /* end gdbstub_show_regs() */ | ||
1202 | |||
1203 | /*****************************************************************************/ | ||
1204 | /* | ||
1205 | * dump debugging regs | ||
1206 | */ | ||
1207 | static void __maybe_unused gdbstub_dump_debugregs(void) | ||
1208 | { | ||
1209 | gdbstub_printk("DCR %08lx ", __debug_status.dcr); | ||
1210 | gdbstub_printk("BRR %08lx\n", __debug_status.brr); | ||
1211 | |||
1212 | gdbstub_printk("IBAR0 %08lx ", __get_ibar(0)); | ||
1213 | gdbstub_printk("IBAR1 %08lx ", __get_ibar(1)); | ||
1214 | gdbstub_printk("IBAR2 %08lx ", __get_ibar(2)); | ||
1215 | gdbstub_printk("IBAR3 %08lx\n", __get_ibar(3)); | ||
1216 | |||
1217 | gdbstub_printk("DBAR0 %08lx ", __get_dbar(0)); | ||
1218 | gdbstub_printk("DBMR00 %08lx ", __get_dbmr0(0)); | ||
1219 | gdbstub_printk("DBMR01 %08lx\n", __get_dbmr1(0)); | ||
1220 | |||
1221 | gdbstub_printk("DBAR1 %08lx ", __get_dbar(1)); | ||
1222 | gdbstub_printk("DBMR10 %08lx ", __get_dbmr0(1)); | ||
1223 | gdbstub_printk("DBMR11 %08lx\n", __get_dbmr1(1)); | ||
1224 | |||
1225 | gdbstub_printk("\n"); | ||
1226 | } /* end gdbstub_dump_debugregs() */ | ||
1227 | |||
1228 | /*****************************************************************************/ | ||
1229 | /* | ||
1230 | * dump the MMU state into a structure so that it can be accessed with GDB | ||
1231 | */ | ||
1232 | void gdbstub_get_mmu_state(void) | ||
1233 | { | ||
1234 | asm volatile("movsg hsr0,%0" : "=r"(__debug_mmu.regs.hsr0)); | ||
1235 | asm volatile("movsg pcsr,%0" : "=r"(__debug_mmu.regs.pcsr)); | ||
1236 | asm volatile("movsg esr0,%0" : "=r"(__debug_mmu.regs.esr0)); | ||
1237 | asm volatile("movsg ear0,%0" : "=r"(__debug_mmu.regs.ear0)); | ||
1238 | asm volatile("movsg epcr0,%0" : "=r"(__debug_mmu.regs.epcr0)); | ||
1239 | |||
1240 | /* read the protection / SAT registers */ | ||
1241 | __debug_mmu.iamr[0].L = __get_IAMLR(0); | ||
1242 | __debug_mmu.iamr[0].P = __get_IAMPR(0); | ||
1243 | __debug_mmu.iamr[1].L = __get_IAMLR(1); | ||
1244 | __debug_mmu.iamr[1].P = __get_IAMPR(1); | ||
1245 | __debug_mmu.iamr[2].L = __get_IAMLR(2); | ||
1246 | __debug_mmu.iamr[2].P = __get_IAMPR(2); | ||
1247 | __debug_mmu.iamr[3].L = __get_IAMLR(3); | ||
1248 | __debug_mmu.iamr[3].P = __get_IAMPR(3); | ||
1249 | __debug_mmu.iamr[4].L = __get_IAMLR(4); | ||
1250 | __debug_mmu.iamr[4].P = __get_IAMPR(4); | ||
1251 | __debug_mmu.iamr[5].L = __get_IAMLR(5); | ||
1252 | __debug_mmu.iamr[5].P = __get_IAMPR(5); | ||
1253 | __debug_mmu.iamr[6].L = __get_IAMLR(6); | ||
1254 | __debug_mmu.iamr[6].P = __get_IAMPR(6); | ||
1255 | __debug_mmu.iamr[7].L = __get_IAMLR(7); | ||
1256 | __debug_mmu.iamr[7].P = __get_IAMPR(7); | ||
1257 | __debug_mmu.iamr[8].L = __get_IAMLR(8); | ||
1258 | __debug_mmu.iamr[8].P = __get_IAMPR(8); | ||
1259 | __debug_mmu.iamr[9].L = __get_IAMLR(9); | ||
1260 | __debug_mmu.iamr[9].P = __get_IAMPR(9); | ||
1261 | __debug_mmu.iamr[10].L = __get_IAMLR(10); | ||
1262 | __debug_mmu.iamr[10].P = __get_IAMPR(10); | ||
1263 | __debug_mmu.iamr[11].L = __get_IAMLR(11); | ||
1264 | __debug_mmu.iamr[11].P = __get_IAMPR(11); | ||
1265 | __debug_mmu.iamr[12].L = __get_IAMLR(12); | ||
1266 | __debug_mmu.iamr[12].P = __get_IAMPR(12); | ||
1267 | __debug_mmu.iamr[13].L = __get_IAMLR(13); | ||
1268 | __debug_mmu.iamr[13].P = __get_IAMPR(13); | ||
1269 | __debug_mmu.iamr[14].L = __get_IAMLR(14); | ||
1270 | __debug_mmu.iamr[14].P = __get_IAMPR(14); | ||
1271 | __debug_mmu.iamr[15].L = __get_IAMLR(15); | ||
1272 | __debug_mmu.iamr[15].P = __get_IAMPR(15); | ||
1273 | |||
1274 | __debug_mmu.damr[0].L = __get_DAMLR(0); | ||
1275 | __debug_mmu.damr[0].P = __get_DAMPR(0); | ||
1276 | __debug_mmu.damr[1].L = __get_DAMLR(1); | ||
1277 | __debug_mmu.damr[1].P = __get_DAMPR(1); | ||
1278 | __debug_mmu.damr[2].L = __get_DAMLR(2); | ||
1279 | __debug_mmu.damr[2].P = __get_DAMPR(2); | ||
1280 | __debug_mmu.damr[3].L = __get_DAMLR(3); | ||
1281 | __debug_mmu.damr[3].P = __get_DAMPR(3); | ||
1282 | __debug_mmu.damr[4].L = __get_DAMLR(4); | ||
1283 | __debug_mmu.damr[4].P = __get_DAMPR(4); | ||
1284 | __debug_mmu.damr[5].L = __get_DAMLR(5); | ||
1285 | __debug_mmu.damr[5].P = __get_DAMPR(5); | ||
1286 | __debug_mmu.damr[6].L = __get_DAMLR(6); | ||
1287 | __debug_mmu.damr[6].P = __get_DAMPR(6); | ||
1288 | __debug_mmu.damr[7].L = __get_DAMLR(7); | ||
1289 | __debug_mmu.damr[7].P = __get_DAMPR(7); | ||
1290 | __debug_mmu.damr[8].L = __get_DAMLR(8); | ||
1291 | __debug_mmu.damr[8].P = __get_DAMPR(8); | ||
1292 | __debug_mmu.damr[9].L = __get_DAMLR(9); | ||
1293 | __debug_mmu.damr[9].P = __get_DAMPR(9); | ||
1294 | __debug_mmu.damr[10].L = __get_DAMLR(10); | ||
1295 | __debug_mmu.damr[10].P = __get_DAMPR(10); | ||
1296 | __debug_mmu.damr[11].L = __get_DAMLR(11); | ||
1297 | __debug_mmu.damr[11].P = __get_DAMPR(11); | ||
1298 | __debug_mmu.damr[12].L = __get_DAMLR(12); | ||
1299 | __debug_mmu.damr[12].P = __get_DAMPR(12); | ||
1300 | __debug_mmu.damr[13].L = __get_DAMLR(13); | ||
1301 | __debug_mmu.damr[13].P = __get_DAMPR(13); | ||
1302 | __debug_mmu.damr[14].L = __get_DAMLR(14); | ||
1303 | __debug_mmu.damr[14].P = __get_DAMPR(14); | ||
1304 | __debug_mmu.damr[15].L = __get_DAMLR(15); | ||
1305 | __debug_mmu.damr[15].P = __get_DAMPR(15); | ||
1306 | |||
1307 | #ifdef CONFIG_MMU | ||
1308 | do { | ||
1309 | /* read the DAT entries from the TLB */ | ||
1310 | struct __debug_amr *p; | ||
1311 | int loop; | ||
1312 | |||
1313 | asm volatile("movsg tplr,%0" : "=r"(__debug_mmu.regs.tplr)); | ||
1314 | asm volatile("movsg tppr,%0" : "=r"(__debug_mmu.regs.tppr)); | ||
1315 | asm volatile("movsg tpxr,%0" : "=r"(__debug_mmu.regs.tpxr)); | ||
1316 | asm volatile("movsg cxnr,%0" : "=r"(__debug_mmu.regs.cxnr)); | ||
1317 | |||
1318 | p = __debug_mmu.tlb; | ||
1319 | |||
1320 | /* way 0 */ | ||
1321 | asm volatile("movgs %0,tpxr" :: "r"(0 << TPXR_WAY_SHIFT)); | ||
1322 | for (loop = 0; loop < 64; loop++) { | ||
1323 | asm volatile("tlbpr %0,gr0,#1,#0" :: "r"(loop << PAGE_SHIFT)); | ||
1324 | asm volatile("movsg tplr,%0" : "=r"(p->L)); | ||
1325 | asm volatile("movsg tppr,%0" : "=r"(p->P)); | ||
1326 | p++; | ||
1327 | } | ||
1328 | |||
1329 | /* way 1 */ | ||
1330 | asm volatile("movgs %0,tpxr" :: "r"(1 << TPXR_WAY_SHIFT)); | ||
1331 | for (loop = 0; loop < 64; loop++) { | ||
1332 | asm volatile("tlbpr %0,gr0,#1,#0" :: "r"(loop << PAGE_SHIFT)); | ||
1333 | asm volatile("movsg tplr,%0" : "=r"(p->L)); | ||
1334 | asm volatile("movsg tppr,%0" : "=r"(p->P)); | ||
1335 | p++; | ||
1336 | } | ||
1337 | |||
1338 | asm volatile("movgs %0,tplr" :: "r"(__debug_mmu.regs.tplr)); | ||
1339 | asm volatile("movgs %0,tppr" :: "r"(__debug_mmu.regs.tppr)); | ||
1340 | asm volatile("movgs %0,tpxr" :: "r"(__debug_mmu.regs.tpxr)); | ||
1341 | } while(0); | ||
1342 | #endif | ||
1343 | |||
1344 | } /* end gdbstub_get_mmu_state() */ | ||
1345 | |||
1346 | /* | ||
1347 | * handle general query commands of the form 'qXXXXX' | ||
1348 | */ | ||
1349 | static void gdbstub_handle_query(void) | ||
1350 | { | ||
1351 | if (strcmp(input_buffer, "qAttached") == 0) { | ||
1352 | /* return current thread ID */ | ||
1353 | sprintf(output_buffer, "1"); | ||
1354 | return; | ||
1355 | } | ||
1356 | |||
1357 | if (strcmp(input_buffer, "qC") == 0) { | ||
1358 | /* return current thread ID */ | ||
1359 | sprintf(output_buffer, "QC 0"); | ||
1360 | return; | ||
1361 | } | ||
1362 | |||
1363 | if (strcmp(input_buffer, "qOffsets") == 0) { | ||
1364 | /* return relocation offset of text and data segments */ | ||
1365 | sprintf(output_buffer, "Text=0;Data=0;Bss=0"); | ||
1366 | return; | ||
1367 | } | ||
1368 | |||
1369 | if (strcmp(input_buffer, "qSymbol::") == 0) { | ||
1370 | sprintf(output_buffer, "OK"); | ||
1371 | return; | ||
1372 | } | ||
1373 | |||
1374 | if (strcmp(input_buffer, "qSupported") == 0) { | ||
1375 | /* query of supported features */ | ||
1376 | sprintf(output_buffer, "PacketSize=%u;ReverseContinue-;ReverseStep-", | ||
1377 | sizeof(input_buffer)); | ||
1378 | return; | ||
1379 | } | ||
1380 | |||
1381 | gdbstub_strcpy(output_buffer,"E01"); | ||
1382 | } | ||
1383 | |||
1384 | /*****************************************************************************/ | ||
1385 | /* | ||
1386 | * handle event interception and GDB remote protocol processing | ||
1387 | * - on entry: | ||
1388 | * PSR.ET==0, PSR.S==1 and the CPU is in debug mode | ||
1389 | * __debug_frame points to the saved registers | ||
1390 | * __frame points to the kernel mode exception frame, if it was in kernel | ||
1391 | * mode when the break happened | ||
1392 | */ | ||
1393 | void gdbstub(int sigval) | ||
1394 | { | ||
1395 | unsigned long addr, length, loop, dbar, temp, temp2, temp3; | ||
1396 | uint32_t zero; | ||
1397 | char *ptr; | ||
1398 | int flush_cache = 0; | ||
1399 | |||
1400 | LEDS(0x5000); | ||
1401 | |||
1402 | if (sigval < 0) { | ||
1403 | #ifndef CONFIG_GDBSTUB_IMMEDIATE | ||
1404 | /* return immediately if GDB immediate activation option not set */ | ||
1405 | return; | ||
1406 | #else | ||
1407 | sigval = SIGINT; | ||
1408 | #endif | ||
1409 | } | ||
1410 | |||
1411 | save_user_regs(&__debug_frame0->uc); | ||
1412 | |||
1413 | #if 0 | ||
1414 | gdbstub_printk("--> gdbstub() %08x %p %08x %08x\n", | ||
1415 | __debug_frame->pc, | ||
1416 | __debug_frame, | ||
1417 | __debug_regs->brr, | ||
1418 | __debug_regs->bpsr); | ||
1419 | // gdbstub_show_regs(); | ||
1420 | #endif | ||
1421 | |||
1422 | LEDS(0x5001); | ||
1423 | |||
1424 | /* if we were interrupted by input on the serial gdbstub serial port, | ||
1425 | * restore the context prior to the interrupt so that we return to that | ||
1426 | * directly | ||
1427 | */ | ||
1428 | temp = (unsigned long) __entry_kerneltrap_table; | ||
1429 | temp2 = (unsigned long) __entry_usertrap_table; | ||
1430 | temp3 = __debug_frame->pc & ~15; | ||
1431 | |||
1432 | if (temp3 == temp + TBR_TT_INTERRUPT_15 || | ||
1433 | temp3 == temp2 + TBR_TT_INTERRUPT_15 | ||
1434 | ) { | ||
1435 | asm volatile("movsg pcsr,%0" : "=r"(__debug_frame->pc)); | ||
1436 | __debug_frame->psr |= PSR_ET; | ||
1437 | __debug_frame->psr &= ~PSR_S; | ||
1438 | if (__debug_frame->psr & PSR_PS) | ||
1439 | __debug_frame->psr |= PSR_S; | ||
1440 | __debug_status.brr = (__debug_frame->tbr & TBR_TT) << 12; | ||
1441 | __debug_status.brr |= BRR_EB; | ||
1442 | sigval = SIGINT; | ||
1443 | } | ||
1444 | |||
1445 | /* handle the decrement timer going off (FR451 only) */ | ||
1446 | if (temp3 == temp + TBR_TT_DECREMENT_TIMER || | ||
1447 | temp3 == temp2 + TBR_TT_DECREMENT_TIMER | ||
1448 | ) { | ||
1449 | asm volatile("movgs %0,timerd" :: "r"(10000000)); | ||
1450 | asm volatile("movsg pcsr,%0" : "=r"(__debug_frame->pc)); | ||
1451 | __debug_frame->psr |= PSR_ET; | ||
1452 | __debug_frame->psr &= ~PSR_S; | ||
1453 | if (__debug_frame->psr & PSR_PS) | ||
1454 | __debug_frame->psr |= PSR_S; | ||
1455 | __debug_status.brr = (__debug_frame->tbr & TBR_TT) << 12; | ||
1456 | __debug_status.brr |= BRR_EB; | ||
1457 | sigval = SIGXCPU; | ||
1458 | } | ||
1459 | |||
1460 | LEDS(0x5002); | ||
1461 | |||
1462 | /* after a BREAK insn, the PC lands on the far side of it */ | ||
1463 | if (__debug_status.brr & BRR_SB) | ||
1464 | gdbstub_check_breakpoint(); | ||
1465 | |||
1466 | LEDS(0x5003); | ||
1467 | |||
1468 | /* handle attempts to write console data via GDB "O" commands */ | ||
1469 | if (__debug_frame->pc == (unsigned long) gdbstub_console_write + 4) { | ||
1470 | __gdbstub_console_write((struct console *) __debug_frame->gr8, | ||
1471 | (const char *) __debug_frame->gr9, | ||
1472 | (unsigned) __debug_frame->gr10); | ||
1473 | goto done; | ||
1474 | } | ||
1475 | |||
1476 | if (gdbstub_rx_unget) { | ||
1477 | sigval = SIGINT; | ||
1478 | goto packet_waiting; | ||
1479 | } | ||
1480 | |||
1481 | if (!sigval) | ||
1482 | sigval = gdbstub_compute_signal(__debug_status.brr); | ||
1483 | |||
1484 | LEDS(0x5004); | ||
1485 | |||
1486 | /* send a message to the debugger's user saying what happened if it may | ||
1487 | * not be clear cut (we can't map exceptions onto signals properly) | ||
1488 | */ | ||
1489 | if (sigval != SIGINT && sigval != SIGTRAP && sigval != SIGILL) { | ||
1490 | static const char title[] = "Break "; | ||
1491 | static const char crlf[] = "\r\n"; | ||
1492 | unsigned long brr = __debug_status.brr; | ||
1493 | char hx; | ||
1494 | |||
1495 | ptr = output_buffer; | ||
1496 | *ptr++ = 'O'; | ||
1497 | ptr = mem2hex(title, ptr, sizeof(title) - 1,0); | ||
1498 | |||
1499 | hx = hex_asc_hi(brr >> 24); | ||
1500 | ptr = hex_byte_pack(ptr, hx); | ||
1501 | hx = hex_asc_lo(brr >> 24); | ||
1502 | ptr = hex_byte_pack(ptr, hx); | ||
1503 | hx = hex_asc_hi(brr >> 16); | ||
1504 | ptr = hex_byte_pack(ptr, hx); | ||
1505 | hx = hex_asc_lo(brr >> 16); | ||
1506 | ptr = hex_byte_pack(ptr, hx); | ||
1507 | hx = hex_asc_hi(brr >> 8); | ||
1508 | ptr = hex_byte_pack(ptr, hx); | ||
1509 | hx = hex_asc_lo(brr >> 8); | ||
1510 | ptr = hex_byte_pack(ptr, hx); | ||
1511 | hx = hex_asc_hi(brr); | ||
1512 | ptr = hex_byte_pack(ptr, hx); | ||
1513 | hx = hex_asc_lo(brr); | ||
1514 | ptr = hex_byte_pack(ptr, hx); | ||
1515 | |||
1516 | ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0); | ||
1517 | *ptr = 0; | ||
1518 | gdbstub_send_packet(output_buffer); /* send it off... */ | ||
1519 | } | ||
1520 | |||
1521 | LEDS(0x5005); | ||
1522 | |||
1523 | /* tell the debugger that an exception has occurred */ | ||
1524 | ptr = output_buffer; | ||
1525 | |||
1526 | /* Send trap type (converted to signal) */ | ||
1527 | *ptr++ = 'T'; | ||
1528 | ptr = hex_byte_pack(ptr, sigval); | ||
1529 | |||
1530 | /* Send Error PC */ | ||
1531 | ptr = hex_byte_pack(ptr, GDB_REG_PC); | ||
1532 | *ptr++ = ':'; | ||
1533 | ptr = mem2hex(&__debug_frame->pc, ptr, 4, 0); | ||
1534 | *ptr++ = ';'; | ||
1535 | |||
1536 | /* | ||
1537 | * Send frame pointer | ||
1538 | */ | ||
1539 | ptr = hex_byte_pack(ptr, GDB_REG_FP); | ||
1540 | *ptr++ = ':'; | ||
1541 | ptr = mem2hex(&__debug_frame->fp, ptr, 4, 0); | ||
1542 | *ptr++ = ';'; | ||
1543 | |||
1544 | /* | ||
1545 | * Send stack pointer | ||
1546 | */ | ||
1547 | ptr = hex_byte_pack(ptr, GDB_REG_SP); | ||
1548 | *ptr++ = ':'; | ||
1549 | ptr = mem2hex(&__debug_frame->sp, ptr, 4, 0); | ||
1550 | *ptr++ = ';'; | ||
1551 | |||
1552 | *ptr++ = 0; | ||
1553 | gdbstub_send_packet(output_buffer); /* send it off... */ | ||
1554 | |||
1555 | LEDS(0x5006); | ||
1556 | |||
1557 | packet_waiting: | ||
1558 | gdbstub_get_mmu_state(); | ||
1559 | |||
1560 | /* wait for input from remote GDB */ | ||
1561 | while (1) { | ||
1562 | output_buffer[0] = 0; | ||
1563 | |||
1564 | LEDS(0x5007); | ||
1565 | gdbstub_recv_packet(input_buffer); | ||
1566 | LEDS(0x5600 | input_buffer[0]); | ||
1567 | |||
1568 | switch (input_buffer[0]) { | ||
1569 | /* request repeat of last signal number */ | ||
1570 | case '?': | ||
1571 | output_buffer[0] = 'S'; | ||
1572 | output_buffer[1] = hex_asc_hi(sigval); | ||
1573 | output_buffer[2] = hex_asc_lo(sigval); | ||
1574 | output_buffer[3] = 0; | ||
1575 | break; | ||
1576 | |||
1577 | case 'd': | ||
1578 | /* toggle debug flag */ | ||
1579 | break; | ||
1580 | |||
1581 | /* return the value of the CPU registers | ||
1582 | * - GR0, GR1, GR2, GR3, GR4, GR5, GR6, GR7, | ||
1583 | * - GR8, GR9, GR10, GR11, GR12, GR13, GR14, GR15, | ||
1584 | * - GR16, GR17, GR18, GR19, GR20, GR21, GR22, GR23, | ||
1585 | * - GR24, GR25, GR26, GR27, GR28, GR29, GR30, GR31, | ||
1586 | * - GR32, GR33, GR34, GR35, GR36, GR37, GR38, GR39, | ||
1587 | * - GR40, GR41, GR42, GR43, GR44, GR45, GR46, GR47, | ||
1588 | * - GR48, GR49, GR50, GR51, GR52, GR53, GR54, GR55, | ||
1589 | * - GR56, GR57, GR58, GR59, GR60, GR61, GR62, GR63, | ||
1590 | * - FP0, FP1, FP2, FP3, FP4, FP5, FP6, FP7, | ||
1591 | * - FP8, FP9, FP10, FP11, FP12, FP13, FP14, FP15, | ||
1592 | * - FP16, FP17, FP18, FP19, FP20, FP21, FP22, FP23, | ||
1593 | * - FP24, FP25, FP26, FP27, FP28, FP29, FP30, FP31, | ||
1594 | * - FP32, FP33, FP34, FP35, FP36, FP37, FP38, FP39, | ||
1595 | * - FP40, FP41, FP42, FP43, FP44, FP45, FP46, FP47, | ||
1596 | * - FP48, FP49, FP50, FP51, FP52, FP53, FP54, FP55, | ||
1597 | * - FP56, FP57, FP58, FP59, FP60, FP61, FP62, FP63, | ||
1598 | * - PC, PSR, CCR, CCCR, | ||
1599 | * - _X132, _X133, _X134 | ||
1600 | * - TBR, BRR, DBAR0, DBAR1, DBAR2, DBAR3, | ||
1601 | * - _X141, _X142, _X143, _X144, | ||
1602 | * - LR, LCR | ||
1603 | */ | ||
1604 | case 'g': | ||
1605 | zero = 0; | ||
1606 | ptr = output_buffer; | ||
1607 | |||
1608 | /* deal with GR0, GR1-GR27, GR28-GR31, GR32-GR63 */ | ||
1609 | ptr = mem2hex(&zero, ptr, 4, 0); | ||
1610 | |||
1611 | for (loop = 1; loop <= 27; loop++) | ||
1612 | ptr = mem2hex(&__debug_user_context->i.gr[loop], ptr, 4, 0); | ||
1613 | temp = (unsigned long) __frame; | ||
1614 | ptr = mem2hex(&temp, ptr, 4, 0); | ||
1615 | ptr = mem2hex(&__debug_user_context->i.gr[29], ptr, 4, 0); | ||
1616 | ptr = mem2hex(&__debug_user_context->i.gr[30], ptr, 4, 0); | ||
1617 | #ifdef CONFIG_MMU | ||
1618 | ptr = mem2hex(&__debug_user_context->i.gr[31], ptr, 4, 0); | ||
1619 | #else | ||
1620 | temp = (unsigned long) __debug_frame; | ||
1621 | ptr = mem2hex(&temp, ptr, 4, 0); | ||
1622 | #endif | ||
1623 | |||
1624 | for (loop = 32; loop <= 63; loop++) | ||
1625 | ptr = mem2hex(&__debug_user_context->i.gr[loop], ptr, 4, 0); | ||
1626 | |||
1627 | /* deal with FR0-FR63 */ | ||
1628 | for (loop = 0; loop <= 63; loop++) | ||
1629 | ptr = mem2hex(&__debug_user_context->f.fr[loop], ptr, 4, 0); | ||
1630 | |||
1631 | /* deal with special registers */ | ||
1632 | ptr = mem2hex(&__debug_frame->pc, ptr, 4, 0); | ||
1633 | ptr = mem2hex(&__debug_frame->psr, ptr, 4, 0); | ||
1634 | ptr = mem2hex(&__debug_frame->ccr, ptr, 4, 0); | ||
1635 | ptr = mem2hex(&__debug_frame->cccr, ptr, 4, 0); | ||
1636 | ptr = mem2hex(&zero, ptr, 4, 0); | ||
1637 | ptr = mem2hex(&zero, ptr, 4, 0); | ||
1638 | ptr = mem2hex(&zero, ptr, 4, 0); | ||
1639 | ptr = mem2hex(&__debug_frame->tbr, ptr, 4, 0); | ||
1640 | ptr = mem2hex(&__debug_status.brr , ptr, 4, 0); | ||
1641 | |||
1642 | asm volatile("movsg dbar0,%0" : "=r"(dbar)); | ||
1643 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1644 | asm volatile("movsg dbar1,%0" : "=r"(dbar)); | ||
1645 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1646 | asm volatile("movsg dbar2,%0" : "=r"(dbar)); | ||
1647 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1648 | asm volatile("movsg dbar3,%0" : "=r"(dbar)); | ||
1649 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1650 | |||
1651 | asm volatile("movsg scr0,%0" : "=r"(dbar)); | ||
1652 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1653 | asm volatile("movsg scr1,%0" : "=r"(dbar)); | ||
1654 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1655 | asm volatile("movsg scr2,%0" : "=r"(dbar)); | ||
1656 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1657 | asm volatile("movsg scr3,%0" : "=r"(dbar)); | ||
1658 | ptr = mem2hex(&dbar, ptr, 4, 0); | ||
1659 | |||
1660 | ptr = mem2hex(&__debug_frame->lr, ptr, 4, 0); | ||
1661 | ptr = mem2hex(&__debug_frame->lcr, ptr, 4, 0); | ||
1662 | |||
1663 | ptr = mem2hex(&__debug_frame->iacc0, ptr, 8, 0); | ||
1664 | |||
1665 | ptr = mem2hex(&__debug_user_context->f.fsr[0], ptr, 4, 0); | ||
1666 | |||
1667 | for (loop = 0; loop <= 7; loop++) | ||
1668 | ptr = mem2hex(&__debug_user_context->f.acc[loop], ptr, 4, 0); | ||
1669 | |||
1670 | ptr = mem2hex(&__debug_user_context->f.accg, ptr, 8, 0); | ||
1671 | |||
1672 | for (loop = 0; loop <= 1; loop++) | ||
1673 | ptr = mem2hex(&__debug_user_context->f.msr[loop], ptr, 4, 0); | ||
1674 | |||
1675 | ptr = mem2hex(&__debug_frame->gner0, ptr, 4, 0); | ||
1676 | ptr = mem2hex(&__debug_frame->gner1, ptr, 4, 0); | ||
1677 | |||
1678 | ptr = mem2hex(&__debug_user_context->f.fner[0], ptr, 4, 0); | ||
1679 | ptr = mem2hex(&__debug_user_context->f.fner[1], ptr, 4, 0); | ||
1680 | |||
1681 | break; | ||
1682 | |||
1683 | /* set the values of the CPU registers */ | ||
1684 | case 'G': | ||
1685 | ptr = &input_buffer[1]; | ||
1686 | |||
1687 | /* deal with GR0, GR1-GR27, GR28-GR31, GR32-GR63 */ | ||
1688 | ptr = hex2mem(ptr, &temp, 4); | ||
1689 | |||
1690 | for (loop = 1; loop <= 27; loop++) | ||
1691 | ptr = hex2mem(ptr, &__debug_user_context->i.gr[loop], 4); | ||
1692 | |||
1693 | ptr = hex2mem(ptr, &temp, 4); | ||
1694 | __frame = (struct pt_regs *) temp; | ||
1695 | ptr = hex2mem(ptr, &__debug_frame->gr29, 4); | ||
1696 | ptr = hex2mem(ptr, &__debug_frame->gr30, 4); | ||
1697 | #ifdef CONFIG_MMU | ||
1698 | ptr = hex2mem(ptr, &__debug_frame->gr31, 4); | ||
1699 | #else | ||
1700 | ptr = hex2mem(ptr, &temp, 4); | ||
1701 | #endif | ||
1702 | |||
1703 | for (loop = 32; loop <= 63; loop++) | ||
1704 | ptr = hex2mem(ptr, &__debug_user_context->i.gr[loop], 4); | ||
1705 | |||
1706 | /* deal with FR0-FR63 */ | ||
1707 | for (loop = 0; loop <= 63; loop++) | ||
1708 | ptr = mem2hex(&__debug_user_context->f.fr[loop], ptr, 4, 0); | ||
1709 | |||
1710 | /* deal with special registers */ | ||
1711 | ptr = hex2mem(ptr, &__debug_frame->pc, 4); | ||
1712 | ptr = hex2mem(ptr, &__debug_frame->psr, 4); | ||
1713 | ptr = hex2mem(ptr, &__debug_frame->ccr, 4); | ||
1714 | ptr = hex2mem(ptr, &__debug_frame->cccr,4); | ||
1715 | |||
1716 | for (loop = 132; loop <= 140; loop++) | ||
1717 | ptr = hex2mem(ptr, &temp, 4); | ||
1718 | |||
1719 | ptr = hex2mem(ptr, &temp, 4); | ||
1720 | asm volatile("movgs %0,scr0" :: "r"(temp)); | ||
1721 | ptr = hex2mem(ptr, &temp, 4); | ||
1722 | asm volatile("movgs %0,scr1" :: "r"(temp)); | ||
1723 | ptr = hex2mem(ptr, &temp, 4); | ||
1724 | asm volatile("movgs %0,scr2" :: "r"(temp)); | ||
1725 | ptr = hex2mem(ptr, &temp, 4); | ||
1726 | asm volatile("movgs %0,scr3" :: "r"(temp)); | ||
1727 | |||
1728 | ptr = hex2mem(ptr, &__debug_frame->lr, 4); | ||
1729 | ptr = hex2mem(ptr, &__debug_frame->lcr, 4); | ||
1730 | |||
1731 | ptr = hex2mem(ptr, &__debug_frame->iacc0, 8); | ||
1732 | |||
1733 | ptr = hex2mem(ptr, &__debug_user_context->f.fsr[0], 4); | ||
1734 | |||
1735 | for (loop = 0; loop <= 7; loop++) | ||
1736 | ptr = hex2mem(ptr, &__debug_user_context->f.acc[loop], 4); | ||
1737 | |||
1738 | ptr = hex2mem(ptr, &__debug_user_context->f.accg, 8); | ||
1739 | |||
1740 | for (loop = 0; loop <= 1; loop++) | ||
1741 | ptr = hex2mem(ptr, &__debug_user_context->f.msr[loop], 4); | ||
1742 | |||
1743 | ptr = hex2mem(ptr, &__debug_frame->gner0, 4); | ||
1744 | ptr = hex2mem(ptr, &__debug_frame->gner1, 4); | ||
1745 | |||
1746 | ptr = hex2mem(ptr, &__debug_user_context->f.fner[0], 4); | ||
1747 | ptr = hex2mem(ptr, &__debug_user_context->f.fner[1], 4); | ||
1748 | |||
1749 | gdbstub_strcpy(output_buffer,"OK"); | ||
1750 | break; | ||
1751 | |||
1752 | /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ | ||
1753 | case 'm': | ||
1754 | ptr = &input_buffer[1]; | ||
1755 | |||
1756 | if (hexToInt(&ptr, &addr) && | ||
1757 | *ptr++ == ',' && | ||
1758 | hexToInt(&ptr, &length) | ||
1759 | ) { | ||
1760 | if (mem2hex((char *)addr, output_buffer, length, 1)) | ||
1761 | break; | ||
1762 | gdbstub_strcpy (output_buffer, "E03"); | ||
1763 | } | ||
1764 | else { | ||
1765 | gdbstub_strcpy(output_buffer,"E01"); | ||
1766 | } | ||
1767 | break; | ||
1768 | |||
1769 | /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ | ||
1770 | case 'M': | ||
1771 | ptr = &input_buffer[1]; | ||
1772 | |||
1773 | if (hexToInt(&ptr, &addr) && | ||
1774 | *ptr++ == ',' && | ||
1775 | hexToInt(&ptr, &length) && | ||
1776 | *ptr++ == ':' | ||
1777 | ) { | ||
1778 | if (hex2mem(ptr, (char *)addr, length)) { | ||
1779 | gdbstub_strcpy(output_buffer, "OK"); | ||
1780 | } | ||
1781 | else { | ||
1782 | gdbstub_strcpy(output_buffer, "E03"); | ||
1783 | } | ||
1784 | } | ||
1785 | else | ||
1786 | gdbstub_strcpy(output_buffer, "E02"); | ||
1787 | |||
1788 | flush_cache = 1; | ||
1789 | break; | ||
1790 | |||
1791 | /* pNN: Read value of reg N and return it */ | ||
1792 | case 'p': | ||
1793 | /* return no value, indicating that we don't support | ||
1794 | * this command and that gdb should use 'g' instead */ | ||
1795 | break; | ||
1796 | |||
1797 | /* PNN,=RRRRRRRR: Write value R to reg N return OK */ | ||
1798 | case 'P': | ||
1799 | ptr = &input_buffer[1]; | ||
1800 | |||
1801 | if (!hexToInt(&ptr, &addr) || | ||
1802 | *ptr++ != '=' || | ||
1803 | !hexToInt(&ptr, &temp) | ||
1804 | ) { | ||
1805 | gdbstub_strcpy(output_buffer, "E01"); | ||
1806 | break; | ||
1807 | } | ||
1808 | |||
1809 | temp2 = 1; | ||
1810 | switch (addr) { | ||
1811 | case GDB_REG_GR(0): | ||
1812 | break; | ||
1813 | case GDB_REG_GR(1) ... GDB_REG_GR(63): | ||
1814 | __debug_user_context->i.gr[addr - GDB_REG_GR(0)] = temp; | ||
1815 | break; | ||
1816 | case GDB_REG_FR(0) ... GDB_REG_FR(63): | ||
1817 | __debug_user_context->f.fr[addr - GDB_REG_FR(0)] = temp; | ||
1818 | break; | ||
1819 | case GDB_REG_PC: | ||
1820 | __debug_user_context->i.pc = temp; | ||
1821 | break; | ||
1822 | case GDB_REG_PSR: | ||
1823 | __debug_user_context->i.psr = temp; | ||
1824 | break; | ||
1825 | case GDB_REG_CCR: | ||
1826 | __debug_user_context->i.ccr = temp; | ||
1827 | break; | ||
1828 | case GDB_REG_CCCR: | ||
1829 | __debug_user_context->i.cccr = temp; | ||
1830 | break; | ||
1831 | case GDB_REG_BRR: | ||
1832 | __debug_status.brr = temp; | ||
1833 | break; | ||
1834 | case GDB_REG_LR: | ||
1835 | __debug_user_context->i.lr = temp; | ||
1836 | break; | ||
1837 | case GDB_REG_LCR: | ||
1838 | __debug_user_context->i.lcr = temp; | ||
1839 | break; | ||
1840 | case GDB_REG_FSR0: | ||
1841 | __debug_user_context->f.fsr[0] = temp; | ||
1842 | break; | ||
1843 | case GDB_REG_ACC(0) ... GDB_REG_ACC(7): | ||
1844 | __debug_user_context->f.acc[addr - GDB_REG_ACC(0)] = temp; | ||
1845 | break; | ||
1846 | case GDB_REG_ACCG(0): | ||
1847 | *(uint32_t *) &__debug_user_context->f.accg[0] = temp; | ||
1848 | break; | ||
1849 | case GDB_REG_ACCG(4): | ||
1850 | *(uint32_t *) &__debug_user_context->f.accg[4] = temp; | ||
1851 | break; | ||
1852 | case GDB_REG_MSR(0) ... GDB_REG_MSR(1): | ||
1853 | __debug_user_context->f.msr[addr - GDB_REG_MSR(0)] = temp; | ||
1854 | break; | ||
1855 | case GDB_REG_GNER(0) ... GDB_REG_GNER(1): | ||
1856 | __debug_user_context->i.gner[addr - GDB_REG_GNER(0)] = temp; | ||
1857 | break; | ||
1858 | case GDB_REG_FNER(0) ... GDB_REG_FNER(1): | ||
1859 | __debug_user_context->f.fner[addr - GDB_REG_FNER(0)] = temp; | ||
1860 | break; | ||
1861 | default: | ||
1862 | temp2 = 0; | ||
1863 | break; | ||
1864 | } | ||
1865 | |||
1866 | if (temp2) { | ||
1867 | gdbstub_strcpy(output_buffer, "OK"); | ||
1868 | } | ||
1869 | else { | ||
1870 | gdbstub_strcpy(output_buffer, "E02"); | ||
1871 | } | ||
1872 | break; | ||
1873 | |||
1874 | /* cAA..AA Continue at address AA..AA(optional) */ | ||
1875 | case 'c': | ||
1876 | /* try to read optional parameter, pc unchanged if no parm */ | ||
1877 | ptr = &input_buffer[1]; | ||
1878 | if (hexToInt(&ptr, &addr)) | ||
1879 | __debug_frame->pc = addr; | ||
1880 | goto done; | ||
1881 | |||
1882 | /* kill the program */ | ||
1883 | case 'k' : | ||
1884 | goto done; /* just continue */ | ||
1885 | |||
1886 | /* detach */ | ||
1887 | case 'D': | ||
1888 | gdbstub_strcpy(output_buffer, "OK"); | ||
1889 | break; | ||
1890 | |||
1891 | /* reset the whole machine (FIXME: system dependent) */ | ||
1892 | case 'r': | ||
1893 | break; | ||
1894 | |||
1895 | |||
1896 | /* step to next instruction */ | ||
1897 | case 's': | ||
1898 | __debug_regs->dcr |= DCR_SE; | ||
1899 | __debug_status.dcr |= DCR_SE; | ||
1900 | goto done; | ||
1901 | |||
1902 | /* extended command */ | ||
1903 | case 'v': | ||
1904 | if (strcmp(input_buffer, "vCont?") == 0) { | ||
1905 | output_buffer[0] = 0; | ||
1906 | break; | ||
1907 | } | ||
1908 | goto unsupported_cmd; | ||
1909 | |||
1910 | /* set baud rate (bBB) */ | ||
1911 | case 'b': | ||
1912 | ptr = &input_buffer[1]; | ||
1913 | if (!hexToInt(&ptr, &temp)) { | ||
1914 | gdbstub_strcpy(output_buffer,"B01"); | ||
1915 | break; | ||
1916 | } | ||
1917 | |||
1918 | if (temp) { | ||
1919 | /* ack before changing speed */ | ||
1920 | gdbstub_send_packet("OK"); | ||
1921 | gdbstub_set_baud(temp); | ||
1922 | } | ||
1923 | break; | ||
1924 | |||
1925 | /* set breakpoint */ | ||
1926 | case 'Z': | ||
1927 | ptr = &input_buffer[1]; | ||
1928 | |||
1929 | if (!hexToInt(&ptr,&temp) || *ptr++ != ',' || | ||
1930 | !hexToInt(&ptr,&addr) || *ptr++ != ',' || | ||
1931 | !hexToInt(&ptr,&length) | ||
1932 | ) { | ||
1933 | gdbstub_strcpy(output_buffer,"E01"); | ||
1934 | break; | ||
1935 | } | ||
1936 | |||
1937 | if (temp >= 5) { | ||
1938 | gdbstub_strcpy(output_buffer,"E03"); | ||
1939 | break; | ||
1940 | } | ||
1941 | |||
1942 | if (gdbstub_set_breakpoint(temp, addr, length) < 0) { | ||
1943 | gdbstub_strcpy(output_buffer,"E03"); | ||
1944 | break; | ||
1945 | } | ||
1946 | |||
1947 | if (temp == 0) | ||
1948 | flush_cache = 1; /* soft bkpt by modified memory */ | ||
1949 | |||
1950 | gdbstub_strcpy(output_buffer,"OK"); | ||
1951 | break; | ||
1952 | |||
1953 | /* clear breakpoint */ | ||
1954 | case 'z': | ||
1955 | ptr = &input_buffer[1]; | ||
1956 | |||
1957 | if (!hexToInt(&ptr,&temp) || *ptr++ != ',' || | ||
1958 | !hexToInt(&ptr,&addr) || *ptr++ != ',' || | ||
1959 | !hexToInt(&ptr,&length) | ||
1960 | ) { | ||
1961 | gdbstub_strcpy(output_buffer,"E01"); | ||
1962 | break; | ||
1963 | } | ||
1964 | |||
1965 | if (temp >= 5) { | ||
1966 | gdbstub_strcpy(output_buffer,"E03"); | ||
1967 | break; | ||
1968 | } | ||
1969 | |||
1970 | if (gdbstub_clear_breakpoint(temp, addr, length) < 0) { | ||
1971 | gdbstub_strcpy(output_buffer,"E03"); | ||
1972 | break; | ||
1973 | } | ||
1974 | |||
1975 | if (temp == 0) | ||
1976 | flush_cache = 1; /* soft bkpt by modified memory */ | ||
1977 | |||
1978 | gdbstub_strcpy(output_buffer,"OK"); | ||
1979 | break; | ||
1980 | |||
1981 | /* Thread-setting packet */ | ||
1982 | case 'H': | ||
1983 | gdbstub_strcpy(output_buffer, "OK"); | ||
1984 | break; | ||
1985 | |||
1986 | case 'q': | ||
1987 | gdbstub_handle_query(); | ||
1988 | break; | ||
1989 | |||
1990 | default: | ||
1991 | unsupported_cmd: | ||
1992 | gdbstub_proto("### GDB Unsupported Cmd '%s'\n",input_buffer); | ||
1993 | gdbstub_strcpy(output_buffer,"E01"); | ||
1994 | break; | ||
1995 | } | ||
1996 | |||
1997 | /* reply to the request */ | ||
1998 | LEDS(0x5009); | ||
1999 | gdbstub_send_packet(output_buffer); | ||
2000 | } | ||
2001 | |||
2002 | done: | ||
2003 | restore_user_regs(&__debug_frame0->uc); | ||
2004 | |||
2005 | //gdbstub_dump_debugregs(); | ||
2006 | //gdbstub_printk("<-- gdbstub() %08x\n", __debug_frame->pc); | ||
2007 | |||
2008 | /* need to flush the instruction cache before resuming, as we may have | ||
2009 | * deposited a breakpoint, and the icache probably has no way of | ||
2010 | * knowing that a data ref to some location may have changed something | ||
2011 | * that is in the instruction cache. NB: We flush both caches, just to | ||
2012 | * be sure... | ||
2013 | */ | ||
2014 | |||
2015 | /* note: flushing the icache will clobber EAR0 on the FR451 */ | ||
2016 | if (flush_cache) | ||
2017 | gdbstub_purge_cache(); | ||
2018 | |||
2019 | LEDS(0x5666); | ||
2020 | |||
2021 | } /* end gdbstub() */ | ||
2022 | |||
2023 | /*****************************************************************************/ | ||
2024 | /* | ||
2025 | * initialise the GDB stub | ||
2026 | */ | ||
2027 | void __init gdbstub_init(void) | ||
2028 | { | ||
2029 | #ifdef CONFIG_GDBSTUB_IMMEDIATE | ||
2030 | unsigned char ch; | ||
2031 | int ret; | ||
2032 | #endif | ||
2033 | |||
2034 | gdbstub_printk("%s", gdbstub_banner); | ||
2035 | |||
2036 | gdbstub_io_init(); | ||
2037 | |||
2038 | /* try to talk to GDB (or anyone insane enough to want to type GDB protocol by hand) */ | ||
2039 | gdbstub_proto("### GDB Tx ACK\n"); | ||
2040 | gdbstub_tx_char('+'); /* 'hello world' */ | ||
2041 | |||
2042 | #ifdef CONFIG_GDBSTUB_IMMEDIATE | ||
2043 | gdbstub_printk("GDB Stub waiting for packet\n"); | ||
2044 | |||
2045 | /* | ||
2046 | * In case GDB is started before us, ack any packets | ||
2047 | * (presumably "$?#xx") sitting there. | ||
2048 | */ | ||
2049 | do { gdbstub_rx_char(&ch, 0); } while (ch != '$'); | ||
2050 | do { gdbstub_rx_char(&ch, 0); } while (ch != '#'); | ||
2051 | do { ret = gdbstub_rx_char(&ch, 0); } while (ret != 0); /* eat first csum byte */ | ||
2052 | do { ret = gdbstub_rx_char(&ch, 0); } while (ret != 0); /* eat second csum byte */ | ||
2053 | |||
2054 | gdbstub_proto("### GDB Tx NAK\n"); | ||
2055 | gdbstub_tx_char('-'); /* nak it */ | ||
2056 | |||
2057 | #else | ||
2058 | gdbstub_printk("GDB Stub set\n"); | ||
2059 | #endif | ||
2060 | |||
2061 | #if 0 | ||
2062 | /* send banner */ | ||
2063 | ptr = output_buffer; | ||
2064 | *ptr++ = 'O'; | ||
2065 | ptr = mem2hex(gdbstub_banner, ptr, sizeof(gdbstub_banner) - 1, 0); | ||
2066 | gdbstub_send_packet(output_buffer); | ||
2067 | #endif | ||
2068 | #if defined(CONFIG_GDB_CONSOLE) && defined(CONFIG_GDBSTUB_IMMEDIATE) | ||
2069 | register_console(&gdbstub_console); | ||
2070 | #endif | ||
2071 | |||
2072 | } /* end gdbstub_init() */ | ||
2073 | |||
2074 | /*****************************************************************************/ | ||
2075 | /* | ||
2076 | * register the console at a more appropriate time | ||
2077 | */ | ||
2078 | #if defined (CONFIG_GDB_CONSOLE) && !defined(CONFIG_GDBSTUB_IMMEDIATE) | ||
2079 | static int __init gdbstub_postinit(void) | ||
2080 | { | ||
2081 | printk("registering console\n"); | ||
2082 | register_console(&gdbstub_console); | ||
2083 | return 0; | ||
2084 | } /* end gdbstub_postinit() */ | ||
2085 | |||
2086 | __initcall(gdbstub_postinit); | ||
2087 | #endif | ||
2088 | |||
2089 | /*****************************************************************************/ | ||
2090 | /* | ||
2091 | * send an exit message to GDB | ||
2092 | */ | ||
2093 | void gdbstub_exit(int status) | ||
2094 | { | ||
2095 | unsigned char checksum; | ||
2096 | int count; | ||
2097 | unsigned char ch; | ||
2098 | |||
2099 | sprintf(output_buffer,"W%02x",status&0xff); | ||
2100 | |||
2101 | gdbstub_tx_char('$'); | ||
2102 | checksum = 0; | ||
2103 | count = 0; | ||
2104 | |||
2105 | while ((ch = output_buffer[count]) != 0) { | ||
2106 | gdbstub_tx_char(ch); | ||
2107 | checksum += ch; | ||
2108 | count += 1; | ||
2109 | } | ||
2110 | |||
2111 | gdbstub_tx_char('#'); | ||
2112 | gdbstub_tx_char(hex_asc_hi(checksum)); | ||
2113 | gdbstub_tx_char(hex_asc_lo(checksum)); | ||
2114 | |||
2115 | /* make sure the output is flushed, or else RedBoot might clobber it */ | ||
2116 | gdbstub_tx_char('-'); | ||
2117 | gdbstub_tx_flush(); | ||
2118 | |||
2119 | } /* end gdbstub_exit() */ | ||
2120 | |||
2121 | /*****************************************************************************/ | ||
2122 | /* | ||
2123 | * GDB wants to call malloc() and free() to allocate memory for calling kernel | ||
2124 | * functions directly from its command line | ||
2125 | */ | ||
2126 | static void *malloc(size_t size) __maybe_unused; | ||
2127 | static void *malloc(size_t size) | ||
2128 | { | ||
2129 | return kmalloc(size, GFP_ATOMIC); | ||
2130 | } | ||
2131 | |||
2132 | static void free(void *p) __maybe_unused; | ||
2133 | static void free(void *p) | ||
2134 | { | ||
2135 | kfree(p); | ||
2136 | } | ||
2137 | |||
2138 | static uint32_t ___get_HSR0(void) __maybe_unused; | ||
2139 | static uint32_t ___get_HSR0(void) | ||
2140 | { | ||
2141 | return __get_HSR(0); | ||
2142 | } | ||
2143 | |||
2144 | static uint32_t ___set_HSR0(uint32_t x) __maybe_unused; | ||
2145 | static uint32_t ___set_HSR0(uint32_t x) | ||
2146 | { | ||
2147 | __set_HSR(0, x); | ||
2148 | return __get_HSR(0); | ||
2149 | } | ||
diff --git a/arch/frv/kernel/head-mmu-fr451.S b/arch/frv/kernel/head-mmu-fr451.S deleted file mode 100644 index 98f87d586e59..000000000000 --- a/arch/frv/kernel/head-mmu-fr451.S +++ /dev/null | |||
@@ -1,374 +0,0 @@ | |||
1 | /* head-mmu-fr451.S: FR451 mmu-linux specific bits of initialisation | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/threads.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/mem-layout.h> | ||
18 | #include <asm/spr-regs.h> | ||
19 | #include <asm/mb86943a.h> | ||
20 | #include "head.inc" | ||
21 | |||
22 | |||
23 | #define __400_DBR0 0xfe000e00 | ||
24 | #define __400_DBR1 0xfe000e08 | ||
25 | #define __400_DBR2 0xfe000e10 | ||
26 | #define __400_DBR3 0xfe000e18 | ||
27 | #define __400_DAM0 0xfe000f00 | ||
28 | #define __400_DAM1 0xfe000f08 | ||
29 | #define __400_DAM2 0xfe000f10 | ||
30 | #define __400_DAM3 0xfe000f18 | ||
31 | #define __400_LGCR 0xfe000010 | ||
32 | #define __400_LCR 0xfe000100 | ||
33 | #define __400_LSBR 0xfe000c00 | ||
34 | |||
35 | __INIT | ||
36 | .balign 4 | ||
37 | |||
38 | ############################################################################### | ||
39 | # | ||
40 | # describe the position and layout of the SDRAM controller registers | ||
41 | # | ||
42 | # ENTRY: EXIT: | ||
43 | # GR5 - cacheline size | ||
44 | # GR11 - displacement of 2nd SDRAM addr reg from GR14 | ||
45 | # GR12 - displacement of 3rd SDRAM addr reg from GR14 | ||
46 | # GR13 - displacement of 4th SDRAM addr reg from GR14 | ||
47 | # GR14 - address of 1st SDRAM addr reg | ||
48 | # GR15 - amount to shift address by to match SDRAM addr reg | ||
49 | # GR26 &__head_reference [saved] | ||
50 | # GR30 LED address [saved] | ||
51 | # CC0 - T if DBR0 is present | ||
52 | # CC1 - T if DBR1 is present | ||
53 | # CC2 - T if DBR2 is present | ||
54 | # CC3 - T if DBR3 is present | ||
55 | # | ||
56 | ############################################################################### | ||
57 | .globl __head_fr451_describe_sdram | ||
58 | __head_fr451_describe_sdram: | ||
59 | sethi.p %hi(__400_DBR0),gr14 | ||
60 | setlo %lo(__400_DBR0),gr14 | ||
61 | setlos.p #__400_DBR1-__400_DBR0,gr11 | ||
62 | setlos #__400_DBR2-__400_DBR0,gr12 | ||
63 | setlos.p #__400_DBR3-__400_DBR0,gr13 | ||
64 | setlos #32,gr5 ; cacheline size | ||
65 | setlos.p #0,gr15 ; amount to shift addr reg by | ||
66 | setlos #0x00ff,gr4 | ||
67 | movgs gr4,cccr ; extant DARS/DAMK regs | ||
68 | bralr | ||
69 | |||
70 | ############################################################################### | ||
71 | # | ||
72 | # rearrange the bus controller registers | ||
73 | # | ||
74 | # ENTRY: EXIT: | ||
75 | # GR26 &__head_reference [saved] | ||
76 | # GR30 LED address revised LED address | ||
77 | # | ||
78 | ############################################################################### | ||
79 | .globl __head_fr451_set_busctl | ||
80 | __head_fr451_set_busctl: | ||
81 | sethi.p %hi(__400_LGCR),gr4 | ||
82 | setlo %lo(__400_LGCR),gr4 | ||
83 | sethi.p %hi(__400_LSBR),gr10 | ||
84 | setlo %lo(__400_LSBR),gr10 | ||
85 | sethi.p %hi(__400_LCR),gr11 | ||
86 | setlo %lo(__400_LCR),gr11 | ||
87 | |||
88 | # set the bus controller | ||
89 | ldi @(gr4,#0),gr5 | ||
90 | ori gr5,#0xff,gr5 ; make sure all chip-selects are enabled | ||
91 | sti gr5,@(gr4,#0) | ||
92 | |||
93 | sethi.p %hi(__region_CS1),gr4 | ||
94 | setlo %lo(__region_CS1),gr4 | ||
95 | sethi.p %hi(__region_CS1_M),gr5 | ||
96 | setlo %lo(__region_CS1_M),gr5 | ||
97 | sethi.p %hi(__region_CS1_C),gr6 | ||
98 | setlo %lo(__region_CS1_C),gr6 | ||
99 | sti gr4,@(gr10,#1*0x08) | ||
100 | sti gr5,@(gr10,#1*0x08+0x100) | ||
101 | sti gr6,@(gr11,#1*0x08) | ||
102 | sethi.p %hi(__region_CS2),gr4 | ||
103 | setlo %lo(__region_CS2),gr4 | ||
104 | sethi.p %hi(__region_CS2_M),gr5 | ||
105 | setlo %lo(__region_CS2_M),gr5 | ||
106 | sethi.p %hi(__region_CS2_C),gr6 | ||
107 | setlo %lo(__region_CS2_C),gr6 | ||
108 | sti gr4,@(gr10,#2*0x08) | ||
109 | sti gr5,@(gr10,#2*0x08+0x100) | ||
110 | sti gr6,@(gr11,#2*0x08) | ||
111 | sethi.p %hi(__region_CS3),gr4 | ||
112 | setlo %lo(__region_CS3),gr4 | ||
113 | sethi.p %hi(__region_CS3_M),gr5 | ||
114 | setlo %lo(__region_CS3_M),gr5 | ||
115 | sethi.p %hi(__region_CS3_C),gr6 | ||
116 | setlo %lo(__region_CS3_C),gr6 | ||
117 | sti gr4,@(gr10,#3*0x08) | ||
118 | sti gr5,@(gr10,#3*0x08+0x100) | ||
119 | sti gr6,@(gr11,#3*0x08) | ||
120 | sethi.p %hi(__region_CS4),gr4 | ||
121 | setlo %lo(__region_CS4),gr4 | ||
122 | sethi.p %hi(__region_CS4_M),gr5 | ||
123 | setlo %lo(__region_CS4_M),gr5 | ||
124 | sethi.p %hi(__region_CS4_C),gr6 | ||
125 | setlo %lo(__region_CS4_C),gr6 | ||
126 | sti gr4,@(gr10,#4*0x08) | ||
127 | sti gr5,@(gr10,#4*0x08+0x100) | ||
128 | sti gr6,@(gr11,#4*0x08) | ||
129 | sethi.p %hi(__region_CS5),gr4 | ||
130 | setlo %lo(__region_CS5),gr4 | ||
131 | sethi.p %hi(__region_CS5_M),gr5 | ||
132 | setlo %lo(__region_CS5_M),gr5 | ||
133 | sethi.p %hi(__region_CS5_C),gr6 | ||
134 | setlo %lo(__region_CS5_C),gr6 | ||
135 | sti gr4,@(gr10,#5*0x08) | ||
136 | sti gr5,@(gr10,#5*0x08+0x100) | ||
137 | sti gr6,@(gr11,#5*0x08) | ||
138 | sethi.p %hi(__region_CS6),gr4 | ||
139 | setlo %lo(__region_CS6),gr4 | ||
140 | sethi.p %hi(__region_CS6_M),gr5 | ||
141 | setlo %lo(__region_CS6_M),gr5 | ||
142 | sethi.p %hi(__region_CS6_C),gr6 | ||
143 | setlo %lo(__region_CS6_C),gr6 | ||
144 | sti gr4,@(gr10,#6*0x08) | ||
145 | sti gr5,@(gr10,#6*0x08+0x100) | ||
146 | sti gr6,@(gr11,#6*0x08) | ||
147 | sethi.p %hi(__region_CS7),gr4 | ||
148 | setlo %lo(__region_CS7),gr4 | ||
149 | sethi.p %hi(__region_CS7_M),gr5 | ||
150 | setlo %lo(__region_CS7_M),gr5 | ||
151 | sethi.p %hi(__region_CS7_C),gr6 | ||
152 | setlo %lo(__region_CS7_C),gr6 | ||
153 | sti gr4,@(gr10,#7*0x08) | ||
154 | sti gr5,@(gr10,#7*0x08+0x100) | ||
155 | sti gr6,@(gr11,#7*0x08) | ||
156 | membar | ||
157 | bar | ||
158 | |||
159 | # adjust LED bank address | ||
160 | #ifdef CONFIG_MB93091_VDK | ||
161 | sethi.p %hi(__region_CS2 + 0x01200004),gr30 | ||
162 | setlo %lo(__region_CS2 + 0x01200004),gr30 | ||
163 | #endif | ||
164 | bralr | ||
165 | |||
166 | ############################################################################### | ||
167 | # | ||
168 | # determine the total SDRAM size | ||
169 | # | ||
170 | # ENTRY: EXIT: | ||
171 | # GR25 - SDRAM size | ||
172 | # GR26 &__head_reference [saved] | ||
173 | # GR30 LED address [saved] | ||
174 | # | ||
175 | ############################################################################### | ||
176 | .globl __head_fr451_survey_sdram | ||
177 | __head_fr451_survey_sdram: | ||
178 | sethi.p %hi(__400_DAM0),gr11 | ||
179 | setlo %lo(__400_DAM0),gr11 | ||
180 | sethi.p %hi(__400_DBR0),gr12 | ||
181 | setlo %lo(__400_DBR0),gr12 | ||
182 | |||
183 | sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value | ||
184 | setlo %lo(0xfe000000),gr17 | ||
185 | setlos #0,gr25 | ||
186 | |||
187 | ldi @(gr12,#0x00),gr4 ; DAR0 | ||
188 | subcc gr4,gr17,gr0,icc0 | ||
189 | beq icc0,#0,__head_no_DCS0 | ||
190 | ldi @(gr11,#0x00),gr6 ; DAM0: bits 31:20 match addr 31:20 | ||
191 | add gr25,gr6,gr25 | ||
192 | addi gr25,#1,gr25 | ||
193 | __head_no_DCS0: | ||
194 | |||
195 | ldi @(gr12,#0x08),gr4 ; DAR1 | ||
196 | subcc gr4,gr17,gr0,icc0 | ||
197 | beq icc0,#0,__head_no_DCS1 | ||
198 | ldi @(gr11,#0x08),gr6 ; DAM1: bits 31:20 match addr 31:20 | ||
199 | add gr25,gr6,gr25 | ||
200 | addi gr25,#1,gr25 | ||
201 | __head_no_DCS1: | ||
202 | |||
203 | ldi @(gr12,#0x10),gr4 ; DAR2 | ||
204 | subcc gr4,gr17,gr0,icc0 | ||
205 | beq icc0,#0,__head_no_DCS2 | ||
206 | ldi @(gr11,#0x10),gr6 ; DAM2: bits 31:20 match addr 31:20 | ||
207 | add gr25,gr6,gr25 | ||
208 | addi gr25,#1,gr25 | ||
209 | __head_no_DCS2: | ||
210 | |||
211 | ldi @(gr12,#0x18),gr4 ; DAR3 | ||
212 | subcc gr4,gr17,gr0,icc0 | ||
213 | beq icc0,#0,__head_no_DCS3 | ||
214 | ldi @(gr11,#0x18),gr6 ; DAM3: bits 31:20 match addr 31:20 | ||
215 | add gr25,gr6,gr25 | ||
216 | addi gr25,#1,gr25 | ||
217 | __head_no_DCS3: | ||
218 | bralr | ||
219 | |||
220 | ############################################################################### | ||
221 | # | ||
222 | # set the protection map with the I/DAMPR registers | ||
223 | # | ||
224 | # ENTRY: EXIT: | ||
225 | # GR25 SDRAM size [saved] | ||
226 | # GR26 &__head_reference [saved] | ||
227 | # GR30 LED address [saved] | ||
228 | # | ||
229 | # | ||
230 | # Using this map: | ||
231 | # REGISTERS ADDRESS RANGE VIEW | ||
232 | # =============== ====================== =============================== | ||
233 | # IAMPR0/DAMPR0 0xC0000000-0xCFFFFFFF Cached kernel RAM Window | ||
234 | # DAMPR11 0xE0000000-0xFFFFFFFF Uncached I/O | ||
235 | # | ||
236 | ############################################################################### | ||
237 | .globl __head_fr451_set_protection | ||
238 | __head_fr451_set_protection: | ||
239 | movsg lr,gr27 | ||
240 | |||
241 | # set the I/O region protection registers for FR451 in MMU mode | ||
242 | #define PGPROT_IO xAMPRx_L|xAMPRx_M|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V | ||
243 | |||
244 | sethi.p %hi(__region_IO),gr5 | ||
245 | setlo %lo(__region_IO),gr5 | ||
246 | setlos #PGPROT_IO|xAMPRx_SS_512Mb,gr4 | ||
247 | or gr4,gr5,gr4 | ||
248 | movgs gr5,damlr11 ; General I/O tile | ||
249 | movgs gr4,dampr11 | ||
250 | |||
251 | # need to open a window onto at least part of the RAM for the kernel's use | ||
252 | sethi.p %hi(__sdram_base),gr8 | ||
253 | setlo %lo(__sdram_base),gr8 ; physical address | ||
254 | sethi.p %hi(__page_offset),gr9 | ||
255 | setlo %lo(__page_offset),gr9 ; virtual address | ||
256 | |||
257 | setlos #xAMPRx_L|xAMPRx_M|xAMPRx_SS_256Mb|xAMPRx_S_KERNEL|xAMPRx_V,gr11 | ||
258 | or gr8,gr11,gr8 | ||
259 | |||
260 | movgs gr9,iamlr0 ; mapped from real address 0 | ||
261 | movgs gr8,iampr0 ; cached kernel memory at 0xC0000000 | ||
262 | movgs gr9,damlr0 | ||
263 | movgs gr8,dampr0 | ||
264 | |||
265 | # set a temporary mapping for the kernel running at address 0 until we've turned on the MMU | ||
266 | sethi.p %hi(__sdram_base),gr9 | ||
267 | setlo %lo(__sdram_base),gr9 ; virtual address | ||
268 | |||
269 | and.p gr4,gr11,gr4 | ||
270 | and gr5,gr11,gr5 | ||
271 | or.p gr4,gr11,gr4 | ||
272 | or gr5,gr11,gr5 | ||
273 | |||
274 | movgs gr9,iamlr1 ; mapped from real address 0 | ||
275 | movgs gr8,iampr1 ; cached kernel memory at 0x00000000 | ||
276 | movgs gr9,damlr1 | ||
277 | movgs gr8,dampr1 | ||
278 | |||
279 | # we use DAMR2-10 for kmap_atomic(), cache flush and TLB management | ||
280 | # since the DAMLR regs are not going to change, we can set them now | ||
281 | # also set up IAMLR2 to the same as DAMLR5 | ||
282 | sethi.p %hi(KMAP_ATOMIC_PRIMARY_FRAME),gr4 | ||
283 | setlo %lo(KMAP_ATOMIC_PRIMARY_FRAME),gr4 | ||
284 | sethi.p %hi(PAGE_SIZE),gr5 | ||
285 | setlo %lo(PAGE_SIZE),gr5 | ||
286 | |||
287 | movgs gr4,damlr2 | ||
288 | movgs gr4,iamlr2 | ||
289 | add gr4,gr5,gr4 | ||
290 | movgs gr4,damlr3 | ||
291 | add gr4,gr5,gr4 | ||
292 | movgs gr4,damlr4 | ||
293 | add gr4,gr5,gr4 | ||
294 | movgs gr4,damlr5 | ||
295 | add gr4,gr5,gr4 | ||
296 | movgs gr4,damlr6 | ||
297 | add gr4,gr5,gr4 | ||
298 | movgs gr4,damlr7 | ||
299 | add gr4,gr5,gr4 | ||
300 | movgs gr4,damlr8 | ||
301 | add gr4,gr5,gr4 | ||
302 | movgs gr4,damlr9 | ||
303 | add gr4,gr5,gr4 | ||
304 | movgs gr4,damlr10 | ||
305 | |||
306 | movgs gr0,dampr2 | ||
307 | movgs gr0,dampr4 | ||
308 | movgs gr0,dampr5 | ||
309 | movgs gr0,dampr6 | ||
310 | movgs gr0,dampr7 | ||
311 | movgs gr0,dampr8 | ||
312 | movgs gr0,dampr9 | ||
313 | movgs gr0,dampr10 | ||
314 | |||
315 | movgs gr0,iamlr3 | ||
316 | movgs gr0,iamlr4 | ||
317 | movgs gr0,iamlr5 | ||
318 | movgs gr0,iamlr6 | ||
319 | movgs gr0,iamlr7 | ||
320 | |||
321 | movgs gr0,iampr2 | ||
322 | movgs gr0,iampr3 | ||
323 | movgs gr0,iampr4 | ||
324 | movgs gr0,iampr5 | ||
325 | movgs gr0,iampr6 | ||
326 | movgs gr0,iampr7 | ||
327 | |||
328 | # start in TLB context 0 with the swapper's page tables | ||
329 | movgs gr0,cxnr | ||
330 | |||
331 | sethi.p %hi(swapper_pg_dir),gr4 | ||
332 | setlo %lo(swapper_pg_dir),gr4 | ||
333 | sethi.p %hi(__page_offset),gr5 | ||
334 | setlo %lo(__page_offset),gr5 | ||
335 | sub gr4,gr5,gr4 | ||
336 | movgs gr4,ttbr | ||
337 | setlos #xAMPRx_L|xAMPRx_M|xAMPRx_SS_16Kb|xAMPRx_S|xAMPRx_C|xAMPRx_V,gr5 | ||
338 | or gr4,gr5,gr4 | ||
339 | movgs gr4,dampr3 | ||
340 | |||
341 | # the FR451 also has an extra trap base register | ||
342 | movsg tbr,gr4 | ||
343 | movgs gr4,btbr | ||
344 | |||
345 | LEDS 0x3300 | ||
346 | jmpl @(gr27,gr0) | ||
347 | |||
348 | ############################################################################### | ||
349 | # | ||
350 | # finish setting up the protection registers | ||
351 | # | ||
352 | ############################################################################### | ||
353 | .globl __head_fr451_finalise_protection | ||
354 | __head_fr451_finalise_protection: | ||
355 | # turn on the timers as appropriate | ||
356 | movgs gr0,timerh | ||
357 | movgs gr0,timerl | ||
358 | movgs gr0,timerd | ||
359 | movsg hsr0,gr4 | ||
360 | sethi.p %hi(HSR0_ETMI),gr5 | ||
361 | setlo %lo(HSR0_ETMI),gr5 | ||
362 | or gr4,gr5,gr4 | ||
363 | movgs gr4,hsr0 | ||
364 | |||
365 | # clear the TLB entry cache | ||
366 | movgs gr0,iamlr1 | ||
367 | movgs gr0,iampr1 | ||
368 | movgs gr0,damlr1 | ||
369 | movgs gr0,dampr1 | ||
370 | |||
371 | # clear the PGE cache | ||
372 | sethi.p %hi(__flush_tlb_all),gr4 | ||
373 | setlo %lo(__flush_tlb_all),gr4 | ||
374 | jmpl @(gr4,gr0) | ||
diff --git a/arch/frv/kernel/head-uc-fr401.S b/arch/frv/kernel/head-uc-fr401.S deleted file mode 100644 index 438643cfa38e..000000000000 --- a/arch/frv/kernel/head-uc-fr401.S +++ /dev/null | |||
@@ -1,311 +0,0 @@ | |||
1 | /* head-uc-fr401.S: FR401/3/5 uc-linux specific bits of initialisation | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/threads.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/spr-regs.h> | ||
18 | #include <asm/mb86943a.h> | ||
19 | #include "head.inc" | ||
20 | |||
21 | |||
22 | #define __400_DBR0 0xfe000e00 | ||
23 | #define __400_DBR1 0xfe000e08 | ||
24 | #define __400_DBR2 0xfe000e10 /* not on FR401 */ | ||
25 | #define __400_DBR3 0xfe000e18 /* not on FR401 */ | ||
26 | #define __400_DAM0 0xfe000f00 | ||
27 | #define __400_DAM1 0xfe000f08 | ||
28 | #define __400_DAM2 0xfe000f10 /* not on FR401 */ | ||
29 | #define __400_DAM3 0xfe000f18 /* not on FR401 */ | ||
30 | #define __400_LGCR 0xfe000010 | ||
31 | #define __400_LCR 0xfe000100 | ||
32 | #define __400_LSBR 0xfe000c00 | ||
33 | |||
34 | __INIT | ||
35 | .balign 4 | ||
36 | |||
37 | ############################################################################### | ||
38 | # | ||
39 | # describe the position and layout of the SDRAM controller registers | ||
40 | # | ||
41 | # ENTRY: EXIT: | ||
42 | # GR5 - cacheline size | ||
43 | # GR11 - displacement of 2nd SDRAM addr reg from GR14 | ||
44 | # GR12 - displacement of 3rd SDRAM addr reg from GR14 | ||
45 | # GR13 - displacement of 4th SDRAM addr reg from GR14 | ||
46 | # GR14 - address of 1st SDRAM addr reg | ||
47 | # GR15 - amount to shift address by to match SDRAM addr reg | ||
48 | # GR26 &__head_reference [saved] | ||
49 | # GR30 LED address [saved] | ||
50 | # CC0 - T if DBR0 is present | ||
51 | # CC1 - T if DBR1 is present | ||
52 | # CC2 - T if DBR2 is present (not FR401/FR401A) | ||
53 | # CC3 - T if DBR3 is present (not FR401/FR401A) | ||
54 | # | ||
55 | ############################################################################### | ||
56 | .globl __head_fr401_describe_sdram | ||
57 | __head_fr401_describe_sdram: | ||
58 | sethi.p %hi(__400_DBR0),gr14 | ||
59 | setlo %lo(__400_DBR0),gr14 | ||
60 | setlos.p #__400_DBR1-__400_DBR0,gr11 | ||
61 | setlos #__400_DBR2-__400_DBR0,gr12 | ||
62 | setlos.p #__400_DBR3-__400_DBR0,gr13 | ||
63 | setlos #32,gr5 ; cacheline size | ||
64 | setlos.p #0,gr15 ; amount to shift addr reg by | ||
65 | |||
66 | # specify which DBR regs are present | ||
67 | setlos #0x00ff,gr4 | ||
68 | movgs gr4,cccr | ||
69 | movsg psr,gr3 ; check for FR401/FR401A | ||
70 | srli gr3,#25,gr3 | ||
71 | subicc gr3,#0x20>>1,gr0,icc0 | ||
72 | bnelr icc0,#1 | ||
73 | setlos #0x000f,gr4 | ||
74 | movgs gr4,cccr | ||
75 | bralr | ||
76 | |||
77 | ############################################################################### | ||
78 | # | ||
79 | # rearrange the bus controller registers | ||
80 | # | ||
81 | # ENTRY: EXIT: | ||
82 | # GR26 &__head_reference [saved] | ||
83 | # GR30 LED address revised LED address | ||
84 | # | ||
85 | ############################################################################### | ||
86 | .globl __head_fr401_set_busctl | ||
87 | __head_fr401_set_busctl: | ||
88 | sethi.p %hi(__400_LGCR),gr4 | ||
89 | setlo %lo(__400_LGCR),gr4 | ||
90 | sethi.p %hi(__400_LSBR),gr10 | ||
91 | setlo %lo(__400_LSBR),gr10 | ||
92 | sethi.p %hi(__400_LCR),gr11 | ||
93 | setlo %lo(__400_LCR),gr11 | ||
94 | |||
95 | # set the bus controller | ||
96 | ldi @(gr4,#0),gr5 | ||
97 | ori gr5,#0xff,gr5 ; make sure all chip-selects are enabled | ||
98 | sti gr5,@(gr4,#0) | ||
99 | |||
100 | sethi.p %hi(__region_CS1),gr4 | ||
101 | setlo %lo(__region_CS1),gr4 | ||
102 | sethi.p %hi(__region_CS1_M),gr5 | ||
103 | setlo %lo(__region_CS1_M),gr5 | ||
104 | sethi.p %hi(__region_CS1_C),gr6 | ||
105 | setlo %lo(__region_CS1_C),gr6 | ||
106 | sti gr4,@(gr10,#1*0x08) | ||
107 | sti gr5,@(gr10,#1*0x08+0x100) | ||
108 | sti gr6,@(gr11,#1*0x08) | ||
109 | sethi.p %hi(__region_CS2),gr4 | ||
110 | setlo %lo(__region_CS2),gr4 | ||
111 | sethi.p %hi(__region_CS2_M),gr5 | ||
112 | setlo %lo(__region_CS2_M),gr5 | ||
113 | sethi.p %hi(__region_CS2_C),gr6 | ||
114 | setlo %lo(__region_CS2_C),gr6 | ||
115 | sti gr4,@(gr10,#2*0x08) | ||
116 | sti gr5,@(gr10,#2*0x08+0x100) | ||
117 | sti gr6,@(gr11,#2*0x08) | ||
118 | sethi.p %hi(__region_CS3),gr4 | ||
119 | setlo %lo(__region_CS3),gr4 | ||
120 | sethi.p %hi(__region_CS3_M),gr5 | ||
121 | setlo %lo(__region_CS3_M),gr5 | ||
122 | sethi.p %hi(__region_CS3_C),gr6 | ||
123 | setlo %lo(__region_CS3_C),gr6 | ||
124 | sti gr4,@(gr10,#3*0x08) | ||
125 | sti gr5,@(gr10,#3*0x08+0x100) | ||
126 | sti gr6,@(gr11,#3*0x08) | ||
127 | sethi.p %hi(__region_CS4),gr4 | ||
128 | setlo %lo(__region_CS4),gr4 | ||
129 | sethi.p %hi(__region_CS4_M),gr5 | ||
130 | setlo %lo(__region_CS4_M),gr5 | ||
131 | sethi.p %hi(__region_CS4_C),gr6 | ||
132 | setlo %lo(__region_CS4_C),gr6 | ||
133 | sti gr4,@(gr10,#4*0x08) | ||
134 | sti gr5,@(gr10,#4*0x08+0x100) | ||
135 | sti gr6,@(gr11,#4*0x08) | ||
136 | sethi.p %hi(__region_CS5),gr4 | ||
137 | setlo %lo(__region_CS5),gr4 | ||
138 | sethi.p %hi(__region_CS5_M),gr5 | ||
139 | setlo %lo(__region_CS5_M),gr5 | ||
140 | sethi.p %hi(__region_CS5_C),gr6 | ||
141 | setlo %lo(__region_CS5_C),gr6 | ||
142 | sti gr4,@(gr10,#5*0x08) | ||
143 | sti gr5,@(gr10,#5*0x08+0x100) | ||
144 | sti gr6,@(gr11,#5*0x08) | ||
145 | sethi.p %hi(__region_CS6),gr4 | ||
146 | setlo %lo(__region_CS6),gr4 | ||
147 | sethi.p %hi(__region_CS6_M),gr5 | ||
148 | setlo %lo(__region_CS6_M),gr5 | ||
149 | sethi.p %hi(__region_CS6_C),gr6 | ||
150 | setlo %lo(__region_CS6_C),gr6 | ||
151 | sti gr4,@(gr10,#6*0x08) | ||
152 | sti gr5,@(gr10,#6*0x08+0x100) | ||
153 | sti gr6,@(gr11,#6*0x08) | ||
154 | sethi.p %hi(__region_CS7),gr4 | ||
155 | setlo %lo(__region_CS7),gr4 | ||
156 | sethi.p %hi(__region_CS7_M),gr5 | ||
157 | setlo %lo(__region_CS7_M),gr5 | ||
158 | sethi.p %hi(__region_CS7_C),gr6 | ||
159 | setlo %lo(__region_CS7_C),gr6 | ||
160 | sti gr4,@(gr10,#7*0x08) | ||
161 | sti gr5,@(gr10,#7*0x08+0x100) | ||
162 | sti gr6,@(gr11,#7*0x08) | ||
163 | membar | ||
164 | bar | ||
165 | |||
166 | # adjust LED bank address | ||
167 | sethi.p %hi(LED_ADDR - 0x20000000 +__region_CS2),gr30 | ||
168 | setlo %lo(LED_ADDR - 0x20000000 +__region_CS2),gr30 | ||
169 | bralr | ||
170 | |||
171 | ############################################################################### | ||
172 | # | ||
173 | # determine the total SDRAM size | ||
174 | # | ||
175 | # ENTRY: EXIT: | ||
176 | # GR25 - SDRAM size | ||
177 | # GR26 &__head_reference [saved] | ||
178 | # GR30 LED address [saved] | ||
179 | # | ||
180 | ############################################################################### | ||
181 | .globl __head_fr401_survey_sdram | ||
182 | __head_fr401_survey_sdram: | ||
183 | sethi.p %hi(__400_DAM0),gr11 | ||
184 | setlo %lo(__400_DAM0),gr11 | ||
185 | sethi.p %hi(__400_DBR0),gr12 | ||
186 | setlo %lo(__400_DBR0),gr12 | ||
187 | |||
188 | sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value | ||
189 | setlo %lo(0xfe000000),gr17 | ||
190 | setlos #0,gr25 | ||
191 | |||
192 | ldi @(gr12,#0x00),gr4 ; DAR0 | ||
193 | subcc gr4,gr17,gr0,icc0 | ||
194 | beq icc0,#0,__head_no_DCS0 | ||
195 | ldi @(gr11,#0x00),gr6 ; DAM0: bits 31:20 match addr 31:20 | ||
196 | add gr25,gr6,gr25 | ||
197 | addi gr25,#1,gr25 | ||
198 | __head_no_DCS0: | ||
199 | |||
200 | ldi @(gr12,#0x08),gr4 ; DAR1 | ||
201 | subcc gr4,gr17,gr0,icc0 | ||
202 | beq icc0,#0,__head_no_DCS1 | ||
203 | ldi @(gr11,#0x08),gr6 ; DAM1: bits 31:20 match addr 31:20 | ||
204 | add gr25,gr6,gr25 | ||
205 | addi gr25,#1,gr25 | ||
206 | __head_no_DCS1: | ||
207 | |||
208 | # FR401/FR401A does not have DCS2/3 | ||
209 | movsg psr,gr3 | ||
210 | srli gr3,#25,gr3 | ||
211 | subicc gr3,#0x20>>1,gr0,icc0 | ||
212 | beq icc0,#0,__head_no_DCS3 | ||
213 | |||
214 | ldi @(gr12,#0x10),gr4 ; DAR2 | ||
215 | subcc gr4,gr17,gr0,icc0 | ||
216 | beq icc0,#0,__head_no_DCS2 | ||
217 | ldi @(gr11,#0x10),gr6 ; DAM2: bits 31:20 match addr 31:20 | ||
218 | add gr25,gr6,gr25 | ||
219 | addi gr25,#1,gr25 | ||
220 | __head_no_DCS2: | ||
221 | |||
222 | ldi @(gr12,#0x18),gr4 ; DAR3 | ||
223 | subcc gr4,gr17,gr0,icc0 | ||
224 | beq icc0,#0,__head_no_DCS3 | ||
225 | ldi @(gr11,#0x18),gr6 ; DAM3: bits 31:20 match addr 31:20 | ||
226 | add gr25,gr6,gr25 | ||
227 | addi gr25,#1,gr25 | ||
228 | __head_no_DCS3: | ||
229 | bralr | ||
230 | |||
231 | ############################################################################### | ||
232 | # | ||
233 | # set the protection map with the I/DAMPR registers | ||
234 | # | ||
235 | # ENTRY: EXIT: | ||
236 | # GR25 SDRAM size [saved] | ||
237 | # GR26 &__head_reference [saved] | ||
238 | # GR30 LED address [saved] | ||
239 | # | ||
240 | ############################################################################### | ||
241 | .globl __head_fr401_set_protection | ||
242 | __head_fr401_set_protection: | ||
243 | movsg lr,gr27 | ||
244 | |||
245 | # set the I/O region protection registers for FR401/3/5 | ||
246 | sethi.p %hi(__region_IO),gr5 | ||
247 | setlo %lo(__region_IO),gr5 | ||
248 | ori gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5 | ||
249 | movgs gr0,iampr7 | ||
250 | movgs gr5,dampr7 ; General I/O tile | ||
251 | |||
252 | # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible | ||
253 | # - start with the highest numbered registers | ||
254 | sethi.p %hi(__kernel_image_end),gr8 | ||
255 | setlo %lo(__kernel_image_end),gr8 | ||
256 | sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap | ||
257 | setlo %lo(32768),gr4 | ||
258 | add gr8,gr4,gr8 | ||
259 | sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB | ||
260 | setlo %lo(1024*2048-1),gr4 | ||
261 | add.p gr8,gr4,gr8 | ||
262 | not gr4,gr4 | ||
263 | and gr8,gr4,gr8 | ||
264 | |||
265 | sethi.p %hi(__page_offset),gr9 | ||
266 | setlo %lo(__page_offset),gr9 | ||
267 | add gr9,gr25,gr9 | ||
268 | |||
269 | # GR8 = base of uncovered RAM | ||
270 | # GR9 = top of uncovered RAM | ||
271 | |||
272 | #ifdef CONFIG_MB93093_PDK | ||
273 | sethi.p %hi(__region_CS2),gr4 | ||
274 | setlo %lo(__region_CS2),gr4 | ||
275 | ori gr4,#xAMPRx_SS_1Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr4 | ||
276 | movgs gr4,dampr6 | ||
277 | movgs gr0,iampr6 | ||
278 | #else | ||
279 | call __head_split_region | ||
280 | movgs gr4,iampr6 | ||
281 | movgs gr5,dampr6 | ||
282 | #endif | ||
283 | call __head_split_region | ||
284 | movgs gr4,iampr5 | ||
285 | movgs gr5,dampr5 | ||
286 | call __head_split_region | ||
287 | movgs gr4,iampr4 | ||
288 | movgs gr5,dampr4 | ||
289 | call __head_split_region | ||
290 | movgs gr4,iampr3 | ||
291 | movgs gr5,dampr3 | ||
292 | call __head_split_region | ||
293 | movgs gr4,iampr2 | ||
294 | movgs gr5,dampr2 | ||
295 | call __head_split_region | ||
296 | movgs gr4,iampr1 | ||
297 | movgs gr5,dampr1 | ||
298 | |||
299 | # cover kernel core image with kernel-only segment | ||
300 | sethi.p %hi(__page_offset),gr8 | ||
301 | setlo %lo(__page_offset),gr8 | ||
302 | call __head_split_region | ||
303 | |||
304 | #ifdef CONFIG_PROTECT_KERNEL | ||
305 | ori.p gr4,#xAMPRx_S_KERNEL,gr4 | ||
306 | ori gr5,#xAMPRx_S_KERNEL,gr5 | ||
307 | #endif | ||
308 | |||
309 | movgs gr4,iampr0 | ||
310 | movgs gr5,dampr0 | ||
311 | jmpl @(gr27,gr0) | ||
diff --git a/arch/frv/kernel/head-uc-fr451.S b/arch/frv/kernel/head-uc-fr451.S deleted file mode 100644 index b2a76c4a1786..000000000000 --- a/arch/frv/kernel/head-uc-fr451.S +++ /dev/null | |||
@@ -1,174 +0,0 @@ | |||
1 | /* head-uc-fr451.S: FR451 uc-linux specific bits of initialisation | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/threads.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/spr-regs.h> | ||
18 | #include <asm/mb86943a.h> | ||
19 | #include "head.inc" | ||
20 | |||
21 | |||
22 | #define __400_DBR0 0xfe000e00 | ||
23 | #define __400_DBR1 0xfe000e08 | ||
24 | #define __400_DBR2 0xfe000e10 | ||
25 | #define __400_DBR3 0xfe000e18 | ||
26 | #define __400_DAM0 0xfe000f00 | ||
27 | #define __400_DAM1 0xfe000f08 | ||
28 | #define __400_DAM2 0xfe000f10 | ||
29 | #define __400_DAM3 0xfe000f18 | ||
30 | #define __400_LGCR 0xfe000010 | ||
31 | #define __400_LCR 0xfe000100 | ||
32 | #define __400_LSBR 0xfe000c00 | ||
33 | |||
34 | __INIT | ||
35 | .balign 4 | ||
36 | |||
37 | ############################################################################### | ||
38 | # | ||
39 | # set the protection map with the I/DAMPR registers | ||
40 | # | ||
41 | # ENTRY: EXIT: | ||
42 | # GR25 SDRAM size [saved] | ||
43 | # GR26 &__head_reference [saved] | ||
44 | # GR30 LED address [saved] | ||
45 | # | ||
46 | ############################################################################### | ||
47 | .globl __head_fr451_set_protection | ||
48 | __head_fr451_set_protection: | ||
49 | movsg lr,gr27 | ||
50 | |||
51 | movgs gr0,dampr10 | ||
52 | movgs gr0,damlr10 | ||
53 | movgs gr0,dampr9 | ||
54 | movgs gr0,damlr9 | ||
55 | movgs gr0,dampr8 | ||
56 | movgs gr0,damlr8 | ||
57 | |||
58 | # set the I/O region protection registers for FR401/3/5 | ||
59 | sethi.p %hi(__region_IO),gr5 | ||
60 | setlo %lo(__region_IO),gr5 | ||
61 | sethi.p %hi(0x1fffffff),gr7 | ||
62 | setlo %lo(0x1fffffff),gr7 | ||
63 | ori gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5 | ||
64 | movgs gr5,dampr11 ; General I/O tile | ||
65 | movgs gr7,damlr11 | ||
66 | |||
67 | # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible | ||
68 | # - start with the highest numbered registers | ||
69 | sethi.p %hi(__kernel_image_end),gr8 | ||
70 | setlo %lo(__kernel_image_end),gr8 | ||
71 | sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap | ||
72 | setlo %lo(32768),gr4 | ||
73 | add gr8,gr4,gr8 | ||
74 | sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB | ||
75 | setlo %lo(1024*2048-1),gr4 | ||
76 | add.p gr8,gr4,gr8 | ||
77 | not gr4,gr4 | ||
78 | and gr8,gr4,gr8 | ||
79 | |||
80 | sethi.p %hi(__page_offset),gr9 | ||
81 | setlo %lo(__page_offset),gr9 | ||
82 | add gr9,gr25,gr9 | ||
83 | |||
84 | sethi.p %hi(0xffffc000),gr11 | ||
85 | setlo %lo(0xffffc000),gr11 | ||
86 | |||
87 | # GR8 = base of uncovered RAM | ||
88 | # GR9 = top of uncovered RAM | ||
89 | # GR11 = xAMLR mask | ||
90 | LEDS 0x3317 | ||
91 | call __head_split_region | ||
92 | movgs gr4,iampr7 | ||
93 | movgs gr6,iamlr7 | ||
94 | movgs gr5,dampr7 | ||
95 | movgs gr7,damlr7 | ||
96 | |||
97 | LEDS 0x3316 | ||
98 | call __head_split_region | ||
99 | movgs gr4,iampr6 | ||
100 | movgs gr6,iamlr6 | ||
101 | movgs gr5,dampr6 | ||
102 | movgs gr7,damlr6 | ||
103 | |||
104 | LEDS 0x3315 | ||
105 | call __head_split_region | ||
106 | movgs gr4,iampr5 | ||
107 | movgs gr6,iamlr5 | ||
108 | movgs gr5,dampr5 | ||
109 | movgs gr7,damlr5 | ||
110 | |||
111 | LEDS 0x3314 | ||
112 | call __head_split_region | ||
113 | movgs gr4,iampr4 | ||
114 | movgs gr6,iamlr4 | ||
115 | movgs gr5,dampr4 | ||
116 | movgs gr7,damlr4 | ||
117 | |||
118 | LEDS 0x3313 | ||
119 | call __head_split_region | ||
120 | movgs gr4,iampr3 | ||
121 | movgs gr6,iamlr3 | ||
122 | movgs gr5,dampr3 | ||
123 | movgs gr7,damlr3 | ||
124 | |||
125 | LEDS 0x3312 | ||
126 | call __head_split_region | ||
127 | movgs gr4,iampr2 | ||
128 | movgs gr6,iamlr2 | ||
129 | movgs gr5,dampr2 | ||
130 | movgs gr7,damlr2 | ||
131 | |||
132 | LEDS 0x3311 | ||
133 | call __head_split_region | ||
134 | movgs gr4,iampr1 | ||
135 | movgs gr6,iamlr1 | ||
136 | movgs gr5,dampr1 | ||
137 | movgs gr7,damlr1 | ||
138 | |||
139 | # cover kernel core image with kernel-only segment | ||
140 | LEDS 0x3310 | ||
141 | sethi.p %hi(__page_offset),gr8 | ||
142 | setlo %lo(__page_offset),gr8 | ||
143 | call __head_split_region | ||
144 | |||
145 | #ifdef CONFIG_PROTECT_KERNEL | ||
146 | ori.p gr4,#xAMPRx_S_KERNEL,gr4 | ||
147 | ori gr5,#xAMPRx_S_KERNEL,gr5 | ||
148 | #endif | ||
149 | |||
150 | movgs gr4,iampr0 | ||
151 | movgs gr6,iamlr0 | ||
152 | movgs gr5,dampr0 | ||
153 | movgs gr7,damlr0 | ||
154 | |||
155 | # start in TLB context 0 with no page tables | ||
156 | movgs gr0,cxnr | ||
157 | movgs gr0,ttbr | ||
158 | |||
159 | # the FR451 also has an extra trap base register | ||
160 | movsg tbr,gr4 | ||
161 | movgs gr4,btbr | ||
162 | |||
163 | # turn on the timers as appropriate | ||
164 | movgs gr0,timerh | ||
165 | movgs gr0,timerl | ||
166 | movgs gr0,timerd | ||
167 | movsg hsr0,gr4 | ||
168 | sethi.p %hi(HSR0_ETMI),gr5 | ||
169 | setlo %lo(HSR0_ETMI),gr5 | ||
170 | or gr4,gr5,gr4 | ||
171 | movgs gr4,hsr0 | ||
172 | |||
173 | LEDS 0x3300 | ||
174 | jmpl @(gr27,gr0) | ||
diff --git a/arch/frv/kernel/head-uc-fr555.S b/arch/frv/kernel/head-uc-fr555.S deleted file mode 100644 index 5497aaf34f77..000000000000 --- a/arch/frv/kernel/head-uc-fr555.S +++ /dev/null | |||
@@ -1,347 +0,0 @@ | |||
1 | /* head-uc-fr555.S: FR555 uc-linux specific bits of initialisation | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/threads.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/spr-regs.h> | ||
18 | #include <asm/mb86943a.h> | ||
19 | #include "head.inc" | ||
20 | |||
21 | |||
22 | #define __551_DARS0 0xfeff0100 | ||
23 | #define __551_DARS1 0xfeff0104 | ||
24 | #define __551_DARS2 0xfeff0108 | ||
25 | #define __551_DARS3 0xfeff010c | ||
26 | #define __551_DAMK0 0xfeff0110 | ||
27 | #define __551_DAMK1 0xfeff0114 | ||
28 | #define __551_DAMK2 0xfeff0118 | ||
29 | #define __551_DAMK3 0xfeff011c | ||
30 | #define __551_LCR 0xfeff1100 | ||
31 | #define __551_LSBR 0xfeff1c00 | ||
32 | |||
33 | __INIT | ||
34 | .balign 4 | ||
35 | |||
36 | ############################################################################### | ||
37 | # | ||
38 | # describe the position and layout of the SDRAM controller registers | ||
39 | # | ||
40 | # ENTRY: EXIT: | ||
41 | # GR5 - cacheline size | ||
42 | # GR11 - displacement of 2nd SDRAM addr reg from GR14 | ||
43 | # GR12 - displacement of 3rd SDRAM addr reg from GR14 | ||
44 | # GR13 - displacement of 4th SDRAM addr reg from GR14 | ||
45 | # GR14 - address of 1st SDRAM addr reg | ||
46 | # GR15 - amount to shift address by to match SDRAM addr reg | ||
47 | # GR26 &__head_reference [saved] | ||
48 | # GR30 LED address [saved] | ||
49 | # CC0 - T if DARS0 is present | ||
50 | # CC1 - T if DARS1 is present | ||
51 | # CC2 - T if DARS2 is present | ||
52 | # CC3 - T if DARS3 is present | ||
53 | # | ||
54 | ############################################################################### | ||
55 | .globl __head_fr555_describe_sdram | ||
56 | __head_fr555_describe_sdram: | ||
57 | sethi.p %hi(__551_DARS0),gr14 | ||
58 | setlo %lo(__551_DARS0),gr14 | ||
59 | setlos.p #__551_DARS1-__551_DARS0,gr11 | ||
60 | setlos #__551_DARS2-__551_DARS0,gr12 | ||
61 | setlos.p #__551_DARS3-__551_DARS0,gr13 | ||
62 | setlos #64,gr5 ; cacheline size | ||
63 | setlos #20,gr15 ; amount to shift addr by | ||
64 | setlos #0x00ff,gr4 | ||
65 | movgs gr4,cccr ; extant DARS/DAMK regs | ||
66 | bralr | ||
67 | |||
68 | ############################################################################### | ||
69 | # | ||
70 | # rearrange the bus controller registers | ||
71 | # | ||
72 | # ENTRY: EXIT: | ||
73 | # GR26 &__head_reference [saved] | ||
74 | # GR30 LED address revised LED address | ||
75 | # | ||
76 | ############################################################################### | ||
77 | .globl __head_fr555_set_busctl | ||
78 | __head_fr555_set_busctl: | ||
79 | LEDS 0x100f | ||
80 | sethi.p %hi(__551_LSBR),gr10 | ||
81 | setlo %lo(__551_LSBR),gr10 | ||
82 | sethi.p %hi(__551_LCR),gr11 | ||
83 | setlo %lo(__551_LCR),gr11 | ||
84 | |||
85 | # set the bus controller | ||
86 | sethi.p %hi(__region_CS1),gr4 | ||
87 | setlo %lo(__region_CS1),gr4 | ||
88 | sethi.p %hi(__region_CS1_M),gr5 | ||
89 | setlo %lo(__region_CS1_M),gr5 | ||
90 | sethi.p %hi(__region_CS1_C),gr6 | ||
91 | setlo %lo(__region_CS1_C),gr6 | ||
92 | sti gr4,@(gr10,#1*0x08) | ||
93 | sti gr5,@(gr10,#1*0x08+0x100) | ||
94 | sti gr6,@(gr11,#1*0x08) | ||
95 | sethi.p %hi(__region_CS2),gr4 | ||
96 | setlo %lo(__region_CS2),gr4 | ||
97 | sethi.p %hi(__region_CS2_M),gr5 | ||
98 | setlo %lo(__region_CS2_M),gr5 | ||
99 | sethi.p %hi(__region_CS2_C),gr6 | ||
100 | setlo %lo(__region_CS2_C),gr6 | ||
101 | sti gr4,@(gr10,#2*0x08) | ||
102 | sti gr5,@(gr10,#2*0x08+0x100) | ||
103 | sti gr6,@(gr11,#2*0x08) | ||
104 | sethi.p %hi(__region_CS3),gr4 | ||
105 | setlo %lo(__region_CS3),gr4 | ||
106 | sethi.p %hi(__region_CS3_M),gr5 | ||
107 | setlo %lo(__region_CS3_M),gr5 | ||
108 | sethi.p %hi(__region_CS3_C),gr6 | ||
109 | setlo %lo(__region_CS3_C),gr6 | ||
110 | sti gr4,@(gr10,#3*0x08) | ||
111 | sti gr5,@(gr10,#3*0x08+0x100) | ||
112 | sti gr6,@(gr11,#3*0x08) | ||
113 | sethi.p %hi(__region_CS4),gr4 | ||
114 | setlo %lo(__region_CS4),gr4 | ||
115 | sethi.p %hi(__region_CS4_M),gr5 | ||
116 | setlo %lo(__region_CS4_M),gr5 | ||
117 | sethi.p %hi(__region_CS4_C),gr6 | ||
118 | setlo %lo(__region_CS4_C),gr6 | ||
119 | sti gr4,@(gr10,#4*0x08) | ||
120 | sti gr5,@(gr10,#4*0x08+0x100) | ||
121 | sti gr6,@(gr11,#4*0x08) | ||
122 | sethi.p %hi(__region_CS5),gr4 | ||
123 | setlo %lo(__region_CS5),gr4 | ||
124 | sethi.p %hi(__region_CS5_M),gr5 | ||
125 | setlo %lo(__region_CS5_M),gr5 | ||
126 | sethi.p %hi(__region_CS5_C),gr6 | ||
127 | setlo %lo(__region_CS5_C),gr6 | ||
128 | sti gr4,@(gr10,#5*0x08) | ||
129 | sti gr5,@(gr10,#5*0x08+0x100) | ||
130 | sti gr6,@(gr11,#5*0x08) | ||
131 | sethi.p %hi(__region_CS6),gr4 | ||
132 | setlo %lo(__region_CS6),gr4 | ||
133 | sethi.p %hi(__region_CS6_M),gr5 | ||
134 | setlo %lo(__region_CS6_M),gr5 | ||
135 | sethi.p %hi(__region_CS6_C),gr6 | ||
136 | setlo %lo(__region_CS6_C),gr6 | ||
137 | sti gr4,@(gr10,#6*0x08) | ||
138 | sti gr5,@(gr10,#6*0x08+0x100) | ||
139 | sti gr6,@(gr11,#6*0x08) | ||
140 | sethi.p %hi(__region_CS7),gr4 | ||
141 | setlo %lo(__region_CS7),gr4 | ||
142 | sethi.p %hi(__region_CS7_M),gr5 | ||
143 | setlo %lo(__region_CS7_M),gr5 | ||
144 | sethi.p %hi(__region_CS7_C),gr6 | ||
145 | setlo %lo(__region_CS7_C),gr6 | ||
146 | sti gr4,@(gr10,#7*0x08) | ||
147 | sti gr5,@(gr10,#7*0x08+0x100) | ||
148 | sti gr6,@(gr11,#7*0x08) | ||
149 | membar | ||
150 | bar | ||
151 | |||
152 | # adjust LED bank address | ||
153 | #ifdef CONFIG_MB93091_VDK | ||
154 | sethi.p %hi(LED_ADDR - 0x20000000 +__region_CS2),gr30 | ||
155 | setlo %lo(LED_ADDR - 0x20000000 +__region_CS2),gr30 | ||
156 | #endif | ||
157 | bralr | ||
158 | |||
159 | ############################################################################### | ||
160 | # | ||
161 | # determine the total SDRAM size | ||
162 | # | ||
163 | # ENTRY: EXIT: | ||
164 | # GR25 - SDRAM size | ||
165 | # GR26 &__head_reference [saved] | ||
166 | # GR30 LED address [saved] | ||
167 | # | ||
168 | ############################################################################### | ||
169 | .globl __head_fr555_survey_sdram | ||
170 | __head_fr555_survey_sdram: | ||
171 | sethi.p %hi(__551_DAMK0),gr11 | ||
172 | setlo %lo(__551_DAMK0),gr11 | ||
173 | sethi.p %hi(__551_DARS0),gr12 | ||
174 | setlo %lo(__551_DARS0),gr12 | ||
175 | |||
176 | sethi.p %hi(0xfff),gr17 ; unused SDRAM AMK value | ||
177 | setlo %lo(0xfff),gr17 | ||
178 | setlos #0,gr25 | ||
179 | |||
180 | ldi @(gr11,#0x00),gr6 ; DAMK0: bits 11:0 match addr 11:0 | ||
181 | subcc gr6,gr17,gr0,icc0 | ||
182 | beq icc0,#0,__head_no_DCS0 | ||
183 | ldi @(gr12,#0x00),gr4 ; DARS0 | ||
184 | add gr25,gr6,gr25 | ||
185 | addi gr25,#1,gr25 | ||
186 | __head_no_DCS0: | ||
187 | |||
188 | ldi @(gr11,#0x04),gr6 ; DAMK1: bits 11:0 match addr 11:0 | ||
189 | subcc gr6,gr17,gr0,icc0 | ||
190 | beq icc0,#0,__head_no_DCS1 | ||
191 | ldi @(gr12,#0x04),gr4 ; DARS1 | ||
192 | add gr25,gr6,gr25 | ||
193 | addi gr25,#1,gr25 | ||
194 | __head_no_DCS1: | ||
195 | |||
196 | ldi @(gr11,#0x8),gr6 ; DAMK2: bits 11:0 match addr 11:0 | ||
197 | subcc gr6,gr17,gr0,icc0 | ||
198 | beq icc0,#0,__head_no_DCS2 | ||
199 | ldi @(gr12,#0x8),gr4 ; DARS2 | ||
200 | add gr25,gr6,gr25 | ||
201 | addi gr25,#1,gr25 | ||
202 | __head_no_DCS2: | ||
203 | |||
204 | ldi @(gr11,#0xc),gr6 ; DAMK3: bits 11:0 match addr 11:0 | ||
205 | subcc gr6,gr17,gr0,icc0 | ||
206 | beq icc0,#0,__head_no_DCS3 | ||
207 | ldi @(gr12,#0xc),gr4 ; DARS3 | ||
208 | add gr25,gr6,gr25 | ||
209 | addi gr25,#1,gr25 | ||
210 | __head_no_DCS3: | ||
211 | |||
212 | slli gr25,#20,gr25 ; shift [11:0] -> [31:20] | ||
213 | bralr | ||
214 | |||
215 | ############################################################################### | ||
216 | # | ||
217 | # set the protection map with the I/DAMPR registers | ||
218 | # | ||
219 | # ENTRY: EXIT: | ||
220 | # GR25 SDRAM size saved | ||
221 | # GR30 LED address saved | ||
222 | # | ||
223 | ############################################################################### | ||
224 | .globl __head_fr555_set_protection | ||
225 | __head_fr555_set_protection: | ||
226 | movsg lr,gr27 | ||
227 | |||
228 | sethi.p %hi(0xfff00000),gr11 | ||
229 | setlo %lo(0xfff00000),gr11 | ||
230 | |||
231 | # set the I/O region protection registers for FR555 | ||
232 | sethi.p %hi(__region_IO),gr7 | ||
233 | setlo %lo(__region_IO),gr7 | ||
234 | ori gr7,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5 | ||
235 | movgs gr0,iampr15 | ||
236 | movgs gr0,iamlr15 | ||
237 | movgs gr5,dampr15 | ||
238 | movgs gr7,damlr15 | ||
239 | |||
240 | # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible | ||
241 | # - start with the highest numbered registers | ||
242 | sethi.p %hi(__kernel_image_end),gr8 | ||
243 | setlo %lo(__kernel_image_end),gr8 | ||
244 | sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap | ||
245 | setlo %lo(32768),gr4 | ||
246 | add gr8,gr4,gr8 | ||
247 | sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB | ||
248 | setlo %lo(1024*2048-1),gr4 | ||
249 | add.p gr8,gr4,gr8 | ||
250 | not gr4,gr4 | ||
251 | and gr8,gr4,gr8 | ||
252 | |||
253 | sethi.p %hi(__page_offset),gr9 | ||
254 | setlo %lo(__page_offset),gr9 | ||
255 | add gr9,gr25,gr9 | ||
256 | |||
257 | # GR8 = base of uncovered RAM | ||
258 | # GR9 = top of uncovered RAM | ||
259 | # GR11 - mask for DAMLR/IAMLR regs | ||
260 | # | ||
261 | call __head_split_region | ||
262 | movgs gr4,iampr14 | ||
263 | movgs gr6,iamlr14 | ||
264 | movgs gr5,dampr14 | ||
265 | movgs gr7,damlr14 | ||
266 | call __head_split_region | ||
267 | movgs gr4,iampr13 | ||
268 | movgs gr6,iamlr13 | ||
269 | movgs gr5,dampr13 | ||
270 | movgs gr7,damlr13 | ||
271 | call __head_split_region | ||
272 | movgs gr4,iampr12 | ||
273 | movgs gr6,iamlr12 | ||
274 | movgs gr5,dampr12 | ||
275 | movgs gr7,damlr12 | ||
276 | call __head_split_region | ||
277 | movgs gr4,iampr11 | ||
278 | movgs gr6,iamlr11 | ||
279 | movgs gr5,dampr11 | ||
280 | movgs gr7,damlr11 | ||
281 | call __head_split_region | ||
282 | movgs gr4,iampr10 | ||
283 | movgs gr6,iamlr10 | ||
284 | movgs gr5,dampr10 | ||
285 | movgs gr7,damlr10 | ||
286 | call __head_split_region | ||
287 | movgs gr4,iampr9 | ||
288 | movgs gr6,iamlr9 | ||
289 | movgs gr5,dampr9 | ||
290 | movgs gr7,damlr9 | ||
291 | call __head_split_region | ||
292 | movgs gr4,iampr8 | ||
293 | movgs gr6,iamlr8 | ||
294 | movgs gr5,dampr8 | ||
295 | movgs gr7,damlr8 | ||
296 | |||
297 | call __head_split_region | ||
298 | movgs gr4,iampr7 | ||
299 | movgs gr6,iamlr7 | ||
300 | movgs gr5,dampr7 | ||
301 | movgs gr7,damlr7 | ||
302 | call __head_split_region | ||
303 | movgs gr4,iampr6 | ||
304 | movgs gr6,iamlr6 | ||
305 | movgs gr5,dampr6 | ||
306 | movgs gr7,damlr6 | ||
307 | call __head_split_region | ||
308 | movgs gr4,iampr5 | ||
309 | movgs gr6,iamlr5 | ||
310 | movgs gr5,dampr5 | ||
311 | movgs gr7,damlr5 | ||
312 | call __head_split_region | ||
313 | movgs gr4,iampr4 | ||
314 | movgs gr6,iamlr4 | ||
315 | movgs gr5,dampr4 | ||
316 | movgs gr7,damlr4 | ||
317 | call __head_split_region | ||
318 | movgs gr4,iampr3 | ||
319 | movgs gr6,iamlr3 | ||
320 | movgs gr5,dampr3 | ||
321 | movgs gr7,damlr3 | ||
322 | call __head_split_region | ||
323 | movgs gr4,iampr2 | ||
324 | movgs gr6,iamlr2 | ||
325 | movgs gr5,dampr2 | ||
326 | movgs gr7,damlr2 | ||
327 | call __head_split_region | ||
328 | movgs gr4,iampr1 | ||
329 | movgs gr6,iamlr1 | ||
330 | movgs gr5,dampr1 | ||
331 | movgs gr7,damlr1 | ||
332 | |||
333 | # cover kernel core image with kernel-only segment | ||
334 | sethi.p %hi(__page_offset),gr8 | ||
335 | setlo %lo(__page_offset),gr8 | ||
336 | call __head_split_region | ||
337 | |||
338 | #ifdef CONFIG_PROTECT_KERNEL | ||
339 | ori.p gr4,#xAMPRx_S_KERNEL,gr4 | ||
340 | ori gr5,#xAMPRx_S_KERNEL,gr5 | ||
341 | #endif | ||
342 | |||
343 | movgs gr4,iampr0 | ||
344 | movgs gr6,iamlr0 | ||
345 | movgs gr5,dampr0 | ||
346 | movgs gr7,damlr0 | ||
347 | jmpl @(gr27,gr0) | ||
diff --git a/arch/frv/kernel/head.S b/arch/frv/kernel/head.S deleted file mode 100644 index a7d0bea9c036..000000000000 --- a/arch/frv/kernel/head.S +++ /dev/null | |||
@@ -1,638 +0,0 @@ | |||
1 | /* head.S: kernel entry point for FR-V kernel | ||
2 | * | ||
3 | * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/threads.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/thread_info.h> | ||
16 | #include <asm/ptrace.h> | ||
17 | #include <asm/page.h> | ||
18 | #include <asm/spr-regs.h> | ||
19 | #include <asm/mb86943a.h> | ||
20 | #include <asm/cache.h> | ||
21 | #include "head.inc" | ||
22 | |||
23 | ############################################################################### | ||
24 | # | ||
25 | # void _boot(unsigned long magic, char *command_line) __attribute__((noreturn)) | ||
26 | # | ||
27 | # - if magic is 0xdead1eaf, then command_line is assumed to point to the kernel | ||
28 | # command line string | ||
29 | # | ||
30 | ############################################################################### | ||
31 | __HEAD | ||
32 | .balign 4 | ||
33 | |||
34 | .globl _boot, __head_reference | ||
35 | .type _boot,@function | ||
36 | _boot: | ||
37 | __head_reference: | ||
38 | sethi.p %hi(LED_ADDR),gr30 | ||
39 | setlo %lo(LED_ADDR),gr30 | ||
40 | |||
41 | LEDS 0x0000 | ||
42 | |||
43 | # calculate reference address for PC-relative stuff | ||
44 | call 0f | ||
45 | 0: movsg lr,gr26 | ||
46 | addi gr26,#__head_reference-0b,gr26 | ||
47 | |||
48 | # invalidate and disable both of the caches and turn off the memory access checking | ||
49 | dcef @(gr0,gr0),1 | ||
50 | bar | ||
51 | |||
52 | sethi.p %hi(~(HSR0_ICE|HSR0_DCE|HSR0_CBM|HSR0_EIMMU|HSR0_EDMMU)),gr4 | ||
53 | setlo %lo(~(HSR0_ICE|HSR0_DCE|HSR0_CBM|HSR0_EIMMU|HSR0_EDMMU)),gr4 | ||
54 | movsg hsr0,gr5 | ||
55 | and gr4,gr5,gr5 | ||
56 | movgs gr5,hsr0 | ||
57 | movsg hsr0,gr5 | ||
58 | |||
59 | LEDS 0x0001 | ||
60 | |||
61 | icei @(gr0,gr0),1 | ||
62 | dcei @(gr0,gr0),1 | ||
63 | bar | ||
64 | |||
65 | # turn the instruction cache back on | ||
66 | sethi.p %hi(HSR0_ICE),gr4 | ||
67 | setlo %lo(HSR0_ICE),gr4 | ||
68 | movsg hsr0,gr5 | ||
69 | or gr4,gr5,gr5 | ||
70 | movgs gr5,hsr0 | ||
71 | movsg hsr0,gr5 | ||
72 | |||
73 | bar | ||
74 | |||
75 | LEDS 0x0002 | ||
76 | |||
77 | # retrieve the parameters (including command line) before we overwrite them | ||
78 | sethi.p %hi(0xdead1eaf),gr7 | ||
79 | setlo %lo(0xdead1eaf),gr7 | ||
80 | subcc gr7,gr8,gr0,icc0 | ||
81 | bne icc0,#0,__head_no_parameters | ||
82 | |||
83 | sethi.p %hi(redboot_command_line-1),gr6 | ||
84 | setlo %lo(redboot_command_line-1),gr6 | ||
85 | sethi.p %hi(__head_reference),gr4 | ||
86 | setlo %lo(__head_reference),gr4 | ||
87 | sub gr6,gr4,gr6 | ||
88 | add.p gr6,gr26,gr6 | ||
89 | subi gr9,#1,gr9 | ||
90 | setlos.p #511,gr4 | ||
91 | setlos #1,gr5 | ||
92 | |||
93 | __head_copy_cmdline: | ||
94 | ldubu.p @(gr9,gr5),gr16 | ||
95 | subicc gr4,#1,gr4,icc0 | ||
96 | stbu.p gr16,@(gr6,gr5) | ||
97 | subicc gr16,#0,gr0,icc1 | ||
98 | bls icc0,#0,__head_end_cmdline | ||
99 | bne icc1,#1,__head_copy_cmdline | ||
100 | __head_end_cmdline: | ||
101 | stbu gr0,@(gr6,gr5) | ||
102 | __head_no_parameters: | ||
103 | |||
104 | ############################################################################### | ||
105 | # | ||
106 | # we need to relocate the SDRAM to 0x00000000 (linux) or 0xC0000000 (uClinux) | ||
107 | # - note that we're going to have to run entirely out of the icache whilst | ||
108 | # fiddling with the SDRAM controller registers | ||
109 | # | ||
110 | ############################################################################### | ||
111 | #ifdef CONFIG_MMU | ||
112 | call __head_fr451_describe_sdram | ||
113 | |||
114 | #else | ||
115 | movsg psr,gr5 | ||
116 | srli gr5,#28,gr5 | ||
117 | subicc gr5,#3,gr0,icc0 | ||
118 | beq icc0,#0,__head_fr551_sdram | ||
119 | |||
120 | call __head_fr401_describe_sdram | ||
121 | bra __head_do_sdram | ||
122 | |||
123 | __head_fr551_sdram: | ||
124 | call __head_fr555_describe_sdram | ||
125 | LEDS 0x000d | ||
126 | |||
127 | __head_do_sdram: | ||
128 | #endif | ||
129 | |||
130 | # preload the registers with invalid values in case any DBR/DARS are marked not present | ||
131 | sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value | ||
132 | setlo %lo(0xfe000000),gr17 | ||
133 | or.p gr17,gr0,gr20 | ||
134 | or gr17,gr0,gr21 | ||
135 | or.p gr17,gr0,gr22 | ||
136 | or gr17,gr0,gr23 | ||
137 | |||
138 | # consult the SDRAM controller CS address registers | ||
139 | cld @(gr14,gr0 ),gr20, cc0,#1 ; DBR0 / DARS0 | ||
140 | cld @(gr14,gr11),gr21, cc1,#1 ; DBR1 / DARS1 | ||
141 | cld @(gr14,gr12),gr22, cc2,#1 ; DBR2 / DARS2 | ||
142 | cld.p @(gr14,gr13),gr23, cc3,#1 ; DBR3 / DARS3 | ||
143 | |||
144 | sll gr20,gr15,gr20 ; shift values up for FR551 | ||
145 | sll gr21,gr15,gr21 | ||
146 | sll gr22,gr15,gr22 | ||
147 | sll gr23,gr15,gr23 | ||
148 | |||
149 | LEDS 0x0003 | ||
150 | |||
151 | # assume the lowest valid CS line to be the SDRAM base and get its address | ||
152 | subcc gr20,gr17,gr0,icc0 | ||
153 | subcc.p gr21,gr17,gr0,icc1 | ||
154 | subcc gr22,gr17,gr0,icc2 | ||
155 | subcc.p gr23,gr17,gr0,icc3 | ||
156 | ckne icc0,cc4 ; T if DBR0 != 0xfe000000 | ||
157 | ckne icc1,cc5 | ||
158 | ckne icc2,cc6 | ||
159 | ckne icc3,cc7 | ||
160 | cor gr23,gr0,gr24, cc7,#1 ; GR24 = SDRAM base | ||
161 | cor gr22,gr0,gr24, cc6,#1 | ||
162 | cor gr21,gr0,gr24, cc5,#1 | ||
163 | cor gr20,gr0,gr24, cc4,#1 | ||
164 | |||
165 | # calculate the displacement required to get the SDRAM into the right place in memory | ||
166 | sethi.p %hi(__sdram_base),gr16 | ||
167 | setlo %lo(__sdram_base),gr16 | ||
168 | sub gr16,gr24,gr16 ; delta = __sdram_base - DBRx | ||
169 | |||
170 | # calculate the new values to go in the controller regs | ||
171 | cadd.p gr20,gr16,gr20, cc4,#1 ; DCS#0 (new) = DCS#0 (old) + delta | ||
172 | cadd gr21,gr16,gr21, cc5,#1 | ||
173 | cadd.p gr22,gr16,gr22, cc6,#1 | ||
174 | cadd gr23,gr16,gr23, cc7,#1 | ||
175 | |||
176 | srl gr20,gr15,gr20 ; shift values down for FR551 | ||
177 | srl gr21,gr15,gr21 | ||
178 | srl gr22,gr15,gr22 | ||
179 | srl gr23,gr15,gr23 | ||
180 | |||
181 | # work out the address at which the reg updater resides and lock it into icache | ||
182 | # also work out the address the updater will jump to when finished | ||
183 | sethi.p %hi(__head_move_sdram-__head_reference),gr18 | ||
184 | setlo %lo(__head_move_sdram-__head_reference),gr18 | ||
185 | sethi.p %hi(__head_sdram_moved-__head_reference),gr19 | ||
186 | setlo %lo(__head_sdram_moved-__head_reference),gr19 | ||
187 | add.p gr18,gr26,gr18 | ||
188 | add gr19,gr26,gr19 | ||
189 | add.p gr19,gr16,gr19 ; moved = addr + (__sdram_base - DBRx) | ||
190 | add gr18,gr5,gr4 ; two cachelines probably required | ||
191 | |||
192 | icpl gr18,gr0,#1 ; load and lock the cachelines | ||
193 | icpl gr4,gr0,#1 | ||
194 | LEDS 0x0004 | ||
195 | membar | ||
196 | bar | ||
197 | jmpl @(gr18,gr0) | ||
198 | |||
199 | .balign L1_CACHE_BYTES | ||
200 | __head_move_sdram: | ||
201 | cst gr20,@(gr14,gr0 ), cc4,#1 | ||
202 | cst gr21,@(gr14,gr11), cc5,#1 | ||
203 | cst gr22,@(gr14,gr12), cc6,#1 | ||
204 | cst gr23,@(gr14,gr13), cc7,#1 | ||
205 | cld @(gr14,gr0 ),gr20, cc4,#1 | ||
206 | cld @(gr14,gr11),gr21, cc5,#1 | ||
207 | cld @(gr14,gr12),gr22, cc4,#1 | ||
208 | cld @(gr14,gr13),gr23, cc7,#1 | ||
209 | bar | ||
210 | membar | ||
211 | jmpl @(gr19,gr0) | ||
212 | |||
213 | .balign L1_CACHE_BYTES | ||
214 | __head_sdram_moved: | ||
215 | icul gr18 | ||
216 | add gr18,gr5,gr4 | ||
217 | icul gr4 | ||
218 | icei @(gr0,gr0),1 | ||
219 | dcei @(gr0,gr0),1 | ||
220 | |||
221 | LEDS 0x0005 | ||
222 | |||
223 | # recalculate reference address | ||
224 | call 0f | ||
225 | 0: movsg lr,gr26 | ||
226 | addi gr26,#__head_reference-0b,gr26 | ||
227 | |||
228 | |||
229 | ############################################################################### | ||
230 | # | ||
231 | # move the kernel image down to the bottom of the SDRAM | ||
232 | # | ||
233 | ############################################################################### | ||
234 | sethi.p %hi(__kernel_image_size_no_bss+15),gr4 | ||
235 | setlo %lo(__kernel_image_size_no_bss+15),gr4 | ||
236 | srli.p gr4,#4,gr4 ; count | ||
237 | or gr26,gr26,gr16 ; source | ||
238 | |||
239 | sethi.p %hi(__sdram_base),gr17 ; destination | ||
240 | setlo %lo(__sdram_base),gr17 | ||
241 | |||
242 | setlos #8,gr5 | ||
243 | sub.p gr16,gr5,gr16 ; adjust src for LDDU | ||
244 | sub gr17,gr5,gr17 ; adjust dst for LDDU | ||
245 | |||
246 | sethi.p %hi(__head_move_kernel-__head_reference),gr18 | ||
247 | setlo %lo(__head_move_kernel-__head_reference),gr18 | ||
248 | sethi.p %hi(__head_kernel_moved-__head_reference+__sdram_base),gr19 | ||
249 | setlo %lo(__head_kernel_moved-__head_reference+__sdram_base),gr19 | ||
250 | add gr18,gr26,gr18 | ||
251 | icpl gr18,gr0,#1 | ||
252 | jmpl @(gr18,gr0) | ||
253 | |||
254 | .balign 32 | ||
255 | __head_move_kernel: | ||
256 | lddu @(gr16,gr5),gr10 | ||
257 | lddu @(gr16,gr5),gr12 | ||
258 | stdu.p gr10,@(gr17,gr5) | ||
259 | subicc gr4,#1,gr4,icc0 | ||
260 | stdu.p gr12,@(gr17,gr5) | ||
261 | bhi icc0,#0,__head_move_kernel | ||
262 | jmpl @(gr19,gr0) | ||
263 | |||
264 | .balign 32 | ||
265 | __head_kernel_moved: | ||
266 | icul gr18 | ||
267 | icei @(gr0,gr0),1 | ||
268 | dcei @(gr0,gr0),1 | ||
269 | |||
270 | LEDS 0x0006 | ||
271 | |||
272 | # recalculate reference address | ||
273 | call 0f | ||
274 | 0: movsg lr,gr26 | ||
275 | addi gr26,#__head_reference-0b,gr26 | ||
276 | |||
277 | |||
278 | ############################################################################### | ||
279 | # | ||
280 | # rearrange the iomem map and set the protection registers | ||
281 | # | ||
282 | ############################################################################### | ||
283 | |||
284 | #ifdef CONFIG_MMU | ||
285 | LEDS 0x3301 | ||
286 | call __head_fr451_set_busctl | ||
287 | LEDS 0x3303 | ||
288 | call __head_fr451_survey_sdram | ||
289 | LEDS 0x3305 | ||
290 | call __head_fr451_set_protection | ||
291 | |||
292 | #else | ||
293 | movsg psr,gr5 | ||
294 | srli gr5,#PSR_IMPLE_SHIFT,gr5 | ||
295 | subicc gr5,#PSR_IMPLE_FR551,gr0,icc0 | ||
296 | beq icc0,#0,__head_fr555_memmap | ||
297 | subicc gr5,#PSR_IMPLE_FR451,gr0,icc0 | ||
298 | beq icc0,#0,__head_fr451_memmap | ||
299 | |||
300 | LEDS 0x3101 | ||
301 | call __head_fr401_set_busctl | ||
302 | LEDS 0x3103 | ||
303 | call __head_fr401_survey_sdram | ||
304 | LEDS 0x3105 | ||
305 | call __head_fr401_set_protection | ||
306 | bra __head_done_memmap | ||
307 | |||
308 | __head_fr451_memmap: | ||
309 | LEDS 0x3301 | ||
310 | call __head_fr401_set_busctl | ||
311 | LEDS 0x3303 | ||
312 | call __head_fr401_survey_sdram | ||
313 | LEDS 0x3305 | ||
314 | call __head_fr451_set_protection | ||
315 | bra __head_done_memmap | ||
316 | |||
317 | __head_fr555_memmap: | ||
318 | LEDS 0x3501 | ||
319 | call __head_fr555_set_busctl | ||
320 | LEDS 0x3503 | ||
321 | call __head_fr555_survey_sdram | ||
322 | LEDS 0x3505 | ||
323 | call __head_fr555_set_protection | ||
324 | |||
325 | __head_done_memmap: | ||
326 | #endif | ||
327 | LEDS 0x0007 | ||
328 | |||
329 | ############################################################################### | ||
330 | # | ||
331 | # turn the data cache and MMU on | ||
332 | # - for the FR451 this'll mean that the window through which the kernel is | ||
333 | # viewed will change | ||
334 | # | ||
335 | ############################################################################### | ||
336 | |||
337 | #ifdef CONFIG_MMU | ||
338 | #define MMUMODE HSR0_EIMMU|HSR0_EDMMU|HSR0_EXMMU|HSR0_EDAT|HSR0_XEDAT | ||
339 | #else | ||
340 | #define MMUMODE HSR0_EIMMU|HSR0_EDMMU | ||
341 | #endif | ||
342 | |||
343 | movsg hsr0,gr5 | ||
344 | |||
345 | sethi.p %hi(MMUMODE),gr4 | ||
346 | setlo %lo(MMUMODE),gr4 | ||
347 | or gr4,gr5,gr5 | ||
348 | |||
349 | #if defined(CONFIG_FRV_DEFL_CACHE_WTHRU) | ||
350 | sethi.p %hi(HSR0_DCE|HSR0_CBM_WRITE_THRU),gr4 | ||
351 | setlo %lo(HSR0_DCE|HSR0_CBM_WRITE_THRU),gr4 | ||
352 | #elif defined(CONFIG_FRV_DEFL_CACHE_WBACK) | ||
353 | sethi.p %hi(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4 | ||
354 | setlo %lo(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4 | ||
355 | #elif defined(CONFIG_FRV_DEFL_CACHE_WBEHIND) | ||
356 | sethi.p %hi(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4 | ||
357 | setlo %lo(HSR0_DCE|HSR0_CBM_COPY_BACK),gr4 | ||
358 | |||
359 | movsg psr,gr6 | ||
360 | srli gr6,#24,gr6 | ||
361 | cmpi gr6,#0x50,icc0 // FR451 | ||
362 | beq icc0,#0,0f | ||
363 | cmpi gr6,#0x40,icc0 // FR405 | ||
364 | bne icc0,#0,1f | ||
365 | 0: | ||
366 | # turn off write-allocate | ||
367 | sethi.p %hi(HSR0_NWA),gr6 | ||
368 | setlo %lo(HSR0_NWA),gr6 | ||
369 | or gr4,gr6,gr4 | ||
370 | 1: | ||
371 | |||
372 | #else | ||
373 | #error No default cache configuration set | ||
374 | #endif | ||
375 | |||
376 | or gr4,gr5,gr5 | ||
377 | movgs gr5,hsr0 | ||
378 | bar | ||
379 | |||
380 | LEDS 0x0008 | ||
381 | |||
382 | sethi.p %hi(__head_mmu_enabled),gr19 | ||
383 | setlo %lo(__head_mmu_enabled),gr19 | ||
384 | jmpl @(gr19,gr0) | ||
385 | |||
386 | __head_mmu_enabled: | ||
387 | icei @(gr0,gr0),#1 | ||
388 | dcei @(gr0,gr0),#1 | ||
389 | |||
390 | LEDS 0x0009 | ||
391 | |||
392 | #ifdef CONFIG_MMU | ||
393 | call __head_fr451_finalise_protection | ||
394 | #endif | ||
395 | |||
396 | LEDS 0x000a | ||
397 | |||
398 | ############################################################################### | ||
399 | # | ||
400 | # set up the runtime environment | ||
401 | # | ||
402 | ############################################################################### | ||
403 | |||
404 | # clear the BSS area | ||
405 | sethi.p %hi(__bss_start),gr4 | ||
406 | setlo %lo(__bss_start),gr4 | ||
407 | sethi.p %hi(_end),gr5 | ||
408 | setlo %lo(_end),gr5 | ||
409 | or.p gr0,gr0,gr18 | ||
410 | or gr0,gr0,gr19 | ||
411 | |||
412 | 0: | ||
413 | stdi gr18,@(gr4,#0) | ||
414 | stdi gr18,@(gr4,#8) | ||
415 | stdi gr18,@(gr4,#16) | ||
416 | stdi.p gr18,@(gr4,#24) | ||
417 | addi gr4,#24,gr4 | ||
418 | subcc gr5,gr4,gr0,icc0 | ||
419 | bhi icc0,#2,0b | ||
420 | |||
421 | LEDS 0x000b | ||
422 | |||
423 | # save the SDRAM details | ||
424 | sethi.p %hi(__sdram_old_base),gr4 | ||
425 | setlo %lo(__sdram_old_base),gr4 | ||
426 | st gr24,@(gr4,gr0) | ||
427 | |||
428 | sethi.p %hi(__sdram_base),gr5 | ||
429 | setlo %lo(__sdram_base),gr5 | ||
430 | sethi.p %hi(memory_start),gr4 | ||
431 | setlo %lo(memory_start),gr4 | ||
432 | st gr5,@(gr4,gr0) | ||
433 | |||
434 | add gr25,gr5,gr25 | ||
435 | sethi.p %hi(memory_end),gr4 | ||
436 | setlo %lo(memory_end),gr4 | ||
437 | st gr25,@(gr4,gr0) | ||
438 | |||
439 | # point the TBR at the kernel trap table | ||
440 | sethi.p %hi(__entry_kerneltrap_table),gr4 | ||
441 | setlo %lo(__entry_kerneltrap_table),gr4 | ||
442 | movgs gr4,tbr | ||
443 | |||
444 | # set up the exception frame for init | ||
445 | sethi.p %hi(__kernel_frame0_ptr),gr28 | ||
446 | setlo %lo(__kernel_frame0_ptr),gr28 | ||
447 | sethi.p %hi(_gp),gr16 | ||
448 | setlo %lo(_gp),gr16 | ||
449 | sethi.p %hi(__entry_usertrap_table),gr4 | ||
450 | setlo %lo(__entry_usertrap_table),gr4 | ||
451 | |||
452 | lddi @(gr28,#0),gr28 ; load __frame & current | ||
453 | ldi.p @(gr29,#4),gr15 ; set current_thread | ||
454 | |||
455 | or gr0,gr0,fp | ||
456 | or gr28,gr0,sp | ||
457 | |||
458 | sti.p gr4,@(gr28,REG_TBR) | ||
459 | setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5 | ||
460 | movgs gr5,isr | ||
461 | |||
462 | # turn on and off various CPU services | ||
463 | movsg psr,gr22 | ||
464 | sethi.p %hi(#PSR_EM|PSR_EF|PSR_CM|PSR_NEM),gr4 | ||
465 | setlo %lo(#PSR_EM|PSR_EF|PSR_CM|PSR_NEM),gr4 | ||
466 | or gr22,gr4,gr22 | ||
467 | movgs gr22,psr | ||
468 | |||
469 | andi gr22,#~(PSR_PIL|PSR_PS|PSR_S),gr22 | ||
470 | ori gr22,#PSR_ET,gr22 | ||
471 | sti gr22,@(gr28,REG_PSR) | ||
472 | |||
473 | |||
474 | ############################################################################### | ||
475 | # | ||
476 | # set up the registers and jump into the kernel | ||
477 | # | ||
478 | ############################################################################### | ||
479 | |||
480 | LEDS 0x000c | ||
481 | |||
482 | sethi.p #0xe5e5,gr3 | ||
483 | setlo #0xe5e5,gr3 | ||
484 | or.p gr3,gr0,gr4 | ||
485 | or gr3,gr0,gr5 | ||
486 | or.p gr3,gr0,gr6 | ||
487 | or gr3,gr0,gr7 | ||
488 | or.p gr3,gr0,gr8 | ||
489 | or gr3,gr0,gr9 | ||
490 | or.p gr3,gr0,gr10 | ||
491 | or gr3,gr0,gr11 | ||
492 | or.p gr3,gr0,gr12 | ||
493 | or gr3,gr0,gr13 | ||
494 | or.p gr3,gr0,gr14 | ||
495 | or gr3,gr0,gr17 | ||
496 | or.p gr3,gr0,gr18 | ||
497 | or gr3,gr0,gr19 | ||
498 | or.p gr3,gr0,gr20 | ||
499 | or gr3,gr0,gr21 | ||
500 | or.p gr3,gr0,gr23 | ||
501 | or gr3,gr0,gr24 | ||
502 | or.p gr3,gr0,gr25 | ||
503 | or gr3,gr0,gr26 | ||
504 | or.p gr3,gr0,gr27 | ||
505 | # or gr3,gr0,gr30 | ||
506 | or gr3,gr0,gr31 | ||
507 | movgs gr0,lr | ||
508 | movgs gr0,lcr | ||
509 | movgs gr0,ccr | ||
510 | movgs gr0,cccr | ||
511 | |||
512 | # initialise the virtual interrupt handling | ||
513 | subcc gr0,gr0,gr0,icc2 /* set Z, clear C */ | ||
514 | |||
515 | #ifdef CONFIG_MMU | ||
516 | movgs gr3,scr2 | ||
517 | movgs gr3,scr3 | ||
518 | #endif | ||
519 | |||
520 | LEDS 0x0fff | ||
521 | |||
522 | # invoke the debugging stub if present | ||
523 | # - arch/frv/kernel/debug-stub.c will shift control directly to init/main.c | ||
524 | # (it will not return here) | ||
525 | break | ||
526 | .globl __debug_stub_init_break | ||
527 | __debug_stub_init_break: | ||
528 | |||
529 | # however, if you need to use an ICE, and don't care about using any userspace | ||
530 | # debugging tools (such as the ptrace syscall), you can just step over the break | ||
531 | # above and get to the kernel this way | ||
532 | # look at arch/frv/kernel/debug-stub.c: debug_stub_init() to see what you've missed | ||
533 | call start_kernel | ||
534 | |||
535 | .globl __head_end | ||
536 | __head_end: | ||
537 | .size _boot, .-_boot | ||
538 | |||
539 | # provide a point for GDB to place a break | ||
540 | .section .text..start,"ax" | ||
541 | .globl _start | ||
542 | .balign 4 | ||
543 | _start: | ||
544 | call _boot | ||
545 | |||
546 | .previous | ||
547 | ############################################################################### | ||
548 | # | ||
549 | # split a tile off of the region defined by GR8-GR9 | ||
550 | # | ||
551 | # ENTRY: EXIT: | ||
552 | # GR4 - IAMPR value representing tile | ||
553 | # GR5 - DAMPR value representing tile | ||
554 | # GR6 - IAMLR value representing tile | ||
555 | # GR7 - DAMLR value representing tile | ||
556 | # GR8 region base pointer [saved] | ||
557 | # GR9 region top pointer updated to exclude new tile | ||
558 | # GR11 xAMLR mask [saved] | ||
559 | # GR25 SDRAM size [saved] | ||
560 | # GR30 LED address [saved] | ||
561 | # | ||
562 | # - GR8 and GR9 should be rounded up/down to the nearest megabyte before calling | ||
563 | # | ||
564 | ############################################################################### | ||
565 | .globl __head_split_region | ||
566 | .type __head_split_region,@function | ||
567 | __head_split_region: | ||
568 | subcc.p gr9,gr8,gr4,icc0 | ||
569 | setlos #31,gr5 | ||
570 | scan.p gr4,gr0,gr6 | ||
571 | beq icc0,#0,__head_region_empty | ||
572 | sub.p gr5,gr6,gr6 ; bit number of highest set bit (1MB=>20) | ||
573 | setlos #1,gr4 | ||
574 | sll.p gr4,gr6,gr4 ; size of region (1 << bitno) | ||
575 | subi gr6,#17,gr6 ; 1MB => 0x03 | ||
576 | slli.p gr6,#4,gr6 ; 1MB => 0x30 | ||
577 | sub gr9,gr4,gr9 ; move uncovered top down | ||
578 | |||
579 | or gr9,gr6,gr4 | ||
580 | ori gr4,#xAMPRx_S_USER|xAMPRx_C_CACHED|xAMPRx_V,gr4 | ||
581 | or.p gr4,gr0,gr5 | ||
582 | |||
583 | and gr4,gr11,gr6 | ||
584 | and.p gr5,gr11,gr7 | ||
585 | bralr | ||
586 | |||
587 | __head_region_empty: | ||
588 | or.p gr0,gr0,gr4 | ||
589 | or gr0,gr0,gr5 | ||
590 | or.p gr0,gr0,gr6 | ||
591 | or gr0,gr0,gr7 | ||
592 | bralr | ||
593 | .size __head_split_region, .-__head_split_region | ||
594 | |||
595 | ############################################################################### | ||
596 | # | ||
597 | # write the 32-bit hex number in GR8 to ttyS0 | ||
598 | # | ||
599 | ############################################################################### | ||
600 | #if 0 | ||
601 | .globl __head_write_to_ttyS0 | ||
602 | .type __head_write_to_ttyS0,@function | ||
603 | __head_write_to_ttyS0: | ||
604 | sethi.p %hi(0xfeff9c00),gr31 | ||
605 | setlo %lo(0xfeff9c00),gr31 | ||
606 | setlos #8,gr20 | ||
607 | |||
608 | 0: ldubi @(gr31,#5*8),gr21 | ||
609 | andi gr21,#0x60,gr21 | ||
610 | subicc gr21,#0x60,gr21,icc0 | ||
611 | bne icc0,#0,0b | ||
612 | |||
613 | 1: srli gr8,#28,gr21 | ||
614 | slli gr8,#4,gr8 | ||
615 | |||
616 | addi gr21,#'0',gr21 | ||
617 | subicc gr21,#'9',gr0,icc0 | ||
618 | bls icc0,#2,2f | ||
619 | addi gr21,#'A'-'0'-10,gr21 | ||
620 | 2: | ||
621 | stbi gr21,@(gr31,#0*8) | ||
622 | subicc gr20,#1,gr20,icc0 | ||
623 | bhi icc0,#2,1b | ||
624 | |||
625 | setlos #'\r',gr21 | ||
626 | stbi gr21,@(gr31,#0*8) | ||
627 | |||
628 | setlos #'\n',gr21 | ||
629 | stbi gr21,@(gr31,#0*8) | ||
630 | |||
631 | 3: ldubi @(gr31,#5*8),gr21 | ||
632 | andi gr21,#0x60,gr21 | ||
633 | subicc gr21,#0x60,gr21,icc0 | ||
634 | bne icc0,#0,3b | ||
635 | bralr | ||
636 | |||
637 | .size __head_write_to_ttyS0, .-__head_write_to_ttyS0 | ||
638 | #endif | ||
diff --git a/arch/frv/kernel/head.inc b/arch/frv/kernel/head.inc deleted file mode 100644 index bff66628b99a..000000000000 --- a/arch/frv/kernel/head.inc +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* head.inc: head common definitions -*- asm -*- | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | #if defined(CONFIG_MB93090_MB00) | ||
14 | #define LED_ADDR (0x21200000+4) | ||
15 | |||
16 | .macro LEDS val | ||
17 | sethi.p %hi(0xFFC00030),gr3 | ||
18 | setlo %lo(0xFFC00030),gr3 | ||
19 | lduh @(gr3,gr0),gr3 | ||
20 | andicc gr3,#0x100,gr0,icc0 | ||
21 | bne icc0,0,999f | ||
22 | |||
23 | setlos #~\val,gr3 | ||
24 | st gr3,@(gr30,gr0) | ||
25 | membar | ||
26 | dcf @(gr30,gr0) | ||
27 | 999: | ||
28 | .endm | ||
29 | |||
30 | #elif defined(CONFIG_MB93093_PDK) | ||
31 | #define LED_ADDR (0x20000023) | ||
32 | |||
33 | .macro LEDS val | ||
34 | setlos #\val,gr3 | ||
35 | stb gr3,@(gr30,gr0) | ||
36 | membar | ||
37 | .endm | ||
38 | |||
39 | #else | ||
40 | #define LED_ADDR 0 | ||
41 | |||
42 | .macro LEDS val | ||
43 | .endm | ||
44 | #endif | ||
45 | |||
46 | #ifdef CONFIG_MMU | ||
47 | __sdram_base = 0x00000000 /* base address to which SDRAM relocated */ | ||
48 | #else | ||
49 | __sdram_base = __page_offset /* base address to which SDRAM relocated */ | ||
50 | #endif | ||
diff --git a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c deleted file mode 100644 index 091b2839be90..000000000000 --- a/arch/frv/kernel/irq-mb93091.c +++ /dev/null | |||
@@ -1,157 +0,0 @@ | |||
1 | /* irq-mb93091.c: MB93091 FPGA interrupt handling | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/ptrace.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/signal.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/bitops.h> | ||
21 | |||
22 | #include <asm/io.h> | ||
23 | #include <asm/delay.h> | ||
24 | #include <asm/irq.h> | ||
25 | #include <asm/irc-regs.h> | ||
26 | |||
27 | #define __reg16(ADDR) (*(volatile unsigned short *)(ADDR)) | ||
28 | |||
29 | #define __get_IMR() ({ __reg16(0xffc00004); }) | ||
30 | #define __set_IMR(M) do { __reg16(0xffc00004) = (M); wmb(); } while(0) | ||
31 | #define __get_IFR() ({ __reg16(0xffc0000c); }) | ||
32 | #define __clr_IFR(M) do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0) | ||
33 | |||
34 | |||
35 | /* | ||
36 | * on-motherboard FPGA PIC operations | ||
37 | */ | ||
38 | static void frv_fpga_mask(struct irq_data *d) | ||
39 | { | ||
40 | uint16_t imr = __get_IMR(); | ||
41 | |||
42 | imr |= 1 << (d->irq - IRQ_BASE_FPGA); | ||
43 | |||
44 | __set_IMR(imr); | ||
45 | } | ||
46 | |||
47 | static void frv_fpga_ack(struct irq_data *d) | ||
48 | { | ||
49 | __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); | ||
50 | } | ||
51 | |||
52 | static void frv_fpga_mask_ack(struct irq_data *d) | ||
53 | { | ||
54 | uint16_t imr = __get_IMR(); | ||
55 | |||
56 | imr |= 1 << (d->irq - IRQ_BASE_FPGA); | ||
57 | __set_IMR(imr); | ||
58 | |||
59 | __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); | ||
60 | } | ||
61 | |||
62 | static void frv_fpga_unmask(struct irq_data *d) | ||
63 | { | ||
64 | uint16_t imr = __get_IMR(); | ||
65 | |||
66 | imr &= ~(1 << (d->irq - IRQ_BASE_FPGA)); | ||
67 | |||
68 | __set_IMR(imr); | ||
69 | } | ||
70 | |||
71 | static struct irq_chip frv_fpga_pic = { | ||
72 | .name = "mb93091", | ||
73 | .irq_ack = frv_fpga_ack, | ||
74 | .irq_mask = frv_fpga_mask, | ||
75 | .irq_mask_ack = frv_fpga_mask_ack, | ||
76 | .irq_unmask = frv_fpga_unmask, | ||
77 | }; | ||
78 | |||
79 | /* | ||
80 | * FPGA PIC interrupt handler | ||
81 | */ | ||
82 | static irqreturn_t fpga_interrupt(int irq, void *_mask) | ||
83 | { | ||
84 | uint16_t imr, mask = (unsigned long) _mask; | ||
85 | |||
86 | imr = __get_IMR(); | ||
87 | mask = mask & ~imr & __get_IFR(); | ||
88 | |||
89 | /* poll all the triggered IRQs */ | ||
90 | while (mask) { | ||
91 | int irq; | ||
92 | |||
93 | asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask)); | ||
94 | irq = 31 - irq; | ||
95 | mask &= ~(1 << irq); | ||
96 | |||
97 | generic_handle_irq(IRQ_BASE_FPGA + irq); | ||
98 | } | ||
99 | |||
100 | return IRQ_HANDLED; | ||
101 | } | ||
102 | |||
103 | /* | ||
104 | * define an interrupt action for each FPGA PIC output | ||
105 | * - use dev_id to indicate the FPGA PIC input to output mappings | ||
106 | */ | ||
107 | static struct irqaction fpga_irq[4] = { | ||
108 | [0] = { | ||
109 | .handler = fpga_interrupt, | ||
110 | .flags = IRQF_SHARED, | ||
111 | .name = "fpga.0", | ||
112 | .dev_id = (void *) 0x0028UL, | ||
113 | }, | ||
114 | [1] = { | ||
115 | .handler = fpga_interrupt, | ||
116 | .flags = IRQF_SHARED, | ||
117 | .name = "fpga.1", | ||
118 | .dev_id = (void *) 0x0050UL, | ||
119 | }, | ||
120 | [2] = { | ||
121 | .handler = fpga_interrupt, | ||
122 | .flags = IRQF_SHARED, | ||
123 | .name = "fpga.2", | ||
124 | .dev_id = (void *) 0x1c00UL, | ||
125 | }, | ||
126 | [3] = { | ||
127 | .handler = fpga_interrupt, | ||
128 | .flags = IRQF_SHARED, | ||
129 | .name = "fpga.3", | ||
130 | .dev_id = (void *) 0x6386UL, | ||
131 | } | ||
132 | }; | ||
133 | |||
134 | /* | ||
135 | * initialise the motherboard FPGA's PIC | ||
136 | */ | ||
137 | void __init fpga_init(void) | ||
138 | { | ||
139 | int irq; | ||
140 | |||
141 | /* all PIC inputs are all set to be low-level driven, apart from the | ||
142 | * NMI button (15) which is fixed at falling-edge | ||
143 | */ | ||
144 | __set_IMR(0x7ffe); | ||
145 | __clr_IFR(0x0000); | ||
146 | |||
147 | for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++) | ||
148 | irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq); | ||
149 | |||
150 | irq_set_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq); | ||
151 | |||
152 | /* the FPGA drives the first four external IRQ inputs on the CPU PIC */ | ||
153 | setup_irq(IRQ_CPU_EXTERNAL0, &fpga_irq[0]); | ||
154 | setup_irq(IRQ_CPU_EXTERNAL1, &fpga_irq[1]); | ||
155 | setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[2]); | ||
156 | setup_irq(IRQ_CPU_EXTERNAL3, &fpga_irq[3]); | ||
157 | } | ||
diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c deleted file mode 100644 index 1f3015cf80f5..000000000000 --- a/arch/frv/kernel/irq-mb93093.c +++ /dev/null | |||
@@ -1,129 +0,0 @@ | |||
1 | /* irq-mb93093.c: MB93093 FPGA interrupt handling | ||
2 | * | ||
3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/ptrace.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/signal.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/bitops.h> | ||
21 | |||
22 | #include <asm/io.h> | ||
23 | #include <asm/delay.h> | ||
24 | #include <asm/irq.h> | ||
25 | #include <asm/irc-regs.h> | ||
26 | |||
27 | #define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR))) | ||
28 | |||
29 | #define __get_IMR() ({ __reg16(0x0a); }) | ||
30 | #define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0) | ||
31 | #define __get_IFR() ({ __reg16(0x02); }) | ||
32 | #define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0) | ||
33 | |||
34 | /* | ||
35 | * off-CPU FPGA PIC operations | ||
36 | */ | ||
37 | static void frv_fpga_mask(struct irq_data *d) | ||
38 | { | ||
39 | uint16_t imr = __get_IMR(); | ||
40 | |||
41 | imr |= 1 << (d->irq - IRQ_BASE_FPGA); | ||
42 | __set_IMR(imr); | ||
43 | } | ||
44 | |||
45 | static void frv_fpga_ack(struct irq_data *d) | ||
46 | { | ||
47 | __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); | ||
48 | } | ||
49 | |||
50 | static void frv_fpga_mask_ack(struct irq_data *d) | ||
51 | { | ||
52 | uint16_t imr = __get_IMR(); | ||
53 | |||
54 | imr |= 1 << (d->irq - IRQ_BASE_FPGA); | ||
55 | __set_IMR(imr); | ||
56 | |||
57 | __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); | ||
58 | } | ||
59 | |||
60 | static void frv_fpga_unmask(struct irq_data *d) | ||
61 | { | ||
62 | uint16_t imr = __get_IMR(); | ||
63 | |||
64 | imr &= ~(1 << (d->irq - IRQ_BASE_FPGA)); | ||
65 | |||
66 | __set_IMR(imr); | ||
67 | } | ||
68 | |||
69 | static struct irq_chip frv_fpga_pic = { | ||
70 | .name = "mb93093", | ||
71 | .irq_ack = frv_fpga_ack, | ||
72 | .irq_mask = frv_fpga_mask, | ||
73 | .irq_mask_ack = frv_fpga_mask_ack, | ||
74 | .irq_unmask = frv_fpga_unmask, | ||
75 | }; | ||
76 | |||
77 | /* | ||
78 | * FPGA PIC interrupt handler | ||
79 | */ | ||
80 | static irqreturn_t fpga_interrupt(int irq, void *_mask) | ||
81 | { | ||
82 | uint16_t imr, mask = (unsigned long) _mask; | ||
83 | |||
84 | imr = __get_IMR(); | ||
85 | mask = mask & ~imr & __get_IFR(); | ||
86 | |||
87 | /* poll all the triggered IRQs */ | ||
88 | while (mask) { | ||
89 | int irq; | ||
90 | |||
91 | asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask)); | ||
92 | irq = 31 - irq; | ||
93 | mask &= ~(1 << irq); | ||
94 | |||
95 | generic_handle_irq(IRQ_BASE_FPGA + irq); | ||
96 | } | ||
97 | |||
98 | return IRQ_HANDLED; | ||
99 | } | ||
100 | |||
101 | /* | ||
102 | * define an interrupt action for each FPGA PIC output | ||
103 | * - use dev_id to indicate the FPGA PIC input to output mappings | ||
104 | */ | ||
105 | static struct irqaction fpga_irq[1] = { | ||
106 | [0] = { | ||
107 | .handler = fpga_interrupt, | ||
108 | .name = "fpga.0", | ||
109 | .dev_id = (void *) 0x0700UL, | ||
110 | } | ||
111 | }; | ||
112 | |||
113 | /* | ||
114 | * initialise the motherboard FPGA's PIC | ||
115 | */ | ||
116 | void __init fpga_init(void) | ||
117 | { | ||
118 | int irq; | ||
119 | |||
120 | /* all PIC inputs are all set to be edge triggered */ | ||
121 | __set_IMR(0x0700); | ||
122 | __clr_IFR(0x0000); | ||
123 | |||
124 | for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++) | ||
125 | irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq); | ||
126 | |||
127 | /* the FPGA drives external IRQ input #2 on the CPU PIC */ | ||
128 | setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]); | ||
129 | } | ||
diff --git a/arch/frv/kernel/irq-mb93493.c b/arch/frv/kernel/irq-mb93493.c deleted file mode 100644 index 8ca5aa4ff595..000000000000 --- a/arch/frv/kernel/irq-mb93493.c +++ /dev/null | |||
@@ -1,147 +0,0 @@ | |||
1 | /* irq-mb93493.c: MB93493 companion chip interrupt handler | ||
2 | * | ||
3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/ptrace.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/signal.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/bitops.h> | ||
21 | |||
22 | #include <asm/io.h> | ||
23 | #include <asm/delay.h> | ||
24 | #include <asm/irq.h> | ||
25 | #include <asm/irc-regs.h> | ||
26 | #include <asm/mb93493-irqs.h> | ||
27 | #include <asm/mb93493-regs.h> | ||
28 | |||
29 | #define IRQ_ROUTE_ONE(X) (X##_ROUTE << (X - IRQ_BASE_MB93493)) | ||
30 | |||
31 | #define IRQ_ROUTING \ | ||
32 | (IRQ_ROUTE_ONE(IRQ_MB93493_VDC) | \ | ||
33 | IRQ_ROUTE_ONE(IRQ_MB93493_VCC) | \ | ||
34 | IRQ_ROUTE_ONE(IRQ_MB93493_AUDIO_OUT) | \ | ||
35 | IRQ_ROUTE_ONE(IRQ_MB93493_I2C_0) | \ | ||
36 | IRQ_ROUTE_ONE(IRQ_MB93493_I2C_1) | \ | ||
37 | IRQ_ROUTE_ONE(IRQ_MB93493_USB) | \ | ||
38 | IRQ_ROUTE_ONE(IRQ_MB93493_LOCAL_BUS) | \ | ||
39 | IRQ_ROUTE_ONE(IRQ_MB93493_PCMCIA) | \ | ||
40 | IRQ_ROUTE_ONE(IRQ_MB93493_GPIO) | \ | ||
41 | IRQ_ROUTE_ONE(IRQ_MB93493_AUDIO_IN)) | ||
42 | |||
43 | /* | ||
44 | * daughter board PIC operations | ||
45 | * - there is no way to ACK interrupts in the MB93493 chip | ||
46 | */ | ||
47 | static void frv_mb93493_mask(struct irq_data *d) | ||
48 | { | ||
49 | uint32_t iqsr; | ||
50 | volatile void *piqsr; | ||
51 | |||
52 | if (IRQ_ROUTING & (1 << (d->irq - IRQ_BASE_MB93493))) | ||
53 | piqsr = __addr_MB93493_IQSR(1); | ||
54 | else | ||
55 | piqsr = __addr_MB93493_IQSR(0); | ||
56 | |||
57 | iqsr = readl(piqsr); | ||
58 | iqsr &= ~(1 << (d->irq - IRQ_BASE_MB93493 + 16)); | ||
59 | writel(iqsr, piqsr); | ||
60 | } | ||
61 | |||
62 | static void frv_mb93493_ack(struct irq_data *d) | ||
63 | { | ||
64 | } | ||
65 | |||
66 | static void frv_mb93493_unmask(struct irq_data *d) | ||
67 | { | ||
68 | uint32_t iqsr; | ||
69 | volatile void *piqsr; | ||
70 | |||
71 | if (IRQ_ROUTING & (1 << (d->irq - IRQ_BASE_MB93493))) | ||
72 | piqsr = __addr_MB93493_IQSR(1); | ||
73 | else | ||
74 | piqsr = __addr_MB93493_IQSR(0); | ||
75 | |||
76 | iqsr = readl(piqsr); | ||
77 | iqsr |= 1 << (d->irq - IRQ_BASE_MB93493 + 16); | ||
78 | writel(iqsr, piqsr); | ||
79 | } | ||
80 | |||
81 | static struct irq_chip frv_mb93493_pic = { | ||
82 | .name = "mb93093", | ||
83 | .irq_ack = frv_mb93493_ack, | ||
84 | .irq_mask = frv_mb93493_mask, | ||
85 | .irq_mask_ack = frv_mb93493_mask, | ||
86 | .irq_unmask = frv_mb93493_unmask, | ||
87 | }; | ||
88 | |||
89 | /* | ||
90 | * MB93493 PIC interrupt handler | ||
91 | */ | ||
92 | static irqreturn_t mb93493_interrupt(int irq, void *_piqsr) | ||
93 | { | ||
94 | volatile void *piqsr = _piqsr; | ||
95 | uint32_t iqsr; | ||
96 | |||
97 | iqsr = readl(piqsr); | ||
98 | iqsr = iqsr & (iqsr >> 16) & 0xffff; | ||
99 | |||
100 | /* poll all the triggered IRQs */ | ||
101 | while (iqsr) { | ||
102 | int irq; | ||
103 | |||
104 | asm("scan %1,gr0,%0" : "=r"(irq) : "r"(iqsr)); | ||
105 | irq = 31 - irq; | ||
106 | iqsr &= ~(1 << irq); | ||
107 | |||
108 | generic_handle_irq(IRQ_BASE_MB93493 + irq); | ||
109 | } | ||
110 | |||
111 | return IRQ_HANDLED; | ||
112 | } | ||
113 | |||
114 | /* | ||
115 | * define an interrupt action for each MB93493 PIC output | ||
116 | * - use dev_id to indicate the MB93493 PIC input to output mappings | ||
117 | */ | ||
118 | static struct irqaction mb93493_irq[2] = { | ||
119 | [0] = { | ||
120 | .handler = mb93493_interrupt, | ||
121 | .flags = IRQF_SHARED, | ||
122 | .name = "mb93493.0", | ||
123 | .dev_id = (void *) __addr_MB93493_IQSR(0), | ||
124 | }, | ||
125 | [1] = { | ||
126 | .handler = mb93493_interrupt, | ||
127 | .flags = IRQF_SHARED, | ||
128 | .name = "mb93493.1", | ||
129 | .dev_id = (void *) __addr_MB93493_IQSR(1), | ||
130 | } | ||
131 | }; | ||
132 | |||
133 | /* | ||
134 | * initialise the motherboard MB93493's PIC | ||
135 | */ | ||
136 | void __init mb93493_init(void) | ||
137 | { | ||
138 | int irq; | ||
139 | |||
140 | for (irq = IRQ_BASE_MB93493 + 0; irq <= IRQ_BASE_MB93493 + 10; irq++) | ||
141 | irq_set_chip_and_handler(irq, &frv_mb93493_pic, | ||
142 | handle_edge_irq); | ||
143 | |||
144 | /* the MB93493 drives external IRQ inputs on the CPU PIC */ | ||
145 | setup_irq(IRQ_CPU_MB93493_0, &mb93493_irq[0]); | ||
146 | setup_irq(IRQ_CPU_MB93493_1, &mb93493_irq[1]); | ||
147 | } | ||
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c deleted file mode 100644 index 93513e4ccd2b..000000000000 --- a/arch/frv/kernel/irq.c +++ /dev/null | |||
@@ -1,159 +0,0 @@ | |||
1 | /* irq.c: FRV IRQ handling | ||
2 | * | ||
3 | * Copyright (C) 2003, 2004, 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/ptrace.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/signal.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/timex.h> | ||
19 | #include <linux/random.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/kernel_stat.h> | ||
22 | #include <linux/irq.h> | ||
23 | #include <linux/proc_fs.h> | ||
24 | #include <linux/seq_file.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/bitops.h> | ||
27 | |||
28 | #include <linux/atomic.h> | ||
29 | #include <asm/io.h> | ||
30 | #include <asm/smp.h> | ||
31 | #include <linux/uaccess.h> | ||
32 | #include <asm/pgalloc.h> | ||
33 | #include <asm/delay.h> | ||
34 | #include <asm/irq.h> | ||
35 | #include <asm/irc-regs.h> | ||
36 | #include <asm/gdb-stub.h> | ||
37 | |||
38 | #define set_IRR(N,A,B,C,D) __set_IRR(N, (A << 28) | (B << 24) | (C << 20) | (D << 16)) | ||
39 | |||
40 | extern void __init fpga_init(void); | ||
41 | #ifdef CONFIG_FUJITSU_MB93493 | ||
42 | extern void __init mb93493_init(void); | ||
43 | #endif | ||
44 | |||
45 | #define __reg16(ADDR) (*(volatile unsigned short *)(ADDR)) | ||
46 | |||
47 | atomic_t irq_err_count; | ||
48 | |||
49 | int arch_show_interrupts(struct seq_file *p, int prec) | ||
50 | { | ||
51 | seq_printf(p, "%*s: ", prec, "ERR"); | ||
52 | seq_printf(p, "%10u\n", atomic_read(&irq_err_count)); | ||
53 | return 0; | ||
54 | } | ||
55 | |||
56 | /* | ||
57 | * on-CPU PIC operations | ||
58 | */ | ||
59 | static void frv_cpupic_ack(struct irq_data *d) | ||
60 | { | ||
61 | __clr_RC(d->irq); | ||
62 | __clr_IRL(); | ||
63 | } | ||
64 | |||
65 | static void frv_cpupic_mask(struct irq_data *d) | ||
66 | { | ||
67 | __set_MASK(d->irq); | ||
68 | } | ||
69 | |||
70 | static void frv_cpupic_mask_ack(struct irq_data *d) | ||
71 | { | ||
72 | __set_MASK(d->irq); | ||
73 | __clr_RC(d->irq); | ||
74 | __clr_IRL(); | ||
75 | } | ||
76 | |||
77 | static void frv_cpupic_unmask(struct irq_data *d) | ||
78 | { | ||
79 | __clr_MASK(d->irq); | ||
80 | } | ||
81 | |||
82 | static struct irq_chip frv_cpu_pic = { | ||
83 | .name = "cpu", | ||
84 | .irq_ack = frv_cpupic_ack, | ||
85 | .irq_mask = frv_cpupic_mask, | ||
86 | .irq_mask_ack = frv_cpupic_mask_ack, | ||
87 | .irq_unmask = frv_cpupic_unmask, | ||
88 | }; | ||
89 | |||
90 | /* | ||
91 | * handles all normal device IRQs | ||
92 | * - registers are referred to by the __frame variable (GR28) | ||
93 | * - IRQ distribution is complicated in this arch because of the many PICs, the | ||
94 | * way they work and the way they cascade | ||
95 | */ | ||
96 | asmlinkage void do_IRQ(void) | ||
97 | { | ||
98 | irq_enter(); | ||
99 | generic_handle_irq(__get_IRL()); | ||
100 | irq_exit(); | ||
101 | } | ||
102 | |||
103 | /* | ||
104 | * handles all NMIs when not co-opted by the debugger | ||
105 | * - registers are referred to by the __frame variable (GR28) | ||
106 | */ | ||
107 | asmlinkage void do_NMI(void) | ||
108 | { | ||
109 | } | ||
110 | |||
111 | /* | ||
112 | * initialise the interrupt system | ||
113 | */ | ||
114 | void __init init_IRQ(void) | ||
115 | { | ||
116 | int level; | ||
117 | |||
118 | for (level = 1; level <= 14; level++) | ||
119 | irq_set_chip_and_handler(level, &frv_cpu_pic, | ||
120 | handle_level_irq); | ||
121 | |||
122 | irq_set_handler(IRQ_CPU_TIMER0, handle_edge_irq); | ||
123 | |||
124 | /* set the trigger levels for internal interrupt sources | ||
125 | * - timers all falling-edge | ||
126 | * - ERR0 is rising-edge | ||
127 | * - all others are high-level | ||
128 | */ | ||
129 | __set_IITMR(0, 0x003f0000); /* DMA0-3, TIMER0-2 */ | ||
130 | __set_IITMR(1, 0x20000000); /* ERR0-1, UART0-1, DMA4-7 */ | ||
131 | |||
132 | /* route internal interrupts */ | ||
133 | set_IRR(4, IRQ_DMA3_LEVEL, IRQ_DMA2_LEVEL, IRQ_DMA1_LEVEL, | ||
134 | IRQ_DMA0_LEVEL); | ||
135 | set_IRR(5, 0, IRQ_TIMER2_LEVEL, IRQ_TIMER1_LEVEL, IRQ_TIMER0_LEVEL); | ||
136 | set_IRR(6, IRQ_GDBSTUB_LEVEL, IRQ_GDBSTUB_LEVEL, | ||
137 | IRQ_UART1_LEVEL, IRQ_UART0_LEVEL); | ||
138 | set_IRR(7, IRQ_DMA7_LEVEL, IRQ_DMA6_LEVEL, IRQ_DMA5_LEVEL, | ||
139 | IRQ_DMA4_LEVEL); | ||
140 | |||
141 | /* route external interrupts */ | ||
142 | set_IRR(2, IRQ_XIRQ7_LEVEL, IRQ_XIRQ6_LEVEL, IRQ_XIRQ5_LEVEL, | ||
143 | IRQ_XIRQ4_LEVEL); | ||
144 | set_IRR(3, IRQ_XIRQ3_LEVEL, IRQ_XIRQ2_LEVEL, IRQ_XIRQ1_LEVEL, | ||
145 | IRQ_XIRQ0_LEVEL); | ||
146 | |||
147 | #if defined(CONFIG_MB93091_VDK) | ||
148 | __set_TM1(0x55550000); /* XIRQ7-0 all active low */ | ||
149 | #elif defined(CONFIG_MB93093_PDK) | ||
150 | __set_TM1(0x15550000); /* XIRQ7 active high, 6-0 all active low */ | ||
151 | #else | ||
152 | #error dont know external IRQ trigger levels for this setup | ||
153 | #endif | ||
154 | |||
155 | fpga_init(); | ||
156 | #ifdef CONFIG_FUJITSU_MB93493 | ||
157 | mb93493_init(); | ||
158 | #endif | ||
159 | } | ||
diff --git a/arch/frv/kernel/local.h b/arch/frv/kernel/local.h deleted file mode 100644 index 76606d13b1aa..000000000000 --- a/arch/frv/kernel/local.h +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* local.h: local definitions | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _FRV_LOCAL_H | ||
13 | #define _FRV_LOCAL_H | ||
14 | |||
15 | #include <asm/sections.h> | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | |||
19 | /* dma.c */ | ||
20 | extern unsigned long frv_dma_inprogress; | ||
21 | |||
22 | extern void frv_dma_pause_all(void); | ||
23 | extern void frv_dma_resume_all(void); | ||
24 | |||
25 | /* sleep.S */ | ||
26 | extern asmlinkage void frv_cpu_suspend(unsigned long); | ||
27 | extern asmlinkage void frv_cpu_core_sleep(void); | ||
28 | |||
29 | /* setup.c */ | ||
30 | extern unsigned long __nongprelbss pdm_suspend_mode; | ||
31 | extern void determine_clocks(int verbose); | ||
32 | extern int __nongprelbss clock_p0_current; | ||
33 | extern int __nongprelbss clock_cm_current; | ||
34 | extern int __nongprelbss clock_cmode_current; | ||
35 | |||
36 | #ifdef CONFIG_PM | ||
37 | extern int __nongprelbss clock_cmodes_permitted; | ||
38 | extern unsigned long __nongprelbss clock_bits_settable; | ||
39 | #define CLOCK_BIT_CM 0x0000000f | ||
40 | #define CLOCK_BIT_CM_H 0x00000001 /* CLKC.CM can be set to 0 */ | ||
41 | #define CLOCK_BIT_CM_M 0x00000002 /* CLKC.CM can be set to 1 */ | ||
42 | #define CLOCK_BIT_CM_L 0x00000004 /* CLKC.CM can be set to 2 */ | ||
43 | #define CLOCK_BIT_P0 0x00000010 /* CLKC.P0 can be changed */ | ||
44 | #define CLOCK_BIT_CMODE 0x00000020 /* CLKC.CMODE can be changed */ | ||
45 | |||
46 | extern void (*__power_switch_wake_setup)(void); | ||
47 | extern int (*__power_switch_wake_check)(void); | ||
48 | extern void (*__power_switch_wake_cleanup)(void); | ||
49 | #endif | ||
50 | |||
51 | /* time.c */ | ||
52 | extern void time_divisor_init(void); | ||
53 | |||
54 | /* cmode.S */ | ||
55 | extern asmlinkage void frv_change_cmode(int); | ||
56 | |||
57 | |||
58 | #endif /* __ASSEMBLY__ */ | ||
59 | #endif /* _FRV_LOCAL_H */ | ||
diff --git a/arch/frv/kernel/local64.h b/arch/frv/kernel/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/arch/frv/kernel/local64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/local64.h> | ||
diff --git a/arch/frv/kernel/module.c b/arch/frv/kernel/module.c deleted file mode 100644 index 9d9835f1fe2b..000000000000 --- a/arch/frv/kernel/module.c +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* module.c: FRV specific module loading bits | ||
2 | * | ||
3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/i386/kernel/module.c, Copyright (C) 2001 Rusty Russell. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #include <linux/moduleloader.h> | ||
13 | #include <linux/elf.h> | ||
14 | #include <linux/vmalloc.h> | ||
15 | #include <linux/fs.h> | ||
16 | #include <linux/string.h> | ||
17 | #include <linux/kernel.h> | ||
18 | |||
19 | #if 0 | ||
20 | #define DEBUGP printk | ||
21 | #else | ||
22 | #define DEBUGP(fmt...) | ||
23 | #endif | ||
24 | |||
25 | /* TODO: At least one of apply_relocate or apply_relocate_add must be | ||
26 | * implemented in order to get working module support. | ||
27 | */ | ||
diff --git a/arch/frv/kernel/pm-mb93093.c b/arch/frv/kernel/pm-mb93093.c deleted file mode 100644 index 8358e34a3fad..000000000000 --- a/arch/frv/kernel/pm-mb93093.c +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | /* | ||
2 | * FR-V MB93093 Power Management Routines | ||
3 | * | ||
4 | * Copyright (c) 2004 Red Hat, Inc. | ||
5 | * | ||
6 | * Written by: msalter@redhat.com | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/pm.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/sysctl.h> | ||
18 | #include <linux/errno.h> | ||
19 | #include <linux/delay.h> | ||
20 | #include <linux/uaccess.h> | ||
21 | |||
22 | #include <asm/mb86943a.h> | ||
23 | |||
24 | #include "local.h" | ||
25 | |||
26 | static unsigned long imask; | ||
27 | /* | ||
28 | * Setup interrupt masks, etc to enable wakeup by power switch | ||
29 | */ | ||
30 | static void mb93093_power_switch_setup(void) | ||
31 | { | ||
32 | /* mask all but FPGA interrupt sources. */ | ||
33 | imask = *(volatile unsigned long *)0xfeff9820; | ||
34 | *(volatile unsigned long *)0xfeff9820 = ~(1 << (IRQ_XIRQ2_LEVEL + 16)) & 0xfffe0000; | ||
35 | } | ||
36 | |||
37 | /* | ||
38 | * Cleanup interrupt masks, etc after wakeup by power switch | ||
39 | */ | ||
40 | static void mb93093_power_switch_cleanup(void) | ||
41 | { | ||
42 | *(volatile unsigned long *)0xfeff9820 = imask; | ||
43 | } | ||
44 | |||
45 | /* | ||
46 | * Return non-zero if wakeup irq was caused by power switch | ||
47 | */ | ||
48 | static int mb93093_power_switch_check(void) | ||
49 | { | ||
50 | return 1; | ||
51 | } | ||
52 | |||
53 | /* | ||
54 | * Initialize power interface | ||
55 | */ | ||
56 | static int __init mb93093_pm_init(void) | ||
57 | { | ||
58 | __power_switch_wake_setup = mb93093_power_switch_setup; | ||
59 | __power_switch_wake_check = mb93093_power_switch_check; | ||
60 | __power_switch_wake_cleanup = mb93093_power_switch_cleanup; | ||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | __initcall(mb93093_pm_init); | ||
65 | |||
diff --git a/arch/frv/kernel/pm.c b/arch/frv/kernel/pm.c deleted file mode 100644 index 051ccecbf7f1..000000000000 --- a/arch/frv/kernel/pm.c +++ /dev/null | |||
@@ -1,352 +0,0 @@ | |||
1 | /* | ||
2 | * FR-V Power Management Routines | ||
3 | * | ||
4 | * Copyright (c) 2004 Red Hat, Inc. | ||
5 | * | ||
6 | * Based on SA1100 version: | ||
7 | * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/pm.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/sysctl.h> | ||
20 | #include <linux/errno.h> | ||
21 | #include <linux/delay.h> | ||
22 | #include <linux/uaccess.h> | ||
23 | |||
24 | #include <asm/mb86943a.h> | ||
25 | |||
26 | #include "local.h" | ||
27 | |||
28 | /* | ||
29 | * Debug macros | ||
30 | */ | ||
31 | #define DEBUG | ||
32 | |||
33 | int pm_do_suspend(void) | ||
34 | { | ||
35 | local_irq_disable(); | ||
36 | |||
37 | __set_LEDS(0xb1); | ||
38 | |||
39 | /* go zzz */ | ||
40 | frv_cpu_suspend(pdm_suspend_mode); | ||
41 | |||
42 | __set_LEDS(0xb2); | ||
43 | |||
44 | local_irq_enable(); | ||
45 | |||
46 | return 0; | ||
47 | } | ||
48 | |||
49 | static unsigned long __irq_mask; | ||
50 | |||
51 | /* | ||
52 | * Setup interrupt masks, etc to enable wakeup by power switch | ||
53 | */ | ||
54 | static void __default_power_switch_setup(void) | ||
55 | { | ||
56 | /* default is to mask all interrupt sources. */ | ||
57 | __irq_mask = *(unsigned long *)0xfeff9820; | ||
58 | *(unsigned long *)0xfeff9820 = 0xfffe0000; | ||
59 | } | ||
60 | |||
61 | /* | ||
62 | * Cleanup interrupt masks, etc after wakeup by power switch | ||
63 | */ | ||
64 | static void __default_power_switch_cleanup(void) | ||
65 | { | ||
66 | *(unsigned long *)0xfeff9820 = __irq_mask; | ||
67 | } | ||
68 | |||
69 | /* | ||
70 | * Return non-zero if wakeup irq was caused by power switch | ||
71 | */ | ||
72 | static int __default_power_switch_check(void) | ||
73 | { | ||
74 | return 1; | ||
75 | } | ||
76 | |||
77 | void (*__power_switch_wake_setup)(void) = __default_power_switch_setup; | ||
78 | int (*__power_switch_wake_check)(void) = __default_power_switch_check; | ||
79 | void (*__power_switch_wake_cleanup)(void) = __default_power_switch_cleanup; | ||
80 | |||
81 | int pm_do_bus_sleep(void) | ||
82 | { | ||
83 | local_irq_disable(); | ||
84 | |||
85 | /* | ||
86 | * Here is where we need some platform-dependent setup | ||
87 | * of the interrupt state so that appropriate wakeup | ||
88 | * sources are allowed and all others are masked. | ||
89 | */ | ||
90 | __power_switch_wake_setup(); | ||
91 | |||
92 | __set_LEDS(0xa1); | ||
93 | |||
94 | /* go zzz | ||
95 | * | ||
96 | * This is in a loop in case power switch shares an irq with other | ||
97 | * devices. The wake_check() tells us if we need to finish waking | ||
98 | * or go back to sleep. | ||
99 | */ | ||
100 | do { | ||
101 | frv_cpu_suspend(HSR0_PDM_BUS_SLEEP); | ||
102 | } while (__power_switch_wake_check && !__power_switch_wake_check()); | ||
103 | |||
104 | __set_LEDS(0xa2); | ||
105 | |||
106 | /* | ||
107 | * Here is where we need some platform-dependent restore | ||
108 | * of the interrupt state prior to being called. | ||
109 | */ | ||
110 | __power_switch_wake_cleanup(); | ||
111 | |||
112 | local_irq_enable(); | ||
113 | |||
114 | return 0; | ||
115 | } | ||
116 | |||
117 | unsigned long sleep_phys_sp(void *sp) | ||
118 | { | ||
119 | return virt_to_phys(sp); | ||
120 | } | ||
121 | |||
122 | #ifdef CONFIG_SYSCTL | ||
123 | /* | ||
124 | * Use a temporary sysctl number. Horrid, but will be cleaned up in 2.6 | ||
125 | * when all the PM interfaces exist nicely. | ||
126 | */ | ||
127 | #define CTL_PM_SUSPEND 1 | ||
128 | #define CTL_PM_CMODE 2 | ||
129 | #define CTL_PM_P0 4 | ||
130 | #define CTL_PM_CM 5 | ||
131 | |||
132 | static int user_atoi(char __user *ubuf, size_t len) | ||
133 | { | ||
134 | char buf[16]; | ||
135 | unsigned long ret; | ||
136 | |||
137 | if (len > 15) | ||
138 | return -EINVAL; | ||
139 | |||
140 | if (copy_from_user(buf, ubuf, len)) | ||
141 | return -EFAULT; | ||
142 | |||
143 | buf[len] = 0; | ||
144 | ret = simple_strtoul(buf, NULL, 0); | ||
145 | if (ret > INT_MAX) | ||
146 | return -ERANGE; | ||
147 | return ret; | ||
148 | } | ||
149 | |||
150 | /* | ||
151 | * Send us to sleep. | ||
152 | */ | ||
153 | static int sysctl_pm_do_suspend(struct ctl_table *ctl, int write, | ||
154 | void __user *buffer, size_t *lenp, loff_t *fpos) | ||
155 | { | ||
156 | int mode; | ||
157 | |||
158 | if (*lenp <= 0) | ||
159 | return -EIO; | ||
160 | |||
161 | mode = user_atoi(buffer, *lenp); | ||
162 | switch (mode) { | ||
163 | case 1: | ||
164 | return pm_do_suspend(); | ||
165 | |||
166 | case 5: | ||
167 | return pm_do_bus_sleep(); | ||
168 | |||
169 | default: | ||
170 | return -EINVAL; | ||
171 | } | ||
172 | } | ||
173 | |||
174 | static int try_set_cmode(int new_cmode) | ||
175 | { | ||
176 | if (new_cmode > 15) | ||
177 | return -EINVAL; | ||
178 | if (!(clock_cmodes_permitted & (1<<new_cmode))) | ||
179 | return -EINVAL; | ||
180 | |||
181 | /* now change cmode */ | ||
182 | local_irq_disable(); | ||
183 | frv_dma_pause_all(); | ||
184 | |||
185 | frv_change_cmode(new_cmode); | ||
186 | |||
187 | determine_clocks(0); | ||
188 | time_divisor_init(); | ||
189 | |||
190 | #ifdef DEBUG | ||
191 | determine_clocks(1); | ||
192 | #endif | ||
193 | frv_dma_resume_all(); | ||
194 | local_irq_enable(); | ||
195 | |||
196 | return 0; | ||
197 | } | ||
198 | |||
199 | |||
200 | static int cmode_procctl(struct ctl_table *ctl, int write, | ||
201 | void __user *buffer, size_t *lenp, loff_t *fpos) | ||
202 | { | ||
203 | int new_cmode; | ||
204 | |||
205 | if (!write) | ||
206 | return proc_dointvec(ctl, write, buffer, lenp, fpos); | ||
207 | |||
208 | new_cmode = user_atoi(buffer, *lenp); | ||
209 | |||
210 | return try_set_cmode(new_cmode)?:*lenp; | ||
211 | } | ||
212 | |||
213 | static int try_set_p0(int new_p0) | ||
214 | { | ||
215 | unsigned long flags, clkc; | ||
216 | |||
217 | if (new_p0 < 0 || new_p0 > 1) | ||
218 | return -EINVAL; | ||
219 | |||
220 | local_irq_save(flags); | ||
221 | __set_PSR(flags & ~PSR_ET); | ||
222 | |||
223 | frv_dma_pause_all(); | ||
224 | |||
225 | clkc = __get_CLKC(); | ||
226 | if (new_p0) | ||
227 | clkc |= CLKC_P0; | ||
228 | else | ||
229 | clkc &= ~CLKC_P0; | ||
230 | __set_CLKC(clkc); | ||
231 | |||
232 | determine_clocks(0); | ||
233 | time_divisor_init(); | ||
234 | |||
235 | #ifdef DEBUG | ||
236 | determine_clocks(1); | ||
237 | #endif | ||
238 | frv_dma_resume_all(); | ||
239 | local_irq_restore(flags); | ||
240 | return 0; | ||
241 | } | ||
242 | |||
243 | static int try_set_cm(int new_cm) | ||
244 | { | ||
245 | unsigned long flags, clkc; | ||
246 | |||
247 | if (new_cm < 0 || new_cm > 1) | ||
248 | return -EINVAL; | ||
249 | |||
250 | local_irq_save(flags); | ||
251 | __set_PSR(flags & ~PSR_ET); | ||
252 | |||
253 | frv_dma_pause_all(); | ||
254 | |||
255 | clkc = __get_CLKC(); | ||
256 | clkc &= ~CLKC_CM; | ||
257 | clkc |= new_cm; | ||
258 | __set_CLKC(clkc); | ||
259 | |||
260 | determine_clocks(0); | ||
261 | time_divisor_init(); | ||
262 | |||
263 | #if 1 //def DEBUG | ||
264 | determine_clocks(1); | ||
265 | #endif | ||
266 | |||
267 | frv_dma_resume_all(); | ||
268 | local_irq_restore(flags); | ||
269 | return 0; | ||
270 | } | ||
271 | |||
272 | static int p0_procctl(struct ctl_table *ctl, int write, | ||
273 | void __user *buffer, size_t *lenp, loff_t *fpos) | ||
274 | { | ||
275 | int new_p0; | ||
276 | |||
277 | if (!write) | ||
278 | return proc_dointvec(ctl, write, buffer, lenp, fpos); | ||
279 | |||
280 | new_p0 = user_atoi(buffer, *lenp); | ||
281 | |||
282 | return try_set_p0(new_p0)?:*lenp; | ||
283 | } | ||
284 | |||
285 | static int cm_procctl(struct ctl_table *ctl, int write, | ||
286 | void __user *buffer, size_t *lenp, loff_t *fpos) | ||
287 | { | ||
288 | int new_cm; | ||
289 | |||
290 | if (!write) | ||
291 | return proc_dointvec(ctl, write, buffer, lenp, fpos); | ||
292 | |||
293 | new_cm = user_atoi(buffer, *lenp); | ||
294 | |||
295 | return try_set_cm(new_cm)?:*lenp; | ||
296 | } | ||
297 | |||
298 | static struct ctl_table pm_table[] = | ||
299 | { | ||
300 | { | ||
301 | .procname = "suspend", | ||
302 | .data = NULL, | ||
303 | .maxlen = 0, | ||
304 | .mode = 0200, | ||
305 | .proc_handler = sysctl_pm_do_suspend, | ||
306 | }, | ||
307 | { | ||
308 | .procname = "cmode", | ||
309 | .data = &clock_cmode_current, | ||
310 | .maxlen = sizeof(int), | ||
311 | .mode = 0644, | ||
312 | .proc_handler = cmode_procctl, | ||
313 | }, | ||
314 | { | ||
315 | .procname = "p0", | ||
316 | .data = &clock_p0_current, | ||
317 | .maxlen = sizeof(int), | ||
318 | .mode = 0644, | ||
319 | .proc_handler = p0_procctl, | ||
320 | }, | ||
321 | { | ||
322 | .procname = "cm", | ||
323 | .data = &clock_cm_current, | ||
324 | .maxlen = sizeof(int), | ||
325 | .mode = 0644, | ||
326 | .proc_handler = cm_procctl, | ||
327 | }, | ||
328 | { } | ||
329 | }; | ||
330 | |||
331 | static struct ctl_table pm_dir_table[] = | ||
332 | { | ||
333 | { | ||
334 | .procname = "pm", | ||
335 | .mode = 0555, | ||
336 | .child = pm_table, | ||
337 | }, | ||
338 | { } | ||
339 | }; | ||
340 | |||
341 | /* | ||
342 | * Initialize power interface | ||
343 | */ | ||
344 | static int __init pm_init(void) | ||
345 | { | ||
346 | register_sysctl_table(pm_dir_table); | ||
347 | return 0; | ||
348 | } | ||
349 | |||
350 | __initcall(pm_init); | ||
351 | |||
352 | #endif | ||
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c deleted file mode 100644 index a957b374e3a6..000000000000 --- a/arch/frv/kernel/process.c +++ /dev/null | |||
@@ -1,275 +0,0 @@ | |||
1 | /* process.c: FRV specific parts of process handling | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/m68k/kernel/process.c | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/sched/debug.h> | ||
17 | #include <linux/sched/task.h> | ||
18 | #include <linux/sched/task_stack.h> | ||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/mm.h> | ||
21 | #include <linux/smp.h> | ||
22 | #include <linux/stddef.h> | ||
23 | #include <linux/unistd.h> | ||
24 | #include <linux/ptrace.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/user.h> | ||
27 | #include <linux/elf.h> | ||
28 | #include <linux/reboot.h> | ||
29 | #include <linux/interrupt.h> | ||
30 | #include <linux/pagemap.h> | ||
31 | #include <linux/rcupdate.h> | ||
32 | |||
33 | #include <asm/asm-offsets.h> | ||
34 | #include <linux/uaccess.h> | ||
35 | #include <asm/setup.h> | ||
36 | #include <asm/pgtable.h> | ||
37 | #include <asm/tlb.h> | ||
38 | #include <asm/gdb-stub.h> | ||
39 | #include <asm/mb-regs.h> | ||
40 | |||
41 | #include "local.h" | ||
42 | |||
43 | asmlinkage void ret_from_fork(void); | ||
44 | asmlinkage void ret_from_kernel_thread(void); | ||
45 | |||
46 | #include <asm/pgalloc.h> | ||
47 | |||
48 | void (*pm_power_off)(void); | ||
49 | EXPORT_SYMBOL(pm_power_off); | ||
50 | |||
51 | static void core_sleep_idle(void) | ||
52 | { | ||
53 | #ifdef LED_DEBUG_SLEEP | ||
54 | /* Show that we're sleeping... */ | ||
55 | __set_LEDS(0x55aa); | ||
56 | #endif | ||
57 | frv_cpu_core_sleep(); | ||
58 | #ifdef LED_DEBUG_SLEEP | ||
59 | /* ... and that we woke up */ | ||
60 | __set_LEDS(0); | ||
61 | #endif | ||
62 | mb(); | ||
63 | } | ||
64 | |||
65 | void arch_cpu_idle(void) | ||
66 | { | ||
67 | if (!frv_dma_inprogress) | ||
68 | core_sleep_idle(); | ||
69 | else | ||
70 | local_irq_enable(); | ||
71 | } | ||
72 | |||
73 | void machine_restart(char * __unused) | ||
74 | { | ||
75 | unsigned long reset_addr; | ||
76 | #ifdef CONFIG_GDBSTUB | ||
77 | gdbstub_exit(0); | ||
78 | #endif | ||
79 | |||
80 | if (PSR_IMPLE(__get_PSR()) == PSR_IMPLE_FR551) | ||
81 | reset_addr = 0xfefff500; | ||
82 | else | ||
83 | reset_addr = 0xfeff0500; | ||
84 | |||
85 | /* Software reset. */ | ||
86 | asm volatile(" dcef @(gr0,gr0),1 ! membar !" | ||
87 | " sti %1,@(%0,0) !" | ||
88 | " nop ! nop ! nop ! nop ! nop ! " | ||
89 | " nop ! nop ! nop ! nop ! nop ! " | ||
90 | " nop ! nop ! nop ! nop ! nop ! " | ||
91 | " nop ! nop ! nop ! nop ! nop ! " | ||
92 | : : "r" (reset_addr), "r" (1) ); | ||
93 | |||
94 | for (;;) | ||
95 | ; | ||
96 | } | ||
97 | |||
98 | void machine_halt(void) | ||
99 | { | ||
100 | #ifdef CONFIG_GDBSTUB | ||
101 | gdbstub_exit(0); | ||
102 | #endif | ||
103 | |||
104 | for (;;); | ||
105 | } | ||
106 | |||
107 | void machine_power_off(void) | ||
108 | { | ||
109 | #ifdef CONFIG_GDBSTUB | ||
110 | gdbstub_exit(0); | ||
111 | #endif | ||
112 | |||
113 | for (;;); | ||
114 | } | ||
115 | |||
116 | void flush_thread(void) | ||
117 | { | ||
118 | /* nothing */ | ||
119 | } | ||
120 | |||
121 | inline unsigned long user_stack(const struct pt_regs *regs) | ||
122 | { | ||
123 | while (regs->next_frame) | ||
124 | regs = regs->next_frame; | ||
125 | return user_mode(regs) ? regs->sp : 0; | ||
126 | } | ||
127 | |||
128 | /* | ||
129 | * set up the kernel stack and exception frames for a new process | ||
130 | */ | ||
131 | int copy_thread(unsigned long clone_flags, | ||
132 | unsigned long usp, unsigned long arg, | ||
133 | struct task_struct *p) | ||
134 | { | ||
135 | struct pt_regs *childregs; | ||
136 | |||
137 | childregs = (struct pt_regs *) | ||
138 | (task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE); | ||
139 | |||
140 | /* set up the userspace frame (the only place that the USP is stored) */ | ||
141 | *childregs = *current_pt_regs(); | ||
142 | |||
143 | p->thread.frame = childregs; | ||
144 | p->thread.curr = p; | ||
145 | p->thread.sp = (unsigned long) childregs; | ||
146 | p->thread.fp = 0; | ||
147 | p->thread.lr = 0; | ||
148 | p->thread.frame0 = childregs; | ||
149 | |||
150 | if (unlikely(p->flags & PF_KTHREAD)) { | ||
151 | childregs->gr9 = usp; /* function */ | ||
152 | childregs->gr8 = arg; | ||
153 | p->thread.pc = (unsigned long) ret_from_kernel_thread; | ||
154 | save_user_regs(p->thread.user); | ||
155 | return 0; | ||
156 | } | ||
157 | if (usp) | ||
158 | childregs->sp = usp; | ||
159 | childregs->next_frame = NULL; | ||
160 | |||
161 | p->thread.pc = (unsigned long) ret_from_fork; | ||
162 | |||
163 | /* the new TLS pointer is passed in as arg #5 to sys_clone() */ | ||
164 | if (clone_flags & CLONE_SETTLS) | ||
165 | childregs->gr29 = childregs->gr12; | ||
166 | |||
167 | save_user_regs(p->thread.user); | ||
168 | |||
169 | return 0; | ||
170 | } /* end copy_thread() */ | ||
171 | |||
172 | unsigned long get_wchan(struct task_struct *p) | ||
173 | { | ||
174 | struct pt_regs *regs0; | ||
175 | unsigned long fp, pc; | ||
176 | unsigned long stack_limit; | ||
177 | int count = 0; | ||
178 | if (!p || p == current || p->state == TASK_RUNNING) | ||
179 | return 0; | ||
180 | |||
181 | stack_limit = (unsigned long) (p + 1); | ||
182 | fp = p->thread.fp; | ||
183 | regs0 = p->thread.frame0; | ||
184 | |||
185 | do { | ||
186 | if (fp < stack_limit || fp >= (unsigned long) regs0 || fp & 3) | ||
187 | return 0; | ||
188 | |||
189 | pc = ((unsigned long *) fp)[2]; | ||
190 | |||
191 | /* FIXME: This depends on the order of these functions. */ | ||
192 | if (!in_sched_functions(pc)) | ||
193 | return pc; | ||
194 | |||
195 | fp = *(unsigned long *) fp; | ||
196 | } while (count++ < 16); | ||
197 | |||
198 | return 0; | ||
199 | } | ||
200 | |||
201 | int elf_check_arch(const struct elf32_hdr *hdr) | ||
202 | { | ||
203 | unsigned long hsr0 = __get_HSR(0); | ||
204 | unsigned long psr = __get_PSR(); | ||
205 | |||
206 | if (hdr->e_machine != EM_FRV) | ||
207 | return 0; | ||
208 | |||
209 | switch (hdr->e_flags & EF_FRV_GPR_MASK) { | ||
210 | case EF_FRV_GPR64: | ||
211 | if ((hsr0 & HSR0_GRN) == HSR0_GRN_32) | ||
212 | return 0; | ||
213 | case EF_FRV_GPR32: | ||
214 | case 0: | ||
215 | break; | ||
216 | default: | ||
217 | return 0; | ||
218 | } | ||
219 | |||
220 | switch (hdr->e_flags & EF_FRV_FPR_MASK) { | ||
221 | case EF_FRV_FPR64: | ||
222 | if ((hsr0 & HSR0_FRN) == HSR0_FRN_32) | ||
223 | return 0; | ||
224 | case EF_FRV_FPR32: | ||
225 | case EF_FRV_FPR_NONE: | ||
226 | case 0: | ||
227 | break; | ||
228 | default: | ||
229 | return 0; | ||
230 | } | ||
231 | |||
232 | if ((hdr->e_flags & EF_FRV_MULADD) == EF_FRV_MULADD) | ||
233 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR405 && | ||
234 | PSR_IMPLE(psr) != PSR_IMPLE_FR451) | ||
235 | return 0; | ||
236 | |||
237 | switch (hdr->e_flags & EF_FRV_CPU_MASK) { | ||
238 | case EF_FRV_CPU_GENERIC: | ||
239 | break; | ||
240 | case EF_FRV_CPU_FR300: | ||
241 | case EF_FRV_CPU_SIMPLE: | ||
242 | case EF_FRV_CPU_TOMCAT: | ||
243 | default: | ||
244 | return 0; | ||
245 | case EF_FRV_CPU_FR400: | ||
246 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR401 && | ||
247 | PSR_IMPLE(psr) != PSR_IMPLE_FR405 && | ||
248 | PSR_IMPLE(psr) != PSR_IMPLE_FR451 && | ||
249 | PSR_IMPLE(psr) != PSR_IMPLE_FR551) | ||
250 | return 0; | ||
251 | break; | ||
252 | case EF_FRV_CPU_FR450: | ||
253 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR451) | ||
254 | return 0; | ||
255 | break; | ||
256 | case EF_FRV_CPU_FR500: | ||
257 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR501) | ||
258 | return 0; | ||
259 | break; | ||
260 | case EF_FRV_CPU_FR550: | ||
261 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR551) | ||
262 | return 0; | ||
263 | break; | ||
264 | } | ||
265 | |||
266 | return 1; | ||
267 | } | ||
268 | |||
269 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs) | ||
270 | { | ||
271 | memcpy(fpregs, | ||
272 | ¤t->thread.user->f, | ||
273 | sizeof(current->thread.user->f)); | ||
274 | return 1; | ||
275 | } | ||
diff --git a/arch/frv/kernel/ptrace.c b/arch/frv/kernel/ptrace.c deleted file mode 100644 index 49768401ce0f..000000000000 --- a/arch/frv/kernel/ptrace.c +++ /dev/null | |||
@@ -1,377 +0,0 @@ | |||
1 | /* ptrace.c: FRV specific parts of process tracing | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/m68k/kernel/ptrace.c | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/sched.h> | ||
15 | #include <linux/mm.h> | ||
16 | #include <linux/smp.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/ptrace.h> | ||
19 | #include <linux/user.h> | ||
20 | #include <linux/security.h> | ||
21 | #include <linux/signal.h> | ||
22 | #include <linux/regset.h> | ||
23 | #include <linux/elf.h> | ||
24 | #include <linux/tracehook.h> | ||
25 | |||
26 | #include <linux/uaccess.h> | ||
27 | #include <asm/page.h> | ||
28 | #include <asm/pgtable.h> | ||
29 | #include <asm/processor.h> | ||
30 | #include <asm/unistd.h> | ||
31 | |||
32 | /* | ||
33 | * does not yet catch signals sent when the child dies. | ||
34 | * in exit.c or in signal.c. | ||
35 | */ | ||
36 | |||
37 | /* | ||
38 | * retrieve the contents of FRV userspace general registers | ||
39 | */ | ||
40 | static int genregs_get(struct task_struct *target, | ||
41 | const struct user_regset *regset, | ||
42 | unsigned int pos, unsigned int count, | ||
43 | void *kbuf, void __user *ubuf) | ||
44 | { | ||
45 | const struct user_int_regs *iregs = &target->thread.user->i; | ||
46 | int ret; | ||
47 | |||
48 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | ||
49 | iregs, 0, sizeof(*iregs)); | ||
50 | if (ret < 0) | ||
51 | return ret; | ||
52 | |||
53 | return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, | ||
54 | sizeof(*iregs), -1); | ||
55 | } | ||
56 | |||
57 | /* | ||
58 | * update the contents of the FRV userspace general registers | ||
59 | */ | ||
60 | static int genregs_set(struct task_struct *target, | ||
61 | const struct user_regset *regset, | ||
62 | unsigned int pos, unsigned int count, | ||
63 | const void *kbuf, const void __user *ubuf) | ||
64 | { | ||
65 | struct user_int_regs *iregs = &target->thread.user->i; | ||
66 | unsigned int offs_gr0, offs_gr1; | ||
67 | int ret; | ||
68 | |||
69 | /* not allowed to set PSR or __status */ | ||
70 | if (pos < offsetof(struct user_int_regs, psr) + sizeof(long) && | ||
71 | pos + count > offsetof(struct user_int_regs, psr)) | ||
72 | return -EIO; | ||
73 | |||
74 | if (pos < offsetof(struct user_int_regs, __status) + sizeof(long) && | ||
75 | pos + count > offsetof(struct user_int_regs, __status)) | ||
76 | return -EIO; | ||
77 | |||
78 | /* set the control regs */ | ||
79 | offs_gr0 = offsetof(struct user_int_regs, gr[0]); | ||
80 | offs_gr1 = offsetof(struct user_int_regs, gr[1]); | ||
81 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
82 | iregs, 0, offs_gr0); | ||
83 | if (ret < 0) | ||
84 | return ret; | ||
85 | |||
86 | /* skip GR0/TBR */ | ||
87 | ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, | ||
88 | offs_gr0, offs_gr1); | ||
89 | if (ret < 0) | ||
90 | return ret; | ||
91 | |||
92 | /* set the general regs */ | ||
93 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
94 | &iregs->gr[1], offs_gr1, sizeof(*iregs)); | ||
95 | if (ret < 0) | ||
96 | return ret; | ||
97 | |||
98 | return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, | ||
99 | sizeof(*iregs), -1); | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * retrieve the contents of FRV userspace FP/Media registers | ||
104 | */ | ||
105 | static int fpmregs_get(struct task_struct *target, | ||
106 | const struct user_regset *regset, | ||
107 | unsigned int pos, unsigned int count, | ||
108 | void *kbuf, void __user *ubuf) | ||
109 | { | ||
110 | const struct user_fpmedia_regs *fpregs = &target->thread.user->f; | ||
111 | int ret; | ||
112 | |||
113 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | ||
114 | fpregs, 0, sizeof(*fpregs)); | ||
115 | if (ret < 0) | ||
116 | return ret; | ||
117 | |||
118 | return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, | ||
119 | sizeof(*fpregs), -1); | ||
120 | } | ||
121 | |||
122 | /* | ||
123 | * update the contents of the FRV userspace FP/Media registers | ||
124 | */ | ||
125 | static int fpmregs_set(struct task_struct *target, | ||
126 | const struct user_regset *regset, | ||
127 | unsigned int pos, unsigned int count, | ||
128 | const void *kbuf, const void __user *ubuf) | ||
129 | { | ||
130 | struct user_fpmedia_regs *fpregs = &target->thread.user->f; | ||
131 | int ret; | ||
132 | |||
133 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
134 | fpregs, 0, sizeof(*fpregs)); | ||
135 | if (ret < 0) | ||
136 | return ret; | ||
137 | |||
138 | return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, | ||
139 | sizeof(*fpregs), -1); | ||
140 | } | ||
141 | |||
142 | /* | ||
143 | * determine if the FP/Media registers have actually been used | ||
144 | */ | ||
145 | static int fpmregs_active(struct task_struct *target, | ||
146 | const struct user_regset *regset) | ||
147 | { | ||
148 | return tsk_used_math(target) ? regset->n : 0; | ||
149 | } | ||
150 | |||
151 | /* | ||
152 | * Define the register sets available on the FRV under Linux | ||
153 | */ | ||
154 | enum frv_regset { | ||
155 | REGSET_GENERAL, | ||
156 | REGSET_FPMEDIA, | ||
157 | }; | ||
158 | |||
159 | static const struct user_regset frv_regsets[] = { | ||
160 | /* | ||
161 | * General register format is: | ||
162 | * PSR, ISR, CCR, CCCR, LR, LCR, PC, (STATUS), SYSCALLNO, ORIG_G8 | ||
163 | * GNER0-1, IACC0, TBR, GR1-63 | ||
164 | */ | ||
165 | [REGSET_GENERAL] = { | ||
166 | .core_note_type = NT_PRSTATUS, | ||
167 | .n = ELF_NGREG, | ||
168 | .size = sizeof(long), | ||
169 | .align = sizeof(long), | ||
170 | .get = genregs_get, | ||
171 | .set = genregs_set, | ||
172 | }, | ||
173 | /* | ||
174 | * FPU/Media register format is: | ||
175 | * FR0-63, FNER0-1, MSR0-1, ACC0-7, ACCG0-8, FSR | ||
176 | */ | ||
177 | [REGSET_FPMEDIA] = { | ||
178 | .core_note_type = NT_PRFPREG, | ||
179 | .n = sizeof(struct user_fpmedia_regs) / sizeof(long), | ||
180 | .size = sizeof(long), | ||
181 | .align = sizeof(long), | ||
182 | .get = fpmregs_get, | ||
183 | .set = fpmregs_set, | ||
184 | .active = fpmregs_active, | ||
185 | }, | ||
186 | }; | ||
187 | |||
188 | static const struct user_regset_view user_frv_native_view = { | ||
189 | .name = "frv", | ||
190 | .e_machine = EM_FRV, | ||
191 | .regsets = frv_regsets, | ||
192 | .n = ARRAY_SIZE(frv_regsets), | ||
193 | }; | ||
194 | |||
195 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | ||
196 | { | ||
197 | return &user_frv_native_view; | ||
198 | } | ||
199 | |||
200 | /* | ||
201 | * Get contents of register REGNO in task TASK. | ||
202 | */ | ||
203 | static inline long get_reg(struct task_struct *task, int regno) | ||
204 | { | ||
205 | struct user_context *user = task->thread.user; | ||
206 | |||
207 | if (regno < 0 || regno >= PT__END) | ||
208 | return 0; | ||
209 | |||
210 | return ((unsigned long *) user)[regno]; | ||
211 | } | ||
212 | |||
213 | /* | ||
214 | * Write contents of register REGNO in task TASK. | ||
215 | */ | ||
216 | static inline int put_reg(struct task_struct *task, int regno, | ||
217 | unsigned long data) | ||
218 | { | ||
219 | struct user_context *user = task->thread.user; | ||
220 | |||
221 | if (regno < 0 || regno >= PT__END) | ||
222 | return -EIO; | ||
223 | |||
224 | switch (regno) { | ||
225 | case PT_GR(0): | ||
226 | return 0; | ||
227 | case PT_PSR: | ||
228 | case PT__STATUS: | ||
229 | return -EIO; | ||
230 | default: | ||
231 | ((unsigned long *) user)[regno] = data; | ||
232 | return 0; | ||
233 | } | ||
234 | } | ||
235 | |||
236 | /* | ||
237 | * Called by kernel/ptrace.c when detaching.. | ||
238 | * | ||
239 | * Control h/w single stepping | ||
240 | */ | ||
241 | void user_enable_single_step(struct task_struct *child) | ||
242 | { | ||
243 | child->thread.frame0->__status |= REG__STATUS_STEP; | ||
244 | } | ||
245 | |||
246 | void user_disable_single_step(struct task_struct *child) | ||
247 | { | ||
248 | child->thread.frame0->__status &= ~REG__STATUS_STEP; | ||
249 | } | ||
250 | |||
251 | void ptrace_disable(struct task_struct *child) | ||
252 | { | ||
253 | user_disable_single_step(child); | ||
254 | } | ||
255 | |||
256 | long arch_ptrace(struct task_struct *child, long request, | ||
257 | unsigned long addr, unsigned long data) | ||
258 | { | ||
259 | unsigned long tmp; | ||
260 | int ret; | ||
261 | int regno = addr >> 2; | ||
262 | unsigned long __user *datap = (unsigned long __user *) data; | ||
263 | |||
264 | switch (request) { | ||
265 | /* read the word at location addr in the USER area. */ | ||
266 | case PTRACE_PEEKUSR: { | ||
267 | tmp = 0; | ||
268 | ret = -EIO; | ||
269 | if (addr & 3) | ||
270 | break; | ||
271 | |||
272 | ret = 0; | ||
273 | switch (regno) { | ||
274 | case 0 ... PT__END - 1: | ||
275 | tmp = get_reg(child, regno); | ||
276 | break; | ||
277 | |||
278 | case PT__END + 0: | ||
279 | tmp = child->mm->end_code - child->mm->start_code; | ||
280 | break; | ||
281 | |||
282 | case PT__END + 1: | ||
283 | tmp = child->mm->end_data - child->mm->start_data; | ||
284 | break; | ||
285 | |||
286 | case PT__END + 2: | ||
287 | tmp = child->mm->start_stack - child->mm->start_brk; | ||
288 | break; | ||
289 | |||
290 | case PT__END + 3: | ||
291 | tmp = child->mm->start_code; | ||
292 | break; | ||
293 | |||
294 | case PT__END + 4: | ||
295 | tmp = child->mm->start_stack; | ||
296 | break; | ||
297 | |||
298 | default: | ||
299 | ret = -EIO; | ||
300 | break; | ||
301 | } | ||
302 | |||
303 | if (ret == 0) | ||
304 | ret = put_user(tmp, datap); | ||
305 | break; | ||
306 | } | ||
307 | |||
308 | case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ | ||
309 | ret = -EIO; | ||
310 | if (addr & 3) | ||
311 | break; | ||
312 | |||
313 | switch (regno) { | ||
314 | case 0 ... PT__END - 1: | ||
315 | ret = put_reg(child, regno, data); | ||
316 | break; | ||
317 | } | ||
318 | break; | ||
319 | |||
320 | case PTRACE_GETREGS: /* Get all integer regs from the child. */ | ||
321 | return copy_regset_to_user(child, &user_frv_native_view, | ||
322 | REGSET_GENERAL, | ||
323 | 0, sizeof(child->thread.user->i), | ||
324 | datap); | ||
325 | |||
326 | case PTRACE_SETREGS: /* Set all integer regs in the child. */ | ||
327 | return copy_regset_from_user(child, &user_frv_native_view, | ||
328 | REGSET_GENERAL, | ||
329 | 0, sizeof(child->thread.user->i), | ||
330 | datap); | ||
331 | |||
332 | case PTRACE_GETFPREGS: /* Get the child FP/Media state. */ | ||
333 | return copy_regset_to_user(child, &user_frv_native_view, | ||
334 | REGSET_FPMEDIA, | ||
335 | 0, sizeof(child->thread.user->f), | ||
336 | datap); | ||
337 | |||
338 | case PTRACE_SETFPREGS: /* Set the child FP/Media state. */ | ||
339 | return copy_regset_from_user(child, &user_frv_native_view, | ||
340 | REGSET_FPMEDIA, | ||
341 | 0, sizeof(child->thread.user->f), | ||
342 | datap); | ||
343 | |||
344 | default: | ||
345 | ret = ptrace_request(child, request, addr, data); | ||
346 | break; | ||
347 | } | ||
348 | return ret; | ||
349 | } | ||
350 | |||
351 | /* | ||
352 | * handle tracing of system call entry | ||
353 | * - return the revised system call number or ULONG_MAX to cause ENOSYS | ||
354 | */ | ||
355 | asmlinkage unsigned long syscall_trace_entry(void) | ||
356 | { | ||
357 | __frame->__status |= REG__STATUS_SYSC_ENTRY; | ||
358 | if (tracehook_report_syscall_entry(__frame)) { | ||
359 | /* tracing decided this syscall should not happen, so | ||
360 | * We'll return a bogus call number to get an ENOSYS | ||
361 | * error, but leave the original number in | ||
362 | * __frame->syscallno | ||
363 | */ | ||
364 | return ULONG_MAX; | ||
365 | } | ||
366 | |||
367 | return __frame->syscallno; | ||
368 | } | ||
369 | |||
370 | /* | ||
371 | * handle tracing of system call exit | ||
372 | */ | ||
373 | asmlinkage void syscall_trace_exit(void) | ||
374 | { | ||
375 | __frame->__status |= REG__STATUS_SYSC_EXIT; | ||
376 | tracehook_report_syscall_exit(__frame, 0); | ||
377 | } | ||
diff --git a/arch/frv/kernel/setup.c b/arch/frv/kernel/setup.c deleted file mode 100644 index 9f4a9a607dbe..000000000000 --- a/arch/frv/kernel/setup.c +++ /dev/null | |||
@@ -1,1178 +0,0 @@ | |||
1 | /* setup.c: FRV specific setup | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/m68k/kernel/setup.c | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <generated/utsrelease.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/fs.h> | ||
19 | #include <linux/mm.h> | ||
20 | #include <linux/fb.h> | ||
21 | #include <linux/console.h> | ||
22 | #include <linux/genhd.h> | ||
23 | #include <linux/errno.h> | ||
24 | #include <linux/string.h> | ||
25 | #include <linux/major.h> | ||
26 | #include <linux/bootmem.h> | ||
27 | #include <linux/highmem.h> | ||
28 | #include <linux/seq_file.h> | ||
29 | #include <linux/serial.h> | ||
30 | #include <linux/serial_core.h> | ||
31 | #include <linux/serial_reg.h> | ||
32 | #include <linux/serial_8250.h> | ||
33 | |||
34 | #include <asm/setup.h> | ||
35 | #include <asm/irq.h> | ||
36 | #include <asm/sections.h> | ||
37 | #include <asm/pgalloc.h> | ||
38 | #include <asm/busctl-regs.h> | ||
39 | #include <asm/serial-regs.h> | ||
40 | #include <asm/timer-regs.h> | ||
41 | #include <asm/irc-regs.h> | ||
42 | #include <asm/spr-regs.h> | ||
43 | #include <asm/mb-regs.h> | ||
44 | #include <asm/mb93493-regs.h> | ||
45 | #include <asm/gdb-stub.h> | ||
46 | #include <asm/io.h> | ||
47 | |||
48 | #ifdef CONFIG_BLK_DEV_INITRD | ||
49 | #include <asm/pgtable.h> | ||
50 | #endif | ||
51 | |||
52 | #include "local.h" | ||
53 | |||
54 | #ifdef CONFIG_MB93090_MB00 | ||
55 | static void __init mb93090_display(void); | ||
56 | #endif | ||
57 | #ifdef CONFIG_MMU | ||
58 | static void __init setup_linux_memory(void); | ||
59 | #else | ||
60 | static void __init setup_uclinux_memory(void); | ||
61 | #endif | ||
62 | |||
63 | #ifdef CONFIG_MB93090_MB00 | ||
64 | static char __initdata mb93090_banner[] = "FJ/RH FR-V Linux"; | ||
65 | static char __initdata mb93090_version[] = UTS_RELEASE; | ||
66 | |||
67 | int __nongprelbss mb93090_mb00_detected; | ||
68 | #endif | ||
69 | |||
70 | const char __frv_unknown_system[] = "unknown"; | ||
71 | const char __frv_mb93091_cb10[] = "mb93091-cb10"; | ||
72 | const char __frv_mb93091_cb11[] = "mb93091-cb11"; | ||
73 | const char __frv_mb93091_cb30[] = "mb93091-cb30"; | ||
74 | const char __frv_mb93091_cb41[] = "mb93091-cb41"; | ||
75 | const char __frv_mb93091_cb60[] = "mb93091-cb60"; | ||
76 | const char __frv_mb93091_cb70[] = "mb93091-cb70"; | ||
77 | const char __frv_mb93091_cb451[] = "mb93091-cb451"; | ||
78 | const char __frv_mb93090_mb00[] = "mb93090-mb00"; | ||
79 | |||
80 | const char __frv_mb93493[] = "mb93493"; | ||
81 | |||
82 | const char __frv_mb93093[] = "mb93093"; | ||
83 | |||
84 | static const char *__nongprelbss cpu_series; | ||
85 | static const char *__nongprelbss cpu_core; | ||
86 | static const char *__nongprelbss cpu_silicon; | ||
87 | static const char *__nongprelbss cpu_mmu; | ||
88 | static const char *__nongprelbss cpu_system; | ||
89 | static const char *__nongprelbss cpu_board1; | ||
90 | static const char *__nongprelbss cpu_board2; | ||
91 | |||
92 | static unsigned long __nongprelbss cpu_psr_all; | ||
93 | static unsigned long __nongprelbss cpu_hsr0_all; | ||
94 | |||
95 | unsigned long __nongprelbss pdm_suspend_mode; | ||
96 | |||
97 | unsigned long __nongprelbss rom_length; | ||
98 | unsigned long __nongprelbss memory_start; | ||
99 | unsigned long __nongprelbss memory_end; | ||
100 | |||
101 | unsigned long __nongprelbss dma_coherent_mem_start; | ||
102 | unsigned long __nongprelbss dma_coherent_mem_end; | ||
103 | |||
104 | unsigned long __initdata __sdram_old_base; | ||
105 | unsigned long __initdata num_mappedpages; | ||
106 | |||
107 | char __initdata command_line[COMMAND_LINE_SIZE]; | ||
108 | char __initdata redboot_command_line[COMMAND_LINE_SIZE]; | ||
109 | |||
110 | #ifdef CONFIG_PM | ||
111 | #define __pminit | ||
112 | #define __pminitdata | ||
113 | #define __pminitconst | ||
114 | #else | ||
115 | #define __pminit __init | ||
116 | #define __pminitdata __initdata | ||
117 | #define __pminitconst __initconst | ||
118 | #endif | ||
119 | |||
120 | struct clock_cmode { | ||
121 | uint8_t xbus, sdram, corebus, core, dsu; | ||
122 | }; | ||
123 | |||
124 | #define _frac(N,D) ((N)<<4 | (D)) | ||
125 | #define _x0_16 _frac(1,6) | ||
126 | #define _x0_25 _frac(1,4) | ||
127 | #define _x0_33 _frac(1,3) | ||
128 | #define _x0_375 _frac(3,8) | ||
129 | #define _x0_5 _frac(1,2) | ||
130 | #define _x0_66 _frac(2,3) | ||
131 | #define _x0_75 _frac(3,4) | ||
132 | #define _x1 _frac(1,1) | ||
133 | #define _x1_5 _frac(3,2) | ||
134 | #define _x2 _frac(2,1) | ||
135 | #define _x3 _frac(3,1) | ||
136 | #define _x4 _frac(4,1) | ||
137 | #define _x4_5 _frac(9,2) | ||
138 | #define _x6 _frac(6,1) | ||
139 | #define _x8 _frac(8,1) | ||
140 | #define _x9 _frac(9,1) | ||
141 | |||
142 | int __nongprelbss clock_p0_current; | ||
143 | int __nongprelbss clock_cm_current; | ||
144 | int __nongprelbss clock_cmode_current; | ||
145 | #ifdef CONFIG_PM | ||
146 | int __nongprelbss clock_cmodes_permitted; | ||
147 | unsigned long __nongprelbss clock_bits_settable; | ||
148 | #endif | ||
149 | |||
150 | static struct clock_cmode __pminitdata undef_clock_cmode = { _x1, _x1, _x1, _x1, _x1 }; | ||
151 | |||
152 | static struct clock_cmode __pminitdata clock_cmodes_fr401_fr403[16] = { | ||
153 | [4] = { _x1, _x1, _x2, _x2, _x0_25 }, | ||
154 | [5] = { _x1, _x2, _x4, _x4, _x0_5 }, | ||
155 | [8] = { _x1, _x1, _x1, _x2, _x0_25 }, | ||
156 | [9] = { _x1, _x2, _x2, _x4, _x0_5 }, | ||
157 | [11] = { _x1, _x4, _x4, _x8, _x1 }, | ||
158 | [12] = { _x1, _x1, _x2, _x4, _x0_5 }, | ||
159 | [13] = { _x1, _x2, _x4, _x8, _x1 }, | ||
160 | }; | ||
161 | |||
162 | static struct clock_cmode __pminitdata clock_cmodes_fr405[16] = { | ||
163 | [0] = { _x1, _x1, _x1, _x1, _x0_5 }, | ||
164 | [1] = { _x1, _x1, _x1, _x3, _x0_25 }, | ||
165 | [2] = { _x1, _x1, _x2, _x6, _x0_5 }, | ||
166 | [3] = { _x1, _x2, _x2, _x6, _x0_5 }, | ||
167 | [4] = { _x1, _x1, _x2, _x2, _x0_16 }, | ||
168 | [8] = { _x1, _x1, _x1, _x2, _x0_16 }, | ||
169 | [9] = { _x1, _x2, _x2, _x4, _x0_33 }, | ||
170 | [12] = { _x1, _x1, _x2, _x4, _x0_33 }, | ||
171 | [14] = { _x1, _x3, _x3, _x9, _x0_75 }, | ||
172 | [15] = { _x1, _x1_5, _x1_5, _x4_5, _x0_375 }, | ||
173 | |||
174 | #define CLOCK_CMODES_PERMITTED_FR405 0xd31f | ||
175 | }; | ||
176 | |||
177 | static struct clock_cmode __pminitdata clock_cmodes_fr555[16] = { | ||
178 | [0] = { _x1, _x2, _x2, _x4, _x0_33 }, | ||
179 | [1] = { _x1, _x3, _x3, _x6, _x0_5 }, | ||
180 | [2] = { _x1, _x2, _x4, _x8, _x0_66 }, | ||
181 | [3] = { _x1, _x1_5, _x3, _x6, _x0_5 }, | ||
182 | [4] = { _x1, _x3, _x3, _x9, _x0_75 }, | ||
183 | [5] = { _x1, _x2, _x2, _x6, _x0_5 }, | ||
184 | [6] = { _x1, _x1_5, _x1_5, _x4_5, _x0_375 }, | ||
185 | }; | ||
186 | |||
187 | static const struct clock_cmode __pminitconst *clock_cmodes; | ||
188 | static int __pminitdata clock_doubled; | ||
189 | |||
190 | static struct uart_port __pminitdata __frv_uart0 = { | ||
191 | .uartclk = 0, | ||
192 | .membase = (char *) UART0_BASE, | ||
193 | .irq = IRQ_CPU_UART0, | ||
194 | .regshift = 3, | ||
195 | .iotype = UPIO_MEM, | ||
196 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | ||
197 | }; | ||
198 | |||
199 | static struct uart_port __pminitdata __frv_uart1 = { | ||
200 | .uartclk = 0, | ||
201 | .membase = (char *) UART1_BASE, | ||
202 | .irq = IRQ_CPU_UART1, | ||
203 | .regshift = 3, | ||
204 | .iotype = UPIO_MEM, | ||
205 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | ||
206 | }; | ||
207 | |||
208 | #if 0 | ||
209 | static void __init printk_xampr(unsigned long ampr, unsigned long amlr, char i_d, int n) | ||
210 | { | ||
211 | unsigned long phys, virt, cxn, size; | ||
212 | |||
213 | #ifdef CONFIG_MMU | ||
214 | virt = amlr & 0xffffc000; | ||
215 | cxn = amlr & 0x3fff; | ||
216 | #else | ||
217 | virt = ampr & 0xffffc000; | ||
218 | cxn = 0; | ||
219 | #endif | ||
220 | phys = ampr & xAMPRx_PPFN; | ||
221 | size = 1 << (((ampr & xAMPRx_SS) >> 4) + 17); | ||
222 | |||
223 | printk("%cAMPR%d: va %08lx-%08lx [pa %08lx] %c%c%c%c [cxn:%04lx]\n", | ||
224 | i_d, n, | ||
225 | virt, virt + size - 1, | ||
226 | phys, | ||
227 | ampr & xAMPRx_S ? 'S' : '-', | ||
228 | ampr & xAMPRx_C ? 'C' : '-', | ||
229 | ampr & DAMPRx_WP ? 'W' : '-', | ||
230 | ampr & xAMPRx_V ? 'V' : '-', | ||
231 | cxn | ||
232 | ); | ||
233 | } | ||
234 | #endif | ||
235 | |||
236 | /*****************************************************************************/ | ||
237 | /* | ||
238 | * dump the memory map | ||
239 | */ | ||
240 | static void __init dump_memory_map(void) | ||
241 | { | ||
242 | |||
243 | #if 0 | ||
244 | /* dump the protection map */ | ||
245 | printk_xampr(__get_IAMPR(0), __get_IAMLR(0), 'I', 0); | ||
246 | printk_xampr(__get_IAMPR(1), __get_IAMLR(1), 'I', 1); | ||
247 | printk_xampr(__get_IAMPR(2), __get_IAMLR(2), 'I', 2); | ||
248 | printk_xampr(__get_IAMPR(3), __get_IAMLR(3), 'I', 3); | ||
249 | printk_xampr(__get_IAMPR(4), __get_IAMLR(4), 'I', 4); | ||
250 | printk_xampr(__get_IAMPR(5), __get_IAMLR(5), 'I', 5); | ||
251 | printk_xampr(__get_IAMPR(6), __get_IAMLR(6), 'I', 6); | ||
252 | printk_xampr(__get_IAMPR(7), __get_IAMLR(7), 'I', 7); | ||
253 | printk_xampr(__get_IAMPR(8), __get_IAMLR(8), 'I', 8); | ||
254 | printk_xampr(__get_IAMPR(9), __get_IAMLR(9), 'i', 9); | ||
255 | printk_xampr(__get_IAMPR(10), __get_IAMLR(10), 'I', 10); | ||
256 | printk_xampr(__get_IAMPR(11), __get_IAMLR(11), 'I', 11); | ||
257 | printk_xampr(__get_IAMPR(12), __get_IAMLR(12), 'I', 12); | ||
258 | printk_xampr(__get_IAMPR(13), __get_IAMLR(13), 'I', 13); | ||
259 | printk_xampr(__get_IAMPR(14), __get_IAMLR(14), 'I', 14); | ||
260 | printk_xampr(__get_IAMPR(15), __get_IAMLR(15), 'I', 15); | ||
261 | |||
262 | printk_xampr(__get_DAMPR(0), __get_DAMLR(0), 'D', 0); | ||
263 | printk_xampr(__get_DAMPR(1), __get_DAMLR(1), 'D', 1); | ||
264 | printk_xampr(__get_DAMPR(2), __get_DAMLR(2), 'D', 2); | ||
265 | printk_xampr(__get_DAMPR(3), __get_DAMLR(3), 'D', 3); | ||
266 | printk_xampr(__get_DAMPR(4), __get_DAMLR(4), 'D', 4); | ||
267 | printk_xampr(__get_DAMPR(5), __get_DAMLR(5), 'D', 5); | ||
268 | printk_xampr(__get_DAMPR(6), __get_DAMLR(6), 'D', 6); | ||
269 | printk_xampr(__get_DAMPR(7), __get_DAMLR(7), 'D', 7); | ||
270 | printk_xampr(__get_DAMPR(8), __get_DAMLR(8), 'D', 8); | ||
271 | printk_xampr(__get_DAMPR(9), __get_DAMLR(9), 'D', 9); | ||
272 | printk_xampr(__get_DAMPR(10), __get_DAMLR(10), 'D', 10); | ||
273 | printk_xampr(__get_DAMPR(11), __get_DAMLR(11), 'D', 11); | ||
274 | printk_xampr(__get_DAMPR(12), __get_DAMLR(12), 'D', 12); | ||
275 | printk_xampr(__get_DAMPR(13), __get_DAMLR(13), 'D', 13); | ||
276 | printk_xampr(__get_DAMPR(14), __get_DAMLR(14), 'D', 14); | ||
277 | printk_xampr(__get_DAMPR(15), __get_DAMLR(15), 'D', 15); | ||
278 | #endif | ||
279 | |||
280 | #if 0 | ||
281 | /* dump the bus controller registers */ | ||
282 | printk("LGCR: %08lx\n", __get_LGCR()); | ||
283 | printk("Master: %08lx-%08lx CR=%08lx\n", | ||
284 | __get_LEMBR(), __get_LEMBR() + __get_LEMAM(), | ||
285 | __get_LMAICR()); | ||
286 | |||
287 | int loop; | ||
288 | for (loop = 1; loop <= 7; loop++) { | ||
289 | unsigned long lcr = __get_LCR(loop), lsbr = __get_LSBR(loop); | ||
290 | printk("CS#%d: %08lx-%08lx %c%c%c%c%c%c%c%c%c\n", | ||
291 | loop, | ||
292 | lsbr, lsbr + __get_LSAM(loop), | ||
293 | lcr & 0x80000000 ? 'r' : '-', | ||
294 | lcr & 0x40000000 ? 'w' : '-', | ||
295 | lcr & 0x08000000 ? 'b' : '-', | ||
296 | lcr & 0x04000000 ? 'B' : '-', | ||
297 | lcr & 0x02000000 ? 'C' : '-', | ||
298 | lcr & 0x01000000 ? 'D' : '-', | ||
299 | lcr & 0x00800000 ? 'W' : '-', | ||
300 | lcr & 0x00400000 ? 'R' : '-', | ||
301 | (lcr & 0x00030000) == 0x00000000 ? '4' : | ||
302 | (lcr & 0x00030000) == 0x00010000 ? '2' : | ||
303 | (lcr & 0x00030000) == 0x00020000 ? '1' : | ||
304 | '-' | ||
305 | ); | ||
306 | } | ||
307 | #endif | ||
308 | |||
309 | #if 0 | ||
310 | printk("\n"); | ||
311 | #endif | ||
312 | } /* end dump_memory_map() */ | ||
313 | |||
314 | /*****************************************************************************/ | ||
315 | /* | ||
316 | * attempt to detect a VDK motherboard and DAV daughter board on an MB93091 system | ||
317 | */ | ||
318 | #ifdef CONFIG_MB93091_VDK | ||
319 | static void __init detect_mb93091(void) | ||
320 | { | ||
321 | #ifdef CONFIG_MB93090_MB00 | ||
322 | /* Detect CB70 without motherboard */ | ||
323 | if (!(cpu_system == __frv_mb93091_cb70 && ((*(unsigned short *)0xffc00030) & 0x100))) { | ||
324 | cpu_board1 = __frv_mb93090_mb00; | ||
325 | mb93090_mb00_detected = 1; | ||
326 | } | ||
327 | #endif | ||
328 | |||
329 | #ifdef CONFIG_FUJITSU_MB93493 | ||
330 | cpu_board2 = __frv_mb93493; | ||
331 | #endif | ||
332 | |||
333 | } /* end detect_mb93091() */ | ||
334 | #endif | ||
335 | |||
336 | /*****************************************************************************/ | ||
337 | /* | ||
338 | * determine the CPU type and set appropriate parameters | ||
339 | * | ||
340 | * Family Series CPU Core Silicon Imple Vers | ||
341 | * ---------------------------------------------------------- | ||
342 | * FR-V --+-> FR400 --+-> FR401 --+-> MB93401 02 00 [1] | ||
343 | * | | | | ||
344 | * | | +-> MB93401/A 02 01 | ||
345 | * | | | | ||
346 | * | | +-> MB93403 02 02 | ||
347 | * | | | ||
348 | * | +-> FR405 ----> MB93405 04 00 | ||
349 | * | | ||
350 | * +-> FR450 ----> FR451 ----> MB93451 05 00 | ||
351 | * | | ||
352 | * +-> FR500 ----> FR501 --+-> MB93501 01 01 [2] | ||
353 | * | | | ||
354 | * | +-> MB93501/A 01 02 | ||
355 | * | | ||
356 | * +-> FR550 --+-> FR551 ----> MB93555 03 01 | ||
357 | * | ||
358 | * [1] The MB93401 is an obsolete CPU replaced by the MB93401A | ||
359 | * [2] The MB93501 is an obsolete CPU replaced by the MB93501A | ||
360 | * | ||
361 | * Imple is PSR(Processor Status Register)[31:28]. | ||
362 | * Vers is PSR(Processor Status Register)[27:24]. | ||
363 | * | ||
364 | * A "Silicon" consists of CPU core and some on-chip peripherals. | ||
365 | */ | ||
366 | static void __init determine_cpu(void) | ||
367 | { | ||
368 | unsigned long hsr0 = __get_HSR(0); | ||
369 | unsigned long psr = __get_PSR(); | ||
370 | |||
371 | /* work out what selectable services the CPU supports */ | ||
372 | __set_PSR(psr | PSR_EM | PSR_EF | PSR_CM | PSR_NEM); | ||
373 | cpu_psr_all = __get_PSR(); | ||
374 | __set_PSR(psr); | ||
375 | |||
376 | __set_HSR(0, hsr0 | HSR0_GRLE | HSR0_GRHE | HSR0_FRLE | HSR0_FRHE); | ||
377 | cpu_hsr0_all = __get_HSR(0); | ||
378 | __set_HSR(0, hsr0); | ||
379 | |||
380 | /* derive other service specs from the CPU type */ | ||
381 | cpu_series = "unknown"; | ||
382 | cpu_core = "unknown"; | ||
383 | cpu_silicon = "unknown"; | ||
384 | cpu_mmu = "Prot"; | ||
385 | cpu_system = __frv_unknown_system; | ||
386 | clock_cmodes = NULL; | ||
387 | clock_doubled = 0; | ||
388 | #ifdef CONFIG_PM | ||
389 | clock_bits_settable = CLOCK_BIT_CM_H | CLOCK_BIT_CM_M | CLOCK_BIT_P0; | ||
390 | #endif | ||
391 | |||
392 | switch (PSR_IMPLE(psr)) { | ||
393 | case PSR_IMPLE_FR401: | ||
394 | cpu_series = "fr400"; | ||
395 | cpu_core = "fr401"; | ||
396 | pdm_suspend_mode = HSR0_PDM_PLL_RUN; | ||
397 | |||
398 | switch (PSR_VERSION(psr)) { | ||
399 | case PSR_VERSION_FR401_MB93401: | ||
400 | cpu_silicon = "mb93401"; | ||
401 | cpu_system = __frv_mb93091_cb10; | ||
402 | clock_cmodes = clock_cmodes_fr401_fr403; | ||
403 | clock_doubled = 1; | ||
404 | break; | ||
405 | case PSR_VERSION_FR401_MB93401A: | ||
406 | cpu_silicon = "mb93401/A"; | ||
407 | cpu_system = __frv_mb93091_cb11; | ||
408 | clock_cmodes = clock_cmodes_fr401_fr403; | ||
409 | break; | ||
410 | case PSR_VERSION_FR401_MB93403: | ||
411 | cpu_silicon = "mb93403"; | ||
412 | #ifndef CONFIG_MB93093_PDK | ||
413 | cpu_system = __frv_mb93091_cb30; | ||
414 | #else | ||
415 | cpu_system = __frv_mb93093; | ||
416 | #endif | ||
417 | clock_cmodes = clock_cmodes_fr401_fr403; | ||
418 | break; | ||
419 | default: | ||
420 | break; | ||
421 | } | ||
422 | break; | ||
423 | |||
424 | case PSR_IMPLE_FR405: | ||
425 | cpu_series = "fr400"; | ||
426 | cpu_core = "fr405"; | ||
427 | pdm_suspend_mode = HSR0_PDM_PLL_STOP; | ||
428 | |||
429 | switch (PSR_VERSION(psr)) { | ||
430 | case PSR_VERSION_FR405_MB93405: | ||
431 | cpu_silicon = "mb93405"; | ||
432 | cpu_system = __frv_mb93091_cb60; | ||
433 | clock_cmodes = clock_cmodes_fr405; | ||
434 | #ifdef CONFIG_PM | ||
435 | clock_bits_settable |= CLOCK_BIT_CMODE; | ||
436 | clock_cmodes_permitted = CLOCK_CMODES_PERMITTED_FR405; | ||
437 | #endif | ||
438 | |||
439 | /* the FPGA on the CB70 has extra registers | ||
440 | * - it has 0x0046 in the VDK_ID FPGA register at 0x1a0, which is | ||
441 | * how we tell the difference between it and a CB60 | ||
442 | */ | ||
443 | if (*(volatile unsigned short *) 0xffc001a0 == 0x0046) | ||
444 | cpu_system = __frv_mb93091_cb70; | ||
445 | break; | ||
446 | default: | ||
447 | break; | ||
448 | } | ||
449 | break; | ||
450 | |||
451 | case PSR_IMPLE_FR451: | ||
452 | cpu_series = "fr450"; | ||
453 | cpu_core = "fr451"; | ||
454 | pdm_suspend_mode = HSR0_PDM_PLL_STOP; | ||
455 | #ifdef CONFIG_PM | ||
456 | clock_bits_settable |= CLOCK_BIT_CMODE; | ||
457 | clock_cmodes_permitted = CLOCK_CMODES_PERMITTED_FR405; | ||
458 | #endif | ||
459 | switch (PSR_VERSION(psr)) { | ||
460 | case PSR_VERSION_FR451_MB93451: | ||
461 | cpu_silicon = "mb93451"; | ||
462 | cpu_mmu = "Prot, SAT, xSAT, DAT"; | ||
463 | cpu_system = __frv_mb93091_cb451; | ||
464 | clock_cmodes = clock_cmodes_fr405; | ||
465 | break; | ||
466 | default: | ||
467 | break; | ||
468 | } | ||
469 | break; | ||
470 | |||
471 | case PSR_IMPLE_FR501: | ||
472 | cpu_series = "fr500"; | ||
473 | cpu_core = "fr501"; | ||
474 | pdm_suspend_mode = HSR0_PDM_PLL_STOP; | ||
475 | |||
476 | switch (PSR_VERSION(psr)) { | ||
477 | case PSR_VERSION_FR501_MB93501: cpu_silicon = "mb93501"; break; | ||
478 | case PSR_VERSION_FR501_MB93501A: cpu_silicon = "mb93501/A"; break; | ||
479 | default: | ||
480 | break; | ||
481 | } | ||
482 | break; | ||
483 | |||
484 | case PSR_IMPLE_FR551: | ||
485 | cpu_series = "fr550"; | ||
486 | cpu_core = "fr551"; | ||
487 | pdm_suspend_mode = HSR0_PDM_PLL_RUN; | ||
488 | |||
489 | switch (PSR_VERSION(psr)) { | ||
490 | case PSR_VERSION_FR551_MB93555: | ||
491 | cpu_silicon = "mb93555"; | ||
492 | cpu_mmu = "Prot, SAT"; | ||
493 | cpu_system = __frv_mb93091_cb41; | ||
494 | clock_cmodes = clock_cmodes_fr555; | ||
495 | clock_doubled = 1; | ||
496 | break; | ||
497 | default: | ||
498 | break; | ||
499 | } | ||
500 | break; | ||
501 | |||
502 | default: | ||
503 | break; | ||
504 | } | ||
505 | |||
506 | printk("- Series:%s CPU:%s Silicon:%s\n", | ||
507 | cpu_series, cpu_core, cpu_silicon); | ||
508 | |||
509 | #ifdef CONFIG_MB93091_VDK | ||
510 | detect_mb93091(); | ||
511 | #endif | ||
512 | |||
513 | #if defined(CONFIG_MB93093_PDK) && defined(CONFIG_FUJITSU_MB93493) | ||
514 | cpu_board2 = __frv_mb93493; | ||
515 | #endif | ||
516 | |||
517 | } /* end determine_cpu() */ | ||
518 | |||
519 | /*****************************************************************************/ | ||
520 | /* | ||
521 | * calculate the bus clock speed | ||
522 | */ | ||
523 | void __pminit determine_clocks(int verbose) | ||
524 | { | ||
525 | const struct clock_cmode *mode, *tmode; | ||
526 | unsigned long clkc, psr, quot; | ||
527 | |||
528 | clkc = __get_CLKC(); | ||
529 | psr = __get_PSR(); | ||
530 | |||
531 | clock_p0_current = !!(clkc & CLKC_P0); | ||
532 | clock_cm_current = clkc & CLKC_CM; | ||
533 | clock_cmode_current = (clkc & CLKC_CMODE) >> CLKC_CMODE_s; | ||
534 | |||
535 | if (verbose) | ||
536 | printk("psr=%08lx hsr0=%08lx clkc=%08lx\n", psr, __get_HSR(0), clkc); | ||
537 | |||
538 | /* the CB70 has some alternative ways of setting the clock speed through switches accessed | ||
539 | * through the FPGA. */ | ||
540 | if (cpu_system == __frv_mb93091_cb70) { | ||
541 | unsigned short clkswr = *(volatile unsigned short *) 0xffc00104UL & 0x1fffUL; | ||
542 | |||
543 | if (clkswr & 0x1000) | ||
544 | __clkin_clock_speed_HZ = 60000000UL; | ||
545 | else | ||
546 | __clkin_clock_speed_HZ = | ||
547 | ((clkswr >> 8) & 0xf) * 10000000 + | ||
548 | ((clkswr >> 4) & 0xf) * 1000000 + | ||
549 | ((clkswr ) & 0xf) * 100000; | ||
550 | } | ||
551 | /* the FR451 is currently fixed at 24MHz */ | ||
552 | else if (cpu_system == __frv_mb93091_cb451) { | ||
553 | //__clkin_clock_speed_HZ = 24000000UL; // CB451-FPGA | ||
554 | unsigned short clkswr = *(volatile unsigned short *) 0xffc00104UL & 0x1fffUL; | ||
555 | |||
556 | if (clkswr & 0x1000) | ||
557 | __clkin_clock_speed_HZ = 60000000UL; | ||
558 | else | ||
559 | __clkin_clock_speed_HZ = | ||
560 | ((clkswr >> 8) & 0xf) * 10000000 + | ||
561 | ((clkswr >> 4) & 0xf) * 1000000 + | ||
562 | ((clkswr ) & 0xf) * 100000; | ||
563 | } | ||
564 | /* otherwise determine the clockspeed from VDK or other registers */ | ||
565 | else { | ||
566 | __clkin_clock_speed_HZ = __get_CLKIN(); | ||
567 | } | ||
568 | |||
569 | /* look up the appropriate clock relationships table entry */ | ||
570 | mode = &undef_clock_cmode; | ||
571 | if (clock_cmodes) { | ||
572 | tmode = &clock_cmodes[(clkc & CLKC_CMODE) >> CLKC_CMODE_s]; | ||
573 | if (tmode->xbus) | ||
574 | mode = tmode; | ||
575 | } | ||
576 | |||
577 | #define CLOCK(SRC,RATIO) ((SRC) * (((RATIO) >> 4) & 0x0f) / ((RATIO) & 0x0f)) | ||
578 | |||
579 | if (clock_doubled) | ||
580 | __clkin_clock_speed_HZ <<= 1; | ||
581 | |||
582 | __ext_bus_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->xbus); | ||
583 | __sdram_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->sdram); | ||
584 | __dsu_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->dsu); | ||
585 | |||
586 | switch (clkc & CLKC_CM) { | ||
587 | case 0: /* High */ | ||
588 | __core_bus_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->corebus); | ||
589 | __core_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->core); | ||
590 | break; | ||
591 | case 1: /* Medium */ | ||
592 | __core_bus_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->sdram); | ||
593 | __core_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->sdram); | ||
594 | break; | ||
595 | case 2: /* Low; not supported */ | ||
596 | case 3: /* UNDEF */ | ||
597 | printk("Unsupported CLKC CM %ld\n", clkc & CLKC_CM); | ||
598 | panic("Bye"); | ||
599 | } | ||
600 | |||
601 | __res_bus_clock_speed_HZ = __ext_bus_clock_speed_HZ; | ||
602 | if (clkc & CLKC_P0) | ||
603 | __res_bus_clock_speed_HZ >>= 1; | ||
604 | |||
605 | if (verbose) { | ||
606 | printk("CLKIN: %lu.%3.3luMHz\n", | ||
607 | __clkin_clock_speed_HZ / 1000000, | ||
608 | (__clkin_clock_speed_HZ / 1000) % 1000); | ||
609 | |||
610 | printk("CLKS:" | ||
611 | " ext=%luMHz res=%luMHz sdram=%luMHz cbus=%luMHz core=%luMHz dsu=%luMHz\n", | ||
612 | __ext_bus_clock_speed_HZ / 1000000, | ||
613 | __res_bus_clock_speed_HZ / 1000000, | ||
614 | __sdram_clock_speed_HZ / 1000000, | ||
615 | __core_bus_clock_speed_HZ / 1000000, | ||
616 | __core_clock_speed_HZ / 1000000, | ||
617 | __dsu_clock_speed_HZ / 1000000 | ||
618 | ); | ||
619 | } | ||
620 | |||
621 | /* calculate the number of __delay() loop iterations per sec (2 insn loop) */ | ||
622 | __delay_loops_MHz = __core_clock_speed_HZ / (1000000 * 2); | ||
623 | |||
624 | /* set the serial prescaler */ | ||
625 | __serial_clock_speed_HZ = __res_bus_clock_speed_HZ; | ||
626 | quot = 1; | ||
627 | while (__serial_clock_speed_HZ / quot / 16 / 65536 > 3000) | ||
628 | quot += 1; | ||
629 | |||
630 | /* double the divisor if P0 is clear, so that if/when P0 is set, it's still achievable | ||
631 | * - we have to be careful - dividing too much can mean we can't get 115200 baud | ||
632 | */ | ||
633 | if (__serial_clock_speed_HZ > 32000000 && !(clkc & CLKC_P0)) | ||
634 | quot <<= 1; | ||
635 | |||
636 | __serial_clock_speed_HZ /= quot; | ||
637 | __frv_uart0.uartclk = __serial_clock_speed_HZ; | ||
638 | __frv_uart1.uartclk = __serial_clock_speed_HZ; | ||
639 | |||
640 | if (verbose) | ||
641 | printk(" uart=%luMHz\n", __serial_clock_speed_HZ / 1000000 * quot); | ||
642 | |||
643 | while (!(__get_UART0_LSR() & UART_LSR_TEMT)) | ||
644 | continue; | ||
645 | |||
646 | while (!(__get_UART1_LSR() & UART_LSR_TEMT)) | ||
647 | continue; | ||
648 | |||
649 | __set_UCPVR(quot); | ||
650 | __set_UCPSR(0); | ||
651 | } /* end determine_clocks() */ | ||
652 | |||
653 | /*****************************************************************************/ | ||
654 | /* | ||
655 | * reserve some DMA consistent memory | ||
656 | */ | ||
657 | #ifdef CONFIG_RESERVE_DMA_COHERENT | ||
658 | static void __init reserve_dma_coherent(void) | ||
659 | { | ||
660 | unsigned long ampr; | ||
661 | |||
662 | /* find the first non-kernel memory tile and steal it */ | ||
663 | #define __steal_AMPR(r) \ | ||
664 | if (__get_DAMPR(r) & xAMPRx_V) { \ | ||
665 | ampr = __get_DAMPR(r); \ | ||
666 | __set_DAMPR(r, ampr | xAMPRx_S | xAMPRx_C); \ | ||
667 | __set_IAMPR(r, 0); \ | ||
668 | goto found; \ | ||
669 | } | ||
670 | |||
671 | __steal_AMPR(1); | ||
672 | __steal_AMPR(2); | ||
673 | __steal_AMPR(3); | ||
674 | __steal_AMPR(4); | ||
675 | __steal_AMPR(5); | ||
676 | __steal_AMPR(6); | ||
677 | |||
678 | if (PSR_IMPLE(__get_PSR()) == PSR_IMPLE_FR551) { | ||
679 | __steal_AMPR(7); | ||
680 | __steal_AMPR(8); | ||
681 | __steal_AMPR(9); | ||
682 | __steal_AMPR(10); | ||
683 | __steal_AMPR(11); | ||
684 | __steal_AMPR(12); | ||
685 | __steal_AMPR(13); | ||
686 | __steal_AMPR(14); | ||
687 | } | ||
688 | |||
689 | /* unable to grant any DMA consistent memory */ | ||
690 | printk("No DMA consistent memory reserved\n"); | ||
691 | return; | ||
692 | |||
693 | found: | ||
694 | dma_coherent_mem_start = ampr & xAMPRx_PPFN; | ||
695 | ampr &= xAMPRx_SS; | ||
696 | ampr >>= 4; | ||
697 | ampr = 1 << (ampr - 3 + 20); | ||
698 | dma_coherent_mem_end = dma_coherent_mem_start + ampr; | ||
699 | |||
700 | printk("DMA consistent memory reserved %lx-%lx\n", | ||
701 | dma_coherent_mem_start, dma_coherent_mem_end); | ||
702 | |||
703 | } /* end reserve_dma_coherent() */ | ||
704 | #endif | ||
705 | |||
706 | /*****************************************************************************/ | ||
707 | /* | ||
708 | * calibrate the delay loop | ||
709 | */ | ||
710 | void calibrate_delay(void) | ||
711 | { | ||
712 | loops_per_jiffy = __delay_loops_MHz * (1000000 / HZ); | ||
713 | |||
714 | printk("Calibrating delay loop... %lu.%02lu BogoMIPS\n", | ||
715 | loops_per_jiffy / (500000 / HZ), | ||
716 | (loops_per_jiffy / (5000 / HZ)) % 100); | ||
717 | |||
718 | } /* end calibrate_delay() */ | ||
719 | |||
720 | /*****************************************************************************/ | ||
721 | /* | ||
722 | * look through the command line for some things we need to know immediately | ||
723 | */ | ||
724 | static void __init parse_cmdline_early(char *cmdline) | ||
725 | { | ||
726 | if (!cmdline) | ||
727 | return; | ||
728 | |||
729 | while (*cmdline) { | ||
730 | if (*cmdline == ' ') | ||
731 | cmdline++; | ||
732 | |||
733 | /* "mem=XXX[kKmM]" sets SDRAM size to <mem>, overriding the value we worked | ||
734 | * out from the SDRAM controller mask register | ||
735 | */ | ||
736 | if (!strncmp(cmdline, "mem=", 4)) { | ||
737 | unsigned long long mem_size; | ||
738 | |||
739 | mem_size = memparse(cmdline + 4, &cmdline); | ||
740 | memory_end = memory_start + mem_size; | ||
741 | } | ||
742 | |||
743 | while (*cmdline && *cmdline != ' ') | ||
744 | cmdline++; | ||
745 | } | ||
746 | |||
747 | } /* end parse_cmdline_early() */ | ||
748 | |||
749 | /*****************************************************************************/ | ||
750 | /* | ||
751 | * | ||
752 | */ | ||
753 | void __init setup_arch(char **cmdline_p) | ||
754 | { | ||
755 | #ifdef CONFIG_MMU | ||
756 | printk("Linux FR-V port done by Red Hat Inc <dhowells@redhat.com>\n"); | ||
757 | #else | ||
758 | printk("uClinux FR-V port done by Red Hat Inc <dhowells@redhat.com>\n"); | ||
759 | #endif | ||
760 | |||
761 | memcpy(boot_command_line, redboot_command_line, COMMAND_LINE_SIZE); | ||
762 | |||
763 | determine_cpu(); | ||
764 | determine_clocks(1); | ||
765 | |||
766 | /* For printk-directly-beats-on-serial-hardware hack */ | ||
767 | console_set_baud(115200); | ||
768 | #ifdef CONFIG_GDBSTUB | ||
769 | gdbstub_set_baud(115200); | ||
770 | #endif | ||
771 | |||
772 | #ifdef CONFIG_RESERVE_DMA_COHERENT | ||
773 | reserve_dma_coherent(); | ||
774 | #endif | ||
775 | dump_memory_map(); | ||
776 | |||
777 | #ifdef CONFIG_MB93090_MB00 | ||
778 | if (mb93090_mb00_detected) | ||
779 | mb93090_display(); | ||
780 | #endif | ||
781 | |||
782 | /* register those serial ports that are available */ | ||
783 | #ifdef CONFIG_FRV_ONCPU_SERIAL | ||
784 | #ifndef CONFIG_GDBSTUB_UART0 | ||
785 | __reg(UART0_BASE + UART_IER * 8) = 0; | ||
786 | early_serial_setup(&__frv_uart0); | ||
787 | #endif | ||
788 | #ifndef CONFIG_GDBSTUB_UART1 | ||
789 | __reg(UART1_BASE + UART_IER * 8) = 0; | ||
790 | early_serial_setup(&__frv_uart1); | ||
791 | #endif | ||
792 | #endif | ||
793 | |||
794 | /* deal with the command line - RedBoot may have passed one to the kernel */ | ||
795 | memcpy(command_line, boot_command_line, sizeof(command_line)); | ||
796 | *cmdline_p = &command_line[0]; | ||
797 | parse_cmdline_early(command_line); | ||
798 | |||
799 | /* set up the memory description | ||
800 | * - by now the stack is part of the init task */ | ||
801 | printk("Memory %08lx-%08lx\n", memory_start, memory_end); | ||
802 | |||
803 | BUG_ON(memory_start == memory_end); | ||
804 | |||
805 | init_mm.start_code = (unsigned long) _stext; | ||
806 | init_mm.end_code = (unsigned long) _etext; | ||
807 | init_mm.end_data = (unsigned long) _edata; | ||
808 | #if 0 /* DAVIDM - don't set brk just incase someone decides to use it */ | ||
809 | init_mm.brk = (unsigned long) &_end; | ||
810 | #else | ||
811 | init_mm.brk = (unsigned long) 0; | ||
812 | #endif | ||
813 | |||
814 | #ifdef DEBUG | ||
815 | printk("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n", | ||
816 | _stext, _etext, _sdata, _edata, __bss_start, __bss_stop); | ||
817 | #endif | ||
818 | |||
819 | #ifdef CONFIG_VT | ||
820 | #if defined(CONFIG_VGA_CONSOLE) | ||
821 | conswitchp = &vga_con; | ||
822 | #elif defined(CONFIG_DUMMY_CONSOLE) | ||
823 | conswitchp = &dummy_con; | ||
824 | #endif | ||
825 | #endif | ||
826 | |||
827 | #ifdef CONFIG_MMU | ||
828 | setup_linux_memory(); | ||
829 | #else | ||
830 | setup_uclinux_memory(); | ||
831 | #endif | ||
832 | |||
833 | /* get kmalloc into gear */ | ||
834 | paging_init(); | ||
835 | |||
836 | /* init DMA */ | ||
837 | frv_dma_init(); | ||
838 | #ifdef DEBUG | ||
839 | printk("Done setup_arch\n"); | ||
840 | #endif | ||
841 | |||
842 | /* start the decrement timer running */ | ||
843 | // asm volatile("movgs %0,timerd" :: "r"(10000000)); | ||
844 | // __set_HSR(0, __get_HSR(0) | HSR0_ETMD); | ||
845 | |||
846 | } /* end setup_arch() */ | ||
847 | |||
848 | #if 0 | ||
849 | /*****************************************************************************/ | ||
850 | /* | ||
851 | * | ||
852 | */ | ||
853 | static int setup_arch_serial(void) | ||
854 | { | ||
855 | /* register those serial ports that are available */ | ||
856 | #ifndef CONFIG_GDBSTUB_UART0 | ||
857 | early_serial_setup(&__frv_uart0); | ||
858 | #endif | ||
859 | #ifndef CONFIG_GDBSTUB_UART1 | ||
860 | early_serial_setup(&__frv_uart1); | ||
861 | #endif | ||
862 | |||
863 | return 0; | ||
864 | } /* end setup_arch_serial() */ | ||
865 | |||
866 | late_initcall(setup_arch_serial); | ||
867 | #endif | ||
868 | |||
869 | /*****************************************************************************/ | ||
870 | /* | ||
871 | * set up the memory map for normal MMU linux | ||
872 | */ | ||
873 | #ifdef CONFIG_MMU | ||
874 | static void __init setup_linux_memory(void) | ||
875 | { | ||
876 | unsigned long bootmap_size, low_top_pfn, kstart, kend, high_mem; | ||
877 | unsigned long physpages; | ||
878 | |||
879 | kstart = (unsigned long) &__kernel_image_start - PAGE_OFFSET; | ||
880 | kend = (unsigned long) &__kernel_image_end - PAGE_OFFSET; | ||
881 | |||
882 | kstart = kstart & PAGE_MASK; | ||
883 | kend = (kend + PAGE_SIZE - 1) & PAGE_MASK; | ||
884 | |||
885 | /* give all the memory to the bootmap allocator, tell it to put the | ||
886 | * boot mem_map immediately following the kernel image | ||
887 | */ | ||
888 | bootmap_size = init_bootmem_node(NODE_DATA(0), | ||
889 | kend >> PAGE_SHIFT, /* map addr */ | ||
890 | memory_start >> PAGE_SHIFT, /* start of RAM */ | ||
891 | memory_end >> PAGE_SHIFT /* end of RAM */ | ||
892 | ); | ||
893 | |||
894 | /* pass the memory that the kernel can immediately use over to the bootmem allocator */ | ||
895 | max_mapnr = physpages = (memory_end - memory_start) >> PAGE_SHIFT; | ||
896 | low_top_pfn = (KERNEL_LOWMEM_END - KERNEL_LOWMEM_START) >> PAGE_SHIFT; | ||
897 | high_mem = 0; | ||
898 | |||
899 | if (physpages > low_top_pfn) { | ||
900 | #ifdef CONFIG_HIGHMEM | ||
901 | high_mem = physpages - low_top_pfn; | ||
902 | #else | ||
903 | max_mapnr = physpages = low_top_pfn; | ||
904 | #endif | ||
905 | } | ||
906 | else { | ||
907 | low_top_pfn = physpages; | ||
908 | } | ||
909 | |||
910 | min_low_pfn = memory_start >> PAGE_SHIFT; | ||
911 | max_low_pfn = low_top_pfn; | ||
912 | max_pfn = memory_end >> PAGE_SHIFT; | ||
913 | |||
914 | num_mappedpages = low_top_pfn; | ||
915 | |||
916 | printk(KERN_NOTICE "%ldMB LOWMEM available.\n", low_top_pfn >> (20 - PAGE_SHIFT)); | ||
917 | |||
918 | free_bootmem(memory_start, low_top_pfn << PAGE_SHIFT); | ||
919 | |||
920 | #ifdef CONFIG_HIGHMEM | ||
921 | if (high_mem) | ||
922 | printk(KERN_NOTICE "%ldMB HIGHMEM available.\n", high_mem >> (20 - PAGE_SHIFT)); | ||
923 | #endif | ||
924 | |||
925 | /* take back the memory occupied by the kernel image and the bootmem alloc map */ | ||
926 | reserve_bootmem(kstart, kend - kstart + bootmap_size, | ||
927 | BOOTMEM_DEFAULT); | ||
928 | |||
929 | /* reserve the memory occupied by the initial ramdisk */ | ||
930 | #ifdef CONFIG_BLK_DEV_INITRD | ||
931 | if (LOADER_TYPE && INITRD_START) { | ||
932 | if (INITRD_START + INITRD_SIZE <= (low_top_pfn << PAGE_SHIFT)) { | ||
933 | reserve_bootmem(INITRD_START, INITRD_SIZE, | ||
934 | BOOTMEM_DEFAULT); | ||
935 | initrd_start = INITRD_START + PAGE_OFFSET; | ||
936 | initrd_end = initrd_start + INITRD_SIZE; | ||
937 | } | ||
938 | else { | ||
939 | printk(KERN_ERR | ||
940 | "initrd extends beyond end of memory (0x%08lx > 0x%08lx)\n" | ||
941 | "disabling initrd\n", | ||
942 | INITRD_START + INITRD_SIZE, | ||
943 | low_top_pfn << PAGE_SHIFT); | ||
944 | initrd_start = 0; | ||
945 | } | ||
946 | } | ||
947 | #endif | ||
948 | |||
949 | } /* end setup_linux_memory() */ | ||
950 | #endif | ||
951 | |||
952 | /*****************************************************************************/ | ||
953 | /* | ||
954 | * set up the memory map for uClinux | ||
955 | */ | ||
956 | #ifndef CONFIG_MMU | ||
957 | static void __init setup_uclinux_memory(void) | ||
958 | { | ||
959 | #ifdef CONFIG_PROTECT_KERNEL | ||
960 | unsigned long dampr; | ||
961 | #endif | ||
962 | unsigned long kend; | ||
963 | int bootmap_size; | ||
964 | |||
965 | kend = (unsigned long) &__kernel_image_end; | ||
966 | kend = (kend + PAGE_SIZE - 1) & PAGE_MASK; | ||
967 | |||
968 | /* give all the memory to the bootmap allocator, tell it to put the | ||
969 | * boot mem_map immediately following the kernel image | ||
970 | */ | ||
971 | bootmap_size = init_bootmem_node(NODE_DATA(0), | ||
972 | kend >> PAGE_SHIFT, /* map addr */ | ||
973 | memory_start >> PAGE_SHIFT, /* start of RAM */ | ||
974 | memory_end >> PAGE_SHIFT /* end of RAM */ | ||
975 | ); | ||
976 | |||
977 | /* free all the usable memory */ | ||
978 | free_bootmem(memory_start, memory_end - memory_start); | ||
979 | |||
980 | high_memory = (void *) (memory_end & PAGE_MASK); | ||
981 | max_mapnr = ((unsigned long) high_memory - PAGE_OFFSET) >> PAGE_SHIFT; | ||
982 | |||
983 | min_low_pfn = memory_start >> PAGE_SHIFT; | ||
984 | max_low_pfn = memory_end >> PAGE_SHIFT; | ||
985 | max_pfn = max_low_pfn; | ||
986 | |||
987 | /* now take back the bits the core kernel is occupying */ | ||
988 | #ifndef CONFIG_PROTECT_KERNEL | ||
989 | reserve_bootmem(kend, bootmap_size, BOOTMEM_DEFAULT); | ||
990 | reserve_bootmem((unsigned long) &__kernel_image_start, | ||
991 | kend - (unsigned long) &__kernel_image_start, | ||
992 | BOOTMEM_DEFAULT); | ||
993 | |||
994 | #else | ||
995 | dampr = __get_DAMPR(0); | ||
996 | dampr &= xAMPRx_SS; | ||
997 | dampr = (dampr >> 4) + 17; | ||
998 | dampr = 1 << dampr; | ||
999 | |||
1000 | reserve_bootmem(__get_DAMPR(0) & xAMPRx_PPFN, dampr, BOOTMEM_DEFAULT); | ||
1001 | #endif | ||
1002 | |||
1003 | /* reserve some memory to do uncached DMA through if requested */ | ||
1004 | #ifdef CONFIG_RESERVE_DMA_COHERENT | ||
1005 | if (dma_coherent_mem_start) | ||
1006 | reserve_bootmem(dma_coherent_mem_start, | ||
1007 | dma_coherent_mem_end - dma_coherent_mem_start, | ||
1008 | BOOTMEM_DEFAULT); | ||
1009 | #endif | ||
1010 | |||
1011 | } /* end setup_uclinux_memory() */ | ||
1012 | #endif | ||
1013 | |||
1014 | /*****************************************************************************/ | ||
1015 | /* | ||
1016 | * get CPU information for use by procfs | ||
1017 | */ | ||
1018 | static int show_cpuinfo(struct seq_file *m, void *v) | ||
1019 | { | ||
1020 | const char *gr, *fr, *fm, *fp, *cm, *nem, *ble; | ||
1021 | #ifdef CONFIG_PM | ||
1022 | const char *sep; | ||
1023 | #endif | ||
1024 | |||
1025 | gr = cpu_hsr0_all & HSR0_GRHE ? "gr0-63" : "gr0-31"; | ||
1026 | fr = cpu_hsr0_all & HSR0_FRHE ? "fr0-63" : "fr0-31"; | ||
1027 | fm = cpu_psr_all & PSR_EM ? ", Media" : ""; | ||
1028 | fp = cpu_psr_all & PSR_EF ? ", FPU" : ""; | ||
1029 | cm = cpu_psr_all & PSR_CM ? ", CCCR" : ""; | ||
1030 | nem = cpu_psr_all & PSR_NEM ? ", NE" : ""; | ||
1031 | ble = cpu_psr_all & PSR_BE ? "BE" : "LE"; | ||
1032 | |||
1033 | seq_printf(m, | ||
1034 | "CPU-Series:\t%s\n" | ||
1035 | "CPU-Core:\t%s, %s, %s%s%s\n" | ||
1036 | "CPU:\t\t%s\n" | ||
1037 | "MMU:\t\t%s\n" | ||
1038 | "FP-Media:\t%s%s%s\n" | ||
1039 | "System:\t\t%s", | ||
1040 | cpu_series, | ||
1041 | cpu_core, gr, ble, cm, nem, | ||
1042 | cpu_silicon, | ||
1043 | cpu_mmu, | ||
1044 | fr, fm, fp, | ||
1045 | cpu_system); | ||
1046 | |||
1047 | if (cpu_board1) | ||
1048 | seq_printf(m, ", %s", cpu_board1); | ||
1049 | |||
1050 | if (cpu_board2) | ||
1051 | seq_printf(m, ", %s", cpu_board2); | ||
1052 | |||
1053 | seq_printf(m, "\n"); | ||
1054 | |||
1055 | #ifdef CONFIG_PM | ||
1056 | seq_printf(m, "PM-Controls:"); | ||
1057 | sep = "\t"; | ||
1058 | |||
1059 | if (clock_bits_settable & CLOCK_BIT_CMODE) { | ||
1060 | seq_printf(m, "%scmode=0x%04hx", sep, clock_cmodes_permitted); | ||
1061 | sep = ", "; | ||
1062 | } | ||
1063 | |||
1064 | if (clock_bits_settable & CLOCK_BIT_CM) { | ||
1065 | seq_printf(m, "%scm=0x%lx", sep, clock_bits_settable & CLOCK_BIT_CM); | ||
1066 | sep = ", "; | ||
1067 | } | ||
1068 | |||
1069 | if (clock_bits_settable & CLOCK_BIT_P0) { | ||
1070 | seq_printf(m, "%sp0=0x3", sep); | ||
1071 | sep = ", "; | ||
1072 | } | ||
1073 | |||
1074 | seq_printf(m, "%ssuspend=0x22\n", sep); | ||
1075 | #endif | ||
1076 | |||
1077 | seq_printf(m, | ||
1078 | "PM-Status:\tcmode=%d, cm=%d, p0=%d\n", | ||
1079 | clock_cmode_current, clock_cm_current, clock_p0_current); | ||
1080 | |||
1081 | #define print_clk(TAG, VAR) \ | ||
1082 | seq_printf(m, "Clock-" TAG ":\t%lu.%2.2lu MHz\n", VAR / 1000000, (VAR / 10000) % 100) | ||
1083 | |||
1084 | print_clk("In", __clkin_clock_speed_HZ); | ||
1085 | print_clk("Core", __core_clock_speed_HZ); | ||
1086 | print_clk("SDRAM", __sdram_clock_speed_HZ); | ||
1087 | print_clk("CBus", __core_bus_clock_speed_HZ); | ||
1088 | print_clk("Res", __res_bus_clock_speed_HZ); | ||
1089 | print_clk("Ext", __ext_bus_clock_speed_HZ); | ||
1090 | print_clk("DSU", __dsu_clock_speed_HZ); | ||
1091 | |||
1092 | seq_printf(m, | ||
1093 | "BogoMips:\t%lu.%02lu\n", | ||
1094 | (loops_per_jiffy * HZ) / 500000, ((loops_per_jiffy * HZ) / 5000) % 100); | ||
1095 | |||
1096 | return 0; | ||
1097 | } /* end show_cpuinfo() */ | ||
1098 | |||
1099 | static void *c_start(struct seq_file *m, loff_t *pos) | ||
1100 | { | ||
1101 | return *pos < NR_CPUS ? (void *) 0x12345678 : NULL; | ||
1102 | } | ||
1103 | |||
1104 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | ||
1105 | { | ||
1106 | ++*pos; | ||
1107 | return c_start(m, pos); | ||
1108 | } | ||
1109 | |||
1110 | static void c_stop(struct seq_file *m, void *v) | ||
1111 | { | ||
1112 | } | ||
1113 | |||
1114 | const struct seq_operations cpuinfo_op = { | ||
1115 | .start = c_start, | ||
1116 | .next = c_next, | ||
1117 | .stop = c_stop, | ||
1118 | .show = show_cpuinfo, | ||
1119 | }; | ||
1120 | |||
1121 | void arch_gettod(int *year, int *mon, int *day, int *hour, | ||
1122 | int *min, int *sec) | ||
1123 | { | ||
1124 | *year = *mon = *day = *hour = *min = *sec = 0; | ||
1125 | } | ||
1126 | |||
1127 | /*****************************************************************************/ | ||
1128 | /* | ||
1129 | * | ||
1130 | */ | ||
1131 | #ifdef CONFIG_MB93090_MB00 | ||
1132 | static void __init mb93090_sendlcdcmd(uint32_t cmd) | ||
1133 | { | ||
1134 | unsigned long base = __addr_LCD(); | ||
1135 | int loop; | ||
1136 | |||
1137 | /* request reading of the busy flag */ | ||
1138 | __set_LCD(base, LCD_CMD_READ_BUSY); | ||
1139 | __set_LCD(base, LCD_CMD_READ_BUSY & ~LCD_E); | ||
1140 | |||
1141 | /* wait for the busy flag to become clear */ | ||
1142 | for (loop = 10000; loop > 0; loop--) | ||
1143 | if (!(__get_LCD(base) & 0x80)) | ||
1144 | break; | ||
1145 | |||
1146 | /* send the command */ | ||
1147 | __set_LCD(base, cmd); | ||
1148 | __set_LCD(base, cmd & ~LCD_E); | ||
1149 | |||
1150 | } /* end mb93090_sendlcdcmd() */ | ||
1151 | |||
1152 | /*****************************************************************************/ | ||
1153 | /* | ||
1154 | * write to the MB93090 LEDs and LCD | ||
1155 | */ | ||
1156 | static void __init mb93090_display(void) | ||
1157 | { | ||
1158 | const char *p; | ||
1159 | |||
1160 | __set_LEDS(0); | ||
1161 | |||
1162 | /* set up the LCD */ | ||
1163 | mb93090_sendlcdcmd(LCD_CMD_CLEAR); | ||
1164 | mb93090_sendlcdcmd(LCD_CMD_FUNCSET(1,1,0)); | ||
1165 | mb93090_sendlcdcmd(LCD_CMD_ON(0,0)); | ||
1166 | mb93090_sendlcdcmd(LCD_CMD_HOME); | ||
1167 | |||
1168 | mb93090_sendlcdcmd(LCD_CMD_SET_DD_ADDR(0)); | ||
1169 | for (p = mb93090_banner; *p; p++) | ||
1170 | mb93090_sendlcdcmd(LCD_DATA_WRITE(*p)); | ||
1171 | |||
1172 | mb93090_sendlcdcmd(LCD_CMD_SET_DD_ADDR(64)); | ||
1173 | for (p = mb93090_version; *p; p++) | ||
1174 | mb93090_sendlcdcmd(LCD_DATA_WRITE(*p)); | ||
1175 | |||
1176 | } /* end mb93090_display() */ | ||
1177 | |||
1178 | #endif // CONFIG_MB93090_MB00 | ||
diff --git a/arch/frv/kernel/signal.c b/arch/frv/kernel/signal.c deleted file mode 100644 index bf6e07a7a1b1..000000000000 --- a/arch/frv/kernel/signal.c +++ /dev/null | |||
@@ -1,426 +0,0 @@ | |||
1 | /* signal.c: FRV specific bits of signal handling | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/m68k/kernel/signal.c | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/sched.h> | ||
14 | #include <linux/mm.h> | ||
15 | #include <linux/smp.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/signal.h> | ||
18 | #include <linux/errno.h> | ||
19 | #include <linux/wait.h> | ||
20 | #include <linux/ptrace.h> | ||
21 | #include <linux/unistd.h> | ||
22 | #include <linux/personality.h> | ||
23 | #include <linux/tracehook.h> | ||
24 | #include <asm/ucontext.h> | ||
25 | #include <linux/uaccess.h> | ||
26 | #include <asm/cacheflush.h> | ||
27 | |||
28 | #define DEBUG_SIG 0 | ||
29 | |||
30 | struct fdpic_func_descriptor { | ||
31 | unsigned long text; | ||
32 | unsigned long GOT; | ||
33 | }; | ||
34 | |||
35 | /* | ||
36 | * Do a signal return; undo the signal stack. | ||
37 | */ | ||
38 | |||
39 | struct sigframe | ||
40 | { | ||
41 | __sigrestore_t pretcode; | ||
42 | int sig; | ||
43 | struct sigcontext sc; | ||
44 | unsigned long extramask[_NSIG_WORDS-1]; | ||
45 | uint32_t retcode[2]; | ||
46 | }; | ||
47 | |||
48 | struct rt_sigframe | ||
49 | { | ||
50 | __sigrestore_t pretcode; | ||
51 | int sig; | ||
52 | struct siginfo __user *pinfo; | ||
53 | void __user *puc; | ||
54 | struct siginfo info; | ||
55 | struct ucontext uc; | ||
56 | uint32_t retcode[2]; | ||
57 | }; | ||
58 | |||
59 | static int restore_sigcontext(struct sigcontext __user *sc, int *_gr8) | ||
60 | { | ||
61 | struct user_context *user = current->thread.user; | ||
62 | unsigned long tbr, psr; | ||
63 | |||
64 | /* Always make any pending restarted system calls return -EINTR */ | ||
65 | current->restart_block.fn = do_no_restart_syscall; | ||
66 | |||
67 | tbr = user->i.tbr; | ||
68 | psr = user->i.psr; | ||
69 | if (copy_from_user(user, &sc->sc_context, sizeof(sc->sc_context))) | ||
70 | goto badframe; | ||
71 | user->i.tbr = tbr; | ||
72 | user->i.psr = psr; | ||
73 | |||
74 | restore_user_regs(user); | ||
75 | |||
76 | user->i.syscallno = -1; /* disable syscall checks */ | ||
77 | |||
78 | *_gr8 = user->i.gr[8]; | ||
79 | return 0; | ||
80 | |||
81 | badframe: | ||
82 | return 1; | ||
83 | } | ||
84 | |||
85 | asmlinkage int sys_sigreturn(void) | ||
86 | { | ||
87 | struct sigframe __user *frame = (struct sigframe __user *) __frame->sp; | ||
88 | sigset_t set; | ||
89 | int gr8; | ||
90 | |||
91 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
92 | goto badframe; | ||
93 | if (__get_user(set.sig[0], &frame->sc.sc_oldmask)) | ||
94 | goto badframe; | ||
95 | |||
96 | if (_NSIG_WORDS > 1 && | ||
97 | __copy_from_user(&set.sig[1], &frame->extramask, sizeof(frame->extramask))) | ||
98 | goto badframe; | ||
99 | |||
100 | set_current_blocked(&set); | ||
101 | |||
102 | if (restore_sigcontext(&frame->sc, &gr8)) | ||
103 | goto badframe; | ||
104 | return gr8; | ||
105 | |||
106 | badframe: | ||
107 | force_sig(SIGSEGV, current); | ||
108 | return 0; | ||
109 | } | ||
110 | |||
111 | asmlinkage int sys_rt_sigreturn(void) | ||
112 | { | ||
113 | struct rt_sigframe __user *frame = (struct rt_sigframe __user *) __frame->sp; | ||
114 | sigset_t set; | ||
115 | int gr8; | ||
116 | |||
117 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
118 | goto badframe; | ||
119 | if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) | ||
120 | goto badframe; | ||
121 | |||
122 | set_current_blocked(&set); | ||
123 | |||
124 | if (restore_sigcontext(&frame->uc.uc_mcontext, &gr8)) | ||
125 | goto badframe; | ||
126 | |||
127 | if (restore_altstack(&frame->uc.uc_stack)) | ||
128 | goto badframe; | ||
129 | |||
130 | return gr8; | ||
131 | |||
132 | badframe: | ||
133 | force_sig(SIGSEGV, current); | ||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | /* | ||
138 | * Set up a signal frame | ||
139 | */ | ||
140 | static int setup_sigcontext(struct sigcontext __user *sc, unsigned long mask) | ||
141 | { | ||
142 | save_user_regs(current->thread.user); | ||
143 | |||
144 | if (copy_to_user(&sc->sc_context, current->thread.user, sizeof(sc->sc_context)) != 0) | ||
145 | goto badframe; | ||
146 | |||
147 | /* non-iBCS2 extensions.. */ | ||
148 | if (__put_user(mask, &sc->sc_oldmask) < 0) | ||
149 | goto badframe; | ||
150 | |||
151 | return 0; | ||
152 | |||
153 | badframe: | ||
154 | return 1; | ||
155 | } | ||
156 | |||
157 | /*****************************************************************************/ | ||
158 | /* | ||
159 | * Determine which stack to use.. | ||
160 | */ | ||
161 | static inline void __user *get_sigframe(struct ksignal *ksig, | ||
162 | size_t frame_size) | ||
163 | { | ||
164 | unsigned long sp = sigsp(__frame->sp, ksig); | ||
165 | |||
166 | return (void __user *) ((sp - frame_size) & ~7UL); | ||
167 | |||
168 | } /* end get_sigframe() */ | ||
169 | |||
170 | /*****************************************************************************/ | ||
171 | /* | ||
172 | * | ||
173 | */ | ||
174 | static int setup_frame(struct ksignal *ksig, sigset_t *set) | ||
175 | { | ||
176 | struct sigframe __user *frame; | ||
177 | int sig = ksig->sig; | ||
178 | |||
179 | frame = get_sigframe(ksig, sizeof(*frame)); | ||
180 | |||
181 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | ||
182 | return -EFAULT; | ||
183 | |||
184 | if (__put_user(sig, &frame->sig) < 0) | ||
185 | return -EFAULT; | ||
186 | |||
187 | if (setup_sigcontext(&frame->sc, set->sig[0])) | ||
188 | return -EFAULT; | ||
189 | |||
190 | if (_NSIG_WORDS > 1) { | ||
191 | if (__copy_to_user(frame->extramask, &set->sig[1], | ||
192 | sizeof(frame->extramask))) | ||
193 | return -EFAULT; | ||
194 | } | ||
195 | |||
196 | /* Set up to return from userspace. If provided, use a stub | ||
197 | * already in userspace. */ | ||
198 | if (ksig->ka.sa.sa_flags & SA_RESTORER) { | ||
199 | if (__put_user(ksig->ka.sa.sa_restorer, &frame->pretcode) < 0) | ||
200 | return -EFAULT; | ||
201 | } | ||
202 | else { | ||
203 | /* Set up the following code on the stack: | ||
204 | * setlos #__NR_sigreturn,gr7 | ||
205 | * tira gr0,0 | ||
206 | */ | ||
207 | if (__put_user((__sigrestore_t)frame->retcode, &frame->pretcode) || | ||
208 | __put_user(0x8efc0000|__NR_sigreturn, &frame->retcode[0]) || | ||
209 | __put_user(0xc0700000, &frame->retcode[1])) | ||
210 | return -EFAULT; | ||
211 | |||
212 | flush_icache_range((unsigned long) frame->retcode, | ||
213 | (unsigned long) (frame->retcode + 2)); | ||
214 | } | ||
215 | |||
216 | /* Set up registers for the signal handler */ | ||
217 | if (current->personality & FDPIC_FUNCPTRS) { | ||
218 | struct fdpic_func_descriptor __user *funcptr = | ||
219 | (struct fdpic_func_descriptor __user *) ksig->ka.sa.sa_handler; | ||
220 | struct fdpic_func_descriptor desc; | ||
221 | if (copy_from_user(&desc, funcptr, sizeof(desc))) | ||
222 | return -EFAULT; | ||
223 | __frame->pc = desc.text; | ||
224 | __frame->gr15 = desc.GOT; | ||
225 | } else { | ||
226 | __frame->pc = (unsigned long) ksig->ka.sa.sa_handler; | ||
227 | __frame->gr15 = 0; | ||
228 | } | ||
229 | |||
230 | __frame->sp = (unsigned long) frame; | ||
231 | __frame->lr = (unsigned long) &frame->retcode; | ||
232 | __frame->gr8 = sig; | ||
233 | |||
234 | #if DEBUG_SIG | ||
235 | printk("SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n", | ||
236 | sig, current->comm, current->pid, frame, __frame->pc, | ||
237 | frame->pretcode); | ||
238 | #endif | ||
239 | |||
240 | return 0; | ||
241 | } /* end setup_frame() */ | ||
242 | |||
243 | /*****************************************************************************/ | ||
244 | /* | ||
245 | * | ||
246 | */ | ||
247 | static int setup_rt_frame(struct ksignal *ksig, sigset_t *set) | ||
248 | { | ||
249 | struct rt_sigframe __user *frame; | ||
250 | int sig = ksig->sig; | ||
251 | |||
252 | frame = get_sigframe(ksig, sizeof(*frame)); | ||
253 | |||
254 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | ||
255 | return -EFAULT; | ||
256 | |||
257 | if (__put_user(sig, &frame->sig) || | ||
258 | __put_user(&frame->info, &frame->pinfo) || | ||
259 | __put_user(&frame->uc, &frame->puc)) | ||
260 | return -EFAULT; | ||
261 | |||
262 | if (copy_siginfo_to_user(&frame->info, &ksig->info)) | ||
263 | return -EFAULT; | ||
264 | |||
265 | /* Create the ucontext. */ | ||
266 | if (__put_user(0, &frame->uc.uc_flags) || | ||
267 | __put_user(NULL, &frame->uc.uc_link) || | ||
268 | __save_altstack(&frame->uc.uc_stack, __frame->sp)) | ||
269 | return -EFAULT; | ||
270 | |||
271 | if (setup_sigcontext(&frame->uc.uc_mcontext, set->sig[0])) | ||
272 | return -EFAULT; | ||
273 | |||
274 | if (__copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set))) | ||
275 | return -EFAULT; | ||
276 | |||
277 | /* Set up to return from userspace. If provided, use a stub | ||
278 | * already in userspace. */ | ||
279 | if (ksig->ka.sa.sa_flags & SA_RESTORER) { | ||
280 | if (__put_user(ksig->ka.sa.sa_restorer, &frame->pretcode)) | ||
281 | return -EFAULT; | ||
282 | } | ||
283 | else { | ||
284 | /* Set up the following code on the stack: | ||
285 | * setlos #__NR_sigreturn,gr7 | ||
286 | * tira gr0,0 | ||
287 | */ | ||
288 | if (__put_user((__sigrestore_t)frame->retcode, &frame->pretcode) || | ||
289 | __put_user(0x8efc0000|__NR_rt_sigreturn, &frame->retcode[0]) || | ||
290 | __put_user(0xc0700000, &frame->retcode[1])) | ||
291 | return -EFAULT; | ||
292 | |||
293 | flush_icache_range((unsigned long) frame->retcode, | ||
294 | (unsigned long) (frame->retcode + 2)); | ||
295 | } | ||
296 | |||
297 | /* Set up registers for signal handler */ | ||
298 | if (current->personality & FDPIC_FUNCPTRS) { | ||
299 | struct fdpic_func_descriptor __user *funcptr = | ||
300 | (struct fdpic_func_descriptor __user *) ksig->ka.sa.sa_handler; | ||
301 | struct fdpic_func_descriptor desc; | ||
302 | if (copy_from_user(&desc, funcptr, sizeof(desc))) | ||
303 | return -EFAULT; | ||
304 | __frame->pc = desc.text; | ||
305 | __frame->gr15 = desc.GOT; | ||
306 | } else { | ||
307 | __frame->pc = (unsigned long) ksig->ka.sa.sa_handler; | ||
308 | __frame->gr15 = 0; | ||
309 | } | ||
310 | |||
311 | __frame->sp = (unsigned long) frame; | ||
312 | __frame->lr = (unsigned long) &frame->retcode; | ||
313 | __frame->gr8 = sig; | ||
314 | __frame->gr9 = (unsigned long) &frame->info; | ||
315 | |||
316 | #if DEBUG_SIG | ||
317 | printk("SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n", | ||
318 | sig, current->comm, current->pid, frame, __frame->pc, | ||
319 | frame->pretcode); | ||
320 | #endif | ||
321 | return 0; | ||
322 | |||
323 | } /* end setup_rt_frame() */ | ||
324 | |||
325 | /*****************************************************************************/ | ||
326 | /* | ||
327 | * OK, we're invoking a handler | ||
328 | */ | ||
329 | static void handle_signal(struct ksignal *ksig) | ||
330 | { | ||
331 | sigset_t *oldset = sigmask_to_save(); | ||
332 | int ret; | ||
333 | |||
334 | /* Are we from a system call? */ | ||
335 | if (__frame->syscallno != -1) { | ||
336 | /* If so, check system call restarting.. */ | ||
337 | switch (__frame->gr8) { | ||
338 | case -ERESTART_RESTARTBLOCK: | ||
339 | case -ERESTARTNOHAND: | ||
340 | __frame->gr8 = -EINTR; | ||
341 | break; | ||
342 | |||
343 | case -ERESTARTSYS: | ||
344 | if (!(ksig->ka.sa.sa_flags & SA_RESTART)) { | ||
345 | __frame->gr8 = -EINTR; | ||
346 | break; | ||
347 | } | ||
348 | |||
349 | /* fallthrough */ | ||
350 | case -ERESTARTNOINTR: | ||
351 | __frame->gr8 = __frame->orig_gr8; | ||
352 | __frame->pc -= 4; | ||
353 | } | ||
354 | __frame->syscallno = -1; | ||
355 | } | ||
356 | |||
357 | /* Set up the stack frame */ | ||
358 | if (ksig->ka.sa.sa_flags & SA_SIGINFO) | ||
359 | ret = setup_rt_frame(ksig, oldset); | ||
360 | else | ||
361 | ret = setup_frame(ksig, oldset); | ||
362 | |||
363 | signal_setup_done(ret, ksig, test_thread_flag(TIF_SINGLESTEP)); | ||
364 | } /* end handle_signal() */ | ||
365 | |||
366 | /*****************************************************************************/ | ||
367 | /* | ||
368 | * Note that 'init' is a special process: it doesn't get signals it doesn't | ||
369 | * want to handle. Thus you cannot kill init even with a SIGKILL even by | ||
370 | * mistake. | ||
371 | */ | ||
372 | static void do_signal(void) | ||
373 | { | ||
374 | struct ksignal ksig; | ||
375 | |||
376 | if (get_signal(&ksig)) { | ||
377 | handle_signal(&ksig); | ||
378 | return; | ||
379 | } | ||
380 | |||
381 | /* Did we come from a system call? */ | ||
382 | if (__frame->syscallno != -1) { | ||
383 | /* Restart the system call - no handlers present */ | ||
384 | switch (__frame->gr8) { | ||
385 | case -ERESTARTNOHAND: | ||
386 | case -ERESTARTSYS: | ||
387 | case -ERESTARTNOINTR: | ||
388 | __frame->gr8 = __frame->orig_gr8; | ||
389 | __frame->pc -= 4; | ||
390 | break; | ||
391 | |||
392 | case -ERESTART_RESTARTBLOCK: | ||
393 | __frame->gr7 = __NR_restart_syscall; | ||
394 | __frame->pc -= 4; | ||
395 | break; | ||
396 | } | ||
397 | __frame->syscallno = -1; | ||
398 | } | ||
399 | |||
400 | /* if there's no signal to deliver, we just put the saved sigmask | ||
401 | * back */ | ||
402 | restore_saved_sigmask(); | ||
403 | } /* end do_signal() */ | ||
404 | |||
405 | /*****************************************************************************/ | ||
406 | /* | ||
407 | * notification of userspace execution resumption | ||
408 | * - triggered by the TIF_WORK_MASK flags | ||
409 | */ | ||
410 | asmlinkage void do_notify_resume(__u32 thread_info_flags) | ||
411 | { | ||
412 | /* pending single-step? */ | ||
413 | if (thread_info_flags & _TIF_SINGLESTEP) | ||
414 | clear_thread_flag(TIF_SINGLESTEP); | ||
415 | |||
416 | /* deal with pending signal delivery */ | ||
417 | if (thread_info_flags & _TIF_SIGPENDING) | ||
418 | do_signal(); | ||
419 | |||
420 | /* deal with notification on about to resume userspace execution */ | ||
421 | if (thread_info_flags & _TIF_NOTIFY_RESUME) { | ||
422 | clear_thread_flag(TIF_NOTIFY_RESUME); | ||
423 | tracehook_notify_resume(__frame); | ||
424 | } | ||
425 | |||
426 | } /* end do_notify_resume() */ | ||
diff --git a/arch/frv/kernel/sleep.S b/arch/frv/kernel/sleep.S deleted file mode 100644 index f67bf73cd2cc..000000000000 --- a/arch/frv/kernel/sleep.S +++ /dev/null | |||
@@ -1,373 +0,0 @@ | |||
1 | /* sleep.S: power saving mode entry | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Woodhouse (dwmw2@infradead.org) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/sys.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <asm/setup.h> | ||
16 | #include <asm/segment.h> | ||
17 | #include <asm/page.h> | ||
18 | #include <asm/ptrace.h> | ||
19 | #include <asm/errno.h> | ||
20 | #include <asm/cache.h> | ||
21 | #include <asm/spr-regs.h> | ||
22 | |||
23 | #define __addr_MASK 0xfeff9820 /* interrupt controller mask */ | ||
24 | |||
25 | #define __addr_FR55X_DRCN 0xfeff0218 /* Address of DRCN register */ | ||
26 | #define FR55X_DSTS_OFFSET -4 /* Offset from DRCN to DSTS */ | ||
27 | #define FR55X_SDRAMC_DSTS_SSI 0x00000002 /* indicates that the SDRAM is in self-refresh mode */ | ||
28 | |||
29 | #define __addr_FR4XX_DRCN 0xfe000430 /* Address of DRCN register */ | ||
30 | #define FR4XX_DSTS_OFFSET -8 /* Offset from DRCN to DSTS */ | ||
31 | #define FR4XX_SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is in self-refresh mode */ | ||
32 | |||
33 | #define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh mode */ | ||
34 | |||
35 | .section .bss | ||
36 | .balign 8 | ||
37 | .globl __sleep_save_area | ||
38 | __sleep_save_area: | ||
39 | .space 16 | ||
40 | |||
41 | |||
42 | .text | ||
43 | .balign 4 | ||
44 | |||
45 | .macro li v r | ||
46 | sethi.p %hi(\v),\r | ||
47 | setlo %lo(\v),\r | ||
48 | .endm | ||
49 | |||
50 | #ifdef CONFIG_PM | ||
51 | ############################################################################### | ||
52 | # | ||
53 | # CPU suspension routine | ||
54 | # - void frv_cpu_suspend(unsigned long pdm_mode) | ||
55 | # | ||
56 | ############################################################################### | ||
57 | .globl frv_cpu_suspend | ||
58 | .type frv_cpu_suspend,@function | ||
59 | frv_cpu_suspend: | ||
60 | |||
61 | #---------------------------------------------------- | ||
62 | # save hsr0, psr, isr, and lr for resume code | ||
63 | #---------------------------------------------------- | ||
64 | li __sleep_save_area,gr11 | ||
65 | |||
66 | movsg hsr0,gr4 | ||
67 | movsg psr,gr5 | ||
68 | movsg isr,gr6 | ||
69 | movsg lr,gr7 | ||
70 | stdi gr4,@(gr11,#0) | ||
71 | stdi gr6,@(gr11,#8) | ||
72 | |||
73 | # store the return address from sleep in GR14, and its complement in GR13 as a check | ||
74 | li __ramboot_resume,gr14 | ||
75 | #ifdef CONFIG_MMU | ||
76 | # Resume via RAMBOOT# will turn MMU off, so bootloader needs a physical address. | ||
77 | sethi.p %hi(__page_offset),gr13 | ||
78 | setlo %lo(__page_offset),gr13 | ||
79 | sub gr14,gr13,gr14 | ||
80 | #endif | ||
81 | not gr14,gr13 | ||
82 | |||
83 | #---------------------------------------------------- | ||
84 | # preload and lock into icache that code which may have to run | ||
85 | # when dram is in self-refresh state. | ||
86 | #---------------------------------------------------- | ||
87 | movsg hsr0, gr3 | ||
88 | li HSR0_ICE,gr4 | ||
89 | or gr3,gr4,gr3 | ||
90 | movgs gr3,hsr0 | ||
91 | or gr3,gr8,gr7 // add the sleep bits for later | ||
92 | |||
93 | li #__icache_lock_start,gr3 | ||
94 | li #__icache_lock_end,gr4 | ||
95 | 1: icpl gr3,gr0,#1 | ||
96 | addi gr3,#L1_CACHE_BYTES,gr3 | ||
97 | cmp gr4,gr3,icc0 | ||
98 | bhi icc0,#0,1b | ||
99 | |||
100 | # disable exceptions | ||
101 | movsg psr,gr8 | ||
102 | andi.p gr8,#~PSR_PIL,gr8 | ||
103 | andi gr8,~PSR_ET,gr8 | ||
104 | movgs gr8,psr | ||
105 | ori gr8,#PSR_ET,gr8 | ||
106 | |||
107 | srli gr8,#28,gr4 | ||
108 | subicc gr4,#3,gr0,icc0 | ||
109 | beq icc0,#0,1f | ||
110 | # FR4xx | ||
111 | li __addr_FR4XX_DRCN,gr4 | ||
112 | li FR4XX_SDRAMC_DSTS_SSI,gr5 | ||
113 | li FR4XX_DSTS_OFFSET,gr6 | ||
114 | bra __icache_lock_start | ||
115 | 1: | ||
116 | # FR5xx | ||
117 | li __addr_FR55X_DRCN,gr4 | ||
118 | li FR55X_SDRAMC_DSTS_SSI,gr5 | ||
119 | li FR55X_DSTS_OFFSET,gr6 | ||
120 | bra __icache_lock_start | ||
121 | |||
122 | .size frv_cpu_suspend, .-frv_cpu_suspend | ||
123 | |||
124 | # | ||
125 | # the final part of the sleep sequence... | ||
126 | # - we want it to be be cacheline aligned so we can lock it into the icache easily | ||
127 | # On entry: gr7 holds desired hsr0 sleep value | ||
128 | # gr8 holds desired psr sleep value | ||
129 | # | ||
130 | .balign L1_CACHE_BYTES | ||
131 | .type __icache_lock_start,@function | ||
132 | __icache_lock_start: | ||
133 | |||
134 | #---------------------------------------------------- | ||
135 | # put SDRAM in self-refresh mode | ||
136 | #---------------------------------------------------- | ||
137 | |||
138 | # Flush all data in the cache using the DCEF instruction. | ||
139 | dcef @(gr0,gr0),#1 | ||
140 | |||
141 | # Stop DMAC transfer | ||
142 | |||
143 | # Execute dummy load from SDRAM | ||
144 | ldi @(gr11,#0),gr11 | ||
145 | |||
146 | # put the SDRAM into self-refresh mode | ||
147 | ld @(gr4,gr0),gr11 | ||
148 | ori gr11,#SDRAMC_DRCN_SR,gr11 | ||
149 | st gr11,@(gr4,gr0) | ||
150 | membar | ||
151 | |||
152 | # wait for SDRAM to reach self-refresh mode | ||
153 | 1: ld @(gr4,gr6),gr11 | ||
154 | andcc gr11,gr5,gr11,icc0 | ||
155 | beq icc0,#0,1b | ||
156 | |||
157 | # Set the GPIO register so that the IRQ[3:0] pins become valid, as required. | ||
158 | # Set the clock mode (CLKC register) as required. | ||
159 | # - At this time, also set the CLKC register P0 bit. | ||
160 | |||
161 | # Set the HSR0 register PDM field. | ||
162 | movgs gr7,hsr0 | ||
163 | |||
164 | # Execute NOP 32 times. | ||
165 | .rept 32 | ||
166 | nop | ||
167 | .endr | ||
168 | |||
169 | #if 0 // Fujitsu recommend to skip this and will update docs. | ||
170 | # Release the interrupt mask setting of the MASK register of the | ||
171 | # interrupt controller if necessary. | ||
172 | sti gr10,@(gr9,#0) | ||
173 | membar | ||
174 | #endif | ||
175 | |||
176 | # Set the PSR register ET bit to 1 to enable interrupts. | ||
177 | movgs gr8,psr | ||
178 | |||
179 | ################################################### | ||
180 | # this is only reached if waking up via interrupt | ||
181 | ################################################### | ||
182 | |||
183 | # Execute NOP 32 times. | ||
184 | .rept 32 | ||
185 | nop | ||
186 | .endr | ||
187 | |||
188 | #---------------------------------------------------- | ||
189 | # wake SDRAM from self-refresh mode | ||
190 | #---------------------------------------------------- | ||
191 | ld @(gr4,gr0),gr11 | ||
192 | andi gr11,#~SDRAMC_DRCN_SR,gr11 | ||
193 | st gr11,@(gr4,gr0) | ||
194 | membar | ||
195 | 2: | ||
196 | ld @(gr4,gr6),gr11 // Wait for it to come back... | ||
197 | andcc gr11,gr5,gr0,icc0 | ||
198 | bne icc0,0,2b | ||
199 | |||
200 | # wait for the SDRAM to stabilise | ||
201 | li 0x0100000,gr3 | ||
202 | 3: subicc gr3,#1,gr3,icc0 | ||
203 | bne icc0,#0,3b | ||
204 | |||
205 | # now that DRAM is back, this is the end of the code which gets | ||
206 | # locked in icache. | ||
207 | __icache_lock_end: | ||
208 | .size __icache_lock_start, .-__icache_lock_start | ||
209 | |||
210 | # Fall-through to the RAMBOOT# wakeup path | ||
211 | |||
212 | ############################################################################### | ||
213 | # | ||
214 | # resume from suspend re-entry point reached via RAMBOOT# and bootloader | ||
215 | # | ||
216 | ############################################################################### | ||
217 | __ramboot_resume: | ||
218 | |||
219 | #---------------------------------------------------- | ||
220 | # restore hsr0, psr, isr, and leave saved lr in gr7 | ||
221 | #---------------------------------------------------- | ||
222 | li __sleep_save_area,gr11 | ||
223 | #ifdef CONFIG_MMU | ||
224 | movsg hsr0,gr4 | ||
225 | sethi.p %hi(HSR0_EXMMU),gr3 | ||
226 | setlo %lo(HSR0_EXMMU),gr3 | ||
227 | andcc gr3,gr4,gr0,icc0 | ||
228 | bne icc0,#0,2f | ||
229 | |||
230 | # need to use physical address | ||
231 | sethi.p %hi(__page_offset),gr3 | ||
232 | setlo %lo(__page_offset),gr3 | ||
233 | sub gr11,gr3,gr11 | ||
234 | |||
235 | # flush all tlb entries | ||
236 | setlos #64,gr4 | ||
237 | setlos.p #PAGE_SIZE,gr5 | ||
238 | setlos #0,gr6 | ||
239 | 1: | ||
240 | tlbpr gr6,gr0,#6,#0 | ||
241 | subicc.p gr4,#1,gr4,icc0 | ||
242 | add gr6,gr5,gr6 | ||
243 | bne icc0,#2,1b | ||
244 | |||
245 | # need a temporary mapping for the current physical address we are | ||
246 | # using between time MMU is enabled and jump to virtual address is | ||
247 | # made. | ||
248 | sethi.p %hi(0x00000000),gr4 | ||
249 | setlo %lo(0x00000000),gr4 ; physical address | ||
250 | setlos #xAMPRx_L|xAMPRx_M|xAMPRx_SS_256Mb|xAMPRx_S_KERNEL|xAMPRx_V,gr5 | ||
251 | or gr4,gr5,gr5 | ||
252 | |||
253 | movsg cxnr,gr13 | ||
254 | or gr4,gr13,gr4 | ||
255 | |||
256 | movgs gr4,iamlr1 ; mapped from real address 0 | ||
257 | movgs gr5,iampr1 ; cached kernel memory at 0x00000000 | ||
258 | 2: | ||
259 | #endif | ||
260 | |||
261 | lddi @(gr11,#0),gr4 ; hsr0, psr | ||
262 | lddi @(gr11,#8),gr6 ; isr, lr | ||
263 | movgs gr4,hsr0 | ||
264 | bar | ||
265 | |||
266 | #ifdef CONFIG_MMU | ||
267 | sethi.p %hi(1f),gr11 | ||
268 | setlo %lo(1f),gr11 | ||
269 | jmpl @(gr11,gr0) | ||
270 | 1: | ||
271 | movgs gr0,iampr1 ; get rid of temporary mapping | ||
272 | #endif | ||
273 | movgs gr5,psr | ||
274 | movgs gr6,isr | ||
275 | |||
276 | #---------------------------------------------------- | ||
277 | # unlock the icache which was locked before going to sleep | ||
278 | #---------------------------------------------------- | ||
279 | li __icache_lock_start,gr3 | ||
280 | li __icache_lock_end,gr4 | ||
281 | 1: icul gr3 | ||
282 | addi gr3,#L1_CACHE_BYTES,gr3 | ||
283 | cmp gr4,gr3,icc0 | ||
284 | bhi icc0,#0,1b | ||
285 | |||
286 | #---------------------------------------------------- | ||
287 | # back to business as usual | ||
288 | #---------------------------------------------------- | ||
289 | jmpl @(gr7,gr0) ; | ||
290 | |||
291 | #endif /* CONFIG_PM */ | ||
292 | |||
293 | ############################################################################### | ||
294 | # | ||
295 | # CPU core sleep mode routine | ||
296 | # | ||
297 | ############################################################################### | ||
298 | .globl frv_cpu_core_sleep | ||
299 | .type frv_cpu_core_sleep,@function | ||
300 | frv_cpu_core_sleep: | ||
301 | |||
302 | # Preload into icache. | ||
303 | li #__core_sleep_icache_lock_start,gr3 | ||
304 | li #__core_sleep_icache_lock_end,gr4 | ||
305 | |||
306 | 1: icpl gr3,gr0,#1 | ||
307 | addi gr3,#L1_CACHE_BYTES,gr3 | ||
308 | cmp gr4,gr3,icc0 | ||
309 | bhi icc0,#0,1b | ||
310 | |||
311 | bra __core_sleep_icache_lock_start | ||
312 | |||
313 | .balign L1_CACHE_BYTES | ||
314 | __core_sleep_icache_lock_start: | ||
315 | |||
316 | # (1) Set the PSR register ET bit to 0 to disable interrupts. | ||
317 | movsg psr,gr8 | ||
318 | andi.p gr8,#~(PSR_PIL),gr8 | ||
319 | andi gr8,#~(PSR_ET),gr4 | ||
320 | movgs gr4,psr | ||
321 | |||
322 | #if 0 // Fujitsu recommend to skip this and will update docs. | ||
323 | # (2) Set '1' to all bits in the MASK register of the interrupt | ||
324 | # controller and mask interrupts. | ||
325 | sethi.p %hi(__addr_MASK),gr9 | ||
326 | setlo %lo(__addr_MASK),gr9 | ||
327 | sethi.p %hi(0xffff0000),gr4 | ||
328 | setlo %lo(0xffff0000),gr4 | ||
329 | ldi @(gr9,#0),gr10 | ||
330 | sti gr4,@(gr9,#0) | ||
331 | #endif | ||
332 | # (3) Flush all data in the cache using the DCEF instruction. | ||
333 | dcef @(gr0,gr0),#1 | ||
334 | |||
335 | # (4) Execute the memory barrier instruction | ||
336 | membar | ||
337 | |||
338 | # (5) Set the GPIO register so that the IRQ[3:0] pins become valid, as required. | ||
339 | # (6) Set the clock mode (CLKC register) as required. | ||
340 | # - At this time, also set the CLKC register P0 bit. | ||
341 | # (7) Set the HSR0 register PDM field to 001 . | ||
342 | movsg hsr0,gr4 | ||
343 | ori gr4,HSR0_PDM_CORE_SLEEP,gr4 | ||
344 | movgs gr4,hsr0 | ||
345 | |||
346 | # (8) Execute NOP 32 times. | ||
347 | .rept 32 | ||
348 | nop | ||
349 | .endr | ||
350 | |||
351 | #if 0 // Fujitsu recommend to skip this and will update docs. | ||
352 | # (9) Release the interrupt mask setting of the MASK register of the | ||
353 | # interrupt controller if necessary. | ||
354 | sti gr10,@(gr9,#0) | ||
355 | membar | ||
356 | #endif | ||
357 | |||
358 | # (10) Set the PSR register ET bit to 1 to enable interrupts. | ||
359 | movgs gr8,psr | ||
360 | |||
361 | __core_sleep_icache_lock_end: | ||
362 | |||
363 | # Unlock from icache | ||
364 | li __core_sleep_icache_lock_start,gr3 | ||
365 | li __core_sleep_icache_lock_end,gr4 | ||
366 | 1: icul gr3 | ||
367 | addi gr3,#L1_CACHE_BYTES,gr3 | ||
368 | cmp gr4,gr3,icc0 | ||
369 | bhi icc0,#0,1b | ||
370 | |||
371 | bralr | ||
372 | |||
373 | .size frv_cpu_core_sleep, .-frv_cpu_core_sleep | ||
diff --git a/arch/frv/kernel/switch_to.S b/arch/frv/kernel/switch_to.S deleted file mode 100644 index b06668670fcc..000000000000 --- a/arch/frv/kernel/switch_to.S +++ /dev/null | |||
@@ -1,489 +0,0 @@ | |||
1 | ############################################################################### | ||
2 | # | ||
3 | # switch_to.S: context switch operation | ||
4 | # | ||
5 | # Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
6 | # Written by David Howells (dhowells@redhat.com) | ||
7 | # | ||
8 | # This program is free software; you can redistribute it and/or | ||
9 | # modify it under the terms of the GNU General Public License | ||
10 | # as published by the Free Software Foundation; either version | ||
11 | # 2 of the License, or (at your option) any later version. | ||
12 | # | ||
13 | ############################################################################### | ||
14 | |||
15 | #include <linux/linkage.h> | ||
16 | #include <asm/thread_info.h> | ||
17 | #include <asm/processor.h> | ||
18 | #include <asm/registers.h> | ||
19 | #include <asm/spr-regs.h> | ||
20 | |||
21 | .macro LEDS val | ||
22 | setlos #~\val,gr27 | ||
23 | st gr27,@(gr30,gr0) | ||
24 | membar | ||
25 | dcf @(gr30,gr0) | ||
26 | .endm | ||
27 | |||
28 | .section .sdata | ||
29 | .balign 8 | ||
30 | |||
31 | # address of frame 0 (userspace) on current kernel stack | ||
32 | .globl __kernel_frame0_ptr | ||
33 | __kernel_frame0_ptr: | ||
34 | .long init_thread_union + THREAD_SIZE - FRV_FRAME0_SIZE | ||
35 | |||
36 | # address of current task | ||
37 | .globl __kernel_current_task | ||
38 | __kernel_current_task: | ||
39 | .long init_task | ||
40 | |||
41 | .section .text | ||
42 | .balign 4 | ||
43 | |||
44 | ############################################################################### | ||
45 | # | ||
46 | # struct task_struct *__switch_to(struct thread_struct *prev_thread, | ||
47 | # struct thread_struct *next_thread, | ||
48 | # struct task_struct *prev) | ||
49 | # | ||
50 | ############################################################################### | ||
51 | .globl __switch_to | ||
52 | __switch_to: | ||
53 | # save outgoing process's context | ||
54 | sethi.p %hi(__switch_back),gr13 | ||
55 | setlo %lo(__switch_back),gr13 | ||
56 | movsg lr,gr12 | ||
57 | |||
58 | stdi gr28,@(gr8,#__THREAD_FRAME) | ||
59 | sti sp ,@(gr8,#__THREAD_SP) | ||
60 | sti fp ,@(gr8,#__THREAD_FP) | ||
61 | stdi gr12,@(gr8,#__THREAD_LR) | ||
62 | stdi gr16,@(gr8,#__THREAD_GR(16)) | ||
63 | stdi gr18,@(gr8,#__THREAD_GR(18)) | ||
64 | stdi gr20,@(gr8,#__THREAD_GR(20)) | ||
65 | stdi gr22,@(gr8,#__THREAD_GR(22)) | ||
66 | stdi gr24,@(gr8,#__THREAD_GR(24)) | ||
67 | stdi.p gr26,@(gr8,#__THREAD_GR(26)) | ||
68 | |||
69 | or gr8,gr8,gr22 | ||
70 | ldi.p @(gr8,#__THREAD_USER),gr8 | ||
71 | call save_user_regs | ||
72 | or gr22,gr22,gr8 | ||
73 | |||
74 | # retrieve the new context | ||
75 | sethi.p %hi(__kernel_frame0_ptr),gr6 | ||
76 | setlo %lo(__kernel_frame0_ptr),gr6 | ||
77 | movsg psr,gr4 | ||
78 | |||
79 | lddi.p @(gr9,#__THREAD_FRAME),gr10 | ||
80 | or gr10,gr10,gr27 ; save prev for the return value | ||
81 | |||
82 | ldi @(gr11,#4),gr19 ; get new_current->thread_info | ||
83 | |||
84 | lddi @(gr9,#__THREAD_SP),gr12 | ||
85 | ldi @(gr9,#__THREAD_LR),gr14 | ||
86 | ldi @(gr9,#__THREAD_PC),gr18 | ||
87 | ldi.p @(gr9,#__THREAD_FRAME0),gr7 | ||
88 | |||
89 | # actually switch kernel contexts with ordinary exceptions disabled | ||
90 | andi gr4,#~PSR_ET,gr5 | ||
91 | movgs gr5,psr | ||
92 | |||
93 | or.p gr10,gr0,gr28 ; set __frame | ||
94 | or gr11,gr0,gr29 ; set __current | ||
95 | or.p gr12,gr0,sp | ||
96 | or gr13,gr0,fp | ||
97 | or gr19,gr0,gr15 ; set __current_thread_info | ||
98 | |||
99 | sti gr7,@(gr6,#0) ; set __kernel_frame0_ptr | ||
100 | sti gr29,@(gr6,#4) ; set __kernel_current_task | ||
101 | |||
102 | movgs gr14,lr | ||
103 | bar | ||
104 | |||
105 | # jump to __switch_back or ret_from_fork as appropriate | ||
106 | # - move prev to GR8 | ||
107 | movgs gr4,psr | ||
108 | jmpl.p @(gr18,gr0) | ||
109 | or gr27,gr27,gr8 | ||
110 | |||
111 | ############################################################################### | ||
112 | # | ||
113 | # restore incoming process's context | ||
114 | # - on entry: | ||
115 | # - SP, FP, LR, GR15, GR28 and GR29 will have been set up appropriately | ||
116 | # - GR8 will point to the outgoing task_struct | ||
117 | # - GR9 will point to the incoming thread_struct | ||
118 | # | ||
119 | ############################################################################### | ||
120 | __switch_back: | ||
121 | lddi @(gr9,#__THREAD_GR(16)),gr16 | ||
122 | lddi @(gr9,#__THREAD_GR(18)),gr18 | ||
123 | lddi @(gr9,#__THREAD_GR(20)),gr20 | ||
124 | lddi @(gr9,#__THREAD_GR(22)),gr22 | ||
125 | lddi @(gr9,#__THREAD_GR(24)),gr24 | ||
126 | lddi @(gr9,#__THREAD_GR(26)),gr26 | ||
127 | |||
128 | # fall through into restore_user_regs() | ||
129 | ldi.p @(gr9,#__THREAD_USER),gr8 | ||
130 | or gr8,gr8,gr9 | ||
131 | |||
132 | ############################################################################### | ||
133 | # | ||
134 | # restore extra general regs and FP/Media regs | ||
135 | # - void *restore_user_regs(const struct user_context *target, void *retval) | ||
136 | # - on entry: | ||
137 | # - GR8 will point to the user context to swap in | ||
138 | # - GR9 will contain the value to be returned in GR8 (prev task on context switch) | ||
139 | # | ||
140 | ############################################################################### | ||
141 | .globl restore_user_regs | ||
142 | restore_user_regs: | ||
143 | movsg hsr0,gr6 | ||
144 | ori gr6,#HSR0_GRHE|HSR0_FRLE|HSR0_FRHE,gr6 | ||
145 | movgs gr6,hsr0 | ||
146 | movsg hsr0,gr6 | ||
147 | |||
148 | movsg psr,gr7 | ||
149 | ori gr7,#PSR_EF|PSR_EM,gr7 | ||
150 | movgs gr7,psr | ||
151 | movsg psr,gr7 | ||
152 | srli gr7,#24,gr7 | ||
153 | bar | ||
154 | |||
155 | lddi @(gr8,#__FPMEDIA_MSR(0)),gr4 | ||
156 | |||
157 | movgs gr4,msr0 | ||
158 | movgs gr5,msr1 | ||
159 | |||
160 | lddfi @(gr8,#__FPMEDIA_ACC(0)),fr16 | ||
161 | lddfi @(gr8,#__FPMEDIA_ACC(2)),fr18 | ||
162 | ldbfi @(gr8,#__FPMEDIA_ACCG(0)),fr20 | ||
163 | ldbfi @(gr8,#__FPMEDIA_ACCG(1)),fr21 | ||
164 | ldbfi @(gr8,#__FPMEDIA_ACCG(2)),fr22 | ||
165 | ldbfi @(gr8,#__FPMEDIA_ACCG(3)),fr23 | ||
166 | |||
167 | mwtacc fr16,acc0 | ||
168 | mwtacc fr17,acc1 | ||
169 | mwtacc fr18,acc2 | ||
170 | mwtacc fr19,acc3 | ||
171 | mwtaccg fr20,accg0 | ||
172 | mwtaccg fr21,accg1 | ||
173 | mwtaccg fr22,accg2 | ||
174 | mwtaccg fr23,accg3 | ||
175 | |||
176 | # some CPUs have extra ACCx and ACCGx regs and maybe FSRx regs | ||
177 | subicc.p gr7,#0x50,gr0,icc0 | ||
178 | subicc gr7,#0x31,gr0,icc1 | ||
179 | beq icc0,#0,__restore_acc_fr451 | ||
180 | beq icc1,#0,__restore_acc_fr555 | ||
181 | __restore_acc_cont: | ||
182 | |||
183 | # some CPU's have GR32-GR63 | ||
184 | setlos #HSR0_FRHE,gr4 | ||
185 | andcc gr6,gr4,gr0,icc0 | ||
186 | beq icc0,#1,__restore_skip_gr32_gr63 | ||
187 | |||
188 | lddi @(gr8,#__INT_GR(32)),gr32 | ||
189 | lddi @(gr8,#__INT_GR(34)),gr34 | ||
190 | lddi @(gr8,#__INT_GR(36)),gr36 | ||
191 | lddi @(gr8,#__INT_GR(38)),gr38 | ||
192 | lddi @(gr8,#__INT_GR(40)),gr40 | ||
193 | lddi @(gr8,#__INT_GR(42)),gr42 | ||
194 | lddi @(gr8,#__INT_GR(44)),gr44 | ||
195 | lddi @(gr8,#__INT_GR(46)),gr46 | ||
196 | lddi @(gr8,#__INT_GR(48)),gr48 | ||
197 | lddi @(gr8,#__INT_GR(50)),gr50 | ||
198 | lddi @(gr8,#__INT_GR(52)),gr52 | ||
199 | lddi @(gr8,#__INT_GR(54)),gr54 | ||
200 | lddi @(gr8,#__INT_GR(56)),gr56 | ||
201 | lddi @(gr8,#__INT_GR(58)),gr58 | ||
202 | lddi @(gr8,#__INT_GR(60)),gr60 | ||
203 | lddi @(gr8,#__INT_GR(62)),gr62 | ||
204 | __restore_skip_gr32_gr63: | ||
205 | |||
206 | # all CPU's have FR0-FR31 | ||
207 | lddfi @(gr8,#__FPMEDIA_FR( 0)),fr0 | ||
208 | lddfi @(gr8,#__FPMEDIA_FR( 2)),fr2 | ||
209 | lddfi @(gr8,#__FPMEDIA_FR( 4)),fr4 | ||
210 | lddfi @(gr8,#__FPMEDIA_FR( 6)),fr6 | ||
211 | lddfi @(gr8,#__FPMEDIA_FR( 8)),fr8 | ||
212 | lddfi @(gr8,#__FPMEDIA_FR(10)),fr10 | ||
213 | lddfi @(gr8,#__FPMEDIA_FR(12)),fr12 | ||
214 | lddfi @(gr8,#__FPMEDIA_FR(14)),fr14 | ||
215 | lddfi @(gr8,#__FPMEDIA_FR(16)),fr16 | ||
216 | lddfi @(gr8,#__FPMEDIA_FR(18)),fr18 | ||
217 | lddfi @(gr8,#__FPMEDIA_FR(20)),fr20 | ||
218 | lddfi @(gr8,#__FPMEDIA_FR(22)),fr22 | ||
219 | lddfi @(gr8,#__FPMEDIA_FR(24)),fr24 | ||
220 | lddfi @(gr8,#__FPMEDIA_FR(26)),fr26 | ||
221 | lddfi @(gr8,#__FPMEDIA_FR(28)),fr28 | ||
222 | lddfi.p @(gr8,#__FPMEDIA_FR(30)),fr30 | ||
223 | |||
224 | # some CPU's have FR32-FR63 | ||
225 | setlos #HSR0_FRHE,gr4 | ||
226 | andcc gr6,gr4,gr0,icc0 | ||
227 | beq icc0,#1,__restore_skip_fr32_fr63 | ||
228 | |||
229 | lddfi @(gr8,#__FPMEDIA_FR(32)),fr32 | ||
230 | lddfi @(gr8,#__FPMEDIA_FR(34)),fr34 | ||
231 | lddfi @(gr8,#__FPMEDIA_FR(36)),fr36 | ||
232 | lddfi @(gr8,#__FPMEDIA_FR(38)),fr38 | ||
233 | lddfi @(gr8,#__FPMEDIA_FR(40)),fr40 | ||
234 | lddfi @(gr8,#__FPMEDIA_FR(42)),fr42 | ||
235 | lddfi @(gr8,#__FPMEDIA_FR(44)),fr44 | ||
236 | lddfi @(gr8,#__FPMEDIA_FR(46)),fr46 | ||
237 | lddfi @(gr8,#__FPMEDIA_FR(48)),fr48 | ||
238 | lddfi @(gr8,#__FPMEDIA_FR(50)),fr50 | ||
239 | lddfi @(gr8,#__FPMEDIA_FR(52)),fr52 | ||
240 | lddfi @(gr8,#__FPMEDIA_FR(54)),fr54 | ||
241 | lddfi @(gr8,#__FPMEDIA_FR(56)),fr56 | ||
242 | lddfi @(gr8,#__FPMEDIA_FR(58)),fr58 | ||
243 | lddfi @(gr8,#__FPMEDIA_FR(60)),fr60 | ||
244 | lddfi @(gr8,#__FPMEDIA_FR(62)),fr62 | ||
245 | __restore_skip_fr32_fr63: | ||
246 | |||
247 | lddi @(gr8,#__FPMEDIA_FNER(0)),gr4 | ||
248 | movsg fner0,gr4 | ||
249 | movsg fner1,gr5 | ||
250 | or.p gr9,gr9,gr8 | ||
251 | bralr | ||
252 | |||
253 | # the FR451 also has ACC8-11/ACCG8-11 regs (but not 4-7...) | ||
254 | __restore_acc_fr451: | ||
255 | lddfi @(gr8,#__FPMEDIA_ACC(4)),fr16 | ||
256 | lddfi @(gr8,#__FPMEDIA_ACC(6)),fr18 | ||
257 | ldbfi @(gr8,#__FPMEDIA_ACCG(4)),fr20 | ||
258 | ldbfi @(gr8,#__FPMEDIA_ACCG(5)),fr21 | ||
259 | ldbfi @(gr8,#__FPMEDIA_ACCG(6)),fr22 | ||
260 | ldbfi @(gr8,#__FPMEDIA_ACCG(7)),fr23 | ||
261 | |||
262 | mwtacc fr16,acc8 | ||
263 | mwtacc fr17,acc9 | ||
264 | mwtacc fr18,acc10 | ||
265 | mwtacc fr19,acc11 | ||
266 | mwtaccg fr20,accg8 | ||
267 | mwtaccg fr21,accg9 | ||
268 | mwtaccg fr22,accg10 | ||
269 | mwtaccg fr23,accg11 | ||
270 | bra __restore_acc_cont | ||
271 | |||
272 | # the FR555 also has ACC4-7/ACCG4-7 regs and an FSR0 reg | ||
273 | __restore_acc_fr555: | ||
274 | lddfi @(gr8,#__FPMEDIA_ACC(4)),fr16 | ||
275 | lddfi @(gr8,#__FPMEDIA_ACC(6)),fr18 | ||
276 | ldbfi @(gr8,#__FPMEDIA_ACCG(4)),fr20 | ||
277 | ldbfi @(gr8,#__FPMEDIA_ACCG(5)),fr21 | ||
278 | ldbfi @(gr8,#__FPMEDIA_ACCG(6)),fr22 | ||
279 | ldbfi @(gr8,#__FPMEDIA_ACCG(7)),fr23 | ||
280 | |||
281 | mnop.p | ||
282 | mwtacc fr16,acc4 | ||
283 | mnop.p | ||
284 | mwtacc fr17,acc5 | ||
285 | mnop.p | ||
286 | mwtacc fr18,acc6 | ||
287 | mnop.p | ||
288 | mwtacc fr19,acc7 | ||
289 | mnop.p | ||
290 | mwtaccg fr20,accg4 | ||
291 | mnop.p | ||
292 | mwtaccg fr21,accg5 | ||
293 | mnop.p | ||
294 | mwtaccg fr22,accg6 | ||
295 | mnop.p | ||
296 | mwtaccg fr23,accg7 | ||
297 | |||
298 | ldi @(gr8,#__FPMEDIA_FSR(0)),gr4 | ||
299 | movgs gr4,fsr0 | ||
300 | |||
301 | bra __restore_acc_cont | ||
302 | |||
303 | |||
304 | ############################################################################### | ||
305 | # | ||
306 | # save extra general regs and FP/Media regs | ||
307 | # - void save_user_regs(struct user_context *target) | ||
308 | # | ||
309 | ############################################################################### | ||
310 | .globl save_user_regs | ||
311 | save_user_regs: | ||
312 | movsg hsr0,gr6 | ||
313 | ori gr6,#HSR0_GRHE|HSR0_FRLE|HSR0_FRHE,gr6 | ||
314 | movgs gr6,hsr0 | ||
315 | movsg hsr0,gr6 | ||
316 | |||
317 | movsg psr,gr7 | ||
318 | ori gr7,#PSR_EF|PSR_EM,gr7 | ||
319 | movgs gr7,psr | ||
320 | movsg psr,gr7 | ||
321 | srli gr7,#24,gr7 | ||
322 | bar | ||
323 | |||
324 | movsg fner0,gr4 | ||
325 | movsg fner1,gr5 | ||
326 | stdi.p gr4,@(gr8,#__FPMEDIA_FNER(0)) | ||
327 | |||
328 | # some CPU's have GR32-GR63 | ||
329 | setlos #HSR0_GRHE,gr4 | ||
330 | andcc gr6,gr4,gr0,icc0 | ||
331 | beq icc0,#1,__save_skip_gr32_gr63 | ||
332 | |||
333 | stdi gr32,@(gr8,#__INT_GR(32)) | ||
334 | stdi gr34,@(gr8,#__INT_GR(34)) | ||
335 | stdi gr36,@(gr8,#__INT_GR(36)) | ||
336 | stdi gr38,@(gr8,#__INT_GR(38)) | ||
337 | stdi gr40,@(gr8,#__INT_GR(40)) | ||
338 | stdi gr42,@(gr8,#__INT_GR(42)) | ||
339 | stdi gr44,@(gr8,#__INT_GR(44)) | ||
340 | stdi gr46,@(gr8,#__INT_GR(46)) | ||
341 | stdi gr48,@(gr8,#__INT_GR(48)) | ||
342 | stdi gr50,@(gr8,#__INT_GR(50)) | ||
343 | stdi gr52,@(gr8,#__INT_GR(52)) | ||
344 | stdi gr54,@(gr8,#__INT_GR(54)) | ||
345 | stdi gr56,@(gr8,#__INT_GR(56)) | ||
346 | stdi gr58,@(gr8,#__INT_GR(58)) | ||
347 | stdi gr60,@(gr8,#__INT_GR(60)) | ||
348 | stdi gr62,@(gr8,#__INT_GR(62)) | ||
349 | __save_skip_gr32_gr63: | ||
350 | |||
351 | # all CPU's have FR0-FR31 | ||
352 | stdfi fr0 ,@(gr8,#__FPMEDIA_FR( 0)) | ||
353 | stdfi fr2 ,@(gr8,#__FPMEDIA_FR( 2)) | ||
354 | stdfi fr4 ,@(gr8,#__FPMEDIA_FR( 4)) | ||
355 | stdfi fr6 ,@(gr8,#__FPMEDIA_FR( 6)) | ||
356 | stdfi fr8 ,@(gr8,#__FPMEDIA_FR( 8)) | ||
357 | stdfi fr10,@(gr8,#__FPMEDIA_FR(10)) | ||
358 | stdfi fr12,@(gr8,#__FPMEDIA_FR(12)) | ||
359 | stdfi fr14,@(gr8,#__FPMEDIA_FR(14)) | ||
360 | stdfi fr16,@(gr8,#__FPMEDIA_FR(16)) | ||
361 | stdfi fr18,@(gr8,#__FPMEDIA_FR(18)) | ||
362 | stdfi fr20,@(gr8,#__FPMEDIA_FR(20)) | ||
363 | stdfi fr22,@(gr8,#__FPMEDIA_FR(22)) | ||
364 | stdfi fr24,@(gr8,#__FPMEDIA_FR(24)) | ||
365 | stdfi fr26,@(gr8,#__FPMEDIA_FR(26)) | ||
366 | stdfi fr28,@(gr8,#__FPMEDIA_FR(28)) | ||
367 | stdfi.p fr30,@(gr8,#__FPMEDIA_FR(30)) | ||
368 | |||
369 | # some CPU's have FR32-FR63 | ||
370 | setlos #HSR0_FRHE,gr4 | ||
371 | andcc gr6,gr4,gr0,icc0 | ||
372 | beq icc0,#1,__save_skip_fr32_fr63 | ||
373 | |||
374 | stdfi fr32,@(gr8,#__FPMEDIA_FR(32)) | ||
375 | stdfi fr34,@(gr8,#__FPMEDIA_FR(34)) | ||
376 | stdfi fr36,@(gr8,#__FPMEDIA_FR(36)) | ||
377 | stdfi fr38,@(gr8,#__FPMEDIA_FR(38)) | ||
378 | stdfi fr40,@(gr8,#__FPMEDIA_FR(40)) | ||
379 | stdfi fr42,@(gr8,#__FPMEDIA_FR(42)) | ||
380 | stdfi fr44,@(gr8,#__FPMEDIA_FR(44)) | ||
381 | stdfi fr46,@(gr8,#__FPMEDIA_FR(46)) | ||
382 | stdfi fr48,@(gr8,#__FPMEDIA_FR(48)) | ||
383 | stdfi fr50,@(gr8,#__FPMEDIA_FR(50)) | ||
384 | stdfi fr52,@(gr8,#__FPMEDIA_FR(52)) | ||
385 | stdfi fr54,@(gr8,#__FPMEDIA_FR(54)) | ||
386 | stdfi fr56,@(gr8,#__FPMEDIA_FR(56)) | ||
387 | stdfi fr58,@(gr8,#__FPMEDIA_FR(58)) | ||
388 | stdfi fr60,@(gr8,#__FPMEDIA_FR(60)) | ||
389 | stdfi fr62,@(gr8,#__FPMEDIA_FR(62)) | ||
390 | __save_skip_fr32_fr63: | ||
391 | |||
392 | mrdacc acc0 ,fr4 | ||
393 | mrdacc acc1 ,fr5 | ||
394 | |||
395 | stdfi.p fr4 ,@(gr8,#__FPMEDIA_ACC(0)) | ||
396 | |||
397 | mrdacc acc2 ,fr6 | ||
398 | mrdacc acc3 ,fr7 | ||
399 | |||
400 | stdfi.p fr6 ,@(gr8,#__FPMEDIA_ACC(2)) | ||
401 | |||
402 | mrdaccg accg0,fr4 | ||
403 | stbfi.p fr4 ,@(gr8,#__FPMEDIA_ACCG(0)) | ||
404 | |||
405 | mrdaccg accg1,fr5 | ||
406 | stbfi.p fr5 ,@(gr8,#__FPMEDIA_ACCG(1)) | ||
407 | |||
408 | mrdaccg accg2,fr6 | ||
409 | stbfi.p fr6 ,@(gr8,#__FPMEDIA_ACCG(2)) | ||
410 | |||
411 | mrdaccg accg3,fr7 | ||
412 | stbfi fr7 ,@(gr8,#__FPMEDIA_ACCG(3)) | ||
413 | |||
414 | movsg msr0 ,gr4 | ||
415 | movsg msr1 ,gr5 | ||
416 | |||
417 | stdi gr4 ,@(gr8,#__FPMEDIA_MSR(0)) | ||
418 | |||
419 | # some CPUs have extra ACCx and ACCGx regs and maybe FSRx regs | ||
420 | subicc.p gr7,#0x50,gr0,icc0 | ||
421 | subicc gr7,#0x31,gr0,icc1 | ||
422 | beq icc0,#0,__save_acc_fr451 | ||
423 | beq icc1,#0,__save_acc_fr555 | ||
424 | __save_acc_cont: | ||
425 | |||
426 | lddfi @(gr8,#__FPMEDIA_FR(4)),fr4 | ||
427 | lddfi.p @(gr8,#__FPMEDIA_FR(6)),fr6 | ||
428 | bralr | ||
429 | |||
430 | # the FR451 also has ACC8-11/ACCG8-11 regs (but not 4-7...) | ||
431 | __save_acc_fr451: | ||
432 | mrdacc acc8 ,fr4 | ||
433 | mrdacc acc9 ,fr5 | ||
434 | |||
435 | stdfi.p fr4 ,@(gr8,#__FPMEDIA_ACC(4)) | ||
436 | |||
437 | mrdacc acc10,fr6 | ||
438 | mrdacc acc11,fr7 | ||
439 | |||
440 | stdfi.p fr6 ,@(gr8,#__FPMEDIA_ACC(6)) | ||
441 | |||
442 | mrdaccg accg8,fr4 | ||
443 | stbfi.p fr4 ,@(gr8,#__FPMEDIA_ACCG(4)) | ||
444 | |||
445 | mrdaccg accg9,fr5 | ||
446 | stbfi.p fr5 ,@(gr8,#__FPMEDIA_ACCG(5)) | ||
447 | |||
448 | mrdaccg accg10,fr6 | ||
449 | stbfi.p fr6 ,@(gr8,#__FPMEDIA_ACCG(6)) | ||
450 | |||
451 | mrdaccg accg11,fr7 | ||
452 | stbfi fr7 ,@(gr8,#__FPMEDIA_ACCG(7)) | ||
453 | bra __save_acc_cont | ||
454 | |||
455 | # the FR555 also has ACC4-7/ACCG4-7 regs and an FSR0 reg | ||
456 | __save_acc_fr555: | ||
457 | mnop.p | ||
458 | mrdacc acc4 ,fr4 | ||
459 | mnop.p | ||
460 | mrdacc acc5 ,fr5 | ||
461 | |||
462 | stdfi fr4 ,@(gr8,#__FPMEDIA_ACC(4)) | ||
463 | |||
464 | mnop.p | ||
465 | mrdacc acc6 ,fr6 | ||
466 | mnop.p | ||
467 | mrdacc acc7 ,fr7 | ||
468 | |||
469 | stdfi fr6 ,@(gr8,#__FPMEDIA_ACC(6)) | ||
470 | |||
471 | mnop.p | ||
472 | mrdaccg accg4,fr4 | ||
473 | stbfi fr4 ,@(gr8,#__FPMEDIA_ACCG(4)) | ||
474 | |||
475 | mnop.p | ||
476 | mrdaccg accg5,fr5 | ||
477 | stbfi fr5 ,@(gr8,#__FPMEDIA_ACCG(5)) | ||
478 | |||
479 | mnop.p | ||
480 | mrdaccg accg6,fr6 | ||
481 | stbfi fr6 ,@(gr8,#__FPMEDIA_ACCG(6)) | ||
482 | |||
483 | mnop.p | ||
484 | mrdaccg accg7,fr7 | ||
485 | stbfi fr7 ,@(gr8,#__FPMEDIA_ACCG(7)) | ||
486 | |||
487 | movsg fsr0 ,gr4 | ||
488 | sti gr4 ,@(gr8,#__FPMEDIA_FSR(0)) | ||
489 | bra __save_acc_cont | ||
diff --git a/arch/frv/kernel/sys_frv.c b/arch/frv/kernel/sys_frv.c deleted file mode 100644 index f80cc8b9bd45..000000000000 --- a/arch/frv/kernel/sys_frv.c +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* sys_frv.c: FRV arch-specific syscall wrappers | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/m68k/kernel/sys_m68k.c | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/errno.h> | ||
14 | #include <linux/sched.h> | ||
15 | #include <linux/mm.h> | ||
16 | #include <linux/fs.h> | ||
17 | #include <linux/smp.h> | ||
18 | #include <linux/sem.h> | ||
19 | #include <linux/msg.h> | ||
20 | #include <linux/shm.h> | ||
21 | #include <linux/stat.h> | ||
22 | #include <linux/mman.h> | ||
23 | #include <linux/file.h> | ||
24 | #include <linux/syscalls.h> | ||
25 | #include <linux/ipc.h> | ||
26 | |||
27 | #include <asm/setup.h> | ||
28 | #include <linux/uaccess.h> | ||
29 | |||
30 | asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, | ||
31 | unsigned long prot, unsigned long flags, | ||
32 | unsigned long fd, unsigned long pgoff) | ||
33 | { | ||
34 | /* As with sparc32, make sure the shift for mmap2 is constant | ||
35 | (12), no matter what PAGE_SIZE we have.... */ | ||
36 | |||
37 | /* But unlike sparc32, don't just silently break if we're | ||
38 | trying to map something we can't */ | ||
39 | if (pgoff & ((1 << (PAGE_SHIFT - 12)) - 1)) | ||
40 | return -EINVAL; | ||
41 | |||
42 | return sys_mmap_pgoff(addr, len, prot, flags, fd, | ||
43 | pgoff >> (PAGE_SHIFT - 12)); | ||
44 | } | ||
diff --git a/arch/frv/kernel/sysctl.c b/arch/frv/kernel/sysctl.c deleted file mode 100644 index b54a64971cf1..000000000000 --- a/arch/frv/kernel/sysctl.c +++ /dev/null | |||
@@ -1,221 +0,0 @@ | |||
1 | /* sysctl.c: implementation of /proc/sys files relating to FRV specifically | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/sysctl.h> | ||
13 | #include <linux/proc_fs.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/uaccess.h> | ||
16 | |||
17 | static const char frv_cache_wback[] = "wback"; | ||
18 | static const char frv_cache_wthru[] = "wthru"; | ||
19 | |||
20 | static void frv_change_dcache_mode(unsigned long newmode) | ||
21 | { | ||
22 | unsigned long flags, hsr0; | ||
23 | |||
24 | local_irq_save(flags); | ||
25 | |||
26 | hsr0 = __get_HSR(0); | ||
27 | hsr0 &= ~HSR0_DCE; | ||
28 | __set_HSR(0, hsr0); | ||
29 | |||
30 | asm volatile(" dcef @(gr0,gr0),#1 \n" | ||
31 | " membar \n" | ||
32 | : : : "memory" | ||
33 | ); | ||
34 | |||
35 | hsr0 = (hsr0 & ~HSR0_CBM) | newmode; | ||
36 | __set_HSR(0, hsr0); | ||
37 | hsr0 |= HSR0_DCE; | ||
38 | __set_HSR(0, hsr0); | ||
39 | |||
40 | local_irq_restore(flags); | ||
41 | |||
42 | //printk("HSR0 now %08lx\n", hsr0); | ||
43 | } | ||
44 | |||
45 | /*****************************************************************************/ | ||
46 | /* | ||
47 | * handle requests to dynamically switch the write caching mode delivered by /proc | ||
48 | */ | ||
49 | static int procctl_frv_cachemode(struct ctl_table *table, int write, | ||
50 | void __user *buffer, size_t *lenp, | ||
51 | loff_t *ppos) | ||
52 | { | ||
53 | unsigned long hsr0; | ||
54 | char buff[8]; | ||
55 | int len; | ||
56 | |||
57 | len = *lenp; | ||
58 | |||
59 | if (write) { | ||
60 | /* potential state change */ | ||
61 | if (len <= 1 || len > sizeof(buff) - 1) | ||
62 | return -EINVAL; | ||
63 | |||
64 | if (copy_from_user(buff, buffer, len) != 0) | ||
65 | return -EFAULT; | ||
66 | |||
67 | if (buff[len - 1] == '\n') | ||
68 | buff[len - 1] = '\0'; | ||
69 | else | ||
70 | buff[len] = '\0'; | ||
71 | |||
72 | if (strcmp(buff, frv_cache_wback) == 0) { | ||
73 | /* switch dcache into write-back mode */ | ||
74 | frv_change_dcache_mode(HSR0_CBM_COPY_BACK); | ||
75 | return 0; | ||
76 | } | ||
77 | |||
78 | if (strcmp(buff, frv_cache_wthru) == 0) { | ||
79 | /* switch dcache into write-through mode */ | ||
80 | frv_change_dcache_mode(HSR0_CBM_WRITE_THRU); | ||
81 | return 0; | ||
82 | } | ||
83 | |||
84 | return -EINVAL; | ||
85 | } | ||
86 | |||
87 | /* read the state */ | ||
88 | if (*ppos > 0) { | ||
89 | *lenp = 0; | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | hsr0 = __get_HSR(0); | ||
94 | switch (hsr0 & HSR0_CBM) { | ||
95 | case HSR0_CBM_WRITE_THRU: | ||
96 | memcpy(buff, frv_cache_wthru, sizeof(frv_cache_wthru) - 1); | ||
97 | buff[sizeof(frv_cache_wthru) - 1] = '\n'; | ||
98 | len = sizeof(frv_cache_wthru); | ||
99 | break; | ||
100 | default: | ||
101 | memcpy(buff, frv_cache_wback, sizeof(frv_cache_wback) - 1); | ||
102 | buff[sizeof(frv_cache_wback) - 1] = '\n'; | ||
103 | len = sizeof(frv_cache_wback); | ||
104 | break; | ||
105 | } | ||
106 | |||
107 | if (len > *lenp) | ||
108 | len = *lenp; | ||
109 | |||
110 | if (copy_to_user(buffer, buff, len) != 0) | ||
111 | return -EFAULT; | ||
112 | |||
113 | *lenp = len; | ||
114 | *ppos = len; | ||
115 | return 0; | ||
116 | |||
117 | } /* end procctl_frv_cachemode() */ | ||
118 | |||
119 | /*****************************************************************************/ | ||
120 | /* | ||
121 | * permit the mm_struct the nominated process is using have its MMU context ID pinned | ||
122 | */ | ||
123 | #ifdef CONFIG_MMU | ||
124 | static int procctl_frv_pin_cxnr(struct ctl_table *table, int write, | ||
125 | void __user *buffer, size_t *lenp, | ||
126 | loff_t *ppos) | ||
127 | { | ||
128 | pid_t pid; | ||
129 | char buff[16], *p; | ||
130 | int len; | ||
131 | |||
132 | len = *lenp; | ||
133 | |||
134 | if (write) { | ||
135 | /* potential state change */ | ||
136 | if (len <= 1 || len > sizeof(buff) - 1) | ||
137 | return -EINVAL; | ||
138 | |||
139 | if (copy_from_user(buff, buffer, len) != 0) | ||
140 | return -EFAULT; | ||
141 | |||
142 | if (buff[len - 1] == '\n') | ||
143 | buff[len - 1] = '\0'; | ||
144 | else | ||
145 | buff[len] = '\0'; | ||
146 | |||
147 | pid = simple_strtoul(buff, &p, 10); | ||
148 | if (*p) | ||
149 | return -EINVAL; | ||
150 | |||
151 | return cxn_pin_by_pid(pid); | ||
152 | } | ||
153 | |||
154 | /* read the currently pinned CXN */ | ||
155 | if (*ppos > 0) { | ||
156 | *lenp = 0; | ||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | len = snprintf(buff, sizeof(buff), "%d\n", cxn_pinned); | ||
161 | if (len > *lenp) | ||
162 | len = *lenp; | ||
163 | |||
164 | if (copy_to_user(buffer, buff, len) != 0) | ||
165 | return -EFAULT; | ||
166 | |||
167 | *lenp = len; | ||
168 | *ppos = len; | ||
169 | return 0; | ||
170 | |||
171 | } /* end procctl_frv_pin_cxnr() */ | ||
172 | #endif | ||
173 | |||
174 | /* | ||
175 | * FR-V specific sysctls | ||
176 | */ | ||
177 | static struct ctl_table frv_table[] = | ||
178 | { | ||
179 | { | ||
180 | .procname = "cache-mode", | ||
181 | .data = NULL, | ||
182 | .maxlen = 0, | ||
183 | .mode = 0644, | ||
184 | .proc_handler = procctl_frv_cachemode, | ||
185 | }, | ||
186 | #ifdef CONFIG_MMU | ||
187 | { | ||
188 | .procname = "pin-cxnr", | ||
189 | .data = NULL, | ||
190 | .maxlen = 0, | ||
191 | .mode = 0644, | ||
192 | .proc_handler = procctl_frv_pin_cxnr | ||
193 | }, | ||
194 | #endif | ||
195 | {} | ||
196 | }; | ||
197 | |||
198 | /* | ||
199 | * Use a temporary sysctl number. Horrid, but will be cleaned up in 2.6 | ||
200 | * when all the PM interfaces exist nicely. | ||
201 | */ | ||
202 | static struct ctl_table frv_dir_table[] = | ||
203 | { | ||
204 | { | ||
205 | .procname = "frv", | ||
206 | .mode = 0555, | ||
207 | .child = frv_table | ||
208 | }, | ||
209 | {} | ||
210 | }; | ||
211 | |||
212 | /* | ||
213 | * Initialize power interface | ||
214 | */ | ||
215 | static int __init frv_sysctl_init(void) | ||
216 | { | ||
217 | register_sysctl_table(frv_dir_table); | ||
218 | return 0; | ||
219 | } | ||
220 | |||
221 | __initcall(frv_sysctl_init); | ||
diff --git a/arch/frv/kernel/time.c b/arch/frv/kernel/time.c deleted file mode 100644 index 332e00bf9d06..000000000000 --- a/arch/frv/kernel/time.c +++ /dev/null | |||
@@ -1,122 +0,0 @@ | |||
1 | /* time.c: FRV arch-specific time handling | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/m68k/kernel/time.c | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/param.h> | ||
18 | #include <linux/string.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/profile.h> | ||
21 | #include <linux/irq.h> | ||
22 | #include <linux/mm.h> | ||
23 | |||
24 | #include <asm/io.h> | ||
25 | #include <asm/timer-regs.h> | ||
26 | #include <asm/mb-regs.h> | ||
27 | #include <asm/mb86943a.h> | ||
28 | |||
29 | #include <linux/timex.h> | ||
30 | |||
31 | #define TICK_SIZE (tick_nsec / 1000) | ||
32 | |||
33 | unsigned long __nongprelbss __clkin_clock_speed_HZ; | ||
34 | unsigned long __nongprelbss __ext_bus_clock_speed_HZ; | ||
35 | unsigned long __nongprelbss __res_bus_clock_speed_HZ; | ||
36 | unsigned long __nongprelbss __sdram_clock_speed_HZ; | ||
37 | unsigned long __nongprelbss __core_bus_clock_speed_HZ; | ||
38 | unsigned long __nongprelbss __core_clock_speed_HZ; | ||
39 | unsigned long __nongprelbss __dsu_clock_speed_HZ; | ||
40 | unsigned long __nongprelbss __serial_clock_speed_HZ; | ||
41 | unsigned long __delay_loops_MHz; | ||
42 | |||
43 | static irqreturn_t timer_interrupt(int irq, void *dummy); | ||
44 | |||
45 | static struct irqaction timer_irq = { | ||
46 | .handler = timer_interrupt, | ||
47 | .name = "timer", | ||
48 | }; | ||
49 | |||
50 | /* | ||
51 | * timer_interrupt() needs to keep up the real-time clock, | ||
52 | * as well as call the "xtime_update()" routine every clocktick | ||
53 | */ | ||
54 | static irqreturn_t timer_interrupt(int irq, void *dummy) | ||
55 | { | ||
56 | profile_tick(CPU_PROFILING); | ||
57 | |||
58 | xtime_update(1); | ||
59 | |||
60 | #ifdef CONFIG_HEARTBEAT | ||
61 | static unsigned short n; | ||
62 | n++; | ||
63 | __set_LEDS(n); | ||
64 | #endif /* CONFIG_HEARTBEAT */ | ||
65 | |||
66 | update_process_times(user_mode(get_irq_regs())); | ||
67 | |||
68 | return IRQ_HANDLED; | ||
69 | } | ||
70 | |||
71 | void time_divisor_init(void) | ||
72 | { | ||
73 | unsigned short base, pre, prediv; | ||
74 | |||
75 | /* set the scheduling timer going */ | ||
76 | pre = 1; | ||
77 | prediv = 4; | ||
78 | base = __res_bus_clock_speed_HZ / pre / HZ / (1 << prediv); | ||
79 | |||
80 | __set_TPRV(pre); | ||
81 | __set_TxCKSL_DATA(0, prediv); | ||
82 | __set_TCTR(TCTR_SC_CTR0 | TCTR_RL_RW_LH8 | TCTR_MODE_2); | ||
83 | __set_TCSR_DATA(0, base & 0xff); | ||
84 | __set_TCSR_DATA(0, base >> 8); | ||
85 | } | ||
86 | |||
87 | |||
88 | void read_persistent_clock(struct timespec *ts) | ||
89 | { | ||
90 | unsigned int year, mon, day, hour, min, sec; | ||
91 | |||
92 | extern void arch_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); | ||
93 | |||
94 | /* FIX by dqg : Set to zero for platforms that don't have tod */ | ||
95 | /* without this time is undefined and can overflow time_t, causing */ | ||
96 | /* very strange errors */ | ||
97 | year = 1980; | ||
98 | mon = day = 1; | ||
99 | hour = min = sec = 0; | ||
100 | arch_gettod (&year, &mon, &day, &hour, &min, &sec); | ||
101 | |||
102 | if ((year += 1900) < 1970) | ||
103 | year += 100; | ||
104 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); | ||
105 | ts->tv_nsec = 0; | ||
106 | } | ||
107 | |||
108 | void time_init(void) | ||
109 | { | ||
110 | /* install scheduling interrupt handler */ | ||
111 | setup_irq(IRQ_CPU_TIMER0, &timer_irq); | ||
112 | |||
113 | time_divisor_init(); | ||
114 | } | ||
115 | |||
116 | /* | ||
117 | * Scheduler clock - returns current time in nanosec units. | ||
118 | */ | ||
119 | unsigned long long sched_clock(void) | ||
120 | { | ||
121 | return jiffies_64 * (1000000000 / HZ); | ||
122 | } | ||
diff --git a/arch/frv/kernel/traps.c b/arch/frv/kernel/traps.c deleted file mode 100644 index fb08ebe0dab4..000000000000 --- a/arch/frv/kernel/traps.c +++ /dev/null | |||
@@ -1,642 +0,0 @@ | |||
1 | /* traps.c: high-level exception handler for FR-V | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/sched/signal.h> | ||
13 | #include <linux/sched/debug.h> | ||
14 | #include <linux/signal.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/types.h> | ||
18 | #include <linux/user.h> | ||
19 | #include <linux/string.h> | ||
20 | #include <linux/linkage.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/module.h> | ||
23 | |||
24 | #include <asm/asm-offsets.h> | ||
25 | #include <asm/setup.h> | ||
26 | #include <asm/fpu.h> | ||
27 | #include <linux/uaccess.h> | ||
28 | #include <asm/pgtable.h> | ||
29 | #include <asm/siginfo.h> | ||
30 | #include <asm/unaligned.h> | ||
31 | |||
32 | void show_backtrace(struct pt_regs *, unsigned long); | ||
33 | |||
34 | extern asmlinkage void __break_hijack_kernel_event(void); | ||
35 | |||
36 | /*****************************************************************************/ | ||
37 | /* | ||
38 | * instruction access error | ||
39 | */ | ||
40 | asmlinkage void insn_access_error(unsigned long esfr1, unsigned long epcr0, unsigned long esr0) | ||
41 | { | ||
42 | siginfo_t info; | ||
43 | |||
44 | die_if_kernel("-- Insn Access Error --\n" | ||
45 | "EPCR0 : %08lx\n" | ||
46 | "ESR0 : %08lx\n", | ||
47 | epcr0, esr0); | ||
48 | |||
49 | info.si_signo = SIGSEGV; | ||
50 | info.si_code = SEGV_ACCERR; | ||
51 | info.si_errno = 0; | ||
52 | info.si_addr = (void __user *) ((epcr0 & EPCR0_V) ? (epcr0 & EPCR0_PC) : __frame->pc); | ||
53 | |||
54 | force_sig_info(info.si_signo, &info, current); | ||
55 | } /* end insn_access_error() */ | ||
56 | |||
57 | /*****************************************************************************/ | ||
58 | /* | ||
59 | * handler for: | ||
60 | * - illegal instruction | ||
61 | * - privileged instruction | ||
62 | * - unsupported trap | ||
63 | * - debug exceptions | ||
64 | */ | ||
65 | asmlinkage void illegal_instruction(unsigned long esfr1, unsigned long epcr0, unsigned long esr0) | ||
66 | { | ||
67 | siginfo_t info; | ||
68 | |||
69 | die_if_kernel("-- Illegal Instruction --\n" | ||
70 | "EPCR0 : %08lx\n" | ||
71 | "ESR0 : %08lx\n" | ||
72 | "ESFR1 : %08lx\n", | ||
73 | epcr0, esr0, esfr1); | ||
74 | |||
75 | info.si_errno = 0; | ||
76 | info.si_addr = (void __user *) ((epcr0 & EPCR0_V) ? (epcr0 & EPCR0_PC) : __frame->pc); | ||
77 | |||
78 | switch (__frame->tbr & TBR_TT) { | ||
79 | case TBR_TT_ILLEGAL_INSTR: | ||
80 | info.si_signo = SIGILL; | ||
81 | info.si_code = ILL_ILLOPC; | ||
82 | break; | ||
83 | case TBR_TT_PRIV_INSTR: | ||
84 | info.si_signo = SIGILL; | ||
85 | info.si_code = ILL_PRVOPC; | ||
86 | break; | ||
87 | case TBR_TT_TRAP2 ... TBR_TT_TRAP126: | ||
88 | info.si_signo = SIGILL; | ||
89 | info.si_code = ILL_ILLTRP; | ||
90 | break; | ||
91 | /* GDB uses "tira gr0, #1" as a breakpoint instruction. */ | ||
92 | case TBR_TT_TRAP1: | ||
93 | case TBR_TT_BREAK: | ||
94 | info.si_signo = SIGTRAP; | ||
95 | info.si_code = | ||
96 | (__frame->__status & REG__STATUS_STEPPED) ? TRAP_TRACE : TRAP_BRKPT; | ||
97 | break; | ||
98 | } | ||
99 | |||
100 | force_sig_info(info.si_signo, &info, current); | ||
101 | } /* end illegal_instruction() */ | ||
102 | |||
103 | /*****************************************************************************/ | ||
104 | /* | ||
105 | * handle atomic operations with errors | ||
106 | * - arguments in gr8, gr9, gr10 | ||
107 | * - original memory value placed in gr5 | ||
108 | * - replacement memory value placed in gr9 | ||
109 | */ | ||
110 | asmlinkage void atomic_operation(unsigned long esfr1, unsigned long epcr0, | ||
111 | unsigned long esr0) | ||
112 | { | ||
113 | static DEFINE_SPINLOCK(atomic_op_lock); | ||
114 | unsigned long x, y, z; | ||
115 | unsigned long __user *p; | ||
116 | mm_segment_t oldfs; | ||
117 | siginfo_t info; | ||
118 | int ret; | ||
119 | |||
120 | y = 0; | ||
121 | z = 0; | ||
122 | |||
123 | oldfs = get_fs(); | ||
124 | if (!user_mode(__frame)) | ||
125 | set_fs(KERNEL_DS); | ||
126 | |||
127 | switch (__frame->tbr & TBR_TT) { | ||
128 | /* TIRA gr0,#120 | ||
129 | * u32 __atomic_user_cmpxchg32(u32 *ptr, u32 test, u32 new) | ||
130 | */ | ||
131 | case TBR_TT_ATOMIC_CMPXCHG32: | ||
132 | p = (unsigned long __user *) __frame->gr8; | ||
133 | x = __frame->gr9; | ||
134 | y = __frame->gr10; | ||
135 | |||
136 | for (;;) { | ||
137 | ret = get_user(z, p); | ||
138 | if (ret < 0) | ||
139 | goto error; | ||
140 | |||
141 | if (z != x) | ||
142 | goto done; | ||
143 | |||
144 | spin_lock_irq(&atomic_op_lock); | ||
145 | |||
146 | if (__get_user(z, p) == 0) { | ||
147 | if (z != x) | ||
148 | goto done2; | ||
149 | |||
150 | if (__put_user(y, p) == 0) | ||
151 | goto done2; | ||
152 | goto error2; | ||
153 | } | ||
154 | |||
155 | spin_unlock_irq(&atomic_op_lock); | ||
156 | } | ||
157 | |||
158 | /* TIRA gr0,#121 | ||
159 | * u32 __atomic_kernel_xchg32(void *v, u32 new) | ||
160 | */ | ||
161 | case TBR_TT_ATOMIC_XCHG32: | ||
162 | p = (unsigned long __user *) __frame->gr8; | ||
163 | y = __frame->gr9; | ||
164 | |||
165 | for (;;) { | ||
166 | ret = get_user(z, p); | ||
167 | if (ret < 0) | ||
168 | goto error; | ||
169 | |||
170 | spin_lock_irq(&atomic_op_lock); | ||
171 | |||
172 | if (__get_user(z, p) == 0) { | ||
173 | if (__put_user(y, p) == 0) | ||
174 | goto done2; | ||
175 | goto error2; | ||
176 | } | ||
177 | |||
178 | spin_unlock_irq(&atomic_op_lock); | ||
179 | } | ||
180 | |||
181 | /* TIRA gr0,#122 | ||
182 | * ulong __atomic_kernel_XOR_return(ulong i, ulong *v) | ||
183 | */ | ||
184 | case TBR_TT_ATOMIC_XOR: | ||
185 | p = (unsigned long __user *) __frame->gr8; | ||
186 | x = __frame->gr9; | ||
187 | |||
188 | for (;;) { | ||
189 | ret = get_user(z, p); | ||
190 | if (ret < 0) | ||
191 | goto error; | ||
192 | |||
193 | spin_lock_irq(&atomic_op_lock); | ||
194 | |||
195 | if (__get_user(z, p) == 0) { | ||
196 | y = x ^ z; | ||
197 | if (__put_user(y, p) == 0) | ||
198 | goto done2; | ||
199 | goto error2; | ||
200 | } | ||
201 | |||
202 | spin_unlock_irq(&atomic_op_lock); | ||
203 | } | ||
204 | |||
205 | /* TIRA gr0,#123 | ||
206 | * ulong __atomic_kernel_OR_return(ulong i, ulong *v) | ||
207 | */ | ||
208 | case TBR_TT_ATOMIC_OR: | ||
209 | p = (unsigned long __user *) __frame->gr8; | ||
210 | x = __frame->gr9; | ||
211 | |||
212 | for (;;) { | ||
213 | ret = get_user(z, p); | ||
214 | if (ret < 0) | ||
215 | goto error; | ||
216 | |||
217 | spin_lock_irq(&atomic_op_lock); | ||
218 | |||
219 | if (__get_user(z, p) == 0) { | ||
220 | y = x ^ z; | ||
221 | if (__put_user(y, p) == 0) | ||
222 | goto done2; | ||
223 | goto error2; | ||
224 | } | ||
225 | |||
226 | spin_unlock_irq(&atomic_op_lock); | ||
227 | } | ||
228 | |||
229 | /* TIRA gr0,#124 | ||
230 | * ulong __atomic_kernel_AND_return(ulong i, ulong *v) | ||
231 | */ | ||
232 | case TBR_TT_ATOMIC_AND: | ||
233 | p = (unsigned long __user *) __frame->gr8; | ||
234 | x = __frame->gr9; | ||
235 | |||
236 | for (;;) { | ||
237 | ret = get_user(z, p); | ||
238 | if (ret < 0) | ||
239 | goto error; | ||
240 | |||
241 | spin_lock_irq(&atomic_op_lock); | ||
242 | |||
243 | if (__get_user(z, p) == 0) { | ||
244 | y = x & z; | ||
245 | if (__put_user(y, p) == 0) | ||
246 | goto done2; | ||
247 | goto error2; | ||
248 | } | ||
249 | |||
250 | spin_unlock_irq(&atomic_op_lock); | ||
251 | } | ||
252 | |||
253 | /* TIRA gr0,#125 | ||
254 | * int __atomic_user_sub_return(atomic_t *v, int i) | ||
255 | */ | ||
256 | case TBR_TT_ATOMIC_SUB: | ||
257 | p = (unsigned long __user *) __frame->gr8; | ||
258 | x = __frame->gr9; | ||
259 | |||
260 | for (;;) { | ||
261 | ret = get_user(z, p); | ||
262 | if (ret < 0) | ||
263 | goto error; | ||
264 | |||
265 | spin_lock_irq(&atomic_op_lock); | ||
266 | |||
267 | if (__get_user(z, p) == 0) { | ||
268 | y = z - x; | ||
269 | if (__put_user(y, p) == 0) | ||
270 | goto done2; | ||
271 | goto error2; | ||
272 | } | ||
273 | |||
274 | spin_unlock_irq(&atomic_op_lock); | ||
275 | } | ||
276 | |||
277 | /* TIRA gr0,#126 | ||
278 | * int __atomic_user_add_return(atomic_t *v, int i) | ||
279 | */ | ||
280 | case TBR_TT_ATOMIC_ADD: | ||
281 | p = (unsigned long __user *) __frame->gr8; | ||
282 | x = __frame->gr9; | ||
283 | |||
284 | for (;;) { | ||
285 | ret = get_user(z, p); | ||
286 | if (ret < 0) | ||
287 | goto error; | ||
288 | |||
289 | spin_lock_irq(&atomic_op_lock); | ||
290 | |||
291 | if (__get_user(z, p) == 0) { | ||
292 | y = z + x; | ||
293 | if (__put_user(y, p) == 0) | ||
294 | goto done2; | ||
295 | goto error2; | ||
296 | } | ||
297 | |||
298 | spin_unlock_irq(&atomic_op_lock); | ||
299 | } | ||
300 | |||
301 | default: | ||
302 | BUG(); | ||
303 | } | ||
304 | |||
305 | done2: | ||
306 | spin_unlock_irq(&atomic_op_lock); | ||
307 | done: | ||
308 | if (!user_mode(__frame)) | ||
309 | set_fs(oldfs); | ||
310 | __frame->gr5 = z; | ||
311 | __frame->gr9 = y; | ||
312 | return; | ||
313 | |||
314 | error2: | ||
315 | spin_unlock_irq(&atomic_op_lock); | ||
316 | error: | ||
317 | if (!user_mode(__frame)) | ||
318 | set_fs(oldfs); | ||
319 | __frame->pc -= 4; | ||
320 | |||
321 | die_if_kernel("-- Atomic Op Error --\n"); | ||
322 | |||
323 | info.si_signo = SIGSEGV; | ||
324 | info.si_code = SEGV_ACCERR; | ||
325 | info.si_errno = 0; | ||
326 | info.si_addr = (void __user *) __frame->pc; | ||
327 | |||
328 | force_sig_info(info.si_signo, &info, current); | ||
329 | } | ||
330 | |||
331 | /*****************************************************************************/ | ||
332 | /* | ||
333 | * | ||
334 | */ | ||
335 | asmlinkage void media_exception(unsigned long msr0, unsigned long msr1) | ||
336 | { | ||
337 | siginfo_t info; | ||
338 | |||
339 | die_if_kernel("-- Media Exception --\n" | ||
340 | "MSR0 : %08lx\n" | ||
341 | "MSR1 : %08lx\n", | ||
342 | msr0, msr1); | ||
343 | |||
344 | info.si_signo = SIGFPE; | ||
345 | info.si_code = FPE_MDAOVF; | ||
346 | info.si_errno = 0; | ||
347 | info.si_addr = (void __user *) __frame->pc; | ||
348 | |||
349 | force_sig_info(info.si_signo, &info, current); | ||
350 | } /* end media_exception() */ | ||
351 | |||
352 | /*****************************************************************************/ | ||
353 | /* | ||
354 | * instruction or data access exception | ||
355 | */ | ||
356 | asmlinkage void memory_access_exception(unsigned long esr0, | ||
357 | unsigned long ear0, | ||
358 | unsigned long epcr0) | ||
359 | { | ||
360 | siginfo_t info; | ||
361 | |||
362 | #ifdef CONFIG_MMU | ||
363 | if (fixup_exception(__frame)) | ||
364 | return; | ||
365 | #endif | ||
366 | |||
367 | die_if_kernel("-- Memory Access Exception --\n" | ||
368 | "ESR0 : %08lx\n" | ||
369 | "EAR0 : %08lx\n" | ||
370 | "EPCR0 : %08lx\n", | ||
371 | esr0, ear0, epcr0); | ||
372 | |||
373 | info.si_signo = SIGSEGV; | ||
374 | info.si_code = SEGV_ACCERR; | ||
375 | info.si_errno = 0; | ||
376 | info.si_addr = NULL; | ||
377 | |||
378 | if ((esr0 & (ESRx_VALID | ESR0_EAV)) == (ESRx_VALID | ESR0_EAV)) | ||
379 | info.si_addr = (void __user *) ear0; | ||
380 | |||
381 | force_sig_info(info.si_signo, &info, current); | ||
382 | |||
383 | } /* end memory_access_exception() */ | ||
384 | |||
385 | /*****************************************************************************/ | ||
386 | /* | ||
387 | * data access error | ||
388 | * - double-word data load from CPU control area (0xFExxxxxx) | ||
389 | * - read performed on inactive or self-refreshing SDRAM | ||
390 | * - error notification from slave device | ||
391 | * - misaligned address | ||
392 | * - access to out of bounds memory region | ||
393 | * - user mode accessing privileged memory region | ||
394 | * - write to R/O memory region | ||
395 | */ | ||
396 | asmlinkage void data_access_error(unsigned long esfr1, unsigned long esr15, unsigned long ear15) | ||
397 | { | ||
398 | siginfo_t info; | ||
399 | |||
400 | die_if_kernel("-- Data Access Error --\n" | ||
401 | "ESR15 : %08lx\n" | ||
402 | "EAR15 : %08lx\n", | ||
403 | esr15, ear15); | ||
404 | |||
405 | info.si_signo = SIGSEGV; | ||
406 | info.si_code = SEGV_ACCERR; | ||
407 | info.si_errno = 0; | ||
408 | info.si_addr = (void __user *) | ||
409 | (((esr15 & (ESRx_VALID|ESR15_EAV)) == (ESRx_VALID|ESR15_EAV)) ? ear15 : 0); | ||
410 | |||
411 | force_sig_info(info.si_signo, &info, current); | ||
412 | } /* end data_access_error() */ | ||
413 | |||
414 | /*****************************************************************************/ | ||
415 | /* | ||
416 | * data store error - should only happen if accessing inactive or self-refreshing SDRAM | ||
417 | */ | ||
418 | asmlinkage void data_store_error(unsigned long esfr1, unsigned long esr15) | ||
419 | { | ||
420 | die_if_kernel("-- Data Store Error --\n" | ||
421 | "ESR15 : %08lx\n", | ||
422 | esr15); | ||
423 | BUG(); | ||
424 | } /* end data_store_error() */ | ||
425 | |||
426 | /*****************************************************************************/ | ||
427 | /* | ||
428 | * | ||
429 | */ | ||
430 | asmlinkage void division_exception(unsigned long esfr1, unsigned long esr0, unsigned long isr) | ||
431 | { | ||
432 | siginfo_t info; | ||
433 | |||
434 | die_if_kernel("-- Division Exception --\n" | ||
435 | "ESR0 : %08lx\n" | ||
436 | "ISR : %08lx\n", | ||
437 | esr0, isr); | ||
438 | |||
439 | info.si_signo = SIGFPE; | ||
440 | info.si_code = FPE_INTDIV; | ||
441 | info.si_errno = 0; | ||
442 | info.si_addr = (void __user *) __frame->pc; | ||
443 | |||
444 | force_sig_info(info.si_signo, &info, current); | ||
445 | } /* end division_exception() */ | ||
446 | |||
447 | /*****************************************************************************/ | ||
448 | /* | ||
449 | * | ||
450 | */ | ||
451 | asmlinkage void compound_exception(unsigned long esfr1, | ||
452 | unsigned long esr0, unsigned long esr14, unsigned long esr15, | ||
453 | unsigned long msr0, unsigned long msr1) | ||
454 | { | ||
455 | die_if_kernel("-- Compound Exception --\n" | ||
456 | "ESR0 : %08lx\n" | ||
457 | "ESR15 : %08lx\n" | ||
458 | "ESR15 : %08lx\n" | ||
459 | "MSR0 : %08lx\n" | ||
460 | "MSR1 : %08lx\n", | ||
461 | esr0, esr14, esr15, msr0, msr1); | ||
462 | BUG(); | ||
463 | } /* end compound_exception() */ | ||
464 | |||
465 | void show_stack(struct task_struct *task, unsigned long *sp) | ||
466 | { | ||
467 | } | ||
468 | |||
469 | void show_trace_task(struct task_struct *tsk) | ||
470 | { | ||
471 | printk("CONTEXT: stack=0x%lx frame=0x%p LR=0x%lx RET=0x%lx\n", | ||
472 | tsk->thread.sp, tsk->thread.frame, tsk->thread.lr, tsk->thread.sched_lr); | ||
473 | } | ||
474 | |||
475 | static const char *regnames[] = { | ||
476 | "PSR ", "ISR ", "CCR ", "CCCR", | ||
477 | "LR ", "LCR ", "PC ", "_stt", | ||
478 | "sys ", "GR8*", "GNE0", "GNE1", | ||
479 | "IACH", "IACL", | ||
480 | "TBR ", "SP ", "FP ", "GR3 ", | ||
481 | "GR4 ", "GR5 ", "GR6 ", "GR7 ", | ||
482 | "GR8 ", "GR9 ", "GR10", "GR11", | ||
483 | "GR12", "GR13", "GR14", "GR15", | ||
484 | "GR16", "GR17", "GR18", "GR19", | ||
485 | "GR20", "GR21", "GR22", "GR23", | ||
486 | "GR24", "GR25", "GR26", "GR27", | ||
487 | "EFRM", "CURR", "GR30", "BFRM" | ||
488 | }; | ||
489 | |||
490 | void show_regs(struct pt_regs *regs) | ||
491 | { | ||
492 | unsigned long *reg; | ||
493 | int loop; | ||
494 | |||
495 | printk("\n"); | ||
496 | show_regs_print_info(KERN_DEFAULT); | ||
497 | |||
498 | printk("Frame: @%08lx [%s]\n", | ||
499 | (unsigned long) regs, | ||
500 | regs->psr & PSR_S ? "kernel" : "user"); | ||
501 | |||
502 | reg = (unsigned long *) regs; | ||
503 | for (loop = 0; loop < NR_PT_REGS; loop++) { | ||
504 | printk("%s %08lx", regnames[loop + 0], reg[loop + 0]); | ||
505 | |||
506 | if (loop == NR_PT_REGS - 1 || loop % 5 == 4) | ||
507 | printk("\n"); | ||
508 | else | ||
509 | printk(" | "); | ||
510 | } | ||
511 | } | ||
512 | |||
513 | void die_if_kernel(const char *str, ...) | ||
514 | { | ||
515 | char buffer[256]; | ||
516 | va_list va; | ||
517 | |||
518 | if (user_mode(__frame)) | ||
519 | return; | ||
520 | |||
521 | va_start(va, str); | ||
522 | vsnprintf(buffer, sizeof(buffer), str, va); | ||
523 | va_end(va); | ||
524 | |||
525 | console_verbose(); | ||
526 | printk("\n===================================\n"); | ||
527 | printk("%s\n", buffer); | ||
528 | show_backtrace(__frame, 0); | ||
529 | |||
530 | __break_hijack_kernel_event(); | ||
531 | do_exit(SIGSEGV); | ||
532 | } | ||
533 | |||
534 | /*****************************************************************************/ | ||
535 | /* | ||
536 | * dump the contents of an exception frame | ||
537 | */ | ||
538 | static void show_backtrace_regs(struct pt_regs *frame) | ||
539 | { | ||
540 | unsigned long *reg; | ||
541 | int loop; | ||
542 | |||
543 | /* print the registers for this frame */ | ||
544 | printk("<-- %s Frame: @%p -->\n", | ||
545 | frame->psr & PSR_S ? "Kernel Mode" : "User Mode", | ||
546 | frame); | ||
547 | |||
548 | reg = (unsigned long *) frame; | ||
549 | for (loop = 0; loop < NR_PT_REGS; loop++) { | ||
550 | printk("%s %08lx", regnames[loop + 0], reg[loop + 0]); | ||
551 | |||
552 | if (loop == NR_PT_REGS - 1 || loop % 5 == 4) | ||
553 | printk("\n"); | ||
554 | else | ||
555 | printk(" | "); | ||
556 | } | ||
557 | |||
558 | printk("--------\n"); | ||
559 | } /* end show_backtrace_regs() */ | ||
560 | |||
561 | /*****************************************************************************/ | ||
562 | /* | ||
563 | * generate a backtrace of the kernel stack | ||
564 | */ | ||
565 | void show_backtrace(struct pt_regs *frame, unsigned long sp) | ||
566 | { | ||
567 | struct pt_regs *frame0; | ||
568 | unsigned long tos = 0, stop = 0, base; | ||
569 | int format; | ||
570 | |||
571 | base = ((((unsigned long) frame) + 8191) & ~8191) - sizeof(struct user_context); | ||
572 | frame0 = (struct pt_regs *) base; | ||
573 | |||
574 | if (sp) { | ||
575 | tos = sp; | ||
576 | stop = (unsigned long) frame; | ||
577 | } | ||
578 | |||
579 | printk("\nProcess %s (pid: %d)\n\n", current->comm, current->pid); | ||
580 | |||
581 | for (;;) { | ||
582 | /* dump stack segment between frames */ | ||
583 | //printk("%08lx -> %08lx\n", tos, stop); | ||
584 | format = 0; | ||
585 | while (tos < stop) { | ||
586 | if (format == 0) | ||
587 | printk(" %04lx :", tos & 0xffff); | ||
588 | |||
589 | printk(" %08lx", *(unsigned long *) tos); | ||
590 | |||
591 | tos += 4; | ||
592 | format++; | ||
593 | if (format == 8) { | ||
594 | printk("\n"); | ||
595 | format = 0; | ||
596 | } | ||
597 | } | ||
598 | |||
599 | if (format > 0) | ||
600 | printk("\n"); | ||
601 | |||
602 | /* dump frame 0 outside of the loop */ | ||
603 | if (frame == frame0) | ||
604 | break; | ||
605 | |||
606 | tos = frame->sp; | ||
607 | if (((unsigned long) frame) + sizeof(*frame) != tos) { | ||
608 | printk("-- TOS %08lx does not follow frame %p --\n", | ||
609 | tos, frame); | ||
610 | break; | ||
611 | } | ||
612 | |||
613 | show_backtrace_regs(frame); | ||
614 | |||
615 | /* dump the stack between this frame and the next */ | ||
616 | stop = (unsigned long) frame->next_frame; | ||
617 | if (stop != base && | ||
618 | (stop < tos || | ||
619 | stop > base || | ||
620 | (stop < base && stop + sizeof(*frame) > base) || | ||
621 | stop & 3)) { | ||
622 | printk("-- next_frame %08lx is invalid (range %08lx-%08lx) --\n", | ||
623 | stop, tos, base); | ||
624 | break; | ||
625 | } | ||
626 | |||
627 | /* move to next frame */ | ||
628 | frame = frame->next_frame; | ||
629 | } | ||
630 | |||
631 | /* we can always dump frame 0, even if the rest of the stack is corrupt */ | ||
632 | show_backtrace_regs(frame0); | ||
633 | |||
634 | } /* end show_backtrace() */ | ||
635 | |||
636 | /*****************************************************************************/ | ||
637 | /* | ||
638 | * initialise traps | ||
639 | */ | ||
640 | void __init trap_init (void) | ||
641 | { | ||
642 | } /* end trap_init() */ | ||
diff --git a/arch/frv/kernel/uaccess.c b/arch/frv/kernel/uaccess.c deleted file mode 100644 index 8b360b4222a5..000000000000 --- a/arch/frv/kernel/uaccess.c +++ /dev/null | |||
@@ -1,100 +0,0 @@ | |||
1 | /* uaccess.c: userspace access functions | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/mm.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/uaccess.h> | ||
15 | |||
16 | /*****************************************************************************/ | ||
17 | /* | ||
18 | * copy a null terminated string from userspace | ||
19 | */ | ||
20 | long strncpy_from_user(char *dst, const char __user *src, long count) | ||
21 | { | ||
22 | unsigned long max; | ||
23 | char *p, ch; | ||
24 | long err = -EFAULT; | ||
25 | |||
26 | BUG_ON(count < 0); | ||
27 | |||
28 | p = dst; | ||
29 | |||
30 | #ifndef CONFIG_MMU | ||
31 | if ((unsigned long) src < memory_start) | ||
32 | goto error; | ||
33 | #endif | ||
34 | |||
35 | if ((unsigned long) src >= get_addr_limit()) | ||
36 | goto error; | ||
37 | |||
38 | max = get_addr_limit() - (unsigned long) src; | ||
39 | if ((unsigned long) count > max) { | ||
40 | memset(dst + max, 0, count - max); | ||
41 | count = max; | ||
42 | } | ||
43 | |||
44 | err = 0; | ||
45 | for (; count > 0; count--, p++, src++) { | ||
46 | __get_user_asm(err, ch, src, "ub", "=r"); | ||
47 | if (err < 0) | ||
48 | goto error; | ||
49 | if (!ch) | ||
50 | break; | ||
51 | *p = ch; | ||
52 | } | ||
53 | |||
54 | err = p - dst; /* return length excluding NUL */ | ||
55 | |||
56 | error: | ||
57 | if (count > 0) | ||
58 | memset(p, 0, count); /* clear remainder of buffer [security] */ | ||
59 | |||
60 | return err; | ||
61 | |||
62 | } /* end strncpy_from_user() */ | ||
63 | |||
64 | EXPORT_SYMBOL(strncpy_from_user); | ||
65 | |||
66 | /*****************************************************************************/ | ||
67 | /* | ||
68 | * Return the size of a string (including the ending 0) | ||
69 | * | ||
70 | * Return 0 on exception, a value greater than N if too long | ||
71 | */ | ||
72 | long strnlen_user(const char __user *src, long count) | ||
73 | { | ||
74 | const char __user *p; | ||
75 | long err = 0; | ||
76 | char ch; | ||
77 | |||
78 | BUG_ON(count < 0); | ||
79 | |||
80 | #ifndef CONFIG_MMU | ||
81 | if ((unsigned long) src < memory_start) | ||
82 | return 0; | ||
83 | #endif | ||
84 | |||
85 | if ((unsigned long) src >= get_addr_limit()) | ||
86 | return 0; | ||
87 | |||
88 | for (p = src; count > 0; count--, p++) { | ||
89 | __get_user_asm(err, ch, p, "ub", "=r"); | ||
90 | if (err < 0) | ||
91 | return 0; | ||
92 | if (!ch) | ||
93 | break; | ||
94 | } | ||
95 | |||
96 | return p - src + 1; /* return length including NUL */ | ||
97 | |||
98 | } /* end strnlen_user() */ | ||
99 | |||
100 | EXPORT_SYMBOL(strnlen_user); | ||
diff --git a/arch/frv/kernel/vmlinux.lds.S b/arch/frv/kernel/vmlinux.lds.S deleted file mode 100644 index 42806c512758..000000000000 --- a/arch/frv/kernel/vmlinux.lds.S +++ /dev/null | |||
@@ -1,136 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* ld script to make FRV Linux kernel | ||
3 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>; | ||
4 | */ | ||
5 | OUTPUT_FORMAT("elf32-frv", "elf32-frv", "elf32-frv") | ||
6 | OUTPUT_ARCH(frv) | ||
7 | ENTRY(_start) | ||
8 | |||
9 | #include <asm-generic/vmlinux.lds.h> | ||
10 | #include <asm/processor.h> | ||
11 | #include <asm/page.h> | ||
12 | #include <asm/cache.h> | ||
13 | #include <asm/thread_info.h> | ||
14 | |||
15 | jiffies = jiffies_64 + 4; | ||
16 | |||
17 | __page_offset = CONFIG_PAGE_OFFSET; /* start of area covered by struct pages */ | ||
18 | __kernel_image_start = __page_offset; /* address at which kernel image resides */ | ||
19 | |||
20 | SECTIONS | ||
21 | { | ||
22 | . = __kernel_image_start; | ||
23 | |||
24 | /* discardable initialisation code and data */ | ||
25 | . = ALIGN(PAGE_SIZE); /* Init code and data */ | ||
26 | __init_begin = .; | ||
27 | |||
28 | _sinittext = .; | ||
29 | .init.text : { | ||
30 | HEAD_TEXT | ||
31 | #ifndef CONFIG_DEBUG_INFO | ||
32 | INIT_TEXT | ||
33 | EXIT_TEXT | ||
34 | EXIT_DATA | ||
35 | *(.exitcall.exit) | ||
36 | #endif | ||
37 | } | ||
38 | _einittext = .; | ||
39 | |||
40 | INIT_DATA_SECTION(8) | ||
41 | PERCPU_SECTION(L1_CACHE_BYTES) | ||
42 | |||
43 | . = ALIGN(PAGE_SIZE); | ||
44 | __init_end = .; | ||
45 | |||
46 | .trap : { | ||
47 | /* trap table management - read entry-table.S before modifying */ | ||
48 | . = ALIGN(8192); | ||
49 | __trap_tables = .; | ||
50 | *(.trap.user) | ||
51 | *(.trap.kernel) | ||
52 | . = ALIGN(4096); | ||
53 | *(.trap.break) | ||
54 | } | ||
55 | |||
56 | /* Text and read-only data */ | ||
57 | . = ALIGN(4); | ||
58 | _text = .; | ||
59 | _stext = .; | ||
60 | .text : { | ||
61 | *(.text..start) | ||
62 | *(.text..entry) | ||
63 | *(.text..break) | ||
64 | *(.text..tlbmiss) | ||
65 | TEXT_TEXT | ||
66 | SCHED_TEXT | ||
67 | CPUIDLE_TEXT | ||
68 | LOCK_TEXT | ||
69 | #ifdef CONFIG_DEBUG_INFO | ||
70 | INIT_TEXT | ||
71 | EXIT_TEXT | ||
72 | *(.exitcall.exit) | ||
73 | #endif | ||
74 | *(.fixup) | ||
75 | *(.gnu.warning) | ||
76 | *(.exitcall.exit) | ||
77 | } = 0x9090 | ||
78 | |||
79 | _etext = .; /* End of text section */ | ||
80 | |||
81 | RODATA | ||
82 | |||
83 | .rodata : { | ||
84 | *(.trap.vector) | ||
85 | |||
86 | /* this clause must not be modified - the ordering and adjacency are imperative */ | ||
87 | __trap_fixup_tables = .; | ||
88 | *(.trap.fixup.user .trap.fixup.kernel) | ||
89 | |||
90 | } | ||
91 | |||
92 | EXCEPTION_TABLE(8) | ||
93 | |||
94 | _sdata = .; | ||
95 | .data : { /* Data */ | ||
96 | INIT_TASK_DATA(THREAD_SIZE) | ||
97 | CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) | ||
98 | DATA_DATA | ||
99 | *(.data.*) | ||
100 | EXIT_DATA | ||
101 | CONSTRUCTORS | ||
102 | } | ||
103 | |||
104 | _edata = .; /* End of data section */ | ||
105 | |||
106 | BUG_TABLE | ||
107 | |||
108 | /* GP section */ | ||
109 | . = ALIGN(L1_CACHE_BYTES); | ||
110 | _gp = . + 2048; | ||
111 | PROVIDE (gp = _gp); | ||
112 | |||
113 | .sdata : { *(.sdata .sdata.*) } | ||
114 | |||
115 | /* BSS */ | ||
116 | . = ALIGN(L1_CACHE_BYTES); | ||
117 | __bss_start = .; | ||
118 | |||
119 | .sbss : { *(.sbss .sbss.*) } | ||
120 | .bss : { *(.bss .bss.*) } | ||
121 | .bss..stack : { *(.bss) } | ||
122 | |||
123 | __bss_stop = .; | ||
124 | _end = . ; | ||
125 | . = ALIGN(PAGE_SIZE); | ||
126 | __kernel_image_end = .; | ||
127 | |||
128 | STABS_DEBUG | ||
129 | DWARF_DEBUG | ||
130 | |||
131 | .comment 0 : { *(.comment) } | ||
132 | |||
133 | DISCARDS | ||
134 | } | ||
135 | |||
136 | __kernel_image_size_no_bss = __bss_start - __kernel_image_start; | ||
diff --git a/arch/frv/lib/Makefile b/arch/frv/lib/Makefile deleted file mode 100644 index 970e8b4f1a02..000000000000 --- a/arch/frv/lib/Makefile +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for FRV-specific library files.. | ||
3 | # | ||
4 | |||
5 | lib-y := \ | ||
6 | __ashldi3.o __lshrdi3.o __muldi3.o __ashrdi3.o __negdi2.o __ucmpdi2.o \ | ||
7 | checksum.o memcpy.o memset.o atomic-ops.o atomic64-ops.o \ | ||
8 | outsl_ns.o outsl_sw.o insl_ns.o insl_sw.o cache.o atomic-lib.o | ||
diff --git a/arch/frv/lib/__ashldi3.S b/arch/frv/lib/__ashldi3.S deleted file mode 100644 index db5b6dc37a11..000000000000 --- a/arch/frv/lib/__ashldi3.S +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* __ashldi3.S: 64-bit arithmetic shift left | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | .text | ||
13 | .p2align 4 | ||
14 | |||
15 | ############################################################################### | ||
16 | # | ||
17 | # unsigned long long __ashldi3(unsigned long long value [GR8:GR9], unsigned by [GR10]) | ||
18 | # | ||
19 | ############################################################################### | ||
20 | .globl __ashldi3 | ||
21 | .type __ashldi3,@function | ||
22 | __ashldi3: | ||
23 | andicc.p gr10,#63,gr10,icc0 | ||
24 | setlos #32,gr5 | ||
25 | andicc.p gr10,#32,gr0,icc1 | ||
26 | beqlr icc0,#0 | ||
27 | ckeq icc1,cc4 ; cc4 is true if 0<N<32 | ||
28 | |||
29 | # deal with a shift in the range 1<=N<=31 | ||
30 | csll.p gr8,gr10,gr8 ,cc4,#1 ; MSW <<= N | ||
31 | csub gr5,gr10,gr5 ,cc4,#1 ; M = 32 - N | ||
32 | csrl.p gr9,gr5,gr4 ,cc4,#1 | ||
33 | csll gr9,gr10,gr9 ,cc4,#1 ; LSW <<= N | ||
34 | cor.p gr4,gr8,gr8 ,cc4,#1 ; MSW |= LSW >> M | ||
35 | |||
36 | # deal with a shift in the range 32<=N<=63 | ||
37 | csll gr9,gr10,gr8 ,cc4,#0 ; MSW = LSW << (N & 31 [implicit AND]) | ||
38 | cor.p gr0,gr0,gr9 ,cc4,#0 ; LSW = 0 | ||
39 | bralr | ||
40 | .size __ashldi3, .-__ashldi3 | ||
diff --git a/arch/frv/lib/__ashrdi3.S b/arch/frv/lib/__ashrdi3.S deleted file mode 100644 index 5742665bfd29..000000000000 --- a/arch/frv/lib/__ashrdi3.S +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* __ashrdi3.S: 64-bit arithmetic shift right | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | .text | ||
13 | .p2align 4 | ||
14 | |||
15 | ############################################################################### | ||
16 | # | ||
17 | # signed long long __ashrdi3(signed long long value [GR8:GR9], unsigned by [GR10]) | ||
18 | # | ||
19 | ############################################################################### | ||
20 | .globl __ashrdi3 | ||
21 | .type __ashrdi3,@function | ||
22 | __ashrdi3: | ||
23 | andicc.p gr10,#63,gr10,icc0 | ||
24 | setlos #32,gr5 | ||
25 | andicc.p gr10,#32,gr0,icc1 | ||
26 | beqlr icc0,#0 | ||
27 | setlos.p #31,gr6 | ||
28 | ckeq icc1,cc4 ; cc4 is true if 0<N<32 | ||
29 | |||
30 | # deal with a shift in the range 1<=N<=31 | ||
31 | csrl.p gr9,gr10,gr9 ,cc4,#1 ; LSW >>= N | ||
32 | csub gr5,gr10,gr5 ,cc4,#1 ; M = 32 - N | ||
33 | csll.p gr8,gr5,gr4 ,cc4,#1 | ||
34 | csra gr8,gr10,gr8 ,cc4,#1 ; MSW >>= N | ||
35 | cor.p gr4,gr9,gr9 ,cc4,#1 ; LSW |= MSW << M | ||
36 | |||
37 | # deal with a shift in the range 32<=N<=63 | ||
38 | csra gr8,gr10,gr9 ,cc4,#0 ; LSW = MSW >> (N & 31 [implicit AND]) | ||
39 | csra.p gr8,gr6,gr8 ,cc4,#0 ; MSW >>= 31 | ||
40 | bralr | ||
41 | .size __ashrdi3, .-__ashrdi3 | ||
diff --git a/arch/frv/lib/__lshrdi3.S b/arch/frv/lib/__lshrdi3.S deleted file mode 100644 index 7b41f6304f04..000000000000 --- a/arch/frv/lib/__lshrdi3.S +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* __lshrdi3.S: 64-bit logical shift right | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | .text | ||
13 | .p2align 4 | ||
14 | |||
15 | ############################################################################### | ||
16 | # | ||
17 | # unsigned long long __lshrdi3(unsigned long long value [GR8:GR9], unsigned by [GR10]) | ||
18 | # | ||
19 | ############################################################################### | ||
20 | .globl __lshrdi3 | ||
21 | .type __lshrdi3,@function | ||
22 | __lshrdi3: | ||
23 | andicc.p gr10,#63,gr10,icc0 | ||
24 | setlos #32,gr5 | ||
25 | andicc.p gr10,#32,gr0,icc1 | ||
26 | beqlr icc0,#0 | ||
27 | ckeq icc1,cc4 ; cc4 is true if 0<N<32 | ||
28 | |||
29 | # deal with a shift in the range 1<=N<=31 | ||
30 | csrl.p gr9,gr10,gr9 ,cc4,#1 ; LSW >>= N | ||
31 | csub gr5,gr10,gr5 ,cc4,#1 ; M = 32 - N | ||
32 | csll.p gr8,gr5,gr4 ,cc4,#1 | ||
33 | csrl gr8,gr10,gr8 ,cc4,#1 ; MSW >>= N | ||
34 | cor.p gr4,gr9,gr9 ,cc4,#1 ; LSW |= MSW << M | ||
35 | |||
36 | # deal with a shift in the range 32<=N<=63 | ||
37 | csrl gr8,gr10,gr9 ,cc4,#0 ; LSW = MSW >> (N & 31 [implicit AND]) | ||
38 | cor.p gr0,gr0,gr8 ,cc4,#0 ; MSW = 0 | ||
39 | bralr | ||
40 | .size __lshrdi3, .-__lshrdi3 | ||
diff --git a/arch/frv/lib/__muldi3.S b/arch/frv/lib/__muldi3.S deleted file mode 100644 index 2703d9b79361..000000000000 --- a/arch/frv/lib/__muldi3.S +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* __muldi3.S: 64-bit multiply | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | .text | ||
13 | .p2align 4 | ||
14 | |||
15 | ############################################################################### | ||
16 | # | ||
17 | # unsigned long long __muldi3(unsigned long long x [GR8:GR9], | ||
18 | # unsigned long long y [GR10:GR11]) | ||
19 | # | ||
20 | ############################################################################### | ||
21 | .globl __muldi3, __mulll, __umulll | ||
22 | .type __muldi3,@function | ||
23 | __muldi3: | ||
24 | __mulll: | ||
25 | __umulll: | ||
26 | umul gr8,gr11,gr4 ; GR4:GR5 = x.MSW * y.LSW | ||
27 | umul gr9,gr10,gr6 ; GR6:GR7 = x.LSW * y.MSW | ||
28 | umul.p gr9,gr11,gr8 ; GR8:GR9 = x.LSW * y.LSW | ||
29 | add gr5,gr7,gr5 | ||
30 | add.p gr8,gr5,gr8 ; GR8 += GR5 + GR7 | ||
31 | bralr | ||
32 | .size __muldi3, .-__muldi3 | ||
diff --git a/arch/frv/lib/__negdi2.S b/arch/frv/lib/__negdi2.S deleted file mode 100644 index d1747bf24997..000000000000 --- a/arch/frv/lib/__negdi2.S +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* __negdi2.S: 64-bit negate | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # unsigned long long __negdi2(unsigned long long value [GR8:GR9]) | ||
19 | # | ||
20 | ############################################################################### | ||
21 | .globl __negdi2 | ||
22 | .type __negdi2,@function | ||
23 | __negdi2: | ||
24 | subcc gr0,gr9,gr9,icc0 | ||
25 | subx gr0,gr8,gr8,icc0 | ||
26 | bralr | ||
27 | .size __negdi2, .-__negdi2 | ||
28 | |||
diff --git a/arch/frv/lib/__ucmpdi2.S b/arch/frv/lib/__ucmpdi2.S deleted file mode 100644 index d892f16ffaa9..000000000000 --- a/arch/frv/lib/__ucmpdi2.S +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* __ucmpdi2.S: 64-bit unsigned compare | ||
2 | * | ||
3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # int __ucmpdi2(unsigned long long a [GR8:GR9], | ||
19 | # unsigned long long b [GR10:GR11]) | ||
20 | # | ||
21 | # - returns 0, 1, or 2 as a <, =, > b respectively. | ||
22 | # | ||
23 | ############################################################################### | ||
24 | .globl __ucmpdi2 | ||
25 | .type __ucmpdi2,@function | ||
26 | __ucmpdi2: | ||
27 | or.p gr8,gr0,gr4 | ||
28 | subcc gr8,gr10,gr0,icc0 | ||
29 | setlos.p #0,gr8 | ||
30 | bclr icc0,#2 ; a.msw < b.msw | ||
31 | |||
32 | setlos.p #2,gr8 | ||
33 | bhilr icc0,#0 ; a.msw > b.msw | ||
34 | |||
35 | subcc.p gr9,gr11,gr0,icc1 | ||
36 | setlos #0,gr8 | ||
37 | setlos.p #2,gr9 | ||
38 | setlos #1,gr7 | ||
39 | cknc icc1,cc6 | ||
40 | cor.p gr9,gr0,gr8, cc6,#1 | ||
41 | cckls icc1,cc4, cc6,#1 | ||
42 | andcr cc6,cc4,cc4 | ||
43 | cor gr7,gr0,gr8, cc4,#1 | ||
44 | bralr | ||
45 | .size __ucmpdi2, .-__ucmpdi2 | ||
diff --git a/arch/frv/lib/atomic-lib.c b/arch/frv/lib/atomic-lib.c deleted file mode 100644 index 3027576f7782..000000000000 --- a/arch/frv/lib/atomic-lib.c +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | |||
3 | #include <linux/export.h> | ||
4 | #include <asm/atomic.h> | ||
5 | |||
6 | #define __ATOMIC_LIB__ | ||
7 | |||
8 | #include <asm/atomic_defs.h> | ||
diff --git a/arch/frv/lib/atomic-ops.S b/arch/frv/lib/atomic-ops.S deleted file mode 100644 index b7439a960b5b..000000000000 --- a/arch/frv/lib/atomic-ops.S +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* atomic-ops.S: kernel atomic operations | ||
2 | * | ||
3 | * For an explanation of how atomic ops work in this arch, see: | ||
4 | * Documentation/frv/atomic-ops.txt | ||
5 | * | ||
6 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
7 | * Written by David Howells (dhowells@redhat.com) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #include <asm/spr-regs.h> | ||
16 | |||
17 | .text | ||
18 | .balign 4 | ||
19 | |||
20 | ############################################################################### | ||
21 | # | ||
22 | # uint32_t __xchg_32(uint32_t i, uint32_t *v) | ||
23 | # | ||
24 | ############################################################################### | ||
25 | .globl __xchg_32 | ||
26 | .type __xchg_32,@function | ||
27 | __xchg_32: | ||
28 | or.p gr8,gr8,gr10 | ||
29 | 0: | ||
30 | orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */ | ||
31 | ckeq icc3,cc7 | ||
32 | ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */ | ||
33 | orcr cc7,cc7,cc3 /* set CC3 to true */ | ||
34 | cst.p gr10,@(gr9,gr0) ,cc3,#1 | ||
35 | corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */ | ||
36 | beq icc3,#0,0b | ||
37 | bralr | ||
38 | |||
39 | .size __xchg_32, .-__xchg_32 | ||
40 | |||
41 | ############################################################################### | ||
42 | # | ||
43 | # uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new) | ||
44 | # | ||
45 | ############################################################################### | ||
46 | .globl __cmpxchg_32 | ||
47 | .type __cmpxchg_32,@function | ||
48 | __cmpxchg_32: | ||
49 | or.p gr8,gr8,gr11 | ||
50 | 0: | ||
51 | orcc gr0,gr0,gr0,icc3 | ||
52 | ckeq icc3,cc7 | ||
53 | ld.p @(gr11,gr0),gr8 | ||
54 | orcr cc7,cc7,cc3 | ||
55 | subcc gr8,gr9,gr7,icc0 | ||
56 | bnelr icc0,#0 | ||
57 | cst.p gr10,@(gr11,gr0) ,cc3,#1 | ||
58 | corcc gr29,gr29,gr0 ,cc3,#1 | ||
59 | beq icc3,#0,0b | ||
60 | bralr | ||
61 | |||
62 | .size __cmpxchg_32, .-__cmpxchg_32 | ||
diff --git a/arch/frv/lib/atomic64-ops.S b/arch/frv/lib/atomic64-ops.S deleted file mode 100644 index c4c472308a33..000000000000 --- a/arch/frv/lib/atomic64-ops.S +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* kernel atomic64 operations | ||
2 | * | ||
3 | * For an explanation of how atomic ops work in this arch, see: | ||
4 | * Documentation/frv/atomic-ops.txt | ||
5 | * | ||
6 | * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved. | ||
7 | * Written by David Howells (dhowells@redhat.com) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #include <asm/spr-regs.h> | ||
16 | |||
17 | .text | ||
18 | .balign 4 | ||
19 | |||
20 | |||
21 | ############################################################################### | ||
22 | # | ||
23 | # uint64_t __xchg_64(uint64_t i, uint64_t *v) | ||
24 | # | ||
25 | ############################################################################### | ||
26 | .globl __xchg_64 | ||
27 | .type __xchg_64,@function | ||
28 | __xchg_64: | ||
29 | or.p gr8,gr8,gr4 | ||
30 | or gr9,gr9,gr5 | ||
31 | 0: | ||
32 | orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */ | ||
33 | ckeq icc3,cc7 | ||
34 | ldd.p @(gr10,gr0),gr8 /* LDD.P/ORCR must be atomic */ | ||
35 | orcr cc7,cc7,cc3 /* set CC3 to true */ | ||
36 | cstd.p gr4,@(gr10,gr0) ,cc3,#1 | ||
37 | corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */ | ||
38 | beq icc3,#0,0b | ||
39 | bralr | ||
40 | |||
41 | .size __xchg_64, .-__xchg_64 | ||
42 | |||
43 | ############################################################################### | ||
44 | # | ||
45 | # uint64_t __cmpxchg_64(uint64_t test, uint64_t new, uint64_t *v) | ||
46 | # | ||
47 | ############################################################################### | ||
48 | .globl __cmpxchg_64 | ||
49 | .type __cmpxchg_64,@function | ||
50 | __cmpxchg_64: | ||
51 | or.p gr8,gr8,gr4 | ||
52 | or gr9,gr9,gr5 | ||
53 | 0: | ||
54 | orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */ | ||
55 | ckeq icc3,cc7 | ||
56 | ldd.p @(gr12,gr0),gr8 /* LDD.P/ORCR must be atomic */ | ||
57 | orcr cc7,cc7,cc3 | ||
58 | subcc gr8,gr4,gr0,icc0 | ||
59 | subcc.p gr9,gr5,gr0,icc1 | ||
60 | bnelr icc0,#0 | ||
61 | bnelr icc1,#0 | ||
62 | cstd.p gr10,@(gr12,gr0) ,cc3,#1 | ||
63 | corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */ | ||
64 | beq icc3,#0,0b | ||
65 | bralr | ||
66 | |||
67 | .size __cmpxchg_64, .-__cmpxchg_64 | ||
68 | |||
diff --git a/arch/frv/lib/cache.S b/arch/frv/lib/cache.S deleted file mode 100644 index 0c4fb204911b..000000000000 --- a/arch/frv/lib/cache.S +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | /* cache.S: cache management routines | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <asm/spr-regs.h> | ||
13 | #include <asm/cache.h> | ||
14 | |||
15 | .text | ||
16 | .p2align 4 | ||
17 | |||
18 | ############################################################################### | ||
19 | # | ||
20 | # Write back a range of dcache | ||
21 | # - void frv_dcache_writeback(unsigned long start [GR8], unsigned long size [GR9]) | ||
22 | # | ||
23 | ############################################################################### | ||
24 | .globl frv_dcache_writeback | ||
25 | .type frv_dcache_writeback,@function | ||
26 | frv_dcache_writeback: | ||
27 | andi gr8,~(L1_CACHE_BYTES-1),gr8 | ||
28 | |||
29 | 2: dcf @(gr8,gr0) | ||
30 | addi gr8,#L1_CACHE_BYTES,gr8 | ||
31 | cmp gr9,gr8,icc0 | ||
32 | bhi icc0,#2,2b | ||
33 | |||
34 | membar | ||
35 | bralr | ||
36 | .size frv_dcache_writeback, .-frv_dcache_writeback | ||
37 | |||
38 | ############################################################################## | ||
39 | # | ||
40 | # Invalidate a range of dcache and icache | ||
41 | # - void frv_cache_invalidate(unsigned long start [GR8], unsigned long end [GR9]); | ||
42 | # | ||
43 | ############################################################################### | ||
44 | .globl frv_cache_invalidate | ||
45 | .type frv_cache_invalidate,@function | ||
46 | frv_cache_invalidate: | ||
47 | andi gr8,~(L1_CACHE_BYTES-1),gr8 | ||
48 | |||
49 | 2: dci @(gr8,gr0) | ||
50 | ici @(gr8,gr0) | ||
51 | addi gr8,#L1_CACHE_BYTES,gr8 | ||
52 | cmp gr9,gr8,icc0 | ||
53 | bhi icc0,#2,2b | ||
54 | |||
55 | membar | ||
56 | bralr | ||
57 | .size frv_cache_invalidate, .-frv_cache_invalidate | ||
58 | |||
59 | ############################################################################## | ||
60 | # | ||
61 | # Invalidate a range of icache | ||
62 | # - void frv_icache_invalidate(unsigned long start [GR8], unsigned long end [GR9]); | ||
63 | # | ||
64 | ############################################################################### | ||
65 | .globl frv_icache_invalidate | ||
66 | .type frv_icache_invalidate,@function | ||
67 | frv_icache_invalidate: | ||
68 | andi gr8,~(L1_CACHE_BYTES-1),gr8 | ||
69 | |||
70 | 2: ici @(gr8,gr0) | ||
71 | addi gr8,#L1_CACHE_BYTES,gr8 | ||
72 | cmp gr9,gr8,icc0 | ||
73 | bhi icc0,#2,2b | ||
74 | |||
75 | membar | ||
76 | bralr | ||
77 | .size frv_icache_invalidate, .-frv_icache_invalidate | ||
78 | |||
79 | ############################################################################### | ||
80 | # | ||
81 | # Write back and invalidate a range of dcache and icache | ||
82 | # - void frv_cache_wback_inv(unsigned long start [GR8], unsigned long end [GR9]) | ||
83 | # | ||
84 | ############################################################################### | ||
85 | .globl frv_cache_wback_inv | ||
86 | .type frv_cache_wback_inv,@function | ||
87 | frv_cache_wback_inv: | ||
88 | andi gr8,~(L1_CACHE_BYTES-1),gr8 | ||
89 | |||
90 | 2: dcf @(gr8,gr0) | ||
91 | ici @(gr8,gr0) | ||
92 | addi gr8,#L1_CACHE_BYTES,gr8 | ||
93 | cmp gr9,gr8,icc0 | ||
94 | bhi icc0,#2,2b | ||
95 | |||
96 | membar | ||
97 | bralr | ||
98 | .size frv_cache_wback_inv, .-frv_cache_wback_inv | ||
diff --git a/arch/frv/lib/checksum.c b/arch/frv/lib/checksum.c deleted file mode 100644 index 44e16d59bc10..000000000000 --- a/arch/frv/lib/checksum.c +++ /dev/null | |||
@@ -1,166 +0,0 @@ | |||
1 | /* | ||
2 | * INET An implementation of the TCP/IP protocol suite for the LINUX | ||
3 | * operating system. INET is implemented using the BSD Socket | ||
4 | * interface as the means of communication with the user level. | ||
5 | * | ||
6 | * IP/TCP/UDP checksumming routines | ||
7 | * | ||
8 | * Authors: Jorge Cwik, <jorge@laser.satlink.net> | ||
9 | * Arnt Gulbrandsen, <agulbra@nvg.unit.no> | ||
10 | * Tom May, <ftom@netcom.com> | ||
11 | * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de> | ||
12 | * Lots of code moved from tcp.c and ip.c; see those files | ||
13 | * for more names. | ||
14 | * | ||
15 | * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek: | ||
16 | * Fixed some nasty bugs, causing some horrible crashes. | ||
17 | * A: At some points, the sum (%0) was used as | ||
18 | * length-counter instead of the length counter | ||
19 | * (%1). Thanks to Roman Hodek for pointing this out. | ||
20 | * B: GCC seems to mess up if one uses too many | ||
21 | * data-registers to hold input values and one tries to | ||
22 | * specify d0 and d1 as scratch registers. Letting gcc choose these | ||
23 | * registers itself solves the problem. | ||
24 | * | ||
25 | * This program is free software; you can redistribute it and/or | ||
26 | * modify it under the terms of the GNU General Public License | ||
27 | * as published by the Free Software Foundation; either version | ||
28 | * 2 of the License, or (at your option) any later version. | ||
29 | */ | ||
30 | |||
31 | /* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most | ||
32 | of the assembly has to go. */ | ||
33 | |||
34 | #include <net/checksum.h> | ||
35 | #include <linux/module.h> | ||
36 | |||
37 | static inline unsigned short from32to16(unsigned long x) | ||
38 | { | ||
39 | /* add up 16-bit and 16-bit for 16+c bit */ | ||
40 | x = (x & 0xffff) + (x >> 16); | ||
41 | /* add up carry.. */ | ||
42 | x = (x & 0xffff) + (x >> 16); | ||
43 | return x; | ||
44 | } | ||
45 | |||
46 | static unsigned long do_csum(const unsigned char * buff, int len) | ||
47 | { | ||
48 | int odd, count; | ||
49 | unsigned long result = 0; | ||
50 | |||
51 | if (len <= 0) | ||
52 | goto out; | ||
53 | odd = 1 & (unsigned long) buff; | ||
54 | if (odd) { | ||
55 | result = *buff; | ||
56 | len--; | ||
57 | buff++; | ||
58 | } | ||
59 | count = len >> 1; /* nr of 16-bit words.. */ | ||
60 | if (count) { | ||
61 | if (2 & (unsigned long) buff) { | ||
62 | result += *(unsigned short *) buff; | ||
63 | count--; | ||
64 | len -= 2; | ||
65 | buff += 2; | ||
66 | } | ||
67 | count >>= 1; /* nr of 32-bit words.. */ | ||
68 | if (count) { | ||
69 | unsigned long carry = 0; | ||
70 | do { | ||
71 | unsigned long w = *(unsigned long *) buff; | ||
72 | count--; | ||
73 | buff += 4; | ||
74 | result += carry; | ||
75 | result += w; | ||
76 | carry = (w > result); | ||
77 | } while (count); | ||
78 | result += carry; | ||
79 | result = (result & 0xffff) + (result >> 16); | ||
80 | } | ||
81 | if (len & 2) { | ||
82 | result += *(unsigned short *) buff; | ||
83 | buff += 2; | ||
84 | } | ||
85 | } | ||
86 | if (len & 1) | ||
87 | result += (*buff << 8); | ||
88 | result = from32to16(result); | ||
89 | if (odd) | ||
90 | result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); | ||
91 | out: | ||
92 | return result; | ||
93 | } | ||
94 | |||
95 | /* | ||
96 | * computes the checksum of a memory block at buff, length len, | ||
97 | * and adds in "sum" (32-bit) | ||
98 | * | ||
99 | * returns a 32-bit number suitable for feeding into itself | ||
100 | * or csum_tcpudp_magic | ||
101 | * | ||
102 | * this function must be called with even lengths, except | ||
103 | * for the last fragment, which may be odd | ||
104 | * | ||
105 | * it's best to have buff aligned on a 32-bit boundary | ||
106 | */ | ||
107 | __wsum csum_partial(const void *buff, int len, __wsum sum) | ||
108 | { | ||
109 | unsigned int result = do_csum(buff, len); | ||
110 | |||
111 | /* add in old sum, and carry.. */ | ||
112 | result += (__force u32)sum; | ||
113 | if ((__force u32)sum > result) | ||
114 | result += 1; | ||
115 | return (__force __wsum)result; | ||
116 | } | ||
117 | |||
118 | EXPORT_SYMBOL(csum_partial); | ||
119 | |||
120 | /* | ||
121 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
122 | * in icmp.c | ||
123 | */ | ||
124 | __sum16 ip_compute_csum(const void *buff, int len) | ||
125 | { | ||
126 | return (__force __sum16)~do_csum(buff, len); | ||
127 | } | ||
128 | |||
129 | EXPORT_SYMBOL(ip_compute_csum); | ||
130 | |||
131 | /* | ||
132 | * copy from fs while checksumming, otherwise like csum_partial | ||
133 | */ | ||
134 | __wsum | ||
135 | csum_partial_copy_from_user(const void __user *src, void *dst, | ||
136 | int len, __wsum sum, int *csum_err) | ||
137 | { | ||
138 | int rem; | ||
139 | |||
140 | if (csum_err) | ||
141 | *csum_err = 0; | ||
142 | |||
143 | rem = copy_from_user(dst, src, len); | ||
144 | if (rem != 0) { | ||
145 | if (csum_err) | ||
146 | *csum_err = -EFAULT; | ||
147 | memset(dst + len - rem, 0, rem); | ||
148 | len = rem; | ||
149 | } | ||
150 | |||
151 | return csum_partial(dst, len, sum); | ||
152 | } | ||
153 | |||
154 | EXPORT_SYMBOL(csum_partial_copy_from_user); | ||
155 | |||
156 | /* | ||
157 | * copy from ds while checksumming, otherwise like csum_partial | ||
158 | */ | ||
159 | __wsum | ||
160 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) | ||
161 | { | ||
162 | memcpy(dst, src, len); | ||
163 | return csum_partial(dst, len, sum); | ||
164 | } | ||
165 | |||
166 | EXPORT_SYMBOL(csum_partial_copy_nocheck); | ||
diff --git a/arch/frv/lib/insl_ns.S b/arch/frv/lib/insl_ns.S deleted file mode 100644 index d1658425a9f7..000000000000 --- a/arch/frv/lib/insl_ns.S +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* insl_ns.S: input array of 4b words from device port without byte swapping | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # void __insl_ns(unsigned int port, void *buf, int n) | ||
19 | # | ||
20 | ############################################################################### | ||
21 | .globl __insl_ns | ||
22 | .type __insl_ns,@function | ||
23 | __insl_ns: | ||
24 | andicc.p gr9,#3,gr0,icc0 | ||
25 | setlos #4,gr4 | ||
26 | bne icc0,#0,__insl_ns_misaligned | ||
27 | subi gr9,#4,gr9 | ||
28 | 0: | ||
29 | ldi.p @(gr8,#0),gr5 | ||
30 | subicc gr10,#1,gr10,icc0 | ||
31 | stu.p gr5,@(gr9,gr4) | ||
32 | bhi icc0,#2,0b | ||
33 | bralr | ||
34 | |||
35 | __insl_ns_misaligned: | ||
36 | subi.p gr9,#1,gr9 | ||
37 | setlos #1,gr4 | ||
38 | 0: | ||
39 | ldi @(gr8,#0),gr5 | ||
40 | |||
41 | srli gr5,#24,gr6 | ||
42 | stbu.p gr6,@(gr9,gr4) | ||
43 | srli gr5,#16,gr6 | ||
44 | stbu.p gr6,@(gr9,gr4) | ||
45 | srli gr5,#8,gr6 | ||
46 | stbu.p gr6,@(gr9,gr4) | ||
47 | subicc gr10,#1,gr10,icc0 | ||
48 | stbu.p gr5,@(gr9,gr4) | ||
49 | bhi icc0,#2,0b | ||
50 | bralr | ||
51 | |||
52 | .size __insl_ns, .-__insl_ns | ||
diff --git a/arch/frv/lib/insl_sw.S b/arch/frv/lib/insl_sw.S deleted file mode 100644 index 9b5aa95d069b..000000000000 --- a/arch/frv/lib/insl_sw.S +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* insl_sw.S: input array of 4b words from device port with byte swapping | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # void __insl_sw(unsigned int port, void *buf, int n) | ||
19 | # | ||
20 | ############################################################################### | ||
21 | .globl __insl_sw | ||
22 | .type __insl_sw,@function | ||
23 | __insl_sw: | ||
24 | subi.p gr9,#1,gr9 | ||
25 | setlos #1,gr4 | ||
26 | 0: | ||
27 | ldi.p @(gr8,#0),gr5 ; get 0xAABBCCDD | ||
28 | subicc gr10,#1,gr10,icc0 | ||
29 | |||
30 | stbu.p gr5,@(gr9,gr4) ; write 0xDD | ||
31 | srli gr5,#8,gr5 | ||
32 | stbu.p gr5,@(gr9,gr4) ; write 0xCC | ||
33 | srli gr5,#8,gr5 | ||
34 | stbu.p gr5,@(gr9,gr4) ; write 0xBB | ||
35 | srli gr5,#8,gr5 | ||
36 | stbu.p gr5,@(gr9,gr4) ; write 0xAA | ||
37 | bhi icc0,#2,0b | ||
38 | bralr | ||
39 | |||
40 | .size __insl_sw, .-__insl_sw | ||
diff --git a/arch/frv/lib/memcpy.S b/arch/frv/lib/memcpy.S deleted file mode 100644 index 9c5965273428..000000000000 --- a/arch/frv/lib/memcpy.S +++ /dev/null | |||
@@ -1,135 +0,0 @@ | |||
1 | /* memcpy.S: optimised assembly memcpy | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # void *memcpy(void *to, const char *from, size_t count) | ||
19 | # | ||
20 | # - NOTE: must not use any stack. exception detection performs function return | ||
21 | # to caller's fixup routine, aborting the remainder of the copy | ||
22 | # | ||
23 | ############################################################################### | ||
24 | .globl memcpy,__memcpy_end | ||
25 | .type memcpy,@function | ||
26 | memcpy: | ||
27 | or.p gr8,gr9,gr4 | ||
28 | orcc gr10,gr0,gr0,icc3 | ||
29 | or.p gr10,gr4,gr4 | ||
30 | beqlr icc3,#0 | ||
31 | |||
32 | # optimise based on best common alignment for to, from & count | ||
33 | andicc.p gr4,#0x0f,gr0,icc0 | ||
34 | setlos #8,gr11 | ||
35 | andicc.p gr4,#0x07,gr0,icc1 | ||
36 | beq icc0,#0,memcpy_16 | ||
37 | andicc.p gr4,#0x03,gr0,icc0 | ||
38 | beq icc1,#0,memcpy_8 | ||
39 | andicc.p gr4,#0x01,gr0,icc1 | ||
40 | beq icc0,#0,memcpy_4 | ||
41 | setlos.p #1,gr11 | ||
42 | beq icc1,#0,memcpy_2 | ||
43 | |||
44 | # do byte by byte copy | ||
45 | sub.p gr8,gr11,gr3 | ||
46 | sub gr9,gr11,gr9 | ||
47 | 0: ldubu.p @(gr9,gr11),gr4 | ||
48 | subicc gr10,#1,gr10,icc0 | ||
49 | stbu.p gr4,@(gr3,gr11) | ||
50 | bne icc0,#2,0b | ||
51 | bralr | ||
52 | |||
53 | # do halfword by halfword copy | ||
54 | memcpy_2: | ||
55 | setlos #2,gr11 | ||
56 | sub.p gr8,gr11,gr3 | ||
57 | sub gr9,gr11,gr9 | ||
58 | 0: lduhu.p @(gr9,gr11),gr4 | ||
59 | subicc gr10,#2,gr10,icc0 | ||
60 | sthu.p gr4,@(gr3,gr11) | ||
61 | bne icc0,#2,0b | ||
62 | bralr | ||
63 | |||
64 | # do word by word copy | ||
65 | memcpy_4: | ||
66 | setlos #4,gr11 | ||
67 | sub.p gr8,gr11,gr3 | ||
68 | sub gr9,gr11,gr9 | ||
69 | 0: ldu.p @(gr9,gr11),gr4 | ||
70 | subicc gr10,#4,gr10,icc0 | ||
71 | stu.p gr4,@(gr3,gr11) | ||
72 | bne icc0,#2,0b | ||
73 | bralr | ||
74 | |||
75 | # do double-word by double-word copy | ||
76 | memcpy_8: | ||
77 | sub.p gr8,gr11,gr3 | ||
78 | sub gr9,gr11,gr9 | ||
79 | 0: lddu.p @(gr9,gr11),gr4 | ||
80 | subicc gr10,#8,gr10,icc0 | ||
81 | stdu.p gr4,@(gr3,gr11) | ||
82 | bne icc0,#2,0b | ||
83 | bralr | ||
84 | |||
85 | # do quad-word by quad-word copy | ||
86 | memcpy_16: | ||
87 | sub.p gr8,gr11,gr3 | ||
88 | sub gr9,gr11,gr9 | ||
89 | 0: lddu @(gr9,gr11),gr4 | ||
90 | lddu.p @(gr9,gr11),gr6 | ||
91 | subicc gr10,#16,gr10,icc0 | ||
92 | stdu gr4,@(gr3,gr11) | ||
93 | stdu.p gr6,@(gr3,gr11) | ||
94 | bne icc0,#2,0b | ||
95 | bralr | ||
96 | __memcpy_end: | ||
97 | |||
98 | .size memcpy, __memcpy_end-memcpy | ||
99 | |||
100 | ############################################################################### | ||
101 | # | ||
102 | # copy to/from userspace | ||
103 | # - return the number of bytes that could not be copied (0 on complete success) | ||
104 | # | ||
105 | # long __memcpy_user(void *dst, const void *src, size_t count) | ||
106 | # | ||
107 | ############################################################################### | ||
108 | .globl __memcpy_user, __memcpy_user_error_lr, __memcpy_user_error_handler | ||
109 | .type __memcpy_user,@function | ||
110 | __memcpy_user: | ||
111 | movsg lr,gr7 | ||
112 | subi.p sp,#8,sp | ||
113 | add gr8,gr10,gr6 ; calculate expected end address | ||
114 | stdi gr6,@(sp,#0) | ||
115 | |||
116 | # abuse memcpy to do the dirty work | ||
117 | call memcpy | ||
118 | __memcpy_user_error_lr: | ||
119 | ldi.p @(sp,#4),gr7 | ||
120 | setlos #0,gr8 | ||
121 | jmpl.p @(gr7,gr0) | ||
122 | addi sp,#8,sp | ||
123 | |||
124 | # deal any exception generated by memcpy | ||
125 | # GR8 - memcpy's current dest address | ||
126 | # GR11 - memset's step value (index register for store insns) | ||
127 | __memcpy_user_error_handler: | ||
128 | lddi.p @(sp,#0),gr4 ; load GR4 with dst+count, GR5 with ret addr | ||
129 | add gr11,gr3,gr7 | ||
130 | sub.p gr4,gr7,gr8 | ||
131 | |||
132 | addi sp,#8,sp | ||
133 | jmpl @(gr5,gr0) | ||
134 | |||
135 | .size __memcpy_user, .-__memcpy_user | ||
diff --git a/arch/frv/lib/memset.S b/arch/frv/lib/memset.S deleted file mode 100644 index 55a35263cbe3..000000000000 --- a/arch/frv/lib/memset.S +++ /dev/null | |||
@@ -1,182 +0,0 @@ | |||
1 | /* memset.S: optimised assembly memset | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # void *memset(void *p, char ch, size_t count) | ||
19 | # | ||
20 | # - NOTE: must not use any stack. exception detection performs function return | ||
21 | # to caller's fixup routine, aborting the remainder of the set | ||
22 | # GR4, GR7, GR8, and GR11 must be managed | ||
23 | # | ||
24 | ############################################################################### | ||
25 | .globl memset,__memset_end | ||
26 | .type memset,@function | ||
27 | memset: | ||
28 | orcc.p gr10,gr0,gr5,icc3 ; GR5 = count | ||
29 | andi gr9,#0xff,gr9 | ||
30 | or.p gr8,gr0,gr4 ; GR4 = address | ||
31 | beqlr icc3,#0 | ||
32 | |||
33 | # conditionally write a byte to 2b-align the address | ||
34 | setlos.p #1,gr6 | ||
35 | andicc gr4,#1,gr0,icc0 | ||
36 | ckne icc0,cc7 | ||
37 | cstb.p gr9,@(gr4,gr0) ,cc7,#1 | ||
38 | csubcc gr5,gr6,gr5 ,cc7,#1 ; also set ICC3 | ||
39 | cadd.p gr4,gr6,gr4 ,cc7,#1 | ||
40 | beqlr icc3,#0 | ||
41 | |||
42 | # conditionally write a word to 4b-align the address | ||
43 | andicc.p gr4,#2,gr0,icc0 | ||
44 | subicc gr5,#2,gr0,icc1 | ||
45 | setlos.p #2,gr6 | ||
46 | ckne icc0,cc7 | ||
47 | slli.p gr9,#8,gr12 ; need to double up the pattern | ||
48 | cknc icc1,cc5 | ||
49 | or.p gr9,gr12,gr12 | ||
50 | andcr cc7,cc5,cc7 | ||
51 | |||
52 | csth.p gr12,@(gr4,gr0) ,cc7,#1 | ||
53 | csubcc gr5,gr6,gr5 ,cc7,#1 ; also set ICC3 | ||
54 | cadd.p gr4,gr6,gr4 ,cc7,#1 | ||
55 | beqlr icc3,#0 | ||
56 | |||
57 | # conditionally write a dword to 8b-align the address | ||
58 | andicc.p gr4,#4,gr0,icc0 | ||
59 | subicc gr5,#4,gr0,icc1 | ||
60 | setlos.p #4,gr6 | ||
61 | ckne icc0,cc7 | ||
62 | slli.p gr12,#16,gr13 ; need to quadruple-up the pattern | ||
63 | cknc icc1,cc5 | ||
64 | or.p gr13,gr12,gr12 | ||
65 | andcr cc7,cc5,cc7 | ||
66 | |||
67 | cst.p gr12,@(gr4,gr0) ,cc7,#1 | ||
68 | csubcc gr5,gr6,gr5 ,cc7,#1 ; also set ICC3 | ||
69 | cadd.p gr4,gr6,gr4 ,cc7,#1 | ||
70 | beqlr icc3,#0 | ||
71 | |||
72 | or.p gr12,gr12,gr13 ; need to octuple-up the pattern | ||
73 | |||
74 | # the address is now 8b-aligned - loop around writing 64b chunks | ||
75 | setlos #8,gr7 | ||
76 | subi.p gr4,#8,gr4 ; store with update index does weird stuff | ||
77 | setlos #64,gr6 | ||
78 | |||
79 | subicc gr5,#64,gr0,icc0 | ||
80 | 0: cknc icc0,cc7 | ||
81 | cstdu gr12,@(gr4,gr7) ,cc7,#1 | ||
82 | cstdu gr12,@(gr4,gr7) ,cc7,#1 | ||
83 | cstdu gr12,@(gr4,gr7) ,cc7,#1 | ||
84 | cstdu gr12,@(gr4,gr7) ,cc7,#1 | ||
85 | cstdu gr12,@(gr4,gr7) ,cc7,#1 | ||
86 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
87 | csubcc gr5,gr6,gr5 ,cc7,#1 ; also set ICC3 | ||
88 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
89 | subicc gr5,#64,gr0,icc0 | ||
90 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
91 | beqlr icc3,#0 | ||
92 | bnc icc0,#2,0b | ||
93 | |||
94 | # now do 32-byte remnant | ||
95 | subicc.p gr5,#32,gr0,icc0 | ||
96 | setlos #32,gr6 | ||
97 | cknc icc0,cc7 | ||
98 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
99 | csubcc gr5,gr6,gr5 ,cc7,#1 ; also set ICC3 | ||
100 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
101 | setlos #16,gr6 | ||
102 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
103 | subicc gr5,#16,gr0,icc0 | ||
104 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
105 | beqlr icc3,#0 | ||
106 | |||
107 | # now do 16-byte remnant | ||
108 | cknc icc0,cc7 | ||
109 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
110 | csubcc gr5,gr6,gr5 ,cc7,#1 ; also set ICC3 | ||
111 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
112 | beqlr icc3,#0 | ||
113 | |||
114 | # now do 8-byte remnant | ||
115 | subicc gr5,#8,gr0,icc1 | ||
116 | cknc icc1,cc7 | ||
117 | cstdu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
118 | csubcc gr5,gr7,gr5 ,cc7,#1 ; also set ICC3 | ||
119 | setlos.p #4,gr7 | ||
120 | beqlr icc3,#0 | ||
121 | |||
122 | # now do 4-byte remnant | ||
123 | subicc gr5,#4,gr0,icc0 | ||
124 | addi.p gr4,#4,gr4 | ||
125 | cknc icc0,cc7 | ||
126 | cstu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
127 | csubcc gr5,gr7,gr5 ,cc7,#1 ; also set ICC3 | ||
128 | subicc.p gr5,#2,gr0,icc1 | ||
129 | beqlr icc3,#0 | ||
130 | |||
131 | # now do 2-byte remnant | ||
132 | setlos #2,gr7 | ||
133 | addi.p gr4,#2,gr4 | ||
134 | cknc icc1,cc7 | ||
135 | csthu.p gr12,@(gr4,gr7) ,cc7,#1 | ||
136 | csubcc gr5,gr7,gr5 ,cc7,#1 ; also set ICC3 | ||
137 | subicc.p gr5,#1,gr0,icc0 | ||
138 | beqlr icc3,#0 | ||
139 | |||
140 | # now do 1-byte remnant | ||
141 | setlos #0,gr7 | ||
142 | addi.p gr4,#2,gr4 | ||
143 | cknc icc0,cc7 | ||
144 | cstb.p gr12,@(gr4,gr0) ,cc7,#1 | ||
145 | bralr | ||
146 | __memset_end: | ||
147 | |||
148 | .size memset, __memset_end-memset | ||
149 | |||
150 | ############################################################################### | ||
151 | # | ||
152 | # clear memory in userspace | ||
153 | # - return the number of bytes that could not be cleared (0 on complete success) | ||
154 | # | ||
155 | # long __memset_user(void *p, size_t count) | ||
156 | # | ||
157 | ############################################################################### | ||
158 | .globl __memset_user, __memset_user_error_lr, __memset_user_error_handler | ||
159 | .type __memset_user,@function | ||
160 | __memset_user: | ||
161 | movsg lr,gr11 | ||
162 | |||
163 | # abuse memset to do the dirty work | ||
164 | or.p gr9,gr9,gr10 | ||
165 | setlos #0,gr9 | ||
166 | call memset | ||
167 | __memset_user_error_lr: | ||
168 | jmpl.p @(gr11,gr0) | ||
169 | setlos #0,gr8 | ||
170 | |||
171 | # deal any exception generated by memset | ||
172 | # GR4 - memset's address tracking pointer | ||
173 | # GR7 - memset's step value (index register for store insns) | ||
174 | # GR8 - memset's original start address | ||
175 | # GR10 - memset's original count | ||
176 | __memset_user_error_handler: | ||
177 | add.p gr4,gr7,gr4 | ||
178 | add gr8,gr10,gr8 | ||
179 | jmpl.p @(gr11,gr0) | ||
180 | sub gr8,gr4,gr8 ; we return the amount left uncleared | ||
181 | |||
182 | .size __memset_user, .-__memset_user | ||
diff --git a/arch/frv/lib/outsl_ns.S b/arch/frv/lib/outsl_ns.S deleted file mode 100644 index 4cd4c46a6966..000000000000 --- a/arch/frv/lib/outsl_ns.S +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* outsl_ns.S: output array of 4b words to device without byte swapping | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # void __outsl_ns(unsigned int port, const void *buf, int n) | ||
19 | # | ||
20 | ############################################################################### | ||
21 | .globl __outsl_ns | ||
22 | .type __outsl_ns,@function | ||
23 | __outsl_ns: | ||
24 | andicc.p gr9,#3,gr0,icc0 | ||
25 | setlos #4,gr4 | ||
26 | bne icc0,#0,__outsl_ns_misaligned | ||
27 | subi gr9,#4,gr9 | ||
28 | 0: | ||
29 | ldu.p @(gr9,gr4),gr5 | ||
30 | subicc gr10,#1,gr10,icc0 | ||
31 | sti.p gr5,@(gr8,#0) | ||
32 | bhi icc0,#2,0b | ||
33 | |||
34 | membar | ||
35 | bralr | ||
36 | |||
37 | __outsl_ns_misaligned: | ||
38 | subi.p gr9,#1,gr9 | ||
39 | setlos #1,gr4 | ||
40 | 0: | ||
41 | ldubu @(gr9,gr4),gr5 | ||
42 | ldubu.p @(gr9,gr4),gr6 | ||
43 | slli gr5,#8,gr5 | ||
44 | ldubu.p @(gr9,gr4),gr7 | ||
45 | or gr5,gr6,gr5 | ||
46 | ldubu.p @(gr9,gr4),gr6 | ||
47 | slli gr5,#16,gr5 | ||
48 | slli.p gr7,#8,gr7 | ||
49 | or gr5,gr6,gr5 | ||
50 | subicc.p gr10,#1,gr10,icc0 | ||
51 | or gr5,gr7,gr5 | ||
52 | |||
53 | sti.p gr5,@(gr8,#0) | ||
54 | bhi icc0,#2,0b | ||
55 | |||
56 | membar | ||
57 | bralr | ||
58 | |||
59 | .size __outsl_ns, .-__outsl_ns | ||
diff --git a/arch/frv/lib/outsl_sw.S b/arch/frv/lib/outsl_sw.S deleted file mode 100644 index 7eb56d35a956..000000000000 --- a/arch/frv/lib/outsl_sw.S +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* outsl_ns.S: output array of 4b words to device with byte swapping | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | .text | ||
14 | .p2align 4 | ||
15 | |||
16 | ############################################################################### | ||
17 | # | ||
18 | # void __outsl_sw(unsigned int port, const void *buf, int n) | ||
19 | # | ||
20 | ############################################################################### | ||
21 | .globl __outsl_sw | ||
22 | .type __outsl_sw,@function | ||
23 | __outsl_sw: | ||
24 | subi.p gr9,#1,gr9 | ||
25 | setlos #1,gr4 | ||
26 | 0: | ||
27 | ldubu @(gr9,gr4),gr5 | ||
28 | ldubu @(gr9,gr4),gr6 | ||
29 | slli gr6,#8,gr6 | ||
30 | ldubu.p @(gr9,gr4),gr7 | ||
31 | or gr5,gr6,gr5 | ||
32 | ldubu.p @(gr9,gr4),gr6 | ||
33 | slli gr7,#16,gr7 | ||
34 | slli.p gr6,#24,gr6 | ||
35 | or gr5,gr7,gr5 | ||
36 | subicc.p gr10,#1,gr10,icc0 | ||
37 | or gr5,gr6,gr5 | ||
38 | |||
39 | sti.p gr5,@(gr8,#0) | ||
40 | bhi icc0,#2,0b | ||
41 | |||
42 | membar | ||
43 | bralr | ||
44 | |||
45 | .size __outsl_sw, .-__outsl_sw | ||
diff --git a/arch/frv/mb93090-mb00/Makefile b/arch/frv/mb93090-mb00/Makefile deleted file mode 100644 index bcb03ebb3583..000000000000 --- a/arch/frv/mb93090-mb00/Makefile +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | # | ||
3 | # Makefile for the MB93090-MB00 motherboard stuff | ||
4 | # | ||
5 | |||
6 | ifeq "$(CONFIG_PCI)" "y" | ||
7 | obj-y := pci-frv.o pci-irq.o pci-vdk.o | ||
8 | |||
9 | ifeq "$(CONFIG_MMU)" "y" | ||
10 | obj-y += pci-dma.o | ||
11 | else | ||
12 | obj-y += pci-dma-nommu.o | ||
13 | endif | ||
14 | endif | ||
15 | |||
16 | obj-$(CONFIG_MTD) += flash.o | ||
diff --git a/arch/frv/mb93090-mb00/flash.c b/arch/frv/mb93090-mb00/flash.c deleted file mode 100644 index e1cf802d1639..000000000000 --- a/arch/frv/mb93090-mb00/flash.c +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | /* Flash mappings for the MB93090-MB00 motherboard | ||
2 | * | ||
3 | * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public Licence | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the Licence, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/module.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/mtd/partitions.h> | ||
15 | #include <linux/mtd/physmap.h> | ||
16 | |||
17 | #define MB93090_BOOTROM_ADDR 0xFF000000 /* Boot ROM */ | ||
18 | #define MB93090_BOOTROM_SIZE (2 * 1024 * 1024) | ||
19 | #define MB93090_USERROM_ADDR 0xFF200000 /* User ROM */ | ||
20 | #define MB93090_USERROM_SIZE (2 * 1024 * 1024) | ||
21 | |||
22 | /* | ||
23 | * default MTD partition table for both main flash devices, expected to be | ||
24 | * overridden by RedBoot | ||
25 | */ | ||
26 | static struct mtd_partition mb93090_partitions[] = { | ||
27 | { | ||
28 | .name = "Filesystem", | ||
29 | .size = MTDPART_SIZ_FULL, | ||
30 | .offset = 0, | ||
31 | } | ||
32 | }; | ||
33 | |||
34 | /* | ||
35 | * Definition of the MB93090 Boot ROM (on the CPU card) | ||
36 | */ | ||
37 | static struct physmap_flash_data mb93090_bootrom_data = { | ||
38 | .width = 2, | ||
39 | .nr_parts = 2, | ||
40 | .parts = mb93090_partitions, | ||
41 | }; | ||
42 | |||
43 | static struct resource mb93090_bootrom_resource = { | ||
44 | .start = MB93090_BOOTROM_ADDR, | ||
45 | .end = MB93090_BOOTROM_ADDR + MB93090_BOOTROM_SIZE - 1, | ||
46 | .flags = IORESOURCE_MEM, | ||
47 | }; | ||
48 | |||
49 | static struct platform_device mb93090_bootrom = { | ||
50 | .name = "physmap-flash", | ||
51 | .id = 0, | ||
52 | .dev.platform_data = &mb93090_bootrom_data, | ||
53 | .num_resources = 1, | ||
54 | .resource = &mb93090_bootrom_resource, | ||
55 | }; | ||
56 | |||
57 | /* | ||
58 | * Definition of the MB93090 User ROM definition (on the motherboard) | ||
59 | */ | ||
60 | static struct physmap_flash_data mb93090_userrom_data = { | ||
61 | .width = 2, | ||
62 | .nr_parts = 2, | ||
63 | .parts = mb93090_partitions, | ||
64 | }; | ||
65 | |||
66 | static struct resource mb93090_userrom_resource = { | ||
67 | .start = MB93090_USERROM_ADDR, | ||
68 | .end = MB93090_USERROM_ADDR + MB93090_USERROM_SIZE - 1, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }; | ||
71 | |||
72 | static struct platform_device mb93090_userrom = { | ||
73 | .name = "physmap-flash", | ||
74 | .id = 1, | ||
75 | .dev.platform_data = &mb93090_userrom_data, | ||
76 | .num_resources = 1, | ||
77 | .resource = &mb93090_userrom_resource, | ||
78 | }; | ||
79 | |||
80 | /* | ||
81 | * register the MB93090 flashes | ||
82 | */ | ||
83 | static int __init mb93090_mtd_init(void) | ||
84 | { | ||
85 | platform_device_register(&mb93090_bootrom); | ||
86 | platform_device_register(&mb93090_userrom); | ||
87 | return 0; | ||
88 | } | ||
89 | |||
90 | module_init(mb93090_mtd_init); | ||
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c deleted file mode 100644 index 4a96de7f0af4..000000000000 --- a/arch/frv/mb93090-mb00/pci-dma-nommu.c +++ /dev/null | |||
@@ -1,176 +0,0 @@ | |||
1 | /* pci-dma-nommu.c: Dynamic DMA mapping support for the FRV | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Woodhouse (dwmw2@infradead.org) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <linux/slab.h> | ||
14 | #include <linux/export.h> | ||
15 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/pci.h> | ||
18 | #include <asm/io.h> | ||
19 | |||
20 | #if 1 | ||
21 | #define DMA_SRAM_START dma_coherent_mem_start | ||
22 | #define DMA_SRAM_END dma_coherent_mem_end | ||
23 | #else // Use video RAM on Matrox | ||
24 | #define DMA_SRAM_START 0xe8900000 | ||
25 | #define DMA_SRAM_END 0xe8a00000 | ||
26 | #endif | ||
27 | |||
28 | struct dma_alloc_record { | ||
29 | struct list_head list; | ||
30 | unsigned long ofs; | ||
31 | unsigned long len; | ||
32 | }; | ||
33 | |||
34 | static DEFINE_SPINLOCK(dma_alloc_lock); | ||
35 | static LIST_HEAD(dma_alloc_list); | ||
36 | |||
37 | static void *frv_dma_alloc(struct device *hwdev, size_t size, dma_addr_t *dma_handle, | ||
38 | gfp_t gfp, unsigned long attrs) | ||
39 | { | ||
40 | struct dma_alloc_record *new; | ||
41 | struct list_head *this = &dma_alloc_list; | ||
42 | unsigned long flags; | ||
43 | unsigned long start = DMA_SRAM_START; | ||
44 | unsigned long end; | ||
45 | |||
46 | if (!DMA_SRAM_START) { | ||
47 | printk("%s called without any DMA area reserved!\n", __func__); | ||
48 | return NULL; | ||
49 | } | ||
50 | |||
51 | new = kmalloc(sizeof (*new), GFP_ATOMIC); | ||
52 | if (!new) | ||
53 | return NULL; | ||
54 | |||
55 | /* Round up to a reasonable alignment */ | ||
56 | new->len = (size + 31) & ~31; | ||
57 | |||
58 | spin_lock_irqsave(&dma_alloc_lock, flags); | ||
59 | |||
60 | list_for_each (this, &dma_alloc_list) { | ||
61 | struct dma_alloc_record *this_r = list_entry(this, struct dma_alloc_record, list); | ||
62 | end = this_r->ofs; | ||
63 | |||
64 | if (end - start >= size) | ||
65 | goto gotone; | ||
66 | |||
67 | start = this_r->ofs + this_r->len; | ||
68 | } | ||
69 | /* Reached end of list. */ | ||
70 | end = DMA_SRAM_END; | ||
71 | this = &dma_alloc_list; | ||
72 | |||
73 | if (end - start >= size) { | ||
74 | gotone: | ||
75 | new->ofs = start; | ||
76 | list_add_tail(&new->list, this); | ||
77 | spin_unlock_irqrestore(&dma_alloc_lock, flags); | ||
78 | |||
79 | *dma_handle = start; | ||
80 | return (void *)start; | ||
81 | } | ||
82 | |||
83 | kfree(new); | ||
84 | spin_unlock_irqrestore(&dma_alloc_lock, flags); | ||
85 | return NULL; | ||
86 | } | ||
87 | |||
88 | static void frv_dma_free(struct device *hwdev, size_t size, void *vaddr, | ||
89 | dma_addr_t dma_handle, unsigned long attrs) | ||
90 | { | ||
91 | struct dma_alloc_record *rec; | ||
92 | unsigned long flags; | ||
93 | |||
94 | spin_lock_irqsave(&dma_alloc_lock, flags); | ||
95 | |||
96 | list_for_each_entry(rec, &dma_alloc_list, list) { | ||
97 | if (rec->ofs == dma_handle) { | ||
98 | list_del(&rec->list); | ||
99 | kfree(rec); | ||
100 | spin_unlock_irqrestore(&dma_alloc_lock, flags); | ||
101 | return; | ||
102 | } | ||
103 | } | ||
104 | spin_unlock_irqrestore(&dma_alloc_lock, flags); | ||
105 | BUG(); | ||
106 | } | ||
107 | |||
108 | static int frv_dma_map_sg(struct device *dev, struct scatterlist *sglist, | ||
109 | int nents, enum dma_data_direction direction, | ||
110 | unsigned long attrs) | ||
111 | { | ||
112 | struct scatterlist *sg; | ||
113 | int i; | ||
114 | |||
115 | BUG_ON(direction == DMA_NONE); | ||
116 | |||
117 | if (attrs & DMA_ATTR_SKIP_CPU_SYNC) | ||
118 | return nents; | ||
119 | |||
120 | for_each_sg(sglist, sg, nents, i) { | ||
121 | frv_cache_wback_inv(sg_dma_address(sg), | ||
122 | sg_dma_address(sg) + sg_dma_len(sg)); | ||
123 | } | ||
124 | |||
125 | return nents; | ||
126 | } | ||
127 | |||
128 | static dma_addr_t frv_dma_map_page(struct device *dev, struct page *page, | ||
129 | unsigned long offset, size_t size, | ||
130 | enum dma_data_direction direction, unsigned long attrs) | ||
131 | { | ||
132 | BUG_ON(direction == DMA_NONE); | ||
133 | |||
134 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
135 | flush_dcache_page(page); | ||
136 | |||
137 | return (dma_addr_t) page_to_phys(page) + offset; | ||
138 | } | ||
139 | |||
140 | static void frv_dma_sync_single_for_device(struct device *dev, | ||
141 | dma_addr_t dma_handle, size_t size, | ||
142 | enum dma_data_direction direction) | ||
143 | { | ||
144 | flush_write_buffers(); | ||
145 | } | ||
146 | |||
147 | static void frv_dma_sync_sg_for_device(struct device *dev, | ||
148 | struct scatterlist *sg, int nelems, | ||
149 | enum dma_data_direction direction) | ||
150 | { | ||
151 | flush_write_buffers(); | ||
152 | } | ||
153 | |||
154 | |||
155 | static int frv_dma_supported(struct device *dev, u64 mask) | ||
156 | { | ||
157 | /* | ||
158 | * we fall back to GFP_DMA when the mask isn't all 1s, | ||
159 | * so we can't guarantee allocations that must be | ||
160 | * within a tighter range than GFP_DMA.. | ||
161 | */ | ||
162 | if (mask < 0x00ffffff) | ||
163 | return 0; | ||
164 | return 1; | ||
165 | } | ||
166 | |||
167 | const struct dma_map_ops frv_dma_ops = { | ||
168 | .alloc = frv_dma_alloc, | ||
169 | .free = frv_dma_free, | ||
170 | .map_page = frv_dma_map_page, | ||
171 | .map_sg = frv_dma_map_sg, | ||
172 | .sync_single_for_device = frv_dma_sync_single_for_device, | ||
173 | .sync_sg_for_device = frv_dma_sync_sg_for_device, | ||
174 | .dma_supported = frv_dma_supported, | ||
175 | }; | ||
176 | EXPORT_SYMBOL(frv_dma_ops); | ||
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c deleted file mode 100644 index e7130abc0dae..000000000000 --- a/arch/frv/mb93090-mb00/pci-dma.c +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | /* pci-dma.c: Dynamic DMA mapping support for the FRV CPUs that have MMUs | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <linux/dma-mapping.h> | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/export.h> | ||
17 | #include <linux/highmem.h> | ||
18 | #include <linux/scatterlist.h> | ||
19 | #include <asm/io.h> | ||
20 | |||
21 | static void *frv_dma_alloc(struct device *hwdev, size_t size, | ||
22 | dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) | ||
23 | { | ||
24 | void *ret; | ||
25 | |||
26 | ret = consistent_alloc(gfp, size, dma_handle); | ||
27 | if (ret) | ||
28 | memset(ret, 0, size); | ||
29 | |||
30 | return ret; | ||
31 | } | ||
32 | |||
33 | static void frv_dma_free(struct device *hwdev, size_t size, void *vaddr, | ||
34 | dma_addr_t dma_handle, unsigned long attrs) | ||
35 | { | ||
36 | consistent_free(vaddr); | ||
37 | } | ||
38 | |||
39 | static int frv_dma_map_sg(struct device *dev, struct scatterlist *sglist, | ||
40 | int nents, enum dma_data_direction direction, | ||
41 | unsigned long attrs) | ||
42 | { | ||
43 | struct scatterlist *sg; | ||
44 | unsigned long dampr2; | ||
45 | void *vaddr; | ||
46 | int i; | ||
47 | |||
48 | BUG_ON(direction == DMA_NONE); | ||
49 | |||
50 | if (attrs & DMA_ATTR_SKIP_CPU_SYNC) | ||
51 | return nents; | ||
52 | |||
53 | dampr2 = __get_DAMPR(2); | ||
54 | |||
55 | for_each_sg(sglist, sg, nents, i) { | ||
56 | vaddr = kmap_atomic_primary(sg_page(sg)); | ||
57 | |||
58 | frv_dcache_writeback((unsigned long) vaddr, | ||
59 | (unsigned long) vaddr + PAGE_SIZE); | ||
60 | |||
61 | } | ||
62 | |||
63 | kunmap_atomic_primary(vaddr); | ||
64 | if (dampr2) { | ||
65 | __set_DAMPR(2, dampr2); | ||
66 | __set_IAMPR(2, dampr2); | ||
67 | } | ||
68 | |||
69 | return nents; | ||
70 | } | ||
71 | |||
72 | static dma_addr_t frv_dma_map_page(struct device *dev, struct page *page, | ||
73 | unsigned long offset, size_t size, | ||
74 | enum dma_data_direction direction, unsigned long attrs) | ||
75 | { | ||
76 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
77 | flush_dcache_page(page); | ||
78 | |||
79 | return (dma_addr_t) page_to_phys(page) + offset; | ||
80 | } | ||
81 | |||
82 | static void frv_dma_sync_single_for_device(struct device *dev, | ||
83 | dma_addr_t dma_handle, size_t size, | ||
84 | enum dma_data_direction direction) | ||
85 | { | ||
86 | flush_write_buffers(); | ||
87 | } | ||
88 | |||
89 | static void frv_dma_sync_sg_for_device(struct device *dev, | ||
90 | struct scatterlist *sg, int nelems, | ||
91 | enum dma_data_direction direction) | ||
92 | { | ||
93 | flush_write_buffers(); | ||
94 | } | ||
95 | |||
96 | |||
97 | static int frv_dma_supported(struct device *dev, u64 mask) | ||
98 | { | ||
99 | /* | ||
100 | * we fall back to GFP_DMA when the mask isn't all 1s, | ||
101 | * so we can't guarantee allocations that must be | ||
102 | * within a tighter range than GFP_DMA.. | ||
103 | */ | ||
104 | if (mask < 0x00ffffff) | ||
105 | return 0; | ||
106 | return 1; | ||
107 | } | ||
108 | |||
109 | const struct dma_map_ops frv_dma_ops = { | ||
110 | .alloc = frv_dma_alloc, | ||
111 | .free = frv_dma_free, | ||
112 | .map_page = frv_dma_map_page, | ||
113 | .map_sg = frv_dma_map_sg, | ||
114 | .sync_single_for_device = frv_dma_sync_single_for_device, | ||
115 | .sync_sg_for_device = frv_dma_sync_sg_for_device, | ||
116 | .dma_supported = frv_dma_supported, | ||
117 | }; | ||
118 | EXPORT_SYMBOL(frv_dma_ops); | ||
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c deleted file mode 100644 index c452ddb5620f..000000000000 --- a/arch/frv/mb93090-mb00/pci-frv.c +++ /dev/null | |||
@@ -1,193 +0,0 @@ | |||
1 | /* pci-frv.c: low-level PCI access routines | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from the i386 equivalent stuff | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/ioport.h> | ||
18 | #include <linux/errno.h> | ||
19 | |||
20 | #include "pci-frv.h" | ||
21 | |||
22 | /* | ||
23 | * We need to avoid collisions with `mirrored' VGA ports | ||
24 | * and other strange ISA hardware, so we always want the | ||
25 | * addresses to be allocated in the 0x000-0x0ff region | ||
26 | * modulo 0x400. | ||
27 | * | ||
28 | * Why? Because some silly external IO cards only decode | ||
29 | * the low 10 bits of the IO address. The 0x00-0xff region | ||
30 | * is reserved for motherboard devices that decode all 16 | ||
31 | * bits, so it's ok to allocate at, say, 0x2800-0x28ff, | ||
32 | * but we want to try to avoid allocating at 0x2900-0x2bff | ||
33 | * which might have be mirrored at 0x0100-0x03ff.. | ||
34 | */ | ||
35 | resource_size_t | ||
36 | pcibios_align_resource(void *data, const struct resource *res, | ||
37 | resource_size_t size, resource_size_t align) | ||
38 | { | ||
39 | resource_size_t start = res->start; | ||
40 | |||
41 | if ((res->flags & IORESOURCE_IO) && (start & 0x300)) | ||
42 | start = (start + 0x3ff) & ~0x3ff; | ||
43 | |||
44 | return start; | ||
45 | } | ||
46 | |||
47 | |||
48 | /* | ||
49 | * Handle resources of PCI devices. If the world were perfect, we could | ||
50 | * just allocate all the resource regions and do nothing more. It isn't. | ||
51 | * On the other hand, we cannot just re-allocate all devices, as it would | ||
52 | * require us to know lots of host bridge internals. So we attempt to | ||
53 | * keep as much of the original configuration as possible, but tweak it | ||
54 | * when it's found to be wrong. | ||
55 | * | ||
56 | * Known BIOS problems we have to work around: | ||
57 | * - I/O or memory regions not configured | ||
58 | * - regions configured, but not enabled in the command register | ||
59 | * - bogus I/O addresses above 64K used | ||
60 | * - expansion ROMs left enabled (this may sound harmless, but given | ||
61 | * the fact the PCI specs explicitly allow address decoders to be | ||
62 | * shared between expansion ROMs and other resource regions, it's | ||
63 | * at least dangerous) | ||
64 | * | ||
65 | * Our solution: | ||
66 | * (1) Allocate resources for all buses behind PCI-to-PCI bridges. | ||
67 | * This gives us fixed barriers on where we can allocate. | ||
68 | * (2) Allocate resources for all enabled devices. If there is | ||
69 | * a collision, just mark the resource as unallocated. Also | ||
70 | * disable expansion ROMs during this step. | ||
71 | * (3) Try to allocate resources for disabled devices. If the | ||
72 | * resources were assigned correctly, everything goes well, | ||
73 | * if they weren't, they won't disturb allocation of other | ||
74 | * resources. | ||
75 | * (4) Assign new addresses to resources which were either | ||
76 | * not configured at all or misconfigured. If explicitly | ||
77 | * requested by the user, configure expansion ROM address | ||
78 | * as well. | ||
79 | */ | ||
80 | |||
81 | static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) | ||
82 | { | ||
83 | struct list_head *ln; | ||
84 | struct pci_bus *bus; | ||
85 | struct pci_dev *dev; | ||
86 | int idx; | ||
87 | struct resource *r; | ||
88 | |||
89 | /* Depth-First Search on bus tree */ | ||
90 | for (ln=bus_list->next; ln != bus_list; ln=ln->next) { | ||
91 | bus = list_entry(ln, struct pci_bus, node); | ||
92 | if ((dev = bus->self)) { | ||
93 | for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { | ||
94 | r = &dev->resource[idx]; | ||
95 | if (!r->start) | ||
96 | continue; | ||
97 | pci_claim_bridge_resource(dev, idx); | ||
98 | } | ||
99 | } | ||
100 | pcibios_allocate_bus_resources(&bus->children); | ||
101 | } | ||
102 | } | ||
103 | |||
104 | static void __init pcibios_allocate_resources(int pass) | ||
105 | { | ||
106 | struct pci_dev *dev = NULL; | ||
107 | int idx, disabled; | ||
108 | u16 command; | ||
109 | struct resource *r; | ||
110 | |||
111 | for_each_pci_dev(dev) { | ||
112 | pci_read_config_word(dev, PCI_COMMAND, &command); | ||
113 | for(idx = 0; idx < 6; idx++) { | ||
114 | r = &dev->resource[idx]; | ||
115 | if (r->parent) /* Already allocated */ | ||
116 | continue; | ||
117 | if (!r->start) /* Address not assigned at all */ | ||
118 | continue; | ||
119 | if (r->flags & IORESOURCE_IO) | ||
120 | disabled = !(command & PCI_COMMAND_IO); | ||
121 | else | ||
122 | disabled = !(command & PCI_COMMAND_MEMORY); | ||
123 | if (pass == disabled) { | ||
124 | DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n", | ||
125 | r->start, r->end, r->flags, disabled, pass); | ||
126 | if (pci_claim_resource(dev, idx) < 0) { | ||
127 | /* We'll assign a new address later */ | ||
128 | r->end -= r->start; | ||
129 | r->start = 0; | ||
130 | } | ||
131 | } | ||
132 | } | ||
133 | if (!pass) { | ||
134 | r = &dev->resource[PCI_ROM_RESOURCE]; | ||
135 | if (r->flags & IORESOURCE_ROM_ENABLE) { | ||
136 | /* Turn the ROM off, leave the resource region, but keep it unregistered. */ | ||
137 | u32 reg; | ||
138 | DBG("PCI: Switching off ROM of %s\n", pci_name(dev)); | ||
139 | r->flags &= ~IORESOURCE_ROM_ENABLE; | ||
140 | pci_read_config_dword(dev, dev->rom_base_reg, ®); | ||
141 | pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE); | ||
142 | } | ||
143 | } | ||
144 | } | ||
145 | } | ||
146 | |||
147 | static void __init pcibios_assign_resources(void) | ||
148 | { | ||
149 | struct pci_dev *dev = NULL; | ||
150 | int idx, err; | ||
151 | struct resource *r; | ||
152 | |||
153 | for_each_pci_dev(dev) { | ||
154 | int class = dev->class >> 8; | ||
155 | |||
156 | /* Don't touch classless devices and host bridges */ | ||
157 | if (!class || class == PCI_CLASS_BRIDGE_HOST) | ||
158 | continue; | ||
159 | |||
160 | for(idx=0; idx<6; idx++) { | ||
161 | r = &dev->resource[idx]; | ||
162 | |||
163 | /* | ||
164 | * Don't touch IDE controllers and I/O ports of video cards! | ||
165 | */ | ||
166 | if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) || | ||
167 | (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO))) | ||
168 | continue; | ||
169 | |||
170 | /* | ||
171 | * We shall assign a new address to this resource, either because | ||
172 | * the BIOS forgot to do so or because we have decided the old | ||
173 | * address was unusable for some reason. | ||
174 | */ | ||
175 | if (!r->start && r->end) { | ||
176 | err = pci_assign_resource(dev, idx); | ||
177 | if (err) | ||
178 | dev_err(&dev->dev, | ||
179 | "Failed to assign new address to %d\n", | ||
180 | idx); | ||
181 | } | ||
182 | } | ||
183 | } | ||
184 | } | ||
185 | |||
186 | void __init pcibios_resource_survey(void) | ||
187 | { | ||
188 | DBG("PCI: Allocating resources\n"); | ||
189 | pcibios_allocate_bus_resources(&pci_root_buses); | ||
190 | pcibios_allocate_resources(0); | ||
191 | pcibios_allocate_resources(1); | ||
192 | pcibios_assign_resources(); | ||
193 | } | ||
diff --git a/arch/frv/mb93090-mb00/pci-frv.h b/arch/frv/mb93090-mb00/pci-frv.h deleted file mode 100644 index 41fbb6bae558..000000000000 --- a/arch/frv/mb93090-mb00/pci-frv.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * Low-Level PCI Access for FRV machines. | ||
4 | * | ||
5 | * (c) 1999 Martin Mares <mj@ucw.cz> | ||
6 | */ | ||
7 | |||
8 | #include <asm/sections.h> | ||
9 | |||
10 | #undef DEBUG | ||
11 | |||
12 | #ifdef DEBUG | ||
13 | #define DBG(x...) printk(x) | ||
14 | #else | ||
15 | #define DBG(x...) | ||
16 | #endif | ||
17 | |||
18 | extern unsigned int __nongpreldata pci_probe; | ||
19 | |||
20 | /* pci-frv.c */ | ||
21 | |||
22 | void pcibios_resource_survey(void); | ||
23 | |||
24 | /* pci-vdk.c */ | ||
25 | |||
26 | extern struct pci_ops *__nongpreldata pci_root_ops; | ||
27 | |||
28 | /* pci-irq.c */ | ||
29 | extern unsigned int pcibios_irq_mask; | ||
30 | |||
31 | void pcibios_irq_init(void); | ||
32 | void pcibios_fixup_irqs(void); | ||
33 | void pcibios_enable_irq(struct pci_dev *dev); | ||
diff --git a/arch/frv/mb93090-mb00/pci-irq.c b/arch/frv/mb93090-mb00/pci-irq.c deleted file mode 100644 index a40aa8663056..000000000000 --- a/arch/frv/mb93090-mb00/pci-irq.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* pci-irq.c: PCI IRQ routing on the FRV motherboard | ||
3 | * | ||
4 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
5 | * Written by David Howells (dhowells@redhat.com) | ||
6 | * derived from: arch/i386/kernel/pci-irq.c: (c) 1999--2000 Martin Mares <mj@suse.cz> | ||
7 | */ | ||
8 | |||
9 | #include <linux/types.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/pci.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/irq.h> | ||
15 | |||
16 | #include <asm/io.h> | ||
17 | #include <asm/smp.h> | ||
18 | |||
19 | #include "pci-frv.h" | ||
20 | |||
21 | /* | ||
22 | * DEVICE DEVNO INT#A INT#B INT#C INT#D | ||
23 | * ======= ======= ======= ======= ======= ======= | ||
24 | * MB86943 0 fpga.10 - - - | ||
25 | * RTL8029 16 fpga.12 - - - | ||
26 | * SLOT 1 19 fpga.6 fpga.5 fpga.4 fpga.3 | ||
27 | * SLOT 2 18 fpga.5 fpga.4 fpga.3 fpga.6 | ||
28 | * SLOT 3 17 fpga.4 fpga.3 fpga.6 fpga.5 | ||
29 | * | ||
30 | */ | ||
31 | |||
32 | static const uint8_t __initconst pci_bus0_irq_routing[32][4] = { | ||
33 | [0 ] = { IRQ_FPGA_MB86943_PCI_INTA }, | ||
34 | [16] = { IRQ_FPGA_RTL8029_INTA }, | ||
35 | [17] = { IRQ_FPGA_PCI_INTC, IRQ_FPGA_PCI_INTD, IRQ_FPGA_PCI_INTA, IRQ_FPGA_PCI_INTB }, | ||
36 | [18] = { IRQ_FPGA_PCI_INTB, IRQ_FPGA_PCI_INTC, IRQ_FPGA_PCI_INTD, IRQ_FPGA_PCI_INTA }, | ||
37 | [19] = { IRQ_FPGA_PCI_INTA, IRQ_FPGA_PCI_INTB, IRQ_FPGA_PCI_INTC, IRQ_FPGA_PCI_INTD }, | ||
38 | }; | ||
39 | |||
40 | void __init pcibios_irq_init(void) | ||
41 | { | ||
42 | } | ||
43 | |||
44 | void __init pcibios_fixup_irqs(void) | ||
45 | { | ||
46 | struct pci_dev *dev = NULL; | ||
47 | uint8_t line, pin; | ||
48 | |||
49 | for_each_pci_dev(dev) { | ||
50 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); | ||
51 | if (pin) { | ||
52 | dev->irq = pci_bus0_irq_routing[PCI_SLOT(dev->devfn)][pin - 1]; | ||
53 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); | ||
54 | } | ||
55 | pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &line); | ||
56 | } | ||
57 | } | ||
58 | |||
59 | void pcibios_enable_irq(struct pci_dev *dev) | ||
60 | { | ||
61 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); | ||
62 | } | ||
diff --git a/arch/frv/mb93090-mb00/pci-vdk.c b/arch/frv/mb93090-mb00/pci-vdk.c deleted file mode 100644 index f211839e2cae..000000000000 --- a/arch/frv/mb93090-mb00/pci-vdk.c +++ /dev/null | |||
@@ -1,419 +0,0 @@ | |||
1 | /* pci-vdk.c: MB93090-MB00 (VDK) PCI support | ||
2 | * | ||
3 | * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/sched.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/ioport.h> | ||
18 | #include <linux/delay.h> | ||
19 | |||
20 | #include <asm/segment.h> | ||
21 | #include <asm/io.h> | ||
22 | #include <asm/mb-regs.h> | ||
23 | #include <asm/mb86943a.h> | ||
24 | #include "pci-frv.h" | ||
25 | |||
26 | unsigned int __nongpreldata pci_probe = 1; | ||
27 | |||
28 | struct pci_ops *__nongpreldata pci_root_ops; | ||
29 | |||
30 | /* | ||
31 | * The accessible PCI window does not cover the entire CPU address space, but | ||
32 | * there are devices we want to access outside of that window, so we need to | ||
33 | * insert specific PCI bus resources instead of using the platform-level bus | ||
34 | * resources directly for the PCI root bus. | ||
35 | * | ||
36 | * These are configured and inserted by pcibios_init() and are attached to the | ||
37 | * root bus by pcibios_fixup_bus(). | ||
38 | */ | ||
39 | static struct resource pci_ioport_resource = { | ||
40 | .name = "PCI IO", | ||
41 | .start = 0, | ||
42 | .end = IO_SPACE_LIMIT, | ||
43 | .flags = IORESOURCE_IO, | ||
44 | }; | ||
45 | |||
46 | static struct resource pci_iomem_resource = { | ||
47 | .name = "PCI mem", | ||
48 | .start = 0, | ||
49 | .end = -1, | ||
50 | .flags = IORESOURCE_MEM, | ||
51 | }; | ||
52 | |||
53 | /* | ||
54 | * Functions for accessing PCI configuration space | ||
55 | */ | ||
56 | |||
57 | #define CONFIG_CMD(bus, dev, where) \ | ||
58 | (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) | ||
59 | |||
60 | #define __set_PciCfgAddr(A) writel((A), (volatile void __iomem *) __region_CS1 + 0x80) | ||
61 | |||
62 | #define __get_PciCfgDataB(A) readb((volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 3)) | ||
63 | #define __get_PciCfgDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 2)) | ||
64 | #define __get_PciCfgDataL(A) readl((volatile void __iomem *) __region_CS1 + 0x88) | ||
65 | |||
66 | #define __set_PciCfgDataB(A,V) \ | ||
67 | writeb((V), (volatile void __iomem *) __region_CS1 + 0x88 + (3 - ((A) & 3))) | ||
68 | |||
69 | #define __set_PciCfgDataW(A,V) \ | ||
70 | writew((V), (volatile void __iomem *) __region_CS1 + 0x88 + (2 - ((A) & 2))) | ||
71 | |||
72 | #define __set_PciCfgDataL(A,V) \ | ||
73 | writel((V), (volatile void __iomem *) __region_CS1 + 0x88) | ||
74 | |||
75 | #define __get_PciBridgeDataB(A) readb((volatile void __iomem *) __region_CS1 + 0x800 + (A)) | ||
76 | #define __get_PciBridgeDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x800 + (A)) | ||
77 | #define __get_PciBridgeDataL(A) readl((volatile void __iomem *) __region_CS1 + 0x800 + (A)) | ||
78 | |||
79 | #define __set_PciBridgeDataB(A,V) writeb((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) | ||
80 | #define __set_PciBridgeDataW(A,V) writew((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) | ||
81 | #define __set_PciBridgeDataL(A,V) writel((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) | ||
82 | |||
83 | static inline int __query(const struct pci_dev *dev) | ||
84 | { | ||
85 | // return dev->bus->number==0 && (dev->devfn==PCI_DEVFN(0,0)); | ||
86 | // return dev->bus->number==1; | ||
87 | // return dev->bus->number==0 && | ||
88 | // (dev->devfn==PCI_DEVFN(2,0) || dev->devfn==PCI_DEVFN(3,0)); | ||
89 | return 0; | ||
90 | } | ||
91 | |||
92 | /*****************************************************************************/ | ||
93 | /* | ||
94 | * | ||
95 | */ | ||
96 | static int pci_frv_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, | ||
97 | u32 *val) | ||
98 | { | ||
99 | u32 _value; | ||
100 | |||
101 | if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { | ||
102 | _value = __get_PciBridgeDataL(where & ~3); | ||
103 | } | ||
104 | else { | ||
105 | __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); | ||
106 | _value = __get_PciCfgDataL(where & ~3); | ||
107 | } | ||
108 | |||
109 | switch (size) { | ||
110 | case 1: | ||
111 | _value = _value >> ((where & 3) * 8); | ||
112 | break; | ||
113 | |||
114 | case 2: | ||
115 | _value = _value >> ((where & 2) * 8); | ||
116 | break; | ||
117 | |||
118 | case 4: | ||
119 | break; | ||
120 | |||
121 | default: | ||
122 | BUG(); | ||
123 | } | ||
124 | |||
125 | *val = _value; | ||
126 | return PCIBIOS_SUCCESSFUL; | ||
127 | } | ||
128 | |||
129 | static int pci_frv_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, | ||
130 | u32 value) | ||
131 | { | ||
132 | switch (size) { | ||
133 | case 1: | ||
134 | if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { | ||
135 | __set_PciBridgeDataB(where, value); | ||
136 | } | ||
137 | else { | ||
138 | __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); | ||
139 | __set_PciCfgDataB(where, value); | ||
140 | } | ||
141 | break; | ||
142 | |||
143 | case 2: | ||
144 | if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { | ||
145 | __set_PciBridgeDataW(where, value); | ||
146 | } | ||
147 | else { | ||
148 | __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); | ||
149 | __set_PciCfgDataW(where, value); | ||
150 | } | ||
151 | break; | ||
152 | |||
153 | case 4: | ||
154 | if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { | ||
155 | __set_PciBridgeDataL(where, value); | ||
156 | } | ||
157 | else { | ||
158 | __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); | ||
159 | __set_PciCfgDataL(where, value); | ||
160 | } | ||
161 | break; | ||
162 | |||
163 | default: | ||
164 | BUG(); | ||
165 | } | ||
166 | |||
167 | return PCIBIOS_SUCCESSFUL; | ||
168 | } | ||
169 | |||
170 | static struct pci_ops pci_direct_frv = { | ||
171 | .read = pci_frv_read_config, | ||
172 | .write = pci_frv_write_config, | ||
173 | }; | ||
174 | |||
175 | /* | ||
176 | * Before we decide to use direct hardware access mechanisms, we try to do some | ||
177 | * trivial checks to ensure it at least _seems_ to be working -- we just test | ||
178 | * whether bus 00 contains a host bridge (this is similar to checking | ||
179 | * techniques used in XFree86, but ours should be more reliable since we | ||
180 | * attempt to make use of direct access hints provided by the PCI BIOS). | ||
181 | * | ||
182 | * This should be close to trivial, but it isn't, because there are buggy | ||
183 | * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID. | ||
184 | */ | ||
185 | static int __init pci_sanity_check(struct pci_ops *o) | ||
186 | { | ||
187 | struct pci_bus bus; /* Fake bus and device */ | ||
188 | u32 id; | ||
189 | |||
190 | bus.number = 0; | ||
191 | |||
192 | if (o->read(&bus, 0, PCI_VENDOR_ID, 4, &id) == PCIBIOS_SUCCESSFUL) { | ||
193 | printk("PCI: VDK Bridge device:vendor: %08x\n", id); | ||
194 | if (id == 0x200e10cf) | ||
195 | return 1; | ||
196 | } | ||
197 | |||
198 | printk("PCI: VDK Bridge: Sanity check failed\n"); | ||
199 | return 0; | ||
200 | } | ||
201 | |||
202 | static struct pci_ops * __init pci_check_direct(void) | ||
203 | { | ||
204 | unsigned long flags; | ||
205 | |||
206 | local_irq_save(flags); | ||
207 | |||
208 | /* check if access works */ | ||
209 | if (pci_sanity_check(&pci_direct_frv)) { | ||
210 | local_irq_restore(flags); | ||
211 | printk("PCI: Using configuration frv\n"); | ||
212 | // request_mem_region(0xBE040000, 256, "FRV bridge"); | ||
213 | // request_mem_region(0xBFFFFFF4, 12, "PCI frv"); | ||
214 | return &pci_direct_frv; | ||
215 | } | ||
216 | |||
217 | local_irq_restore(flags); | ||
218 | return NULL; | ||
219 | } | ||
220 | |||
221 | /* | ||
222 | * Exceptions for specific devices. Usually work-arounds for fatal design flaws. | ||
223 | */ | ||
224 | |||
225 | static void __init pci_fixup_umc_ide(struct pci_dev *d) | ||
226 | { | ||
227 | /* | ||
228 | * UM8886BF IDE controller sets region type bits incorrectly, | ||
229 | * therefore they look like memory despite of them being I/O. | ||
230 | */ | ||
231 | int i; | ||
232 | |||
233 | printk("PCI: Fixing base address flags for device %s\n", pci_name(d)); | ||
234 | for(i=0; i<4; i++) | ||
235 | d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO; | ||
236 | } | ||
237 | |||
238 | static void pci_fixup_ide_bases(struct pci_dev *d) | ||
239 | { | ||
240 | int i; | ||
241 | |||
242 | /* | ||
243 | * PCI IDE controllers use non-standard I/O port decoding, respect it. | ||
244 | */ | ||
245 | if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) | ||
246 | return; | ||
247 | printk("PCI: IDE base address fixup for %s\n", pci_name(d)); | ||
248 | for(i=0; i<4; i++) { | ||
249 | struct resource *r = &d->resource[i]; | ||
250 | if ((r->start & ~0x80) == 0x374) { | ||
251 | r->start |= 2; | ||
252 | r->end = r->start; | ||
253 | } | ||
254 | } | ||
255 | } | ||
256 | |||
257 | static void pci_fixup_ide_trash(struct pci_dev *d) | ||
258 | { | ||
259 | int i; | ||
260 | |||
261 | /* | ||
262 | * There exist PCI IDE controllers which have utter garbage | ||
263 | * in first four base registers. Ignore that. | ||
264 | */ | ||
265 | printk("PCI: IDE base address trash cleared for %s\n", pci_name(d)); | ||
266 | for(i=0; i<4; i++) | ||
267 | d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0; | ||
268 | } | ||
269 | |||
270 | static void pci_fixup_latency(struct pci_dev *d) | ||
271 | { | ||
272 | /* | ||
273 | * SiS 5597 and 5598 chipsets require latency timer set to | ||
274 | * at most 32 to avoid lockups. | ||
275 | */ | ||
276 | DBG("PCI: Setting max latency to 32\n"); | ||
277 | pcibios_max_latency = 32; | ||
278 | } | ||
279 | |||
280 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF, pci_fixup_umc_ide); | ||
281 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash); | ||
282 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, pci_fixup_latency); | ||
283 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5598, pci_fixup_latency); | ||
284 | DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); | ||
285 | |||
286 | /* | ||
287 | * Called after each bus is probed, but before its children | ||
288 | * are examined. | ||
289 | */ | ||
290 | |||
291 | void pcibios_fixup_bus(struct pci_bus *bus) | ||
292 | { | ||
293 | #if 0 | ||
294 | printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number); | ||
295 | #endif | ||
296 | |||
297 | pci_read_bridge_bases(bus); | ||
298 | |||
299 | if (bus->number == 0) { | ||
300 | struct pci_dev *dev; | ||
301 | list_for_each_entry(dev, &bus->devices, bus_list) { | ||
302 | if (dev->devfn == 0) { | ||
303 | dev->resource[0].start = 0; | ||
304 | dev->resource[0].end = 0; | ||
305 | } | ||
306 | } | ||
307 | } | ||
308 | } | ||
309 | |||
310 | /* | ||
311 | * Initialization. Try all known PCI access methods. Note that we support | ||
312 | * using both PCI BIOS and direct access: in such cases, we use I/O ports | ||
313 | * to access config space, but we still keep BIOS order of cards to be | ||
314 | * compatible with 2.0.X. This should go away some day. | ||
315 | */ | ||
316 | |||
317 | int __init pcibios_init(void) | ||
318 | { | ||
319 | struct pci_bus *bus; | ||
320 | struct pci_ops *dir = NULL; | ||
321 | LIST_HEAD(resources); | ||
322 | |||
323 | if (!mb93090_mb00_detected) | ||
324 | return -ENXIO; | ||
325 | |||
326 | __reg_MB86943_sl_ctl |= MB86943_SL_CTL_DRCT_MASTER_SWAP | MB86943_SL_CTL_DRCT_SLAVE_SWAP; | ||
327 | |||
328 | __reg_MB86943_ecs_base(1) = ((__region_CS2 + 0x01000000) >> 9) | 0x08000000; | ||
329 | __reg_MB86943_ecs_base(2) = ((__region_CS2 + 0x00000000) >> 9) | 0x08000000; | ||
330 | |||
331 | *(volatile uint32_t *) (__region_CS1 + 0x848) = 0xe0000000; | ||
332 | *(volatile uint32_t *) (__region_CS1 + 0x8b8) = 0x00000000; | ||
333 | |||
334 | __reg_MB86943_sl_pci_io_base = (__region_CS2 + 0x04000000) >> 9; | ||
335 | __reg_MB86943_sl_pci_mem_base = (__region_CS2 + 0x08000000) >> 9; | ||
336 | __reg_MB86943_pci_sl_io_base = __region_CS2 + 0x04000000; | ||
337 | __reg_MB86943_pci_sl_mem_base = __region_CS2 + 0x08000000; | ||
338 | mb(); | ||
339 | |||
340 | /* enable PCI arbitration */ | ||
341 | __reg_MB86943_pci_arbiter = MB86943_PCIARB_EN; | ||
342 | |||
343 | pci_ioport_resource.start = (__reg_MB86943_sl_pci_io_base << 9) & 0xfffffc00; | ||
344 | pci_ioport_resource.end = (__reg_MB86943_sl_pci_io_range << 9) | 0x3ff; | ||
345 | pci_ioport_resource.end += pci_ioport_resource.start; | ||
346 | |||
347 | printk("PCI IO window: %08llx-%08llx\n", | ||
348 | (unsigned long long) pci_ioport_resource.start, | ||
349 | (unsigned long long) pci_ioport_resource.end); | ||
350 | |||
351 | pci_iomem_resource.start = (__reg_MB86943_sl_pci_mem_base << 9) & 0xfffffc00; | ||
352 | pci_iomem_resource.end = (__reg_MB86943_sl_pci_mem_range << 9) | 0x3ff; | ||
353 | pci_iomem_resource.end += pci_iomem_resource.start; | ||
354 | |||
355 | /* Reserve somewhere to write to flush posted writes. This is used by | ||
356 | * __flush_PCI_writes() from asm/io.h to force the write FIFO in the | ||
357 | * CPU-PCI bridge to flush as this doesn't happen automatically when a | ||
358 | * read is performed on the MB93090 development kit motherboard. | ||
359 | */ | ||
360 | pci_iomem_resource.start += 0x400; | ||
361 | |||
362 | printk("PCI MEM window: %08llx-%08llx\n", | ||
363 | (unsigned long long) pci_iomem_resource.start, | ||
364 | (unsigned long long) pci_iomem_resource.end); | ||
365 | printk("PCI DMA memory: %08lx-%08lx\n", | ||
366 | dma_coherent_mem_start, dma_coherent_mem_end); | ||
367 | |||
368 | if (insert_resource(&iomem_resource, &pci_iomem_resource) < 0) | ||
369 | panic("Unable to insert PCI IOMEM resource\n"); | ||
370 | if (insert_resource(&ioport_resource, &pci_ioport_resource) < 0) | ||
371 | panic("Unable to insert PCI IOPORT resource\n"); | ||
372 | |||
373 | if (!pci_probe) | ||
374 | return -ENXIO; | ||
375 | |||
376 | dir = pci_check_direct(); | ||
377 | if (dir) | ||
378 | pci_root_ops = dir; | ||
379 | else { | ||
380 | printk("PCI: No PCI bus detected\n"); | ||
381 | return -ENXIO; | ||
382 | } | ||
383 | |||
384 | printk("PCI: Probing PCI hardware\n"); | ||
385 | pci_add_resource(&resources, &pci_ioport_resource); | ||
386 | pci_add_resource(&resources, &pci_iomem_resource); | ||
387 | bus = pci_scan_root_bus(NULL, 0, pci_root_ops, NULL, &resources); | ||
388 | |||
389 | pcibios_irq_init(); | ||
390 | pcibios_fixup_irqs(); | ||
391 | pcibios_resource_survey(); | ||
392 | if (!bus) | ||
393 | return 0; | ||
394 | |||
395 | pci_bus_add_devices(bus); | ||
396 | return 0; | ||
397 | } | ||
398 | |||
399 | arch_initcall(pcibios_init); | ||
400 | |||
401 | char * __init pcibios_setup(char *str) | ||
402 | { | ||
403 | if (!strcmp(str, "off")) { | ||
404 | pci_probe = 0; | ||
405 | return NULL; | ||
406 | } | ||
407 | return str; | ||
408 | } | ||
409 | |||
410 | int pcibios_enable_device(struct pci_dev *dev, int mask) | ||
411 | { | ||
412 | int err; | ||
413 | |||
414 | if ((err = pci_enable_resources(dev, mask)) < 0) | ||
415 | return err; | ||
416 | if (!dev->msi_enabled) | ||
417 | pcibios_enable_irq(dev); | ||
418 | return 0; | ||
419 | } | ||
diff --git a/arch/frv/mm/Makefile b/arch/frv/mm/Makefile deleted file mode 100644 index 1bca5ab8a6ab..000000000000 --- a/arch/frv/mm/Makefile +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the arch-specific parts of the memory manager. | ||
3 | # | ||
4 | |||
5 | obj-y := init.o kmap.o | ||
6 | |||
7 | obj-$(CONFIG_MMU) += \ | ||
8 | pgalloc.o highmem.o fault.o extable.o cache-page.o tlb-flush.o tlb-miss.o \ | ||
9 | mmu-context.o dma-alloc.o elf-fdpic.o | ||
diff --git a/arch/frv/mm/cache-page.c b/arch/frv/mm/cache-page.c deleted file mode 100644 index 8e09dae0ec3f..000000000000 --- a/arch/frv/mm/cache-page.c +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | /* cache-page.c: whole-page cache wrangling functions for MMU linux | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #include <linux/sched.h> | ||
12 | #include <linux/mm.h> | ||
13 | #include <linux/highmem.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <asm/pgalloc.h> | ||
16 | |||
17 | /*****************************************************************************/ | ||
18 | /* | ||
19 | * DCF takes a virtual address and the page may not currently have one | ||
20 | * - temporarily hijack a kmap_atomic() slot and attach the page to it | ||
21 | */ | ||
22 | void flush_dcache_page(struct page *page) | ||
23 | { | ||
24 | unsigned long dampr2; | ||
25 | void *vaddr; | ||
26 | |||
27 | dampr2 = __get_DAMPR(2); | ||
28 | |||
29 | vaddr = kmap_atomic_primary(page); | ||
30 | |||
31 | frv_dcache_writeback((unsigned long) vaddr, (unsigned long) vaddr + PAGE_SIZE); | ||
32 | |||
33 | kunmap_atomic_primary(vaddr); | ||
34 | |||
35 | if (dampr2) { | ||
36 | __set_DAMPR(2, dampr2); | ||
37 | __set_IAMPR(2, dampr2); | ||
38 | } | ||
39 | |||
40 | } /* end flush_dcache_page() */ | ||
41 | |||
42 | EXPORT_SYMBOL(flush_dcache_page); | ||
43 | |||
44 | /*****************************************************************************/ | ||
45 | /* | ||
46 | * ICI takes a virtual address and the page may not currently have one | ||
47 | * - so we temporarily attach the page to a bit of virtual space so that is can be flushed | ||
48 | */ | ||
49 | void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, | ||
50 | unsigned long start, unsigned long len) | ||
51 | { | ||
52 | unsigned long dampr2; | ||
53 | void *vaddr; | ||
54 | |||
55 | dampr2 = __get_DAMPR(2); | ||
56 | |||
57 | vaddr = kmap_atomic_primary(page); | ||
58 | |||
59 | start = (start & ~PAGE_MASK) | (unsigned long) vaddr; | ||
60 | frv_cache_wback_inv(start, start + len); | ||
61 | |||
62 | kunmap_atomic_primary(vaddr); | ||
63 | |||
64 | if (dampr2) { | ||
65 | __set_DAMPR(2, dampr2); | ||
66 | __set_IAMPR(2, dampr2); | ||
67 | } | ||
68 | |||
69 | } /* end flush_icache_user_range() */ | ||
70 | |||
71 | EXPORT_SYMBOL(flush_icache_user_range); | ||
diff --git a/arch/frv/mm/dma-alloc.c b/arch/frv/mm/dma-alloc.c deleted file mode 100644 index e701aa9e6a14..000000000000 --- a/arch/frv/mm/dma-alloc.c +++ /dev/null | |||
@@ -1,183 +0,0 @@ | |||
1 | /* dma-alloc.c: consistent DMA memory allocation | ||
2 | * | ||
3 | * Derived from arch/ppc/mm/cachemap.c | ||
4 | * | ||
5 | * PowerPC version derived from arch/arm/mm/consistent.c | ||
6 | * Copyright (C) 2001 Dan Malek (dmalek@jlc.net) | ||
7 | * | ||
8 | * linux/arch/arm/mm/consistent.c | ||
9 | * | ||
10 | * Copyright (C) 2000 Russell King | ||
11 | * | ||
12 | * Consistent memory allocators. Used for DMA devices that want to | ||
13 | * share uncached memory with the processor core. The function return | ||
14 | * is the virtual address and 'dma_handle' is the physical address. | ||
15 | * Mostly stolen from the ARM port, with some changes for PowerPC. | ||
16 | * -- Dan | ||
17 | * Modified for 36-bit support. -Matt | ||
18 | * | ||
19 | * This program is free software; you can redistribute it and/or modify | ||
20 | * it under the terms of the GNU General Public License version 2 as | ||
21 | * published by the Free Software Foundation. | ||
22 | */ | ||
23 | |||
24 | #include <linux/module.h> | ||
25 | #include <linux/signal.h> | ||
26 | #include <linux/sched.h> | ||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/errno.h> | ||
29 | #include <linux/string.h> | ||
30 | #include <linux/types.h> | ||
31 | #include <linux/ptrace.h> | ||
32 | #include <linux/mman.h> | ||
33 | #include <linux/mm.h> | ||
34 | #include <linux/swap.h> | ||
35 | #include <linux/stddef.h> | ||
36 | #include <linux/vmalloc.h> | ||
37 | #include <linux/init.h> | ||
38 | #include <linux/pci.h> | ||
39 | #include <linux/hardirq.h> | ||
40 | #include <linux/gfp.h> | ||
41 | |||
42 | #include <asm/pgalloc.h> | ||
43 | #include <asm/io.h> | ||
44 | #include <asm/mmu_context.h> | ||
45 | #include <asm/pgtable.h> | ||
46 | #include <asm/mmu.h> | ||
47 | #include <linux/uaccess.h> | ||
48 | #include <asm/smp.h> | ||
49 | |||
50 | static int map_page(unsigned long va, unsigned long pa, pgprot_t prot) | ||
51 | { | ||
52 | pgd_t *pge; | ||
53 | pud_t *pue; | ||
54 | pmd_t *pme; | ||
55 | pte_t *pte; | ||
56 | int err = -ENOMEM; | ||
57 | |||
58 | /* Use upper 10 bits of VA to index the first level map */ | ||
59 | pge = pgd_offset_k(va); | ||
60 | pue = pud_offset(pge, va); | ||
61 | pme = pmd_offset(pue, va); | ||
62 | |||
63 | /* Use middle 10 bits of VA to index the second-level map */ | ||
64 | pte = pte_alloc_kernel(pme, va); | ||
65 | if (pte != 0) { | ||
66 | err = 0; | ||
67 | set_pte(pte, mk_pte_phys(pa & PAGE_MASK, prot)); | ||
68 | } | ||
69 | |||
70 | return err; | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * This function will allocate the requested contiguous pages and | ||
75 | * map them into the kernel's vmalloc() space. This is done so we | ||
76 | * get unique mapping for these pages, outside of the kernel's 1:1 | ||
77 | * virtual:physical mapping. This is necessary so we can cover large | ||
78 | * portions of the kernel with single large page TLB entries, and | ||
79 | * still get unique uncached pages for consistent DMA. | ||
80 | */ | ||
81 | void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle) | ||
82 | { | ||
83 | struct vm_struct *area; | ||
84 | unsigned long page, va, pa; | ||
85 | void *ret; | ||
86 | int order, err, i; | ||
87 | |||
88 | if (in_interrupt()) | ||
89 | BUG(); | ||
90 | |||
91 | /* only allocate page size areas */ | ||
92 | size = PAGE_ALIGN(size); | ||
93 | order = get_order(size); | ||
94 | |||
95 | page = __get_free_pages(gfp, order); | ||
96 | if (!page) { | ||
97 | BUG(); | ||
98 | return NULL; | ||
99 | } | ||
100 | |||
101 | /* allocate some common virtual space to map the new pages */ | ||
102 | area = get_vm_area(size, VM_ALLOC); | ||
103 | if (area == 0) { | ||
104 | free_pages(page, order); | ||
105 | return NULL; | ||
106 | } | ||
107 | va = VMALLOC_VMADDR(area->addr); | ||
108 | ret = (void *) va; | ||
109 | |||
110 | /* this gives us the real physical address of the first page */ | ||
111 | *dma_handle = pa = virt_to_bus((void *) page); | ||
112 | |||
113 | /* set refcount=1 on all pages in an order>0 allocation so that vfree() will actually free | ||
114 | * all pages that were allocated. | ||
115 | */ | ||
116 | if (order > 0) { | ||
117 | struct page *rpage = virt_to_page(page); | ||
118 | split_page(rpage, order); | ||
119 | } | ||
120 | |||
121 | err = 0; | ||
122 | for (i = 0; i < size && err == 0; i += PAGE_SIZE) | ||
123 | err = map_page(va + i, pa + i, PAGE_KERNEL_NOCACHE); | ||
124 | |||
125 | if (err) { | ||
126 | vfree((void *) va); | ||
127 | return NULL; | ||
128 | } | ||
129 | |||
130 | /* we need to ensure that there are no cachelines in use, or worse dirty in this area | ||
131 | * - can't do until after virtual address mappings are created | ||
132 | */ | ||
133 | frv_cache_invalidate(va, va + size); | ||
134 | |||
135 | return ret; | ||
136 | } | ||
137 | |||
138 | /* | ||
139 | * free page(s) as defined by the above mapping. | ||
140 | */ | ||
141 | void consistent_free(void *vaddr) | ||
142 | { | ||
143 | if (in_interrupt()) | ||
144 | BUG(); | ||
145 | vfree(vaddr); | ||
146 | } | ||
147 | |||
148 | /* | ||
149 | * make an area consistent. | ||
150 | */ | ||
151 | void consistent_sync(void *vaddr, size_t size, int direction) | ||
152 | { | ||
153 | unsigned long start = (unsigned long) vaddr; | ||
154 | unsigned long end = start + size; | ||
155 | |||
156 | switch (direction) { | ||
157 | case PCI_DMA_NONE: | ||
158 | BUG(); | ||
159 | case PCI_DMA_FROMDEVICE: /* invalidate only */ | ||
160 | frv_cache_invalidate(start, end); | ||
161 | break; | ||
162 | case PCI_DMA_TODEVICE: /* writeback only */ | ||
163 | frv_dcache_writeback(start, end); | ||
164 | break; | ||
165 | case PCI_DMA_BIDIRECTIONAL: /* writeback and invalidate */ | ||
166 | frv_dcache_writeback(start, end); | ||
167 | break; | ||
168 | } | ||
169 | } | ||
170 | |||
171 | /* | ||
172 | * consistent_sync_page make a page are consistent. identical | ||
173 | * to consistent_sync, but takes a struct page instead of a virtual address | ||
174 | */ | ||
175 | |||
176 | void consistent_sync_page(struct page *page, unsigned long offset, | ||
177 | size_t size, int direction) | ||
178 | { | ||
179 | void *start; | ||
180 | |||
181 | start = page_address(page) + offset; | ||
182 | consistent_sync(start, size, direction); | ||
183 | } | ||
diff --git a/arch/frv/mm/elf-fdpic.c b/arch/frv/mm/elf-fdpic.c deleted file mode 100644 index 46aa289c5102..000000000000 --- a/arch/frv/mm/elf-fdpic.c +++ /dev/null | |||
@@ -1,114 +0,0 @@ | |||
1 | /* elf-fdpic.c: ELF FDPIC memory layout management | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/sched.h> | ||
13 | #include <linux/sched/mm.h> | ||
14 | #include <linux/mm.h> | ||
15 | #include <linux/fs.h> | ||
16 | #include <linux/elf-fdpic.h> | ||
17 | #include <asm/mman.h> | ||
18 | |||
19 | /*****************************************************************************/ | ||
20 | /* | ||
21 | * lay out the userspace VM according to our grand design | ||
22 | */ | ||
23 | #ifdef CONFIG_MMU | ||
24 | void elf_fdpic_arch_lay_out_mm(struct elf_fdpic_params *exec_params, | ||
25 | struct elf_fdpic_params *interp_params, | ||
26 | unsigned long *start_stack, | ||
27 | unsigned long *start_brk) | ||
28 | { | ||
29 | *start_stack = 0x02200000UL; | ||
30 | |||
31 | /* if the only executable is a shared object, assume that it is an interpreter rather than | ||
32 | * a true executable, and map it such that "ld.so --list" comes out right | ||
33 | */ | ||
34 | if (!(interp_params->flags & ELF_FDPIC_FLAG_PRESENT) && | ||
35 | exec_params->hdr.e_type != ET_EXEC | ||
36 | ) { | ||
37 | exec_params->load_addr = PAGE_SIZE; | ||
38 | |||
39 | *start_brk = 0x80000000UL; | ||
40 | } | ||
41 | else { | ||
42 | exec_params->load_addr = 0x02200000UL; | ||
43 | |||
44 | if ((exec_params->flags & ELF_FDPIC_FLAG_ARRANGEMENT) == | ||
45 | ELF_FDPIC_FLAG_INDEPENDENT | ||
46 | ) { | ||
47 | exec_params->flags &= ~ELF_FDPIC_FLAG_ARRANGEMENT; | ||
48 | exec_params->flags |= ELF_FDPIC_FLAG_CONSTDISP; | ||
49 | } | ||
50 | } | ||
51 | |||
52 | } /* end elf_fdpic_arch_lay_out_mm() */ | ||
53 | #endif | ||
54 | |||
55 | /*****************************************************************************/ | ||
56 | /* | ||
57 | * place non-fixed mmaps firstly in the bottom part of memory, working up, and then in the top part | ||
58 | * of memory, working down | ||
59 | */ | ||
60 | unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, | ||
61 | unsigned long pgoff, unsigned long flags) | ||
62 | { | ||
63 | struct vm_area_struct *vma; | ||
64 | struct vm_unmapped_area_info info; | ||
65 | |||
66 | if (len > TASK_SIZE) | ||
67 | return -ENOMEM; | ||
68 | |||
69 | /* handle MAP_FIXED */ | ||
70 | if (flags & MAP_FIXED) | ||
71 | return addr; | ||
72 | |||
73 | /* only honour a hint if we're not going to clobber something doing so */ | ||
74 | if (addr) { | ||
75 | addr = PAGE_ALIGN(addr); | ||
76 | vma = find_vma(current->mm, addr); | ||
77 | if (TASK_SIZE - len >= addr && | ||
78 | (!vma || addr + len <= vm_start_gap(vma))) | ||
79 | goto success; | ||
80 | } | ||
81 | |||
82 | /* search between the bottom of user VM and the stack grow area */ | ||
83 | info.flags = 0; | ||
84 | info.length = len; | ||
85 | info.low_limit = PAGE_SIZE; | ||
86 | info.high_limit = (current->mm->start_stack - 0x00200000); | ||
87 | info.align_mask = 0; | ||
88 | info.align_offset = 0; | ||
89 | addr = vm_unmapped_area(&info); | ||
90 | if (!(addr & ~PAGE_MASK)) | ||
91 | goto success; | ||
92 | VM_BUG_ON(addr != -ENOMEM); | ||
93 | |||
94 | /* search from just above the WorkRAM area to the top of memory */ | ||
95 | info.low_limit = PAGE_ALIGN(0x80000000); | ||
96 | info.high_limit = TASK_SIZE; | ||
97 | addr = vm_unmapped_area(&info); | ||
98 | if (!(addr & ~PAGE_MASK)) | ||
99 | goto success; | ||
100 | VM_BUG_ON(addr != -ENOMEM); | ||
101 | |||
102 | #if 0 | ||
103 | printk("[area] l=%lx (ENOMEM) f='%s'\n", | ||
104 | len, filp ? filp->f_path.dentry->d_name.name : ""); | ||
105 | #endif | ||
106 | return -ENOMEM; | ||
107 | |||
108 | success: | ||
109 | #if 0 | ||
110 | printk("[area] l=%lx ad=%lx f='%s'\n", | ||
111 | len, addr, filp ? filp->f_path.dentry->d_name.name : ""); | ||
112 | #endif | ||
113 | return addr; | ||
114 | } /* end arch_get_unmapped_area() */ | ||
diff --git a/arch/frv/mm/extable.c b/arch/frv/mm/extable.c deleted file mode 100644 index 77c0c5ba88bc..000000000000 --- a/arch/frv/mm/extable.c +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/frv/mm/extable.c | ||
4 | */ | ||
5 | |||
6 | #include <linux/extable.h> | ||
7 | #include <linux/spinlock.h> | ||
8 | #include <linux/uaccess.h> | ||
9 | |||
10 | extern const void __memset_end, __memset_user_error_lr, __memset_user_error_handler; | ||
11 | extern const void __memcpy_end, __memcpy_user_error_lr, __memcpy_user_error_handler; | ||
12 | extern spinlock_t modlist_lock; | ||
13 | |||
14 | int fixup_exception(struct pt_regs *regs) | ||
15 | { | ||
16 | const struct exception_table_entry *extab; | ||
17 | unsigned long pc = regs->pc; | ||
18 | |||
19 | /* determine if the fault lay during a memcpy_user or a memset_user */ | ||
20 | if (regs->lr == (unsigned long) &__memset_user_error_lr && | ||
21 | (unsigned long) &memset <= pc && pc < (unsigned long) &__memset_end | ||
22 | ) { | ||
23 | /* the fault occurred in a protected memset | ||
24 | * - we search for the return address (in LR) instead of the program counter | ||
25 | * - it was probably during a clear_user() | ||
26 | */ | ||
27 | regs->pc = (unsigned long) &__memset_user_error_handler; | ||
28 | return 1; | ||
29 | } | ||
30 | |||
31 | if (regs->lr == (unsigned long) &__memcpy_user_error_lr && | ||
32 | (unsigned long) &memcpy <= pc && pc < (unsigned long) &__memcpy_end | ||
33 | ) { | ||
34 | /* the fault occurred in a protected memset | ||
35 | * - we search for the return address (in LR) instead of the program counter | ||
36 | * - it was probably during a copy_to/from_user() | ||
37 | */ | ||
38 | regs->pc = (unsigned long) &__memcpy_user_error_handler; | ||
39 | return 1; | ||
40 | } | ||
41 | |||
42 | extab = search_exception_tables(pc); | ||
43 | if (extab) { | ||
44 | regs->pc = extab->fixup; | ||
45 | return 1; | ||
46 | } | ||
47 | |||
48 | return 0; | ||
49 | } | ||
diff --git a/arch/frv/mm/fault.c b/arch/frv/mm/fault.c deleted file mode 100644 index cbe7aec863e3..000000000000 --- a/arch/frv/mm/fault.c +++ /dev/null | |||
@@ -1,328 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/frv/mm/fault.c | ||
4 | * | ||
5 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
6 | * - Written by David Howells (dhowells@redhat.com) | ||
7 | * - Derived from arch/m68knommu/mm/fault.c | ||
8 | * - Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>, | ||
9 | * - Copyright (C) 2000 Lineo, Inc. (www.lineo.com) | ||
10 | * | ||
11 | * Based on: | ||
12 | * | ||
13 | * linux/arch/m68k/mm/fault.c | ||
14 | * | ||
15 | * Copyright (C) 1995 Hamish Macdonald | ||
16 | */ | ||
17 | |||
18 | #include <linux/mman.h> | ||
19 | #include <linux/mm.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/ptrace.h> | ||
22 | #include <linux/hardirq.h> | ||
23 | #include <linux/uaccess.h> | ||
24 | |||
25 | #include <asm/pgtable.h> | ||
26 | #include <asm/gdb-stub.h> | ||
27 | |||
28 | /*****************************************************************************/ | ||
29 | /* | ||
30 | * This routine handles page faults. It determines the problem, and | ||
31 | * then passes it off to one of the appropriate routines. | ||
32 | */ | ||
33 | asmlinkage void do_page_fault(int datammu, unsigned long esr0, unsigned long ear0) | ||
34 | { | ||
35 | struct vm_area_struct *vma; | ||
36 | struct mm_struct *mm; | ||
37 | unsigned long _pme, lrai, lrad; | ||
38 | unsigned long flags = 0; | ||
39 | siginfo_t info; | ||
40 | pgd_t *pge; | ||
41 | pud_t *pue; | ||
42 | pte_t *pte; | ||
43 | int fault; | ||
44 | |||
45 | #if 0 | ||
46 | const char *atxc[16] = { | ||
47 | [0x0] = "mmu-miss", [0x8] = "multi-dat", [0x9] = "multi-sat", | ||
48 | [0xa] = "tlb-miss", [0xc] = "privilege", [0xd] = "write-prot", | ||
49 | }; | ||
50 | |||
51 | printk("do_page_fault(%d,%lx [%s],%lx)\n", | ||
52 | datammu, esr0, atxc[esr0 >> 20 & 0xf], ear0); | ||
53 | #endif | ||
54 | |||
55 | mm = current->mm; | ||
56 | |||
57 | /* | ||
58 | * We fault-in kernel-space virtual memory on-demand. The | ||
59 | * 'reference' page table is init_mm.pgd. | ||
60 | * | ||
61 | * NOTE! We MUST NOT take any locks for this case. We may | ||
62 | * be in an interrupt or a critical region, and should | ||
63 | * only copy the information from the master page table, | ||
64 | * nothing more. | ||
65 | * | ||
66 | * This verifies that the fault happens in kernel space | ||
67 | * and that the fault was a page not present (invalid) error | ||
68 | */ | ||
69 | if (!user_mode(__frame) && (esr0 & ESR0_ATXC) == ESR0_ATXC_AMRTLB_MISS) { | ||
70 | if (ear0 >= VMALLOC_START && ear0 < VMALLOC_END) | ||
71 | goto kernel_pte_fault; | ||
72 | if (ear0 >= PKMAP_BASE && ear0 < PKMAP_END) | ||
73 | goto kernel_pte_fault; | ||
74 | } | ||
75 | |||
76 | info.si_code = SEGV_MAPERR; | ||
77 | |||
78 | /* | ||
79 | * If we're in an interrupt or have no user | ||
80 | * context, we must not take the fault.. | ||
81 | */ | ||
82 | if (faulthandler_disabled() || !mm) | ||
83 | goto no_context; | ||
84 | |||
85 | if (user_mode(__frame)) | ||
86 | flags |= FAULT_FLAG_USER; | ||
87 | |||
88 | down_read(&mm->mmap_sem); | ||
89 | |||
90 | vma = find_vma(mm, ear0); | ||
91 | if (!vma) | ||
92 | goto bad_area; | ||
93 | if (vma->vm_start <= ear0) | ||
94 | goto good_area; | ||
95 | if (!(vma->vm_flags & VM_GROWSDOWN)) | ||
96 | goto bad_area; | ||
97 | |||
98 | if (user_mode(__frame)) { | ||
99 | /* | ||
100 | * accessing the stack below %esp is always a bug. | ||
101 | * The "+ 32" is there due to some instructions (like | ||
102 | * pusha) doing post-decrement on the stack and that | ||
103 | * doesn't show up until later.. | ||
104 | */ | ||
105 | if ((ear0 & PAGE_MASK) + 2 * PAGE_SIZE < __frame->sp) { | ||
106 | #if 0 | ||
107 | printk("[%d] ### Access below stack @%lx (sp=%lx)\n", | ||
108 | current->pid, ear0, __frame->sp); | ||
109 | show_registers(__frame); | ||
110 | printk("[%d] ### Code: [%08lx] %02x %02x %02x %02x %02x %02x %02x %02x\n", | ||
111 | current->pid, | ||
112 | __frame->pc, | ||
113 | ((u8*)__frame->pc)[0], | ||
114 | ((u8*)__frame->pc)[1], | ||
115 | ((u8*)__frame->pc)[2], | ||
116 | ((u8*)__frame->pc)[3], | ||
117 | ((u8*)__frame->pc)[4], | ||
118 | ((u8*)__frame->pc)[5], | ||
119 | ((u8*)__frame->pc)[6], | ||
120 | ((u8*)__frame->pc)[7] | ||
121 | ); | ||
122 | #endif | ||
123 | goto bad_area; | ||
124 | } | ||
125 | } | ||
126 | |||
127 | if (expand_stack(vma, ear0)) | ||
128 | goto bad_area; | ||
129 | |||
130 | /* | ||
131 | * Ok, we have a good vm_area for this memory access, so | ||
132 | * we can handle it.. | ||
133 | */ | ||
134 | good_area: | ||
135 | info.si_code = SEGV_ACCERR; | ||
136 | switch (esr0 & ESR0_ATXC) { | ||
137 | default: | ||
138 | /* handle write to write protected page */ | ||
139 | case ESR0_ATXC_WP_EXCEP: | ||
140 | #ifdef TEST_VERIFY_AREA | ||
141 | if (!(user_mode(__frame))) | ||
142 | printk("WP fault at %08lx\n", __frame->pc); | ||
143 | #endif | ||
144 | if (!(vma->vm_flags & VM_WRITE)) | ||
145 | goto bad_area; | ||
146 | flags |= FAULT_FLAG_WRITE; | ||
147 | break; | ||
148 | |||
149 | /* handle read from protected page */ | ||
150 | case ESR0_ATXC_PRIV_EXCEP: | ||
151 | goto bad_area; | ||
152 | |||
153 | /* handle read, write or exec on absent page | ||
154 | * - can't support write without permitting read | ||
155 | * - don't support execute without permitting read and vice-versa | ||
156 | */ | ||
157 | case ESR0_ATXC_AMRTLB_MISS: | ||
158 | if (!(vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC))) | ||
159 | goto bad_area; | ||
160 | break; | ||
161 | } | ||
162 | |||
163 | /* | ||
164 | * If for any reason at all we couldn't handle the fault, | ||
165 | * make sure we exit gracefully rather than endlessly redo | ||
166 | * the fault. | ||
167 | */ | ||
168 | fault = handle_mm_fault(vma, ear0, flags); | ||
169 | if (unlikely(fault & VM_FAULT_ERROR)) { | ||
170 | if (fault & VM_FAULT_OOM) | ||
171 | goto out_of_memory; | ||
172 | else if (fault & VM_FAULT_SIGSEGV) | ||
173 | goto bad_area; | ||
174 | else if (fault & VM_FAULT_SIGBUS) | ||
175 | goto do_sigbus; | ||
176 | BUG(); | ||
177 | } | ||
178 | if (fault & VM_FAULT_MAJOR) | ||
179 | current->maj_flt++; | ||
180 | else | ||
181 | current->min_flt++; | ||
182 | |||
183 | up_read(&mm->mmap_sem); | ||
184 | return; | ||
185 | |||
186 | /* | ||
187 | * Something tried to access memory that isn't in our memory map.. | ||
188 | * Fix it, but check if it's kernel or user first.. | ||
189 | */ | ||
190 | bad_area: | ||
191 | up_read(&mm->mmap_sem); | ||
192 | |||
193 | /* User mode accesses just cause a SIGSEGV */ | ||
194 | if (user_mode(__frame)) { | ||
195 | info.si_signo = SIGSEGV; | ||
196 | info.si_errno = 0; | ||
197 | /* info.si_code has been set above */ | ||
198 | info.si_addr = (void *) ear0; | ||
199 | force_sig_info(SIGSEGV, &info, current); | ||
200 | return; | ||
201 | } | ||
202 | |||
203 | no_context: | ||
204 | /* are we prepared to handle this kernel fault? */ | ||
205 | if (fixup_exception(__frame)) | ||
206 | return; | ||
207 | |||
208 | /* | ||
209 | * Oops. The kernel tried to access some bad page. We'll have to | ||
210 | * terminate things with extreme prejudice. | ||
211 | */ | ||
212 | |||
213 | bust_spinlocks(1); | ||
214 | |||
215 | if (ear0 < PAGE_SIZE) | ||
216 | printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); | ||
217 | else | ||
218 | printk(KERN_ALERT "Unable to handle kernel paging request"); | ||
219 | printk(" at virtual addr %08lx\n", ear0); | ||
220 | printk(" PC : %08lx\n", __frame->pc); | ||
221 | printk(" EXC : esr0=%08lx ear0=%08lx\n", esr0, ear0); | ||
222 | |||
223 | asm("lrai %1,%0,#1,#0,#0" : "=&r"(lrai) : "r"(ear0)); | ||
224 | asm("lrad %1,%0,#1,#0,#0" : "=&r"(lrad) : "r"(ear0)); | ||
225 | |||
226 | printk(KERN_ALERT " LRAI: %08lx\n", lrai); | ||
227 | printk(KERN_ALERT " LRAD: %08lx\n", lrad); | ||
228 | |||
229 | __break_hijack_kernel_event(); | ||
230 | |||
231 | pge = pgd_offset(current->mm, ear0); | ||
232 | pue = pud_offset(pge, ear0); | ||
233 | _pme = pue->pue[0].ste[0]; | ||
234 | |||
235 | printk(KERN_ALERT " PGE : %8p { PME %08lx }\n", pge, _pme); | ||
236 | |||
237 | if (_pme & xAMPRx_V) { | ||
238 | unsigned long dampr, damlr, val; | ||
239 | |||
240 | asm volatile("movsg dampr2,%0 ! movgs %2,dampr2 ! movsg damlr2,%1" | ||
241 | : "=&r"(dampr), "=r"(damlr) | ||
242 | : "r" (_pme | xAMPRx_L|xAMPRx_SS_16Kb|xAMPRx_S|xAMPRx_C|xAMPRx_V) | ||
243 | ); | ||
244 | |||
245 | pte = (pte_t *) damlr + __pte_index(ear0); | ||
246 | val = pte_val(*pte); | ||
247 | |||
248 | asm volatile("movgs %0,dampr2" :: "r" (dampr)); | ||
249 | |||
250 | printk(KERN_ALERT " PTE : %8p { %08lx }\n", pte, val); | ||
251 | } | ||
252 | |||
253 | die_if_kernel("Oops\n"); | ||
254 | do_exit(SIGKILL); | ||
255 | |||
256 | /* | ||
257 | * We ran out of memory, or some other thing happened to us that made | ||
258 | * us unable to handle the page fault gracefully. | ||
259 | */ | ||
260 | out_of_memory: | ||
261 | up_read(&mm->mmap_sem); | ||
262 | if (!user_mode(__frame)) | ||
263 | goto no_context; | ||
264 | pagefault_out_of_memory(); | ||
265 | return; | ||
266 | |||
267 | do_sigbus: | ||
268 | up_read(&mm->mmap_sem); | ||
269 | |||
270 | /* | ||
271 | * Send a sigbus, regardless of whether we were in kernel | ||
272 | * or user mode. | ||
273 | */ | ||
274 | info.si_signo = SIGBUS; | ||
275 | info.si_errno = 0; | ||
276 | info.si_code = BUS_ADRERR; | ||
277 | info.si_addr = (void *) ear0; | ||
278 | force_sig_info(SIGBUS, &info, current); | ||
279 | |||
280 | /* Kernel mode? Handle exceptions or die */ | ||
281 | if (!user_mode(__frame)) | ||
282 | goto no_context; | ||
283 | return; | ||
284 | |||
285 | /* | ||
286 | * The fault was caused by a kernel PTE (such as installed by vmalloc or kmap) | ||
287 | */ | ||
288 | kernel_pte_fault: | ||
289 | { | ||
290 | /* | ||
291 | * Synchronize this task's top level page-table | ||
292 | * with the 'reference' page table. | ||
293 | * | ||
294 | * Do _not_ use "tsk" here. We might be inside | ||
295 | * an interrupt in the middle of a task switch.. | ||
296 | */ | ||
297 | int index = pgd_index(ear0); | ||
298 | pgd_t *pgd, *pgd_k; | ||
299 | pud_t *pud, *pud_k; | ||
300 | pmd_t *pmd, *pmd_k; | ||
301 | pte_t *pte_k; | ||
302 | |||
303 | pgd = (pgd_t *) __get_TTBR(); | ||
304 | pgd = (pgd_t *)__va(pgd) + index; | ||
305 | pgd_k = ((pgd_t *)(init_mm.pgd)) + index; | ||
306 | |||
307 | if (!pgd_present(*pgd_k)) | ||
308 | goto no_context; | ||
309 | //set_pgd(pgd, *pgd_k); /////// gcc ICE's on this line | ||
310 | |||
311 | pud_k = pud_offset(pgd_k, ear0); | ||
312 | if (!pud_present(*pud_k)) | ||
313 | goto no_context; | ||
314 | |||
315 | pmd_k = pmd_offset(pud_k, ear0); | ||
316 | if (!pmd_present(*pmd_k)) | ||
317 | goto no_context; | ||
318 | |||
319 | pud = pud_offset(pgd, ear0); | ||
320 | pmd = pmd_offset(pud, ear0); | ||
321 | set_pmd(pmd, *pmd_k); | ||
322 | |||
323 | pte_k = pte_offset_kernel(pmd_k, ear0); | ||
324 | if (!pte_present(*pte_k)) | ||
325 | goto no_context; | ||
326 | return; | ||
327 | } | ||
328 | } /* end do_page_fault() */ | ||
diff --git a/arch/frv/mm/highmem.c b/arch/frv/mm/highmem.c deleted file mode 100644 index 45750fb65c49..000000000000 --- a/arch/frv/mm/highmem.c +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | /* highmem.c: arch-specific highmem stuff | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #include <linux/highmem.h> | ||
12 | #include <linux/module.h> | ||
13 | |||
14 | void *kmap(struct page *page) | ||
15 | { | ||
16 | might_sleep(); | ||
17 | if (!PageHighMem(page)) | ||
18 | return page_address(page); | ||
19 | return kmap_high(page); | ||
20 | } | ||
21 | |||
22 | EXPORT_SYMBOL(kmap); | ||
23 | |||
24 | void kunmap(struct page *page) | ||
25 | { | ||
26 | if (in_interrupt()) | ||
27 | BUG(); | ||
28 | if (!PageHighMem(page)) | ||
29 | return; | ||
30 | kunmap_high(page); | ||
31 | } | ||
32 | |||
33 | EXPORT_SYMBOL(kunmap); | ||
34 | |||
35 | void *kmap_atomic(struct page *page) | ||
36 | { | ||
37 | unsigned long paddr; | ||
38 | int type; | ||
39 | |||
40 | preempt_disable(); | ||
41 | pagefault_disable(); | ||
42 | type = kmap_atomic_idx_push(); | ||
43 | paddr = page_to_phys(page); | ||
44 | |||
45 | switch (type) { | ||
46 | /* | ||
47 | * The first 4 primary maps are reserved for architecture code | ||
48 | */ | ||
49 | case 0: return __kmap_atomic_primary(0, paddr, 6); | ||
50 | case 1: return __kmap_atomic_primary(0, paddr, 7); | ||
51 | case 2: return __kmap_atomic_primary(0, paddr, 8); | ||
52 | case 3: return __kmap_atomic_primary(0, paddr, 9); | ||
53 | case 4: return __kmap_atomic_primary(0, paddr, 10); | ||
54 | |||
55 | case 5 ... 5 + NR_TLB_LINES - 1: | ||
56 | return __kmap_atomic_secondary(type - 5, paddr); | ||
57 | |||
58 | default: | ||
59 | BUG(); | ||
60 | return NULL; | ||
61 | } | ||
62 | } | ||
63 | EXPORT_SYMBOL(kmap_atomic); | ||
64 | |||
65 | void __kunmap_atomic(void *kvaddr) | ||
66 | { | ||
67 | int type = kmap_atomic_idx(); | ||
68 | switch (type) { | ||
69 | case 0: __kunmap_atomic_primary(0, 6); break; | ||
70 | case 1: __kunmap_atomic_primary(0, 7); break; | ||
71 | case 2: __kunmap_atomic_primary(0, 8); break; | ||
72 | case 3: __kunmap_atomic_primary(0, 9); break; | ||
73 | case 4: __kunmap_atomic_primary(0, 10); break; | ||
74 | |||
75 | case 5 ... 5 + NR_TLB_LINES - 1: | ||
76 | __kunmap_atomic_secondary(type - 5, kvaddr); | ||
77 | break; | ||
78 | |||
79 | default: | ||
80 | BUG(); | ||
81 | } | ||
82 | kmap_atomic_idx_pop(); | ||
83 | pagefault_enable(); | ||
84 | preempt_enable(); | ||
85 | } | ||
86 | EXPORT_SYMBOL(__kunmap_atomic); | ||
diff --git a/arch/frv/mm/init.c b/arch/frv/mm/init.c deleted file mode 100644 index cf464100e838..000000000000 --- a/arch/frv/mm/init.c +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | /* init.c: memory initialisation for FRV | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * Derived from: | ||
12 | * - linux/arch/m68knommu/mm/init.c | ||
13 | * - Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>, Kenneth Albanowski <kjahds@kjahds.com>, | ||
14 | * - Copyright (C) 2000 Lineo, Inc. (www.lineo.com) | ||
15 | * - linux/arch/m68k/mm/init.c | ||
16 | * - Copyright (C) 1995 Hamish Macdonald | ||
17 | */ | ||
18 | |||
19 | #include <linux/signal.h> | ||
20 | #include <linux/sched.h> | ||
21 | #include <linux/sched/task.h> | ||
22 | #include <linux/pagemap.h> | ||
23 | #include <linux/gfp.h> | ||
24 | #include <linux/swap.h> | ||
25 | #include <linux/mm.h> | ||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/string.h> | ||
28 | #include <linux/types.h> | ||
29 | #include <linux/bootmem.h> | ||
30 | #include <linux/highmem.h> | ||
31 | #include <linux/module.h> | ||
32 | |||
33 | #include <asm/setup.h> | ||
34 | #include <asm/segment.h> | ||
35 | #include <asm/page.h> | ||
36 | #include <asm/pgtable.h> | ||
37 | #include <asm/mmu_context.h> | ||
38 | #include <asm/virtconvert.h> | ||
39 | #include <asm/sections.h> | ||
40 | #include <asm/tlb.h> | ||
41 | |||
42 | #undef DEBUG | ||
43 | |||
44 | /* | ||
45 | * ZERO_PAGE is a special page that is used for zero-initialized | ||
46 | * data and COW. | ||
47 | */ | ||
48 | unsigned long empty_zero_page; | ||
49 | EXPORT_SYMBOL(empty_zero_page); | ||
50 | |||
51 | /*****************************************************************************/ | ||
52 | /* | ||
53 | * paging_init() continues the virtual memory environment setup which | ||
54 | * was begun by the code in arch/head.S. | ||
55 | * The parameters are pointers to where to stick the starting and ending | ||
56 | * addresses of available kernel virtual memory. | ||
57 | */ | ||
58 | void __init paging_init(void) | ||
59 | { | ||
60 | unsigned long zones_size[MAX_NR_ZONES] = {0, }; | ||
61 | |||
62 | /* allocate some pages for kernel housekeeping tasks */ | ||
63 | empty_zero_page = (unsigned long) alloc_bootmem_pages(PAGE_SIZE); | ||
64 | |||
65 | memset((void *) empty_zero_page, 0, PAGE_SIZE); | ||
66 | |||
67 | #ifdef CONFIG_HIGHMEM | ||
68 | if (get_num_physpages() - num_mappedpages) { | ||
69 | pgd_t *pge; | ||
70 | pud_t *pue; | ||
71 | pmd_t *pme; | ||
72 | |||
73 | pkmap_page_table = alloc_bootmem_pages(PAGE_SIZE); | ||
74 | |||
75 | pge = swapper_pg_dir + pgd_index_k(PKMAP_BASE); | ||
76 | pue = pud_offset(pge, PKMAP_BASE); | ||
77 | pme = pmd_offset(pue, PKMAP_BASE); | ||
78 | __set_pmd(pme, virt_to_phys(pkmap_page_table) | _PAGE_TABLE); | ||
79 | } | ||
80 | #endif | ||
81 | |||
82 | /* distribute the allocatable pages across the various zones and pass them to the allocator | ||
83 | */ | ||
84 | zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn; | ||
85 | #ifdef CONFIG_HIGHMEM | ||
86 | zones_size[ZONE_HIGHMEM] = get_num_physpages() - num_mappedpages; | ||
87 | #endif | ||
88 | |||
89 | free_area_init(zones_size); | ||
90 | |||
91 | #ifdef CONFIG_MMU | ||
92 | /* initialise init's MMU context */ | ||
93 | init_new_context(&init_task, &init_mm); | ||
94 | #endif | ||
95 | |||
96 | } /* end paging_init() */ | ||
97 | |||
98 | /*****************************************************************************/ | ||
99 | /* | ||
100 | * | ||
101 | */ | ||
102 | void __init mem_init(void) | ||
103 | { | ||
104 | unsigned long code_size = _etext - _stext; | ||
105 | |||
106 | /* this will put all low memory onto the freelists */ | ||
107 | free_all_bootmem(); | ||
108 | #if defined(CONFIG_MMU) && defined(CONFIG_HIGHMEM) | ||
109 | { | ||
110 | unsigned long pfn; | ||
111 | |||
112 | for (pfn = get_num_physpages() - 1; | ||
113 | pfn >= num_mappedpages; pfn--) | ||
114 | free_highmem_page(&mem_map[pfn]); | ||
115 | } | ||
116 | #endif | ||
117 | |||
118 | mem_init_print_info(NULL); | ||
119 | if (rom_length > 0 && rom_length >= code_size) | ||
120 | printk("Memory available: %luKiB/%luKiB ROM\n", | ||
121 | (rom_length - code_size) >> 10, rom_length >> 10); | ||
122 | } /* end mem_init() */ | ||
123 | |||
124 | /*****************************************************************************/ | ||
125 | /* | ||
126 | * free the memory that was only required for initialisation | ||
127 | */ | ||
128 | void free_initmem(void) | ||
129 | { | ||
130 | #if defined(CONFIG_RAMKERNEL) && !defined(CONFIG_PROTECT_KERNEL) | ||
131 | free_initmem_default(-1); | ||
132 | #endif | ||
133 | } /* end free_initmem() */ | ||
134 | |||
135 | /*****************************************************************************/ | ||
136 | /* | ||
137 | * free the initial ramdisk memory | ||
138 | */ | ||
139 | #ifdef CONFIG_BLK_DEV_INITRD | ||
140 | void __init free_initrd_mem(unsigned long start, unsigned long end) | ||
141 | { | ||
142 | free_reserved_area((void *)start, (void *)end, -1, "initrd"); | ||
143 | } /* end free_initrd_mem() */ | ||
144 | #endif | ||
diff --git a/arch/frv/mm/kmap.c b/arch/frv/mm/kmap.c deleted file mode 100644 index e9217e605aa8..000000000000 --- a/arch/frv/mm/kmap.c +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* kmap.c: ioremapping handlers | ||
2 | * | ||
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * - Derived from arch/m68k/mm/kmap.c | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/mm.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/vmalloc.h> | ||
18 | |||
19 | #include <asm/setup.h> | ||
20 | #include <asm/segment.h> | ||
21 | #include <asm/page.h> | ||
22 | #include <asm/pgalloc.h> | ||
23 | #include <asm/io.h> | ||
24 | |||
25 | #undef DEBUG | ||
26 | |||
27 | /*****************************************************************************/ | ||
28 | /* | ||
29 | * Map some physical address range into the kernel address space. | ||
30 | */ | ||
31 | |||
32 | void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag) | ||
33 | { | ||
34 | return (void __iomem *)physaddr; | ||
35 | } | ||
36 | |||
37 | /* | ||
38 | * Unmap a ioremap()ed region again | ||
39 | */ | ||
40 | void iounmap(void volatile __iomem *addr) | ||
41 | { | ||
42 | } | ||
43 | |||
44 | /* | ||
45 | * Set new cache mode for some kernel address space. | ||
46 | * The caller must push data for that range itself, if such data may already | ||
47 | * be in the cache. | ||
48 | */ | ||
49 | void kernel_set_cachemode(void *addr, unsigned long size, int cmode) | ||
50 | { | ||
51 | } | ||
diff --git a/arch/frv/mm/mmu-context.c b/arch/frv/mm/mmu-context.c deleted file mode 100644 index 16946a58f64d..000000000000 --- a/arch/frv/mm/mmu-context.c +++ /dev/null | |||
@@ -1,210 +0,0 @@ | |||
1 | /* mmu-context.c: MMU context allocation and management | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/sched.h> | ||
13 | #include <linux/sched/mm.h> | ||
14 | #include <linux/sched/task.h> | ||
15 | #include <linux/mm.h> | ||
16 | #include <asm/tlbflush.h> | ||
17 | |||
18 | #define NR_CXN 4096 | ||
19 | |||
20 | static unsigned long cxn_bitmap[NR_CXN / (sizeof(unsigned long) * 8)]; | ||
21 | static LIST_HEAD(cxn_owners_lru); | ||
22 | static DEFINE_SPINLOCK(cxn_owners_lock); | ||
23 | |||
24 | int __nongpreldata cxn_pinned = -1; | ||
25 | |||
26 | |||
27 | /*****************************************************************************/ | ||
28 | /* | ||
29 | * initialise a new context | ||
30 | */ | ||
31 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm) | ||
32 | { | ||
33 | memset(&mm->context, 0, sizeof(mm->context)); | ||
34 | INIT_LIST_HEAD(&mm->context.id_link); | ||
35 | mm->context.itlb_cached_pge = 0xffffffffUL; | ||
36 | mm->context.dtlb_cached_pge = 0xffffffffUL; | ||
37 | |||
38 | return 0; | ||
39 | } /* end init_new_context() */ | ||
40 | |||
41 | /*****************************************************************************/ | ||
42 | /* | ||
43 | * make sure a kernel MMU context has a CPU context number | ||
44 | * - call with cxn_owners_lock held | ||
45 | */ | ||
46 | static unsigned get_cxn(mm_context_t *ctx) | ||
47 | { | ||
48 | struct list_head *_p; | ||
49 | mm_context_t *p; | ||
50 | unsigned cxn; | ||
51 | |||
52 | if (!list_empty(&ctx->id_link)) { | ||
53 | list_move_tail(&ctx->id_link, &cxn_owners_lru); | ||
54 | } | ||
55 | else { | ||
56 | /* find the first unallocated context number | ||
57 | * - 0 is reserved for the kernel | ||
58 | */ | ||
59 | cxn = find_next_zero_bit(cxn_bitmap, NR_CXN, 1); | ||
60 | if (cxn < NR_CXN) { | ||
61 | set_bit(cxn, cxn_bitmap); | ||
62 | } | ||
63 | else { | ||
64 | /* none remaining - need to steal someone else's cxn */ | ||
65 | p = NULL; | ||
66 | list_for_each(_p, &cxn_owners_lru) { | ||
67 | p = list_entry(_p, mm_context_t, id_link); | ||
68 | if (!p->id_busy && p->id != cxn_pinned) | ||
69 | break; | ||
70 | } | ||
71 | |||
72 | BUG_ON(_p == &cxn_owners_lru); | ||
73 | |||
74 | cxn = p->id; | ||
75 | p->id = 0; | ||
76 | list_del_init(&p->id_link); | ||
77 | __flush_tlb_mm(cxn); | ||
78 | } | ||
79 | |||
80 | ctx->id = cxn; | ||
81 | list_add_tail(&ctx->id_link, &cxn_owners_lru); | ||
82 | } | ||
83 | |||
84 | return ctx->id; | ||
85 | } /* end get_cxn() */ | ||
86 | |||
87 | /*****************************************************************************/ | ||
88 | /* | ||
89 | * restore the current TLB miss handler mapped page tables into the MMU context and set up a | ||
90 | * mapping for the page directory | ||
91 | */ | ||
92 | void change_mm_context(mm_context_t *old, mm_context_t *ctx, pgd_t *pgd) | ||
93 | { | ||
94 | unsigned long _pgd; | ||
95 | |||
96 | _pgd = virt_to_phys(pgd); | ||
97 | |||
98 | /* save the state of the outgoing MMU context */ | ||
99 | old->id_busy = 0; | ||
100 | |||
101 | asm volatile("movsg scr0,%0" : "=r"(old->itlb_cached_pge)); | ||
102 | asm volatile("movsg dampr4,%0" : "=r"(old->itlb_ptd_mapping)); | ||
103 | asm volatile("movsg scr1,%0" : "=r"(old->dtlb_cached_pge)); | ||
104 | asm volatile("movsg dampr5,%0" : "=r"(old->dtlb_ptd_mapping)); | ||
105 | |||
106 | /* select an MMU context number */ | ||
107 | spin_lock(&cxn_owners_lock); | ||
108 | get_cxn(ctx); | ||
109 | ctx->id_busy = 1; | ||
110 | spin_unlock(&cxn_owners_lock); | ||
111 | |||
112 | asm volatile("movgs %0,cxnr" : : "r"(ctx->id)); | ||
113 | |||
114 | /* restore the state of the incoming MMU context */ | ||
115 | asm volatile("movgs %0,scr0" : : "r"(ctx->itlb_cached_pge)); | ||
116 | asm volatile("movgs %0,dampr4" : : "r"(ctx->itlb_ptd_mapping)); | ||
117 | asm volatile("movgs %0,scr1" : : "r"(ctx->dtlb_cached_pge)); | ||
118 | asm volatile("movgs %0,dampr5" : : "r"(ctx->dtlb_ptd_mapping)); | ||
119 | |||
120 | /* map the PGD into uncached virtual memory */ | ||
121 | asm volatile("movgs %0,ttbr" : : "r"(_pgd)); | ||
122 | asm volatile("movgs %0,dampr3" | ||
123 | :: "r"(_pgd | xAMPRx_L | xAMPRx_M | xAMPRx_SS_16Kb | | ||
124 | xAMPRx_S | xAMPRx_C | xAMPRx_V)); | ||
125 | |||
126 | } /* end change_mm_context() */ | ||
127 | |||
128 | /*****************************************************************************/ | ||
129 | /* | ||
130 | * finished with an MMU context number | ||
131 | */ | ||
132 | void destroy_context(struct mm_struct *mm) | ||
133 | { | ||
134 | mm_context_t *ctx = &mm->context; | ||
135 | |||
136 | spin_lock(&cxn_owners_lock); | ||
137 | |||
138 | if (!list_empty(&ctx->id_link)) { | ||
139 | if (ctx->id == cxn_pinned) | ||
140 | cxn_pinned = -1; | ||
141 | |||
142 | list_del_init(&ctx->id_link); | ||
143 | clear_bit(ctx->id, cxn_bitmap); | ||
144 | __flush_tlb_mm(ctx->id); | ||
145 | ctx->id = 0; | ||
146 | } | ||
147 | |||
148 | spin_unlock(&cxn_owners_lock); | ||
149 | } /* end destroy_context() */ | ||
150 | |||
151 | /*****************************************************************************/ | ||
152 | /* | ||
153 | * display the MMU context currently a process is currently using | ||
154 | */ | ||
155 | #ifdef CONFIG_PROC_FS | ||
156 | char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer) | ||
157 | { | ||
158 | spin_lock(&cxn_owners_lock); | ||
159 | buffer += sprintf(buffer, "CXNR: %u\n", mm->context.id); | ||
160 | spin_unlock(&cxn_owners_lock); | ||
161 | |||
162 | return buffer; | ||
163 | } /* end proc_pid_status_frv_cxnr() */ | ||
164 | #endif | ||
165 | |||
166 | /*****************************************************************************/ | ||
167 | /* | ||
168 | * (un)pin a process's mm_struct's MMU context ID | ||
169 | */ | ||
170 | int cxn_pin_by_pid(pid_t pid) | ||
171 | { | ||
172 | struct task_struct *tsk; | ||
173 | struct mm_struct *mm = NULL; | ||
174 | int ret; | ||
175 | |||
176 | /* unpin if pid is zero */ | ||
177 | if (pid == 0) { | ||
178 | cxn_pinned = -1; | ||
179 | return 0; | ||
180 | } | ||
181 | |||
182 | ret = -ESRCH; | ||
183 | |||
184 | /* get a handle on the mm_struct */ | ||
185 | read_lock(&tasklist_lock); | ||
186 | tsk = find_task_by_vpid(pid); | ||
187 | if (tsk) { | ||
188 | ret = -EINVAL; | ||
189 | |||
190 | task_lock(tsk); | ||
191 | if (tsk->mm) { | ||
192 | mm = tsk->mm; | ||
193 | mmget(mm); | ||
194 | ret = 0; | ||
195 | } | ||
196 | task_unlock(tsk); | ||
197 | } | ||
198 | read_unlock(&tasklist_lock); | ||
199 | |||
200 | if (ret < 0) | ||
201 | return ret; | ||
202 | |||
203 | /* make sure it has a CXN and pin it */ | ||
204 | spin_lock(&cxn_owners_lock); | ||
205 | cxn_pinned = get_cxn(&mm->context); | ||
206 | spin_unlock(&cxn_owners_lock); | ||
207 | |||
208 | mmput(mm); | ||
209 | return 0; | ||
210 | } /* end cxn_pin_by_pid() */ | ||
diff --git a/arch/frv/mm/pgalloc.c b/arch/frv/mm/pgalloc.c deleted file mode 100644 index c9ed14f6c67d..000000000000 --- a/arch/frv/mm/pgalloc.c +++ /dev/null | |||
@@ -1,157 +0,0 @@ | |||
1 | /* pgalloc.c: page directory & page table allocation | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/sched.h> | ||
13 | #include <linux/gfp.h> | ||
14 | #include <linux/mm.h> | ||
15 | #include <linux/highmem.h> | ||
16 | #include <linux/quicklist.h> | ||
17 | #include <asm/pgalloc.h> | ||
18 | #include <asm/page.h> | ||
19 | #include <asm/cacheflush.h> | ||
20 | |||
21 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__((aligned(PAGE_SIZE))); | ||
22 | |||
23 | pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) | ||
24 | { | ||
25 | pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL); | ||
26 | if (pte) | ||
27 | clear_page(pte); | ||
28 | return pte; | ||
29 | } | ||
30 | |||
31 | pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) | ||
32 | { | ||
33 | struct page *page; | ||
34 | |||
35 | #ifdef CONFIG_HIGHPTE | ||
36 | page = alloc_pages(GFP_KERNEL|__GFP_HIGHMEM, 0); | ||
37 | #else | ||
38 | page = alloc_pages(GFP_KERNEL, 0); | ||
39 | #endif | ||
40 | if (!page) | ||
41 | return NULL; | ||
42 | |||
43 | clear_highpage(page); | ||
44 | if (!pgtable_page_ctor(page)) { | ||
45 | __free_page(page); | ||
46 | return NULL; | ||
47 | } | ||
48 | flush_dcache_page(page); | ||
49 | return page; | ||
50 | } | ||
51 | |||
52 | void __set_pmd(pmd_t *pmdptr, unsigned long pmd) | ||
53 | { | ||
54 | unsigned long *__ste_p = pmdptr->ste; | ||
55 | int loop; | ||
56 | |||
57 | if (!pmd) { | ||
58 | memset(__ste_p, 0, PME_SIZE); | ||
59 | } | ||
60 | else { | ||
61 | BUG_ON(pmd & (0x3f00 | xAMPRx_SS | 0xe)); | ||
62 | |||
63 | for (loop = PME_SIZE; loop > 0; loop -= 4) { | ||
64 | *__ste_p++ = pmd; | ||
65 | pmd += __frv_PT_SIZE; | ||
66 | } | ||
67 | } | ||
68 | |||
69 | frv_dcache_writeback((unsigned long) pmdptr, (unsigned long) (pmdptr + 1)); | ||
70 | } | ||
71 | |||
72 | /* | ||
73 | * List of all pgd's needed for non-PAE so it can invalidate entries | ||
74 | * in both cached and uncached pgd's; not needed for PAE since the | ||
75 | * kernel pmd is shared. If PAE were not to share the pmd a similar | ||
76 | * tactic would be needed. This is essentially codepath-based locking | ||
77 | * against pageattr.c; it is the unique case in which a valid change | ||
78 | * of kernel pagetables can't be lazily synchronized by vmalloc faults. | ||
79 | * vmalloc faults work because attached pagetables are never freed. | ||
80 | * If the locking proves to be non-performant, a ticketing scheme with | ||
81 | * checks at dup_mmap(), exec(), and other mmlist addition points | ||
82 | * could be used. The locking scheme was chosen on the basis of | ||
83 | * manfred's recommendations and having no core impact whatsoever. | ||
84 | * -- nyc | ||
85 | */ | ||
86 | DEFINE_SPINLOCK(pgd_lock); | ||
87 | struct page *pgd_list; | ||
88 | |||
89 | static inline void pgd_list_add(pgd_t *pgd) | ||
90 | { | ||
91 | struct page *page = virt_to_page(pgd); | ||
92 | page->index = (unsigned long) pgd_list; | ||
93 | if (pgd_list) | ||
94 | set_page_private(pgd_list, (unsigned long) &page->index); | ||
95 | pgd_list = page; | ||
96 | set_page_private(page, (unsigned long)&pgd_list); | ||
97 | } | ||
98 | |||
99 | static inline void pgd_list_del(pgd_t *pgd) | ||
100 | { | ||
101 | struct page *next, **pprev, *page = virt_to_page(pgd); | ||
102 | next = (struct page *) page->index; | ||
103 | pprev = (struct page **) page_private(page); | ||
104 | *pprev = next; | ||
105 | if (next) | ||
106 | set_page_private(next, (unsigned long) pprev); | ||
107 | } | ||
108 | |||
109 | void pgd_ctor(void *pgd) | ||
110 | { | ||
111 | unsigned long flags; | ||
112 | |||
113 | if (PTRS_PER_PMD == 1) | ||
114 | spin_lock_irqsave(&pgd_lock, flags); | ||
115 | |||
116 | memcpy((pgd_t *) pgd + USER_PGDS_IN_LAST_PML4, | ||
117 | swapper_pg_dir + USER_PGDS_IN_LAST_PML4, | ||
118 | (PTRS_PER_PGD - USER_PGDS_IN_LAST_PML4) * sizeof(pgd_t)); | ||
119 | |||
120 | if (PTRS_PER_PMD > 1) | ||
121 | return; | ||
122 | |||
123 | pgd_list_add(pgd); | ||
124 | spin_unlock_irqrestore(&pgd_lock, flags); | ||
125 | memset(pgd, 0, USER_PGDS_IN_LAST_PML4 * sizeof(pgd_t)); | ||
126 | } | ||
127 | |||
128 | /* never called when PTRS_PER_PMD > 1 */ | ||
129 | void pgd_dtor(void *pgd) | ||
130 | { | ||
131 | unsigned long flags; /* can be called from interrupt context */ | ||
132 | |||
133 | spin_lock_irqsave(&pgd_lock, flags); | ||
134 | pgd_list_del(pgd); | ||
135 | spin_unlock_irqrestore(&pgd_lock, flags); | ||
136 | } | ||
137 | |||
138 | pgd_t *pgd_alloc(struct mm_struct *mm) | ||
139 | { | ||
140 | return quicklist_alloc(0, GFP_KERNEL, pgd_ctor); | ||
141 | } | ||
142 | |||
143 | void pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
144 | { | ||
145 | /* in the non-PAE case, clear_page_tables() clears user pgd entries */ | ||
146 | quicklist_free(0, pgd_dtor, pgd); | ||
147 | } | ||
148 | |||
149 | void __init pgtable_cache_init(void) | ||
150 | { | ||
151 | } | ||
152 | |||
153 | void check_pgt_cache(void) | ||
154 | { | ||
155 | quicklist_trim(0, pgd_dtor, 25, 16); | ||
156 | } | ||
157 | |||
diff --git a/arch/frv/mm/tlb-flush.S b/arch/frv/mm/tlb-flush.S deleted file mode 100644 index 79b3c70910ac..000000000000 --- a/arch/frv/mm/tlb-flush.S +++ /dev/null | |||
@@ -1,184 +0,0 @@ | |||
1 | /* tlb-flush.S: TLB flushing routines | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/sys.h> | ||
13 | #include <linux/linkage.h> | ||
14 | #include <asm/page.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/spr-regs.h> | ||
17 | |||
18 | .macro DEBUG ch | ||
19 | # sethi.p %hi(0xfeff9c00),gr4 | ||
20 | # setlo %lo(0xfeff9c00),gr4 | ||
21 | # setlos #\ch,gr5 | ||
22 | # stbi gr5,@(gr4,#0) | ||
23 | # membar | ||
24 | .endm | ||
25 | |||
26 | .section .rodata | ||
27 | |||
28 | # sizes corresponding to TPXR.LMAX | ||
29 | .balign 1 | ||
30 | __tlb_lmax_sizes: | ||
31 | .byte 0, 64, 0, 0 | ||
32 | .byte 0, 0, 0, 0 | ||
33 | .byte 0, 0, 0, 0 | ||
34 | .byte 0, 0, 0, 0 | ||
35 | |||
36 | .section .text | ||
37 | .balign 4 | ||
38 | |||
39 | ############################################################################### | ||
40 | # | ||
41 | # flush everything | ||
42 | # - void __flush_tlb_all(void) | ||
43 | # | ||
44 | ############################################################################### | ||
45 | .globl __flush_tlb_all | ||
46 | .type __flush_tlb_all,@function | ||
47 | __flush_tlb_all: | ||
48 | DEBUG 'A' | ||
49 | |||
50 | # kill cached PGE value | ||
51 | setlos #0xffffffff,gr4 | ||
52 | movgs gr4,scr0 | ||
53 | movgs gr4,scr1 | ||
54 | |||
55 | # kill AMPR-cached TLB values | ||
56 | movgs gr0,iamlr1 | ||
57 | movgs gr0,iampr1 | ||
58 | movgs gr0,damlr1 | ||
59 | movgs gr0,dampr1 | ||
60 | |||
61 | # find out how many lines there are | ||
62 | movsg tpxr,gr5 | ||
63 | sethi.p %hi(__tlb_lmax_sizes),gr4 | ||
64 | srli gr5,#TPXR_LMAX_SHIFT,gr5 | ||
65 | setlo.p %lo(__tlb_lmax_sizes),gr4 | ||
66 | andi gr5,#TPXR_LMAX_SMASK,gr5 | ||
67 | ldub @(gr4,gr5),gr4 | ||
68 | |||
69 | # now, we assume that the TLB line step is page size in size | ||
70 | setlos.p #PAGE_SIZE,gr5 | ||
71 | setlos #0,gr6 | ||
72 | 1: | ||
73 | tlbpr gr6,gr0,#6,#0 | ||
74 | subicc.p gr4,#1,gr4,icc0 | ||
75 | add gr6,gr5,gr6 | ||
76 | bne icc0,#2,1b | ||
77 | |||
78 | DEBUG 'B' | ||
79 | bralr | ||
80 | |||
81 | .size __flush_tlb_all, .-__flush_tlb_all | ||
82 | |||
83 | ############################################################################### | ||
84 | # | ||
85 | # flush everything to do with one context | ||
86 | # - void __flush_tlb_mm(unsigned long contextid [GR8]) | ||
87 | # | ||
88 | ############################################################################### | ||
89 | .globl __flush_tlb_mm | ||
90 | .type __flush_tlb_mm,@function | ||
91 | __flush_tlb_mm: | ||
92 | DEBUG 'M' | ||
93 | |||
94 | # kill cached PGE value | ||
95 | setlos #0xffffffff,gr4 | ||
96 | movgs gr4,scr0 | ||
97 | movgs gr4,scr1 | ||
98 | |||
99 | # specify the context we want to flush | ||
100 | movgs gr8,tplr | ||
101 | |||
102 | # find out how many lines there are | ||
103 | movsg tpxr,gr5 | ||
104 | sethi.p %hi(__tlb_lmax_sizes),gr4 | ||
105 | srli gr5,#TPXR_LMAX_SHIFT,gr5 | ||
106 | setlo.p %lo(__tlb_lmax_sizes),gr4 | ||
107 | andi gr5,#TPXR_LMAX_SMASK,gr5 | ||
108 | ldub @(gr4,gr5),gr4 | ||
109 | |||
110 | # now, we assume that the TLB line step is page size in size | ||
111 | setlos.p #PAGE_SIZE,gr5 | ||
112 | setlos #0,gr6 | ||
113 | 0: | ||
114 | tlbpr gr6,gr0,#5,#0 | ||
115 | subicc.p gr4,#1,gr4,icc0 | ||
116 | add gr6,gr5,gr6 | ||
117 | bne icc0,#2,0b | ||
118 | |||
119 | DEBUG 'N' | ||
120 | bralr | ||
121 | |||
122 | .size __flush_tlb_mm, .-__flush_tlb_mm | ||
123 | |||
124 | ############################################################################### | ||
125 | # | ||
126 | # flush a range of addresses from the TLB | ||
127 | # - void __flush_tlb_page(unsigned long contextid [GR8], | ||
128 | # unsigned long start [GR9]) | ||
129 | # | ||
130 | ############################################################################### | ||
131 | .globl __flush_tlb_page | ||
132 | .type __flush_tlb_page,@function | ||
133 | __flush_tlb_page: | ||
134 | # kill cached PGE value | ||
135 | setlos #0xffffffff,gr4 | ||
136 | movgs gr4,scr0 | ||
137 | movgs gr4,scr1 | ||
138 | |||
139 | # specify the context we want to flush | ||
140 | movgs gr8,tplr | ||
141 | |||
142 | # zap the matching TLB line and AMR values | ||
143 | setlos #~(PAGE_SIZE-1),gr5 | ||
144 | and gr9,gr5,gr9 | ||
145 | tlbpr gr9,gr0,#5,#0 | ||
146 | |||
147 | bralr | ||
148 | |||
149 | .size __flush_tlb_page, .-__flush_tlb_page | ||
150 | |||
151 | ############################################################################### | ||
152 | # | ||
153 | # flush a range of addresses from the TLB | ||
154 | # - void __flush_tlb_range(unsigned long contextid [GR8], | ||
155 | # unsigned long start [GR9], | ||
156 | # unsigned long end [GR10]) | ||
157 | # | ||
158 | ############################################################################### | ||
159 | .globl __flush_tlb_range | ||
160 | .type __flush_tlb_range,@function | ||
161 | __flush_tlb_range: | ||
162 | # kill cached PGE value | ||
163 | setlos #0xffffffff,gr4 | ||
164 | movgs gr4,scr0 | ||
165 | movgs gr4,scr1 | ||
166 | |||
167 | # specify the context we want to flush | ||
168 | movgs gr8,tplr | ||
169 | |||
170 | # round the start down to beginning of TLB line and end up to beginning of next TLB line | ||
171 | setlos.p #~(PAGE_SIZE-1),gr5 | ||
172 | setlos #PAGE_SIZE,gr6 | ||
173 | subi.p gr10,#1,gr10 | ||
174 | and gr9,gr5,gr9 | ||
175 | and gr10,gr5,gr10 | ||
176 | 2: | ||
177 | tlbpr gr9,gr0,#5,#0 | ||
178 | subcc.p gr9,gr10,gr0,icc0 | ||
179 | add gr9,gr6,gr9 | ||
180 | bne icc0,#0,2b ; most likely a 1-page flush | ||
181 | |||
182 | bralr | ||
183 | |||
184 | .size __flush_tlb_range, .-__flush_tlb_range | ||
diff --git a/arch/frv/mm/tlb-miss.S b/arch/frv/mm/tlb-miss.S deleted file mode 100644 index f3ac019bb18b..000000000000 --- a/arch/frv/mm/tlb-miss.S +++ /dev/null | |||
@@ -1,629 +0,0 @@ | |||
1 | /* tlb-miss.S: TLB miss handlers | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/sys.h> | ||
13 | #include <linux/linkage.h> | ||
14 | #include <asm/page.h> | ||
15 | #include <asm/pgtable.h> | ||
16 | #include <asm/spr-regs.h> | ||
17 | |||
18 | .section .text..tlbmiss | ||
19 | .balign 4 | ||
20 | |||
21 | .globl __entry_insn_mmu_miss | ||
22 | __entry_insn_mmu_miss: | ||
23 | break | ||
24 | nop | ||
25 | |||
26 | .globl __entry_insn_mmu_exception | ||
27 | __entry_insn_mmu_exception: | ||
28 | break | ||
29 | nop | ||
30 | |||
31 | .globl __entry_data_mmu_miss | ||
32 | __entry_data_mmu_miss: | ||
33 | break | ||
34 | nop | ||
35 | |||
36 | .globl __entry_data_mmu_exception | ||
37 | __entry_data_mmu_exception: | ||
38 | break | ||
39 | nop | ||
40 | |||
41 | ############################################################################### | ||
42 | # | ||
43 | # handle a lookup failure of one sort or another in a kernel TLB handler | ||
44 | # On entry: | ||
45 | # GR29 - faulting address | ||
46 | # SCR2 - saved CCR | ||
47 | # | ||
48 | ############################################################################### | ||
49 | .type __tlb_kernel_fault,@function | ||
50 | __tlb_kernel_fault: | ||
51 | # see if we're supposed to re-enable single-step mode upon return | ||
52 | sethi.p %hi(__break_tlb_miss_return_break),gr30 | ||
53 | setlo %lo(__break_tlb_miss_return_break),gr30 | ||
54 | movsg pcsr,gr31 | ||
55 | |||
56 | subcc gr31,gr30,gr0,icc0 | ||
57 | beq icc0,#0,__tlb_kernel_fault_sstep | ||
58 | |||
59 | movsg scr2,gr30 | ||
60 | movgs gr30,ccr | ||
61 | movgs gr29,scr2 /* save EAR0 value */ | ||
62 | sethi.p %hi(__kernel_current_task),gr29 | ||
63 | setlo %lo(__kernel_current_task),gr29 | ||
64 | ldi.p @(gr29,#0),gr29 /* restore GR29 */ | ||
65 | |||
66 | bra __entry_kernel_handle_mmu_fault | ||
67 | |||
68 | # we've got to re-enable single-stepping | ||
69 | __tlb_kernel_fault_sstep: | ||
70 | sethi.p %hi(__break_tlb_miss_real_return_info),gr30 | ||
71 | setlo %lo(__break_tlb_miss_real_return_info),gr30 | ||
72 | lddi @(gr30,0),gr30 | ||
73 | movgs gr30,pcsr | ||
74 | movgs gr31,psr | ||
75 | |||
76 | movsg scr2,gr30 | ||
77 | movgs gr30,ccr | ||
78 | movgs gr29,scr2 /* save EAR0 value */ | ||
79 | sethi.p %hi(__kernel_current_task),gr29 | ||
80 | setlo %lo(__kernel_current_task),gr29 | ||
81 | ldi.p @(gr29,#0),gr29 /* restore GR29 */ | ||
82 | bra __entry_kernel_handle_mmu_fault_sstep | ||
83 | |||
84 | .size __tlb_kernel_fault, .-__tlb_kernel_fault | ||
85 | |||
86 | ############################################################################### | ||
87 | # | ||
88 | # handle a lookup failure of one sort or another in a user TLB handler | ||
89 | # On entry: | ||
90 | # GR28 - faulting address | ||
91 | # SCR2 - saved CCR | ||
92 | # | ||
93 | ############################################################################### | ||
94 | .type __tlb_user_fault,@function | ||
95 | __tlb_user_fault: | ||
96 | # see if we're supposed to re-enable single-step mode upon return | ||
97 | sethi.p %hi(__break_tlb_miss_return_break),gr30 | ||
98 | setlo %lo(__break_tlb_miss_return_break),gr30 | ||
99 | movsg pcsr,gr31 | ||
100 | subcc gr31,gr30,gr0,icc0 | ||
101 | beq icc0,#0,__tlb_user_fault_sstep | ||
102 | |||
103 | movsg scr2,gr30 | ||
104 | movgs gr30,ccr | ||
105 | bra __entry_uspace_handle_mmu_fault | ||
106 | |||
107 | # we've got to re-enable single-stepping | ||
108 | __tlb_user_fault_sstep: | ||
109 | sethi.p %hi(__break_tlb_miss_real_return_info),gr30 | ||
110 | setlo %lo(__break_tlb_miss_real_return_info),gr30 | ||
111 | lddi @(gr30,0),gr30 | ||
112 | movgs gr30,pcsr | ||
113 | movgs gr31,psr | ||
114 | movsg scr2,gr30 | ||
115 | movgs gr30,ccr | ||
116 | bra __entry_uspace_handle_mmu_fault_sstep | ||
117 | |||
118 | .size __tlb_user_fault, .-__tlb_user_fault | ||
119 | |||
120 | ############################################################################### | ||
121 | # | ||
122 | # Kernel instruction TLB miss handler | ||
123 | # On entry: | ||
124 | # GR1 - kernel stack pointer | ||
125 | # GR28 - saved exception frame pointer | ||
126 | # GR29 - faulting address | ||
127 | # GR31 - EAR0 ^ SCR0 | ||
128 | # SCR0 - base of virtual range covered by cached PGE from last ITLB miss (or 0xffffffff) | ||
129 | # DAMR3 - mapped page directory | ||
130 | # DAMR4 - mapped page table as matched by SCR0 | ||
131 | # | ||
132 | ############################################################################### | ||
133 | .globl __entry_kernel_insn_tlb_miss | ||
134 | .type __entry_kernel_insn_tlb_miss,@function | ||
135 | __entry_kernel_insn_tlb_miss: | ||
136 | #if 0 | ||
137 | sethi.p %hi(0xe1200004),gr30 | ||
138 | setlo %lo(0xe1200004),gr30 | ||
139 | st gr0,@(gr30,gr0) | ||
140 | sethi.p %hi(0xffc00100),gr30 | ||
141 | setlo %lo(0xffc00100),gr30 | ||
142 | sth gr30,@(gr30,gr0) | ||
143 | membar | ||
144 | #endif | ||
145 | |||
146 | movsg ccr,gr30 /* save CCR */ | ||
147 | movgs gr30,scr2 | ||
148 | |||
149 | # see if the cached page table mapping is appropriate | ||
150 | srlicc.p gr31,#26,gr0,icc0 | ||
151 | setlos 0x3ffc,gr30 | ||
152 | srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
153 | bne icc0,#0,__itlb_k_PTD_miss | ||
154 | |||
155 | __itlb_k_PTD_mapped: | ||
156 | # access the PTD with EAR0[25:14] | ||
157 | # - DAMLR4 points to the virtual address of the appropriate page table | ||
158 | # - the PTD holds 4096 PTEs | ||
159 | # - the PTD must be accessed uncached | ||
160 | # - the PTE must be marked accessed if it was valid | ||
161 | # | ||
162 | and gr31,gr30,gr31 | ||
163 | movsg damlr4,gr30 | ||
164 | add gr30,gr31,gr31 | ||
165 | ldi @(gr31,#0),gr30 /* fetch the PTE */ | ||
166 | andicc gr30,#_PAGE_PRESENT,gr0,icc0 | ||
167 | ori.p gr30,#_PAGE_ACCESSED,gr30 | ||
168 | beq icc0,#0,__tlb_kernel_fault /* jump if PTE invalid */ | ||
169 | sti.p gr30,@(gr31,#0) /* update the PTE */ | ||
170 | andi gr30,#~_PAGE_ACCESSED,gr30 | ||
171 | |||
172 | # we're using IAMR1 as an extra TLB entry | ||
173 | # - punt the entry here (if valid) to the real TLB and then replace with the new PTE | ||
174 | # - need to check DAMR1 lest we cause an multiple-DAT-hit exception | ||
175 | # - IAMPR1 has no WP bit, and we mustn't lose WP information | ||
176 | movsg iampr1,gr31 | ||
177 | andicc gr31,#xAMPRx_V,gr0,icc0 | ||
178 | setlos.p 0xfffff000,gr31 | ||
179 | beq icc0,#0,__itlb_k_nopunt /* punt not required */ | ||
180 | |||
181 | movsg iamlr1,gr31 | ||
182 | movgs gr31,tplr /* set TPLR.CXN */ | ||
183 | tlbpr gr31,gr0,#4,#0 /* delete matches from TLB, IAMR1, DAMR1 */ | ||
184 | |||
185 | movsg dampr1,gr31 | ||
186 | ori gr31,#xAMPRx_V,gr31 /* entry was invalidated by tlbpr #4 */ | ||
187 | movgs gr31,tppr | ||
188 | movsg iamlr1,gr31 /* set TPLR.CXN */ | ||
189 | movgs gr31,tplr | ||
190 | tlbpr gr31,gr0,#2,#0 /* save to the TLB */ | ||
191 | movsg tpxr,gr31 /* check the TLB write error flag */ | ||
192 | andicc.p gr31,#TPXR_E,gr0,icc0 | ||
193 | setlos #0xfffff000,gr31 | ||
194 | bne icc0,#0,__tlb_kernel_fault | ||
195 | |||
196 | __itlb_k_nopunt: | ||
197 | |||
198 | # assemble the new TLB entry | ||
199 | and gr29,gr31,gr29 | ||
200 | movsg cxnr,gr31 | ||
201 | or gr29,gr31,gr29 | ||
202 | movgs gr29,iamlr1 /* xAMLR = address | context number */ | ||
203 | movgs gr30,iampr1 | ||
204 | movgs gr29,damlr1 | ||
205 | movgs gr30,dampr1 | ||
206 | |||
207 | # return, restoring registers | ||
208 | movsg scr2,gr30 | ||
209 | movgs gr30,ccr | ||
210 | sethi.p %hi(__kernel_current_task),gr29 | ||
211 | setlo %lo(__kernel_current_task),gr29 | ||
212 | ldi @(gr29,#0),gr29 | ||
213 | rett #0 | ||
214 | beq icc0,#3,0 /* prevent icache prefetch */ | ||
215 | |||
216 | # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more | ||
217 | # appropriate page table and map that instead | ||
218 | # - access the PGD with EAR0[31:26] | ||
219 | # - DAMLR3 points to the virtual address of the page directory | ||
220 | # - the PGD holds 64 PGEs and each PGE/PME points to a set of page tables | ||
221 | __itlb_k_PTD_miss: | ||
222 | srli gr29,#26,gr31 /* calculate PGE offset */ | ||
223 | slli gr31,#8,gr31 /* and clear bottom bits */ | ||
224 | |||
225 | movsg damlr3,gr30 | ||
226 | ld @(gr31,gr30),gr30 /* access the PGE */ | ||
227 | |||
228 | andicc.p gr30,#_PAGE_PRESENT,gr0,icc0 | ||
229 | andicc gr30,#xAMPRx_SS,gr0,icc1 | ||
230 | |||
231 | # map this PTD instead and record coverage address | ||
232 | ori.p gr30,#xAMPRx_L|xAMPRx_SS_16Kb|xAMPRx_S|xAMPRx_C|xAMPRx_V,gr30 | ||
233 | beq icc0,#0,__tlb_kernel_fault /* jump if PGE not present */ | ||
234 | slli.p gr31,#18,gr31 | ||
235 | bne icc1,#0,__itlb_k_bigpage | ||
236 | movgs gr30,dampr4 | ||
237 | movgs gr31,scr0 | ||
238 | |||
239 | # we can now resume normal service | ||
240 | setlos 0x3ffc,gr30 | ||
241 | srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
242 | bra __itlb_k_PTD_mapped | ||
243 | |||
244 | __itlb_k_bigpage: | ||
245 | break | ||
246 | nop | ||
247 | |||
248 | .size __entry_kernel_insn_tlb_miss, .-__entry_kernel_insn_tlb_miss | ||
249 | |||
250 | ############################################################################### | ||
251 | # | ||
252 | # Kernel data TLB miss handler | ||
253 | # On entry: | ||
254 | # GR1 - kernel stack pointer | ||
255 | # GR28 - saved exception frame pointer | ||
256 | # GR29 - faulting address | ||
257 | # GR31 - EAR0 ^ SCR1 | ||
258 | # SCR1 - base of virtual range covered by cached PGE from last DTLB miss (or 0xffffffff) | ||
259 | # DAMR3 - mapped page directory | ||
260 | # DAMR5 - mapped page table as matched by SCR1 | ||
261 | # | ||
262 | ############################################################################### | ||
263 | .globl __entry_kernel_data_tlb_miss | ||
264 | .type __entry_kernel_data_tlb_miss,@function | ||
265 | __entry_kernel_data_tlb_miss: | ||
266 | #if 0 | ||
267 | sethi.p %hi(0xe1200004),gr30 | ||
268 | setlo %lo(0xe1200004),gr30 | ||
269 | st gr0,@(gr30,gr0) | ||
270 | sethi.p %hi(0xffc00100),gr30 | ||
271 | setlo %lo(0xffc00100),gr30 | ||
272 | sth gr30,@(gr30,gr0) | ||
273 | membar | ||
274 | #endif | ||
275 | |||
276 | movsg ccr,gr30 /* save CCR */ | ||
277 | movgs gr30,scr2 | ||
278 | |||
279 | # see if the cached page table mapping is appropriate | ||
280 | srlicc.p gr31,#26,gr0,icc0 | ||
281 | setlos 0x3ffc,gr30 | ||
282 | srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
283 | bne icc0,#0,__dtlb_k_PTD_miss | ||
284 | |||
285 | __dtlb_k_PTD_mapped: | ||
286 | # access the PTD with EAR0[25:14] | ||
287 | # - DAMLR5 points to the virtual address of the appropriate page table | ||
288 | # - the PTD holds 4096 PTEs | ||
289 | # - the PTD must be accessed uncached | ||
290 | # - the PTE must be marked accessed if it was valid | ||
291 | # | ||
292 | and gr31,gr30,gr31 | ||
293 | movsg damlr5,gr30 | ||
294 | add gr30,gr31,gr31 | ||
295 | ldi @(gr31,#0),gr30 /* fetch the PTE */ | ||
296 | andicc gr30,#_PAGE_PRESENT,gr0,icc0 | ||
297 | ori.p gr30,#_PAGE_ACCESSED,gr30 | ||
298 | beq icc0,#0,__tlb_kernel_fault /* jump if PTE invalid */ | ||
299 | sti.p gr30,@(gr31,#0) /* update the PTE */ | ||
300 | andi gr30,#~_PAGE_ACCESSED,gr30 | ||
301 | |||
302 | # we're using DAMR1 as an extra TLB entry | ||
303 | # - punt the entry here (if valid) to the real TLB and then replace with the new PTE | ||
304 | # - need to check IAMR1 lest we cause an multiple-DAT-hit exception | ||
305 | movsg dampr1,gr31 | ||
306 | andicc gr31,#xAMPRx_V,gr0,icc0 | ||
307 | setlos.p 0xfffff000,gr31 | ||
308 | beq icc0,#0,__dtlb_k_nopunt /* punt not required */ | ||
309 | |||
310 | movsg damlr1,gr31 | ||
311 | movgs gr31,tplr /* set TPLR.CXN */ | ||
312 | tlbpr gr31,gr0,#4,#0 /* delete matches from TLB, IAMR1, DAMR1 */ | ||
313 | |||
314 | movsg dampr1,gr31 | ||
315 | ori gr31,#xAMPRx_V,gr31 /* entry was invalidated by tlbpr #4 */ | ||
316 | movgs gr31,tppr | ||
317 | movsg damlr1,gr31 /* set TPLR.CXN */ | ||
318 | movgs gr31,tplr | ||
319 | tlbpr gr31,gr0,#2,#0 /* save to the TLB */ | ||
320 | movsg tpxr,gr31 /* check the TLB write error flag */ | ||
321 | andicc.p gr31,#TPXR_E,gr0,icc0 | ||
322 | setlos #0xfffff000,gr31 | ||
323 | bne icc0,#0,__tlb_kernel_fault | ||
324 | |||
325 | __dtlb_k_nopunt: | ||
326 | |||
327 | # assemble the new TLB entry | ||
328 | and gr29,gr31,gr29 | ||
329 | movsg cxnr,gr31 | ||
330 | or gr29,gr31,gr29 | ||
331 | movgs gr29,iamlr1 /* xAMLR = address | context number */ | ||
332 | movgs gr30,iampr1 | ||
333 | movgs gr29,damlr1 | ||
334 | movgs gr30,dampr1 | ||
335 | |||
336 | # return, restoring registers | ||
337 | movsg scr2,gr30 | ||
338 | movgs gr30,ccr | ||
339 | sethi.p %hi(__kernel_current_task),gr29 | ||
340 | setlo %lo(__kernel_current_task),gr29 | ||
341 | ldi @(gr29,#0),gr29 | ||
342 | rett #0 | ||
343 | beq icc0,#3,0 /* prevent icache prefetch */ | ||
344 | |||
345 | # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more | ||
346 | # appropriate page table and map that instead | ||
347 | # - access the PGD with EAR0[31:26] | ||
348 | # - DAMLR3 points to the virtual address of the page directory | ||
349 | # - the PGD holds 64 PGEs and each PGE/PME points to a set of page tables | ||
350 | __dtlb_k_PTD_miss: | ||
351 | srli gr29,#26,gr31 /* calculate PGE offset */ | ||
352 | slli gr31,#8,gr31 /* and clear bottom bits */ | ||
353 | |||
354 | movsg damlr3,gr30 | ||
355 | ld @(gr31,gr30),gr30 /* access the PGE */ | ||
356 | |||
357 | andicc.p gr30,#_PAGE_PRESENT,gr0,icc0 | ||
358 | andicc gr30,#xAMPRx_SS,gr0,icc1 | ||
359 | |||
360 | # map this PTD instead and record coverage address | ||
361 | ori.p gr30,#xAMPRx_L|xAMPRx_SS_16Kb|xAMPRx_S|xAMPRx_C|xAMPRx_V,gr30 | ||
362 | beq icc0,#0,__tlb_kernel_fault /* jump if PGE not present */ | ||
363 | slli.p gr31,#18,gr31 | ||
364 | bne icc1,#0,__dtlb_k_bigpage | ||
365 | movgs gr30,dampr5 | ||
366 | movgs gr31,scr1 | ||
367 | |||
368 | # we can now resume normal service | ||
369 | setlos 0x3ffc,gr30 | ||
370 | srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
371 | bra __dtlb_k_PTD_mapped | ||
372 | |||
373 | __dtlb_k_bigpage: | ||
374 | break | ||
375 | nop | ||
376 | |||
377 | .size __entry_kernel_data_tlb_miss, .-__entry_kernel_data_tlb_miss | ||
378 | |||
379 | ############################################################################### | ||
380 | # | ||
381 | # Userspace instruction TLB miss handler (with PGE prediction) | ||
382 | # On entry: | ||
383 | # GR28 - faulting address | ||
384 | # GR31 - EAR0 ^ SCR0 | ||
385 | # SCR0 - base of virtual range covered by cached PGE from last ITLB miss (or 0xffffffff) | ||
386 | # DAMR3 - mapped page directory | ||
387 | # DAMR4 - mapped page table as matched by SCR0 | ||
388 | # | ||
389 | ############################################################################### | ||
390 | .globl __entry_user_insn_tlb_miss | ||
391 | .type __entry_user_insn_tlb_miss,@function | ||
392 | __entry_user_insn_tlb_miss: | ||
393 | #if 0 | ||
394 | sethi.p %hi(0xe1200004),gr30 | ||
395 | setlo %lo(0xe1200004),gr30 | ||
396 | st gr0,@(gr30,gr0) | ||
397 | sethi.p %hi(0xffc00100),gr30 | ||
398 | setlo %lo(0xffc00100),gr30 | ||
399 | sth gr30,@(gr30,gr0) | ||
400 | membar | ||
401 | #endif | ||
402 | |||
403 | movsg ccr,gr30 /* save CCR */ | ||
404 | movgs gr30,scr2 | ||
405 | |||
406 | # see if the cached page table mapping is appropriate | ||
407 | srlicc.p gr31,#26,gr0,icc0 | ||
408 | setlos 0x3ffc,gr30 | ||
409 | srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
410 | bne icc0,#0,__itlb_u_PTD_miss | ||
411 | |||
412 | __itlb_u_PTD_mapped: | ||
413 | # access the PTD with EAR0[25:14] | ||
414 | # - DAMLR4 points to the virtual address of the appropriate page table | ||
415 | # - the PTD holds 4096 PTEs | ||
416 | # - the PTD must be accessed uncached | ||
417 | # - the PTE must be marked accessed if it was valid | ||
418 | # | ||
419 | and gr31,gr30,gr31 | ||
420 | movsg damlr4,gr30 | ||
421 | add gr30,gr31,gr31 | ||
422 | ldi @(gr31,#0),gr30 /* fetch the PTE */ | ||
423 | andicc gr30,#_PAGE_PRESENT,gr0,icc0 | ||
424 | ori.p gr30,#_PAGE_ACCESSED,gr30 | ||
425 | beq icc0,#0,__tlb_user_fault /* jump if PTE invalid */ | ||
426 | sti.p gr30,@(gr31,#0) /* update the PTE */ | ||
427 | andi gr30,#~_PAGE_ACCESSED,gr30 | ||
428 | |||
429 | # we're using IAMR1/DAMR1 as an extra TLB entry | ||
430 | # - punt the entry here (if valid) to the real TLB and then replace with the new PTE | ||
431 | movsg dampr1,gr31 | ||
432 | andicc gr31,#xAMPRx_V,gr0,icc0 | ||
433 | setlos.p 0xfffff000,gr31 | ||
434 | beq icc0,#0,__itlb_u_nopunt /* punt not required */ | ||
435 | |||
436 | movsg dampr1,gr31 | ||
437 | movgs gr31,tppr | ||
438 | movsg damlr1,gr31 /* set TPLR.CXN */ | ||
439 | movgs gr31,tplr | ||
440 | tlbpr gr31,gr0,#2,#0 /* save to the TLB */ | ||
441 | movsg tpxr,gr31 /* check the TLB write error flag */ | ||
442 | andicc.p gr31,#TPXR_E,gr0,icc0 | ||
443 | setlos #0xfffff000,gr31 | ||
444 | bne icc0,#0,__tlb_user_fault | ||
445 | |||
446 | __itlb_u_nopunt: | ||
447 | |||
448 | # assemble the new TLB entry | ||
449 | and gr28,gr31,gr28 | ||
450 | movsg cxnr,gr31 | ||
451 | or gr28,gr31,gr28 | ||
452 | movgs gr28,iamlr1 /* xAMLR = address | context number */ | ||
453 | movgs gr30,iampr1 | ||
454 | movgs gr28,damlr1 | ||
455 | movgs gr30,dampr1 | ||
456 | |||
457 | # return, restoring registers | ||
458 | movsg scr2,gr30 | ||
459 | movgs gr30,ccr | ||
460 | rett #0 | ||
461 | beq icc0,#3,0 /* prevent icache prefetch */ | ||
462 | |||
463 | # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more | ||
464 | # appropriate page table and map that instead | ||
465 | # - access the PGD with EAR0[31:26] | ||
466 | # - DAMLR3 points to the virtual address of the page directory | ||
467 | # - the PGD holds 64 PGEs and each PGE/PME points to a set of page tables | ||
468 | __itlb_u_PTD_miss: | ||
469 | srli gr28,#26,gr31 /* calculate PGE offset */ | ||
470 | slli gr31,#8,gr31 /* and clear bottom bits */ | ||
471 | |||
472 | movsg damlr3,gr30 | ||
473 | ld @(gr31,gr30),gr30 /* access the PGE */ | ||
474 | |||
475 | andicc.p gr30,#_PAGE_PRESENT,gr0,icc0 | ||
476 | andicc gr30,#xAMPRx_SS,gr0,icc1 | ||
477 | |||
478 | # map this PTD instead and record coverage address | ||
479 | ori.p gr30,#xAMPRx_L|xAMPRx_SS_16Kb|xAMPRx_S|xAMPRx_C|xAMPRx_V,gr30 | ||
480 | beq icc0,#0,__tlb_user_fault /* jump if PGE not present */ | ||
481 | slli.p gr31,#18,gr31 | ||
482 | bne icc1,#0,__itlb_u_bigpage | ||
483 | movgs gr30,dampr4 | ||
484 | movgs gr31,scr0 | ||
485 | |||
486 | # we can now resume normal service | ||
487 | setlos 0x3ffc,gr30 | ||
488 | srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
489 | bra __itlb_u_PTD_mapped | ||
490 | |||
491 | __itlb_u_bigpage: | ||
492 | break | ||
493 | nop | ||
494 | |||
495 | .size __entry_user_insn_tlb_miss, .-__entry_user_insn_tlb_miss | ||
496 | |||
497 | ############################################################################### | ||
498 | # | ||
499 | # Userspace data TLB miss handler | ||
500 | # On entry: | ||
501 | # GR28 - faulting address | ||
502 | # GR31 - EAR0 ^ SCR1 | ||
503 | # SCR1 - base of virtual range covered by cached PGE from last DTLB miss (or 0xffffffff) | ||
504 | # DAMR3 - mapped page directory | ||
505 | # DAMR5 - mapped page table as matched by SCR1 | ||
506 | # | ||
507 | ############################################################################### | ||
508 | .globl __entry_user_data_tlb_miss | ||
509 | .type __entry_user_data_tlb_miss,@function | ||
510 | __entry_user_data_tlb_miss: | ||
511 | #if 0 | ||
512 | sethi.p %hi(0xe1200004),gr30 | ||
513 | setlo %lo(0xe1200004),gr30 | ||
514 | st gr0,@(gr30,gr0) | ||
515 | sethi.p %hi(0xffc00100),gr30 | ||
516 | setlo %lo(0xffc00100),gr30 | ||
517 | sth gr30,@(gr30,gr0) | ||
518 | membar | ||
519 | #endif | ||
520 | |||
521 | movsg ccr,gr30 /* save CCR */ | ||
522 | movgs gr30,scr2 | ||
523 | |||
524 | # see if the cached page table mapping is appropriate | ||
525 | srlicc.p gr31,#26,gr0,icc0 | ||
526 | setlos 0x3ffc,gr30 | ||
527 | srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
528 | bne icc0,#0,__dtlb_u_PTD_miss | ||
529 | |||
530 | __dtlb_u_PTD_mapped: | ||
531 | # access the PTD with EAR0[25:14] | ||
532 | # - DAMLR5 points to the virtual address of the appropriate page table | ||
533 | # - the PTD holds 4096 PTEs | ||
534 | # - the PTD must be accessed uncached | ||
535 | # - the PTE must be marked accessed if it was valid | ||
536 | # | ||
537 | and gr31,gr30,gr31 | ||
538 | movsg damlr5,gr30 | ||
539 | |||
540 | __dtlb_u_using_iPTD: | ||
541 | add gr30,gr31,gr31 | ||
542 | ldi @(gr31,#0),gr30 /* fetch the PTE */ | ||
543 | andicc gr30,#_PAGE_PRESENT,gr0,icc0 | ||
544 | ori.p gr30,#_PAGE_ACCESSED,gr30 | ||
545 | beq icc0,#0,__tlb_user_fault /* jump if PTE invalid */ | ||
546 | sti.p gr30,@(gr31,#0) /* update the PTE */ | ||
547 | andi gr30,#~_PAGE_ACCESSED,gr30 | ||
548 | |||
549 | # we're using DAMR1 as an extra TLB entry | ||
550 | # - punt the entry here (if valid) to the real TLB and then replace with the new PTE | ||
551 | movsg dampr1,gr31 | ||
552 | andicc gr31,#xAMPRx_V,gr0,icc0 | ||
553 | setlos.p 0xfffff000,gr31 | ||
554 | beq icc0,#0,__dtlb_u_nopunt /* punt not required */ | ||
555 | |||
556 | movsg dampr1,gr31 | ||
557 | movgs gr31,tppr | ||
558 | movsg damlr1,gr31 /* set TPLR.CXN */ | ||
559 | movgs gr31,tplr | ||
560 | tlbpr gr31,gr0,#2,#0 /* save to the TLB */ | ||
561 | movsg tpxr,gr31 /* check the TLB write error flag */ | ||
562 | andicc.p gr31,#TPXR_E,gr0,icc0 | ||
563 | setlos #0xfffff000,gr31 | ||
564 | bne icc0,#0,__tlb_user_fault | ||
565 | |||
566 | __dtlb_u_nopunt: | ||
567 | |||
568 | # assemble the new TLB entry | ||
569 | and gr28,gr31,gr28 | ||
570 | movsg cxnr,gr31 | ||
571 | or gr28,gr31,gr28 | ||
572 | movgs gr28,iamlr1 /* xAMLR = address | context number */ | ||
573 | movgs gr30,iampr1 | ||
574 | movgs gr28,damlr1 | ||
575 | movgs gr30,dampr1 | ||
576 | |||
577 | # return, restoring registers | ||
578 | movsg scr2,gr30 | ||
579 | movgs gr30,ccr | ||
580 | rett #0 | ||
581 | beq icc0,#3,0 /* prevent icache prefetch */ | ||
582 | |||
583 | # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more | ||
584 | # appropriate page table and map that instead | ||
585 | # - first of all, check the insn PGE cache - we may well get a hit there | ||
586 | # - access the PGD with EAR0[31:26] | ||
587 | # - DAMLR3 points to the virtual address of the page directory | ||
588 | # - the PGD holds 64 PGEs and each PGE/PME points to a set of page tables | ||
589 | __dtlb_u_PTD_miss: | ||
590 | movsg scr0,gr31 /* consult the insn-PGE-cache key */ | ||
591 | xor gr28,gr31,gr31 | ||
592 | srlicc gr31,#26,gr0,icc0 | ||
593 | srli gr28,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
594 | bne icc0,#0,__dtlb_u_iPGE_miss | ||
595 | |||
596 | # what we're looking for is covered by the insn-PGE-cache | ||
597 | setlos 0x3ffc,gr30 | ||
598 | and gr31,gr30,gr31 | ||
599 | movsg damlr4,gr30 | ||
600 | bra __dtlb_u_using_iPTD | ||
601 | |||
602 | __dtlb_u_iPGE_miss: | ||
603 | srli gr28,#26,gr31 /* calculate PGE offset */ | ||
604 | slli gr31,#8,gr31 /* and clear bottom bits */ | ||
605 | |||
606 | movsg damlr3,gr30 | ||
607 | ld @(gr31,gr30),gr30 /* access the PGE */ | ||
608 | |||
609 | andicc.p gr30,#_PAGE_PRESENT,gr0,icc0 | ||
610 | andicc gr30,#xAMPRx_SS,gr0,icc1 | ||
611 | |||
612 | # map this PTD instead and record coverage address | ||
613 | ori.p gr30,#xAMPRx_L|xAMPRx_SS_16Kb|xAMPRx_S|xAMPRx_C|xAMPRx_V,gr30 | ||
614 | beq icc0,#0,__tlb_user_fault /* jump if PGE not present */ | ||
615 | slli.p gr31,#18,gr31 | ||
616 | bne icc1,#0,__dtlb_u_bigpage | ||
617 | movgs gr30,dampr5 | ||
618 | movgs gr31,scr1 | ||
619 | |||
620 | # we can now resume normal service | ||
621 | setlos 0x3ffc,gr30 | ||
622 | srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */ | ||
623 | bra __dtlb_u_PTD_mapped | ||
624 | |||
625 | __dtlb_u_bigpage: | ||
626 | break | ||
627 | nop | ||
628 | |||
629 | .size __entry_user_data_tlb_miss, .-__entry_user_data_tlb_miss | ||
diff --git a/tools/arch/frv/include/uapi/asm/bitsperlong.h b/tools/arch/frv/include/uapi/asm/bitsperlong.h deleted file mode 100644 index 76da34b10f59..000000000000 --- a/tools/arch/frv/include/uapi/asm/bitsperlong.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/bitsperlong.h> | ||
diff --git a/tools/arch/frv/include/uapi/asm/mman.h b/tools/arch/frv/include/uapi/asm/mman.h deleted file mode 100644 index 5bc900b0bc78..000000000000 --- a/tools/arch/frv/include/uapi/asm/mman.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef TOOLS_ARCH_FRV_UAPI_ASM_MMAN_FIX_H | ||
3 | #define TOOLS_ARCH_FRV_UAPI_ASM_MMAN_FIX_H | ||
4 | #include <uapi/asm-generic/mman.h> | ||
5 | /* MAP_32BIT is undefined on frv, fix it for perf */ | ||
6 | #define MAP_32BIT 0 | ||
7 | #endif | ||