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-rw-r--r--arch/sh/boards/mach-se/770x/setup.c14
-rw-r--r--arch/sh/include/mach-se/mach/se.h1
2 files changed, 13 insertions, 2 deletions
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index b7fa7a87e946..412326d59e6f 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -124,10 +124,15 @@ static struct sh_eth_plat_data sh_eth_plat = {
124static struct resource sh_eth0_resources[] = { 124static struct resource sh_eth0_resources[] = {
125 [0] = { 125 [0] = {
126 .start = SH_ETH0_BASE, 126 .start = SH_ETH0_BASE,
127 .end = SH_ETH0_BASE + 0x1B8, 127 .end = SH_ETH0_BASE + 0x1B8 - 1,
128 .flags = IORESOURCE_MEM, 128 .flags = IORESOURCE_MEM,
129 }, 129 },
130 [1] = { 130 [1] = {
131 .start = SH_TSU_BASE,
132 .end = SH_TSU_BASE + 0x200 - 1,
133 .flags = IORESOURCE_MEM,
134 },
135 [2] = {
131 .start = SH_ETH0_IRQ, 136 .start = SH_ETH0_IRQ,
132 .end = SH_ETH0_IRQ, 137 .end = SH_ETH0_IRQ,
133 .flags = IORESOURCE_IRQ, 138 .flags = IORESOURCE_IRQ,
@@ -147,10 +152,15 @@ static struct platform_device sh_eth0_device = {
147static struct resource sh_eth1_resources[] = { 152static struct resource sh_eth1_resources[] = {
148 [0] = { 153 [0] = {
149 .start = SH_ETH1_BASE, 154 .start = SH_ETH1_BASE,
150 .end = SH_ETH1_BASE + 0x1B8, 155 .end = SH_ETH1_BASE + 0x1B8 - 1,
151 .flags = IORESOURCE_MEM, 156 .flags = IORESOURCE_MEM,
152 }, 157 },
153 [1] = { 158 [1] = {
159 .start = SH_TSU_BASE,
160 .end = SH_TSU_BASE + 0x200 - 1,
161 .flags = IORESOURCE_MEM,
162 },
163 [2] = {
154 .start = SH_ETH1_IRQ, 164 .start = SH_ETH1_IRQ,
155 .end = SH_ETH1_IRQ, 165 .end = SH_ETH1_IRQ,
156 .flags = IORESOURCE_IRQ, 166 .flags = IORESOURCE_IRQ,
diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h
index 4246ef9b07a3..aa83fe1ff0b1 100644
--- a/arch/sh/include/mach-se/mach/se.h
+++ b/arch/sh/include/mach-se/mach/se.h
@@ -100,6 +100,7 @@
100/* Base address */ 100/* Base address */
101#define SH_ETH0_BASE 0xA7000000 101#define SH_ETH0_BASE 0xA7000000
102#define SH_ETH1_BASE 0xA7000400 102#define SH_ETH1_BASE 0xA7000400
103#define SH_TSU_BASE 0xA7000800
103/* PHY ID */ 104/* PHY ID */
104#if defined(CONFIG_CPU_SUBTYPE_SH7710) 105#if defined(CONFIG_CPU_SUBTYPE_SH7710)
105# define PHY_ID 0x00 106# define PHY_ID 0x00