5 files changed, 41 insertions, 10 deletions

diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h
index 90f604bbcd19..4508b322f2cd 100644
--- a/arch/powerpc/include/asm/fixmap.h
+++ b/arch/powerpc/include/asm/fixmap.h
@@ -51,6 +51,13 @@ enum fixed_addresses {
         FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
         FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
 #endif
+#ifdef CONFIG_PPC_8xx
+        /* For IMMR we need an aligned 512K area */
+#define FIX_IMMR_SIZE   (512 * 1024 / PAGE_SIZE)
+        FIX_IMMR_START,
+        FIX_IMMR_BASE = __ALIGN_MASK(FIX_IMMR_START, FIX_IMMR_SIZE - 1) - 1 +
+                       FIX_IMMR_SIZE,
+#endif
         /* FIX_PCIE_MCFG, */
         __end_of_fixed_addresses
 };
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/mmu-8xx.h
index 0a566f15f985..3e0e4927811c 100644
--- a/arch/powerpc/include/asm/mmu-8xx.h
+++ b/arch/powerpc/include/asm/mmu-8xx.h
@@ -169,6 +169,9 @@ typedef struct {
         unsigned int active;
         unsigned long vdso_base;
 } mm_context_t;
+
+#define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000)
+#define VIRT_IMMR_BASE (__fix_to_virt(FIX_IMMR_BASE))
 #endif /* !__ASSEMBLY__ */
 
 #if defined(CONFIG_PPC_4K_PAGES)
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 047892869257..247f6407c7d8 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -68,6 +68,10 @@
 #include "../mm/mmu_decl.h"
 #endif
 
+#ifdef CONFIG_PPC_8xx
+#include <asm/fixmap.h>
+#endif
+
 int main(void)
 {
         DEFINE(THREAD, offsetof(struct task_struct, thread));
@@ -749,5 +753,9 @@ int main(void)
 
         DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
 
+#ifdef CONFIG_PPC_8xx
+        DEFINE(VIRT_IMMR_BASE, __fix_to_virt(FIX_IMMR_BASE));
+#endif
+
         return 0;
 }
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 80c69472314e..378a1858687d 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -30,6 +30,7 @@
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/ptrace.h>
+#include <asm/fixmap.h>
 
 /* Macro to make the code more readable. */
 #ifdef CONFIG_8xx_CPU6
@@ -763,7 +764,7 @@ start_here:
  * virtual to physical.  Also, set the cache mode since that is defined
  * by TLB entries and perform any additional mapping (like of the IMMR).
  * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel,
- * 24 Mbytes of data, and the 8M IMMR space.  Anything not covered by
+ * 24 Mbytes of data, and the 512k IMMR space.  Anything not covered by
  * these mappings is mapped by page tables.
  */
 initial_mmu:
@@ -812,7 +813,7 @@ initial_mmu:
         ori     r8, r8, MD_APG_INIT@l
         mtspr   SPRN_MD_AP, r8
 
-        /* Map another 8 MByte at the IMMR to get the processor
+        /* Map a 512k page for the IMMR to get the processor
          * internal registers (among other things).
          */
 #ifdef CONFIG_PIN_TLB
@@ -820,12 +821,12 @@ initial_mmu:
         mtspr   SPRN_MD_CTR, r10
 #endif
         mfspr   r9, 638                 /* Get current IMMR */
-        andis.  r9, r9, 0xff80          /* Get 8Mbyte boundary */
+        andis.  r9, r9, 0xfff8          /* Get 512 kbytes boundary */
 
-        mr      r8, r9                  /* Create vaddr for TLB */
+        lis     r8, VIRT_IMMR_BASE@h    /* Create vaddr for TLB */
         ori     r8, r8, MD_EVALID       /* Mark it valid */
         mtspr   SPRN_MD_EPN, r8
-        li      r8, MD_PS8MEG           /* Set 8M byte page */
+        li      r8, MD_PS512K | MD_GUARDED      /* Set 512k byte page */
         ori     r8, r8, MD_SVALID       /* Make it valid */
         mtspr   SPRN_MD_TWC, r8
         mr      r8, r9                  /* Create paddr for TLB */
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 0ac12e5fd8ab..911456d17713 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -28,6 +28,7 @@
 #include <asm/udbg.h>
 #include <asm/io.h>
 #include <asm/cpm.h>
+#include <asm/fixmap.h>
 #include <soc/fsl/qe/qe.h>
 
 #include <mm/mmu_decl.h>
@@ -37,25 +38,36 @@
 #endif
 
 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
-static u32 __iomem *cpm_udbg_txdesc =
-        (u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
+static u32 __iomem *cpm_udbg_txdesc;
+static u8 __iomem *cpm_udbg_txbuf;
 
 static void udbg_putc_cpm(char c)
 {
-        u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]);
-
         if (c == '\n')
                 udbg_putc_cpm('\r');
 
         while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000)
                 ;
 
-        out_8(txbuf, c);
+        out_8(cpm_udbg_txbuf, c);
         out_be32(&cpm_udbg_txdesc[0], 0xa0000001);
 }
 
 void __init udbg_init_cpm(void)
 {
+#ifdef CONFIG_PPC_8xx
+        cpm_udbg_txdesc = (u32 __iomem __force *)
+                          (CONFIG_PPC_EARLY_DEBUG_CPM_ADDR - PHYS_IMMR_BASE +
+                           VIRT_IMMR_BASE);
+        cpm_udbg_txbuf = (u8 __iomem __force *)
+                         (in_be32(&cpm_udbg_txdesc[1]) - PHYS_IMMR_BASE +
+                          VIRT_IMMR_BASE);
+#else
+        cpm_udbg_txdesc = (u32 __iomem __force *)
+                          CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
+        cpm_udbg_txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]);
+#endif
+
         if (cpm_udbg_txdesc) {
 #ifdef CONFIG_CPM2
                 setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG);