diff options
| -rw-r--r-- | arch/mips/kernel/perf_event_mipsxx.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index 313a88b2973f..f3e301f95aef 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c | |||
| @@ -1597,7 +1597,6 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) | |||
| 1597 | break; | 1597 | break; |
| 1598 | case CPU_P5600: | 1598 | case CPU_P5600: |
| 1599 | case CPU_P6600: | 1599 | case CPU_P6600: |
| 1600 | case CPU_I6400: | ||
| 1601 | /* 8-bit event numbers */ | 1600 | /* 8-bit event numbers */ |
| 1602 | raw_id = config & 0x1ff; | 1601 | raw_id = config & 0x1ff; |
| 1603 | base_id = raw_id & 0xff; | 1602 | base_id = raw_id & 0xff; |
| @@ -1610,6 +1609,11 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) | |||
| 1610 | raw_event.range = P; | 1609 | raw_event.range = P; |
| 1611 | #endif | 1610 | #endif |
| 1612 | break; | 1611 | break; |
| 1612 | case CPU_I6400: | ||
| 1613 | /* 8-bit event numbers */ | ||
| 1614 | base_id = config & 0xff; | ||
| 1615 | raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; | ||
| 1616 | break; | ||
| 1613 | case CPU_1004K: | 1617 | case CPU_1004K: |
| 1614 | if (IS_BOTH_COUNTERS_1004K_EVENT(base_id)) | 1618 | if (IS_BOTH_COUNTERS_1004K_EVENT(base_id)) |
| 1615 | raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; | 1619 | raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; |
