2 files changed, 11 insertions, 1 deletions

diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 323a313947e0..d760611cfc35 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -453,6 +453,12 @@ static inline void __native_flush_tlb_one_user(unsigned long addr)
  */
 static inline void __flush_tlb_all(void)
 {
+        /*
+         * This is to catch users with enabled preemption and the PGE feature
+         * and don't trigger the warning in __native_flush_tlb().
+         */
+        VM_WARN_ON_ONCE(preemptible());
+
         if (boot_cpu_has(X86_FEATURE_PGE)) {
                 __flush_tlb_global();
         } else {
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 62bb30b4bd2a..a1004dec98ea 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -2309,9 +2309,13 @@ void __kernel_map_pages(struct page *page, int numpages, int enable)
 
         /*
          * We should perform an IPI and flush all tlbs,
-         * but that can deadlock->flush only current cpu:
+         * but that can deadlock->flush only current cpu.
+         * Preemption needs to be disabled around __flush_tlb_all() due to
+         * CR3 reload in __native_flush_tlb().
          */
+        preempt_disable();
         __flush_tlb_all();
+        preempt_enable();
 
         arch_flush_lazy_mmu_mode();
 }