4 files changed, 84 insertions, 8 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index e3d70772b531..dc29ed8145c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -85,8 +85,6 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
         /* We borrow the event spin lock for protecting flip_status */
         spin_lock_irqsave(&crtc->dev->event_lock, flags);
 
-        /* set the proper interrupt */
-        amdgpu_irq_get(adev, &adev->pageflip_irq, work->crtc_id);
         /* do the flip (mmio) */
         adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base);
         /* set the flip status */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index e4d101b1252a..d4c82b625727 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -255,6 +255,24 @@ static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
                 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
 }
 
+static void dce_v10_0_pageflip_interrupt_init(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Enable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_get(adev, &adev->pageflip_irq, i);
+}
+
+static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Disable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_put(adev, &adev->pageflip_irq, i);
+}
+
 /**
  * dce_v10_0_page_flip - pageflip callback.
  *
@@ -2663,9 +2681,10 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)
                 dce_v10_0_vga_enable(crtc, true);
                 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
                 dce_v10_0_vga_enable(crtc, false);
-                /* Make sure VBLANK interrupt is still enabled */
+                /* Make sure VBLANK and PFLIP interrupts are still enabled */
                 type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
                 amdgpu_irq_update(adev, &adev->crtc_irq, type);
+                amdgpu_irq_update(adev, &adev->pageflip_irq, type);
                 drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
                 dce_v10_0_crtc_load_lut(crtc);
                 break;
@@ -3025,6 +3044,8 @@ static int dce_v10_0_hw_init(void *handle)
                 dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v10_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3039,6 +3060,8 @@ static int dce_v10_0_hw_fini(void *handle)
                 dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v10_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3050,6 +3073,8 @@ static int dce_v10_0_suspend(void *handle)
 
         dce_v10_0_hpd_fini(adev);
 
+        dce_v10_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3075,6 +3100,8 @@ static int dce_v10_0_resume(void *handle)
         /* initialize hpd */
         dce_v10_0_hpd_init(adev);
 
+        dce_v10_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3369,7 +3396,6 @@ static int dce_v10_0_pageflip_irq(struct amdgpu_device *adev,
         spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
         drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-        amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
         queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
 
         return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index fcd2ed558902..7e1cf5e4eebf 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -233,6 +233,24 @@ static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
                 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
 }
 
+static void dce_v11_0_pageflip_interrupt_init(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Enable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_get(adev, &adev->pageflip_irq, i);
+}
+
+static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Disable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_put(adev, &adev->pageflip_irq, i);
+}
+
 /**
  * dce_v11_0_page_flip - pageflip callback.
  *
@@ -2640,9 +2658,10 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
                 dce_v11_0_vga_enable(crtc, true);
                 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
                 dce_v11_0_vga_enable(crtc, false);
-                /* Make sure VBLANK interrupt is still enabled */
+                /* Make sure VBLANK and PFLIP interrupts are still enabled */
                 type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
                 amdgpu_irq_update(adev, &adev->crtc_irq, type);
+                amdgpu_irq_update(adev, &adev->pageflip_irq, type);
                 drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
                 dce_v11_0_crtc_load_lut(crtc);
                 break;
@@ -3000,6 +3019,8 @@ static int dce_v11_0_hw_init(void *handle)
                 dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v11_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3014,6 +3035,8 @@ static int dce_v11_0_hw_fini(void *handle)
                 dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v11_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3025,6 +3048,8 @@ static int dce_v11_0_suspend(void *handle)
 
         dce_v11_0_hpd_fini(adev);
 
+        dce_v11_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3051,6 +3076,8 @@ static int dce_v11_0_resume(void *handle)
         /* initialize hpd */
         dce_v11_0_hpd_init(adev);
 
+        dce_v11_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3345,7 +3372,6 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev,
         spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
         drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-        amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
         queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
 
         return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index c86911c2ea2a..34b9c2a9d8d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -204,6 +204,24 @@ static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
                 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
 }
 
+static void dce_v8_0_pageflip_interrupt_init(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Enable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_get(adev, &adev->pageflip_irq, i);
+}
+
+static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Disable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_put(adev, &adev->pageflip_irq, i);
+}
+
 /**
  * dce_v8_0_page_flip - pageflip callback.
  *
@@ -2575,9 +2593,10 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode)
                 dce_v8_0_vga_enable(crtc, true);
                 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
                 dce_v8_0_vga_enable(crtc, false);
-                /* Make sure VBLANK interrupt is still enabled */
+                /* Make sure VBLANK and PFLIP interrupts are still enabled */
                 type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
                 amdgpu_irq_update(adev, &adev->crtc_irq, type);
+                amdgpu_irq_update(adev, &adev->pageflip_irq, type);
                 drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
                 dce_v8_0_crtc_load_lut(crtc);
                 break;
@@ -2933,6 +2952,8 @@ static int dce_v8_0_hw_init(void *handle)
                 dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v8_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -2947,6 +2968,8 @@ static int dce_v8_0_hw_fini(void *handle)
                 dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v8_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -2958,6 +2981,8 @@ static int dce_v8_0_suspend(void *handle)
 
         dce_v8_0_hpd_fini(adev);
 
+        dce_v8_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -2981,6 +3006,8 @@ static int dce_v8_0_resume(void *handle)
         /* initialize hpd */
         dce_v8_0_hpd_init(adev);
 
+        dce_v8_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3376,7 +3403,6 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev,
         spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
         drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-        amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
         queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
 
         return 0;