diff options
| -rw-r--r-- | drivers/soc/mediatek/mtk-infracfg.c | 46 | ||||
| -rw-r--r-- | drivers/soc/mediatek/mtk-pmic-wrap.c | 13 | ||||
| -rw-r--r-- | drivers/soc/mediatek/mtk-scpsys.c | 167 | ||||
| -rw-r--r-- | include/linux/regmap.h | 1 |
4 files changed, 83 insertions, 144 deletions
diff --git a/drivers/soc/mediatek/mtk-infracfg.c b/drivers/soc/mediatek/mtk-infracfg.c index 8c310de01e93..958861c9e6ee 100644 --- a/drivers/soc/mediatek/mtk-infracfg.c +++ b/drivers/soc/mediatek/mtk-infracfg.c | |||
| @@ -17,6 +17,9 @@ | |||
| 17 | #include <linux/soc/mediatek/infracfg.h> | 17 | #include <linux/soc/mediatek/infracfg.h> |
| 18 | #include <asm/processor.h> | 18 | #include <asm/processor.h> |
| 19 | 19 | ||
| 20 | #define MTK_POLL_DELAY_US 10 | ||
| 21 | #define MTK_POLL_TIMEOUT (jiffies_to_usecs(HZ)) | ||
| 22 | |||
| 20 | #define INFRA_TOPAXI_PROTECTEN 0x0220 | 23 | #define INFRA_TOPAXI_PROTECTEN 0x0220 |
| 21 | #define INFRA_TOPAXI_PROTECTSTA1 0x0228 | 24 | #define INFRA_TOPAXI_PROTECTSTA1 0x0228 |
| 22 | #define INFRA_TOPAXI_PROTECTEN_SET 0x0260 | 25 | #define INFRA_TOPAXI_PROTECTEN_SET 0x0260 |
| @@ -37,7 +40,6 @@ | |||
| 37 | int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, | 40 | int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, |
| 38 | bool reg_update) | 41 | bool reg_update) |
| 39 | { | 42 | { |
| 40 | unsigned long expired; | ||
| 41 | u32 val; | 43 | u32 val; |
| 42 | int ret; | 44 | int ret; |
| 43 | 45 | ||
| @@ -47,22 +49,11 @@ int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, | |||
| 47 | else | 49 | else |
| 48 | regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask); | 50 | regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask); |
| 49 | 51 | ||
| 50 | expired = jiffies + HZ; | 52 | ret = regmap_read_poll_timeout(infracfg, INFRA_TOPAXI_PROTECTSTA1, |
| 51 | 53 | val, (val & mask) == mask, | |
| 52 | while (1) { | 54 | MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); |
| 53 | ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val); | ||
| 54 | if (ret) | ||
| 55 | return ret; | ||
| 56 | |||
| 57 | if ((val & mask) == mask) | ||
| 58 | break; | ||
| 59 | 55 | ||
| 60 | cpu_relax(); | 56 | return ret; |
| 61 | if (time_after(jiffies, expired)) | ||
| 62 | return -EIO; | ||
| 63 | } | ||
| 64 | |||
| 65 | return 0; | ||
| 66 | } | 57 | } |
| 67 | 58 | ||
| 68 | /** | 59 | /** |
| @@ -80,30 +71,17 @@ int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, | |||
| 80 | int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, | 71 | int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, |
| 81 | bool reg_update) | 72 | bool reg_update) |
| 82 | { | 73 | { |
| 83 | unsigned long expired; | ||
| 84 | int ret; | 74 | int ret; |
| 75 | u32 val; | ||
| 85 | 76 | ||
| 86 | if (reg_update) | 77 | if (reg_update) |
| 87 | regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0); | 78 | regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0); |
| 88 | else | 79 | else |
| 89 | regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask); | 80 | regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask); |
| 90 | 81 | ||
| 91 | expired = jiffies + HZ; | 82 | ret = regmap_read_poll_timeout(infracfg, INFRA_TOPAXI_PROTECTSTA1, |
| 92 | 83 | val, !(val & mask), | |
| 93 | while (1) { | 84 | MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); |
| 94 | u32 val; | ||
| 95 | |||
| 96 | ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val); | ||
| 97 | if (ret) | ||
| 98 | return ret; | ||
| 99 | |||
| 100 | if (!(val & mask)) | ||
| 101 | break; | ||
| 102 | |||
| 103 | cpu_relax(); | ||
| 104 | if (time_after(jiffies, expired)) | ||
| 105 | return -EIO; | ||
| 106 | } | ||
| 107 | 85 | ||
| 108 | return 0; | 86 | return ret; |
| 109 | } | 87 | } |
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index e9e054a15b7d..2afae64061d8 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c | |||
| @@ -1458,19 +1458,12 @@ static int pwrap_probe(struct platform_device *pdev) | |||
| 1458 | int ret, irq; | 1458 | int ret, irq; |
| 1459 | struct pmic_wrapper *wrp; | 1459 | struct pmic_wrapper *wrp; |
| 1460 | struct device_node *np = pdev->dev.of_node; | 1460 | struct device_node *np = pdev->dev.of_node; |
| 1461 | const struct of_device_id *of_id = | ||
| 1462 | of_match_device(of_pwrap_match_tbl, &pdev->dev); | ||
| 1463 | const struct of_device_id *of_slave_id = NULL; | 1461 | const struct of_device_id *of_slave_id = NULL; |
| 1464 | struct resource *res; | 1462 | struct resource *res; |
| 1465 | 1463 | ||
| 1466 | if (!of_id) { | 1464 | if (np->child) |
| 1467 | dev_err(&pdev->dev, "Error: No device match found\n"); | 1465 | of_slave_id = of_match_node(of_slave_match_tbl, np->child); |
| 1468 | return -ENODEV; | ||
| 1469 | } | ||
| 1470 | 1466 | ||
| 1471 | if (pdev->dev.of_node->child) | ||
| 1472 | of_slave_id = of_match_node(of_slave_match_tbl, | ||
| 1473 | pdev->dev.of_node->child); | ||
| 1474 | if (!of_slave_id) { | 1467 | if (!of_slave_id) { |
| 1475 | dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n"); | 1468 | dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n"); |
| 1476 | return -EINVAL; | 1469 | return -EINVAL; |
| @@ -1482,7 +1475,7 @@ static int pwrap_probe(struct platform_device *pdev) | |||
| 1482 | 1475 | ||
| 1483 | platform_set_drvdata(pdev, wrp); | 1476 | platform_set_drvdata(pdev, wrp); |
| 1484 | 1477 | ||
| 1485 | wrp->master = of_id->data; | 1478 | wrp->master = of_device_get_match_data(&pdev->dev); |
| 1486 | wrp->slave = of_slave_id->data; | 1479 | wrp->slave = of_slave_id->data; |
| 1487 | wrp->dev = &pdev->dev; | 1480 | wrp->dev = &pdev->dev; |
| 1488 | 1481 | ||
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c index d762a46d434f..128e3dd3186d 100644 --- a/drivers/soc/mediatek/mtk-scpsys.c +++ b/drivers/soc/mediatek/mtk-scpsys.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <linux/clk.h> | 13 | #include <linux/clk.h> |
| 14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
| 15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
| 16 | #include <linux/iopoll.h> | ||
| 16 | #include <linux/mfd/syscon.h> | 17 | #include <linux/mfd/syscon.h> |
| 17 | #include <linux/of_device.h> | 18 | #include <linux/of_device.h> |
| 18 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
| @@ -27,6 +28,13 @@ | |||
| 27 | #include <dt-bindings/power/mt7623a-power.h> | 28 | #include <dt-bindings/power/mt7623a-power.h> |
| 28 | #include <dt-bindings/power/mt8173-power.h> | 29 | #include <dt-bindings/power/mt8173-power.h> |
| 29 | 30 | ||
| 31 | #define MTK_POLL_DELAY_US 10 | ||
| 32 | #define MTK_POLL_TIMEOUT (jiffies_to_usecs(HZ)) | ||
| 33 | |||
| 34 | #define MTK_SCPD_ACTIVE_WAKEUP BIT(0) | ||
| 35 | #define MTK_SCPD_FWAIT_SRAM BIT(1) | ||
| 36 | #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x)) | ||
| 37 | |||
| 30 | #define SPM_VDE_PWR_CON 0x0210 | 38 | #define SPM_VDE_PWR_CON 0x0210 |
| 31 | #define SPM_MFG_PWR_CON 0x0214 | 39 | #define SPM_MFG_PWR_CON 0x0214 |
| 32 | #define SPM_VEN_PWR_CON 0x0230 | 40 | #define SPM_VEN_PWR_CON 0x0230 |
| @@ -116,7 +124,7 @@ struct scp_domain_data { | |||
| 116 | u32 sram_pdn_ack_bits; | 124 | u32 sram_pdn_ack_bits; |
| 117 | u32 bus_prot_mask; | 125 | u32 bus_prot_mask; |
| 118 | enum clk_id clk_id[MAX_CLKS]; | 126 | enum clk_id clk_id[MAX_CLKS]; |
| 119 | bool active_wakeup; | 127 | u8 caps; |
| 120 | }; | 128 | }; |
| 121 | 129 | ||
| 122 | struct scp; | 130 | struct scp; |
| @@ -184,12 +192,10 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) | |||
| 184 | { | 192 | { |
| 185 | struct scp_domain *scpd = container_of(genpd, struct scp_domain, genpd); | 193 | struct scp_domain *scpd = container_of(genpd, struct scp_domain, genpd); |
| 186 | struct scp *scp = scpd->scp; | 194 | struct scp *scp = scpd->scp; |
| 187 | unsigned long timeout; | ||
| 188 | bool expired; | ||
| 189 | void __iomem *ctl_addr = scp->base + scpd->data->ctl_offs; | 195 | void __iomem *ctl_addr = scp->base + scpd->data->ctl_offs; |
| 190 | u32 sram_pdn_ack = scpd->data->sram_pdn_ack_bits; | 196 | u32 pdn_ack = scpd->data->sram_pdn_ack_bits; |
| 191 | u32 val; | 197 | u32 val; |
| 192 | int ret; | 198 | int ret, tmp; |
| 193 | int i; | 199 | int i; |
| 194 | 200 | ||
| 195 | if (scpd->supply) { | 201 | if (scpd->supply) { |
| @@ -215,23 +221,10 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) | |||
| 215 | writel(val, ctl_addr); | 221 | writel(val, ctl_addr); |
| 216 | 222 | ||
| 217 | /* wait until PWR_ACK = 1 */ | 223 | /* wait until PWR_ACK = 1 */ |
| 218 | timeout = jiffies + HZ; | 224 | ret = readx_poll_timeout(scpsys_domain_is_on, scpd, tmp, tmp > 0, |
| 219 | expired = false; | 225 | MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); |
| 220 | while (1) { | 226 | if (ret < 0) |
| 221 | ret = scpsys_domain_is_on(scpd); | 227 | goto err_pwr_ack; |
| 222 | if (ret > 0) | ||
| 223 | break; | ||
| 224 | |||
| 225 | if (expired) { | ||
| 226 | ret = -ETIMEDOUT; | ||
| 227 | goto err_pwr_ack; | ||
| 228 | } | ||
| 229 | |||
| 230 | cpu_relax(); | ||
| 231 | |||
| 232 | if (time_after(jiffies, timeout)) | ||
| 233 | expired = true; | ||
| 234 | } | ||
| 235 | 228 | ||
| 236 | val &= ~PWR_CLK_DIS_BIT; | 229 | val &= ~PWR_CLK_DIS_BIT; |
| 237 | writel(val, ctl_addr); | 230 | writel(val, ctl_addr); |
| @@ -245,20 +238,20 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) | |||
| 245 | val &= ~scpd->data->sram_pdn_bits; | 238 | val &= ~scpd->data->sram_pdn_bits; |
| 246 | writel(val, ctl_addr); | 239 | writel(val, ctl_addr); |
| 247 | 240 | ||
| 248 | /* wait until SRAM_PDN_ACK all 0 */ | 241 | /* Either wait until SRAM_PDN_ACK all 0 or have a force wait */ |
| 249 | timeout = jiffies + HZ; | 242 | if (MTK_SCPD_CAPS(scpd, MTK_SCPD_FWAIT_SRAM)) { |
| 250 | expired = false; | 243 | /* |
| 251 | while (sram_pdn_ack && (readl(ctl_addr) & sram_pdn_ack)) { | 244 | * Currently, MTK_SCPD_FWAIT_SRAM is necessary only for |
| 245 | * MT7622_POWER_DOMAIN_WB and thus just a trivial setup is | ||
| 246 | * applied here. | ||
| 247 | */ | ||
| 248 | usleep_range(12000, 12100); | ||
| 252 | 249 | ||
| 253 | if (expired) { | 250 | } else { |
| 254 | ret = -ETIMEDOUT; | 251 | ret = readl_poll_timeout(ctl_addr, tmp, (tmp & pdn_ack) == 0, |
| 252 | MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); | ||
| 253 | if (ret < 0) | ||
| 255 | goto err_pwr_ack; | 254 | goto err_pwr_ack; |
| 256 | } | ||
| 257 | |||
| 258 | cpu_relax(); | ||
| 259 | |||
| 260 | if (time_after(jiffies, timeout)) | ||
| 261 | expired = true; | ||
| 262 | } | 255 | } |
| 263 | 256 | ||
| 264 | if (scpd->data->bus_prot_mask) { | 257 | if (scpd->data->bus_prot_mask) { |
| @@ -289,12 +282,10 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) | |||
| 289 | { | 282 | { |
| 290 | struct scp_domain *scpd = container_of(genpd, struct scp_domain, genpd); | 283 | struct scp_domain *scpd = container_of(genpd, struct scp_domain, genpd); |
| 291 | struct scp *scp = scpd->scp; | 284 | struct scp *scp = scpd->scp; |
| 292 | unsigned long timeout; | ||
| 293 | bool expired; | ||
| 294 | void __iomem *ctl_addr = scp->base + scpd->data->ctl_offs; | 285 | void __iomem *ctl_addr = scp->base + scpd->data->ctl_offs; |
| 295 | u32 pdn_ack = scpd->data->sram_pdn_ack_bits; | 286 | u32 pdn_ack = scpd->data->sram_pdn_ack_bits; |
| 296 | u32 val; | 287 | u32 val; |
| 297 | int ret; | 288 | int ret, tmp; |
| 298 | int i; | 289 | int i; |
| 299 | 290 | ||
| 300 | if (scpd->data->bus_prot_mask) { | 291 | if (scpd->data->bus_prot_mask) { |
| @@ -310,19 +301,10 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) | |||
| 310 | writel(val, ctl_addr); | 301 | writel(val, ctl_addr); |
| 311 | 302 | ||
| 312 | /* wait until SRAM_PDN_ACK all 1 */ | 303 | /* wait until SRAM_PDN_ACK all 1 */ |
| 313 | timeout = jiffies + HZ; | 304 | ret = readl_poll_timeout(ctl_addr, tmp, (tmp & pdn_ack) == pdn_ack, |
| 314 | expired = false; | 305 | MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); |
| 315 | while (pdn_ack && (readl(ctl_addr) & pdn_ack) != pdn_ack) { | 306 | if (ret < 0) |
| 316 | if (expired) { | 307 | goto out; |
| 317 | ret = -ETIMEDOUT; | ||
| 318 | goto out; | ||
| 319 | } | ||
| 320 | |||
| 321 | cpu_relax(); | ||
| 322 | |||
| 323 | if (time_after(jiffies, timeout)) | ||
| 324 | expired = true; | ||
| 325 | } | ||
| 326 | 308 | ||
| 327 | val |= PWR_ISO_BIT; | 309 | val |= PWR_ISO_BIT; |
| 328 | writel(val, ctl_addr); | 310 | writel(val, ctl_addr); |
| @@ -340,23 +322,10 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) | |||
| 340 | writel(val, ctl_addr); | 322 | writel(val, ctl_addr); |
| 341 | 323 | ||
| 342 | /* wait until PWR_ACK = 0 */ | 324 | /* wait until PWR_ACK = 0 */ |
| 343 | timeout = jiffies + HZ; | 325 | ret = readx_poll_timeout(scpsys_domain_is_on, scpd, tmp, tmp == 0, |
| 344 | expired = false; | 326 | MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); |
| 345 | while (1) { | 327 | if (ret < 0) |
| 346 | ret = scpsys_domain_is_on(scpd); | 328 | goto out; |
| 347 | if (ret == 0) | ||
| 348 | break; | ||
| 349 | |||
| 350 | if (expired) { | ||
| 351 | ret = -ETIMEDOUT; | ||
| 352 | goto out; | ||
| 353 | } | ||
| 354 | |||
| 355 | cpu_relax(); | ||
| 356 | |||
| 357 | if (time_after(jiffies, timeout)) | ||
| 358 | expired = true; | ||
| 359 | } | ||
| 360 | 329 | ||
| 361 | for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++) | 330 | for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++) |
| 362 | clk_disable_unprepare(scpd->clk[i]); | 331 | clk_disable_unprepare(scpd->clk[i]); |
| @@ -469,7 +438,7 @@ static struct scp *init_scp(struct platform_device *pdev, | |||
| 469 | genpd->name = data->name; | 438 | genpd->name = data->name; |
| 470 | genpd->power_off = scpsys_power_off; | 439 | genpd->power_off = scpsys_power_off; |
| 471 | genpd->power_on = scpsys_power_on; | 440 | genpd->power_on = scpsys_power_on; |
| 472 | if (scpd->data->active_wakeup) | 441 | if (MTK_SCPD_CAPS(scpd, MTK_SCPD_ACTIVE_WAKEUP)) |
| 473 | genpd->flags |= GENPD_FLAG_ACTIVE_WAKEUP; | 442 | genpd->flags |= GENPD_FLAG_ACTIVE_WAKEUP; |
| 474 | } | 443 | } |
| 475 | 444 | ||
| @@ -522,7 +491,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 522 | .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M | | 491 | .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M | |
| 523 | MT2701_TOP_AXI_PROT_EN_CONN_S, | 492 | MT2701_TOP_AXI_PROT_EN_CONN_S, |
| 524 | .clk_id = {CLK_NONE}, | 493 | .clk_id = {CLK_NONE}, |
| 525 | .active_wakeup = true, | 494 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 526 | }, | 495 | }, |
| 527 | [MT2701_POWER_DOMAIN_DISP] = { | 496 | [MT2701_POWER_DOMAIN_DISP] = { |
| 528 | .name = "disp", | 497 | .name = "disp", |
| @@ -531,7 +500,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 531 | .sram_pdn_bits = GENMASK(11, 8), | 500 | .sram_pdn_bits = GENMASK(11, 8), |
| 532 | .clk_id = {CLK_MM}, | 501 | .clk_id = {CLK_MM}, |
| 533 | .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_MM_M0, | 502 | .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_MM_M0, |
| 534 | .active_wakeup = true, | 503 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 535 | }, | 504 | }, |
| 536 | [MT2701_POWER_DOMAIN_MFG] = { | 505 | [MT2701_POWER_DOMAIN_MFG] = { |
| 537 | .name = "mfg", | 506 | .name = "mfg", |
| @@ -540,7 +509,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 540 | .sram_pdn_bits = GENMASK(11, 8), | 509 | .sram_pdn_bits = GENMASK(11, 8), |
| 541 | .sram_pdn_ack_bits = GENMASK(12, 12), | 510 | .sram_pdn_ack_bits = GENMASK(12, 12), |
| 542 | .clk_id = {CLK_MFG}, | 511 | .clk_id = {CLK_MFG}, |
| 543 | .active_wakeup = true, | 512 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 544 | }, | 513 | }, |
| 545 | [MT2701_POWER_DOMAIN_VDEC] = { | 514 | [MT2701_POWER_DOMAIN_VDEC] = { |
| 546 | .name = "vdec", | 515 | .name = "vdec", |
| @@ -549,7 +518,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 549 | .sram_pdn_bits = GENMASK(11, 8), | 518 | .sram_pdn_bits = GENMASK(11, 8), |
| 550 | .sram_pdn_ack_bits = GENMASK(12, 12), | 519 | .sram_pdn_ack_bits = GENMASK(12, 12), |
| 551 | .clk_id = {CLK_MM}, | 520 | .clk_id = {CLK_MM}, |
| 552 | .active_wakeup = true, | 521 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 553 | }, | 522 | }, |
| 554 | [MT2701_POWER_DOMAIN_ISP] = { | 523 | [MT2701_POWER_DOMAIN_ISP] = { |
| 555 | .name = "isp", | 524 | .name = "isp", |
| @@ -558,7 +527,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 558 | .sram_pdn_bits = GENMASK(11, 8), | 527 | .sram_pdn_bits = GENMASK(11, 8), |
| 559 | .sram_pdn_ack_bits = GENMASK(13, 12), | 528 | .sram_pdn_ack_bits = GENMASK(13, 12), |
| 560 | .clk_id = {CLK_MM}, | 529 | .clk_id = {CLK_MM}, |
| 561 | .active_wakeup = true, | 530 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 562 | }, | 531 | }, |
| 563 | [MT2701_POWER_DOMAIN_BDP] = { | 532 | [MT2701_POWER_DOMAIN_BDP] = { |
| 564 | .name = "bdp", | 533 | .name = "bdp", |
| @@ -566,7 +535,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 566 | .ctl_offs = SPM_BDP_PWR_CON, | 535 | .ctl_offs = SPM_BDP_PWR_CON, |
| 567 | .sram_pdn_bits = GENMASK(11, 8), | 536 | .sram_pdn_bits = GENMASK(11, 8), |
| 568 | .clk_id = {CLK_NONE}, | 537 | .clk_id = {CLK_NONE}, |
| 569 | .active_wakeup = true, | 538 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 570 | }, | 539 | }, |
| 571 | [MT2701_POWER_DOMAIN_ETH] = { | 540 | [MT2701_POWER_DOMAIN_ETH] = { |
| 572 | .name = "eth", | 541 | .name = "eth", |
| @@ -575,7 +544,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 575 | .sram_pdn_bits = GENMASK(11, 8), | 544 | .sram_pdn_bits = GENMASK(11, 8), |
| 576 | .sram_pdn_ack_bits = GENMASK(15, 12), | 545 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 577 | .clk_id = {CLK_ETHIF}, | 546 | .clk_id = {CLK_ETHIF}, |
| 578 | .active_wakeup = true, | 547 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 579 | }, | 548 | }, |
| 580 | [MT2701_POWER_DOMAIN_HIF] = { | 549 | [MT2701_POWER_DOMAIN_HIF] = { |
| 581 | .name = "hif", | 550 | .name = "hif", |
| @@ -584,14 +553,14 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = { | |||
| 584 | .sram_pdn_bits = GENMASK(11, 8), | 553 | .sram_pdn_bits = GENMASK(11, 8), |
| 585 | .sram_pdn_ack_bits = GENMASK(15, 12), | 554 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 586 | .clk_id = {CLK_ETHIF}, | 555 | .clk_id = {CLK_ETHIF}, |
| 587 | .active_wakeup = true, | 556 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 588 | }, | 557 | }, |
| 589 | [MT2701_POWER_DOMAIN_IFR_MSC] = { | 558 | [MT2701_POWER_DOMAIN_IFR_MSC] = { |
| 590 | .name = "ifr_msc", | 559 | .name = "ifr_msc", |
| 591 | .sta_mask = PWR_STATUS_IFR_MSC, | 560 | .sta_mask = PWR_STATUS_IFR_MSC, |
| 592 | .ctl_offs = SPM_IFR_MSC_PWR_CON, | 561 | .ctl_offs = SPM_IFR_MSC_PWR_CON, |
| 593 | .clk_id = {CLK_NONE}, | 562 | .clk_id = {CLK_NONE}, |
| 594 | .active_wakeup = true, | 563 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 595 | }, | 564 | }, |
| 596 | }; | 565 | }; |
| 597 | 566 | ||
| @@ -606,7 +575,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 606 | .sram_pdn_bits = GENMASK(8, 8), | 575 | .sram_pdn_bits = GENMASK(8, 8), |
| 607 | .sram_pdn_ack_bits = GENMASK(12, 12), | 576 | .sram_pdn_ack_bits = GENMASK(12, 12), |
| 608 | .clk_id = {CLK_MM}, | 577 | .clk_id = {CLK_MM}, |
| 609 | .active_wakeup = true, | 578 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 610 | }, | 579 | }, |
| 611 | [MT2712_POWER_DOMAIN_VDEC] = { | 580 | [MT2712_POWER_DOMAIN_VDEC] = { |
| 612 | .name = "vdec", | 581 | .name = "vdec", |
| @@ -615,7 +584,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 615 | .sram_pdn_bits = GENMASK(8, 8), | 584 | .sram_pdn_bits = GENMASK(8, 8), |
| 616 | .sram_pdn_ack_bits = GENMASK(12, 12), | 585 | .sram_pdn_ack_bits = GENMASK(12, 12), |
| 617 | .clk_id = {CLK_MM, CLK_VDEC}, | 586 | .clk_id = {CLK_MM, CLK_VDEC}, |
| 618 | .active_wakeup = true, | 587 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 619 | }, | 588 | }, |
| 620 | [MT2712_POWER_DOMAIN_VENC] = { | 589 | [MT2712_POWER_DOMAIN_VENC] = { |
| 621 | .name = "venc", | 590 | .name = "venc", |
| @@ -624,7 +593,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 624 | .sram_pdn_bits = GENMASK(11, 8), | 593 | .sram_pdn_bits = GENMASK(11, 8), |
| 625 | .sram_pdn_ack_bits = GENMASK(15, 12), | 594 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 626 | .clk_id = {CLK_MM, CLK_VENC, CLK_JPGDEC}, | 595 | .clk_id = {CLK_MM, CLK_VENC, CLK_JPGDEC}, |
| 627 | .active_wakeup = true, | 596 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 628 | }, | 597 | }, |
| 629 | [MT2712_POWER_DOMAIN_ISP] = { | 598 | [MT2712_POWER_DOMAIN_ISP] = { |
| 630 | .name = "isp", | 599 | .name = "isp", |
| @@ -633,7 +602,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 633 | .sram_pdn_bits = GENMASK(11, 8), | 602 | .sram_pdn_bits = GENMASK(11, 8), |
| 634 | .sram_pdn_ack_bits = GENMASK(13, 12), | 603 | .sram_pdn_ack_bits = GENMASK(13, 12), |
| 635 | .clk_id = {CLK_MM}, | 604 | .clk_id = {CLK_MM}, |
| 636 | .active_wakeup = true, | 605 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 637 | }, | 606 | }, |
| 638 | [MT2712_POWER_DOMAIN_AUDIO] = { | 607 | [MT2712_POWER_DOMAIN_AUDIO] = { |
| 639 | .name = "audio", | 608 | .name = "audio", |
| @@ -642,7 +611,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 642 | .sram_pdn_bits = GENMASK(11, 8), | 611 | .sram_pdn_bits = GENMASK(11, 8), |
| 643 | .sram_pdn_ack_bits = GENMASK(15, 12), | 612 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 644 | .clk_id = {CLK_AUDIO}, | 613 | .clk_id = {CLK_AUDIO}, |
| 645 | .active_wakeup = true, | 614 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 646 | }, | 615 | }, |
| 647 | [MT2712_POWER_DOMAIN_USB] = { | 616 | [MT2712_POWER_DOMAIN_USB] = { |
| 648 | .name = "usb", | 617 | .name = "usb", |
| @@ -651,7 +620,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 651 | .sram_pdn_bits = GENMASK(10, 8), | 620 | .sram_pdn_bits = GENMASK(10, 8), |
| 652 | .sram_pdn_ack_bits = GENMASK(14, 12), | 621 | .sram_pdn_ack_bits = GENMASK(14, 12), |
| 653 | .clk_id = {CLK_NONE}, | 622 | .clk_id = {CLK_NONE}, |
| 654 | .active_wakeup = true, | 623 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 655 | }, | 624 | }, |
| 656 | [MT2712_POWER_DOMAIN_USB2] = { | 625 | [MT2712_POWER_DOMAIN_USB2] = { |
| 657 | .name = "usb2", | 626 | .name = "usb2", |
| @@ -660,7 +629,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 660 | .sram_pdn_bits = GENMASK(10, 8), | 629 | .sram_pdn_bits = GENMASK(10, 8), |
| 661 | .sram_pdn_ack_bits = GENMASK(14, 12), | 630 | .sram_pdn_ack_bits = GENMASK(14, 12), |
| 662 | .clk_id = {CLK_NONE}, | 631 | .clk_id = {CLK_NONE}, |
| 663 | .active_wakeup = true, | 632 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 664 | }, | 633 | }, |
| 665 | [MT2712_POWER_DOMAIN_MFG] = { | 634 | [MT2712_POWER_DOMAIN_MFG] = { |
| 666 | .name = "mfg", | 635 | .name = "mfg", |
| @@ -670,7 +639,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 670 | .sram_pdn_ack_bits = GENMASK(16, 16), | 639 | .sram_pdn_ack_bits = GENMASK(16, 16), |
| 671 | .clk_id = {CLK_MFG}, | 640 | .clk_id = {CLK_MFG}, |
| 672 | .bus_prot_mask = BIT(14) | BIT(21) | BIT(23), | 641 | .bus_prot_mask = BIT(14) | BIT(21) | BIT(23), |
| 673 | .active_wakeup = true, | 642 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 674 | }, | 643 | }, |
| 675 | [MT2712_POWER_DOMAIN_MFG_SC1] = { | 644 | [MT2712_POWER_DOMAIN_MFG_SC1] = { |
| 676 | .name = "mfg_sc1", | 645 | .name = "mfg_sc1", |
| @@ -679,7 +648,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 679 | .sram_pdn_bits = GENMASK(8, 8), | 648 | .sram_pdn_bits = GENMASK(8, 8), |
| 680 | .sram_pdn_ack_bits = GENMASK(16, 16), | 649 | .sram_pdn_ack_bits = GENMASK(16, 16), |
| 681 | .clk_id = {CLK_NONE}, | 650 | .clk_id = {CLK_NONE}, |
| 682 | .active_wakeup = true, | 651 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 683 | }, | 652 | }, |
| 684 | [MT2712_POWER_DOMAIN_MFG_SC2] = { | 653 | [MT2712_POWER_DOMAIN_MFG_SC2] = { |
| 685 | .name = "mfg_sc2", | 654 | .name = "mfg_sc2", |
| @@ -688,7 +657,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 688 | .sram_pdn_bits = GENMASK(8, 8), | 657 | .sram_pdn_bits = GENMASK(8, 8), |
| 689 | .sram_pdn_ack_bits = GENMASK(16, 16), | 658 | .sram_pdn_ack_bits = GENMASK(16, 16), |
| 690 | .clk_id = {CLK_NONE}, | 659 | .clk_id = {CLK_NONE}, |
| 691 | .active_wakeup = true, | 660 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 692 | }, | 661 | }, |
| 693 | [MT2712_POWER_DOMAIN_MFG_SC3] = { | 662 | [MT2712_POWER_DOMAIN_MFG_SC3] = { |
| 694 | .name = "mfg_sc3", | 663 | .name = "mfg_sc3", |
| @@ -697,7 +666,7 @@ static const struct scp_domain_data scp_domain_data_mt2712[] = { | |||
| 697 | .sram_pdn_bits = GENMASK(8, 8), | 666 | .sram_pdn_bits = GENMASK(8, 8), |
| 698 | .sram_pdn_ack_bits = GENMASK(16, 16), | 667 | .sram_pdn_ack_bits = GENMASK(16, 16), |
| 699 | .clk_id = {CLK_NONE}, | 668 | .clk_id = {CLK_NONE}, |
| 700 | .active_wakeup = true, | 669 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 701 | }, | 670 | }, |
| 702 | }; | 671 | }; |
| 703 | 672 | ||
| @@ -797,7 +766,7 @@ static const struct scp_domain_data scp_domain_data_mt7622[] = { | |||
| 797 | .sram_pdn_ack_bits = GENMASK(15, 12), | 766 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 798 | .clk_id = {CLK_NONE}, | 767 | .clk_id = {CLK_NONE}, |
| 799 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_ETHSYS, | 768 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_ETHSYS, |
| 800 | .active_wakeup = true, | 769 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 801 | }, | 770 | }, |
| 802 | [MT7622_POWER_DOMAIN_HIF0] = { | 771 | [MT7622_POWER_DOMAIN_HIF0] = { |
| 803 | .name = "hif0", | 772 | .name = "hif0", |
| @@ -807,7 +776,7 @@ static const struct scp_domain_data scp_domain_data_mt7622[] = { | |||
| 807 | .sram_pdn_ack_bits = GENMASK(15, 12), | 776 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 808 | .clk_id = {CLK_HIFSEL}, | 777 | .clk_id = {CLK_HIFSEL}, |
| 809 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_HIF0, | 778 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_HIF0, |
| 810 | .active_wakeup = true, | 779 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 811 | }, | 780 | }, |
| 812 | [MT7622_POWER_DOMAIN_HIF1] = { | 781 | [MT7622_POWER_DOMAIN_HIF1] = { |
| 813 | .name = "hif1", | 782 | .name = "hif1", |
| @@ -817,7 +786,7 @@ static const struct scp_domain_data scp_domain_data_mt7622[] = { | |||
| 817 | .sram_pdn_ack_bits = GENMASK(15, 12), | 786 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 818 | .clk_id = {CLK_HIFSEL}, | 787 | .clk_id = {CLK_HIFSEL}, |
| 819 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_HIF1, | 788 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_HIF1, |
| 820 | .active_wakeup = true, | 789 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 821 | }, | 790 | }, |
| 822 | [MT7622_POWER_DOMAIN_WB] = { | 791 | [MT7622_POWER_DOMAIN_WB] = { |
| 823 | .name = "wb", | 792 | .name = "wb", |
| @@ -827,7 +796,7 @@ static const struct scp_domain_data scp_domain_data_mt7622[] = { | |||
| 827 | .sram_pdn_ack_bits = 0, | 796 | .sram_pdn_ack_bits = 0, |
| 828 | .clk_id = {CLK_NONE}, | 797 | .clk_id = {CLK_NONE}, |
| 829 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_WB, | 798 | .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_WB, |
| 830 | .active_wakeup = true, | 799 | .caps = MTK_SCPD_ACTIVE_WAKEUP | MTK_SCPD_FWAIT_SRAM, |
| 831 | }, | 800 | }, |
| 832 | }; | 801 | }; |
| 833 | 802 | ||
| @@ -843,7 +812,7 @@ static const struct scp_domain_data scp_domain_data_mt7623a[] = { | |||
| 843 | .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M | | 812 | .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M | |
| 844 | MT2701_TOP_AXI_PROT_EN_CONN_S, | 813 | MT2701_TOP_AXI_PROT_EN_CONN_S, |
| 845 | .clk_id = {CLK_NONE}, | 814 | .clk_id = {CLK_NONE}, |
| 846 | .active_wakeup = true, | 815 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 847 | }, | 816 | }, |
| 848 | [MT7623A_POWER_DOMAIN_ETH] = { | 817 | [MT7623A_POWER_DOMAIN_ETH] = { |
| 849 | .name = "eth", | 818 | .name = "eth", |
| @@ -852,7 +821,7 @@ static const struct scp_domain_data scp_domain_data_mt7623a[] = { | |||
| 852 | .sram_pdn_bits = GENMASK(11, 8), | 821 | .sram_pdn_bits = GENMASK(11, 8), |
| 853 | .sram_pdn_ack_bits = GENMASK(15, 12), | 822 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 854 | .clk_id = {CLK_ETHIF}, | 823 | .clk_id = {CLK_ETHIF}, |
| 855 | .active_wakeup = true, | 824 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 856 | }, | 825 | }, |
| 857 | [MT7623A_POWER_DOMAIN_HIF] = { | 826 | [MT7623A_POWER_DOMAIN_HIF] = { |
| 858 | .name = "hif", | 827 | .name = "hif", |
| @@ -861,14 +830,14 @@ static const struct scp_domain_data scp_domain_data_mt7623a[] = { | |||
| 861 | .sram_pdn_bits = GENMASK(11, 8), | 830 | .sram_pdn_bits = GENMASK(11, 8), |
| 862 | .sram_pdn_ack_bits = GENMASK(15, 12), | 831 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 863 | .clk_id = {CLK_ETHIF}, | 832 | .clk_id = {CLK_ETHIF}, |
| 864 | .active_wakeup = true, | 833 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 865 | }, | 834 | }, |
| 866 | [MT7623A_POWER_DOMAIN_IFR_MSC] = { | 835 | [MT7623A_POWER_DOMAIN_IFR_MSC] = { |
| 867 | .name = "ifr_msc", | 836 | .name = "ifr_msc", |
| 868 | .sta_mask = PWR_STATUS_IFR_MSC, | 837 | .sta_mask = PWR_STATUS_IFR_MSC, |
| 869 | .ctl_offs = SPM_IFR_MSC_PWR_CON, | 838 | .ctl_offs = SPM_IFR_MSC_PWR_CON, |
| 870 | .clk_id = {CLK_NONE}, | 839 | .clk_id = {CLK_NONE}, |
| 871 | .active_wakeup = true, | 840 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 872 | }, | 841 | }, |
| 873 | }; | 842 | }; |
| 874 | 843 | ||
| @@ -934,7 +903,7 @@ static const struct scp_domain_data scp_domain_data_mt8173[] = { | |||
| 934 | .sram_pdn_bits = GENMASK(11, 8), | 903 | .sram_pdn_bits = GENMASK(11, 8), |
| 935 | .sram_pdn_ack_bits = GENMASK(15, 12), | 904 | .sram_pdn_ack_bits = GENMASK(15, 12), |
| 936 | .clk_id = {CLK_NONE}, | 905 | .clk_id = {CLK_NONE}, |
| 937 | .active_wakeup = true, | 906 | .caps = MTK_SCPD_ACTIVE_WAKEUP, |
| 938 | }, | 907 | }, |
| 939 | [MT8173_POWER_DOMAIN_MFG_ASYNC] = { | 908 | [MT8173_POWER_DOMAIN_MFG_ASYNC] = { |
| 940 | .name = "mfg_async", | 909 | .name = "mfg_async", |
| @@ -1067,15 +1036,13 @@ static const struct of_device_id of_scpsys_match_tbl[] = { | |||
| 1067 | 1036 | ||
| 1068 | static int scpsys_probe(struct platform_device *pdev) | 1037 | static int scpsys_probe(struct platform_device *pdev) |
| 1069 | { | 1038 | { |
| 1070 | const struct of_device_id *match; | ||
| 1071 | const struct scp_subdomain *sd; | 1039 | const struct scp_subdomain *sd; |
| 1072 | const struct scp_soc_data *soc; | 1040 | const struct scp_soc_data *soc; |
| 1073 | struct scp *scp; | 1041 | struct scp *scp; |
| 1074 | struct genpd_onecell_data *pd_data; | 1042 | struct genpd_onecell_data *pd_data; |
| 1075 | int i, ret; | 1043 | int i, ret; |
| 1076 | 1044 | ||
| 1077 | match = of_match_device(of_scpsys_match_tbl, &pdev->dev); | 1045 | soc = of_device_get_match_data(&pdev->dev); |
| 1078 | soc = (const struct scp_soc_data *)match->data; | ||
| 1079 | 1046 | ||
| 1080 | scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs, | 1047 | scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs, |
| 1081 | soc->bus_prot_reg_update); | 1048 | soc->bus_prot_reg_update); |
diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 5f7ad0552c03..b6865f070464 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | 15 | ||
| 16 | #include <linux/list.h> | 16 | #include <linux/list.h> |
| 17 | #include <linux/rbtree.h> | 17 | #include <linux/rbtree.h> |
| 18 | #include <linux/ktime.h> | ||
| 18 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
| 19 | #include <linux/err.h> | 20 | #include <linux/err.h> |
| 20 | #include <linux/bug.h> | 21 | #include <linux/bug.h> |
