4 files changed, 29 insertions, 15 deletions

diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c
index dc4c227732bd..026a26bb702d 100644
--- a/drivers/clk/rockchip/clk-mmc-phase.c
+++ b/drivers/clk/rockchip/clk-mmc-phase.c
@@ -170,18 +170,30 @@ static int rockchip_mmc_clk_rate_notify(struct notifier_block *nb,
                                         unsigned long event, void *data)
 {
         struct rockchip_mmc_clock *mmc_clock = to_rockchip_mmc_clock(nb);
+        struct clk_notifier_data *ndata = data;
 
         /*
          * rockchip_mmc_clk is mostly used by mmc controllers to sample
          * the intput data, which expects the fixed phase after the tuning
          * process. However if the clock rate is changed, the phase is stale
          * and may break the data sampling. So here we try to restore the phase
-         * for that case.
+         * for that case, except that
+         * (1) cached_phase is invaild since we inevitably cached it when the
+         * clock provider be reparented from orphan to its real parent in the
+         * first place. Otherwise we may mess up the initialization of MMC cards
+         * since we only set the default sample phase and drive phase later on.
+         * (2) the new coming rate is higher than the older one since mmc driver
+         * set the max-frequency to match the boards' ability but we can't go
+         * over the heads of that, otherwise the tests smoke out the issue.
          */
+        if (ndata->old_rate <= ndata->new_rate)
+                return NOTIFY_DONE;
+
         if (event == PRE_RATE_CHANGE)
                 mmc_clock->cached_phase =
                         rockchip_mmc_get_phase(&mmc_clock->hw);
-        else if (event == POST_RATE_CHANGE)
+        else if (mmc_clock->cached_phase != -EINVAL &&
+                 event == POST_RATE_CHANGE)
                 rockchip_mmc_set_phase(&mmc_clock->hw, mmc_clock->cached_phase);
 
         return NOTIFY_DONE;
@@ -211,8 +223,10 @@ struct clk *rockchip_clk_register_mmc(const char *name,
         mmc_clock->shift = shift;
 
         clk = clk_register(NULL, &mmc_clock->hw);
-        if (IS_ERR(clk))
+        if (IS_ERR(clk)) {
+                ret = PTR_ERR(clk);
                 goto err_register;
+        }
 
         mmc_clock->clk_rate_change_nb.notifier_call =
                                 &rockchip_mmc_clk_rate_notify;
@@ -225,5 +239,5 @@ err_notifier:
         clk_unregister(clk);
 err_register:
         kfree(mmc_clock);
-        return clk;
+        return ERR_PTR(ret);
 }
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 11e7f2d1c054..7af48184b022 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -387,7 +387,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
                         RK2928_CLKSEL_CON(23), 5, 2, MFLAGS, 0, 6, DFLAGS,
                         RK2928_CLKGATE_CON(2), 15, GFLAGS),
 
-        COMPOSITE(SCLK_SDMMC, "sclk_sdmmc0", mux_mmc_src_p, 0,
+        COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0,
                         RK2928_CLKSEL_CON(11), 8, 2, MFLAGS, 0, 8, DFLAGS,
                         RK2928_CLKGATE_CON(2), 11, GFLAGS),
 
diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c
index f680b421b6d5..252366a5231f 100644
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
@@ -810,24 +810,24 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
         GATE(0, "pclk_phy_niu", "pclk_phy_pre", 0, RK3328_CLKGATE_CON(15), 15, GFLAGS),
 
         /* PD_MMC */
-        MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc",
+        MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "clk_sdmmc",
             RK3328_SDMMC_CON0, 1),
-        MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc",
+        MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "clk_sdmmc",
             RK3328_SDMMC_CON1, 1),
 
-        MMC(SCLK_SDIO_DRV, "sdio_drv", "sclk_sdio",
+        MMC(SCLK_SDIO_DRV, "sdio_drv", "clk_sdio",
             RK3328_SDIO_CON0, 1),
-        MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio",
+        MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "clk_sdio",
             RK3328_SDIO_CON1, 1),
 
-        MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc",
+        MMC(SCLK_EMMC_DRV, "emmc_drv", "clk_emmc",
             RK3328_EMMC_CON0, 1),
-        MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc",
+        MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "clk_emmc",
             RK3328_EMMC_CON1, 1),
 
-        MMC(SCLK_SDMMC_EXT_DRV, "sdmmc_ext_drv", "sclk_sdmmc_ext",
+        MMC(SCLK_SDMMC_EXT_DRV, "sdmmc_ext_drv", "clk_sdmmc_ext",
             RK3328_SDMMC_EXT_CON0, 1),
-        MMC(SCLK_SDMMC_EXT_SAMPLE, "sdmmc_ext_sample", "sclk_sdmmc_ext",
+        MMC(SCLK_SDMMC_EXT_SAMPLE, "sdmmc_ext_sample", "clk_sdmmc_ext",
             RK3328_SDMMC_EXT_CON1, 1),
 };
 
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 3e57c6eef93d..bca10d618f0a 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -671,7 +671,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
                         RK3399_CLKGATE_CON(9), 7, GFLAGS,
                         &rk3399_uart3_fracmux),
 
-        COMPOSITE(0, "pclk_ddr", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
+        COMPOSITE(PCLK_DDR, "pclk_ddr", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
                         RK3399_CLKSEL_CON(6), 15, 1, MFLAGS, 8, 5, DFLAGS,
                         RK3399_CLKGATE_CON(3), 4, GFLAGS),
 
@@ -887,7 +887,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
                         RK3399_CLKGATE_CON(31), 8, GFLAGS),
 
         /* sdio & sdmmc */
-        COMPOSITE(0, "hclk_sd", mux_pll_src_cpll_gpll_p, 0,
+        COMPOSITE(HCLK_SD, "hclk_sd", mux_pll_src_cpll_gpll_p, 0,
                         RK3399_CLKSEL_CON(13), 15, 1, MFLAGS, 8, 5, DFLAGS,
                         RK3399_CLKGATE_CON(12), 13, GFLAGS),
         GATE(HCLK_SDMMC, "hclk_sdmmc", "hclk_sd", 0,