2 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 117ec11ef304..ffd1d8d10bdf 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -1158,7 +1158,7 @@ static bool CalculatePrefetchSchedule(
                else if (PageTableLevels == 3)
                        *Tno_bw = UrgentExtraLatency;
                else
-                        Tno_bw = 0;
+                        *Tno_bw = 0;
        } else if (DCCEnable)
                *Tno_bw = LineTime;
        else
@@ -4721,14 +4721,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_
                                        && mode_lib->vba.SwathWidthYSingleDPP[k]
                                                        <= mode_lib->vba.MaximumSwathWidth[k]
                                        && mode_lib->vba.ODMCombineEnablePerState[i][k] == false) {
-                                mode_lib->vba.NoOfDPP[i][k] = 1.0;
+                                mode_lib->vba.NoOfDPP[i][k] = 1;
                                mode_lib->vba.RequiredDPPCLK[i][k] =
                                                mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
                                                                * (1.0
                                                                                + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
                                                                                                / 100.0);
                        } else {
-                                mode_lib->vba.NoOfDPP[i][k] = 2.0;
+                                mode_lib->vba.NoOfDPP[i][k] = 2;
                                mode_lib->vba.RequiredDPPCLK[i][k] =
                                                mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
                                                                * (1.0
@@ -4790,14 +4790,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_
                                                                <= mode_lib->vba.MaximumSwathWidth[k]
                                                && mode_lib->vba.ODMCombineEnablePerState[i][k]
                                                                == false) {
-                                        mode_lib->vba.NoOfDPP[i][k] = 1.0;
+                                        mode_lib->vba.NoOfDPP[i][k] = 1;
                                        mode_lib->vba.RequiredDPPCLK[i][k] =
                                                        mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
                                                                        * (1.0
                                                                                        + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
                                                                                                        / 100.0);
                                } else {
-                                        mode_lib->vba.NoOfDPP[i][k] = 2.0;
+                                        mode_lib->vba.NoOfDPP[i][k] = 2;
                                        mode_lib->vba.RequiredDPPCLK[i][k] =
                                                        mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
                                                                        * (1.0
@@ -4833,14 +4833,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_
                                mode_lib->vba.ODMCombineEnablePerState[i][k] = false;
                                if (mode_lib->vba.SwathWidthYSingleDPP[k]
                                                <= mode_lib->vba.MaximumSwathWidth[k]) {
-                                        mode_lib->vba.NoOfDPP[i][k] = 1.0;
+                                        mode_lib->vba.NoOfDPP[i][k] = 1;
                                        mode_lib->vba.RequiredDPPCLK[i][k] =
                                                        mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
                                                                        * (1.0
                                                                                        + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
                                                                                                        / 100.0);
                                } else {
-                                        mode_lib->vba.NoOfDPP[i][k] = 2.0;
+                                        mode_lib->vba.NoOfDPP[i][k] = 2;
                                        mode_lib->vba.RequiredDPPCLK[i][k] =
                                                        mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
                                                                        * (1.0
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 63ad4a7bfeb5..4b8c1b911f17 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -489,7 +489,7 @@ struct vba_vars_st {
        double CursorBufferSize;
        double CursorChunkSize;
        unsigned int Mode;
-        double NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
+        unsigned int NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
        double OutputLinkDPLanes[DC__NUM_DPP__MAX];
        double SwathWidthYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
        double SwathHeightYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];

diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c index 117ec11ef304..ffd1d8d10bdf 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -1158,7 +1158,7 @@ static bool CalculatePrefetchSchedule(
1158	else if (PageTableLevels == 3)	1158	else if (PageTableLevels == 3)
1159	*Tno_bw = UrgentExtraLatency;	1159	*Tno_bw = UrgentExtraLatency;
1160	else	1160	else
1161	Tno_bw = 0;	1161	*Tno_bw = 0;
1162	} else if (DCCEnable)	1162	} else if (DCCEnable)
1163	*Tno_bw = LineTime;	1163	*Tno_bw = LineTime;
1164	else	1164	else
@@ -4721,14 +4721,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_
4721	&& mode_lib->vba.SwathWidthYSingleDPP[k]	4721	&& mode_lib->vba.SwathWidthYSingleDPP[k]
4722	<= mode_lib->vba.MaximumSwathWidth[k]	4722	<= mode_lib->vba.MaximumSwathWidth[k]
4723	&& mode_lib->vba.ODMCombineEnablePerState[i][k] == false) {	4723	&& mode_lib->vba.ODMCombineEnablePerState[i][k] == false) {
4724	mode_lib->vba.NoOfDPP[i][k] = 1.0;	4724	mode_lib->vba.NoOfDPP[i][k] = 1;
4725	mode_lib->vba.RequiredDPPCLK[i][k] =	4725	mode_lib->vba.RequiredDPPCLK[i][k] =
4726	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]	4726	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
4727	* (1.0	4727	* (1.0
4728	+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading	4728	+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
4729	/ 100.0);	4729	/ 100.0);
4730	} else {	4730	} else {
4731	mode_lib->vba.NoOfDPP[i][k] = 2.0;	4731	mode_lib->vba.NoOfDPP[i][k] = 2;
4732	mode_lib->vba.RequiredDPPCLK[i][k] =	4732	mode_lib->vba.RequiredDPPCLK[i][k] =
4733	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]	4733	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
4734	* (1.0	4734	* (1.0
@@ -4790,14 +4790,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_
4790	<= mode_lib->vba.MaximumSwathWidth[k]	4790	<= mode_lib->vba.MaximumSwathWidth[k]
4791	&& mode_lib->vba.ODMCombineEnablePerState[i][k]	4791	&& mode_lib->vba.ODMCombineEnablePerState[i][k]
4792	== false) {	4792	== false) {
4793	mode_lib->vba.NoOfDPP[i][k] = 1.0;	4793	mode_lib->vba.NoOfDPP[i][k] = 1;
4794	mode_lib->vba.RequiredDPPCLK[i][k] =	4794	mode_lib->vba.RequiredDPPCLK[i][k] =
4795	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]	4795	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
4796	* (1.0	4796	* (1.0
4797	+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading	4797	+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
4798	/ 100.0);	4798	/ 100.0);
4799	} else {	4799	} else {
4800	mode_lib->vba.NoOfDPP[i][k] = 2.0;	4800	mode_lib->vba.NoOfDPP[i][k] = 2;
4801	mode_lib->vba.RequiredDPPCLK[i][k] =	4801	mode_lib->vba.RequiredDPPCLK[i][k] =
4802	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]	4802	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
4803	* (1.0	4803	* (1.0
@@ -4833,14 +4833,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_
4833	mode_lib->vba.ODMCombineEnablePerState[i][k] = false;	4833	mode_lib->vba.ODMCombineEnablePerState[i][k] = false;
4834	if (mode_lib->vba.SwathWidthYSingleDPP[k]	4834	if (mode_lib->vba.SwathWidthYSingleDPP[k]
4835	<= mode_lib->vba.MaximumSwathWidth[k]) {	4835	<= mode_lib->vba.MaximumSwathWidth[k]) {
4836	mode_lib->vba.NoOfDPP[i][k] = 1.0;	4836	mode_lib->vba.NoOfDPP[i][k] = 1;
4837	mode_lib->vba.RequiredDPPCLK[i][k] =	4837	mode_lib->vba.RequiredDPPCLK[i][k] =
4838	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]	4838	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
4839	* (1.0	4839	* (1.0
4840	+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading	4840	+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
4841	/ 100.0);	4841	/ 100.0);
4842	} else {	4842	} else {
4843	mode_lib->vba.NoOfDPP[i][k] = 2.0;	4843	mode_lib->vba.NoOfDPP[i][k] = 2;
4844	mode_lib->vba.RequiredDPPCLK[i][k] =	4844	mode_lib->vba.RequiredDPPCLK[i][k] =
4845	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]	4845	mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
4846	* (1.0	4846	* (1.0


diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h index 63ad4a7bfeb5..4b8c1b911f17 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -489,7 +489,7 @@ struct vba_vars_st {
489	double CursorBufferSize;	489	double CursorBufferSize;
490	double CursorChunkSize;	490	double CursorChunkSize;
491	unsigned int Mode;	491	unsigned int Mode;
492	double NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];	492	unsigned int NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
493	double OutputLinkDPLanes[DC__NUM_DPP__MAX];	493	double OutputLinkDPLanes[DC__NUM_DPP__MAX];
494	double SwathWidthYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];	494	double SwathWidthYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
495	double SwathHeightYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];	495	double SwathHeightYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];