4 files changed, 31 insertions, 31 deletions

diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index d4375dadd4e9..10f67d39cac5 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -239,14 +239,6 @@ static int perf_iommu_event_init(struct perf_event *event)
                 return -EINVAL;
         }
 
-        /* integrate with iommu base devid (0000), assume one iommu */
-        perf_iommu->max_banks =
-                amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID);
-        perf_iommu->max_counters =
-                amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID);
-        if ((perf_iommu->max_banks == 0) || (perf_iommu->max_counters == 0))
-                return -EINVAL;
-
         /* update the hw_perf_event struct with the iommu config data */
         hwc->config = config;
         hwc->extra_reg.config = config1;
@@ -448,6 +440,11 @@ static __init int _init_perf_amd_iommu(
                 return ret;
         }
 
+        perf_iommu->max_banks    = amd_iommu_pc_get_max_banks(0);
+        perf_iommu->max_counters = amd_iommu_pc_get_max_counters(0);
+        if (!perf_iommu->max_banks || !perf_iommu->max_counters)
+                return -EINVAL;
+
         perf_iommu->null_group = NULL;
         perf_iommu->pmu.attr_groups = perf_iommu->attr_groups;
 
@@ -457,8 +454,8 @@ static __init int _init_perf_amd_iommu(
                 amd_iommu_pc_exit();
         } else {
                 pr_info("Detected AMD IOMMU (%d banks, %d counters/bank).\n",
-                        amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID),
-                        amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID));
+                        amd_iommu_pc_get_max_banks(0),
+                        amd_iommu_pc_get_max_counters(0));
         }
 
         return ret;
diff --git a/arch/x86/events/amd/iommu.h b/arch/x86/events/amd/iommu.h
index 5c5c9329e571..b775107c221e 100644
--- a/arch/x86/events/amd/iommu.h
+++ b/arch/x86/events/amd/iommu.h
@@ -24,19 +24,18 @@
 #define PC_MAX_SPEC_BNKS                        64
 #define PC_MAX_SPEC_CNTRS                       16
 
-/* iommu pc reg masks*/
-#define IOMMU_BASE_DEVID                        0x0000
-
 /* amd_iommu_init.c external support functions */
 extern int amd_iommu_get_num_iommus(void);
 
 extern bool amd_iommu_pc_supported(void);
 
-extern u8 amd_iommu_pc_get_max_banks(u16 devid);
+extern u8 amd_iommu_pc_get_max_banks(unsigned int idx);
 
-extern u8 amd_iommu_pc_get_max_counters(u16 devid);
+extern u8 amd_iommu_pc_get_max_counters(unsigned int idx);
 
 extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr,
                         u8 fxn, u64 *value, bool is_write);
 
+extern struct amd_iommu *get_amd_iommu(int idx);
+
 #endif /*_PERF_EVENT_AMD_IOMMU_H_*/
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index d3ec9c32c446..8fdf109e6109 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -2718,6 +2718,18 @@ bool amd_iommu_v2_supported(void)
 }
 EXPORT_SYMBOL(amd_iommu_v2_supported);
 
+struct amd_iommu *get_amd_iommu(unsigned int idx)
+{
+        unsigned int i = 0;
+        struct amd_iommu *iommu;
+
+        for_each_iommu(iommu)
+                if (i++ == idx)
+                        return iommu;
+        return NULL;
+}
+EXPORT_SYMBOL(get_amd_iommu);
+
 /****************************************************************************
  *
  * IOMMU EFR Performance Counter support functionality. This code allows
@@ -2725,17 +2737,14 @@ EXPORT_SYMBOL(amd_iommu_v2_supported);
  *
  ****************************************************************************/
 
-u8 amd_iommu_pc_get_max_banks(u16 devid)
+u8 amd_iommu_pc_get_max_banks(unsigned int idx)
 {
-        struct amd_iommu *iommu;
-        u8 ret = 0;
+        struct amd_iommu *iommu = get_amd_iommu(idx);
 
-        /* locate the iommu governing the devid */
-        iommu = amd_iommu_rlookup_table[devid];
         if (iommu)
-                ret = iommu->max_banks;
+                return iommu->max_banks;
 
-        return ret;
+        return 0;
 }
 EXPORT_SYMBOL(amd_iommu_pc_get_max_banks);
 
@@ -2745,17 +2754,14 @@ bool amd_iommu_pc_supported(void)
 }
 EXPORT_SYMBOL(amd_iommu_pc_supported);
 
-u8 amd_iommu_pc_get_max_counters(u16 devid)
+u8 amd_iommu_pc_get_max_counters(unsigned int idx)
 {
-        struct amd_iommu *iommu;
-        u8 ret = 0;
+        struct amd_iommu *iommu = get_amd_iommu(idx);
 
-        /* locate the iommu governing the devid */
-        iommu = amd_iommu_rlookup_table[devid];
         if (iommu)
-                ret = iommu->max_counters;
+                return iommu->max_counters;
 
-        return ret;
+        return 0;
 }
 EXPORT_SYMBOL(amd_iommu_pc_get_max_counters);
 
diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h
index e8f0710aceb3..cd2257e20c3f 100644
--- a/drivers/iommu/amd_iommu_proto.h
+++ b/drivers/iommu/amd_iommu_proto.h
@@ -59,8 +59,6 @@ extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
 
 /* IOMMU Performance Counter functions */
 extern bool amd_iommu_pc_supported(void);
-extern u8 amd_iommu_pc_get_max_banks(u16 devid);
-extern u8 amd_iommu_pc_get_max_counters(u16 devid);
 extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn,
                                     u64 *value, bool is_write);