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-rw-r--r--drivers/gpu/drm/i915/intel_display.c31
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h1
2 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 60c1e54285c1..812ec5ae5c7b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2831,6 +2831,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
2831 return; 2831 return;
2832 2832
2833valid_fb: 2833valid_fb:
2834 intel_state->base.rotation = plane_config->rotation;
2834 intel_fill_fb_ggtt_view(&intel_state->view, fb, 2835 intel_fill_fb_ggtt_view(&intel_state->view, fb,
2835 intel_state->base.rotation); 2836 intel_state->base.rotation);
2836 intel_state->color_plane[0].stride = 2837 intel_state->color_plane[0].stride =
@@ -7787,8 +7788,15 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
7787 plane_config->tiling = I915_TILING_X; 7788 plane_config->tiling = I915_TILING_X;
7788 fb->modifier = I915_FORMAT_MOD_X_TILED; 7789 fb->modifier = I915_FORMAT_MOD_X_TILED;
7789 } 7790 }
7791
7792 if (val & DISPPLANE_ROTATE_180)
7793 plane_config->rotation = DRM_MODE_ROTATE_180;
7790 } 7794 }
7791 7795
7796 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B &&
7797 val & DISPPLANE_MIRROR)
7798 plane_config->rotation |= DRM_MODE_REFLECT_X;
7799
7792 pixel_format = val & DISPPLANE_PIXFORMAT_MASK; 7800 pixel_format = val & DISPPLANE_PIXFORMAT_MASK;
7793 fourcc = i9xx_format_to_fourcc(pixel_format); 7801 fourcc = i9xx_format_to_fourcc(pixel_format);
7794 fb->format = drm_format_info(fourcc); 7802 fb->format = drm_format_info(fourcc);
@@ -8898,6 +8906,29 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
8898 goto error; 8906 goto error;
8899 } 8907 }
8900 8908
8909 /*
8910 * DRM_MODE_ROTATE_ is counter clockwise to stay compatible with Xrandr
8911 * while i915 HW rotation is clockwise, thats why this swapping.
8912 */
8913 switch (val & PLANE_CTL_ROTATE_MASK) {
8914 case PLANE_CTL_ROTATE_0:
8915 plane_config->rotation = DRM_MODE_ROTATE_0;
8916 break;
8917 case PLANE_CTL_ROTATE_90:
8918 plane_config->rotation = DRM_MODE_ROTATE_270;
8919 break;
8920 case PLANE_CTL_ROTATE_180:
8921 plane_config->rotation = DRM_MODE_ROTATE_180;
8922 break;
8923 case PLANE_CTL_ROTATE_270:
8924 plane_config->rotation = DRM_MODE_ROTATE_90;
8925 break;
8926 }
8927
8928 if (INTEL_GEN(dev_priv) >= 10 &&
8929 val & PLANE_CTL_FLIP_HORIZONTAL)
8930 plane_config->rotation |= DRM_MODE_REFLECT_X;
8931
8901 base = I915_READ(PLANE_SURF(pipe, plane_id)) & 0xfffff000; 8932 base = I915_READ(PLANE_SURF(pipe, plane_id)) & 0xfffff000;
8902 plane_config->base = base; 8933 plane_config->base = base;
8903 8934
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f575ba2a59da..a7d9ac912125 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -572,6 +572,7 @@ struct intel_initial_plane_config {
572 unsigned int tiling; 572 unsigned int tiling;
573 int size; 573 int size;
574 u32 base; 574 u32 base;
575 u8 rotation;
575}; 576};
576 577
577#define SKL_MIN_SRC_W 8 578#define SKL_MIN_SRC_W 8