diff options
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 23 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 1 |
2 files changed, 23 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c index 12261fbc25e0..e44b8d3d6891 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | |||
@@ -31,6 +31,8 @@ | |||
31 | 31 | ||
32 | #include "resource.h" | 32 | #include "resource.h" |
33 | #include "dcn10/dcn10_resource.h" | 33 | #include "dcn10/dcn10_resource.h" |
34 | #include "dcn10/dcn10_hubbub.h" | ||
35 | |||
34 | #include "dcn_calc_math.h" | 36 | #include "dcn_calc_math.h" |
35 | 37 | ||
36 | #define DC_LOGGER \ | 38 | #define DC_LOGGER \ |
@@ -889,7 +891,26 @@ bool dcn_validate_bandwidth( | |||
889 | ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value | 891 | ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value |
890 | || v->scaler_rec_out_width[input_idx] == v->viewport_height[input_idx]); | 892 | || v->scaler_rec_out_width[input_idx] == v->viewport_height[input_idx]); |
891 | } | 893 | } |
892 | v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no; | 894 | |
895 | if (dc->debug.optimized_watermark) { | ||
896 | /* | ||
897 | * this method requires us to always re-calculate watermark when dcc change | ||
898 | * between flip. | ||
899 | */ | ||
900 | v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no; | ||
901 | } else { | ||
902 | /* | ||
903 | * allow us to disable dcc on the fly without re-calculating WM | ||
904 | * | ||
905 | * extra overhead for DCC is quite small. for 1080p WM without | ||
906 | * DCC is only 0.417us lower (urgent goes from 6.979us to 6.562us) | ||
907 | */ | ||
908 | unsigned int bpe; | ||
909 | |||
910 | v->dcc_enable[input_idx] = dc->res_pool->hubbub->funcs->dcc_support_pixel_format( | ||
911 | pipe->plane_state->format, &bpe) ? dcn_bw_yes : dcn_bw_no; | ||
912 | } | ||
913 | |||
893 | v->source_pixel_format[input_idx] = tl_pixel_format_to_bw_defs( | 914 | v->source_pixel_format[input_idx] = tl_pixel_format_to_bw_defs( |
894 | pipe->plane_state->format); | 915 | pipe->plane_state->format); |
895 | v->source_surface_mode[input_idx] = tl_sw_mode_to_bw_defs( | 916 | v->source_surface_mode[input_idx] = tl_sw_mode_to_bw_defs( |
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 74e6653b9852..0cb7e10d2505 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h | |||
@@ -233,6 +233,7 @@ struct dc_debug { | |||
233 | int urgent_latency_ns; | 233 | int urgent_latency_ns; |
234 | int percent_of_ideal_drambw; | 234 | int percent_of_ideal_drambw; |
235 | int dram_clock_change_latency_ns; | 235 | int dram_clock_change_latency_ns; |
236 | bool optimized_watermark; | ||
236 | int always_scale; | 237 | int always_scale; |
237 | bool disable_pplib_clock_request; | 238 | bool disable_pplib_clock_request; |
238 | bool disable_clock_gate; | 239 | bool disable_clock_gate; |