diff options
| -rw-r--r-- | arch/arm/kernel/hw_breakpoint.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index c9f3f0467570..ab02d8aadb77 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c | |||
| @@ -834,11 +834,11 @@ static void reset_ctrl_regs(void *unused) | |||
| 834 | 834 | ||
| 835 | /* | 835 | /* |
| 836 | * v7 debug contains save and restore registers so that debug state | 836 | * v7 debug contains save and restore registers so that debug state |
| 837 | * can be maintained across low-power modes without leaving | 837 | * can be maintained across low-power modes without leaving the debug |
| 838 | * the debug logic powered up. It is IMPLEMENTATION DEFINED whether | 838 | * logic powered up. It is IMPLEMENTATION DEFINED whether we can access |
| 839 | * we can write to the debug registers out of reset, so we must | 839 | * the debug registers out of reset, so we must unlock the OS Lock |
| 840 | * unlock the OS Lock Access Register to avoid taking undefined | 840 | * Access Register to avoid taking undefined instruction exceptions |
| 841 | * instruction exceptions later on. | 841 | * later on. |
| 842 | */ | 842 | */ |
| 843 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { | 843 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { |
| 844 | /* | 844 | /* |
| @@ -899,18 +899,18 @@ static int __init arch_hw_breakpoint_init(void) | |||
| 899 | pr_info("%d breakpoint(s) reserved for watchpoint " | 899 | pr_info("%d breakpoint(s) reserved for watchpoint " |
| 900 | "single-step.\n", core_num_reserved_brps); | 900 | "single-step.\n", core_num_reserved_brps); |
| 901 | 901 | ||
| 902 | /* | ||
| 903 | * Reset the breakpoint resources. We assume that a halting | ||
| 904 | * debugger will leave the world in a nice state for us. | ||
| 905 | */ | ||
| 906 | on_each_cpu(reset_ctrl_regs, NULL, 1); | ||
| 907 | |||
| 902 | ARM_DBG_READ(c1, 0, dscr); | 908 | ARM_DBG_READ(c1, 0, dscr); |
| 903 | if (dscr & ARM_DSCR_HDBGEN) { | 909 | if (dscr & ARM_DSCR_HDBGEN) { |
| 910 | max_watchpoint_len = 4; | ||
| 904 | pr_warning("halting debug mode enabled. Assuming maximum " | 911 | pr_warning("halting debug mode enabled. Assuming maximum " |
| 905 | "watchpoint size of 4 bytes."); | 912 | "watchpoint size of %u bytes.", max_watchpoint_len); |
| 906 | } else { | 913 | } else { |
| 907 | /* | ||
| 908 | * Reset the breakpoint resources. We assume that a halting | ||
| 909 | * debugger will leave the world in a nice state for us. | ||
| 910 | */ | ||
| 911 | smp_call_function(reset_ctrl_regs, NULL, 1); | ||
| 912 | reset_ctrl_regs(NULL); | ||
| 913 | |||
| 914 | /* Work out the maximum supported watchpoint length. */ | 914 | /* Work out the maximum supported watchpoint length. */ |
| 915 | max_watchpoint_len = get_max_wp_len(); | 915 | max_watchpoint_len = get_max_wp_len(); |
| 916 | pr_info("maximum watchpoint size is %u bytes.\n", | 916 | pr_info("maximum watchpoint size is %u bytes.\n", |
