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-rw-r--r--drivers/gpu/host1x/debug.c14
-rw-r--r--drivers/gpu/host1x/debug.h14
-rw-r--r--drivers/gpu/host1x/hw/debug_hw.c46
-rw-r--r--drivers/gpu/host1x/hw/debug_hw_1x01.c8
-rw-r--r--drivers/gpu/host1x/hw/debug_hw_1x06.c9
5 files changed, 61 insertions, 30 deletions
diff --git a/drivers/gpu/host1x/debug.c b/drivers/gpu/host1x/debug.c
index 2aae0e63214c..dc77ec452ffc 100644
--- a/drivers/gpu/host1x/debug.c
+++ b/drivers/gpu/host1x/debug.c
@@ -40,7 +40,19 @@ void host1x_debug_output(struct output *o, const char *fmt, ...)
40 len = vsnprintf(o->buf, sizeof(o->buf), fmt, args); 40 len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
41 va_end(args); 41 va_end(args);
42 42
43 o->fn(o->ctx, o->buf, len); 43 o->fn(o->ctx, o->buf, len, false);
44}
45
46void host1x_debug_cont(struct output *o, const char *fmt, ...)
47{
48 va_list args;
49 int len;
50
51 va_start(args, fmt);
52 len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
53 va_end(args);
54
55 o->fn(o->ctx, o->buf, len, true);
44} 56}
45 57
46static int show_channel(struct host1x_channel *ch, void *data, bool show_fifo) 58static int show_channel(struct host1x_channel *ch, void *data, bool show_fifo)
diff --git a/drivers/gpu/host1x/debug.h b/drivers/gpu/host1x/debug.h
index 4595b2e0799f..990cce47e737 100644
--- a/drivers/gpu/host1x/debug.h
+++ b/drivers/gpu/host1x/debug.h
@@ -24,22 +24,28 @@
24struct host1x; 24struct host1x;
25 25
26struct output { 26struct output {
27 void (*fn)(void *ctx, const char *str, size_t len); 27 void (*fn)(void *ctx, const char *str, size_t len, bool cont);
28 void *ctx; 28 void *ctx;
29 char buf[256]; 29 char buf[256];
30}; 30};
31 31
32static inline void write_to_seqfile(void *ctx, const char *str, size_t len) 32static inline void write_to_seqfile(void *ctx, const char *str, size_t len,
33 bool cont)
33{ 34{
34 seq_write((struct seq_file *)ctx, str, len); 35 seq_write((struct seq_file *)ctx, str, len);
35} 36}
36 37
37static inline void write_to_printk(void *ctx, const char *str, size_t len) 38static inline void write_to_printk(void *ctx, const char *str, size_t len,
39 bool cont)
38{ 40{
39 pr_info("%s", str); 41 if (cont)
42 pr_cont("%s", str);
43 else
44 pr_info("%s", str);
40} 45}
41 46
42void __printf(2, 3) host1x_debug_output(struct output *o, const char *fmt, ...); 47void __printf(2, 3) host1x_debug_output(struct output *o, const char *fmt, ...);
48void __printf(2, 3) host1x_debug_cont(struct output *o, const char *fmt, ...);
43 49
44extern unsigned int host1x_debug_trace_cmdbuf; 50extern unsigned int host1x_debug_trace_cmdbuf;
45 51
diff --git a/drivers/gpu/host1x/hw/debug_hw.c b/drivers/gpu/host1x/hw/debug_hw.c
index 770d92e62d69..1e67667e308c 100644
--- a/drivers/gpu/host1x/hw/debug_hw.c
+++ b/drivers/gpu/host1x/hw/debug_hw.c
@@ -40,48 +40,59 @@ enum {
40 40
41static unsigned int show_channel_command(struct output *o, u32 val) 41static unsigned int show_channel_command(struct output *o, u32 val)
42{ 42{
43 unsigned int mask, subop; 43 unsigned int mask, subop, num;
44 44
45 switch (val >> 28) { 45 switch (val >> 28) {
46 case HOST1X_OPCODE_SETCLASS: 46 case HOST1X_OPCODE_SETCLASS:
47 mask = val & 0x3f; 47 mask = val & 0x3f;
48 if (mask) { 48 if (mask) {
49 host1x_debug_output(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [", 49 host1x_debug_cont(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [",
50 val >> 6 & 0x3ff, 50 val >> 6 & 0x3ff,
51 val >> 16 & 0xfff, mask); 51 val >> 16 & 0xfff, mask);
52 return hweight8(mask); 52 return hweight8(mask);
53 } 53 }
54 54
55 host1x_debug_output(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff); 55 host1x_debug_cont(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff);
56 return 0; 56 return 0;
57 57
58 case HOST1X_OPCODE_INCR: 58 case HOST1X_OPCODE_INCR:
59 host1x_debug_output(o, "INCR(offset=%03x, [", 59 num = val & 0xffff;
60 host1x_debug_cont(o, "INCR(offset=%03x, [",
60 val >> 16 & 0xfff); 61 val >> 16 & 0xfff);
61 return val & 0xffff; 62 if (!num)
63 host1x_debug_cont(o, "])\n");
64
65 return num;
62 66
63 case HOST1X_OPCODE_NONINCR: 67 case HOST1X_OPCODE_NONINCR:
64 host1x_debug_output(o, "NONINCR(offset=%03x, [", 68 num = val & 0xffff;
69 host1x_debug_cont(o, "NONINCR(offset=%03x, [",
65 val >> 16 & 0xfff); 70 val >> 16 & 0xfff);
66 return val & 0xffff; 71 if (!num)
72 host1x_debug_cont(o, "])\n");
73
74 return num;
67 75
68 case HOST1X_OPCODE_MASK: 76 case HOST1X_OPCODE_MASK:
69 mask = val & 0xffff; 77 mask = val & 0xffff;
70 host1x_debug_output(o, "MASK(offset=%03x, mask=%03x, [", 78 host1x_debug_cont(o, "MASK(offset=%03x, mask=%03x, [",
71 val >> 16 & 0xfff, mask); 79 val >> 16 & 0xfff, mask);
80 if (!mask)
81 host1x_debug_cont(o, "])\n");
82
72 return hweight16(mask); 83 return hweight16(mask);
73 84
74 case HOST1X_OPCODE_IMM: 85 case HOST1X_OPCODE_IMM:
75 host1x_debug_output(o, "IMM(offset=%03x, data=%03x)\n", 86 host1x_debug_cont(o, "IMM(offset=%03x, data=%03x)\n",
76 val >> 16 & 0xfff, val & 0xffff); 87 val >> 16 & 0xfff, val & 0xffff);
77 return 0; 88 return 0;
78 89
79 case HOST1X_OPCODE_RESTART: 90 case HOST1X_OPCODE_RESTART:
80 host1x_debug_output(o, "RESTART(offset=%08x)\n", val << 4); 91 host1x_debug_cont(o, "RESTART(offset=%08x)\n", val << 4);
81 return 0; 92 return 0;
82 93
83 case HOST1X_OPCODE_GATHER: 94 case HOST1X_OPCODE_GATHER:
84 host1x_debug_output(o, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[", 95 host1x_debug_cont(o, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[",
85 val >> 16 & 0xfff, val >> 15 & 0x1, 96 val >> 16 & 0xfff, val >> 15 & 0x1,
86 val >> 14 & 0x1, val & 0x3fff); 97 val >> 14 & 0x1, val & 0x3fff);
87 return 1; 98 return 1;
@@ -89,16 +100,17 @@ static unsigned int show_channel_command(struct output *o, u32 val)
89 case HOST1X_OPCODE_EXTEND: 100 case HOST1X_OPCODE_EXTEND:
90 subop = val >> 24 & 0xf; 101 subop = val >> 24 & 0xf;
91 if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK) 102 if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK)
92 host1x_debug_output(o, "ACQUIRE_MLOCK(index=%d)\n", 103 host1x_debug_cont(o, "ACQUIRE_MLOCK(index=%d)\n",
93 val & 0xff); 104 val & 0xff);
94 else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK) 105 else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK)
95 host1x_debug_output(o, "RELEASE_MLOCK(index=%d)\n", 106 host1x_debug_cont(o, "RELEASE_MLOCK(index=%d)\n",
96 val & 0xff); 107 val & 0xff);
97 else 108 else
98 host1x_debug_output(o, "EXTEND_UNKNOWN(%08x)\n", val); 109 host1x_debug_cont(o, "EXTEND_UNKNOWN(%08x)\n", val);
99 return 0; 110 return 0;
100 111
101 default: 112 default:
113 host1x_debug_cont(o, "UNKNOWN\n");
102 return 0; 114 return 0;
103 } 115 }
104} 116}
@@ -126,11 +138,11 @@ static void show_gather(struct output *o, phys_addr_t phys_addr,
126 u32 val = *(map_addr + offset / 4 + i); 138 u32 val = *(map_addr + offset / 4 + i);
127 139
128 if (!data_count) { 140 if (!data_count) {
129 host1x_debug_output(o, "%08x: %08x:", addr, val); 141 host1x_debug_output(o, "%08x: %08x: ", addr, val);
130 data_count = show_channel_command(o, val); 142 data_count = show_channel_command(o, val);
131 } else { 143 } else {
132 host1x_debug_output(o, "%08x%s", val, 144 host1x_debug_cont(o, "%08x%s", val,
133 data_count > 0 ? ", " : "])\n"); 145 data_count > 1 ? ", " : "])\n");
134 data_count--; 146 data_count--;
135 } 147 }
136 } 148 }
diff --git a/drivers/gpu/host1x/hw/debug_hw_1x01.c b/drivers/gpu/host1x/hw/debug_hw_1x01.c
index 8f243903cc7f..09e1aa7bb5dd 100644
--- a/drivers/gpu/host1x/hw/debug_hw_1x01.c
+++ b/drivers/gpu/host1x/hw/debug_hw_1x01.c
@@ -111,11 +111,11 @@ static void host1x_debug_show_channel_fifo(struct host1x *host,
111 val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_READ); 111 val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_READ);
112 112
113 if (!data_count) { 113 if (!data_count) {
114 host1x_debug_output(o, "%08x:", val); 114 host1x_debug_output(o, "%08x: ", val);
115 data_count = show_channel_command(o, val); 115 data_count = show_channel_command(o, val);
116 } else { 116 } else {
117 host1x_debug_output(o, "%08x%s", val, 117 host1x_debug_cont(o, "%08x%s", val,
118 data_count > 0 ? ", " : "])\n"); 118 data_count > 1 ? ", " : "])\n");
119 data_count--; 119 data_count--;
120 } 120 }
121 121
@@ -126,7 +126,7 @@ static void host1x_debug_show_channel_fifo(struct host1x *host,
126 } while (rd_ptr != wr_ptr); 126 } while (rd_ptr != wr_ptr);
127 127
128 if (data_count) 128 if (data_count)
129 host1x_debug_output(o, ", ...])\n"); 129 host1x_debug_cont(o, ", ...])\n");
130 host1x_debug_output(o, "\n"); 130 host1x_debug_output(o, "\n");
131 131
132 host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL); 132 host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
diff --git a/drivers/gpu/host1x/hw/debug_hw_1x06.c b/drivers/gpu/host1x/hw/debug_hw_1x06.c
index 9cdee657fb46..bd89da5dc64c 100644
--- a/drivers/gpu/host1x/hw/debug_hw_1x06.c
+++ b/drivers/gpu/host1x/hw/debug_hw_1x06.c
@@ -105,11 +105,12 @@ static void host1x_debug_show_channel_fifo(struct host1x *host,
105 HOST1X_HV_CMDFIFO_PEEK_READ); 105 HOST1X_HV_CMDFIFO_PEEK_READ);
106 106
107 if (!data_count) { 107 if (!data_count) {
108 host1x_debug_output(o, "%08x:", val); 108 host1x_debug_output(o, "%03x 0x%08x: ",
109 rd_ptr - start, val);
109 data_count = show_channel_command(o, val); 110 data_count = show_channel_command(o, val);
110 } else { 111 } else {
111 host1x_debug_output(o, "%08x%s", val, 112 host1x_debug_cont(o, "%08x%s", val,
112 data_count > 0 ? ", " : "])\n"); 113 data_count > 1 ? ", " : "])\n");
113 data_count--; 114 data_count--;
114 } 115 }
115 116
@@ -120,7 +121,7 @@ static void host1x_debug_show_channel_fifo(struct host1x *host,
120 } while (rd_ptr != wr_ptr); 121 } while (rd_ptr != wr_ptr);
121 122
122 if (data_count) 123 if (data_count)
123 host1x_debug_output(o, ", ...])\n"); 124 host1x_debug_cont(o, ", ...])\n");
124 host1x_debug_output(o, "\n"); 125 host1x_debug_output(o, "\n");
125 126
126 host1x_hypervisor_writel(host, 0x0, HOST1X_HV_CMDFIFO_PEEK_CTRL); 127 host1x_hypervisor_writel(host, 0x0, HOST1X_HV_CMDFIFO_PEEK_CTRL);
generated by cgit v1.2.2 (git 2.25.0) at 2025-06-10 14:52:08 -0400