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-rw-r--r--Documentation/devicetree/bindings/arm/atmel-at91.txt13
-rw-r--r--Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.txt2
-rw-r--r--Documentation/devicetree/bindings/watchdog/atmel-wdt.txt2
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi10
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi11
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9g15.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9g15ek.dts25
-rw-r--r--arch/arm/boot/dts/at91sam9g35.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9g35ek.dts21
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi12
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi83
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts61
-rw-r--r--arch/arm/boot/dts/at91sam9rl.dtsi8
-rw-r--r--arch/arm/boot/dts/at91sam9x35.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9x35ek.dts20
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi12
-rw-r--r--arch/arm/boot/dts/at91sam9x5_lcd.dtsi139
-rw-r--r--arch/arm/boot/dts/at91sam9x5dm.dtsi101
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi9
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi8
-rw-r--r--arch/arm/boot/dts/sama5d3_tcb1.dtsi4
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi12
24 files changed, 528 insertions, 42 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 424ac8cbfa08..dc2d0f06d058 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -50,6 +50,7 @@ System Timer (ST) required properties:
50- reg: Should contain registers location and length 50- reg: Should contain registers location and length
51- interrupts: Should contain interrupt for the ST which is the IRQ line 51- interrupts: Should contain interrupt for the ST which is the IRQ line
52 shared across all System Controller members. 52 shared across all System Controller members.
53- clocks: phandle to input clock.
53Its subnodes can be: 54Its subnodes can be:
54- watchdog: compatible should be "atmel,at91rm9200-wdt" 55- watchdog: compatible should be "atmel,at91rm9200-wdt"
55 56
@@ -61,7 +62,7 @@ TC/TCLIB Timer required properties:
61 Note that you can specify several interrupt cells if the TC 62 Note that you can specify several interrupt cells if the TC
62 block has one interrupt per channel. 63 block has one interrupt per channel.
63- clock-names: tuple listing input clock names. 64- clock-names: tuple listing input clock names.
64 Required elements: "t0_clk" 65 Required elements: "t0_clk", "slow_clk"
65 Optional elements: "t1_clk", "t2_clk" 66 Optional elements: "t1_clk", "t2_clk"
66- clocks: phandles to input clocks. 67- clocks: phandles to input clocks.
67 68
@@ -89,12 +90,14 @@ RSTC Reset Controller required properties:
89- compatible: Should be "atmel,<chip>-rstc". 90- compatible: Should be "atmel,<chip>-rstc".
90 <chip> can be "at91sam9260" or "at91sam9g45" 91 <chip> can be "at91sam9260" or "at91sam9g45"
91- reg: Should contain registers location and length 92- reg: Should contain registers location and length
93- clocks: phandle to input clock.
92 94
93Example: 95Example:
94 96
95 rstc@fffffd00 { 97 rstc@fffffd00 {
96 compatible = "atmel,at91sam9260-rstc"; 98 compatible = "atmel,at91sam9260-rstc";
97 reg = <0xfffffd00 0x10>; 99 reg = <0xfffffd00 0x10>;
100 clocks = <&clk32k>;
98 }; 101 };
99 102
100RAMC SDRAM/DDR Controller required properties: 103RAMC SDRAM/DDR Controller required properties:
@@ -117,6 +120,7 @@ required properties:
117- compatible: Should be "atmel,<chip>-shdwc". 120- compatible: Should be "atmel,<chip>-shdwc".
118 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". 121 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
119- reg: Should contain registers location and length 122- reg: Should contain registers location and length
123- clocks: phandle to input clock.
120 124
121optional properties: 125optional properties:
122- atmel,wakeup-mode: String, operation mode of the wakeup mode. 126- atmel,wakeup-mode: String, operation mode of the wakeup mode.
@@ -135,9 +139,10 @@ optional at91sam9x5 properties:
135 139
136Example: 140Example:
137 141
138 rstc@fffffd00 { 142 shdwc@fffffd10 {
139 compatible = "atmel,at91sam9260-rstc"; 143 compatible = "atmel,at91sam9260-shdwc";
140 reg = <0xfffffd00 0x10>; 144 reg = <0xfffffd10 0x10>;
145 clocks = <&clk32k>;
141 }; 146 };
142 147
143Special Function Registers (SFR) 148Special Function Registers (SFR)
diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.txt b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.txt
index 34c1505774bf..5d3791e789c6 100644
--- a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.txt
@@ -5,6 +5,7 @@ Required properties:
5- reg: physical base address of the controller and length of memory mapped 5- reg: physical base address of the controller and length of memory mapped
6 region. 6 region.
7- interrupts: rtc alarm/event interrupt 7- interrupts: rtc alarm/event interrupt
8- clocks: phandle to input clock.
8 9
9Example: 10Example:
10 11
@@ -12,4 +13,5 @@ rtc@fffffe00 {
12 compatible = "atmel,at91rm9200-rtc"; 13 compatible = "atmel,at91rm9200-rtc";
13 reg = <0xfffffe00 0x100>; 14 reg = <0xfffffe00 0x100>;
14 interrupts = <1 4 7>; 15 interrupts = <1 4 7>;
16 clocks = <&clk32k>;
15}; 17};
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index a4d869744f59..86fa6de1019b 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -6,6 +6,7 @@ Required properties:
6- compatible: must be "atmel,at91sam9260-wdt". 6- compatible: must be "atmel,at91sam9260-wdt".
7- reg: physical base address of the controller and length of memory mapped 7- reg: physical base address of the controller and length of memory mapped
8 region. 8 region.
9- clocks: phandle to input clock.
9 10
10Optional properties: 11Optional properties:
11- timeout-sec: contains the watchdog timeout in seconds. 12- timeout-sec: contains the watchdog timeout in seconds.
@@ -39,6 +40,7 @@ Example:
39 compatible = "atmel,at91sam9260-wdt"; 40 compatible = "atmel,at91sam9260-wdt";
40 reg = <0xfffffd40 0x10>; 41 reg = <0xfffffd40 0x10>;
41 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 42 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
43 clocks = <&clk32k>;
42 timeout-sec = <15>; 44 timeout-sec = <15>;
43 atmel,watchdog-type = "hardware"; 45 atmel,watchdog-type = "hardware";
44 atmel,reset-type = "all"; 46 atmel,reset-type = "all";
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index e3cfb9972f54..60edd8baebb8 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -359,6 +359,7 @@
359 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd"; 359 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
360 reg = <0xfffffd00 0x100>; 360 reg = <0xfffffd00 0x100>;
361 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 361 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
362 clocks = <&slow_xtal>;
362 363
363 watchdog { 364 watchdog {
364 compatible = "atmel,at91rm9200-wdt"; 365 compatible = "atmel,at91rm9200-wdt";
@@ -369,6 +370,7 @@
369 compatible = "atmel,at91rm9200-rtc"; 370 compatible = "atmel,at91rm9200-rtc";
370 reg = <0xfffffe00 0x40>; 371 reg = <0xfffffe00 0x40>;
371 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 372 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
373 clocks = <&slow_xtal>;
372 status = "disabled"; 374 status = "disabled";
373 }; 375 };
374 376
@@ -378,8 +380,8 @@
378 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 380 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
379 18 IRQ_TYPE_LEVEL_HIGH 0 381 18 IRQ_TYPE_LEVEL_HIGH 0
380 19 IRQ_TYPE_LEVEL_HIGH 0>; 382 19 IRQ_TYPE_LEVEL_HIGH 0>;
381 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; 383 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
382 clock-names = "t0_clk", "t1_clk", "t2_clk"; 384 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
383 }; 385 };
384 386
385 tcb1: timer@fffa4000 { 387 tcb1: timer@fffa4000 {
@@ -388,8 +390,8 @@
388 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0 390 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
389 21 IRQ_TYPE_LEVEL_HIGH 0 391 21 IRQ_TYPE_LEVEL_HIGH 0
390 22 IRQ_TYPE_LEVEL_HIGH 0>; 392 22 IRQ_TYPE_LEVEL_HIGH 0>;
391 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>; 393 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&slow_xtal>;
392 clock-names = "t0_clk", "t1_clk", "t2_clk"; 394 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
393 }; 395 };
394 396
395 i2c0: i2c@fffb8000 { 397 i2c0: i2c@fffb8000 {
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 4bc347549102..be9c027ddd97 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -359,11 +359,13 @@
359 rstc@fffffd00 { 359 rstc@fffffd00 {
360 compatible = "atmel,at91sam9260-rstc"; 360 compatible = "atmel,at91sam9260-rstc";
361 reg = <0xfffffd00 0x10>; 361 reg = <0xfffffd00 0x10>;
362 clocks = <&clk32k>;
362 }; 363 };
363 364
364 shdwc@fffffd10 { 365 shdwc@fffffd10 {
365 compatible = "atmel,at91sam9260-shdwc"; 366 compatible = "atmel,at91sam9260-shdwc";
366 reg = <0xfffffd10 0x10>; 367 reg = <0xfffffd10 0x10>;
368 clocks = <&clk32k>;
367 }; 369 };
368 370
369 pit: timer@fffffd30 { 371 pit: timer@fffffd30 {
@@ -379,8 +381,8 @@
379 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 381 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
380 18 IRQ_TYPE_LEVEL_HIGH 0 382 18 IRQ_TYPE_LEVEL_HIGH 0
381 19 IRQ_TYPE_LEVEL_HIGH 0>; 383 19 IRQ_TYPE_LEVEL_HIGH 0>;
382 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; 384 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
383 clock-names = "t0_clk", "t1_clk", "t2_clk"; 385 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
384 }; 386 };
385 387
386 tcb1: timer@fffdc000 { 388 tcb1: timer@fffdc000 {
@@ -389,8 +391,8 @@
389 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 391 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
390 27 IRQ_TYPE_LEVEL_HIGH 0 392 27 IRQ_TYPE_LEVEL_HIGH 0
391 28 IRQ_TYPE_LEVEL_HIGH 0>; 393 28 IRQ_TYPE_LEVEL_HIGH 0>;
392 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>; 394 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
393 clock-names = "t0_clk", "t1_clk", "t2_clk"; 395 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
394 }; 396 };
395 397
396 pinctrl@fffff400 { 398 pinctrl@fffff400 {
@@ -973,6 +975,7 @@
973 compatible = "atmel,at91sam9260-wdt"; 975 compatible = "atmel,at91sam9260-wdt";
974 reg = <0xfffffd40 0x10>; 976 reg = <0xfffffd40 0x10>;
975 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 977 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
978 clocks = <&clk32k>;
976 atmel,watchdog-type = "hardware"; 979 atmel,watchdog-type = "hardware";
977 atmel,reset-type = "all"; 980 atmel,reset-type = "all";
978 atmel,dbg-halt; 981 atmel,dbg-halt;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index b2c44a07a3d0..ce1e3e94a40c 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -119,8 +119,8 @@
119 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, 119 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
120 <18 IRQ_TYPE_LEVEL_HIGH 0>, 120 <18 IRQ_TYPE_LEVEL_HIGH 0>,
121 <19 IRQ_TYPE_LEVEL_HIGH 0>; 121 <19 IRQ_TYPE_LEVEL_HIGH 0>;
122 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; 122 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
123 clock-names = "t0_clk", "t1_clk", "t2_clk"; 123 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
124 }; 124 };
125 125
126 usb1: gadget@fffa4000 { 126 usb1: gadget@fffa4000 {
@@ -820,11 +820,13 @@
820 rstc@fffffd00 { 820 rstc@fffffd00 {
821 compatible = "atmel,at91sam9260-rstc"; 821 compatible = "atmel,at91sam9260-rstc";
822 reg = <0xfffffd00 0x10>; 822 reg = <0xfffffd00 0x10>;
823 clocks = <&slow_xtal>;
823 }; 824 };
824 825
825 shdwc@fffffd10 { 826 shdwc@fffffd10 {
826 compatible = "atmel,at91sam9260-shdwc"; 827 compatible = "atmel,at91sam9260-shdwc";
827 reg = <0xfffffd10 0x10>; 828 reg = <0xfffffd10 0x10>;
829 clocks = <&slow_xtal>;
828 }; 830 };
829 831
830 pit: timer@fffffd30 { 832 pit: timer@fffffd30 {
@@ -846,6 +848,7 @@
846 compatible = "atmel,at91sam9260-wdt"; 848 compatible = "atmel,at91sam9260-wdt";
847 reg = <0xfffffd40 0x10>; 849 reg = <0xfffffd40 0x10>;
848 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 850 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
851 clocks = <&slow_xtal>;
849 status = "disabled"; 852 status = "disabled";
850 }; 853 };
851 854
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index e36d966ef5e8..f1f5fa3a9e6e 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -377,18 +377,20 @@
377 compatible = "atmel,at91rm9200-tcb"; 377 compatible = "atmel,at91rm9200-tcb";
378 reg = <0xfff7c000 0x100>; 378 reg = <0xfff7c000 0x100>;
379 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 379 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
380 clocks = <&tcb_clk>; 380 clocks = <&tcb_clk>, <&slow_xtal>;
381 clock-names = "t0_clk"; 381 clock-names = "t0_clk", "slow_clk";
382 }; 382 };
383 383
384 rstc@fffffd00 { 384 rstc@fffffd00 {
385 compatible = "atmel,at91sam9260-rstc"; 385 compatible = "atmel,at91sam9260-rstc";
386 reg = <0xfffffd00 0x10>; 386 reg = <0xfffffd00 0x10>;
387 clocks = <&slow_xtal>;
387 }; 388 };
388 389
389 shdwc@fffffd10 { 390 shdwc@fffffd10 {
390 compatible = "atmel,at91sam9260-shdwc"; 391 compatible = "atmel,at91sam9260-shdwc";
391 reg = <0xfffffd10 0x10>; 392 reg = <0xfffffd10 0x10>;
393 clocks = <&slow_xtal>;
392 }; 394 };
393 395
394 pinctrl@fffff200 { 396 pinctrl@fffff200 {
@@ -902,6 +904,7 @@
902 compatible = "atmel,at91sam9260-wdt"; 904 compatible = "atmel,at91sam9260-wdt";
903 reg = <0xfffffd40 0x10>; 905 reg = <0xfffffd40 0x10>;
904 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 906 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
907 clocks = <&slow_xtal>;
905 atmel,watchdog-type = "hardware"; 908 atmel,watchdog-type = "hardware";
906 atmel,reset-type = "all"; 909 atmel,reset-type = "all";
907 atmel,dbg-halt; 910 atmel,dbg-halt;
diff --git a/arch/arm/boot/dts/at91sam9g15.dtsi b/arch/arm/boot/dts/at91sam9g15.dtsi
index cfd7044616d7..27de7dc0f0e0 100644
--- a/arch/arm/boot/dts/at91sam9g15.dtsi
+++ b/arch/arm/boot/dts/at91sam9g15.dtsi
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include "at91sam9x5.dtsi" 9#include "at91sam9x5.dtsi"
10#include "at91sam9x5_lcd.dtsi"
10 11
11/ { 12/ {
12 model = "Atmel AT91SAM9G15 SoC"; 13 model = "Atmel AT91SAM9G15 SoC";
diff --git a/arch/arm/boot/dts/at91sam9g15ek.dts b/arch/arm/boot/dts/at91sam9g15ek.dts
index 26b0444b0f96..d1d2b400f1c6 100644
--- a/arch/arm/boot/dts/at91sam9g15ek.dts
+++ b/arch/arm/boot/dts/at91sam9g15ek.dts
@@ -8,9 +8,34 @@
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "at91sam9g15.dtsi" 10#include "at91sam9g15.dtsi"
11#include "at91sam9x5dm.dtsi"
11#include "at91sam9x5ek.dtsi" 12#include "at91sam9x5ek.dtsi"
12 13
13/ { 14/ {
14 model = "Atmel AT91SAM9G15-EK"; 15 model = "Atmel AT91SAM9G15-EK";
15 compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; 16 compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
17
18 ahb {
19 apb {
20 hlcdc: hlcdc@f8038000 {
21 status = "okay";
22 };
23 };
24 };
25
26 backlight: backlight {
27 status = "okay";
28 };
29
30 bl_reg: backlight_regulator {
31 status = "okay";
32 };
33
34 panel: panel {
35 status = "okay";
36 };
37
38 panel_reg: panel_regulator {
39 status = "okay";
40 };
16}; 41};
diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi
index e35c2fcf8298..ff4115886f97 100644
--- a/arch/arm/boot/dts/at91sam9g35.dtsi
+++ b/arch/arm/boot/dts/at91sam9g35.dtsi
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include "at91sam9x5.dtsi" 9#include "at91sam9x5.dtsi"
10#include "at91sam9x5_lcd.dtsi"
10#include "at91sam9x5_macb0.dtsi" 11#include "at91sam9x5_macb0.dtsi"
11 12
12/ { 13/ {
diff --git a/arch/arm/boot/dts/at91sam9g35ek.dts b/arch/arm/boot/dts/at91sam9g35ek.dts
index 641a9bf89ed1..23ec8b13f30a 100644
--- a/arch/arm/boot/dts/at91sam9g35ek.dts
+++ b/arch/arm/boot/dts/at91sam9g35ek.dts
@@ -8,6 +8,7 @@
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "at91sam9g35.dtsi" 10#include "at91sam9g35.dtsi"
11#include "at91sam9x5dm.dtsi"
11#include "at91sam9x5ek.dtsi" 12#include "at91sam9x5ek.dtsi"
12 13
13/ { 14/ {
@@ -20,6 +21,26 @@
20 phy-mode = "rmii"; 21 phy-mode = "rmii";
21 status = "okay"; 22 status = "okay";
22 }; 23 };
24
25 hlcdc: hlcdc@f8038000 {
26 status = "okay";
27 };
23 }; 28 };
24 }; 29 };
30
31 backlight: backlight {
32 status = "okay";
33 };
34
35 bl_reg: backlight_regulator {
36 status = "okay";
37 };
38
39 panel: panel {
40 status = "okay";
41 };
42
43 panel_reg: panel_regulator {
44 status = "okay";
45 };
25}; 46};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 4268341b0ebb..18b8b9e29704 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -387,6 +387,7 @@
387 rstc@fffffd00 { 387 rstc@fffffd00 {
388 compatible = "atmel,at91sam9g45-rstc"; 388 compatible = "atmel,at91sam9g45-rstc";
389 reg = <0xfffffd00 0x10>; 389 reg = <0xfffffd00 0x10>;
390 clocks = <&clk32k>;
390 }; 391 };
391 392
392 pit: timer@fffffd30 { 393 pit: timer@fffffd30 {
@@ -400,22 +401,23 @@
400 shdwc@fffffd10 { 401 shdwc@fffffd10 {
401 compatible = "atmel,at91sam9rl-shdwc"; 402 compatible = "atmel,at91sam9rl-shdwc";
402 reg = <0xfffffd10 0x10>; 403 reg = <0xfffffd10 0x10>;
404 clocks = <&clk32k>;
403 }; 405 };
404 406
405 tcb0: timer@fff7c000 { 407 tcb0: timer@fff7c000 {
406 compatible = "atmel,at91rm9200-tcb"; 408 compatible = "atmel,at91rm9200-tcb";
407 reg = <0xfff7c000 0x100>; 409 reg = <0xfff7c000 0x100>;
408 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 410 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
409 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>; 411 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
410 clock-names = "t0_clk", "t1_clk", "t2_clk"; 412 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
411 }; 413 };
412 414
413 tcb1: timer@fffd4000 { 415 tcb1: timer@fffd4000 {
414 compatible = "atmel,at91rm9200-tcb"; 416 compatible = "atmel,at91rm9200-tcb";
415 reg = <0xfffd4000 0x100>; 417 reg = <0xfffd4000 0x100>;
416 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 418 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
417 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>; 419 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
418 clock-names = "t0_clk", "t1_clk", "t2_clk"; 420 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
419 }; 421 };
420 422
421 dma: dma-controller@ffffec00 { 423 dma: dma-controller@ffffec00 {
@@ -1123,6 +1125,7 @@
1123 compatible = "atmel,at91sam9260-wdt"; 1125 compatible = "atmel,at91sam9260-wdt";
1124 reg = <0xfffffd40 0x10>; 1126 reg = <0xfffffd40 0x10>;
1125 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1127 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1128 clocks = <&clk32k>;
1126 atmel,watchdog-type = "hardware"; 1129 atmel,watchdog-type = "hardware";
1127 atmel,reset-type = "all"; 1130 atmel,reset-type = "all";
1128 atmel,dbg-halt; 1131 atmel,dbg-halt;
@@ -1257,6 +1260,7 @@
1257 compatible = "atmel,at91rm9200-rtc"; 1260 compatible = "atmel,at91rm9200-rtc";
1258 reg = <0xfffffdb0 0x30>; 1261 reg = <0xfffffdb0 0x30>;
1259 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1262 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1263 clocks = <&clk32k>;
1260 status = "disabled"; 1264 status = "disabled";
1261 }; 1265 };
1262 1266
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 5c2a8c8c8bd4..32bc9a189db0 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -376,6 +376,7 @@
376 rstc@fffffe00 { 376 rstc@fffffe00 {
377 compatible = "atmel,at91sam9g45-rstc"; 377 compatible = "atmel,at91sam9g45-rstc";
378 reg = <0xfffffe00 0x10>; 378 reg = <0xfffffe00 0x10>;
379 clocks = <&clk32k>;
379 }; 380 };
380 381
381 pit: timer@fffffe30 { 382 pit: timer@fffffe30 {
@@ -388,6 +389,7 @@
388 shdwc@fffffe10 { 389 shdwc@fffffe10 {
389 compatible = "atmel,at91sam9x5-shdwc"; 390 compatible = "atmel,at91sam9x5-shdwc";
390 reg = <0xfffffe10 0x10>; 391 reg = <0xfffffe10 0x10>;
392 clocks = <&clk32k>;
391 }; 393 };
392 394
393 sckc@fffffe50 { 395 sckc@fffffe50 {
@@ -431,16 +433,44 @@
431 compatible = "atmel,at91sam9x5-tcb"; 433 compatible = "atmel,at91sam9x5-tcb";
432 reg = <0xf8008000 0x100>; 434 reg = <0xf8008000 0x100>;
433 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 435 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
434 clocks = <&tcb_clk>; 436 clocks = <&tcb_clk>, <&clk32k>;
435 clock-names = "t0_clk"; 437 clock-names = "t0_clk", "slow_clk";
436 }; 438 };
437 439
438 tcb1: timer@f800c000 { 440 tcb1: timer@f800c000 {
439 compatible = "atmel,at91sam9x5-tcb"; 441 compatible = "atmel,at91sam9x5-tcb";
440 reg = <0xf800c000 0x100>; 442 reg = <0xf800c000 0x100>;
441 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 443 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
442 clocks = <&tcb_clk>; 444 clocks = <&tcb_clk>, <&clk32k>;
443 clock-names = "t0_clk"; 445 clock-names = "t0_clk", "slow_clk";
446 };
447
448 hlcdc: hlcdc@f8038000 {
449 compatible = "atmel,at91sam9n12-hlcdc";
450 reg = <0xf8038000 0x2000>;
451 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
452 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
453 clock-names = "periph_clk", "sys_clk", "slow_clk";
454 status = "disabled";
455
456 hlcdc-display-controller {
457 compatible = "atmel,hlcdc-display-controller";
458 #address-cells = <1>;
459 #size-cells = <0>;
460
461 port@0 {
462 #address-cells = <1>;
463 #size-cells = <0>;
464 reg = <0>;
465 };
466 };
467
468 hlcdc_pwm: hlcdc-pwm {
469 compatible = "atmel,hlcdc-pwm";
470 pinctrl-names = "default";
471 pinctrl-0 = <&pinctrl_lcd_pwm>;
472 #pwm-cells = <3>;
473 };
444 }; 474 };
445 475
446 dma: dma-controller@ffffec00 { 476 dma: dma-controller@ffffec00 {
@@ -475,6 +505,49 @@
475 }; 505 };
476 }; 506 };
477 507
508 lcd {
509 pinctrl_lcd_base: lcd-base-0 {
510 atmel,pins =
511 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
512 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
513 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
514 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
515 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
516 };
517
518 pinctrl_lcd_pwm: lcd-pwm-0 {
519 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
520 };
521
522 pinctrl_lcd_rgb888: lcd-rgb-3 {
523 atmel,pins =
524 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
525 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
526 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
527 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
528 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
529 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
530 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
531 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
532 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
533 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
534 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
535 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
536 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
537 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
538 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
539 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
540 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
541 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
542 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
543 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
544 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
545 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
546 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
547 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
548 };
549 };
550
478 usart0 { 551 usart0 {
479 pinctrl_usart0: usart0-0 { 552 pinctrl_usart0: usart0-0 {
480 atmel,pins = 553 atmel,pins =
@@ -891,6 +964,7 @@
891 compatible = "atmel,at91sam9260-wdt"; 964 compatible = "atmel,at91sam9260-wdt";
892 reg = <0xfffffe40 0x10>; 965 reg = <0xfffffe40 0x10>;
893 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 966 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
967 clocks = <&clk32k>;
894 atmel,watchdog-type = "hardware"; 968 atmel,watchdog-type = "hardware";
895 atmel,reset-type = "all"; 969 atmel,reset-type = "all";
896 atmel,dbg-halt; 970 atmel,dbg-halt;
@@ -901,6 +975,7 @@
901 compatible = "atmel,at91rm9200-rtc"; 975 compatible = "atmel,at91rm9200-rtc";
902 reg = <0xfffffeb0 0x40>; 976 reg = <0xfffffeb0 0x40>;
903 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 977 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
978 clocks = <&clk32k>;
904 status = "disabled"; 979 status = "disabled";
905 }; 980 };
906 981
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index eab17fcace6d..efa75064d38a 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -128,6 +128,22 @@
128 }; 128 };
129 }; 129 };
130 130
131 hlcdc: hlcdc@f8038000 {
132 status = "okay";
133
134 hlcdc-display-controller {
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
137
138 port@0 {
139 hlcdc_panel_output: endpoint@0 {
140 reg = <0>;
141 remote-endpoint = <&panel_input>;
142 };
143 };
144 };
145 };
146
131 usb1: gadget@f803c000 { 147 usb1: gadget@f803c000 {
132 pinctrl-names = "default"; 148 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_usb1_vbus_sense>; 149 pinctrl-0 = <&pinctrl_usb1_vbus_sense>;
@@ -161,6 +177,23 @@
161 }; 177 };
162 }; 178 };
163 179
180 backlight: backlight {
181 compatible = "pwm-backlight";
182 pwms = <&hlcdc_pwm 0 50000 0>;
183 brightness-levels = <0 4 8 16 32 64 128 255>;
184 default-brightness-level = <6>;
185 power-supply = <&bl_reg>;
186 status = "okay";
187 };
188
189 bl_reg: backlight_regulator {
190 compatible = "regulator-fixed";
191 regulator-name = "backlight-power-supply";
192 regulator-min-microvolt = <5000000>;
193 regulator-max-microvolt = <5000000>;
194 status = "okay";
195 };
196
164 leds { 197 leds {
165 compatible = "gpio-leds"; 198 compatible = "gpio-leds";
166 199
@@ -194,6 +227,34 @@
194 }; 227 };
195 }; 228 };
196 229
230 panel: panel {
231 compatible = "qd,qd43003c0-40", "simple-panel";
232 backlight = <&backlight>;
233 power-supply = <&panel_reg>;
234 #address-cells = <1>;
235 #size-cells = <0>;
236 status = "okay";
237
238 port@0 {
239 reg = <0>;
240 #address-cells = <1>;
241 #size-cells = <0>;
242
243 panel_input: endpoint@0 {
244 reg = <0>;
245 remote-endpoint = <&hlcdc_panel_output>;
246 };
247 };
248 };
249
250 panel_reg: panel_regulator {
251 compatible = "regulator-fixed";
252 regulator-name = "panel-power-supply";
253 regulator-min-microvolt = <3300000>;
254 regulator-max-microvolt = <3300000>;
255 status = "okay";
256 };
257
197 sound { 258 sound {
198 compatible = "atmel,asoc-wm8904"; 259 compatible = "atmel,asoc-wm8904";
199 pinctrl-names = "default"; 260 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index c9920c64791c..a0b90aedd3b8 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -121,8 +121,8 @@
121 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, 121 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
122 <17 IRQ_TYPE_LEVEL_HIGH 0>, 122 <17 IRQ_TYPE_LEVEL_HIGH 0>,
123 <18 IRQ_TYPE_LEVEL_HIGH 0>; 123 <18 IRQ_TYPE_LEVEL_HIGH 0>;
124 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; 124 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
125 clock-names = "t0_clk", "t1_clk", "t2_clk"; 125 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
126 }; 126 };
127 127
128 mmc0: mmc@fffa4000 { 128 mmc0: mmc@fffa4000 {
@@ -1018,11 +1018,13 @@
1018 rstc@fffffd00 { 1018 rstc@fffffd00 {
1019 compatible = "atmel,at91sam9260-rstc"; 1019 compatible = "atmel,at91sam9260-rstc";
1020 reg = <0xfffffd00 0x10>; 1020 reg = <0xfffffd00 0x10>;
1021 clocks = <&clk32k>;
1021 }; 1022 };
1022 1023
1023 shdwc@fffffd10 { 1024 shdwc@fffffd10 {
1024 compatible = "atmel,at91sam9260-shdwc"; 1025 compatible = "atmel,at91sam9260-shdwc";
1025 reg = <0xfffffd10 0x10>; 1026 reg = <0xfffffd10 0x10>;
1027 clocks = <&clk32k>;
1026 }; 1028 };
1027 1029
1028 pit: timer@fffffd30 { 1030 pit: timer@fffffd30 {
@@ -1036,6 +1038,7 @@
1036 compatible = "atmel,at91sam9260-wdt"; 1038 compatible = "atmel,at91sam9260-wdt";
1037 reg = <0xfffffd40 0x10>; 1039 reg = <0xfffffd40 0x10>;
1038 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1040 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1041 clocks = <&clk32k>;
1039 status = "disabled"; 1042 status = "disabled";
1040 }; 1043 };
1041 1044
@@ -1083,6 +1086,7 @@
1083 compatible = "atmel,at91rm9200-rtc"; 1086 compatible = "atmel,at91rm9200-rtc";
1084 reg = <0xfffffe00 0x40>; 1087 reg = <0xfffffe00 0x40>;
1085 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1088 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1089 clocks = <&clk32k>;
1086 status = "disabled"; 1090 status = "disabled";
1087 }; 1091 };
1088 1092
diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
index 499cdc81f4c0..d9054e8167b7 100644
--- a/arch/arm/boot/dts/at91sam9x35.dtsi
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include "at91sam9x5.dtsi" 9#include "at91sam9x5.dtsi"
10#include "at91sam9x5_lcd.dtsi"
10#include "at91sam9x5_macb0.dtsi" 11#include "at91sam9x5_macb0.dtsi"
11#include "at91sam9x5_can.dtsi" 12#include "at91sam9x5_can.dtsi"
12 13
diff --git a/arch/arm/boot/dts/at91sam9x35ek.dts b/arch/arm/boot/dts/at91sam9x35ek.dts
index 343d32818ca3..fcb67180ea26 100644
--- a/arch/arm/boot/dts/at91sam9x35ek.dts
+++ b/arch/arm/boot/dts/at91sam9x35ek.dts
@@ -8,6 +8,7 @@
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "at91sam9x35.dtsi" 10#include "at91sam9x35.dtsi"
11#include "at91sam9x5dm.dtsi"
11#include "at91sam9x5ek.dtsi" 12#include "at91sam9x5ek.dtsi"
12 13
13/ { 14/ {
@@ -20,6 +21,25 @@
20 phy-mode = "rmii"; 21 phy-mode = "rmii";
21 status = "okay"; 22 status = "okay";
22 }; 23 };
24 hlcdc: hlcdc@f8038000 {
25 status = "okay";
26 };
23 }; 27 };
24 }; 28 };
29
30 backlight: backlight {
31 status = "okay";
32 };
33
34 bl_reg: backlight_regulator {
35 status = "okay";
36 };
37
38 panel: panel {
39 status = "okay";
40 };
41
42 panel_reg: panel_regulator {
43 status = "okay";
44 };
25}; 45};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index b6c8df8d380e..747d8f070a5c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -376,11 +376,13 @@
376 rstc@fffffe00 { 376 rstc@fffffe00 {
377 compatible = "atmel,at91sam9g45-rstc"; 377 compatible = "atmel,at91sam9g45-rstc";
378 reg = <0xfffffe00 0x10>; 378 reg = <0xfffffe00 0x10>;
379 clocks = <&clk32k>;
379 }; 380 };
380 381
381 shdwc@fffffe10 { 382 shdwc@fffffe10 {
382 compatible = "atmel,at91sam9x5-shdwc"; 383 compatible = "atmel,at91sam9x5-shdwc";
383 reg = <0xfffffe10 0x10>; 384 reg = <0xfffffe10 0x10>;
385 clocks = <&clk32k>;
384 }; 386 };
385 387
386 pit: timer@fffffe30 { 388 pit: timer@fffffe30 {
@@ -418,16 +420,16 @@
418 compatible = "atmel,at91sam9x5-tcb"; 420 compatible = "atmel,at91sam9x5-tcb";
419 reg = <0xf8008000 0x100>; 421 reg = <0xf8008000 0x100>;
420 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 422 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
421 clocks = <&tcb0_clk>; 423 clocks = <&tcb0_clk>, <&clk32k>;
422 clock-names = "t0_clk"; 424 clock-names = "t0_clk", "slow_clk";
423 }; 425 };
424 426
425 tcb1: timer@f800c000 { 427 tcb1: timer@f800c000 {
426 compatible = "atmel,at91sam9x5-tcb"; 428 compatible = "atmel,at91sam9x5-tcb";
427 reg = <0xf800c000 0x100>; 429 reg = <0xf800c000 0x100>;
428 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 430 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
429 clocks = <&tcb0_clk>; 431 clocks = <&tcb0_clk>, <&clk32k>;
430 clock-names = "t0_clk"; 432 clock-names = "t0_clk", "slow_clk";
431 }; 433 };
432 434
433 dma0: dma-controller@ffffec00 { 435 dma0: dma-controller@ffffec00 {
@@ -1173,6 +1175,7 @@
1173 compatible = "atmel,at91sam9260-wdt"; 1175 compatible = "atmel,at91sam9260-wdt";
1174 reg = <0xfffffe40 0x10>; 1176 reg = <0xfffffe40 0x10>;
1175 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1177 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1178 clocks = <&clk32k>;
1176 atmel,watchdog-type = "hardware"; 1179 atmel,watchdog-type = "hardware";
1177 atmel,reset-type = "all"; 1180 atmel,reset-type = "all";
1178 atmel,dbg-halt; 1181 atmel,dbg-halt;
@@ -1183,6 +1186,7 @@
1183 compatible = "atmel,at91sam9x5-rtc"; 1186 compatible = "atmel,at91sam9x5-rtc";
1184 reg = <0xfffffeb0 0x40>; 1187 reg = <0xfffffeb0 0x40>;
1185 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1188 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1189 clocks = <&clk32k>;
1186 status = "disabled"; 1190 status = "disabled";
1187 }; 1191 };
1188 1192
diff --git a/arch/arm/boot/dts/at91sam9x5_lcd.dtsi b/arch/arm/boot/dts/at91sam9x5_lcd.dtsi
index 485302e8233d..1629db9dd563 100644
--- a/arch/arm/boot/dts/at91sam9x5_lcd.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_lcd.dtsi
@@ -13,6 +13,137 @@
13/ { 13/ {
14 ahb { 14 ahb {
15 apb { 15 apb {
16 hlcdc: hlcdc@f8038000 {
17 compatible = "atmel,at91sam9x5-hlcdc";
18 reg = <0xf8038000 0x4000>;
19 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
20 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
21 clock-names = "periph_clk","sys_clk", "slow_clk";
22 status = "disabled";
23
24 hlcdc-display-controller {
25 compatible = "atmel,hlcdc-display-controller";
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 port@0 {
30 #address-cells = <1>;
31 #size-cells = <0>;
32 reg = <0>;
33 };
34 };
35
36 hlcdc_pwm: hlcdc-pwm {
37 compatible = "atmel,hlcdc-pwm";
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_lcd_pwm>;
40 #pwm-cells = <3>;
41 };
42 };
43
44 pinctrl@fffff400 {
45 lcd {
46 pinctrl_lcd_base: lcd-base-0 {
47 atmel,pins =
48 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
49 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
50 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
51 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
52 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
53 };
54
55 pinctrl_lcd_pwm: lcd-pwm-0 {
56 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
57 };
58
59 pinctrl_lcd_rgb444: lcd-rgb-0 {
60 atmel,pins =
61 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
62 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
63 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
64 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
65 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
66 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
67 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
68 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
69 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
70 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
71 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
72 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
73 };
74
75 pinctrl_lcd_rgb565: lcd-rgb-1 {
76 atmel,pins =
77 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
78 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
79 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
80 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
81 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
82 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
83 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
84 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
85 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
86 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
87 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
88 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
89 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
90 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
91 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
92 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
93 };
94
95 pinctrl_lcd_rgb666: lcd-rgb-2 {
96 atmel,pins =
97 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
98 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
99 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
100 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
101 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
102 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
103 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
104 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
105 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
106 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
107 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
108 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
109 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
110 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
111 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
112 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
113 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
114 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD17 pin */
115 };
116
117 pinctrl_lcd_rgb888: lcd-rgb-3 {
118 atmel,pins =
119 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
120 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
121 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
122 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
123 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
124 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
125 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
126 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
127 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
128 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
129 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
130 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
131 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
132 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
133 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
134 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
135 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
136 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
137 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
138 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
139 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
140 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
141 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
142 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
143 };
144 };
145 };
146
16 pmc: pmc@fffffc00 { 147 pmc: pmc@fffffc00 {
17 periphck { 148 periphck {
18 lcdc_clk: lcdc_clk { 149 lcdc_clk: lcdc_clk {
@@ -20,6 +151,14 @@
20 reg = <25>; 151 reg = <25>;
21 }; 152 };
22 }; 153 };
154
155 systemck {
156 lcdck: lcdck {
157 #clock-cells = <0>;
158 reg = <3>;
159 clocks = <&mck>;
160 };
161 };
23 }; 162 };
24 }; 163 };
25 }; 164 };
diff --git a/arch/arm/boot/dts/at91sam9x5dm.dtsi b/arch/arm/boot/dts/at91sam9x5dm.dtsi
new file mode 100644
index 000000000000..34c089fe0bc0
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5dm.dtsi
@@ -0,0 +1,101 @@
1/*
2 * at91sam9x5dm.dtsi - Device Tree file for SAM9x5 display module
3 *
4 * Copyright (C) 2014 Atmel,
5 * 2014 Free Electrons
6 *
7 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/ {
13 ahb {
14 apb {
15 i2c0: i2c@f8010000 {
16 qt1070: keyboard@1b {
17 compatible = "qt1070";
18 reg = <0x1b>;
19 interrupt-parent = <&pioA>;
20 interrupts = <7 0x0>;
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_qt1070_irq>;
23 wakeup-source;
24 };
25 };
26
27 hlcdc: hlcdc@f8038000 {
28 hlcdc-display-controller {
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
31
32 port@0 {
33 hlcdc_panel_output: endpoint@0 {
34 reg = <0>;
35 remote-endpoint = <&panel_input>;
36 };
37 };
38 };
39 };
40
41 adc0: adc@f804c000 {
42 atmel,adc-ts-wires = <4>;
43 atmel,adc-ts-pressure-threshold = <10000>;
44 status = "okay";
45 };
46
47 pinctrl@fffff400 {
48 board {
49 pinctrl_qt1070_irq: qt1070_irq {
50 atmel,pins =
51 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
52 };
53 };
54 };
55 };
56 };
57
58 backlight: backlight {
59 compatible = "pwm-backlight";
60 pwms = <&hlcdc_pwm 0 50000 0>;
61 brightness-levels = <0 4 8 16 32 64 128 255>;
62 default-brightness-level = <6>;
63 power-supply = <&bl_reg>;
64 status = "disabled";
65 };
66
67 bl_reg: backlight_regulator {
68 compatible = "regulator-fixed";
69 regulator-name = "backlight-power-supply";
70 regulator-min-microvolt = <5000000>;
71 regulator-max-microvolt = <5000000>;
72 status = "disabled";
73 };
74
75 panel: panel {
76 compatible = "foxlink,fl500wvr00-a0t", "simple-panel";
77 backlight = <&backlight>;
78 power-supply = <&panel_reg>;
79 #address-cells = <1>;
80 #size-cells = <0>;
81 status = "disabled";
82
83 port@0 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86
87 panel_input: endpoint@0 {
88 reg = <0>;
89 remote-endpoint = <&hlcdc_panel_output>;
90 };
91 };
92 };
93
94 panel_reg: panel_regulator {
95 compatible = "regulator-fixed";
96 regulator-name = "panel-power-supply";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 status = "disabled";
100 };
101};
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index f39258fa3815..034cd48ae28b 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -764,16 +764,16 @@
764 compatible = "atmel,at91sam9x5-tcb"; 764 compatible = "atmel,at91sam9x5-tcb";
765 reg = <0xf800c000 0x100>; 765 reg = <0xf800c000 0x100>;
766 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; 766 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
767 clocks = <&tcb0_clk>; 767 clocks = <&tcb0_clk>, <&clk32k>;
768 clock-names = "t0_clk"; 768 clock-names = "t0_clk", "slow_clk";
769 }; 769 };
770 770
771 tcb1: timer@f8010000 { 771 tcb1: timer@f8010000 {
772 compatible = "atmel,at91sam9x5-tcb"; 772 compatible = "atmel,at91sam9x5-tcb";
773 reg = <0xf8010000 0x100>; 773 reg = <0xf8010000 0x100>;
774 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; 774 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
775 clocks = <&tcb1_clk>; 775 clocks = <&tcb1_clk>, <&clk32k>;
776 clock-names = "t0_clk"; 776 clock-names = "t0_clk", "slow_clk";
777 }; 777 };
778 778
779 uart0: serial@f801c000 { 779 uart0: serial@f801c000 {
@@ -857,6 +857,7 @@
857 compatible = "atmel,at91rm9200-rtc"; 857 compatible = "atmel,at91rm9200-rtc";
858 reg = <0xf80480b0 0x30>; 858 reg = <0xf80480b0 0x30>;
859 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>; 859 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
860 clocks = <&clk32k>;
860 }; 861 };
861 862
862 spi1: spi@fc000000 { 863 spi1: spi@fc000000 {
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 81ced62cedaf..7fa276515f11 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -145,8 +145,8 @@
145 compatible = "atmel,at91sam9x5-tcb"; 145 compatible = "atmel,at91sam9x5-tcb";
146 reg = <0xf0010000 0x100>; 146 reg = <0xf0010000 0x100>;
147 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 147 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
148 clocks = <&tcb0_clk>; 148 clocks = <&tcb0_clk>, <&clk32k>;
149 clock-names = "t0_clk"; 149 clock-names = "t0_clk", "slow_clk";
150 }; 150 };
151 151
152 i2c0: i2c@f0014000 { 152 i2c0: i2c@f0014000 {
@@ -1261,11 +1261,13 @@
1261 rstc@fffffe00 { 1261 rstc@fffffe00 {
1262 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 1262 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1263 reg = <0xfffffe00 0x10>; 1263 reg = <0xfffffe00 0x10>;
1264 clocks = <&clk32k>;
1264 }; 1265 };
1265 1266
1266 shutdown-controller@fffffe10 { 1267 shutdown-controller@fffffe10 {
1267 compatible = "atmel,at91sam9x5-shdwc"; 1268 compatible = "atmel,at91sam9x5-shdwc";
1268 reg = <0xfffffe10 0x10>; 1269 reg = <0xfffffe10 0x10>;
1270 clocks = <&clk32k>;
1269 }; 1271 };
1270 1272
1271 pit: timer@fffffe30 { 1273 pit: timer@fffffe30 {
@@ -1279,6 +1281,7 @@
1279 compatible = "atmel,at91sam9260-wdt"; 1281 compatible = "atmel,at91sam9260-wdt";
1280 reg = <0xfffffe40 0x10>; 1282 reg = <0xfffffe40 0x10>;
1281 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; 1283 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1284 clocks = <&clk32k>;
1282 atmel,watchdog-type = "hardware"; 1285 atmel,watchdog-type = "hardware";
1283 atmel,reset-type = "all"; 1286 atmel,reset-type = "all";
1284 atmel,dbg-halt; 1287 atmel,dbg-halt;
@@ -1315,6 +1318,7 @@
1315 compatible = "atmel,at91rm9200-rtc"; 1318 compatible = "atmel,at91rm9200-rtc";
1316 reg = <0xfffffeb0 0x30>; 1319 reg = <0xfffffeb0 0x30>;
1317 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1320 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1321 clocks = <&clk32k>;
1318 }; 1322 };
1319 }; 1323 };
1320 1324
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
index f7fa58fe09f1..801f9745e82f 100644
--- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -31,8 +31,8 @@
31 compatible = "atmel,at91sam9x5-tcb"; 31 compatible = "atmel,at91sam9x5-tcb";
32 reg = <0xf8014000 0x100>; 32 reg = <0xf8014000 0x100>;
33 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; 33 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
34 clocks = <&tcb1_clk>; 34 clocks = <&tcb1_clk>, <&clk32k>;
35 clock-names = "t0_clk"; 35 clock-names = "t0_clk", "slow_clk";
36 }; 36 };
37 }; 37 };
38 }; 38 };
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 1fa8b3611a03..8d1de29e8da1 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -957,8 +957,8 @@
957 compatible = "atmel,at91sam9x5-tcb"; 957 compatible = "atmel,at91sam9x5-tcb";
958 reg = <0xf801c000 0x100>; 958 reg = <0xf801c000 0x100>;
959 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>; 959 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
960 clocks = <&tcb0_clk>; 960 clocks = <&tcb0_clk>, <&clk32k>;
961 clock-names = "t0_clk"; 961 clock-names = "t0_clk", "slow_clk";
962 }; 962 };
963 963
964 macb0: ethernet@f8020000 { 964 macb0: ethernet@f8020000 {
@@ -1185,8 +1185,8 @@
1185 compatible = "atmel,at91sam9x5-tcb"; 1185 compatible = "atmel,at91sam9x5-tcb";
1186 reg = <0xfc020000 0x100>; 1186 reg = <0xfc020000 0x100>;
1187 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>; 1187 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
1188 clocks = <&tcb1_clk>; 1188 clocks = <&tcb1_clk>, <&clk32k>;
1189 clock-names = "t0_clk"; 1189 clock-names = "t0_clk", "slow_clk";
1190 }; 1190 };
1191 1191
1192 adc0: adc@fc034000 { 1192 adc0: adc@fc034000 {
@@ -1270,11 +1270,13 @@
1270 rstc@fc068600 { 1270 rstc@fc068600 {
1271 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 1271 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1272 reg = <0xfc068600 0x10>; 1272 reg = <0xfc068600 0x10>;
1273 clocks = <&clk32k>;
1273 }; 1274 };
1274 1275
1275 shdwc@fc068610 { 1276 shdwc@fc068610 {
1276 compatible = "atmel,at91sam9x5-shdwc"; 1277 compatible = "atmel,at91sam9x5-shdwc";
1277 reg = <0xfc068610 0x10>; 1278 reg = <0xfc068610 0x10>;
1279 clocks = <&clk32k>;
1278 }; 1280 };
1279 1281
1280 pit: timer@fc068630 { 1282 pit: timer@fc068630 {
@@ -1287,6 +1289,7 @@
1287 watchdog@fc068640 { 1289 watchdog@fc068640 {
1288 compatible = "atmel,at91sam9260-wdt"; 1290 compatible = "atmel,at91sam9260-wdt";
1289 reg = <0xfc068640 0x10>; 1291 reg = <0xfc068640 0x10>;
1292 clocks = <&clk32k>;
1290 status = "disabled"; 1293 status = "disabled";
1291 }; 1294 };
1292 1295
@@ -1320,6 +1323,7 @@
1320 compatible = "atmel,at91rm9200-rtc"; 1323 compatible = "atmel,at91rm9200-rtc";
1321 reg = <0xfc0686b0 0x30>; 1324 reg = <0xfc0686b0 0x30>;
1322 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1325 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1326 clocks = <&clk32k>;
1323 }; 1327 };
1324 1328
1325 dbgu: serial@fc069000 { 1329 dbgu: serial@fc069000 {
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-03 03:26:30 -0400