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-rw-r--r--arch/x86/include/asm/amd_nb.h26
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c7
2 files changed, 19 insertions, 14 deletions
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index 3c56ef1ae068..5e828da2e18f 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -27,15 +27,23 @@ struct amd_l3_cache {
27}; 27};
28 28
29struct threshold_block { 29struct threshold_block {
30 unsigned int block; 30 unsigned int block; /* Number within bank */
31 unsigned int bank; 31 unsigned int bank; /* MCA bank the block belongs to */
32 unsigned int cpu; 32 unsigned int cpu; /* CPU which controls MCA bank */
33 u32 address; 33 u32 address; /* MSR address for the block */
34 u16 interrupt_enable; 34 u16 interrupt_enable; /* Enable/Disable APIC interrupt */
35 bool interrupt_capable; 35 bool interrupt_capable; /* Bank can generate an interrupt. */
36 u16 threshold_limit; 36
37 struct kobject kobj; 37 u16 threshold_limit; /*
38 struct list_head miscj; 38 * Value upon which threshold
39 * interrupt is generated.
40 */
41
42 struct kobject kobj; /* sysfs object */
43 struct list_head miscj; /*
44 * List of threshold blocks
45 * within a bank.
46 */
39}; 47};
40 48
41struct threshold_bank { 49struct threshold_bank {
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index a53eb1ba587e..9d656fd436ef 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * (c) 2005-2015 Advanced Micro Devices, Inc. 2 * (c) 2005-2016 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the 3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or 4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html 5 * http://www.gnu.org/licenses/gpl.html
@@ -201,10 +201,7 @@ static int lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi)
201 return 1; 201 return 1;
202}; 202};
203 203
204/* 204/* Reprogram MCx_MISC MSR behind this threshold bank. */
205 * Called via smp_call_function_single(), must be called with correct
206 * cpu affinity.
207 */
208static void threshold_restart_bank(void *_tr) 205static void threshold_restart_bank(void *_tr)
209{ 206{
210 struct thresh_restart *tr = _tr; 207 struct thresh_restart *tr = _tr;