4 files changed, 65 insertions, 91 deletions

diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 9b55a3f24be7..bf825f38d206 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -55,8 +55,6 @@ arm64-reloc-test-y := reloc_test_core.o reloc_test_syms.o
 arm64-obj-$(CONFIG_CRASH_DUMP)          += crash_dump.o
 arm64-obj-$(CONFIG_ARM_SDE_INTERFACE)   += sdei.o
 
-arm64-obj-$(CONFIG_KVM_INDIRECT_VECTORS)+= bpi.o
-
 obj-y                                   += $(arm64-obj-y) vdso/ probes/
 obj-m                                   += $(arm64-obj-m)
 head-y                                  := head.o
diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S
deleted file mode 100644
index 279e6ced7611..000000000000
--- a/arch/arm64/kernel/bpi.S
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Contains CPU specific branch predictor invalidation sequences
- *
- * Copyright (C) 2018 ARM Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <linux/linkage.h>
-#include <linux/arm-smccc.h>
-
-#include <asm/alternative.h>
-#include <asm/mmu.h>
-
-.macro hyp_ventry
-        .align 7
-1:      .rept 27
-        nop
-        .endr
-/*
- * The default sequence is to directly branch to the KVM vectors,
- * using the computed offset. This applies for VHE as well as
- * !ARM64_HARDEN_EL2_VECTORS.
- *
- * For ARM64_HARDEN_EL2_VECTORS configurations, this gets replaced
- * with:
- *
- * stp  x0, x1, [sp, #-16]!
- * movz x0, #(addr & 0xffff)
- * movk x0, #((addr >> 16) & 0xffff), lsl #16
- * movk x0, #((addr >> 32) & 0xffff), lsl #32
- * br   x0
- *
- * Where addr = kern_hyp_va(__kvm_hyp_vector) + vector-offset + 4.
- * See kvm_patch_vector_branch for details.
- */
-alternative_cb  kvm_patch_vector_branch
-        b       __kvm_hyp_vector + (1b - 0b)
-        nop
-        nop
-        nop
-        nop
-alternative_cb_end
-.endm
-
-.macro generate_vectors
-0:
-        .rept 16
-        hyp_ventry
-        .endr
-        .org 0b + SZ_2K         // Safety measure
-.endm
-
-
-        .text
-        .pushsection    .hyp.text, "ax"
-
-        .align  11
-ENTRY(__bp_harden_hyp_vecs_start)
-        .rept BP_HARDEN_EL2_SLOTS
-        generate_vectors
-        .endr
-ENTRY(__bp_harden_hyp_vecs_end)
-
-        .popsection
-
-ENTRY(__smccc_workaround_1_smc_start)
-        sub     sp, sp, #(8 * 4)
-        stp     x2, x3, [sp, #(8 * 0)]
-        stp     x0, x1, [sp, #(8 * 2)]
-        mov     w0, #ARM_SMCCC_ARCH_WORKAROUND_1
-        smc     #0
-        ldp     x2, x3, [sp, #(8 * 0)]
-        ldp     x0, x1, [sp, #(8 * 2)]
-        add     sp, sp, #(8 * 4)
-ENTRY(__smccc_workaround_1_smc_end)
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index fc9d017f2d33..a900befadfe8 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -86,7 +86,7 @@ atomic_t arm64_el2_vector_last_slot = ATOMIC_INIT(-1);
 
 DEFINE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data);
 
-#ifdef CONFIG_KVM
+#ifdef CONFIG_KVM_INDIRECT_VECTORS
 extern char __smccc_workaround_1_smc_start[];
 extern char __smccc_workaround_1_smc_end[];
 
@@ -137,7 +137,7 @@ static void __install_bp_hardening_cb(bp_hardening_cb_t fn,
 {
         __this_cpu_write(bp_hardening_data.fn, fn);
 }
-#endif  /* CONFIG_KVM */
+#endif  /* CONFIG_KVM_INDIRECT_VECTORS */
 
 static void  install_bp_hardening_cb(const struct arm64_cpu_capabilities *entry,
                                      bp_hardening_cb_t fn,
diff --git a/arch/arm64/kvm/hyp/hyp-entry.S b/arch/arm64/kvm/hyp/hyp-entry.S
index 87dfecce82b1..bffece27b5c1 100644
--- a/arch/arm64/kvm/hyp/hyp-entry.S
+++ b/arch/arm64/kvm/hyp/hyp-entry.S
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 - ARM Ltd
+ * Copyright (C) 2015-2018 - ARM Ltd
  * Author: Marc Zyngier <marc.zyngier@arm.com>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -24,6 +24,7 @@
 #include <asm/kvm_arm.h>
 #include <asm/kvm_asm.h>
 #include <asm/kvm_mmu.h>
+#include <asm/mmu.h>
 
         .text
         .pushsection    .hyp.text, "ax"
@@ -237,3 +238,64 @@ ENTRY(__kvm_hyp_vector)
         invalid_vect    el1_fiq_invalid         // FIQ 32-bit EL1
         valid_vect      el1_error               // Error 32-bit EL1
 ENDPROC(__kvm_hyp_vector)
+
+#ifdef CONFIG_KVM_INDIRECT_VECTORS
+.macro hyp_ventry
+        .align 7
+1:      .rept 27
+        nop
+        .endr
+/*
+ * The default sequence is to directly branch to the KVM vectors,
+ * using the computed offset. This applies for VHE as well as
+ * !ARM64_HARDEN_EL2_VECTORS.
+ *
+ * For ARM64_HARDEN_EL2_VECTORS configurations, this gets replaced
+ * with:
+ *
+ * stp  x0, x1, [sp, #-16]!
+ * movz x0, #(addr & 0xffff)
+ * movk x0, #((addr >> 16) & 0xffff), lsl #16
+ * movk x0, #((addr >> 32) & 0xffff), lsl #32
+ * br   x0
+ *
+ * Where addr = kern_hyp_va(__kvm_hyp_vector) + vector-offset + 4.
+ * See kvm_patch_vector_branch for details.
+ */
+alternative_cb  kvm_patch_vector_branch
+        b       __kvm_hyp_vector + (1b - 0b)
+        nop
+        nop
+        nop
+        nop
+alternative_cb_end
+.endm
+
+.macro generate_vectors
+0:
+        .rept 16
+        hyp_ventry
+        .endr
+        .org 0b + SZ_2K         // Safety measure
+.endm
+
+        .align  11
+ENTRY(__bp_harden_hyp_vecs_start)
+        .rept BP_HARDEN_EL2_SLOTS
+        generate_vectors
+        .endr
+ENTRY(__bp_harden_hyp_vecs_end)
+
+        .popsection
+
+ENTRY(__smccc_workaround_1_smc_start)
+        sub     sp, sp, #(8 * 4)
+        stp     x2, x3, [sp, #(8 * 0)]
+        stp     x0, x1, [sp, #(8 * 2)]
+        mov     w0, #ARM_SMCCC_ARCH_WORKAROUND_1
+        smc     #0
+        ldp     x2, x3, [sp, #(8 * 0)]
+        ldp     x0, x1, [sp, #(8 * 2)]
+        add     sp, sp, #(8 * 4)
+ENTRY(__smccc_workaround_1_smc_end)
+#endif