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-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433.dtsi43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index abaf6b4d599d..80dc0e8344b2 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -751,6 +751,29 @@
751 }; 751 };
752 }; 752 };
753 753
754 decon_tv: decon@13880000 {
755 compatible = "samsung,exynos5433-decon-tv";
756 reg = <0x13880000 0x20b8>;
757 clocks = <&cmu_disp CLK_PCLK_DECON_TV>,
758 <&cmu_disp CLK_ACLK_DECON_TV>,
759 <&cmu_disp CLK_ACLK_SMMU_TV0X>,
760 <&cmu_disp CLK_ACLK_XIU_TV0X>,
761 <&cmu_disp CLK_PCLK_SMMU_TV0X>,
762 <&cmu_disp CLK_SCLK_DECON_TV_VCLK>,
763 <&cmu_disp CLK_SCLK_DECON_TV_ECLK>;
764 clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
765 "aclk_xiu_decon0x", "pclk_smmu_decon0x",
766 "sclk_decon_vclk", "sclk_decon_eclk";
767 samsung,disp-sysreg = <&syscon_disp>;
768 interrupt-names = "fifo", "vsync", "lcd_sys";
769 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
772 status = "disabled";
773 iommus = <&sysmmu_tv0x>, <&sysmmu_tv1x>;
774 iommu-names = "m0", "m1";
775 };
776
754 dsi: dsi@13900000 { 777 dsi: dsi@13900000 {
755 compatible = "samsung,exynos5433-mipi-dsi"; 778 compatible = "samsung,exynos5433-mipi-dsi";
756 reg = <0x13900000 0xC0>; 779 reg = <0x13900000 0xC0>;
@@ -912,6 +935,26 @@
912 #iommu-cells = <0>; 935 #iommu-cells = <0>;
913 }; 936 };
914 937
938 sysmmu_tv0x: sysmmu@13a20000 {
939 compatible = "samsung,exynos-sysmmu";
940 reg = <0x13a20000 0x1000>;
941 interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
942 clock-names = "pclk", "aclk";
943 clocks = <&cmu_disp CLK_PCLK_SMMU_TV0X>,
944 <&cmu_disp CLK_ACLK_SMMU_TV0X>;
945 #iommu-cells = <0>;
946 };
947
948 sysmmu_tv1x: sysmmu@13a30000 {
949 compatible = "samsung,exynos-sysmmu";
950 reg = <0x13a30000 0x1000>;
951 interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
952 clock-names = "pclk", "aclk";
953 clocks = <&cmu_disp CLK_PCLK_SMMU_TV1X>,
954 <&cmu_disp CLK_ACLK_SMMU_TV1X>;
955 #iommu-cells = <0>;
956 };
957
915 sysmmu_gscl0: sysmmu@13c80000 { 958 sysmmu_gscl0: sysmmu@13c80000 {
916 compatible = "samsung,exynos-sysmmu"; 959 compatible = "samsung,exynos-sysmmu";
917 reg = <0x13C80000 0x1000>; 960 reg = <0x13C80000 0x1000>;