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-rw-r--r--drivers/net/ethernet/sfc/ef10.c251
-rw-r--r--drivers/net/ethernet/sfc/mcdi_pcol.h4
-rw-r--r--drivers/net/ethernet/sfc/nic.h106
3 files changed, 182 insertions, 179 deletions
diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c
index 22c5dc3ba43b..f44a56a68f3a 100644
--- a/drivers/net/ethernet/sfc/ef10.c
+++ b/drivers/net/ethernet/sfc/ef10.c
@@ -991,93 +991,94 @@ static int efx_ef10_reset(struct efx_nic *efx, enum reset_type reset_type)
991 [GENERIC_STAT_ ## ext_name] = { #ext_name, 0, 0 } 991 [GENERIC_STAT_ ## ext_name] = { #ext_name, 0, 0 }
992 992
993static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = { 993static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = {
994 EF10_DMA_STAT(tx_bytes, TX_BYTES), 994 EF10_DMA_STAT(port_tx_bytes, TX_BYTES),
995 EF10_DMA_STAT(tx_packets, TX_PKTS), 995 EF10_DMA_STAT(port_tx_packets, TX_PKTS),
996 EF10_DMA_STAT(tx_pause, TX_PAUSE_PKTS), 996 EF10_DMA_STAT(port_tx_pause, TX_PAUSE_PKTS),
997 EF10_DMA_STAT(tx_control, TX_CONTROL_PKTS), 997 EF10_DMA_STAT(port_tx_control, TX_CONTROL_PKTS),
998 EF10_DMA_STAT(tx_unicast, TX_UNICAST_PKTS), 998 EF10_DMA_STAT(port_tx_unicast, TX_UNICAST_PKTS),
999 EF10_DMA_STAT(tx_multicast, TX_MULTICAST_PKTS), 999 EF10_DMA_STAT(port_tx_multicast, TX_MULTICAST_PKTS),
1000 EF10_DMA_STAT(tx_broadcast, TX_BROADCAST_PKTS), 1000 EF10_DMA_STAT(port_tx_broadcast, TX_BROADCAST_PKTS),
1001 EF10_DMA_STAT(tx_lt64, TX_LT64_PKTS), 1001 EF10_DMA_STAT(port_tx_lt64, TX_LT64_PKTS),
1002 EF10_DMA_STAT(tx_64, TX_64_PKTS), 1002 EF10_DMA_STAT(port_tx_64, TX_64_PKTS),
1003 EF10_DMA_STAT(tx_65_to_127, TX_65_TO_127_PKTS), 1003 EF10_DMA_STAT(port_tx_65_to_127, TX_65_TO_127_PKTS),
1004 EF10_DMA_STAT(tx_128_to_255, TX_128_TO_255_PKTS), 1004 EF10_DMA_STAT(port_tx_128_to_255, TX_128_TO_255_PKTS),
1005 EF10_DMA_STAT(tx_256_to_511, TX_256_TO_511_PKTS), 1005 EF10_DMA_STAT(port_tx_256_to_511, TX_256_TO_511_PKTS),
1006 EF10_DMA_STAT(tx_512_to_1023, TX_512_TO_1023_PKTS), 1006 EF10_DMA_STAT(port_tx_512_to_1023, TX_512_TO_1023_PKTS),
1007 EF10_DMA_STAT(tx_1024_to_15xx, TX_1024_TO_15XX_PKTS), 1007 EF10_DMA_STAT(port_tx_1024_to_15xx, TX_1024_TO_15XX_PKTS),
1008 EF10_DMA_STAT(tx_15xx_to_jumbo, TX_15XX_TO_JUMBO_PKTS), 1008 EF10_DMA_STAT(port_tx_15xx_to_jumbo, TX_15XX_TO_JUMBO_PKTS),
1009 EF10_DMA_STAT(rx_bytes, RX_BYTES), 1009 EF10_DMA_STAT(port_rx_bytes, RX_BYTES),
1010 EF10_DMA_INVIS_STAT(rx_bytes_minus_good_bytes, RX_BAD_BYTES), 1010 EF10_DMA_INVIS_STAT(port_rx_bytes_minus_good_bytes, RX_BAD_BYTES),
1011 EF10_OTHER_STAT(rx_good_bytes), 1011 EF10_OTHER_STAT(port_rx_good_bytes),
1012 EF10_OTHER_STAT(rx_bad_bytes), 1012 EF10_OTHER_STAT(port_rx_bad_bytes),
1013 EF10_DMA_STAT(rx_packets, RX_PKTS), 1013 EF10_DMA_STAT(port_rx_packets, RX_PKTS),
1014 EF10_DMA_STAT(rx_good, RX_GOOD_PKTS), 1014 EF10_DMA_STAT(port_rx_good, RX_GOOD_PKTS),
1015 EF10_DMA_STAT(rx_bad, RX_BAD_FCS_PKTS), 1015 EF10_DMA_STAT(port_rx_bad, RX_BAD_FCS_PKTS),
1016 EF10_DMA_STAT(rx_pause, RX_PAUSE_PKTS), 1016 EF10_DMA_STAT(port_rx_pause, RX_PAUSE_PKTS),
1017 EF10_DMA_STAT(rx_control, RX_CONTROL_PKTS), 1017 EF10_DMA_STAT(port_rx_control, RX_CONTROL_PKTS),
1018 EF10_DMA_STAT(rx_unicast, RX_UNICAST_PKTS), 1018 EF10_DMA_STAT(port_rx_unicast, RX_UNICAST_PKTS),
1019 EF10_DMA_STAT(rx_multicast, RX_MULTICAST_PKTS), 1019 EF10_DMA_STAT(port_rx_multicast, RX_MULTICAST_PKTS),
1020 EF10_DMA_STAT(rx_broadcast, RX_BROADCAST_PKTS), 1020 EF10_DMA_STAT(port_rx_broadcast, RX_BROADCAST_PKTS),
1021 EF10_DMA_STAT(rx_lt64, RX_UNDERSIZE_PKTS), 1021 EF10_DMA_STAT(port_rx_lt64, RX_UNDERSIZE_PKTS),
1022 EF10_DMA_STAT(rx_64, RX_64_PKTS), 1022 EF10_DMA_STAT(port_rx_64, RX_64_PKTS),
1023 EF10_DMA_STAT(rx_65_to_127, RX_65_TO_127_PKTS), 1023 EF10_DMA_STAT(port_rx_65_to_127, RX_65_TO_127_PKTS),
1024 EF10_DMA_STAT(rx_128_to_255, RX_128_TO_255_PKTS), 1024 EF10_DMA_STAT(port_rx_128_to_255, RX_128_TO_255_PKTS),
1025 EF10_DMA_STAT(rx_256_to_511, RX_256_TO_511_PKTS), 1025 EF10_DMA_STAT(port_rx_256_to_511, RX_256_TO_511_PKTS),
1026 EF10_DMA_STAT(rx_512_to_1023, RX_512_TO_1023_PKTS), 1026 EF10_DMA_STAT(port_rx_512_to_1023, RX_512_TO_1023_PKTS),
1027 EF10_DMA_STAT(rx_1024_to_15xx, RX_1024_TO_15XX_PKTS), 1027 EF10_DMA_STAT(port_rx_1024_to_15xx, RX_1024_TO_15XX_PKTS),
1028 EF10_DMA_STAT(rx_15xx_to_jumbo, RX_15XX_TO_JUMBO_PKTS), 1028 EF10_DMA_STAT(port_rx_15xx_to_jumbo, RX_15XX_TO_JUMBO_PKTS),
1029 EF10_DMA_STAT(rx_gtjumbo, RX_GTJUMBO_PKTS), 1029 EF10_DMA_STAT(port_rx_gtjumbo, RX_GTJUMBO_PKTS),
1030 EF10_DMA_STAT(rx_bad_gtjumbo, RX_JABBER_PKTS), 1030 EF10_DMA_STAT(port_rx_bad_gtjumbo, RX_JABBER_PKTS),
1031 EF10_DMA_STAT(rx_overflow, RX_OVERFLOW_PKTS), 1031 EF10_DMA_STAT(port_rx_overflow, RX_OVERFLOW_PKTS),
1032 EF10_DMA_STAT(rx_align_error, RX_ALIGN_ERROR_PKTS), 1032 EF10_DMA_STAT(port_rx_align_error, RX_ALIGN_ERROR_PKTS),
1033 EF10_DMA_STAT(rx_length_error, RX_LENGTH_ERROR_PKTS), 1033 EF10_DMA_STAT(port_rx_length_error, RX_LENGTH_ERROR_PKTS),
1034 EF10_DMA_STAT(rx_nodesc_drops, RX_NODESC_DROPS), 1034 EF10_DMA_STAT(port_rx_nodesc_drops, RX_NODESC_DROPS),
1035 GENERIC_SW_STAT(rx_nodesc_trunc), 1035 GENERIC_SW_STAT(rx_nodesc_trunc),
1036 GENERIC_SW_STAT(rx_noskb_drops), 1036 GENERIC_SW_STAT(rx_noskb_drops),
1037 EF10_DMA_STAT(rx_pm_trunc_bb_overflow, PM_TRUNC_BB_OVERFLOW), 1037 EF10_DMA_STAT(port_rx_pm_trunc_bb_overflow, PM_TRUNC_BB_OVERFLOW),
1038 EF10_DMA_STAT(rx_pm_discard_bb_overflow, PM_DISCARD_BB_OVERFLOW), 1038 EF10_DMA_STAT(port_rx_pm_discard_bb_overflow, PM_DISCARD_BB_OVERFLOW),
1039 EF10_DMA_STAT(rx_pm_trunc_vfifo_full, PM_TRUNC_VFIFO_FULL), 1039 EF10_DMA_STAT(port_rx_pm_trunc_vfifo_full, PM_TRUNC_VFIFO_FULL),
1040 EF10_DMA_STAT(rx_pm_discard_vfifo_full, PM_DISCARD_VFIFO_FULL), 1040 EF10_DMA_STAT(port_rx_pm_discard_vfifo_full, PM_DISCARD_VFIFO_FULL),
1041 EF10_DMA_STAT(rx_pm_trunc_qbb, PM_TRUNC_QBB), 1041 EF10_DMA_STAT(port_rx_pm_trunc_qbb, PM_TRUNC_QBB),
1042 EF10_DMA_STAT(rx_pm_discard_qbb, PM_DISCARD_QBB), 1042 EF10_DMA_STAT(port_rx_pm_discard_qbb, PM_DISCARD_QBB),
1043 EF10_DMA_STAT(rx_pm_discard_mapping, PM_DISCARD_MAPPING), 1043 EF10_DMA_STAT(port_rx_pm_discard_mapping, PM_DISCARD_MAPPING),
1044 EF10_DMA_STAT(rx_dp_q_disabled_packets, RXDP_Q_DISABLED_PKTS), 1044 EF10_DMA_STAT(port_rx_dp_q_disabled_packets, RXDP_Q_DISABLED_PKTS),
1045 EF10_DMA_STAT(rx_dp_di_dropped_packets, RXDP_DI_DROPPED_PKTS), 1045 EF10_DMA_STAT(port_rx_dp_di_dropped_packets, RXDP_DI_DROPPED_PKTS),
1046 EF10_DMA_STAT(rx_dp_streaming_packets, RXDP_STREAMING_PKTS), 1046 EF10_DMA_STAT(port_rx_dp_streaming_packets, RXDP_STREAMING_PKTS),
1047 EF10_DMA_STAT(rx_dp_hlb_fetch, RXDP_EMERGENCY_FETCH_CONDITIONS), 1047 EF10_DMA_STAT(port_rx_dp_hlb_fetch, RXDP_HLB_FETCH_CONDITIONS),
1048 EF10_DMA_STAT(rx_dp_hlb_wait, RXDP_EMERGENCY_WAIT_CONDITIONS), 1048 EF10_DMA_STAT(port_rx_dp_hlb_wait, RXDP_HLB_WAIT_CONDITIONS),
1049}; 1049};
1050 1050
1051#define HUNT_COMMON_STAT_MASK ((1ULL << EF10_STAT_tx_bytes) | \ 1051#define HUNT_COMMON_STAT_MASK ((1ULL << EF10_STAT_port_tx_bytes) | \
1052 (1ULL << EF10_STAT_tx_packets) | \ 1052 (1ULL << EF10_STAT_port_tx_packets) | \
1053 (1ULL << EF10_STAT_tx_pause) | \ 1053 (1ULL << EF10_STAT_port_tx_pause) | \
1054 (1ULL << EF10_STAT_tx_unicast) | \ 1054 (1ULL << EF10_STAT_port_tx_unicast) | \
1055 (1ULL << EF10_STAT_tx_multicast) | \ 1055 (1ULL << EF10_STAT_port_tx_multicast) | \
1056 (1ULL << EF10_STAT_tx_broadcast) | \ 1056 (1ULL << EF10_STAT_port_tx_broadcast) | \
1057 (1ULL << EF10_STAT_rx_bytes) | \ 1057 (1ULL << EF10_STAT_port_rx_bytes) | \
1058 (1ULL << EF10_STAT_rx_bytes_minus_good_bytes) | \ 1058 (1ULL << \
1059 (1ULL << EF10_STAT_rx_good_bytes) | \ 1059 EF10_STAT_port_rx_bytes_minus_good_bytes) | \
1060 (1ULL << EF10_STAT_rx_bad_bytes) | \ 1060 (1ULL << EF10_STAT_port_rx_good_bytes) | \
1061 (1ULL << EF10_STAT_rx_packets) | \ 1061 (1ULL << EF10_STAT_port_rx_bad_bytes) | \
1062 (1ULL << EF10_STAT_rx_good) | \ 1062 (1ULL << EF10_STAT_port_rx_packets) | \
1063 (1ULL << EF10_STAT_rx_bad) | \ 1063 (1ULL << EF10_STAT_port_rx_good) | \
1064 (1ULL << EF10_STAT_rx_pause) | \ 1064 (1ULL << EF10_STAT_port_rx_bad) | \
1065 (1ULL << EF10_STAT_rx_control) | \ 1065 (1ULL << EF10_STAT_port_rx_pause) | \
1066 (1ULL << EF10_STAT_rx_unicast) | \ 1066 (1ULL << EF10_STAT_port_rx_control) | \
1067 (1ULL << EF10_STAT_rx_multicast) | \ 1067 (1ULL << EF10_STAT_port_rx_unicast) | \
1068 (1ULL << EF10_STAT_rx_broadcast) | \ 1068 (1ULL << EF10_STAT_port_rx_multicast) | \
1069 (1ULL << EF10_STAT_rx_lt64) | \ 1069 (1ULL << EF10_STAT_port_rx_broadcast) | \
1070 (1ULL << EF10_STAT_rx_64) | \ 1070 (1ULL << EF10_STAT_port_rx_lt64) | \
1071 (1ULL << EF10_STAT_rx_65_to_127) | \ 1071 (1ULL << EF10_STAT_port_rx_64) | \
1072 (1ULL << EF10_STAT_rx_128_to_255) | \ 1072 (1ULL << EF10_STAT_port_rx_65_to_127) | \
1073 (1ULL << EF10_STAT_rx_256_to_511) | \ 1073 (1ULL << EF10_STAT_port_rx_128_to_255) | \
1074 (1ULL << EF10_STAT_rx_512_to_1023) | \ 1074 (1ULL << EF10_STAT_port_rx_256_to_511) | \
1075 (1ULL << EF10_STAT_rx_1024_to_15xx) | \ 1075 (1ULL << EF10_STAT_port_rx_512_to_1023) |\
1076 (1ULL << EF10_STAT_rx_15xx_to_jumbo) | \ 1076 (1ULL << EF10_STAT_port_rx_1024_to_15xx) |\
1077 (1ULL << EF10_STAT_rx_gtjumbo) | \ 1077 (1ULL << EF10_STAT_port_rx_15xx_to_jumbo) |\
1078 (1ULL << EF10_STAT_rx_bad_gtjumbo) | \ 1078 (1ULL << EF10_STAT_port_rx_gtjumbo) | \
1079 (1ULL << EF10_STAT_rx_overflow) | \ 1079 (1ULL << EF10_STAT_port_rx_bad_gtjumbo) |\
1080 (1ULL << EF10_STAT_rx_nodesc_drops) | \ 1080 (1ULL << EF10_STAT_port_rx_overflow) | \
1081 (1ULL << EF10_STAT_port_rx_nodesc_drops) |\
1081 (1ULL << GENERIC_STAT_rx_nodesc_trunc) | \ 1082 (1ULL << GENERIC_STAT_rx_nodesc_trunc) | \
1082 (1ULL << GENERIC_STAT_rx_noskb_drops)) 1083 (1ULL << GENERIC_STAT_rx_noskb_drops))
1083 1084
@@ -1085,39 +1086,39 @@ static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = {
1085 * switchable port we do not expose these because they might not 1086 * switchable port we do not expose these because they might not
1086 * include all the packets they should. 1087 * include all the packets they should.
1087 */ 1088 */
1088#define HUNT_10G_ONLY_STAT_MASK ((1ULL << EF10_STAT_tx_control) | \ 1089#define HUNT_10G_ONLY_STAT_MASK ((1ULL << EF10_STAT_port_tx_control) | \
1089 (1ULL << EF10_STAT_tx_lt64) | \ 1090 (1ULL << EF10_STAT_port_tx_lt64) | \
1090 (1ULL << EF10_STAT_tx_64) | \ 1091 (1ULL << EF10_STAT_port_tx_64) | \
1091 (1ULL << EF10_STAT_tx_65_to_127) | \ 1092 (1ULL << EF10_STAT_port_tx_65_to_127) |\
1092 (1ULL << EF10_STAT_tx_128_to_255) | \ 1093 (1ULL << EF10_STAT_port_tx_128_to_255) |\
1093 (1ULL << EF10_STAT_tx_256_to_511) | \ 1094 (1ULL << EF10_STAT_port_tx_256_to_511) |\
1094 (1ULL << EF10_STAT_tx_512_to_1023) | \ 1095 (1ULL << EF10_STAT_port_tx_512_to_1023) |\
1095 (1ULL << EF10_STAT_tx_1024_to_15xx) | \ 1096 (1ULL << EF10_STAT_port_tx_1024_to_15xx) |\
1096 (1ULL << EF10_STAT_tx_15xx_to_jumbo)) 1097 (1ULL << EF10_STAT_port_tx_15xx_to_jumbo))
1097 1098
1098/* These statistics are only provided by the 40G MAC. For a 10G/40G 1099/* These statistics are only provided by the 40G MAC. For a 10G/40G
1099 * switchable port we do expose these because the errors will otherwise 1100 * switchable port we do expose these because the errors will otherwise
1100 * be silent. 1101 * be silent.
1101 */ 1102 */
1102#define HUNT_40G_EXTRA_STAT_MASK ((1ULL << EF10_STAT_rx_align_error) | \ 1103#define HUNT_40G_EXTRA_STAT_MASK ((1ULL << EF10_STAT_port_rx_align_error) |\
1103 (1ULL << EF10_STAT_rx_length_error)) 1104 (1ULL << EF10_STAT_port_rx_length_error))
1104 1105
1105/* These statistics are only provided if the firmware supports the 1106/* These statistics are only provided if the firmware supports the
1106 * capability PM_AND_RXDP_COUNTERS. 1107 * capability PM_AND_RXDP_COUNTERS.
1107 */ 1108 */
1108#define HUNT_PM_AND_RXDP_STAT_MASK ( \ 1109#define HUNT_PM_AND_RXDP_STAT_MASK ( \
1109 (1ULL << EF10_STAT_rx_pm_trunc_bb_overflow) | \ 1110 (1ULL << EF10_STAT_port_rx_pm_trunc_bb_overflow) | \
1110 (1ULL << EF10_STAT_rx_pm_discard_bb_overflow) | \ 1111 (1ULL << EF10_STAT_port_rx_pm_discard_bb_overflow) | \
1111 (1ULL << EF10_STAT_rx_pm_trunc_vfifo_full) | \ 1112 (1ULL << EF10_STAT_port_rx_pm_trunc_vfifo_full) | \
1112 (1ULL << EF10_STAT_rx_pm_discard_vfifo_full) | \ 1113 (1ULL << EF10_STAT_port_rx_pm_discard_vfifo_full) | \
1113 (1ULL << EF10_STAT_rx_pm_trunc_qbb) | \ 1114 (1ULL << EF10_STAT_port_rx_pm_trunc_qbb) | \
1114 (1ULL << EF10_STAT_rx_pm_discard_qbb) | \ 1115 (1ULL << EF10_STAT_port_rx_pm_discard_qbb) | \
1115 (1ULL << EF10_STAT_rx_pm_discard_mapping) | \ 1116 (1ULL << EF10_STAT_port_rx_pm_discard_mapping) | \
1116 (1ULL << EF10_STAT_rx_dp_q_disabled_packets) | \ 1117 (1ULL << EF10_STAT_port_rx_dp_q_disabled_packets) | \
1117 (1ULL << EF10_STAT_rx_dp_di_dropped_packets) | \ 1118 (1ULL << EF10_STAT_port_rx_dp_di_dropped_packets) | \
1118 (1ULL << EF10_STAT_rx_dp_streaming_packets) | \ 1119 (1ULL << EF10_STAT_port_rx_dp_streaming_packets) | \
1119 (1ULL << EF10_STAT_rx_dp_hlb_fetch) | \ 1120 (1ULL << EF10_STAT_port_rx_dp_hlb_fetch) | \
1120 (1ULL << EF10_STAT_rx_dp_hlb_wait)) 1121 (1ULL << EF10_STAT_port_rx_dp_hlb_wait))
1121 1122
1122static u64 efx_ef10_raw_stat_mask(struct efx_nic *efx) 1123static u64 efx_ef10_raw_stat_mask(struct efx_nic *efx)
1123{ 1124{
@@ -1183,12 +1184,13 @@ static int efx_ef10_try_update_nic_stats(struct efx_nic *efx)
1183 return -EAGAIN; 1184 return -EAGAIN;
1184 1185
1185 /* Update derived statistics */ 1186 /* Update derived statistics */
1186 efx_nic_fix_nodesc_drop_stat(efx, &stats[EF10_STAT_rx_nodesc_drops]); 1187 efx_nic_fix_nodesc_drop_stat(efx,
1187 stats[EF10_STAT_rx_good_bytes] = 1188 &stats[EF10_STAT_port_rx_nodesc_drops]);
1188 stats[EF10_STAT_rx_bytes] - 1189 stats[EF10_STAT_port_rx_good_bytes] =
1189 stats[EF10_STAT_rx_bytes_minus_good_bytes]; 1190 stats[EF10_STAT_port_rx_bytes] -
1190 efx_update_diff_stat(&stats[EF10_STAT_rx_bad_bytes], 1191 stats[EF10_STAT_port_rx_bytes_minus_good_bytes];
1191 stats[EF10_STAT_rx_bytes_minus_good_bytes]); 1192 efx_update_diff_stat(&stats[EF10_STAT_port_rx_bad_bytes],
1193 stats[EF10_STAT_port_rx_bytes_minus_good_bytes]);
1192 efx_update_sw_stats(efx, stats); 1194 efx_update_sw_stats(efx, stats);
1193 return 0; 1195 return 0;
1194} 1196}
@@ -1224,20 +1226,21 @@ static size_t efx_ef10_update_stats(struct efx_nic *efx, u64 *full_stats,
1224 } 1226 }
1225 1227
1226 if (core_stats) { 1228 if (core_stats) {
1227 core_stats->rx_packets = stats[EF10_STAT_rx_packets]; 1229 core_stats->rx_packets = stats[EF10_STAT_port_rx_packets];
1228 core_stats->tx_packets = stats[EF10_STAT_tx_packets]; 1230 core_stats->tx_packets = stats[EF10_STAT_port_tx_packets];
1229 core_stats->rx_bytes = stats[EF10_STAT_rx_bytes]; 1231 core_stats->rx_bytes = stats[EF10_STAT_port_rx_bytes];
1230 core_stats->tx_bytes = stats[EF10_STAT_tx_bytes]; 1232 core_stats->tx_bytes = stats[EF10_STAT_port_tx_bytes];
1231 core_stats->rx_dropped = stats[EF10_STAT_rx_nodesc_drops] + 1233 core_stats->rx_dropped = stats[EF10_STAT_port_rx_nodesc_drops] +
1232 stats[GENERIC_STAT_rx_nodesc_trunc] + 1234 stats[GENERIC_STAT_rx_nodesc_trunc] +
1233 stats[GENERIC_STAT_rx_noskb_drops]; 1235 stats[GENERIC_STAT_rx_noskb_drops];
1234 core_stats->multicast = stats[EF10_STAT_rx_multicast]; 1236 core_stats->multicast = stats[EF10_STAT_port_rx_multicast];
1235 core_stats->rx_length_errors = 1237 core_stats->rx_length_errors =
1236 stats[EF10_STAT_rx_gtjumbo] + 1238 stats[EF10_STAT_port_rx_gtjumbo] +
1237 stats[EF10_STAT_rx_length_error]; 1239 stats[EF10_STAT_port_rx_length_error];
1238 core_stats->rx_crc_errors = stats[EF10_STAT_rx_bad]; 1240 core_stats->rx_crc_errors = stats[EF10_STAT_port_rx_bad];
1239 core_stats->rx_frame_errors = stats[EF10_STAT_rx_align_error]; 1241 core_stats->rx_frame_errors =
1240 core_stats->rx_fifo_errors = stats[EF10_STAT_rx_overflow]; 1242 stats[EF10_STAT_port_rx_align_error];
1243 core_stats->rx_fifo_errors = stats[EF10_STAT_port_rx_overflow];
1241 core_stats->rx_errors = (core_stats->rx_length_errors + 1244 core_stats->rx_errors = (core_stats->rx_length_errors +
1242 core_stats->rx_crc_errors + 1245 core_stats->rx_crc_errors +
1243 core_stats->rx_frame_errors); 1246 core_stats->rx_frame_errors);
@@ -1372,7 +1375,7 @@ static int efx_ef10_mcdi_poll_reboot(struct efx_nic *efx)
1372 /* MAC statistics have been cleared on the NIC; clear the local 1375 /* MAC statistics have been cleared on the NIC; clear the local
1373 * statistic that we update with efx_update_diff_stat(). 1376 * statistic that we update with efx_update_diff_stat().
1374 */ 1377 */
1375 nic_data->stats[EF10_STAT_rx_bad_bytes] = 0; 1378 nic_data->stats[EF10_STAT_port_rx_bad_bytes] = 0;
1376 1379
1377 return -EIO; 1380 return -EIO;
1378} 1381}
diff --git a/drivers/net/ethernet/sfc/mcdi_pcol.h b/drivers/net/ethernet/sfc/mcdi_pcol.h
index 9efdf0a5df64..1e11bb8a95a3 100644
--- a/drivers/net/ethernet/sfc/mcdi_pcol.h
+++ b/drivers/net/ethernet/sfc/mcdi_pcol.h
@@ -2891,11 +2891,11 @@
2891/* enum: RXDP counter: Number of times an emergency descriptor fetch was 2891/* enum: RXDP counter: Number of times an emergency descriptor fetch was
2892 * performed. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. 2892 * performed. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
2893 */ 2893 */
2894#define MC_CMD_MAC_RXDP_EMERGENCY_FETCH_CONDITIONS 0x47 2894#define MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS 0x47
2895/* enum: RXDP counter: Number of times the DPCPU waited for an existing 2895/* enum: RXDP counter: Number of times the DPCPU waited for an existing
2896 * descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. 2896 * descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
2897 */ 2897 */
2898#define MC_CMD_MAC_RXDP_EMERGENCY_WAIT_CONDITIONS 0x48 2898#define MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS 0x48
2899/* enum: Start of GMAC stats buffer space, for Siena only. */ 2899/* enum: Start of GMAC stats buffer space, for Siena only. */
2900#define MC_CMD_GMAC_DMABUF_START 0x40 2900#define MC_CMD_GMAC_DMABUF_START 0x40
2901/* enum: End of GMAC stats buffer space, for Siena only. */ 2901/* enum: End of GMAC stats buffer space, for Siena only. */
diff --git a/drivers/net/ethernet/sfc/nic.h b/drivers/net/ethernet/sfc/nic.h
index e146e30780a1..8b69a31a0ee4 100644
--- a/drivers/net/ethernet/sfc/nic.h
+++ b/drivers/net/ethernet/sfc/nic.h
@@ -407,59 +407,59 @@ struct siena_nic_data {
407}; 407};
408 408
409enum { 409enum {
410 EF10_STAT_tx_bytes = GENERIC_STAT_COUNT, 410 EF10_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
411 EF10_STAT_tx_packets, 411 EF10_STAT_port_tx_packets,
412 EF10_STAT_tx_pause, 412 EF10_STAT_port_tx_pause,
413 EF10_STAT_tx_control, 413 EF10_STAT_port_tx_control,
414 EF10_STAT_tx_unicast, 414 EF10_STAT_port_tx_unicast,
415 EF10_STAT_tx_multicast, 415 EF10_STAT_port_tx_multicast,
416 EF10_STAT_tx_broadcast, 416 EF10_STAT_port_tx_broadcast,
417 EF10_STAT_tx_lt64, 417 EF10_STAT_port_tx_lt64,
418 EF10_STAT_tx_64, 418 EF10_STAT_port_tx_64,
419 EF10_STAT_tx_65_to_127, 419 EF10_STAT_port_tx_65_to_127,
420 EF10_STAT_tx_128_to_255, 420 EF10_STAT_port_tx_128_to_255,
421 EF10_STAT_tx_256_to_511, 421 EF10_STAT_port_tx_256_to_511,
422 EF10_STAT_tx_512_to_1023, 422 EF10_STAT_port_tx_512_to_1023,
423 EF10_STAT_tx_1024_to_15xx, 423 EF10_STAT_port_tx_1024_to_15xx,
424 EF10_STAT_tx_15xx_to_jumbo, 424 EF10_STAT_port_tx_15xx_to_jumbo,
425 EF10_STAT_rx_bytes, 425 EF10_STAT_port_rx_bytes,
426 EF10_STAT_rx_bytes_minus_good_bytes, 426 EF10_STAT_port_rx_bytes_minus_good_bytes,
427 EF10_STAT_rx_good_bytes, 427 EF10_STAT_port_rx_good_bytes,
428 EF10_STAT_rx_bad_bytes, 428 EF10_STAT_port_rx_bad_bytes,
429 EF10_STAT_rx_packets, 429 EF10_STAT_port_rx_packets,
430 EF10_STAT_rx_good, 430 EF10_STAT_port_rx_good,
431 EF10_STAT_rx_bad, 431 EF10_STAT_port_rx_bad,
432 EF10_STAT_rx_pause, 432 EF10_STAT_port_rx_pause,
433 EF10_STAT_rx_control, 433 EF10_STAT_port_rx_control,
434 EF10_STAT_rx_unicast, 434 EF10_STAT_port_rx_unicast,
435 EF10_STAT_rx_multicast, 435 EF10_STAT_port_rx_multicast,
436 EF10_STAT_rx_broadcast, 436 EF10_STAT_port_rx_broadcast,
437 EF10_STAT_rx_lt64, 437 EF10_STAT_port_rx_lt64,
438 EF10_STAT_rx_64, 438 EF10_STAT_port_rx_64,
439 EF10_STAT_rx_65_to_127, 439 EF10_STAT_port_rx_65_to_127,
440 EF10_STAT_rx_128_to_255, 440 EF10_STAT_port_rx_128_to_255,
441 EF10_STAT_rx_256_to_511, 441 EF10_STAT_port_rx_256_to_511,
442 EF10_STAT_rx_512_to_1023, 442 EF10_STAT_port_rx_512_to_1023,
443 EF10_STAT_rx_1024_to_15xx, 443 EF10_STAT_port_rx_1024_to_15xx,
444 EF10_STAT_rx_15xx_to_jumbo, 444 EF10_STAT_port_rx_15xx_to_jumbo,
445 EF10_STAT_rx_gtjumbo, 445 EF10_STAT_port_rx_gtjumbo,
446 EF10_STAT_rx_bad_gtjumbo, 446 EF10_STAT_port_rx_bad_gtjumbo,
447 EF10_STAT_rx_overflow, 447 EF10_STAT_port_rx_overflow,
448 EF10_STAT_rx_align_error, 448 EF10_STAT_port_rx_align_error,
449 EF10_STAT_rx_length_error, 449 EF10_STAT_port_rx_length_error,
450 EF10_STAT_rx_nodesc_drops, 450 EF10_STAT_port_rx_nodesc_drops,
451 EF10_STAT_rx_pm_trunc_bb_overflow, 451 EF10_STAT_port_rx_pm_trunc_bb_overflow,
452 EF10_STAT_rx_pm_discard_bb_overflow, 452 EF10_STAT_port_rx_pm_discard_bb_overflow,
453 EF10_STAT_rx_pm_trunc_vfifo_full, 453 EF10_STAT_port_rx_pm_trunc_vfifo_full,
454 EF10_STAT_rx_pm_discard_vfifo_full, 454 EF10_STAT_port_rx_pm_discard_vfifo_full,
455 EF10_STAT_rx_pm_trunc_qbb, 455 EF10_STAT_port_rx_pm_trunc_qbb,
456 EF10_STAT_rx_pm_discard_qbb, 456 EF10_STAT_port_rx_pm_discard_qbb,
457 EF10_STAT_rx_pm_discard_mapping, 457 EF10_STAT_port_rx_pm_discard_mapping,
458 EF10_STAT_rx_dp_q_disabled_packets, 458 EF10_STAT_port_rx_dp_q_disabled_packets,
459 EF10_STAT_rx_dp_di_dropped_packets, 459 EF10_STAT_port_rx_dp_di_dropped_packets,
460 EF10_STAT_rx_dp_streaming_packets, 460 EF10_STAT_port_rx_dp_streaming_packets,
461 EF10_STAT_rx_dp_hlb_fetch, 461 EF10_STAT_port_rx_dp_hlb_fetch,
462 EF10_STAT_rx_dp_hlb_wait, 462 EF10_STAT_port_rx_dp_hlb_wait,
463 EF10_STAT_COUNT 463 EF10_STAT_COUNT
464}; 464};
465 465
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 20:07:10 -0500