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-rw-r--r--arch/arm/boot/dts/vexpress-v2m-rs1.dtsi24
-rw-r--r--arch/arm/boot/dts/vexpress-v2m.dtsi24
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts2
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts18
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca5s.dts2
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca9.dts2
6 files changed, 36 insertions, 36 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 3086efacd00e..35714ff6f467 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -71,7 +71,7 @@
71 #size-cells = <1>; 71 #size-cells = <1>;
72 ranges = <0 3 0 0x200000>; 72 ranges = <0 3 0 0x200000>;
73 73
74 v2m_sysreg: sysreg@010000 { 74 v2m_sysreg: sysreg@10000 {
75 compatible = "arm,vexpress-sysreg"; 75 compatible = "arm,vexpress-sysreg";
76 reg = <0x010000 0x1000>; 76 reg = <0x010000 0x1000>;
77 77
@@ -94,7 +94,7 @@
94 }; 94 };
95 }; 95 };
96 96
97 v2m_sysctl: sysctl@020000 { 97 v2m_sysctl: sysctl@20000 {
98 compatible = "arm,sp810", "arm,primecell"; 98 compatible = "arm,sp810", "arm,primecell";
99 reg = <0x020000 0x1000>; 99 reg = <0x020000 0x1000>;
100 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; 100 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
@@ -106,7 +106,7 @@
106 }; 106 };
107 107
108 /* PCI-E I2C bus */ 108 /* PCI-E I2C bus */
109 v2m_i2c_pcie: i2c@030000 { 109 v2m_i2c_pcie: i2c@30000 {
110 compatible = "arm,versatile-i2c"; 110 compatible = "arm,versatile-i2c";
111 reg = <0x030000 0x1000>; 111 reg = <0x030000 0x1000>;
112 112
@@ -119,7 +119,7 @@
119 }; 119 };
120 }; 120 };
121 121
122 aaci@040000 { 122 aaci@40000 {
123 compatible = "arm,pl041", "arm,primecell"; 123 compatible = "arm,pl041", "arm,primecell";
124 reg = <0x040000 0x1000>; 124 reg = <0x040000 0x1000>;
125 interrupts = <11>; 125 interrupts = <11>;
@@ -127,7 +127,7 @@
127 clock-names = "apb_pclk"; 127 clock-names = "apb_pclk";
128 }; 128 };
129 129
130 mmci@050000 { 130 mmci@50000 {
131 compatible = "arm,pl180", "arm,primecell"; 131 compatible = "arm,pl180", "arm,primecell";
132 reg = <0x050000 0x1000>; 132 reg = <0x050000 0x1000>;
133 interrupts = <9 10>; 133 interrupts = <9 10>;
@@ -139,7 +139,7 @@
139 clock-names = "mclk", "apb_pclk"; 139 clock-names = "mclk", "apb_pclk";
140 }; 140 };
141 141
142 kmi@060000 { 142 kmi@60000 {
143 compatible = "arm,pl050", "arm,primecell"; 143 compatible = "arm,pl050", "arm,primecell";
144 reg = <0x060000 0x1000>; 144 reg = <0x060000 0x1000>;
145 interrupts = <12>; 145 interrupts = <12>;
@@ -147,7 +147,7 @@
147 clock-names = "KMIREFCLK", "apb_pclk"; 147 clock-names = "KMIREFCLK", "apb_pclk";
148 }; 148 };
149 149
150 kmi@070000 { 150 kmi@70000 {
151 compatible = "arm,pl050", "arm,primecell"; 151 compatible = "arm,pl050", "arm,primecell";
152 reg = <0x070000 0x1000>; 152 reg = <0x070000 0x1000>;
153 interrupts = <13>; 153 interrupts = <13>;
@@ -155,7 +155,7 @@
155 clock-names = "KMIREFCLK", "apb_pclk"; 155 clock-names = "KMIREFCLK", "apb_pclk";
156 }; 156 };
157 157
158 v2m_serial0: uart@090000 { 158 v2m_serial0: uart@90000 {
159 compatible = "arm,pl011", "arm,primecell"; 159 compatible = "arm,pl011", "arm,primecell";
160 reg = <0x090000 0x1000>; 160 reg = <0x090000 0x1000>;
161 interrupts = <5>; 161 interrupts = <5>;
@@ -163,7 +163,7 @@
163 clock-names = "uartclk", "apb_pclk"; 163 clock-names = "uartclk", "apb_pclk";
164 }; 164 };
165 165
166 v2m_serial1: uart@0a0000 { 166 v2m_serial1: uart@a0000 {
167 compatible = "arm,pl011", "arm,primecell"; 167 compatible = "arm,pl011", "arm,primecell";
168 reg = <0x0a0000 0x1000>; 168 reg = <0x0a0000 0x1000>;
169 interrupts = <6>; 169 interrupts = <6>;
@@ -171,7 +171,7 @@
171 clock-names = "uartclk", "apb_pclk"; 171 clock-names = "uartclk", "apb_pclk";
172 }; 172 };
173 173
174 v2m_serial2: uart@0b0000 { 174 v2m_serial2: uart@b0000 {
175 compatible = "arm,pl011", "arm,primecell"; 175 compatible = "arm,pl011", "arm,primecell";
176 reg = <0x0b0000 0x1000>; 176 reg = <0x0b0000 0x1000>;
177 interrupts = <7>; 177 interrupts = <7>;
@@ -179,7 +179,7 @@
179 clock-names = "uartclk", "apb_pclk"; 179 clock-names = "uartclk", "apb_pclk";
180 }; 180 };
181 181
182 v2m_serial3: uart@0c0000 { 182 v2m_serial3: uart@c0000 {
183 compatible = "arm,pl011", "arm,primecell"; 183 compatible = "arm,pl011", "arm,primecell";
184 reg = <0x0c0000 0x1000>; 184 reg = <0x0c0000 0x1000>;
185 interrupts = <8>; 185 interrupts = <8>;
@@ -187,7 +187,7 @@
187 clock-names = "uartclk", "apb_pclk"; 187 clock-names = "uartclk", "apb_pclk";
188 }; 188 };
189 189
190 wdt@0f0000 { 190 wdt@f0000 {
191 compatible = "arm,sp805", "arm,primecell"; 191 compatible = "arm,sp805", "arm,primecell";
192 reg = <0x0f0000 0x1000>; 192 reg = <0x0f0000 0x1000>;
193 interrupts = <0>; 193 interrupts = <0>;
diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
index c6393d3f1719..1b6f6393be93 100644
--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -70,7 +70,7 @@
70 #size-cells = <1>; 70 #size-cells = <1>;
71 ranges = <0 7 0 0x20000>; 71 ranges = <0 7 0 0x20000>;
72 72
73 v2m_sysreg: sysreg@00000 { 73 v2m_sysreg: sysreg@0 {
74 compatible = "arm,vexpress-sysreg"; 74 compatible = "arm,vexpress-sysreg";
75 reg = <0x00000 0x1000>; 75 reg = <0x00000 0x1000>;
76 76
@@ -93,7 +93,7 @@
93 }; 93 };
94 }; 94 };
95 95
96 v2m_sysctl: sysctl@01000 { 96 v2m_sysctl: sysctl@1000 {
97 compatible = "arm,sp810", "arm,primecell"; 97 compatible = "arm,sp810", "arm,primecell";
98 reg = <0x01000 0x1000>; 98 reg = <0x01000 0x1000>;
99 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; 99 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
@@ -105,7 +105,7 @@
105 }; 105 };
106 106
107 /* PCI-E I2C bus */ 107 /* PCI-E I2C bus */
108 v2m_i2c_pcie: i2c@02000 { 108 v2m_i2c_pcie: i2c@2000 {
109 compatible = "arm,versatile-i2c"; 109 compatible = "arm,versatile-i2c";
110 reg = <0x02000 0x1000>; 110 reg = <0x02000 0x1000>;
111 111
@@ -118,7 +118,7 @@
118 }; 118 };
119 }; 119 };
120 120
121 aaci@04000 { 121 aaci@4000 {
122 compatible = "arm,pl041", "arm,primecell"; 122 compatible = "arm,pl041", "arm,primecell";
123 reg = <0x04000 0x1000>; 123 reg = <0x04000 0x1000>;
124 interrupts = <11>; 124 interrupts = <11>;
@@ -126,7 +126,7 @@
126 clock-names = "apb_pclk"; 126 clock-names = "apb_pclk";
127 }; 127 };
128 128
129 mmci@05000 { 129 mmci@5000 {
130 compatible = "arm,pl180", "arm,primecell"; 130 compatible = "arm,pl180", "arm,primecell";
131 reg = <0x05000 0x1000>; 131 reg = <0x05000 0x1000>;
132 interrupts = <9 10>; 132 interrupts = <9 10>;
@@ -138,7 +138,7 @@
138 clock-names = "mclk", "apb_pclk"; 138 clock-names = "mclk", "apb_pclk";
139 }; 139 };
140 140
141 kmi@06000 { 141 kmi@6000 {
142 compatible = "arm,pl050", "arm,primecell"; 142 compatible = "arm,pl050", "arm,primecell";
143 reg = <0x06000 0x1000>; 143 reg = <0x06000 0x1000>;
144 interrupts = <12>; 144 interrupts = <12>;
@@ -146,7 +146,7 @@
146 clock-names = "KMIREFCLK", "apb_pclk"; 146 clock-names = "KMIREFCLK", "apb_pclk";
147 }; 147 };
148 148
149 kmi@07000 { 149 kmi@7000 {
150 compatible = "arm,pl050", "arm,primecell"; 150 compatible = "arm,pl050", "arm,primecell";
151 reg = <0x07000 0x1000>; 151 reg = <0x07000 0x1000>;
152 interrupts = <13>; 152 interrupts = <13>;
@@ -154,7 +154,7 @@
154 clock-names = "KMIREFCLK", "apb_pclk"; 154 clock-names = "KMIREFCLK", "apb_pclk";
155 }; 155 };
156 156
157 v2m_serial0: uart@09000 { 157 v2m_serial0: uart@9000 {
158 compatible = "arm,pl011", "arm,primecell"; 158 compatible = "arm,pl011", "arm,primecell";
159 reg = <0x09000 0x1000>; 159 reg = <0x09000 0x1000>;
160 interrupts = <5>; 160 interrupts = <5>;
@@ -162,7 +162,7 @@
162 clock-names = "uartclk", "apb_pclk"; 162 clock-names = "uartclk", "apb_pclk";
163 }; 163 };
164 164
165 v2m_serial1: uart@0a000 { 165 v2m_serial1: uart@a000 {
166 compatible = "arm,pl011", "arm,primecell"; 166 compatible = "arm,pl011", "arm,primecell";
167 reg = <0x0a000 0x1000>; 167 reg = <0x0a000 0x1000>;
168 interrupts = <6>; 168 interrupts = <6>;
@@ -170,7 +170,7 @@
170 clock-names = "uartclk", "apb_pclk"; 170 clock-names = "uartclk", "apb_pclk";
171 }; 171 };
172 172
173 v2m_serial2: uart@0b000 { 173 v2m_serial2: uart@b000 {
174 compatible = "arm,pl011", "arm,primecell"; 174 compatible = "arm,pl011", "arm,primecell";
175 reg = <0x0b000 0x1000>; 175 reg = <0x0b000 0x1000>;
176 interrupts = <7>; 176 interrupts = <7>;
@@ -178,7 +178,7 @@
178 clock-names = "uartclk", "apb_pclk"; 178 clock-names = "uartclk", "apb_pclk";
179 }; 179 };
180 180
181 v2m_serial3: uart@0c000 { 181 v2m_serial3: uart@c000 {
182 compatible = "arm,pl011", "arm,primecell"; 182 compatible = "arm,pl011", "arm,primecell";
183 reg = <0x0c000 0x1000>; 183 reg = <0x0c000 0x1000>;
184 interrupts = <8>; 184 interrupts = <8>;
@@ -186,7 +186,7 @@
186 clock-names = "uartclk", "apb_pclk"; 186 clock-names = "uartclk", "apb_pclk";
187 }; 187 };
188 188
189 wdt@0f000 { 189 wdt@f000 {
190 compatible = "arm,sp805", "arm,primecell"; 190 compatible = "arm,sp805", "arm,primecell";
191 reg = <0x0f000 0x1000>; 191 reg = <0x0f000 0x1000>;
192 interrupts = <0>; 192 interrupts = <0>;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
index 15f4fd3f4695..0c8de0ca73ee 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -220,7 +220,7 @@
220 }; 220 };
221 }; 221 };
222 222
223 smb@08000000 { 223 smb@8000000 {
224 compatible = "simple-bus"; 224 compatible = "simple-bus";
225 225
226 #address-cells = <2>; 226 #address-cells = <2>;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index bd107c5a0226..65ecf206388c 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -385,7 +385,7 @@
385 }; 385 };
386 }; 386 };
387 387
388 etb@0,20010000 { 388 etb@20010000 {
389 compatible = "arm,coresight-etb10", "arm,primecell"; 389 compatible = "arm,coresight-etb10", "arm,primecell";
390 reg = <0 0x20010000 0 0x1000>; 390 reg = <0 0x20010000 0 0x1000>;
391 391
@@ -399,7 +399,7 @@
399 }; 399 };
400 }; 400 };
401 401
402 tpiu@0,20030000 { 402 tpiu@20030000 {
403 compatible = "arm,coresight-tpiu", "arm,primecell"; 403 compatible = "arm,coresight-tpiu", "arm,primecell";
404 reg = <0 0x20030000 0 0x1000>; 404 reg = <0 0x20030000 0 0x1000>;
405 405
@@ -449,7 +449,7 @@
449 }; 449 };
450 }; 450 };
451 451
452 funnel@0,20040000 { 452 funnel@20040000 {
453 compatible = "arm,coresight-funnel", "arm,primecell"; 453 compatible = "arm,coresight-funnel", "arm,primecell";
454 reg = <0 0x20040000 0 0x1000>; 454 reg = <0 0x20040000 0 0x1000>;
455 455
@@ -513,7 +513,7 @@
513 }; 513 };
514 }; 514 };
515 515
516 ptm@0,2201c000 { 516 ptm@2201c000 {
517 compatible = "arm,coresight-etm3x", "arm,primecell"; 517 compatible = "arm,coresight-etm3x", "arm,primecell";
518 reg = <0 0x2201c000 0 0x1000>; 518 reg = <0 0x2201c000 0 0x1000>;
519 519
@@ -527,7 +527,7 @@
527 }; 527 };
528 }; 528 };
529 529
530 ptm@0,2201d000 { 530 ptm@2201d000 {
531 compatible = "arm,coresight-etm3x", "arm,primecell"; 531 compatible = "arm,coresight-etm3x", "arm,primecell";
532 reg = <0 0x2201d000 0 0x1000>; 532 reg = <0 0x2201d000 0 0x1000>;
533 533
@@ -541,7 +541,7 @@
541 }; 541 };
542 }; 542 };
543 543
544 etm@0,2203c000 { 544 etm@2203c000 {
545 compatible = "arm,coresight-etm3x", "arm,primecell"; 545 compatible = "arm,coresight-etm3x", "arm,primecell";
546 reg = <0 0x2203c000 0 0x1000>; 546 reg = <0 0x2203c000 0 0x1000>;
547 547
@@ -555,7 +555,7 @@
555 }; 555 };
556 }; 556 };
557 557
558 etm@0,2203d000 { 558 etm@2203d000 {
559 compatible = "arm,coresight-etm3x", "arm,primecell"; 559 compatible = "arm,coresight-etm3x", "arm,primecell";
560 reg = <0 0x2203d000 0 0x1000>; 560 reg = <0 0x2203d000 0 0x1000>;
561 561
@@ -569,7 +569,7 @@
569 }; 569 };
570 }; 570 };
571 571
572 etm@0,2203e000 { 572 etm@2203e000 {
573 compatible = "arm,coresight-etm3x", "arm,primecell"; 573 compatible = "arm,coresight-etm3x", "arm,primecell";
574 reg = <0 0x2203e000 0 0x1000>; 574 reg = <0 0x2203e000 0 0x1000>;
575 575
@@ -583,7 +583,7 @@
583 }; 583 };
584 }; 584 };
585 585
586 smb@08000000 { 586 smb@8000000 {
587 compatible = "simple-bus"; 587 compatible = "simple-bus";
588 588
589 #address-cells = <2>; 589 #address-cells = <2>;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
index 1acecaf4b13d..6e69b8e6c1a7 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
@@ -190,7 +190,7 @@
190 }; 190 };
191 }; 191 };
192 192
193 smb@08000000 { 193 smb@8000000 {
194 compatible = "simple-bus"; 194 compatible = "simple-bus";
195 195
196 #address-cells = <2>; 196 #address-cells = <2>;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index b608a03ee02f..c9305b58afc2 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -300,7 +300,7 @@
300 }; 300 };
301 }; 301 };
302 302
303 smb@04000000 { 303 smb@4000000 {
304 compatible = "simple-bus"; 304 compatible = "simple-bus";
305 305
306 #address-cells = <2>; 306 #address-cells = <2>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-28 11:21:27 -0400