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-rw-r--r--Documentation/devicetree/bindings/ata/ahci-dm816.txt21
-rw-r--r--drivers/ata/Kconfig18
-rw-r--r--drivers/ata/Makefile2
-rw-r--r--drivers/ata/ahci_dm816.c200
-rw-r--r--drivers/ata/ahci_octeon.c5
-rw-r--r--drivers/ata/libata-core.c8
-rw-r--r--drivers/ata/libata-scsi.c140
-rw-r--r--drivers/ata/pata_at91.c503
-rw-r--r--drivers/ata/pata_macio.c2
-rw-r--r--drivers/ata/pata_mpc52xx.c2
-rw-r--r--drivers/ata/pata_of_platform.c2
-rw-r--r--drivers/ata/sata_fsl.c2
-rw-r--r--drivers/ata/sata_mv.c2
-rw-r--r--include/linux/ata.h5
14 files changed, 277 insertions, 635 deletions
diff --git a/Documentation/devicetree/bindings/ata/ahci-dm816.txt b/Documentation/devicetree/bindings/ata/ahci-dm816.txt
new file mode 100644
index 000000000000..f8c535f3541f
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-dm816.txt
@@ -0,0 +1,21 @@
1Device tree binding for the TI DM816 AHCI SATA Controller
2---------------------------------------------------------
3
4Required properties:
5 - compatible: must be "ti,dm816-ahci"
6 - reg: physical base address and size of the register region used by
7 the controller (as defined by the AHCI 1.1 standard)
8 - interrupts: interrupt specifier (refer to the interrupt binding)
9 - clocks: list of phandle and clock specifier pairs (or only
10 phandles for clock providers with '0' defined for
11 #clock-cells); two clocks must be specified: the functional
12 clock and an external reference clock
13
14Example:
15
16 sata: sata@4a140000 {
17 compatible = "ti,dm816-ahci";
18 reg = <0x4a140000 0x10000>;
19 interrupts = <16>;
20 clocks = <&sysclk5_ck>, <&sata_refclk>;
21 };
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 70b57d2229d6..ff6cb9e4c381 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -14,7 +14,6 @@ menuconfig ATA
14 tristate "Serial ATA and Parallel ATA drivers (libata)" 14 tristate "Serial ATA and Parallel ATA drivers (libata)"
15 depends on HAS_IOMEM 15 depends on HAS_IOMEM
16 depends on BLOCK 16 depends on BLOCK
17 depends on !(M32R || S390) || BROKEN
18 select SCSI 17 select SCSI
19 select GLOB 18 select GLOB
20 ---help--- 19 ---help---
@@ -118,6 +117,15 @@ config AHCI_DA850
118 117
119 If unsure, say N. 118 If unsure, say N.
120 119
120config AHCI_DM816
121 tristate "DaVinci DM816 AHCI SATA support"
122 depends on ARCH_OMAP2PLUS
123 help
124 This option enables support for the DaVinci DM816 SoC's
125 onboard AHCI SATA controller.
126
127 If unsure, say N.
128
121config AHCI_ST 129config AHCI_ST
122 tristate "ST AHCI SATA support" 130 tristate "ST AHCI SATA support"
123 depends on ARCH_STI 131 depends on ARCH_STI
@@ -885,14 +893,6 @@ config PATA_AT32
885 893
886 If unsure, say N. 894 If unsure, say N.
887 895
888config PATA_AT91
889 tristate "PATA support for AT91SAM9260"
890 depends on ARM && SOC_AT91SAM9
891 help
892 This option enables support for IDE devices on the Atmel AT91SAM9260 SoC.
893
894 If unsure, say N.
895
896config PATA_CMD640_PCI 896config PATA_CMD640_PCI
897 tristate "CMD640 PCI PATA support (Experimental)" 897 tristate "CMD640 PCI PATA support (Experimental)"
898 depends on PCI 898 depends on PCI
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 89a0a1915d36..3048cc100a46 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o
14obj-$(CONFIG_AHCI_BRCM) += ahci_brcm.o libahci.o libahci_platform.o 14obj-$(CONFIG_AHCI_BRCM) += ahci_brcm.o libahci.o libahci_platform.o
15obj-$(CONFIG_AHCI_CEVA) += ahci_ceva.o libahci.o libahci_platform.o 15obj-$(CONFIG_AHCI_CEVA) += ahci_ceva.o libahci.o libahci_platform.o
16obj-$(CONFIG_AHCI_DA850) += ahci_da850.o libahci.o libahci_platform.o 16obj-$(CONFIG_AHCI_DA850) += ahci_da850.o libahci.o libahci_platform.o
17obj-$(CONFIG_AHCI_DM816) += ahci_dm816.o libahci.o libahci_platform.o
17obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o 18obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o
18obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o libahci.o libahci_platform.o 19obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o libahci.o libahci_platform.o
19obj-$(CONFIG_AHCI_OCTEON) += ahci_octeon.o 20obj-$(CONFIG_AHCI_OCTEON) += ahci_octeon.o
@@ -91,7 +92,6 @@ obj-$(CONFIG_PATA_WINBOND) += pata_sl82c105.o
91 92
92# SFF PIO only 93# SFF PIO only
93obj-$(CONFIG_PATA_AT32) += pata_at32.o 94obj-$(CONFIG_PATA_AT32) += pata_at32.o
94obj-$(CONFIG_PATA_AT91) += pata_at91.o
95obj-$(CONFIG_PATA_CMD640_PCI) += pata_cmd640.o 95obj-$(CONFIG_PATA_CMD640_PCI) += pata_cmd640.o
96obj-$(CONFIG_PATA_FALCON) += pata_falcon.o 96obj-$(CONFIG_PATA_FALCON) += pata_falcon.o
97obj-$(CONFIG_PATA_ISAPNP) += pata_isapnp.o 97obj-$(CONFIG_PATA_ISAPNP) += pata_isapnp.o
diff --git a/drivers/ata/ahci_dm816.c b/drivers/ata/ahci_dm816.c
new file mode 100644
index 000000000000..fbd827c3a75c
--- /dev/null
+++ b/drivers/ata/ahci_dm816.c
@@ -0,0 +1,200 @@
1/*
2 * DaVinci DM816 AHCI SATA platform driver
3 *
4 * Copyright (C) 2017 BayLibre SAS
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/device.h>
15#include <linux/pm.h>
16#include <linux/platform_device.h>
17#include <linux/libata.h>
18#include <linux/ahci_platform.h>
19
20#include "ahci.h"
21
22#define AHCI_DM816_DRV_NAME "ahci-dm816"
23
24#define AHCI_DM816_PHY_ENPLL(x) ((x) << 0)
25#define AHCI_DM816_PHY_MPY(x) ((x) << 1)
26#define AHCI_DM816_PHY_LOS(x) ((x) << 12)
27#define AHCI_DM816_PHY_RXCDR(x) ((x) << 13)
28#define AHCI_DM816_PHY_RXEQ(x) ((x) << 16)
29#define AHCI_DM816_PHY_TXSWING(x) ((x) << 23)
30
31#define AHCI_DM816_P0PHYCR_REG 0x178
32#define AHCI_DM816_P1PHYCR_REG 0x1f8
33
34#define AHCI_DM816_PLL_OUT 1500000000LU
35
36static const unsigned long pll_mpy_table[] = {
37 400, 500, 600, 800, 825, 1000, 1200,
38 1250, 1500, 1600, 1650, 2000, 2200, 2500
39};
40
41static int ahci_dm816_get_mpy_bits(unsigned long refclk_rate)
42{
43 unsigned long pll_multiplier;
44 int i;
45
46 /*
47 * We need to determine the value of the multiplier (MPY) bits.
48 * In order to include the 8.25 multiplier we need to first divide
49 * the refclk rate by 100.
50 */
51 pll_multiplier = AHCI_DM816_PLL_OUT / (refclk_rate / 100);
52
53 for (i = 0; i < ARRAY_SIZE(pll_mpy_table); i++) {
54 if (pll_mpy_table[i] == pll_multiplier)
55 return i;
56 }
57
58 /*
59 * We should have divided evenly - if not, return an invalid
60 * value.
61 */
62 return -1;
63}
64
65static int ahci_dm816_phy_init(struct ahci_host_priv *hpriv, struct device *dev)
66{
67 unsigned long refclk_rate;
68 int mpy;
69 u32 val;
70
71 /*
72 * We should have been supplied two clocks: the functional and
73 * keep-alive clock and the external reference clock. We need the
74 * rate of the latter to calculate the correct value of MPY bits.
75 */
76 if (!hpriv->clks[1]) {
77 dev_err(dev, "reference clock not supplied\n");
78 return -EINVAL;
79 }
80
81 refclk_rate = clk_get_rate(hpriv->clks[1]);
82 if ((refclk_rate % 100) != 0) {
83 dev_err(dev, "reference clock rate must be divisible by 100\n");
84 return -EINVAL;
85 }
86
87 mpy = ahci_dm816_get_mpy_bits(refclk_rate);
88 if (mpy < 0) {
89 dev_err(dev, "can't calculate the MPY bits value\n");
90 return -EINVAL;
91 }
92
93 /* Enable the PHY and configure the first HBA port. */
94 val = AHCI_DM816_PHY_MPY(mpy) | AHCI_DM816_PHY_LOS(1) |
95 AHCI_DM816_PHY_RXCDR(4) | AHCI_DM816_PHY_RXEQ(1) |
96 AHCI_DM816_PHY_TXSWING(3) | AHCI_DM816_PHY_ENPLL(1);
97 writel(val, hpriv->mmio + AHCI_DM816_P0PHYCR_REG);
98
99 /* Configure the second HBA port. */
100 val = AHCI_DM816_PHY_LOS(1) | AHCI_DM816_PHY_RXCDR(4) |
101 AHCI_DM816_PHY_RXEQ(1) | AHCI_DM816_PHY_TXSWING(3);
102 writel(val, hpriv->mmio + AHCI_DM816_P1PHYCR_REG);
103
104 return 0;
105}
106
107static int ahci_dm816_softreset(struct ata_link *link,
108 unsigned int *class, unsigned long deadline)
109{
110 int pmp, ret;
111
112 pmp = sata_srst_pmp(link);
113
114 /*
115 * There's an issue with the SATA controller on DM816 SoC: if we
116 * enable Port Multiplier support, but the drive is connected directly
117 * to the board, it can't be detected. As a workaround: if PMP is
118 * enabled, we first call ahci_do_softreset() and pass it the result of
119 * sata_srst_pmp(). If this call fails, we retry with pmp = 0.
120 */
121 ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready);
122 if (pmp && ret == -EBUSY)
123 return ahci_do_softreset(link, class, 0,
124 deadline, ahci_check_ready);
125
126 return ret;
127}
128
129static struct ata_port_operations ahci_dm816_port_ops = {
130 .inherits = &ahci_platform_ops,
131 .softreset = ahci_dm816_softreset,
132};
133
134static const struct ata_port_info ahci_dm816_port_info = {
135 .flags = AHCI_FLAG_COMMON,
136 .pio_mask = ATA_PIO4,
137 .udma_mask = ATA_UDMA6,
138 .port_ops = &ahci_dm816_port_ops,
139};
140
141static struct scsi_host_template ahci_dm816_platform_sht = {
142 AHCI_SHT(AHCI_DM816_DRV_NAME),
143};
144
145static int ahci_dm816_probe(struct platform_device *pdev)
146{
147 struct device *dev = &pdev->dev;
148 struct ahci_host_priv *hpriv;
149 int rc;
150
151 hpriv = ahci_platform_get_resources(pdev);
152 if (IS_ERR(hpriv))
153 return PTR_ERR(hpriv);
154
155 rc = ahci_platform_enable_resources(hpriv);
156 if (rc)
157 return rc;
158
159 rc = ahci_dm816_phy_init(hpriv, dev);
160 if (rc)
161 goto disable_resources;
162
163 rc = ahci_platform_init_host(pdev, hpriv,
164 &ahci_dm816_port_info,
165 &ahci_dm816_platform_sht);
166 if (rc)
167 goto disable_resources;
168
169 return 0;
170
171disable_resources:
172 ahci_platform_disable_resources(hpriv);
173
174 return rc;
175}
176
177static SIMPLE_DEV_PM_OPS(ahci_dm816_pm_ops,
178 ahci_platform_suspend,
179 ahci_platform_resume);
180
181static const struct of_device_id ahci_dm816_of_match[] = {
182 { .compatible = "ti,dm816-ahci", },
183 { },
184};
185MODULE_DEVICE_TABLE(of, ahci_dm816_of_match);
186
187static struct platform_driver ahci_dm816_driver = {
188 .probe = ahci_dm816_probe,
189 .remove = ata_platform_remove_one,
190 .driver = {
191 .name = AHCI_DM816_DRV_NAME,
192 .of_match_table = ahci_dm816_of_match,
193 .pm = &ahci_dm816_pm_ops,
194 },
195};
196module_platform_driver(ahci_dm816_driver);
197
198MODULE_DESCRIPTION("DaVinci DM816 AHCI SATA platform driver");
199MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>");
200MODULE_LICENSE("GPL");
diff --git a/drivers/ata/ahci_octeon.c b/drivers/ata/ahci_octeon.c
index ea865fe953e1..5a44e089c6bb 100644
--- a/drivers/ata/ahci_octeon.c
+++ b/drivers/ata/ahci_octeon.c
@@ -38,11 +38,6 @@ static int ahci_octeon_probe(struct platform_device *pdev)
38 int ret; 38 int ret;
39 39
40 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 40 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
41 if (!res) {
42 dev_err(&pdev->dev, "Platform resource[0] is missing\n");
43 return -ENODEV;
44 }
45
46 base = devm_ioremap_resource(&pdev->dev, res); 41 base = devm_ioremap_resource(&pdev->dev, res);
47 if (IS_ERR(base)) 42 if (IS_ERR(base))
48 return PTR_ERR(base); 43 return PTR_ERR(base);
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index ca75823697dd..2d83b8c75965 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4910,7 +4910,7 @@ void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4910 * LOCKING: 4910 * LOCKING:
4911 * spin_lock_irqsave(host lock) 4911 * spin_lock_irqsave(host lock)
4912 */ 4912 */
4913void ata_sg_clean(struct ata_queued_cmd *qc) 4913static void ata_sg_clean(struct ata_queued_cmd *qc)
4914{ 4914{
4915 struct ata_port *ap = qc->ap; 4915 struct ata_port *ap = qc->ap;
4916 struct scatterlist *sg = qc->sg; 4916 struct scatterlist *sg = qc->sg;
@@ -5902,9 +5902,9 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
5902 INIT_LIST_HEAD(&ap->eh_done_q); 5902 INIT_LIST_HEAD(&ap->eh_done_q);
5903 init_waitqueue_head(&ap->eh_wait_q); 5903 init_waitqueue_head(&ap->eh_wait_q);
5904 init_completion(&ap->park_req_pending); 5904 init_completion(&ap->park_req_pending);
5905 init_timer_deferrable(&ap->fastdrain_timer); 5905 setup_deferrable_timer(&ap->fastdrain_timer,
5906 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; 5906 ata_eh_fastdrain_timerfn,
5907 ap->fastdrain_timer.data = (unsigned long)ap; 5907 (unsigned long)ap);
5908 5908
5909 ap->cbl = ATA_CBL_NONE; 5909 ap->cbl = ATA_CBL_NONE;
5910 5910
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index 1ac70744ae7b..49ba9834c715 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -3393,46 +3393,6 @@ static size_t ata_format_dsm_trim_descr(struct scsi_cmnd *cmd, u32 trmax,
3393} 3393}
3394 3394
3395/** 3395/**
3396 * ata_format_dsm_trim_descr() - SATL Write Same to ATA SCT Write Same
3397 * @cmd: SCSI command being translated
3398 * @lba: Starting sector
3399 * @num: Number of sectors to be zero'd.
3400 *
3401 * Rewrite the WRITE SAME payload to be an SCT Write Same formatted
3402 * descriptor.
3403 * NOTE: Writes a pattern (0's) in the foreground.
3404 *
3405 * Return: Number of bytes copied into sglist.
3406 */
3407static size_t ata_format_sct_write_same(struct scsi_cmnd *cmd, u64 lba, u64 num)
3408{
3409 struct scsi_device *sdp = cmd->device;
3410 size_t len = sdp->sector_size;
3411 size_t r;
3412 u16 *buf;
3413 unsigned long flags;
3414
3415 spin_lock_irqsave(&ata_scsi_rbuf_lock, flags);
3416 buf = ((void *)ata_scsi_rbuf);
3417
3418 put_unaligned_le16(0x0002, &buf[0]); /* SCT_ACT_WRITE_SAME */
3419 put_unaligned_le16(0x0101, &buf[1]); /* WRITE PTRN FG */
3420 put_unaligned_le64(lba, &buf[2]);
3421 put_unaligned_le64(num, &buf[6]);
3422 put_unaligned_le32(0u, &buf[10]); /* pattern */
3423
3424 WARN_ON(len > ATA_SCSI_RBUF_SIZE);
3425
3426 if (len > ATA_SCSI_RBUF_SIZE)
3427 len = ATA_SCSI_RBUF_SIZE;
3428
3429 r = sg_copy_from_buffer(scsi_sglist(cmd), scsi_sg_count(cmd), buf, len);
3430 spin_unlock_irqrestore(&ata_scsi_rbuf_lock, flags);
3431
3432 return r;
3433}
3434
3435/**
3436 * ata_scsi_write_same_xlat() - SATL Write Same to ATA SCT Write Same 3396 * ata_scsi_write_same_xlat() - SATL Write Same to ATA SCT Write Same
3437 * @qc: Command to be translated 3397 * @qc: Command to be translated
3438 * 3398 *
@@ -3462,32 +3422,31 @@ static unsigned int ata_scsi_write_same_xlat(struct ata_queued_cmd *qc)
3462 if (unlikely(!dev->dma_mode)) 3422 if (unlikely(!dev->dma_mode))
3463 goto invalid_opcode; 3423 goto invalid_opcode;
3464 3424
3425 /*
3426 * We only allow sending this command through the block layer,
3427 * as it modifies the DATA OUT buffer, which would corrupt user
3428 * memory for SG_IO commands.
3429 */
3430 if (unlikely(blk_rq_is_passthrough(scmd->request)))
3431 goto invalid_opcode;
3432
3465 if (unlikely(scmd->cmd_len < 16)) { 3433 if (unlikely(scmd->cmd_len < 16)) {
3466 fp = 15; 3434 fp = 15;
3467 goto invalid_fld; 3435 goto invalid_fld;
3468 } 3436 }
3469 scsi_16_lba_len(cdb, &block, &n_block); 3437 scsi_16_lba_len(cdb, &block, &n_block);
3470 3438
3471 if (unmap) { 3439 if (!unmap ||
3472 /* If trim is not enabled the cmd is invalid. */ 3440 (dev->horkage & ATA_HORKAGE_NOTRIM) ||
3473 if ((dev->horkage & ATA_HORKAGE_NOTRIM) || 3441 !ata_id_has_trim(dev->id)) {
3474 !ata_id_has_trim(dev->id)) { 3442 fp = 1;
3475 fp = 1; 3443 bp = 3;
3476 bp = 3; 3444 goto invalid_fld;
3477 goto invalid_fld; 3445 }
3478 } 3446 /* If the request is too large the cmd is invalid */
3479 /* If the request is too large the cmd is invalid */ 3447 if (n_block > 0xffff * trmax) {
3480 if (n_block > 0xffff * trmax) { 3448 fp = 2;
3481 fp = 2; 3449 goto invalid_fld;
3482 goto invalid_fld;
3483 }
3484 } else {
3485 /* If write same is not available the cmd is invalid */
3486 if (!ata_id_sct_write_same(dev->id)) {
3487 fp = 1;
3488 bp = 3;
3489 goto invalid_fld;
3490 }
3491 } 3450 }
3492 3451
3493 /* 3452 /*
@@ -3502,49 +3461,28 @@ static unsigned int ata_scsi_write_same_xlat(struct ata_queued_cmd *qc)
3502 * For DATA SET MANAGEMENT TRIM in ACS-2 nsect (aka count) 3461 * For DATA SET MANAGEMENT TRIM in ACS-2 nsect (aka count)
3503 * is defined as number of 512 byte blocks to be transferred. 3462 * is defined as number of 512 byte blocks to be transferred.
3504 */ 3463 */
3505 if (unmap) {
3506 size = ata_format_dsm_trim_descr(scmd, trmax, block, n_block);
3507 if (size != len)
3508 goto invalid_param_len;
3509 3464
3510 if (ata_ncq_enabled(dev) && ata_fpdma_dsm_supported(dev)) { 3465 size = ata_format_dsm_trim_descr(scmd, trmax, block, n_block);
3511 /* Newer devices support queued TRIM commands */ 3466 if (size != len)
3512 tf->protocol = ATA_PROT_NCQ; 3467 goto invalid_param_len;
3513 tf->command = ATA_CMD_FPDMA_SEND;
3514 tf->hob_nsect = ATA_SUBCMD_FPDMA_SEND_DSM & 0x1f;
3515 tf->nsect = qc->tag << 3;
3516 tf->hob_feature = (size / 512) >> 8;
3517 tf->feature = size / 512;
3518 3468
3519 tf->auxiliary = 1; 3469 if (ata_ncq_enabled(dev) && ata_fpdma_dsm_supported(dev)) {
3520 } else { 3470 /* Newer devices support queued TRIM commands */
3521 tf->protocol = ATA_PROT_DMA; 3471 tf->protocol = ATA_PROT_NCQ;
3522 tf->hob_feature = 0; 3472 tf->command = ATA_CMD_FPDMA_SEND;
3523 tf->feature = ATA_DSM_TRIM; 3473 tf->hob_nsect = ATA_SUBCMD_FPDMA_SEND_DSM & 0x1f;
3524 tf->hob_nsect = (size / 512) >> 8; 3474 tf->nsect = qc->tag << 3;
3525 tf->nsect = size / 512; 3475 tf->hob_feature = (size / 512) >> 8;
3526 tf->command = ATA_CMD_DSM; 3476 tf->feature = size / 512;
3527 }
3528 } else {
3529 size = ata_format_sct_write_same(scmd, block, n_block);
3530 if (size != len)
3531 goto invalid_param_len;
3532 3477
3533 tf->hob_feature = 0; 3478 tf->auxiliary = 1;
3534 tf->feature = 0; 3479 } else {
3535 tf->hob_nsect = 0;
3536 tf->nsect = 1;
3537 tf->lbah = 0;
3538 tf->lbam = 0;
3539 tf->lbal = ATA_CMD_STANDBYNOW1;
3540 tf->hob_lbah = 0;
3541 tf->hob_lbam = 0;
3542 tf->hob_lbal = 0;
3543 tf->device = ATA_CMD_STANDBYNOW1;
3544 tf->protocol = ATA_PROT_DMA; 3480 tf->protocol = ATA_PROT_DMA;
3545 tf->command = ATA_CMD_WRITE_LOG_DMA_EXT; 3481 tf->hob_feature = 0;
3546 if (unlikely(dev->flags & ATA_DFLAG_PIO)) 3482 tf->feature = ATA_DSM_TRIM;
3547 tf->command = ATA_CMD_WRITE_LOG_EXT; 3483 tf->hob_nsect = (size / 512) >> 8;
3484 tf->nsect = size / 512;
3485 tf->command = ATA_CMD_DSM;
3548 } 3486 }
3549 3487
3550 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | 3488 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 |
@@ -3619,10 +3557,6 @@ static unsigned int ata_scsiop_maint_in(struct ata_scsi_args *args, u8 *rbuf)
3619 case START_STOP: 3557 case START_STOP:
3620 supported = 3; 3558 supported = 3;
3621 break; 3559 break;
3622 case WRITE_SAME_16:
3623 if (!ata_id_sct_write_same(dev->id))
3624 break;
3625 /* fallthrough: if SCT ... only enable for ZBC */
3626 case ZBC_IN: 3560 case ZBC_IN:
3627 case ZBC_OUT: 3561 case ZBC_OUT:
3628 if (ata_id_zoned_cap(dev->id) || 3562 if (ata_id_zoned_cap(dev->id) ||
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
deleted file mode 100644
index fd5b34f0d007..000000000000
--- a/drivers/ata/pata_at91.c
+++ /dev/null
@@ -1,503 +0,0 @@
1/*
2 * PATA driver for AT91SAM9260 Static Memory Controller
3 * with CompactFlash interface in True IDE mode
4 *
5 * Copyright (C) 2009 Matyukevich Sergey
6 * 2011 Igor Plyatov
7 *
8 * Based on:
9 * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
10 * * pata_at32 driver by Kristoffer Nyborg Gregertsen
11 * * at91_ide driver by Stanislaw Gruszka
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/blkdev.h>
22#include <linux/gfp.h>
23#include <scsi/scsi_host.h>
24#include <linux/ata.h>
25#include <linux/clk.h>
26#include <linux/libata.h>
27#include <linux/mfd/syscon.h>
28#include <linux/mfd/syscon/atmel-smc.h>
29#include <linux/platform_device.h>
30#include <linux/ata_platform.h>
31#include <linux/platform_data/atmel.h>
32#include <linux/regmap.h>
33#include <linux/gpio.h>
34
35#define DRV_NAME "pata_at91"
36#define DRV_VERSION "0.3"
37
38#define CF_IDE_OFFSET 0x00c00000
39#define CF_ALT_IDE_OFFSET 0x00e00000
40#define CF_IDE_RES_SIZE 0x08
41#define CS_PULSE_MAXIMUM 319
42#define ER_SMC_CALC 1
43#define ER_SMC_RECALC 2
44
45struct at91_ide_info {
46 unsigned long mode;
47 unsigned int cs;
48 struct clk *mck;
49 void __iomem *ide_addr;
50 void __iomem *alt_addr;
51};
52
53/**
54 * struct smc_range - range of valid values for SMC register.
55 */
56struct smc_range {
57 int min;
58 int max;
59};
60
61struct regmap *smc;
62
63struct at91sam9_smc_generic_fields {
64 struct regmap_field *setup;
65 struct regmap_field *pulse;
66 struct regmap_field *cycle;
67 struct regmap_field *mode;
68} fields;
69
70/**
71 * adjust_smc_value - adjust value for one of SMC registers.
72 * @value: adjusted value
73 * @range: array of SMC ranges with valid values
74 * @size: SMC ranges array size
75 *
76 * This returns the difference between input and output value or negative
77 * in case of invalid input value.
78 * If negative returned, then output value = maximal possible from ranges.
79 */
80static int adjust_smc_value(int *value, struct smc_range *range, int size)
81{
82 int maximum = (range + size - 1)->max;
83 int remainder;
84
85 do {
86 if (*value < range->min) {
87 remainder = range->min - *value;
88 *value = range->min; /* nearest valid value */
89 return remainder;
90 } else if ((range->min <= *value) && (*value <= range->max))
91 return 0;
92
93 range++;
94 } while (--size);
95 *value = maximum;
96
97 return -1; /* invalid value */
98}
99
100/**
101 * calc_smc_vals - calculate SMC register values
102 * @dev: ATA device
103 * @setup: SMC_SETUP register value
104 * @pulse: SMC_PULSE register value
105 * @cycle: SMC_CYCLE register value
106 *
107 * This returns negative in case of invalid values for SMC registers:
108 * -ER_SMC_RECALC - recalculation required for SMC values,
109 * -ER_SMC_CALC - calculation failed (invalid input values).
110 *
111 * SMC use special coding scheme, see "Coding and Range of Timing
112 * Parameters" table from AT91SAM9 datasheets.
113 *
114 * SMC_SETUP = 128*setup[5] + setup[4:0]
115 * SMC_PULSE = 256*pulse[6] + pulse[5:0]
116 * SMC_CYCLE = 256*cycle[8:7] + cycle[6:0]
117 */
118static int calc_smc_vals(struct device *dev,
119 int *setup, int *pulse, int *cycle, int *cs_pulse)
120{
121 int ret_val;
122 int err = 0;
123 struct smc_range range_setup[] = { /* SMC_SETUP valid values */
124 {.min = 0, .max = 31}, /* first range */
125 {.min = 128, .max = 159} /* second range */
126 };
127 struct smc_range range_pulse[] = { /* SMC_PULSE valid values */
128 {.min = 0, .max = 63}, /* first range */
129 {.min = 256, .max = 319} /* second range */
130 };
131 struct smc_range range_cycle[] = { /* SMC_CYCLE valid values */
132 {.min = 0, .max = 127}, /* first range */
133 {.min = 256, .max = 383}, /* second range */
134 {.min = 512, .max = 639}, /* third range */
135 {.min = 768, .max = 895} /* fourth range */
136 };
137
138 ret_val = adjust_smc_value(setup, range_setup, ARRAY_SIZE(range_setup));
139 if (ret_val < 0)
140 dev_warn(dev, "maximal SMC Setup value\n");
141 else
142 *cycle += ret_val;
143
144 ret_val = adjust_smc_value(pulse, range_pulse, ARRAY_SIZE(range_pulse));
145 if (ret_val < 0)
146 dev_warn(dev, "maximal SMC Pulse value\n");
147 else
148 *cycle += ret_val;
149
150 ret_val = adjust_smc_value(cycle, range_cycle, ARRAY_SIZE(range_cycle));
151 if (ret_val < 0)
152 dev_warn(dev, "maximal SMC Cycle value\n");
153
154 *cs_pulse = *cycle;
155 if (*cs_pulse > CS_PULSE_MAXIMUM) {
156 dev_err(dev, "unable to calculate valid SMC settings\n");
157 return -ER_SMC_CALC;
158 }
159
160 ret_val = adjust_smc_value(cs_pulse, range_pulse,
161 ARRAY_SIZE(range_pulse));
162 if (ret_val < 0) {
163 dev_warn(dev, "maximal SMC CS Pulse value\n");
164 } else if (ret_val != 0) {
165 *cycle = *cs_pulse;
166 dev_warn(dev, "SMC Cycle extended\n");
167 err = -ER_SMC_RECALC;
168 }
169
170 return err;
171}
172
173/**
174 * to_smc_format - convert values into SMC format
175 * @setup: SETUP value of SMC Setup Register
176 * @pulse: PULSE value of SMC Pulse Register
177 * @cycle: CYCLE value of SMC Cycle Register
178 * @cs_pulse: NCS_PULSE value of SMC Pulse Register
179 */
180static void to_smc_format(int *setup, int *pulse, int *cycle, int *cs_pulse)
181{
182 *setup = (*setup & 0x1f) | ((*setup & 0x80) >> 2);
183 *pulse = (*pulse & 0x3f) | ((*pulse & 0x100) >> 2);
184 *cycle = (*cycle & 0x7f) | ((*cycle & 0x300) >> 1);
185 *cs_pulse = (*cs_pulse & 0x3f) | ((*cs_pulse & 0x100) >> 2);
186}
187
188static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
189{
190 unsigned long mul;
191
192 /*
193 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
194 * x * (f / 1_000_000_000) =
195 * x * ((f * 65536) / 1_000_000_000) / 65536 =
196 * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
197 */
198
199 mul = (mck_hz / 10000) << 16;
200 mul /= 100000;
201
202 return (ns * mul + 65536) >> 16; /* rounding */
203}
204
205/**
206 * set_smc_timing - SMC timings setup.
207 * @dev: device
208 * @info: AT91 IDE info
209 * @ata: ATA timings
210 *
211 * Its assumed that write timings are same as read timings,
212 * cs_setup = 0 and cs_pulse = cycle.
213 */
214static void set_smc_timing(struct device *dev, struct ata_device *adev,
215 struct at91_ide_info *info, const struct ata_timing *ata)
216{
217 int ret = 0;
218 int use_iordy;
219 unsigned int t6z; /* data tristate time in ns */
220 unsigned int cycle; /* SMC Cycle width in MCK ticks */
221 unsigned int setup; /* SMC Setup width in MCK ticks */
222 unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */
223 unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/
224 unsigned int tdf_cycles; /* SMC TDF MCK ticks */
225 unsigned long mck_hz; /* MCK frequency in Hz */
226
227 t6z = (ata->mode < XFER_PIO_5) ? 30 : 20;
228 mck_hz = clk_get_rate(info->mck);
229 cycle = calc_mck_cycles(ata->cyc8b, mck_hz);
230 setup = calc_mck_cycles(ata->setup, mck_hz);
231 pulse = calc_mck_cycles(ata->act8b, mck_hz);
232 tdf_cycles = calc_mck_cycles(t6z, mck_hz);
233
234 do {
235 ret = calc_smc_vals(dev, &setup, &pulse, &cycle, &cs_pulse);
236 } while (ret == -ER_SMC_RECALC);
237
238 if (ret == -ER_SMC_CALC)
239 dev_err(dev, "Interface may not operate correctly\n");
240
241 dev_dbg(dev, "SMC Setup=%u, Pulse=%u, Cycle=%u, CS Pulse=%u\n",
242 setup, pulse, cycle, cs_pulse);
243 to_smc_format(&setup, &pulse, &cycle, &cs_pulse);
244 /* disable or enable waiting for IORDY signal */
245 use_iordy = ata_pio_need_iordy(adev);
246 if (use_iordy)
247 info->mode |= AT91_SMC_EXNWMODE_READY;
248
249 if (tdf_cycles > 15) {
250 tdf_cycles = 15;
251 dev_warn(dev, "maximal SMC TDF Cycles value\n");
252 }
253
254 dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
255
256 regmap_fields_write(fields.setup, info->cs,
257 AT91SAM9_SMC_NRDSETUP(setup) |
258 AT91SAM9_SMC_NWESETUP(setup) |
259 AT91SAM9_SMC_NCS_NRDSETUP(0) |
260 AT91SAM9_SMC_NCS_WRSETUP(0));
261 regmap_fields_write(fields.pulse, info->cs,
262 AT91SAM9_SMC_NRDPULSE(pulse) |
263 AT91SAM9_SMC_NWEPULSE(pulse) |
264 AT91SAM9_SMC_NCS_NRDPULSE(cs_pulse) |
265 AT91SAM9_SMC_NCS_WRPULSE(cs_pulse));
266 regmap_fields_write(fields.cycle, info->cs,
267 AT91SAM9_SMC_NRDCYCLE(cycle) |
268 AT91SAM9_SMC_NWECYCLE(cycle));
269 regmap_fields_write(fields.mode, info->cs, info->mode |
270 AT91_SMC_TDF_(tdf_cycles));
271}
272
273static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
274{
275 struct at91_ide_info *info = ap->host->private_data;
276 struct ata_timing timing;
277 int ret;
278
279 /* Compute ATA timing and set it to SMC */
280 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
281 if (ret) {
282 dev_warn(ap->dev, "Failed to compute ATA timing %d, "
283 "set PIO_0 timing\n", ret);
284 timing = *ata_timing_find_mode(XFER_PIO_0);
285 }
286 set_smc_timing(ap->dev, adev, info, &timing);
287}
288
289static unsigned int pata_at91_data_xfer_noirq(struct ata_queued_cmd *qc,
290 unsigned char *buf, unsigned int buflen, int rw)
291{
292 struct at91_ide_info *info = qc->dev->link->ap->host->private_data;
293 unsigned int consumed;
294 unsigned int mode;
295 unsigned long flags;
296
297 local_irq_save(flags);
298 regmap_fields_read(fields.mode, info->cs, &mode);
299
300 /* set 16bit mode before writing data */
301 regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
302 AT91_SMC_DBW_16);
303
304 consumed = ata_sff_data_xfer(qc, buf, buflen, rw);
305
306 /* restore 8bit mode after data is written */
307 regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
308 AT91_SMC_DBW_8);
309
310 local_irq_restore(flags);
311 return consumed;
312}
313
314static struct scsi_host_template pata_at91_sht = {
315 ATA_PIO_SHT(DRV_NAME),
316};
317
318static struct ata_port_operations pata_at91_port_ops = {
319 .inherits = &ata_sff_port_ops,
320
321 .sff_data_xfer = pata_at91_data_xfer_noirq,
322 .set_piomode = pata_at91_set_piomode,
323 .cable_detect = ata_cable_40wire,
324};
325
326static int at91sam9_smc_fields_init(struct device *dev)
327{
328 struct reg_field field = REG_FIELD(0, 0, 31);
329
330 field.id_size = 8;
331 field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
332
333 field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
334 fields.setup = devm_regmap_field_alloc(dev, smc, field);
335 if (IS_ERR(fields.setup))
336 return PTR_ERR(fields.setup);
337
338 field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
339 fields.pulse = devm_regmap_field_alloc(dev, smc, field);
340 if (IS_ERR(fields.pulse))
341 return PTR_ERR(fields.pulse);
342
343 field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
344 fields.cycle = devm_regmap_field_alloc(dev, smc, field);
345 if (IS_ERR(fields.cycle))
346 return PTR_ERR(fields.cycle);
347
348 field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
349 fields.mode = devm_regmap_field_alloc(dev, smc, field);
350
351 return PTR_ERR_OR_ZERO(fields.mode);
352}
353
354static int pata_at91_probe(struct platform_device *pdev)
355{
356 struct at91_cf_data *board = dev_get_platdata(&pdev->dev);
357 struct device *dev = &pdev->dev;
358 struct at91_ide_info *info;
359 struct resource *mem_res;
360 struct ata_host *host;
361 struct ata_port *ap;
362
363 int irq_flags = 0;
364 int irq = 0;
365 int ret;
366
367 /* get platform resources: IO/CTL memories and irq/rst pins */
368
369 if (pdev->num_resources != 1) {
370 dev_err(&pdev->dev, "invalid number of resources\n");
371 return -EINVAL;
372 }
373
374 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
375
376 if (!mem_res) {
377 dev_err(dev, "failed to get mem resource\n");
378 return -EINVAL;
379 }
380
381 irq = board->irq_pin;
382
383 smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");
384 if (IS_ERR(smc))
385 return PTR_ERR(smc);
386
387 ret = at91sam9_smc_fields_init(dev);
388 if (ret < 0)
389 return ret;
390
391 /* init ata host */
392
393 host = ata_host_alloc(dev, 1);
394
395 if (!host)
396 return -ENOMEM;
397
398 ap = host->ports[0];
399 ap->ops = &pata_at91_port_ops;
400 ap->flags |= ATA_FLAG_SLAVE_POSS;
401 ap->pio_mask = ATA_PIO4;
402
403 if (!gpio_is_valid(irq)) {
404 ap->flags |= ATA_FLAG_PIO_POLLING;
405 ata_port_desc(ap, "no IRQ, using PIO polling");
406 }
407
408 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
409
410 if (!info) {
411 dev_err(dev, "failed to allocate memory for private data\n");
412 return -ENOMEM;
413 }
414
415 info->mck = clk_get(NULL, "mck");
416
417 if (IS_ERR(info->mck)) {
418 dev_err(dev, "failed to get access to mck clock\n");
419 return -ENODEV;
420 }
421
422 info->cs = board->chipselect;
423 info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
424 AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
425 AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
426
427 info->ide_addr = devm_ioremap(dev,
428 mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
429
430 if (!info->ide_addr) {
431 dev_err(dev, "failed to map IO base\n");
432 ret = -ENOMEM;
433 goto err_put;
434 }
435
436 info->alt_addr = devm_ioremap(dev,
437 mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
438
439 if (!info->alt_addr) {
440 dev_err(dev, "failed to map CTL base\n");
441 ret = -ENOMEM;
442 goto err_put;
443 }
444
445 ap->ioaddr.cmd_addr = info->ide_addr;
446 ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
447 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
448
449 ata_sff_std_ports(&ap->ioaddr);
450
451 ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
452 (unsigned long long)mem_res->start + CF_IDE_OFFSET,
453 (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
454
455 host->private_data = info;
456
457 ret = ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
458 gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
459 irq_flags, &pata_at91_sht);
460 if (ret)
461 goto err_put;
462
463 return 0;
464
465err_put:
466 clk_put(info->mck);
467 return ret;
468}
469
470static int pata_at91_remove(struct platform_device *pdev)
471{
472 struct ata_host *host = platform_get_drvdata(pdev);
473 struct at91_ide_info *info;
474
475 if (!host)
476 return 0;
477 info = host->private_data;
478
479 ata_host_detach(host);
480
481 if (!info)
482 return 0;
483
484 clk_put(info->mck);
485
486 return 0;
487}
488
489static struct platform_driver pata_at91_driver = {
490 .probe = pata_at91_probe,
491 .remove = pata_at91_remove,
492 .driver = {
493 .name = DRV_NAME,
494 },
495};
496
497module_platform_driver(pata_at91_driver);
498
499MODULE_LICENSE("GPL");
500MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
501MODULE_AUTHOR("Matyukevich Sergey");
502MODULE_VERSION(DRV_VERSION);
503
diff --git a/drivers/ata/pata_macio.c b/drivers/ata/pata_macio.c
index e347e7acd8ed..0adcb40d2794 100644
--- a/drivers/ata/pata_macio.c
+++ b/drivers/ata/pata_macio.c
@@ -1328,7 +1328,7 @@ static int pata_macio_pci_resume(struct pci_dev *pdev)
1328} 1328}
1329#endif /* CONFIG_PM_SLEEP */ 1329#endif /* CONFIG_PM_SLEEP */
1330 1330
1331static struct of_device_id pata_macio_match[] = 1331static const struct of_device_id pata_macio_match[] =
1332{ 1332{
1333 { 1333 {
1334 .name = "IDE", 1334 .name = "IDE",
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 252ba27fa63b..9730125530f6 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -847,7 +847,7 @@ mpc52xx_ata_resume(struct platform_device *op)
847} 847}
848#endif 848#endif
849 849
850static struct of_device_id mpc52xx_ata_of_match[] = { 850static const struct of_device_id mpc52xx_ata_of_match[] = {
851 { .compatible = "fsl,mpc5200-ata", }, 851 { .compatible = "fsl,mpc5200-ata", },
852 { .compatible = "mpc5200-ata", }, 852 { .compatible = "mpc5200-ata", },
853 {}, 853 {},
diff --git a/drivers/ata/pata_of_platform.c b/drivers/ata/pata_of_platform.c
index 201a32d0627f..01161c1aef4d 100644
--- a/drivers/ata/pata_of_platform.c
+++ b/drivers/ata/pata_of_platform.c
@@ -67,7 +67,7 @@ static int pata_of_platform_probe(struct platform_device *ofdev)
67 reg_shift, pio_mask, &pata_platform_sht); 67 reg_shift, pio_mask, &pata_platform_sht);
68} 68}
69 69
70static struct of_device_id pata_of_platform_match[] = { 70static const struct of_device_id pata_of_platform_match[] = {
71 { .compatible = "ata-generic", }, 71 { .compatible = "ata-generic", },
72 { }, 72 { },
73}; 73};
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index a723ae929783..01734d54c69c 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -1612,7 +1612,7 @@ static int sata_fsl_resume(struct platform_device *op)
1612} 1612}
1613#endif 1613#endif
1614 1614
1615static struct of_device_id fsl_sata_match[] = { 1615static const struct of_device_id fsl_sata_match[] = {
1616 { 1616 {
1617 .compatible = "fsl,pq-sata", 1617 .compatible = "fsl,pq-sata",
1618 }, 1618 },
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 00ce26d0c047..b66bcda88320 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -4286,7 +4286,7 @@ static int mv_platform_resume(struct platform_device *pdev)
4286#endif 4286#endif
4287 4287
4288#ifdef CONFIG_OF 4288#ifdef CONFIG_OF
4289static struct of_device_id mv_sata_dt_ids[] = { 4289static const struct of_device_id mv_sata_dt_ids[] = {
4290 { .compatible = "marvell,armada-370-sata", }, 4290 { .compatible = "marvell,armada-370-sata", },
4291 { .compatible = "marvell,orion-sata", }, 4291 { .compatible = "marvell,orion-sata", },
4292 {}, 4292 {},
diff --git a/include/linux/ata.h b/include/linux/ata.h
index af6859b3a93d..ad7d9ee89ff0 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -817,11 +817,6 @@ static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id)
817 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false; 817 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false;
818} 818}
819 819
820static inline bool ata_id_sct_write_same(const u16 *id)
821{
822 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 2) ? true : false;
823}
824
825static inline bool ata_id_sct_long_sector_access(const u16 *id) 820static inline bool ata_id_sct_long_sector_access(const u16 *id)
826{ 821{
827 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false; 822 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false;