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-rw-r--r--arch/mips/kernel/kprobes.c61
-rw-r--r--arch/mips/kernel/probes-common.h81
-rw-r--r--arch/mips/kernel/uprobes.c65
3 files changed, 87 insertions, 120 deletions
diff --git a/arch/mips/kernel/kprobes.c b/arch/mips/kernel/kprobes.c
index 212f46f2014e..747e3bf7bd9f 100644
--- a/arch/mips/kernel/kprobes.c
+++ b/arch/mips/kernel/kprobes.c
@@ -32,7 +32,8 @@
32#include <asm/ptrace.h> 32#include <asm/ptrace.h>
33#include <asm/branch.h> 33#include <asm/branch.h>
34#include <asm/break.h> 34#include <asm/break.h>
35#include <asm/inst.h> 35
36#include "probes-common.h"
36 37
37static const union mips_instruction breakpoint_insn = { 38static const union mips_instruction breakpoint_insn = {
38 .b_format = { 39 .b_format = {
@@ -55,63 +56,7 @@ DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
55 56
56static int __kprobes insn_has_delayslot(union mips_instruction insn) 57static int __kprobes insn_has_delayslot(union mips_instruction insn)
57{ 58{
58 switch (insn.i_format.opcode) { 59 return __insn_has_delay_slot(insn);
59
60 /*
61 * This group contains:
62 * jr and jalr are in r_format format.
63 */
64 case spec_op:
65 switch (insn.r_format.func) {
66 case jr_op:
67 case jalr_op:
68 break;
69 default:
70 goto insn_ok;
71 }
72
73 /*
74 * This group contains:
75 * bltz_op, bgez_op, bltzl_op, bgezl_op,
76 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
77 */
78 case bcond_op:
79
80 /*
81 * These are unconditional and in j_format.
82 */
83 case jal_op:
84 case j_op:
85
86 /*
87 * These are conditional and in i_format.
88 */
89 case beq_op:
90 case beql_op:
91 case bne_op:
92 case bnel_op:
93 case blez_op:
94 case blezl_op:
95 case bgtz_op:
96 case bgtzl_op:
97
98 /*
99 * These are the FPA/cp1 branch instructions.
100 */
101 case cop1_op:
102
103#ifdef CONFIG_CPU_CAVIUM_OCTEON
104 case lwc2_op: /* This is bbit0 on Octeon */
105 case ldc2_op: /* This is bbit032 on Octeon */
106 case swc2_op: /* This is bbit1 on Octeon */
107 case sdc2_op: /* This is bbit132 on Octeon */
108#endif
109 return 1;
110 default:
111 break;
112 }
113insn_ok:
114 return 0;
115} 60}
116 61
117/* 62/*
diff --git a/arch/mips/kernel/probes-common.h b/arch/mips/kernel/probes-common.h
new file mode 100644
index 000000000000..c979c3790e4c
--- /dev/null
+++ b/arch/mips/kernel/probes-common.h
@@ -0,0 +1,81 @@
1/*
2 * Copyright (C) 2016 Imagination Technologies
3 * Author: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __PROBES_COMMON_H
12#define __PROBES_COMMON_H
13
14#include <asm/inst.h>
15
16static inline int __insn_has_delay_slot(const union mips_instruction insn)
17{
18 switch (insn.i_format.opcode) {
19 /*
20 * jr and jalr are in r_format format.
21 */
22 case spec_op:
23 switch (insn.r_format.func) {
24 case jalr_op:
25 case jr_op:
26 return 1;
27 }
28 break;
29
30 /*
31 * This group contains:
32 * bltz_op, bgez_op, bltzl_op, bgezl_op,
33 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
34 */
35 case bcond_op:
36 switch (insn.i_format.rt) {
37 case bltz_op:
38 case bltzl_op:
39 case bgez_op:
40 case bgezl_op:
41 case bltzal_op:
42 case bltzall_op:
43 case bgezal_op:
44 case bgezall_op:
45 case bposge32_op:
46 return 1;
47 }
48 break;
49
50 /*
51 * These are unconditional and in j_format.
52 */
53 case jal_op:
54 case j_op:
55 case beq_op:
56 case beql_op:
57 case bne_op:
58 case bnel_op:
59 case blez_op: /* not really i_format */
60 case blezl_op:
61 case bgtz_op:
62 case bgtzl_op:
63 return 1;
64
65 /*
66 * And now the FPA/cp1 branch instructions.
67 */
68 case cop1_op:
69#ifdef CONFIG_CPU_CAVIUM_OCTEON
70 case lwc2_op: /* This is bbit0 on Octeon */
71 case ldc2_op: /* This is bbit032 on Octeon */
72 case swc2_op: /* This is bbit1 on Octeon */
73 case sdc2_op: /* This is bbit132 on Octeon */
74#endif
75 return 1;
76 }
77
78 return 0;
79}
80
81#endif /* __PROBES_COMMON_H */
diff --git a/arch/mips/kernel/uprobes.c b/arch/mips/kernel/uprobes.c
index 15ad17cb2b6e..1161c93a74cb 100644
--- a/arch/mips/kernel/uprobes.c
+++ b/arch/mips/kernel/uprobes.c
@@ -8,71 +8,12 @@
8#include <asm/branch.h> 8#include <asm/branch.h>
9#include <asm/cpu-features.h> 9#include <asm/cpu-features.h>
10#include <asm/ptrace.h> 10#include <asm/ptrace.h>
11#include <asm/inst.h> 11
12#include "probes-common.h"
12 13
13static inline int insn_has_delay_slot(const union mips_instruction insn) 14static inline int insn_has_delay_slot(const union mips_instruction insn)
14{ 15{
15 switch (insn.i_format.opcode) { 16 return __insn_has_delay_slot(insn);
16 /*
17 * jr and jalr are in r_format format.
18 */
19 case spec_op:
20 switch (insn.r_format.func) {
21 case jalr_op:
22 case jr_op:
23 return 1;
24 }
25 break;
26
27 /*
28 * This group contains:
29 * bltz_op, bgez_op, bltzl_op, bgezl_op,
30 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
31 */
32 case bcond_op:
33 switch (insn.i_format.rt) {
34 case bltz_op:
35 case bltzl_op:
36 case bgez_op:
37 case bgezl_op:
38 case bltzal_op:
39 case bltzall_op:
40 case bgezal_op:
41 case bgezall_op:
42 case bposge32_op:
43 return 1;
44 }
45 break;
46
47 /*
48 * These are unconditional and in j_format.
49 */
50 case jal_op:
51 case j_op:
52 case beq_op:
53 case beql_op:
54 case bne_op:
55 case bnel_op:
56 case blez_op: /* not really i_format */
57 case blezl_op:
58 case bgtz_op:
59 case bgtzl_op:
60 return 1;
61
62 /*
63 * And now the FPA/cp1 branch instructions.
64 */
65 case cop1_op:
66#ifdef CONFIG_CPU_CAVIUM_OCTEON
67 case lwc2_op: /* This is bbit0 on Octeon */
68 case ldc2_op: /* This is bbit032 on Octeon */
69 case swc2_op: /* This is bbit1 on Octeon */
70 case sdc2_op: /* This is bbit132 on Octeon */
71#endif
72 return 1;
73 }
74
75 return 0;
76} 17}
77 18
78/** 19/**
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