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-rw-r--r--drivers/phy/marvell/phy-berlin-sata.c5
-rw-r--r--include/linux/phy/phy.h1
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/phy/marvell/phy-berlin-sata.c b/drivers/phy/marvell/phy-berlin-sata.c
index a91fc67fc4e0..d70ba9bc42d9 100644
--- a/drivers/phy/marvell/phy-berlin-sata.c
+++ b/drivers/phy/marvell/phy-berlin-sata.c
@@ -32,7 +32,7 @@
32 32
33/* register 0x01 */ 33/* register 0x01 */
34#define REF_FREF_SEL_25 BIT(0) 34#define REF_FREF_SEL_25 BIT(0)
35#define PHY_MODE_SATA (0x0 << 5) 35#define PHY_BERLIN_MODE_SATA (0x0 << 5)
36 36
37/* register 0x02 */ 37/* register 0x02 */
38#define USE_MAX_PLL_RATE BIT(12) 38#define USE_MAX_PLL_RATE BIT(12)
@@ -102,7 +102,8 @@ static int phy_berlin_sata_power_on(struct phy *phy)
102 102
103 /* set PHY mode and ref freq to 25 MHz */ 103 /* set PHY mode and ref freq to 25 MHz */
104 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01, 104 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
105 0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA); 105 0x00ff,
106 REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
106 107
107 /* set PHY up to 6 Gbps */ 108 /* set PHY up to 6 Gbps */
108 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25, 109 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index e8e118d70fd7..3f350e2749fe 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -42,6 +42,7 @@ enum phy_mode {
42 PHY_MODE_PCIE, 42 PHY_MODE_PCIE,
43 PHY_MODE_ETHERNET, 43 PHY_MODE_ETHERNET,
44 PHY_MODE_MIPI_DPHY, 44 PHY_MODE_MIPI_DPHY,
45 PHY_MODE_SATA
45}; 46};
46 47
47/** 48/**