743 files changed, 14944 insertions, 7639 deletions

diff --git a/CREDITS b/CREDITS
index 4fc997d58ab2..4c7738f49357 100644
--- a/CREDITS
+++ b/CREDITS
@@ -655,6 +655,11 @@ S: Stanford University
 S: Stanford, California 94305
 S: USA
 
+N: Carlos Chinea
+E: carlos.chinea@nokia.com
+E: cch.devel@gmail.com
+D: Author of HSI Subsystem
+
 N: Randolph Chung
 E: tausq@debian.org
 D: Linux/PA-RISC hacker
diff --git a/Documentation/DocBook/media/v4l/vidioc-expbuf.xml b/Documentation/DocBook/media/v4l/vidioc-expbuf.xml
index e287c8fc803b..4165e7bfa4ff 100644
--- a/Documentation/DocBook/media/v4l/vidioc-expbuf.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-expbuf.xml
@@ -73,7 +73,8 @@ range from zero to the maximal number of valid planes for the currently active
 format. For the single-planar API, applications must set <structfield> plane
 </structfield> to zero.  Additional flags may be posted in the <structfield>
 flags </structfield> field.  Refer to a manual for open() for details.
-Currently only O_CLOEXEC is supported.  All other fields must be set to zero.
+Currently only O_CLOEXEC, O_RDONLY, O_WRONLY, and O_RDWR are supported.  All
+other fields must be set to zero.
 In the case of multi-planar API, every plane is exported separately using
 multiple <constant> VIDIOC_EXPBUF </constant> calls. </para>
 
@@ -170,8 +171,9 @@ multi-planar API. Otherwise this value must be set to zero. </entry>
             <entry>__u32</entry>
             <entry><structfield>flags</structfield></entry>
             <entry>Flags for the newly created file, currently only <constant>
-O_CLOEXEC </constant> is supported, refer to the manual of open() for more
-details.</entry>
+O_CLOEXEC </constant>, <constant>O_RDONLY</constant>, <constant>O_WRONLY
+</constant>, and <constant>O_RDWR</constant> are supported, refer to the manual
+of open() for more details.</entry>
           </row>
           <row>
             <entry>__s32</entry>
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index da0151db9964..5a930c1528ad 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -211,6 +211,30 @@ MMP/MMP2 family (communication processor)
    Linux kernel mach directory: arch/arm/mach-mmp
    Linux kernel plat directory: arch/arm/plat-pxa
 
+Berlin family (Digital Entertainment)
+-------------------------------------
+
+  Flavors:
+        88DE3005, Armada 1500-mini
+                Design name:    BG2CD
+                Core:           ARM Cortex-A9, PL310 L2CC
+                Homepage:       http://www.marvell.com/digital-entertainment/armada-1500-mini/
+        88DE3100, Armada 1500
+                Design name:    BG2
+                Core:           Marvell PJ4B (ARMv7), Tauros3 L2CC
+                Homepage:       http://www.marvell.com/digital-entertainment/armada-1500/
+                Product Brief:  http://www.marvell.com/digital-entertainment/armada-1500/assets/Marvell-ARMADA-1500-Product-Brief.pdf
+        88DE????
+                Design name:    BG3
+                Core:           ARM Cortex-A15, CA15 integrated L2CC
+
+  Homepage: http://www.marvell.com/digital-entertainment/
+  Directory: arch/arm/mach-berlin
+
+  Comments:
+   * This line of SoCs is based on Marvell Sheeva or ARM Cortex CPUs
+     with Synopsys DesignWare (IRQ, GPIO, Timers, ...) and PXA IP (SDHCI, USB, ETH, ...).
+
 Long-term plans
 ---------------
 
diff --git a/Documentation/assoc_array.txt b/Documentation/assoc_array.txt
index f4faec0f66e4..2f2c6cdd73c0 100644
--- a/Documentation/assoc_array.txt
+++ b/Documentation/assoc_array.txt
@@ -164,10 +164,10 @@ This points to a number of methods, all of which need to be provided:
 
  (4) Diff the index keys of two objects.
 
-        int (*diff_objects)(const void *a, const void *b);
+        int (*diff_objects)(const void *object, const void *index_key);
 
-     Return the bit position at which the index keys of two objects differ or
-     -1 if they are the same.
+     Return the bit position at which the index key of the specified object
+     differs from the given index key or -1 if they are the same.
 
 
  (5) Free an object.
diff --git a/Documentation/device-mapper/cache.txt b/Documentation/device-mapper/cache.txt
index 274752f8bdf9..719320b5ed3f 100644
--- a/Documentation/device-mapper/cache.txt
+++ b/Documentation/device-mapper/cache.txt
@@ -266,10 +266,12 @@ E.g.
 Invalidation is removing an entry from the cache without writing it
 back.  Cache blocks can be invalidated via the invalidate_cblocks
 message, which takes an arbitrary number of cblock ranges.  Each cblock
-must be expressed as a decimal value, in the future a variant message
-that takes cblock ranges expressed in hexidecimal may be needed to
-better support efficient invalidation of larger caches.  The cache must
-be in passthrough mode when invalidate_cblocks is used.
+range's end value is "one past the end", meaning 5-10 expresses a range
+of values from 5 to 9.  Each cblock must be expressed as a decimal
+value, in the future a variant message that takes cblock ranges
+expressed in hexidecimal may be needed to better support efficient
+invalidation of larger caches.  The cache must be in passthrough mode
+when invalidate_cblocks is used.
 
    invalidate_cblocks [<cblock>|<cblock begin>-<cblock end>]*
 
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
new file mode 100644
index 000000000000..737afa5f8148
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
@@ -0,0 +1,24 @@
+Marvell Berlin SoC Family Device Tree Bindings
+---------------------------------------------------------------
+
+Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
+shall have the following properties:
+
+* Required root node properties:
+compatible: must contain "marvell,berlin"
+
+In addition, the above compatible shall be extended with the specific
+SoC and board used. Currently known SoC compatibles are:
+    "marvell,berlin2"      for Marvell Armada 1500 (BG2, 88DE3100),
+    "marvell,berlin2cd"    for Marvell Armada 1500-mini (BG2CD, 88DE3005)
+    "marvell,berlin2ct"    for Marvell Armada ? (BG2CT, 88DE????)
+    "marvell,berlin3"      for Marvell Armada ? (BG3, 88DE????)
+
+* Example:
+
+/ {
+        model = "Sony NSZ-GS7";
+        compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
+
+        ...
+}
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 1608a54e90e1..68ac65f82a1c 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -9,6 +9,7 @@ Required properties:
 - compatible : Should contain "nvidia,tegra<chip>-pmc".
 - reg : Offset and length of the register set for the device
 - clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
   "pclk" (The Tegra clock of that name),
   "clk32k_in" (The 32KHz clock input to Tegra).
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
index 0c80c2677104..9acea9d93160 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
@@ -15,6 +15,9 @@ Required properties :
   In clock consumers, this cell represents the clock ID exposed by the
   CAR. The assignments may be found in header file
   <dt-bindings/clock/tegra114-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
 Example SoC include file:
 
@@ -23,6 +26,7 @@ Example SoC include file:
                 compatible = "nvidia,tegra114-car";
                 reg = <0x60006000 0x1000>;
                 #clock-cells = <1>;
+                #reset-cells = <1>;
         };
 
         usb@c5004000 {
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
new file mode 100644
index 000000000000..ded5d6212c84
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
@@ -0,0 +1,63 @@
+NVIDIA Tegra124 Clock And Reset Controller
+
+This binding uses the common clock binding:
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
+for muxing and gating Tegra's clocks, and setting their rates.
+
+Required properties :
+- compatible : Should be "nvidia,tegra124-car"
+- reg : Should contain CAR registers location and length
+- clocks : Should contain phandle and clock specifiers for two clocks:
+  the 32 KHz "32k_in", and the board-specific oscillator "osc".
+- #clock-cells : Should be 1.
+  In clock consumers, this cell represents the clock ID exposed by the
+  CAR. The assignments may be found in header file
+  <dt-bindings/clock/tegra124-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
+
+Example SoC include file:
+
+/ {
+        tegra_car: clock {
+                compatible = "nvidia,tegra124-car";
+                reg = <0x60006000 0x1000>;
+                #clock-cells = <1>;
+                #reset-cells = <1>;
+        };
+
+        usb@c5004000 {
+                clocks = <&tegra_car TEGRA124_CLK_USB2>;
+        };
+};
+
+Example board file:
+
+/ {
+        clocks {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                osc: clock@0 {
+                        compatible = "fixed-clock";
+                        reg = <0>;
+                        #clock-cells = <0>;
+                        clock-frequency = <112400000>;
+                };
+
+                clk_32k: clock@1 {
+                        compatible = "fixed-clock";
+                        reg = <1>;
+                        #clock-cells = <0>;
+                        clock-frequency = <32768>;
+                };
+        };
+
+        &tegra_car {
+                clocks = <&clk_32k> <&osc>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
index fcfed5bf73fb..6c5901b503d0 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
@@ -15,6 +15,9 @@ Required properties :
   In clock consumers, this cell represents the clock ID exposed by the
   CAR. The assignments may be found in header file
   <dt-bindings/clock/tegra20-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
 Example SoC include file:
 
@@ -23,6 +26,7 @@ Example SoC include file:
                 compatible = "nvidia,tegra20-car";
                 reg = <0x60006000 0x1000>;
                 #clock-cells = <1>;
+                #reset-cells = <1>;
         };
 
         usb@c5004000 {
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
index 0f714081e986..63618cde12df 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
@@ -15,6 +15,9 @@ Required properties :
   In clock consumers, this cell represents the clock ID exposed by the
   CAR. The assignments may be found in header file
   <dt-bindings/clock/tegra30-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
 Example SoC include file:
 
@@ -23,6 +26,7 @@ Example SoC include file:
                 compatible = "nvidia,tegra30-car";
                 reg = <0x60006000 0x1000>;
                 #clock-cells = <1>;
+                #reset-cells = <1>;
         };
 
         usb@c5004000 {
diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
index 90fa7da525b8..c6908e7c42cc 100644
--- a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
+++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -5,6 +5,16 @@ Required properties:
 - reg: Should contain DMA registers location and length. This shuld include
   all of the per-channel registers.
 - interrupts: Should contain all of the per-channel DMA interrupts.
+- clocks: Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - dma
+- #dma-cells : Must be <1>. This dictates the length of DMA specifiers in
+  client nodes' dmas properties. The specifier represents the DMA request
+  select value for the peripheral. For more details, consult the Tegra TRM's
+  documentation of the APB DMA channel control register REQ_SEL field.
 
 Examples:
 
@@ -27,4 +37,8 @@ apbdma: dma@6000a000 {
                        0 149 0x04
                        0 150 0x04
                        0 151 0x04 >;
+        clocks = <&tegra_car 34>;
+        resets = <&tegra_car 34>;
+        reset-names = "dma";
+        #dma-cells = <1>;
 };
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index b4fa934ae3a2..ab45c02aa658 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -9,6 +9,12 @@ Required properties:
 - #size-cells: The number of cells used to represent the size of an address
   range in the host1x address space. Should be 1.
 - ranges: The mapping of the host1x address space to the CPU address space.
+- clocks: Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - host1x
 
 The host1x top-level node defines a number of children, each representing one
 of the following host1x client modules:
@@ -19,6 +25,12 @@ of the following host1x client modules:
   - compatible: "nvidia,tegra<chip>-mpe"
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - mpe
 
 - vi: video input
 
@@ -26,6 +38,12 @@ of the following host1x client modules:
   - compatible: "nvidia,tegra<chip>-vi"
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - vi
 
 - epp: encoder pre-processor
 
@@ -33,6 +51,12 @@ of the following host1x client modules:
   - compatible: "nvidia,tegra<chip>-epp"
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - epp
 
 - isp: image signal processor
 
@@ -40,6 +64,12 @@ of the following host1x client modules:
   - compatible: "nvidia,tegra<chip>-isp"
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - isp
 
 - gr2d: 2D graphics engine
 
@@ -47,12 +77,30 @@ of the following host1x client modules:
   - compatible: "nvidia,tegra<chip>-gr2d"
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - 2d
 
 - gr3d: 3D graphics engine
 
   Required properties:
   - compatible: "nvidia,tegra<chip>-gr3d"
   - reg: Physical base address and length of the controller's registers.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    (This property may be omitted if the only clock in the list is "3d")
+    - 3d
+      This MUST be the first entry.
+    - 3d2 (Only required on SoCs with two 3D clocks)
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - 3d
+    - 3d2 (Only required on SoCs with two 3D clocks)
 
 - dc: display controller
 
@@ -60,6 +108,16 @@ of the following host1x client modules:
   - compatible: "nvidia,tegra<chip>-dc"
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - dc
+      This MUST be the first entry.
+    - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - dc
 
   Each display controller node has a child node, named "rgb", that represents
   the RGB output associated with the controller. It can take the following
@@ -76,6 +134,16 @@ of the following host1x client modules:
   - interrupts: The interrupt outputs from the controller.
   - vdd-supply: regulator for supply voltage
   - pll-supply: regulator for PLL
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - hdmi
+      This MUST be the first entry.
+    - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - hdmi
 
   Optional properties:
   - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
@@ -88,12 +156,24 @@ of the following host1x client modules:
   - compatible: "nvidia,tegra<chip>-tvo"
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
 
 - dsi: display serial interface
 
   Required properties:
   - compatible: "nvidia,tegra<chip>-dsi"
   - reg: Physical base address and length of the controller's registers.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - dsi
+      This MUST be the first entry.
+    - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - dsi
 
 Example:
 
@@ -105,6 +185,9 @@ Example:
                 reg = <0x50000000 0x00024000>;
                 interrupts = <0 65 0x04   /* mpcore syncpt */
                               0 67 0x04>; /* mpcore general */
+                clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
+                resets = <&tegra_car 28>;
+                reset-names = "host1x";
 
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -115,41 +198,64 @@ Example:
                         compatible = "nvidia,tegra20-mpe";
                         reg = <0x54040000 0x00040000>;
                         interrupts = <0 68 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_MPE>;
+                        resets = <&tegra_car 60>;
+                        reset-names = "mpe";
                 };
 
                 vi {
                         compatible = "nvidia,tegra20-vi";
                         reg = <0x54080000 0x00040000>;
                         interrupts = <0 69 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_VI>;
+                        resets = <&tegra_car 100>;
+                        reset-names = "vi";
                 };
 
                 epp {
                         compatible = "nvidia,tegra20-epp";
                         reg = <0x540c0000 0x00040000>;
                         interrupts = <0 70 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_EPP>;
+                        resets = <&tegra_car 19>;
+                        reset-names = "epp";
                 };
 
                 isp {
                         compatible = "nvidia,tegra20-isp";
                         reg = <0x54100000 0x00040000>;
                         interrupts = <0 71 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_ISP>;
+                        resets = <&tegra_car 23>;
+                        reset-names = "isp";
                 };
 
                 gr2d {
                         compatible = "nvidia,tegra20-gr2d";
                         reg = <0x54140000 0x00040000>;
                         interrupts = <0 72 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_GR2D>;
+                        resets = <&tegra_car 21>;
+                        reset-names = "2d";
                 };
 
                 gr3d {
                         compatible = "nvidia,tegra20-gr3d";
                         reg = <0x54180000 0x00040000>;
+                        clocks = <&tegra_car TEGRA20_CLK_GR3D>;
+                        resets = <&tegra_car 24>;
+                        reset-names = "3d";
                 };
 
                 dc@54200000 {
                         compatible = "nvidia,tegra20-dc";
                         reg = <0x54200000 0x00040000>;
                         interrupts = <0 73 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_DISP1>,
+                                 <&tegra_car TEGRA20_CLK_PLL_P>;
+                        clock-names = "disp1", "parent";
+                        resets = <&tegra_car 27>;
+                        reset-names = "dc";
 
                         rgb {
                                 status = "disabled";
@@ -160,6 +266,11 @@ Example:
                         compatible = "nvidia,tegra20-dc";
                         reg = <0x54240000 0x00040000>;
                         interrupts = <0 74 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_DISP2>,
+                                 <&tegra_car TEGRA20_CLK_PLL_P>;
+                        clock-names = "disp2", "parent";
+                        resets = <&tegra_car 26>;
+                        reset-names = "dc";
 
                         rgb {
                                 status = "disabled";
@@ -170,6 +281,11 @@ Example:
                         compatible = "nvidia,tegra20-hdmi";
                         reg = <0x54280000 0x00040000>;
                         interrupts = <0 75 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_HDMI>,
+                                 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
+                        clock-names = "hdmi", "parent";
+                        resets = <&tegra_car 51>;
+                        reset-names = "hdmi";
                         status = "disabled";
                 };
 
@@ -177,12 +293,18 @@ Example:
                         compatible = "nvidia,tegra20-tvo";
                         reg = <0x542c0000 0x00040000>;
                         interrupts = <0 76 0x04>;
+                        clocks = <&tegra_car TEGRA20_CLK_TVO>;
                         status = "disabled";
                 };
 
                 dsi {
                         compatible = "nvidia,tegra20-dsi";
                         reg = <0x54300000 0x00040000>;
+                        clocks = <&tegra_car TEGRA20_CLK_DSI>,
+                                 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
+                        clock-names = "dsi", "parent";
+                        resets = <&tegra_car 48>;
+                        reset-names = "dsi";
                         status = "disabled";
                 };
         };
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
index ef77cc7a0e46..87507e9ce6db 100644
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
@@ -39,12 +39,23 @@ Required properties:
 - interrupts: Should contain I2C controller interrupts.
 - address-cells: Address cells for I2C device address.
 - size-cells: Size of the I2C device address.
-- clocks: Clock ID as per
-                Documentation/devicetree/bindings/clock/tegra<chip-id>.txt
-        for I2C controller.
-- clock-names: Name of the clock:
-        Tegra20/Tegra30 I2C controller: "div-clk and "fast-clk".
-        Tegra114 I2C controller: "div-clk".
+- clocks: Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: Must include the following entries:
+  Tegra20/Tegra30:
+  - div-clk
+  - fast-clk
+  Tegra114:
+  - div-clk
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - i2c
+- dmas: Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names: Must include the following entries:
+  - rx
+  - tx
 
 Example:
 
@@ -56,5 +67,9 @@ Example:
                 #size-cells = <0>;
                 clocks = <&tegra_car 12>, <&tegra_car 124>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 12>;
+                reset-names = "i2c";
+                dmas = <&apbdma 16>, <&apbdma 16>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
diff --git a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
index 2995fae7ee47..0382b8bd69c6 100644
--- a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
+++ b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
@@ -13,6 +13,12 @@ Required properties:
   array of pin numbers which is used as column.
 - linux,keymap: The keymap for keys as described in the binding document
   devicetree/bindings/input/matrix-keymap.txt.
+- clocks: Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - kbc
 
 Optional properties, in addition to those specified by the shared
 matrix-keyboard bindings:
@@ -31,6 +37,9 @@ keyboard: keyboard {
         compatible = "nvidia,tegra20-kbc";
         reg = <0x7000e200 0x100>;
         interrupts = <0 85 0x04>;
+        clocks = <&tegra_car 36>;
+        resets = <&tegra_car 36>;
+        reset-names = "kbc";
         nvidia,ghost-filter;
         nvidia,debounce-delay-ms = <640>;
         nvidia,kbc-row-pins = <0 1 2>;    /* pin 0, 1, 2 as rows */
diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
new file mode 100644
index 000000000000..492911744ca3
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
@@ -0,0 +1,32 @@
+Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
+
+Synopsys DesignWare provides interrupt controller IP for APB known as
+dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with
+APB bus, e.g. Marvell Armada 1500.
+
+Required properties:
+- compatible: shall be "snps,dw-apb-ictl"
+- reg: physical base address of the controller and length of memory mapped
+  region starting with ENABLE_LOW register
+- interrupt-controller: identifies the node as an interrupt controller
+- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1
+- interrupts: interrupt reference to primary interrupt controller
+- interrupt-parent: (optional) reference specific primary interrupt controller
+
+The interrupt sources map to the corresponding bits in the interrupt
+registers, i.e.
+- 0 maps to bit 0 of low interrupts,
+- 1 maps to bit 1 of low interrupts,
+- 32 maps to bit 0 of high interrupts,
+- 33 maps to bit 1 of high interrupts,
+- (optional) fast interrupts start at 64.
+
+Example:
+        aic: interrupt-controller@3000 {
+                compatible = "snps,dw-apb-ictl";
+                reg = <0x3000 0xc00>;
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                interrupt-parent = <&gic>;
+                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+        };
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index c6d7b11db9eb..f357c16ea815 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -8,6 +8,12 @@ by mmc.txt and the properties used by the sdhci-tegra driver.
 
 Required properties:
 - compatible : Should be "nvidia,<chip>-sdhci"
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - sdhci
 
 Optional properties:
 - power-gpios : Specify GPIOs for power control
@@ -18,6 +24,9 @@ sdhci@c8000200 {
         compatible = "nvidia,tegra20-sdhci";
         reg = <0xc8000200 0x200>;
         interrupts = <47>;
+        clocks = <&tegra_car 14>;
+        resets = <&tegra_car 14>;
+        reset-names = "sdhci";
         cd-gpios = <&gpio 69 0>; /* gpio PI5 */
         wp-gpios = <&gpio 57 0>; /* gpio PH1 */
         power-gpios = <&gpio 155 0>; /* gpio PT3 */
diff --git a/Documentation/devicetree/bindings/net/davinci_emac.txt b/Documentation/devicetree/bindings/net/davinci_emac.txt
index 48b259e29e87..bad381faf036 100644
--- a/Documentation/devicetree/bindings/net/davinci_emac.txt
+++ b/Documentation/devicetree/bindings/net/davinci_emac.txt
@@ -4,7 +4,7 @@ This file provides information, what the device node
 for the davinci_emac interface contains.
 
 Required properties:
-- compatible: "ti,davinci-dm6467-emac";
+- compatible: "ti,davinci-dm6467-emac" or "ti,am3517-emac"
 - reg: Offset and length of the register set for the device
 - ti,davinci-ctrl-reg-offset: offset to control register
 - ti,davinci-ctrl-mod-reg-offset: offset to control module register
diff --git a/Documentation/devicetree/bindings/net/smsc-lan91c111.txt b/Documentation/devicetree/bindings/net/smsc-lan91c111.txt
index 953049b4248a..5a41a8658daa 100644
--- a/Documentation/devicetree/bindings/net/smsc-lan91c111.txt
+++ b/Documentation/devicetree/bindings/net/smsc-lan91c111.txt
@@ -8,3 +8,7 @@ Required properties:
 Optional properties:
 - phy-device : phandle to Ethernet phy
 - local-mac-address : Ethernet mac address to use
+- reg-io-width : Mask of sizes (in bytes) of the IO accesses that
+  are supported on the device.  Valid value for SMSC LAN91c111 are
+  1, 2 or 4.  If it's omitted or invalid, the size would be 2 meaning
+  16-bit access only.
diff --git a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
index 5aeee53ff9f4..5ae601e7f51f 100644
--- a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
+++ b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
@@ -7,3 +7,15 @@ Required properties:
 - clock-frequency : the frequency of the i2c bus
 - gpios : the gpio used for ec request
 - slave-addr: the i2c address of the slave controller
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names : Must include the following entries:
+  Tegra20/Tegra30:
+  - div-clk
+  - fast-clk
+  Tegra114:
+  - div-clk
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - i2c
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index 6b7510775c50..24cee06915c9 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -42,14 +42,19 @@ Required properties:
     - 0xc2000000: prefetchable memory region
   Please refer to the standard PCI bus binding document for a more detailed
   explanation.
-- clocks: List of clock inputs of the controller. Must contain an entry for
-  each entry in the clock-names property.
+- clocks: Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names: Must include the following entries:
-  "pex": The Tegra clock of that name
-  "afi": The Tegra clock of that name
-  "pcie_xclk": The Tegra clock of that name
-  "pll_e": The Tegra clock of that name
-  "cml": The Tegra clock of that name (not required for Tegra20)
+  - pex
+  - afi
+  - pll_e
+  - cml (not required for Tegra20)
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - pex
+  - afi
+  - pcie_x
 
 Root ports are defined as subnodes of the PCIe controller node.
 
@@ -91,9 +96,10 @@ SoC DTSI:
                           0x82000000 0 0xa0000000 0xa0000000 0 0x10000000   /* non-prefetchable memory */
                           0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */
 
-                clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>,
-                         <&tegra_car 118>;
-                clock-names = "pex", "afi", "pcie_xclk", "pll_e";
+                clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 118>;
+                clock-names = "pex", "afi", "pll_e";
+                resets = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>;
+                reset-names = "pex", "afi", "pcie_x";
                 status = "disabled";
 
                 pci@1,0 {
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index c3fc57af8772..c7ea9d4a988b 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -7,6 +7,12 @@ Required properties:
 - reg: physical base address and length of the controller's registers
 - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
   the cells format.
+- clocks: Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - pwm
 
 Example:
 
@@ -14,4 +20,7 @@ Example:
                 compatible = "nvidia,tegra20-pwm";
                 reg = <0x7000a000 0x100>;
                 #pwm-cells = <2>;
+                clocks = <&tegra_car 17>;
+                resets = <&tegra_car 17>;
+                reset-names = "pwm";
         };
diff --git a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
index 93f45e9dce7c..652d1ff2e8be 100644
--- a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
@@ -9,6 +9,8 @@ Required properties:
 - compatible : should be "nvidia,tegra20-rtc".
 - reg : Specifies base physical address and size of the registers.
 - interrupts : A single interrupt specifier.
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
 
 Example:
 
@@ -16,4 +18,5 @@ timer {
         compatible = "nvidia,tegra20-rtc";
         reg = <0x7000e000 0x100>;
         interrupts = <0 2 0x04>;
+        clocks = <&tegra_car 4>;
 };
diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
index 392a4493eebd..845850caf088 100644
--- a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
+++ b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
@@ -4,8 +4,17 @@ Required properties:
 - compatible : should be "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart".
 - reg: Should contain UART controller registers location and length.
 - interrupts: Should contain UART controller interrupts.
-- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
-  request selector for this UART controller.
+- clocks: Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - serial
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx
+  - tx
 
 Optional properties:
 - nvidia,enable-modem-interrupt: Enable modem interrupts. Should be enable
@@ -18,7 +27,11 @@ serial@70006000 {
         reg = <0x70006000 0x40>;
         reg-shift = <2>;
         interrupts = <0 36 0x04>;
-        nvidia,dma-request-selector = <&apbdma 8>;
         nvidia,enable-modem-interrupt;
+        clocks = <&tegra_car 6>;
+        resets = <&tegra_car 6>;
+        reset-names = "serial";
+        dmas = <&apbdma 8>, <&apbdma 8>;
+        dma-names = "rx", "tx";
         status = "disabled";
 };
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt
index 8b8903ef0800..57f40f93453e 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt
@@ -3,10 +3,11 @@ NVIDIA Tegra audio complex
 Required properties:
 - compatible : "nvidia,tegra-audio-alc5632"
 - clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
-  "pll_a" (The Tegra clock of that name),
-  "pll_a_out0" (The Tegra clock of that name),
-  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
+  - pll_a
+  - pll_a_out0
+  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
 - nvidia,model : The user-visible name of this sound complex.
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt
index dc6224994d69..7788808dcd0b 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt
@@ -3,10 +3,11 @@ NVIDIA Tegra audio complex, with RT5640 CODEC
 Required properties:
 - compatible : "nvidia,tegra-audio-rt5640"
 - clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
-  "pll_a" (The Tegra clock of that name),
-  "pll_a_out0" (The Tegra clock of that name),
-  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
+  - pll_a
+  - pll_a_out0
+  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
 - nvidia,model : The user-visible name of this sound complex.
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt
index aab6ce0ad2fc..96f6a57dd6b4 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt
@@ -3,10 +3,11 @@ NVIDIA Tegra audio complex
 Required properties:
 - compatible : "nvidia,tegra-audio-wm8753"
 - clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
-  "pll_a" (The Tegra clock of that name),
-  "pll_a_out0" (The Tegra clock of that name),
-  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
+  - pll_a
+  - pll_a_out0
+  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
 - nvidia,model : The user-visible name of this sound complex.
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt
index 4b44dfb6ca0d..b795d282818d 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt
@@ -3,10 +3,11 @@ NVIDIA Tegra audio complex
 Required properties:
 - compatible : "nvidia,tegra-audio-wm8903"
 - clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
-  "pll_a" (The Tegra clock of that name),
-  "pll_a_out0" (The Tegra clock of that name),
-  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
+  - pll_a
+  - pll_a_out0
+  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
 - nvidia,model : The user-visible name of this sound complex.
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt
index ad589b163639..436f6cd9d07c 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt
@@ -3,10 +3,11 @@ NVIDIA Tegra audio complex
 Required properties:
 - compatible : "nvidia,tegra-audio-wm9712"
 - clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
-  "pll_a" (The Tegra clock of that name),
-  "pll_a_out0" (The Tegra clock of that name),
-  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
+  - pll_a
+  - pll_a_out0
+  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
 - nvidia,model : The user-visible name of this sound complex.
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
index c1454979c1ef..eaf00102d92c 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
@@ -4,19 +4,33 @@ Required properties:
 - compatible : "nvidia,tegra20-ac97"
 - reg : Should contain AC97 controller registers location and length
 - interrupts : Should contain AC97 interrupt
-- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
-  request selector for the AC97 controller
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - ac97
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx
+  - tx
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
 - nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
   of the GPIO used to reset the external AC97 codec
 - nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
   of the GPIO corresponding with the AC97 DAP _FS line
+
 Example:
 
 ac97@70002000 {
         compatible = "nvidia,tegra20-ac97";
         reg = <0x70002000 0x200>;
         interrupts = <0 81 0x04>;
-        nvidia,dma-request-selector = <&apbdma 12>;
         nvidia,codec-reset-gpio = <&gpio 170 0>;
         nvidia,codec-sync-gpio = <&gpio 120 0>;
+        clocks = <&tegra_car 3>;
+        resets = <&tegra_car 3>;
+        reset-names = "ac97";
+        dmas = <&apbdma 12>, <&apbdma 12>;
+        dma-names = "rx", "tx";
 };
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
index 0df2b5c816e3..dc30c6bfbe95 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
@@ -4,8 +4,17 @@ Required properties:
 - compatible : "nvidia,tegra20-i2s"
 - reg : Should contain I2S registers location and length
 - interrupts : Should contain I2S interrupt
-- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
-  request selector for this I2S controller
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - i2s
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx
+  - tx
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
 
 Example:
 
@@ -13,5 +22,9 @@ i2s@70002800 {
         compatible = "nvidia,tegra20-i2s";
         reg = <0x70002800 0x200>;
         interrupts = < 45 >;
-        nvidia,dma-request-selector = < &apbdma 2 >;
+        clocks = <&tegra_car 11>;
+        resets = <&tegra_car 11>;
+        reset-names = "i2s";
+        dmas = <&apbdma 21>, <&apbdma 21>;
+        dma-names = "rx", "tx";
 };
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
index 0e5c12c66523..946e2ac46091 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
@@ -7,18 +7,48 @@ Required properties:
   - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
   - Tegra114 requires an additional entry, for the APBIF2 register block.
 - interrupts : Should contain AHUB interrupt
-- nvidia,dma-request-selector : A list of the DMA channel specifiers. Each
-  entry contains the Tegra DMA controller's phandle and request selector.
-  If a single entry is present, the request selectors for the channels are
-  assumed to be contiguous, and increment from this value.
-  If multiple values are given, one value must be given per channel.
-- clocks : Must contain an entry for each required entry in clock-names.
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
-  - Tegra30: Requires d_audio, apbif, i2s0, i2s1, i2s2, i2s3, i2s4, dam0,
-    dam1, dam2, spdif_in.
-  - Tegra114: Additionally requires amx, adx.
+  - d_audio
+  - apbif
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  Tegra30 and later:
+  - d_audio
+  - apbif
+  - i2s0
+  - i2s1
+  - i2s2
+  - i2s3
+  - i2s4
+  - dam0
+  - dam1
+  - dam2
+  - spdif
+  Tegra114 and later additionally require:
+  - amx
+  - adx
+  Tegra124 and later additionally require:
+  - amx1
+  - adx1
+  - afc0
+  - afc1
+  - afc2
+  - afc3
+  - afc4
+  - afc5
 - ranges : The bus address mapping for the configlink register bus.
   Can be empty since the mapping is 1:1.
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx0 .. rx<n>
+  - tx0 .. tx<n>
+  ... where n is:
+  Tegra30: 3
+  Tegra114, Tegra124: 9
 - #address-cells : For the configlink bus. Should be <1>;
 - #size-cells : For the configlink bus. Should be <1>.
 
@@ -35,13 +65,20 @@ ahub@70080000 {
         reg = <0x70080000 0x200 0x70080200 0x100>;
         interrupts = < 0 103 0x04 >;
         nvidia,dma-request-selector = <&apbdma 1>;
-        clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
+        clocks = <&tegra_car 106>, <&tegra_car 107>;
+        clock-names = "d_audio", "apbif";
+        resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
                 <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
                 <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,
-                <&tegra_car 110>, <&tegra_car 162>;
-        clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
+                <&tegra_car 110>, <&tegra_car 10>;
+        reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
                 "i2s3", "i2s4", "dam0", "dam1", "dam2",
-                "spdif_in";
+                "spdif";
+        dmas = <&apbdma 1>, <&apbdma 1>;
+               <&apbdma 2>, <&apbdma 2>;
+               <&apbdma 3>, <&apbdma 3>;
+               <&apbdma 4>, <&apbdma 4>;
+        dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3";
         ranges;
         #address-cells = <1>;
         #size-cells = <1>;
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
index dfa6c037124a..0c113ffe3814 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
@@ -3,13 +3,22 @@ NVIDIA Tegra30 I2S controller
 Required properties:
 - compatible : "nvidia,tegra30-i2s"
 - reg : Should contain I2S registers location and length
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - i2s
 - nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)
   first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.
 
 Example:
 
-i2s@70002800 {
+i2s@70080300 {
         compatible = "nvidia,tegra30-i2s";
         reg = <0x70080300 0x100>;
         nvidia,ahub-cif-ids = <4 4>;
+        clocks = <&tegra_car 11>;
+        resets = <&tegra_car 11>;
+        reset-names = "i2s";
 };
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index 91ff771c7e77..7ea701e07dc2 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -4,10 +4,19 @@ Required properties:
 - compatible : should be "nvidia,tegra114-spi".
 - reg: Should contain SPI registers location and length.
 - interrupts: Should contain SPI interrupts.
-- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
-  request selector for this SPI controller.
-- This is also require clock named "spi" as per binding document
-  Documentation/devicetree/bindings/clock/clock-bindings.txt
+- clock-names : Must include the following entries:
+  - spi
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - spi
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx
+  - tx
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
 
 Recommended properties:
 - spi-max-frequency: Definition as per
@@ -18,9 +27,14 @@ spi@7000d600 {
         compatible = "nvidia,tegra114-spi";
         reg = <0x7000d600 0x200>;
         interrupts = <0 82 0x04>;
-        nvidia,dma-request-selector = <&apbdma 16>;
         spi-max-frequency = <25000000>;
         #address-cells = <1>;
         #size-cells = <0>;
+        clocks = <&tegra_car 44>;
+        clock-names = "spi";
+        resets = <&tegra_car 44>;
+        reset-names = "spi";
+        dmas = <&apbdma 16>, <&apbdma 16>;
+        dma-names = "rx", "tx";
         status = "disabled";
 };
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
index 7b53da5cb75b..bdf08e6dec9b 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
@@ -4,8 +4,17 @@ Required properties:
 - compatible : should be "nvidia,tegra20-sflash".
 - reg: Should contain SFLASH registers location and length.
 - interrupts: Should contain SFLASH interrupts.
-- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
-  request selector for this SFLASH controller.
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - spi
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx
+  - tx
 
 Recommended properties:
 - spi-max-frequency: Definition as per
@@ -17,10 +26,13 @@ spi@7000c380 {
         compatible = "nvidia,tegra20-sflash";
         reg = <0x7000c380 0x80>;
         interrupts = <0 39 0x04>;
-        nvidia,dma-request-selector = <&apbdma 16>;
         spi-max-frequency = <25000000>;
         #address-cells = <1>;
         #size-cells = <0>;
+        clocks = <&tegra_car 43>;
+        resets = <&tegra_car 43>;
+        reset-names = "spi";
+        dmas = <&apbdma 11>, <&apbdma 11>;
+        dma-names = "rx", "tx";
         status = "disabled";
 };
-
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
index eefe15e3d95e..5db9144a33c8 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
@@ -4,8 +4,17 @@ Required properties:
 - compatible : should be "nvidia,tegra20-slink", "nvidia,tegra30-slink".
 - reg: Should contain SLINK registers location and length.
 - interrupts: Should contain SLINK interrupts.
-- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
-  request selector for this SLINK controller.
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - spi
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx
+  - tx
 
 Recommended properties:
 - spi-max-frequency: Definition as per
@@ -17,10 +26,13 @@ spi@7000d600 {
         compatible = "nvidia,tegra20-slink";
         reg = <0x7000d600 0x200>;
         interrupts = <0 82 0x04>;
-        nvidia,dma-request-selector = <&apbdma 16>;
         spi-max-frequency = <25000000>;
         #address-cells = <1>;
         #size-cells = <0>;
+        clocks = <&tegra_car 44>;
+        resets = <&tegra_car 44>;
+        reset-names = "spi";
+        dmas = <&apbdma 16>, <&apbdma 16>;
+        dma-names = "rx", "tx";
         status = "disabled";
 };
-
diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt
index e019fdc38773..4a864bd10d3d 100644
--- a/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt
+++ b/Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt
@@ -8,6 +8,8 @@ Required properties:
 - compatible : should be "nvidia,tegra20-timer".
 - reg : Specifies base physical address and size of the registers.
 - interrupts : A list of 4 interrupts; one per timer channel.
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
 
 Example:
 
@@ -18,4 +20,5 @@ timer {
                         0 1 0x04
                         0 41 0x04
                         0 42 0x04>;
+        clocks = <&tegra_car 132>;
 };
diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
index 906109d4c593..b5082a1cf461 100644
--- a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
+++ b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
@@ -10,6 +10,8 @@ Required properties:
 - reg : Specifies base physical address and size of the registers.
 - interrupts : A list of 6 interrupts; one per each of timer channels 1
     through 5, and one for the shared interrupt for the remaining channels.
+- clocks : Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
 
 timer {
         compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
@@ -20,4 +22,5 @@ timer {
                       0 42 0x04
                       0 121 0x04
                       0 122 0x04>;
+        clocks = <&tegra_car 214>;
 };
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index df0933043a5b..3dc9140e3dfb 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -8,7 +8,12 @@ and additions :
 Required properties :
  - compatible : Should be "nvidia,tegra20-ehci".
  - nvidia,phy : phandle of the PHY that the controller is connected to.
- - clocks : Contains a single entry which defines the USB controller's clock.
+ - clocks : Must contain one entry, for the module clock.
+   See ../clocks/clock-bindings.txt for details.
+ - resets : Must contain an entry for each entry in reset-names.
+   See ../reset/reset.txt for details.
+ - reset-names : Must include the following entries:
+   - usb
 
 Optional properties:
  - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
diff --git a/Documentation/mic/mpssd/mpssd.c b/Documentation/mic/mpssd/mpssd.c
index 0c980ad40b17..4d17487d5ad9 100644
--- a/Documentation/mic/mpssd/mpssd.c
+++ b/Documentation/mic/mpssd/mpssd.c
@@ -313,7 +313,7 @@ static struct mic_device_desc *get_device_desc(struct mic_info *mic, int type)
         int i;
         void *dp = get_dp(mic, type);
 
-        for (i = mic_aligned_size(struct mic_bootparam); i < PAGE_SIZE;
+        for (i = sizeof(struct mic_bootparam); i < PAGE_SIZE;
                 i += mic_total_desc_size(d)) {
                 d = dp + i;
 
@@ -445,8 +445,8 @@ init_vr(struct mic_info *mic, int fd, int type,
                 __func__, mic->name, vr0->va, vr0->info, vr_size,
                 vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN));
         mpsslog("magic 0x%x expected 0x%x\n",
-                vr0->info->magic, MIC_MAGIC + type);
-        assert(vr0->info->magic == MIC_MAGIC + type);
+                le32toh(vr0->info->magic), MIC_MAGIC + type);
+        assert(le32toh(vr0->info->magic) == MIC_MAGIC + type);
         if (vr1) {
                 vr1->va = (struct mic_vring *)
                         &va[MIC_DEVICE_PAGE_END + vr_size];
@@ -458,8 +458,8 @@ init_vr(struct mic_info *mic, int fd, int type,
                         __func__, mic->name, vr1->va, vr1->info, vr_size,
                         vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN));
                 mpsslog("magic 0x%x expected 0x%x\n",
-                        vr1->info->magic, MIC_MAGIC + type + 1);
-                assert(vr1->info->magic == MIC_MAGIC + type + 1);
+                        le32toh(vr1->info->magic), MIC_MAGIC + type + 1);
+                assert(le32toh(vr1->info->magic) == MIC_MAGIC + type + 1);
         }
 done:
         return va;
@@ -520,7 +520,7 @@ static void *
 virtio_net(void *arg)
 {
         static __u8 vnet_hdr[2][sizeof(struct virtio_net_hdr)];
-        static __u8 vnet_buf[2][MAX_NET_PKT_SIZE] __aligned(64);
+        static __u8 vnet_buf[2][MAX_NET_PKT_SIZE] __attribute__ ((aligned(64)));
         struct iovec vnet_iov[2][2] = {
                 { { .iov_base = vnet_hdr[0], .iov_len = sizeof(vnet_hdr[0]) },
                   { .iov_base = vnet_buf[0], .iov_len = sizeof(vnet_buf[0]) } },
@@ -1412,6 +1412,12 @@ mic_config(void *arg)
         }
 
         do {
+                ret = lseek(fd, 0, SEEK_SET);
+                if (ret < 0) {
+                        mpsslog("%s: Failed to seek to file start '%s': %s\n",
+                                mic->name, pathname, strerror(errno));
+                        goto close_error1;
+                }
                 ret = read(fd, value, sizeof(value));
                 if (ret < 0) {
                         mpsslog("%s: Failed to read sysfs entry '%s': %s\n",
diff --git a/Documentation/networking/packet_mmap.txt b/Documentation/networking/packet_mmap.txt
index c01223628a87..8e48e3b14227 100644
--- a/Documentation/networking/packet_mmap.txt
+++ b/Documentation/networking/packet_mmap.txt
@@ -123,6 +123,16 @@ Transmission process is similar to capture as shown below.
 [shutdown]  close() --------> destruction of the transmission socket and
                               deallocation of all associated resources.
 
+Socket creation and destruction is also straight forward, and is done
+the same way as in capturing described in the previous paragraph:
+
+ int fd = socket(PF_PACKET, mode, 0);
+
+The protocol can optionally be 0 in case we only want to transmit
+via this socket, which avoids an expensive call to packet_rcv().
+In this case, you also need to bind(2) the TX_RING with sll_protocol = 0
+set. Otherwise, htons(ETH_P_ALL) or any other protocol, for example.
+
 Binding the socket to your network interface is mandatory (with zero copy) to
 know the header size of frames used in the circular buffer.
 
diff --git a/MAINTAINERS b/MAINTAINERS
index 13c15c83a46e..6ea1fb247a8c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -867,6 +867,12 @@ S:	Maintained
 F:      arch/arm/mach-ebsa110/
 F:      drivers/net/ethernet/amd/am79c961a.*
 
+ARM/ENERGY MICRO (SILICON LABS) EFM32 SUPPORT
+M:      Uwe Kleine-König <kernel@pengutronix.de>
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:      Maintained
+N:      efm32
+
 ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
 M:      Daniel Ribeiro <drwyrm@gmail.com>
 M:      Stefan Schmidt <stefan@openezx.org>
@@ -893,20 +899,15 @@ F:	arch/arm/include/asm/hardware/dec21285.h
 F:      arch/arm/mach-footbridge/
 
 ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
+M:      Shawn Guo <shawn.guo@linaro.org>
 M:      Sascha Hauer <kernel@pengutronix.de>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
-T:      git git://git.pengutronix.de/git/imx/linux-2.6.git
+T:      git git://git.linaro.org/people/shawnguo/linux-2.6.git
 F:      arch/arm/mach-imx/
+F:      arch/arm/boot/dts/imx*
 F:      arch/arm/configs/imx*_defconfig
 
-ARM/FREESCALE IMX6
-M:      Shawn Guo <shawn.guo@linaro.org>
-L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S:      Maintained
-T:      git git://git.linaro.org/people/shawnguo/linux-2.6.git
-F:      arch/arm/mach-imx/*imx6*
-
 ARM/FREESCALE MXS ARM ARCHITECTURE
 M:      Shawn Guo <shawn.guo@linaro.org>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1032,6 +1033,12 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
 F:      arch/arm/mach-mvebu/
 
+ARM/Marvell Berlin SoC support
+M:      Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:      Maintained
+F:      arch/arm/mach-berlin/
+
 ARM/Marvell Dove/Kirkwood/MV78xx0/Orion SOC support
 M:      Jason Cooper <jason@lakedaemon.net>
 M:      Andrew Lunn <andrew@lunn.ch>
@@ -2138,7 +2145,8 @@ S:	Maintained
 F:      Documentation/zh_CN/
 
 CHIPIDEA USB HIGH SPEED DUAL ROLE CONTROLLER
-M:      Alexander Shishkin <alexander.shishkin@linux.intel.com>
+M:      Peter Chen <Peter.Chen@freescale.com>
+T:      git://github.com/hzpeterchen/linux-usb.git
 L:      linux-usb@vger.kernel.org
 S:      Maintained
 F:      drivers/usb/chipidea/
@@ -4044,6 +4052,14 @@ W:	http://artax.karlin.mff.cuni.cz/~mikulas/vyplody/hpfs/index-e.cgi
 S:      Maintained
 F:      fs/hpfs/
 
+HSI SUBSYSTEM
+M:      Sebastian Reichel <sre@debian.org>
+S:      Maintained
+F:      Documentation/ABI/testing/sysfs-bus-hsi
+F:      drivers/hsi/
+F:      include/linux/hsi/
+F:      include/uapi/linux/hsi/
+
 HSO 3G MODEM DRIVER
 M:      Jan Dumon <j.dumon@option.com>
 W:      http://www.pharscape.org
@@ -4462,10 +4478,8 @@ M:	Bruce Allan <bruce.w.allan@intel.com>
 M:      Carolyn Wyborny <carolyn.wyborny@intel.com>
 M:      Don Skidmore <donald.c.skidmore@intel.com>
 M:      Greg Rose <gregory.v.rose@intel.com>
-M:      Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
 M:      Alex Duyck <alexander.h.duyck@intel.com>
 M:      John Ronciak <john.ronciak@intel.com>
-M:      Tushar Dave <tushar.n.dave@intel.com>
 L:      e1000-devel@lists.sourceforge.net
 W:      http://www.intel.com/support/feedback.htm
 W:      http://e1000.sourceforge.net/
@@ -6461,19 +6475,52 @@ F:	drivers/pci/
 F:      include/linux/pci*
 F:      arch/x86/pci/
 
+PCI DRIVER FOR IMX6
+M:      Richard Zhu <r65037@freescale.com>
+M:      Shawn Guo <shawn.guo@linaro.org>
+L:      linux-pci@vger.kernel.org
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:      Maintained
+F:      drivers/pci/host/*imx6*
+
+PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)
+M:      Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+M:      Jason Cooper <jason@lakedaemon.net>
+L:      linux-pci@vger.kernel.org
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:      Maintained
+F:      drivers/pci/host/*mvebu*
+
 PCI DRIVER FOR NVIDIA TEGRA
 M:      Thierry Reding <thierry.reding@gmail.com>
 L:      linux-tegra@vger.kernel.org
+L:      linux-pci@vger.kernel.org
 S:      Supported
 F:      Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
 F:      drivers/pci/host/pci-tegra.c
 
+PCI DRIVER FOR RENESAS R-CAR
+M:      Simon Horman <horms@verge.net.au>
+L:      linux-pci@vger.kernel.org
+L:      linux-sh@vger.kernel.org
+S:      Maintained
+F:      drivers/pci/host/*rcar*
+
 PCI DRIVER FOR SAMSUNG EXYNOS
 M:      Jingoo Han <jg1.han@samsung.com>
 L:      linux-pci@vger.kernel.org
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+L:      linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
 S:      Maintained
 F:      drivers/pci/host/pci-exynos.c
 
+PCI DRIVER FOR SYNOPSIS DESIGNWARE
+M:      Mohit Kumar <mohit.kumar@st.com>
+M:      Jingoo Han <jg1.han@samsung.com>
+L:      linux-pci@vger.kernel.org
+S:      Maintained
+F:      drivers/pci/host/*designware*
+
 PCMCIA SUBSYSTEM
 P:      Linux PCMCIA Team
 L:      linux-pcmcia@lists.infradead.org
diff --git a/Makefile b/Makefile
index 890392f1c7c0..858a147fd836 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 3
 PATCHLEVEL = 13
 SUBLEVEL = 0
-EXTRAVERSION = -rc3
+EXTRAVERSION = -rc4
 NAME = One Giant Leap for Frogkind
 
 # *DOCUMENTATION*
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 2ee0c9bfd032..9063ae6553cc 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -8,6 +8,7 @@
 
 config ARC
         def_bool y
+        select BUILDTIME_EXTABLE_SORT
         select CLONE_BACKWARDS
         # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
         select DEVTMPFS if !INITRAMFS_SOURCE=""
diff --git a/arch/arc/include/uapi/asm/unistd.h b/arch/arc/include/uapi/asm/unistd.h
index 6f30484f34b7..68125dd766c6 100644
--- a/arch/arc/include/uapi/asm/unistd.h
+++ b/arch/arc/include/uapi/asm/unistd.h
@@ -8,6 +8,9 @@
 
 /******** no-legacy-syscalls-ABI *******/
 
+#ifndef _UAPI_ASM_ARC_UNISTD_H
+#define _UAPI_ASM_ARC_UNISTD_H
+
 #define __ARCH_WANT_SYS_EXECVE
 #define __ARCH_WANT_SYS_CLONE
 #define __ARCH_WANT_SYS_VFORK
@@ -32,3 +35,5 @@ __SYSCALL(__NR_arc_gettls, sys_arc_gettls)
 /* Generic syscall (fs/filesystems.c - lost in asm-generic/unistd.h */
 #define __NR_sysfs              (__NR_arch_specific_syscall + 3)
 __SYSCALL(__NR_sysfs, sys_sysfs)
+
+#endif
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c
index e46d81f70979..63177e4cb66d 100644
--- a/arch/arc/kernel/perf_event.c
+++ b/arch/arc/kernel/perf_event.c
@@ -79,9 +79,9 @@ static int arc_pmu_cache_event(u64 config)
         cache_result    = (config >> 16) & 0xff;
         if (cache_type >= PERF_COUNT_HW_CACHE_MAX)
                 return -EINVAL;
-        if (cache_type >= PERF_COUNT_HW_CACHE_OP_MAX)
+        if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX)
                 return -EINVAL;
-        if (cache_type >= PERF_COUNT_HW_CACHE_RESULT_MAX)
+        if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
                 return -EINVAL;
 
         ret = arc_pmu_cache_map[cache_type][cache_op][cache_result];
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c1f1a7eee953..5f7f8d59124a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -410,6 +410,26 @@ config ARCH_EBSA110
           Ethernet interface, two PCMCIA sockets, two serial ports and a
           parallel port.
 
+config ARCH_EFM32
+        bool "Energy Micro efm32"
+        depends on !MMU
+        select ARCH_REQUIRE_GPIOLIB
+        select ARM_NVIC
+        # CLKSRC_MMIO is wrong here, but needed until a proper fix is merged,
+        # i.e. CLKSRC_EFM32 selecting CLKSRC_MMIO
+        select CLKSRC_MMIO
+        select CLKSRC_OF
+        select COMMON_CLK
+        select CPU_V7M
+        select GENERIC_CLOCKEVENTS
+        select NO_DMA
+        select NO_IOPORT
+        select SPARSE_IRQ
+        select USE_OF
+        help
+          Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
+          processors.
+
 config ARCH_EP93XX
         bool "EP93xx-based"
         select ARCH_HAS_HOLES_MEMORYMODEL
@@ -644,8 +664,9 @@ config ARCH_MSM
           stack and controls some vital subsystems
           (clock and power control, etc).
 
-config ARCH_SHMOBILE
-        bool "Renesas SH-Mobile / R-Mobile"
+config ARCH_SHMOBILE_LEGACY
+        bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
+        select ARCH_SHMOBILE
         select ARM_PATCH_PHYS_VIRT
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
@@ -660,7 +681,8 @@ config ARCH_SHMOBILE
         select PM_GENERIC_DOMAINS if PM
         select SPARSE_IRQ
         help
-          Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
+          Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
+          a non-multiplatform kernel.
 
 config ARCH_RPC
         bool "RiscPC"
@@ -727,7 +749,7 @@ config ARCH_S3C64XX
         select CLKDEV_LOOKUP
         select CLKSRC_SAMSUNG_PWM
         select COMMON_CLK
-        select CPU_V6
+        select CPU_V6K
         select GENERIC_CLOCKEVENTS
         select GPIO_SAMSUNG
         select HAVE_S3C2410_I2C if I2C
@@ -911,6 +933,8 @@ source "arch/arm/mach-bcm/Kconfig"
 
 source "arch/arm/mach-bcm2835/Kconfig"
 
+source "arch/arm/mach-berlin/Kconfig"
+
 source "arch/arm/mach-clps711x/Kconfig"
 
 source "arch/arm/mach-cns3xxx/Kconfig"
@@ -945,6 +969,8 @@ source "arch/arm/mach-ks8695/Kconfig"
 
 source "arch/arm/mach-msm/Kconfig"
 
+source "arch/arm/mach-moxart/Kconfig"
+
 source "arch/arm/mach-mv78xx0/Kconfig"
 
 source "arch/arm/mach-imx/Kconfig"
@@ -1611,7 +1637,7 @@ config HZ_FIXED
         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
                 ARCH_S5PV210 || ARCH_EXYNOS4
         default AT91_TIMER_HZ if ARCH_AT91
-        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
+        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
         default 0
 
 choice
@@ -1796,10 +1822,10 @@ config ARCH_WANT_GENERAL_HUGETLB
 source "mm/Kconfig"
 
 config FORCE_MAX_ZONEORDER
-        int "Maximum zone order" if ARCH_SHMOBILE
-        range 11 64 if ARCH_SHMOBILE
+        int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
+        range 11 64 if ARCH_SHMOBILE_LEGACY
         default "12" if SOC_AM33XX
-        default "9" if SA1111
+        default "9" if SA1111 || ARCH_EFM32
         default "11"
         help
           The kernel memory allocator divides physically contiguous memory
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index df56c7e65a6d..bda94e46e8d6 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -94,6 +94,14 @@ choice
                 depends on ARCH_BCM2835
                 select DEBUG_UART_PL01X
 
+        config DEBUG_BERLIN_UART
+                bool "Marvell Berlin SoC Debug UART"
+                depends on ARCH_BERLIN
+                select DEBUG_UART_8250
+                help
+                  Say Y here if you want kernel low-level debugging support
+                  on Marvell Berlin SoC based platforms.
+
         config DEBUG_CLPS711X_UART1
                 bool "Kernel low-level debugging messages via UART1"
                 depends on ARCH_CLPS711X
@@ -1020,6 +1028,7 @@ config DEBUG_UART_PHYS
         default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
         default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \
                                 ARCH_ORION5X
+        default 0xf7fc9000 if DEBUG_BERLIN_UART
         default 0xf8b00000 if DEBUG_HI3716_UART
         default 0xfcb00000 if DEBUG_HI3620_UART
         default 0xfe800000 if ARCH_IOP32X
@@ -1045,6 +1054,7 @@ config DEBUG_UART_VIRT
         default 0xf2100000 if DEBUG_PXA_UART1
         default 0xf4090000 if ARCH_LPC32XX
         default 0xf4200000 if ARCH_GEMINI
+        default 0xf7fc9000 if DEBUG_BERLIN_UART
         default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9
         default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1
         default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c99b1086d83d..91b16ce35a6c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -148,11 +148,13 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 machine-$(CONFIG_ARCH_AT91)             += at91
 machine-$(CONFIG_ARCH_BCM)              += bcm
 machine-$(CONFIG_ARCH_BCM2835)          += bcm2835
+machine-$(CONFIG_ARCH_BERLIN)           += berlin
 machine-$(CONFIG_ARCH_CLPS711X)         += clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)          += cns3xxx
 machine-$(CONFIG_ARCH_DAVINCI)          += davinci
 machine-$(CONFIG_ARCH_DOVE)             += dove
 machine-$(CONFIG_ARCH_EBSA110)          += ebsa110
+machine-$(CONFIG_ARCH_EFM32)            += efm32
 machine-$(CONFIG_ARCH_EP93XX)           += ep93xx
 machine-$(CONFIG_ARCH_EXYNOS)           += exynos
 machine-$(CONFIG_ARCH_GEMINI)           += gemini
@@ -167,6 +169,7 @@ machine-$(CONFIG_ARCH_KIRKWOOD)		+= kirkwood
 machine-$(CONFIG_ARCH_KS8695)           += ks8695
 machine-$(CONFIG_ARCH_LPC32XX)          += lpc32xx
 machine-$(CONFIG_ARCH_MMP)              += mmp
+machine-$(CONFIG_ARCH_MOXART)           += moxart
 machine-$(CONFIG_ARCH_MSM)              += msm
 machine-$(CONFIG_ARCH_MV78XX0)          += mv78xx0
 machine-$(CONFIG_ARCH_MVEBU)            += mvebu
@@ -190,7 +193,6 @@ machine-$(CONFIG_ARCH_S5PC100)		+= s5pc100
 machine-$(CONFIG_ARCH_S5PV210)          += s5pv210
 machine-$(CONFIG_ARCH_SA1100)           += sa1100
 machine-$(CONFIG_ARCH_SHMOBILE)         += shmobile
-machine-$(CONFIG_ARCH_SHMOBILE_MULTI)   += shmobile
 machine-$(CONFIG_ARCH_SIRF)             += prima2
 machine-$(CONFIG_ARCH_SOCFPGA)          += socfpga
 machine-$(CONFIG_ARCH_STI)              += sti
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index e7190bb5998e..f54d5a25c7ee 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -64,7 +64,7 @@ else
 endif
 endif
 
-ifeq ($(CONFIG_ARCH_SHMOBILE),y)
+ifeq ($(CONFIG_ARCH_SHMOBILE_LEGACY),y)
 OBJS            += head-shmobile.o
 endif
 
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d57c1a65b24f..b44dd26b951d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -45,6 +45,9 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
         bcm28155-ap.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
+dtb-$(CONFIG_ARCH_BERLIN) += \
+        berlin2-sony-nsz-gs7.dtb        \
+        berlin2cd-google-chromecast.dtb
 dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
         da850-evm.dtb
 dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
@@ -52,6 +55,7 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
         dove-d2plug.dtb \
         dove-d3plug.dtb \
         dove-dove-db.dtb
+dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
 dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
         exynos4210-smdkv310.dtb \
         exynos4210-trats.dtb \
@@ -216,7 +220,7 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
 dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
 dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
         s3c6410-smdk6410.dtb
-dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
+dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
         r7s72100-genmai.dtb \
         r8a7740-armadillo800eva.dtb \
         r8a7778-bockw.dtb \
diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts
index e99dfaf70052..03fcbf0a88a8 100644
--- a/arch/arm/boot/dts/am3517-evm.dts
+++ b/arch/arm/boot/dts/am3517-evm.dts
@@ -7,11 +7,11 @@
  */
 /dts-v1/;
 
-#include "omap34xx.dtsi"
+#include "am3517.dtsi"
 
 / {
-        model = "TI AM3517 EVM (AM3517/05)";
-        compatible = "ti,am3517-evm", "ti,omap3";
+        model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
+        compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
 
         memory {
                 device_type = "memory";
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
new file mode 100644
index 000000000000..2fbe02faa8b1
--- /dev/null
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -0,0 +1,63 @@
+/*
+ * Device Tree Source for am3517 SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include "omap3.dtsi"
+
+/ {
+        aliases {
+                serial3 = &uart4;
+        };
+
+        ocp {
+                am35x_otg_hs: am35x_otg_hs@5c040000 {
+                        compatible = "ti,omap3-musb";
+                        ti,hwmods = "am35x_otg_hs";
+                        status = "disabled";
+                        reg = <0x5c040000 0x1000>;
+                        interrupts = <71>;
+                        interrupt-names = "mc";
+                };
+
+                davinci_emac: ethernet@0x5c000000 {
+                        compatible = "ti,am3517-emac";
+                        ti,hwmods = "davinci_emac";
+                        status = "disabled";
+                        reg = <0x5c000000 0x30000>;
+                        interrupts = <67 68 69 70>;
+                        ti,davinci-ctrl-reg-offset = <0x10000>;
+                        ti,davinci-ctrl-mod-reg-offset = <0>;
+                        ti,davinci-ctrl-ram-offset = <0x20000>;
+                        ti,davinci-ctrl-ram-size = <0x2000>;
+                        ti,davinci-rmii-en = /bits/ 8 <1>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                };
+
+                davinci_mdio: ethernet@0x5c030000 {
+                        compatible = "ti,davinci_mdio";
+                        ti,hwmods = "davinci_mdio";
+                        status = "disabled";
+                        reg = <0x5c030000 0x1000>;
+                        bus_freq = <1000000>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                uart4: serial@4809e000 {
+                        compatible = "ti,omap3-uart";
+                        ti,hwmods = "uart4";
+                        status = "disabled";
+                        reg = <0x4809e000 0x400>;
+                        interrupts = <84>;
+                        dmas = <&sdma 55 &sdma 54>;
+                        dma-names = "tx", "rx";
+                        clock-frequency = <48000000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/armv7-m.dtsi b/arch/arm/boot/dts/armv7-m.dtsi
new file mode 100644
index 000000000000..5a660d0faf42
--- /dev/null
+++ b/arch/arm/boot/dts/armv7-m.dtsi
@@ -0,0 +1,18 @@
+#include "skeleton.dtsi"
+
+/ {
+        nvic: nv-interrupt-controller  {
+                compatible = "arm,armv7m-nvic";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = <0xe000e100 0xc00>;
+        };
+
+        soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                interrupt-parent = <&nvic>;
+                ranges;
+        };
+};
diff --git a/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
new file mode 100644
index 000000000000..c72bfd468d10
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
@@ -0,0 +1,29 @@
+/*
+ * Device Tree file for Sony NSZ-GS7
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include "berlin2.dtsi"
+
+/ {
+        model = "Sony NSZ-GS7";
+        compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 earlyprintk";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x40000000>; /* 1 GB */
+        };
+};
+
+&uart0 { status = "okay"; };
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
new file mode 100644
index 000000000000..56a1af2f1052
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -0,0 +1,227 @@
+/*
+ * Device Tree Include file for Marvell Armada 1500 (Berlin BG2) SoC
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+        model = "Marvell Armada 1500 (BG2) SoC";
+        compatible = "marvell,berlin2", "marvell,berlin";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "marvell,pj4b";
+                        device_type = "cpu";
+                        next-level-cache = <&l2>;
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        compatible = "marvell,pj4b";
+                        device_type = "cpu";
+                        next-level-cache = <&l2>;
+                        reg = <1>;
+                };
+        };
+
+        clocks {
+                smclk: sysmgr-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <25000000>;
+                };
+
+                cfgclk: cfg-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <100000000>;
+                };
+
+                sysclk: system-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <400000000>;
+                };
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                interrupt-parent = <&gic>;
+
+                ranges = <0 0xf7000000 0x1000000>;
+
+                l2: l2-cache-controller@ac0000 {
+                        compatible = "marvell,tauros3-cache", "arm,pl310-cache";
+                        reg = <0xac0000 0x1000>;
+                        cache-unified;
+                        cache-level = <2>;
+                };
+
+                gic: interrupt-controller@ad1000 {
+                        compatible = "arm,cortex-a9-gic";
+                        reg = <0xad1000 0x1000>, <0xad0100 0x0100>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                };
+
+                local-timer@ad0600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0xad0600 0x20>;
+                        interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&sysclk>;
+                };
+
+                apb@e80000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xe80000 0x10000>;
+                        interrupt-parent = <&aic>;
+
+                        timer0: timer@2c00 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c00 0x14>;
+                                interrupts = <8>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer1: timer@2c14 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c14 0x14>;
+                                interrupts = <9>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer2: timer@2c28 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c28 0x14>;
+                                interrupts = <10>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer3: timer@2c3c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c3c 0x14>;
+                                interrupts = <11>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer4: timer@2c50 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c50 0x14>;
+                                interrupts = <12>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer5: timer@2c64 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c64 0x14>;
+                                interrupts = <13>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer6: timer@2c78 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c78 0x14>;
+                                interrupts = <14>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer7: timer@2c8c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c8c 0x14>;
+                                interrupts = <15>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        aic: interrupt-controller@3000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0x3000 0xc00>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+
+                apb@fc0000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xfc0000 0x10000>;
+                        interrupt-parent = <&sic>;
+
+                        uart0: serial@9000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0x9000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <8>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        uart1: serial@a000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0xa000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <9>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        uart2: serial@b000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0xb000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <10>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        sic: interrupt-controller@e000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0xe000 0x400>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
new file mode 100644
index 000000000000..bcd81ffc495d
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
@@ -0,0 +1,29 @@
+/*
+ * Device Tree file for Google Chromecast
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include "berlin2cd.dtsi"
+
+/ {
+        model = "Google Chromecast";
+        compatible = "google,chromecast", "marvell,berlin2cd", "marvell,berlin";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 earlyprintk";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>; /* 512 MB */
+        };
+};
+
+&uart0 { status = "okay"; };
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
new file mode 100644
index 000000000000..094968c27533
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -0,0 +1,210 @@
+/*
+ * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+        model = "Marvell Armada 1500-mini (BG2CD) SoC";
+        compatible = "marvell,berlin2cd", "marvell,berlin";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "arm,cortex-a9";
+                        device_type = "cpu";
+                        next-level-cache = <&l2>;
+                        reg = <0>;
+                };
+        };
+
+        clocks {
+                smclk: sysmgr-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <25000000>;
+                };
+
+                cfgclk: cfg-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <75000000>;
+                };
+
+                sysclk: system-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <300000000>;
+                };
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                interrupt-parent = <&gic>;
+
+                ranges = <0 0xf7000000 0x1000000>;
+
+                l2: l2-cache-controller@ac0000 {
+                        compatible = "arm,pl310-cache";
+                        reg = <0xac0000 0x1000>;
+                        cache-unified;
+                        cache-level = <2>;
+                };
+
+                gic: interrupt-controller@ad1000 {
+                        compatible = "arm,cortex-a9-gic";
+                        reg = <0xad1000 0x1000>, <0xad0100 0x0100>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                };
+
+                local-timer@ad0600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0xad0600 0x20>;
+                        interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&sysclk>;
+                };
+
+                apb@e80000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xe80000 0x10000>;
+                        interrupt-parent = <&aic>;
+
+                        timer0: timer@2c00 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c00 0x14>;
+                                interrupts = <8>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer1: timer@2c14 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c14 0x14>;
+                                interrupts = <9>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer2: timer@2c28 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c28 0x14>;
+                                interrupts = <10>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer3: timer@2c3c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c3c 0x14>;
+                                interrupts = <11>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer4: timer@2c50 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c50 0x14>;
+                                interrupts = <12>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer5: timer@2c64 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c64 0x14>;
+                                interrupts = <13>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer6: timer@2c78 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c78 0x14>;
+                                interrupts = <14>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer7: timer@2c8c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c8c 0x14>;
+                                interrupts = <15>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        aic: interrupt-controller@3000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0x3000 0xc00>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+
+                apb@fc0000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xfc0000 0x10000>;
+                        interrupt-parent = <&sic>;
+
+                        uart0: serial@9000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0x9000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <8>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        uart1: serial@a000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0xa000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <9>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        sic: interrupt-controller@e000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0xe000 0x400>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/efm32gg-dk3750.dts b/arch/arm/boot/dts/efm32gg-dk3750.dts
new file mode 100644
index 000000000000..aa5c0f6363d6
--- /dev/null
+++ b/arch/arm/boot/dts/efm32gg-dk3750.dts
@@ -0,0 +1,86 @@
+/*
+ * Device tree for EFM32GG-DK3750 development board.
+ *
+ * Documentation available from
+ * http://www.silabs.com/Support%20Documents/TechnicalDocs/efm32gg-dk3750-ug.pdf
+ */
+
+/dts-v1/;
+#include "efm32gg.dtsi"
+
+/ {
+        model = "Energy Micro Giant Gecko Development Kit";
+        compatible = "efm32,dk3750";
+
+        chosen {
+                bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0";
+        };
+
+        memory {
+                reg = <0x88000000 0x400000>;
+        };
+
+        soc {
+                adc@40002000 {
+                        status = "ok";
+                };
+
+                i2c@4000a000 {
+                        location = <3>;
+                        status = "ok";
+
+                        temp@48 {
+                                compatible = "st,stds75";
+                                reg = <0x48>;
+                        };
+
+                        eeprom@50 {
+                                compatible = "microchip,24c02";
+                                reg = <0x50>;
+                                pagesize = <16>;
+                        };
+                };
+
+                spi0: spi@4000c000 { /* USART0 */
+                        cs-gpios = <&gpio 68 1>; // E4
+                        location = <1>;
+                        status = "ok";
+
+                        microsd@0 {
+                                compatible = "mmc-spi-slot";
+                                spi-max-frequency = <100000>;
+                                voltage-ranges = <3200 3400>;
+                                broken-cd;
+                                reg = <0>;
+                        };
+                };
+
+                spi1: spi@4000c400 { /* USART1 */
+                        cs-gpios = <&gpio 51 1>; // D3
+                        location = <1>;
+                        status = "ok";
+
+                        ks8851@0 {
+                                compatible = "ks8851";
+                                spi-max-frequency = <6000000>;
+                                reg = <0>;
+                                interrupt-parent = <&boardfpga>;
+                                interrupts = <4>;
+                        };
+                };
+
+                uart4: uart@4000e400 { /* UART1 */
+                        location = <2>;
+                        status = "ok";
+                };
+
+                boardfpga: boardfpga {
+                        compatible = "efm32board";
+                        reg = <0x80000000 0x400>;
+                        irq-gpios = <&gpio 64 1>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        status = "ok";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/efm32gg.dtsi b/arch/arm/boot/dts/efm32gg.dtsi
new file mode 100644
index 000000000000..a342ab0e6e4f
--- /dev/null
+++ b/arch/arm/boot/dts/efm32gg.dtsi
@@ -0,0 +1,172 @@
+/*
+ * Device tree for Energy Micro EFM32 Giant Gecko SoC.
+ *
+ * Documentation available from
+ * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
+ */
+#include "armv7-m.dtsi"
+#include "dt-bindings/clock/efm32-cmu.h"
+
+/ {
+        aliases {
+                i2c0 = &i2c0;
+                i2c1 = &i2c1;
+                serial0 = &uart0;
+                serial1 = &uart1;
+                serial2 = &uart2;
+                serial3 = &uart3;
+                serial4 = &uart4;
+                spi0 = &spi0;
+                spi1 = &spi1;
+                spi2 = &spi2;
+        };
+
+        soc {
+                adc: adc@40002000 {
+                        compatible = "efm32,adc";
+                        reg = <0x40002000 0x400>;
+                        interrupts = <7>;
+                        clocks = <&cmu clk_HFPERCLKADC0>;
+                        status = "disabled";
+                };
+
+                gpio: gpio@40006000 {
+                        compatible = "efm32,gpio";
+                        reg = <0x40006000 0x1000>;
+                        interrupts = <1 11>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        clocks = <&cmu clk_HFPERCLKGPIO>;
+                        status = "ok";
+                };
+
+                i2c0: i2c@4000a000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "efm32,i2c";
+                        reg = <0x4000a000 0x400>;
+                        interrupts = <9>;
+                        clocks = <&cmu clk_HFPERCLKI2C0>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+
+                i2c1: i2c@4000a400 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "efm32,i2c";
+                        reg = <0x4000a400 0x400>;
+                        interrupts = <10>;
+                        clocks = <&cmu clk_HFPERCLKI2C1>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+
+                spi0: spi@4000c000 { /* USART0 */
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "efm32,spi";
+                        reg = <0x4000c000 0x400>;
+                        interrupts = <3 4>;
+                        clocks = <&cmu clk_HFPERCLKUSART0>;
+                        status = "disabled";
+                };
+
+                spi1: spi@4000c400 { /* USART1 */
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "efm32,spi";
+                        reg = <0x4000c400 0x400>;
+                        interrupts = <15 16>;
+                        clocks = <&cmu clk_HFPERCLKUSART1>;
+                        status = "disabled";
+                };
+
+                spi2: spi@40x4000c800 { /* USART2 */
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "efm32,spi";
+                        reg = <0x4000c800 0x400>;
+                        interrupts = <18 19>;
+                        clocks = <&cmu clk_HFPERCLKUSART2>;
+                        status = "disabled";
+                };
+
+                uart0: uart@4000c000 { /* USART0 */
+                        compatible = "efm32,uart";
+                        reg = <0x4000c000 0x400>;
+                        interrupts = <3 4>;
+                        clocks = <&cmu clk_HFPERCLKUSART0>;
+                        status = "disabled";
+                };
+
+                uart1: uart@4000c400 { /* USART1 */
+                        compatible = "efm32,uart";
+                        reg = <0x4000c400 0x400>;
+                        interrupts = <15 16>;
+                        clocks = <&cmu clk_HFPERCLKUSART1>;
+                        status = "disabled";
+                };
+
+                uart2: uart@40x4000c800 { /* USART2 */
+                        compatible = "efm32,uart";
+                        reg = <0x4000c800 0x400>;
+                        interrupts = <18 19>;
+                        clocks = <&cmu clk_HFPERCLKUSART2>;
+                        status = "disabled";
+                };
+
+                uart3: uart@4000e000 { /* UART0 */
+                        compatible = "efm32,uart";
+                        reg = <0x4000e000 0x400>;
+                        interrupts = <20 21>;
+                        clocks = <&cmu clk_HFPERCLKUART0>;
+                        status = "disabled";
+                };
+
+                uart4: uart@4000e400 { /* UART1 */
+                        compatible = "efm32,uart";
+                        reg = <0x4000e400 0x400>;
+                        interrupts = <22 23>;
+                        clocks = <&cmu clk_HFPERCLKUART1>;
+                        status = "disabled";
+                };
+
+                timer0: timer@40010000 {
+                        compatible = "efm32,timer";
+                        reg = <0x40010000 0x400>;
+                        interrupts = <2>;
+                        clocks = <&cmu clk_HFPERCLKTIMER0>;
+                };
+
+                timer1: timer@40010400 {
+                        compatible = "efm32,timer";
+                        reg = <0x40010400 0x400>;
+                        interrupts = <12>;
+                        clocks = <&cmu clk_HFPERCLKTIMER1>;
+                };
+
+                timer2: timer@40010800 {
+                        compatible = "efm32,timer";
+                        reg = <0x40010800 0x400>;
+                        interrupts = <13>;
+                        clocks = <&cmu clk_HFPERCLKTIMER2>;
+                };
+
+                timer3: timer@40010c00 {
+                        compatible = "efm32,timer";
+                        reg = <0x40010c00 0x400>;
+                        interrupts = <14>;
+                        clocks = <&cmu clk_HFPERCLKTIMER3>;
+                };
+
+                cmu: cmu@400c8000 {
+                        compatible = "efm32gg,cmu";
+                        reg = <0x400c8000 0x400>;
+                        interrupts = <32>;
+                        #clock-cells = <1>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index c2c306d13b87..6fc85f963530 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -9,7 +9,7 @@
 
 /dts-v1/;
 
-#include "omap34xx.dtsi"
+#include "omap34xx-hs.dtsi"
 
 / {
         model = "Nokia N900";
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index 94eb77d3b9dd..5c26c184f2c1 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -8,7 +8,7 @@
  * published by the Free Software Foundation.
  */
 
-#include "omap36xx.dtsi"
+#include "omap36xx-hs.dtsi"
 
 / {
         cpus {
diff --git a/arch/arm/boot/dts/omap34xx-hs.dtsi b/arch/arm/boot/dts/omap34xx-hs.dtsi
new file mode 100644
index 000000000000..1ff626489546
--- /dev/null
+++ b/arch/arm/boot/dts/omap34xx-hs.dtsi
@@ -0,0 +1,16 @@
+/* Disabled modules for secure omaps */
+
+#include "omap34xx.dtsi"
+
+/* Secure omaps have some devices inaccessible depending on the firmware */
+&aes {
+        status = "disabled";
+};
+
+&sham {
+        status = "disabled";
+};
+
+&timer12 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap36xx-hs.dtsi b/arch/arm/boot/dts/omap36xx-hs.dtsi
new file mode 100644
index 000000000000..2c7febb0e016
--- /dev/null
+++ b/arch/arm/boot/dts/omap36xx-hs.dtsi
@@ -0,0 +1,16 @@
+/* Disabled modules for secure omaps */
+
+#include "omap36xx.dtsi"
+
+/* Secure omaps have some devices inaccessible depending on the firmware */
+&aes {
+        status = "disabled";
+};
+
+&sham {
+        status = "disabled";
+};
+
+&timer12 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
new file mode 100644
index 000000000000..2ebb4f09a9b6
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -0,0 +1,33 @@
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+        model = "Qualcomm MSM8974";
+        compatible = "qcom,msm8974";
+        interrupt-parent = <&intc>;
+
+        soc: soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                compatible = "simple-bus";
+
+                intc: interrupt-controller@f9000000 {
+                        compatible = "qcom,msm-qgic2";
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        reg = <0xf9000000 0x1000>,
+                              <0xf9002000 0x1000>;
+                };
+
+                timer {
+                        compatible = "arm,armv7-timer";
+                        interrupts = <1 2 0xf08>,
+                                     <1 3 0xf08>,
+                                     <1 4 0xf08>,
+                                     <1 1 0xf08>;
+                        clock-frequency = <19200000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index c1751a64889a..7f5878c2784a 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -193,7 +193,10 @@
                 pio: pinctrl@01c20800 {
                         compatible = "allwinner,sun6i-a31-pinctrl";
                         reg = <0x01c20800 0x400>;
-                        interrupts = <0 11 1>, <0 15 1>, <0 16 1>, <0 17 1>;
+                        interrupts = <0 11 4>,
+                                     <0 15 4>,
+                                     <0 16 4>,
+                                     <0 17 4>;
                         clocks = <&apb1_gates 5>;
                         gpio-controller;
                         interrupt-controller;
@@ -212,11 +215,11 @@
                 timer@01c20c00 {
                         compatible = "allwinner,sun4i-timer";
                         reg = <0x01c20c00 0xa0>;
-                        interrupts = <0 18 1>,
-                                     <0 19 1>,
-                                     <0 20 1>,
-                                     <0 21 1>,
-                                     <0 22 1>;
+                        interrupts = <0 18 4>,
+                                     <0 19 4>,
+                                     <0 20 4>,
+                                     <0 21 4>,
+                                     <0 22 4>;
                         clocks = <&osc24M>;
                 };
 
@@ -228,7 +231,7 @@
                 uart0: serial@01c28000 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28000 0x400>;
-                        interrupts = <0 0 1>;
+                        interrupts = <0 0 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb2_gates 16>;
@@ -238,7 +241,7 @@
                 uart1: serial@01c28400 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28400 0x400>;
-                        interrupts = <0 1 1>;
+                        interrupts = <0 1 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb2_gates 17>;
@@ -248,7 +251,7 @@
                 uart2: serial@01c28800 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28800 0x400>;
-                        interrupts = <0 2 1>;
+                        interrupts = <0 2 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb2_gates 18>;
@@ -258,7 +261,7 @@
                 uart3: serial@01c28c00 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28c00 0x400>;
-                        interrupts = <0 3 1>;
+                        interrupts = <0 3 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb2_gates 19>;
@@ -268,7 +271,7 @@
                 uart4: serial@01c29000 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c29000 0x400>;
-                        interrupts = <0 4 1>;
+                        interrupts = <0 4 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb2_gates 20>;
@@ -278,7 +281,7 @@
                 uart5: serial@01c29400 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c29400 0x400>;
-                        interrupts = <0 5 1>;
+                        interrupts = <0 5 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb2_gates 21>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e46cfedde74c..367611a0730b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -170,7 +170,7 @@
                 emac: ethernet@01c0b000 {
                         compatible = "allwinner,sun4i-emac";
                         reg = <0x01c0b000 0x1000>;
-                        interrupts = <0 55 1>;
+                        interrupts = <0 55 4>;
                         clocks = <&ahb_gates 17>;
                         status = "disabled";
                 };
@@ -186,7 +186,7 @@
                 pio: pinctrl@01c20800 {
                         compatible = "allwinner,sun7i-a20-pinctrl";
                         reg = <0x01c20800 0x400>;
-                        interrupts = <0 28 1>;
+                        interrupts = <0 28 4>;
                         clocks = <&apb0_gates 5>;
                         gpio-controller;
                         interrupt-controller;
@@ -251,12 +251,12 @@
                 timer@01c20c00 {
                         compatible = "allwinner,sun4i-timer";
                         reg = <0x01c20c00 0x90>;
-                        interrupts = <0 22 1>,
-                                     <0 23 1>,
-                                     <0 24 1>,
-                                     <0 25 1>,
-                                     <0 67 1>,
-                                     <0 68 1>;
+                        interrupts = <0 22 4>,
+                                     <0 23 4>,
+                                     <0 24 4>,
+                                     <0 25 4>,
+                                     <0 67 4>,
+                                     <0 68 4>;
                         clocks = <&osc24M>;
                 };
 
@@ -273,7 +273,7 @@
                 uart0: serial@01c28000 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28000 0x400>;
-                        interrupts = <0 1 1>;
+                        interrupts = <0 1 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 16>;
@@ -283,7 +283,7 @@
                 uart1: serial@01c28400 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28400 0x400>;
-                        interrupts = <0 2 1>;
+                        interrupts = <0 2 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 17>;
@@ -293,7 +293,7 @@
                 uart2: serial@01c28800 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28800 0x400>;
-                        interrupts = <0 3 1>;
+                        interrupts = <0 3 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 18>;
@@ -303,7 +303,7 @@
                 uart3: serial@01c28c00 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28c00 0x400>;
-                        interrupts = <0 4 1>;
+                        interrupts = <0 4 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 19>;
@@ -313,7 +313,7 @@
                 uart4: serial@01c29000 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c29000 0x400>;
-                        interrupts = <0 17 1>;
+                        interrupts = <0 17 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 20>;
@@ -323,7 +323,7 @@
                 uart5: serial@01c29400 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c29400 0x400>;
-                        interrupts = <0 18 1>;
+                        interrupts = <0 18 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 21>;
@@ -333,7 +333,7 @@
                 uart6: serial@01c29800 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c29800 0x400>;
-                        interrupts = <0 19 1>;
+                        interrupts = <0 19 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 22>;
@@ -343,7 +343,7 @@
                 uart7: serial@01c29c00 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c29c00 0x400>;
-                        interrupts = <0 20 1>;
+                        interrupts = <0 20 4>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         clocks = <&apb1_gates 23>;
@@ -353,7 +353,7 @@
                 i2c0: i2c@01c2ac00 {
                         compatible = "allwinner,sun4i-i2c";
                         reg = <0x01c2ac00 0x400>;
-                        interrupts = <0 7 1>;
+                        interrupts = <0 7 4>;
                         clocks = <&apb1_gates 0>;
                         clock-frequency = <100000>;
                         status = "disabled";
@@ -362,7 +362,7 @@
                 i2c1: i2c@01c2b000 {
                         compatible = "allwinner,sun4i-i2c";
                         reg = <0x01c2b000 0x400>;
-                        interrupts = <0 8 1>;
+                        interrupts = <0 8 4>;
                         clocks = <&apb1_gates 1>;
                         clock-frequency = <100000>;
                         status = "disabled";
@@ -371,7 +371,7 @@
                 i2c2: i2c@01c2b400 {
                         compatible = "allwinner,sun4i-i2c";
                         reg = <0x01c2b400 0x400>;
-                        interrupts = <0 9 1>;
+                        interrupts = <0 9 4>;
                         clocks = <&apb1_gates 2>;
                         clock-frequency = <100000>;
                         status = "disabled";
@@ -380,7 +380,7 @@
                 i2c3: i2c@01c2b800 {
                         compatible = "allwinner,sun4i-i2c";
                         reg = <0x01c2b800 0x400>;
-                        interrupts = <0 88 1>;
+                        interrupts = <0 88 4>;
                         clocks = <&apb1_gates 3>;
                         clock-frequency = <100000>;
                         status = "disabled";
@@ -389,7 +389,7 @@
                 i2c4: i2c@01c2bc00 {
                         compatible = "allwinner,sun4i-i2c";
                         reg = <0x01c2bc00 0x400>;
-                        interrupts = <0 89 1>;
+                        interrupts = <0 89 4>;
                         clocks = <&apb1_gates 15>;
                         clock-frequency = <100000>;
                         status = "disabled";
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 8d42787c8ff1..731249fbe206 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -43,6 +43,7 @@
                 compatible = "nvidia,tegra114-car";
                 reg = <0x60006000 0x1000>;
                 #clock-cells = <1>;
+                #reset-cells = <1>;
         };
 
         apbdma: dma {
@@ -81,6 +82,9 @@
                              <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
+                resets = <&tegra_car 34>;
+                reset-names = "dma";
+                #dma-cells = <1>;
         };
 
         ahb: ahb {
@@ -124,9 +128,12 @@
                 reg = <0x70006000 0x40>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 8>;
-                status = "disabled";
                 clocks = <&tegra_car TEGRA114_CLK_UARTA>;
+                resets = <&tegra_car 6>;
+                reset-names = "serial";
+                dmas = <&apbdma 8>, <&apbdma 8>;
+                dma-names = "rx", "tx";
+                status = "disabled";
         };
 
         uartb: serial@70006040 {
@@ -134,9 +141,12 @@
                 reg = <0x70006040 0x40>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 9>;
-                status = "disabled";
                 clocks = <&tegra_car TEGRA114_CLK_UARTB>;
+                resets = <&tegra_car 7>;
+                reset-names = "serial";
+                dmas = <&apbdma 9>, <&apbdma 9>;
+                dma-names = "rx", "tx";
+                status = "disabled";
         };
 
         uartc: serial@70006200 {
@@ -144,9 +154,12 @@
                 reg = <0x70006200 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 10>;
-                status = "disabled";
                 clocks = <&tegra_car TEGRA114_CLK_UARTC>;
+                resets = <&tegra_car 55>;
+                reset-names = "serial";
+                dmas = <&apbdma 10>, <&apbdma 10>;
+                dma-names = "rx", "tx";
+                status = "disabled";
         };
 
         uartd: serial@70006300 {
@@ -154,9 +167,12 @@
                 reg = <0x70006300 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 19>;
-                status = "disabled";
                 clocks = <&tegra_car TEGRA114_CLK_UARTD>;
+                resets = <&tegra_car 65>;
+                reset-names = "serial";
+                dmas = <&apbdma 19>, <&apbdma 19>;
+                dma-names = "rx", "tx";
+                status = "disabled";
         };
 
         pwm: pwm {
@@ -164,6 +180,8 @@
                 reg = <0x7000a000 0x100>;
                 #pwm-cells = <2>;
                 clocks = <&tegra_car TEGRA114_CLK_PWM>;
+                resets = <&tegra_car 17>;
+                reset-names = "pwm";
                 status = "disabled";
         };
 
@@ -175,6 +193,10 @@
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_I2C1>;
                 clock-names = "div-clk";
+                resets = <&tegra_car 12>;
+                reset-names = "i2c";
+                dmas = <&apbdma 21>, <&apbdma 21>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -186,6 +208,10 @@
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_I2C2>;
                 clock-names = "div-clk";
+                resets = <&tegra_car 54>;
+                reset-names = "i2c";
+                dmas = <&apbdma 22>, <&apbdma 22>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -197,6 +223,10 @@
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_I2C3>;
                 clock-names = "div-clk";
+                resets = <&tegra_car 67>;
+                reset-names = "i2c";
+                dmas = <&apbdma 23>, <&apbdma 23>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -208,6 +238,10 @@
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_I2C4>;
                 clock-names = "div-clk";
+                resets = <&tegra_car 103>;
+                reset-names = "i2c";
+                dmas = <&apbdma 26>, <&apbdma 26>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -219,6 +253,10 @@
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_I2C5>;
                 clock-names = "div-clk";
+                resets = <&tegra_car 47>;
+                reset-names = "i2c";
+                dmas = <&apbdma 24>, <&apbdma 24>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -226,11 +264,14 @@
                 compatible = "nvidia,tegra114-spi";
                 reg = <0x7000d400 0x200>;
                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 15>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_SBC1>;
                 clock-names = "spi";
+                resets = <&tegra_car 41>;
+                reset-names = "spi";
+                dmas = <&apbdma 15>, <&apbdma 15>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -238,11 +279,14 @@
                 compatible = "nvidia,tegra114-spi";
                 reg = <0x7000d600 0x200>;
                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 16>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_SBC2>;
                 clock-names = "spi";
+                resets = <&tegra_car 44>;
+                reset-names = "spi";
+                dmas = <&apbdma 16>, <&apbdma 16>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -250,11 +294,14 @@
                 compatible = "nvidia,tegra114-spi";
                 reg = <0x7000d800 0x200>;
                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 17>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_SBC3>;
                 clock-names = "spi";
+                resets = <&tegra_car 46>;
+                reset-names = "spi";
+                dmas = <&apbdma 17>, <&apbdma 17>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -262,11 +309,14 @@
                 compatible = "nvidia,tegra114-spi";
                 reg = <0x7000da00 0x200>;
                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 18>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_SBC4>;
                 clock-names = "spi";
+                resets = <&tegra_car 68>;
+                reset-names = "spi";
+                dmas = <&apbdma 18>, <&apbdma 18>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -274,11 +324,14 @@
                 compatible = "nvidia,tegra114-spi";
                 reg = <0x7000dc00 0x200>;
                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 27>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_SBC5>;
                 clock-names = "spi";
+                resets = <&tegra_car 104>;
+                reset-names = "spi";
+                dmas = <&apbdma 27>, <&apbdma 27>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -286,11 +339,14 @@
                 compatible = "nvidia,tegra114-spi";
                 reg = <0x7000de00 0x200>;
                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 28>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA114_CLK_SBC6>;
                 clock-names = "spi";
+                resets = <&tegra_car 105>;
+                reset-names = "spi";
+                dmas = <&apbdma 28>, <&apbdma 28>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -306,6 +362,8 @@
                 reg = <0x7000e200 0x100>;
                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA114_CLK_KBC>;
+                resets = <&tegra_car 36>;
+                reset-names = "kbc";
                 status = "disabled";
         };
 
@@ -333,26 +391,39 @@
                       <0x70080200 0x100>,
                       <0x70081000 0x200>;
                 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 1>, <&apbdma 2>,
-                        <&apbdma 3>, <&apbdma 4>, <&apbdma 6>, <&apbdma 7>,
-                        <&apbdma 12>, <&apbdma 13>, <&apbdma 14>,
-                        <&apbdma 29>;
                 clocks = <&tegra_car TEGRA114_CLK_D_AUDIO>,
-                         <&tegra_car TEGRA114_CLK_APBIF>,
-                         <&tegra_car TEGRA114_CLK_I2S0>,
-                         <&tegra_car TEGRA114_CLK_I2S1>,
-                         <&tegra_car TEGRA114_CLK_I2S2>,
-                         <&tegra_car TEGRA114_CLK_I2S3>,
-                         <&tegra_car TEGRA114_CLK_I2S4>,
-                         <&tegra_car TEGRA114_CLK_DAM0>,
-                         <&tegra_car TEGRA114_CLK_DAM1>,
-                         <&tegra_car TEGRA114_CLK_DAM2>,
-                         <&tegra_car TEGRA114_CLK_SPDIF_IN>,
-                         <&tegra_car TEGRA114_CLK_AMX>,
-                         <&tegra_car TEGRA114_CLK_ADX>;
-                clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
+                         <&tegra_car TEGRA114_CLK_APBIF>;
+                clock-names = "d_audio", "apbif";
+                resets = <&tegra_car 106>, /* d_audio */
+                         <&tegra_car 107>, /* apbif */
+                         <&tegra_car 30>,  /* i2s0 */
+                         <&tegra_car 11>,  /* i2s1 */
+                         <&tegra_car 18>,  /* i2s2 */
+                         <&tegra_car 101>, /* i2s3 */
+                         <&tegra_car 102>, /* i2s4 */
+                         <&tegra_car 108>, /* dam0 */
+                         <&tegra_car 109>, /* dam1 */
+                         <&tegra_car 110>, /* dam2 */
+                         <&tegra_car 10>,  /* spdif */
+                         <&tegra_car 153>, /* amx */
+                         <&tegra_car 154>; /* adx */
+                reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
                               "i2s3", "i2s4", "dam0", "dam1", "dam2",
-                              "spdif_in", "amx", "adx";
+                              "spdif", "amx", "adx";
+                dmas = <&apbdma 1>, <&apbdma 1>,
+                       <&apbdma 2>, <&apbdma 2>,
+                       <&apbdma 3>, <&apbdma 3>,
+                       <&apbdma 4>, <&apbdma 4>,
+                       <&apbdma 6>, <&apbdma 6>,
+                       <&apbdma 7>, <&apbdma 7>,
+                       <&apbdma 12>, <&apbdma 12>,
+                       <&apbdma 13>, <&apbdma 13>,
+                       <&apbdma 14>, <&apbdma 14>,
+                       <&apbdma 29>, <&apbdma 29>;
+                dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
+                            "rx3", "tx3", "rx4", "tx4", "rx5", "tx5",
+                            "rx6", "tx6", "rx7", "tx7", "rx8", "tx8",
+                            "rx9", "tx9";
                 ranges;
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -362,6 +433,8 @@
                         reg = <0x70080300 0x100>;
                         nvidia,ahub-cif-ids = <4 4>;
                         clocks = <&tegra_car TEGRA114_CLK_I2S0>;
+                        resets = <&tegra_car 30>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -370,6 +443,8 @@
                         reg = <0x70080400 0x100>;
                         nvidia,ahub-cif-ids = <5 5>;
                         clocks = <&tegra_car TEGRA114_CLK_I2S1>;
+                        resets = <&tegra_car 11>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -378,6 +453,8 @@
                         reg = <0x70080500 0x100>;
                         nvidia,ahub-cif-ids = <6 6>;
                         clocks = <&tegra_car TEGRA114_CLK_I2S2>;
+                        resets = <&tegra_car 18>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -386,6 +463,8 @@
                         reg = <0x70080600 0x100>;
                         nvidia,ahub-cif-ids = <7 7>;
                         clocks = <&tegra_car TEGRA114_CLK_I2S3>;
+                        resets = <&tegra_car 101>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -394,6 +473,8 @@
                         reg = <0x70080700 0x100>;
                         nvidia,ahub-cif-ids = <8 8>;
                         clocks = <&tegra_car TEGRA114_CLK_I2S4>;
+                        resets = <&tegra_car 102>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
         };
@@ -403,6 +484,8 @@
                 reg = <0x78000000 0x200>;
                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
+                resets = <&tegra_car 14>;
+                reset-names = "sdhci";
                 status = "disable";
         };
 
@@ -411,6 +494,8 @@
                 reg = <0x78000200 0x200>;
                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
+                resets = <&tegra_car 9>;
+                reset-names = "sdhci";
                 status = "disable";
         };
 
@@ -419,6 +504,8 @@
                 reg = <0x78000400 0x200>;
                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
+                resets = <&tegra_car 69>;
+                reset-names = "sdhci";
                 status = "disable";
         };
 
@@ -427,6 +514,8 @@
                 reg = <0x78000600 0x200>;
                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
+                resets = <&tegra_car 15>;
+                reset-names = "sdhci";
                 status = "disable";
         };
 
@@ -436,6 +525,8 @@
                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                 phy_type = "utmi";
                 clocks = <&tegra_car TEGRA114_CLK_USBD>;
+                resets = <&tegra_car 22>;
+                reset-names = "usb";
                 nvidia,phy = <&phy1>;
                 status = "disabled";
         };
@@ -467,6 +558,8 @@
                 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
                 phy_type = "utmi";
                 clocks = <&tegra_car TEGRA114_CLK_USB3>;
+                resets = <&tegra_car 59>;
+                reset-names = "usb";
                 nvidia,phy = <&phy3>;
                 status = "disabled";
         };
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 8d71fc9d8a2f..e57fb3aefc2a 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -280,6 +280,8 @@
                 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 67>;
+                reset-names = "i2c";
         };
 
         i2c@7000d000 {
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index df40b54fd8bc..c90d0aac3afe 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -22,6 +22,8 @@
                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
                              <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
                 clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
+                resets = <&tegra_car 28>;
+                reset-names = "host1x";
 
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -33,6 +35,8 @@
                         reg = <0x54040000 0x00040000>;
                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA20_CLK_MPE>;
+                        resets = <&tegra_car 60>;
+                        reset-names = "mpe";
                 };
 
                 vi {
@@ -40,6 +44,8 @@
                         reg = <0x54080000 0x00040000>;
                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA20_CLK_VI>;
+                        resets = <&tegra_car 20>;
+                        reset-names = "vi";
                 };
 
                 epp {
@@ -47,6 +53,8 @@
                         reg = <0x540c0000 0x00040000>;
                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA20_CLK_EPP>;
+                        resets = <&tegra_car 19>;
+                        reset-names = "epp";
                 };
 
                 isp {
@@ -54,6 +62,8 @@
                         reg = <0x54100000 0x00040000>;
                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA20_CLK_ISP>;
+                        resets = <&tegra_car 23>;
+                        reset-names = "isp";
                 };
 
                 gr2d {
@@ -61,12 +71,16 @@
                         reg = <0x54140000 0x00040000>;
                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA20_CLK_GR2D>;
+                        resets = <&tegra_car 21>;
+                        reset-names = "2d";
                 };
 
                 gr3d {
                         compatible = "nvidia,tegra20-gr3d";
                         reg = <0x54180000 0x00040000>;
                         clocks = <&tegra_car TEGRA20_CLK_GR3D>;
+                        resets = <&tegra_car 24>;
+                        reset-names = "3d";
                 };
 
                 dc@54200000 {
@@ -75,7 +89,9 @@
                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA20_CLK_DISP1>,
                                  <&tegra_car TEGRA20_CLK_PLL_P>;
-                        clock-names = "disp1", "parent";
+                        clock-names = "dc", "parent";
+                        resets = <&tegra_car 27>;
+                        reset-names = "dc";
 
                         rgb {
                                 status = "disabled";
@@ -88,7 +104,9 @@
                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA20_CLK_DISP2>,
                                  <&tegra_car TEGRA20_CLK_PLL_P>;
-                        clock-names = "disp2", "parent";
+                        clock-names = "dc", "parent";
+                        resets = <&tegra_car 26>;
+                        reset-names = "dc";
 
                         rgb {
                                 status = "disabled";
@@ -102,6 +120,8 @@
                         clocks = <&tegra_car TEGRA20_CLK_HDMI>,
                                  <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
                         clock-names = "hdmi", "parent";
+                        resets = <&tegra_car 51>;
+                        reset-names = "hdmi";
                         status = "disabled";
                 };
 
@@ -117,6 +137,8 @@
                         compatible = "nvidia,tegra20-dsi";
                         reg = <0x54300000 0x00040000>;
                         clocks = <&tegra_car TEGRA20_CLK_DSI>;
+                        resets = <&tegra_car 48>;
+                        reset-names = "dsi";
                         status = "disabled";
                 };
         };
@@ -160,6 +182,7 @@
                 compatible = "nvidia,tegra20-car";
                 reg = <0x60006000 0x1000>;
                 #clock-cells = <1>;
+                #reset-cells = <1>;
         };
 
         apbdma: dma {
@@ -182,6 +205,9 @@
                              <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                              <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA20_CLK_APBDMA>;
+                resets = <&tegra_car 34>;
+                reset-names = "dma";
+                #dma-cells = <1>;
         };
 
         ahb {
@@ -222,8 +248,11 @@
                 compatible = "nvidia,tegra20-ac97";
                 reg = <0x70002000 0x200>;
                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 12>;
                 clocks = <&tegra_car TEGRA20_CLK_AC97>;
+                resets = <&tegra_car 3>;
+                reset-names = "ac97";
+                dmas = <&apbdma 12>, <&apbdma 12>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -231,8 +260,11 @@
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002800 0x200>;
                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 2>;
                 clocks = <&tegra_car TEGRA20_CLK_I2S1>;
+                resets = <&tegra_car 11>;
+                reset-names = "i2s";
+                dmas = <&apbdma 2>, <&apbdma 2>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -240,8 +272,11 @@
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002a00 0x200>;
                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 1>;
                 clocks = <&tegra_car TEGRA20_CLK_I2S2>;
+                resets = <&tegra_car 18>;
+                reset-names = "i2s";
+                dmas = <&apbdma 1>, <&apbdma 1>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -257,8 +292,11 @@
                 reg = <0x70006000 0x40>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 8>;
                 clocks = <&tegra_car TEGRA20_CLK_UARTA>;
+                resets = <&tegra_car 6>;
+                reset-names = "serial";
+                dmas = <&apbdma 8>, <&apbdma 8>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -267,8 +305,11 @@
                 reg = <0x70006040 0x40>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 9>;
                 clocks = <&tegra_car TEGRA20_CLK_UARTB>;
+                resets = <&tegra_car 7>;
+                reset-names = "serial";
+                dmas = <&apbdma 9>, <&apbdma 9>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -277,8 +318,11 @@
                 reg = <0x70006200 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 10>;
                 clocks = <&tegra_car TEGRA20_CLK_UARTC>;
+                resets = <&tegra_car 55>;
+                reset-names = "serial";
+                dmas = <&apbdma 10>, <&apbdma 10>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -287,8 +331,11 @@
                 reg = <0x70006300 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 19>;
                 clocks = <&tegra_car TEGRA20_CLK_UARTD>;
+                resets = <&tegra_car 65>;
+                reset-names = "serial";
+                dmas = <&apbdma 19>, <&apbdma 19>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -297,8 +344,11 @@
                 reg = <0x70006400 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 20>;
                 clocks = <&tegra_car TEGRA20_CLK_UARTE>;
+                resets = <&tegra_car 66>;
+                reset-names = "serial";
+                dmas = <&apbdma 20>, <&apbdma 20>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -307,6 +357,8 @@
                 reg = <0x7000a000 0x100>;
                 #pwm-cells = <2>;
                 clocks = <&tegra_car TEGRA20_CLK_PWM>;
+                resets = <&tegra_car 17>;
+                reset-names = "pwm";
                 status = "disabled";
         };
 
@@ -326,6 +378,10 @@
                 clocks = <&tegra_car TEGRA20_CLK_I2C1>,
                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 12>;
+                reset-names = "i2c";
+                dmas = <&apbdma 21>, <&apbdma 21>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -333,10 +389,13 @@
                 compatible = "nvidia,tegra20-sflash";
                 reg = <0x7000c380 0x80>;
                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 11>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA20_CLK_SPI>;
+                resets = <&tegra_car 43>;
+                reset-names = "spi";
+                dmas = <&apbdma 11>, <&apbdma 11>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -349,6 +408,10 @@
                 clocks = <&tegra_car TEGRA20_CLK_I2C2>,
                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 54>;
+                reset-names = "i2c";
+                dmas = <&apbdma 22>, <&apbdma 22>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -361,6 +424,10 @@
                 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 67>;
+                reset-names = "i2c";
+                dmas = <&apbdma 23>, <&apbdma 23>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -373,6 +440,10 @@
                 clocks = <&tegra_car TEGRA20_CLK_DVC>,
                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 47>;
+                reset-names = "i2c";
+                dmas = <&apbdma 24>, <&apbdma 24>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -380,10 +451,13 @@
                 compatible = "nvidia,tegra20-slink";
                 reg = <0x7000d400 0x200>;
                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 15>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA20_CLK_SBC1>;
+                resets = <&tegra_car 41>;
+                reset-names = "spi";
+                dmas = <&apbdma 15>, <&apbdma 15>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -391,10 +465,13 @@
                 compatible = "nvidia,tegra20-slink";
                 reg = <0x7000d600 0x200>;
                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 16>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA20_CLK_SBC2>;
+                resets = <&tegra_car 44>;
+                reset-names = "spi";
+                dmas = <&apbdma 16>, <&apbdma 16>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -402,10 +479,13 @@
                 compatible = "nvidia,tegra20-slink";
                 reg = <0x7000d800 0x200>;
                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 17>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA20_CLK_SBC3>;
+                resets = <&tegra_car 46>;
+                reset-names = "spi";
+                dmas = <&apbdma 17>, <&apbdma 17>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -413,10 +493,13 @@
                 compatible = "nvidia,tegra20-slink";
                 reg = <0x7000da00 0x200>;
                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 18>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA20_CLK_SBC4>;
+                resets = <&tegra_car 68>;
+                reset-names = "spi";
+                dmas = <&apbdma 18>, <&apbdma 18>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -425,6 +508,8 @@
                 reg = <0x7000e200 0x100>;
                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA20_CLK_KBC>;
+                resets = <&tegra_car 36>;
+                reset-names = "kbc";
                 status = "disabled";
         };
 
@@ -478,9 +563,12 @@
 
                 clocks = <&tegra_car TEGRA20_CLK_PEX>,
                          <&tegra_car TEGRA20_CLK_AFI>,
-                         <&tegra_car TEGRA20_CLK_PCIE_XCLK>,
                          <&tegra_car TEGRA20_CLK_PLL_E>;
-                clock-names = "pex", "afi", "pcie_xclk", "pll_e";
+                clock-names = "pex", "afi", "pll_e";
+                resets = <&tegra_car 70>,
+                         <&tegra_car 72>,
+                         <&tegra_car 74>;
+                reset-names = "pex", "afi", "pcie_x";
                 status = "disabled";
 
                 pci@1,0 {
@@ -517,6 +605,8 @@
                 phy_type = "utmi";
                 nvidia,has-legacy-mode;
                 clocks = <&tegra_car TEGRA20_CLK_USBD>;
+                resets = <&tegra_car 22>;
+                reset-names = "usb";
                 nvidia,needs-double-reset;
                 nvidia,phy = <&phy1>;
                 status = "disabled";
@@ -548,6 +638,8 @@
                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
                 phy_type = "ulpi";
                 clocks = <&tegra_car TEGRA20_CLK_USB2>;
+                resets = <&tegra_car 58>;
+                reset-names = "usb";
                 nvidia,phy = <&phy2>;
                 status = "disabled";
         };
@@ -569,6 +661,8 @@
                 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
                 phy_type = "utmi";
                 clocks = <&tegra_car TEGRA20_CLK_USB3>;
+                resets = <&tegra_car 59>;
+                reset-names = "usb";
                 nvidia,phy = <&phy3>;
                 status = "disabled";
         };
@@ -597,6 +691,8 @@
                 reg = <0xc8000000 0x200>;
                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
+                resets = <&tegra_car 14>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
@@ -605,6 +701,8 @@
                 reg = <0xc8000200 0x200>;
                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA20_CLK_SDMMC2>;
+                resets = <&tegra_car 9>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
@@ -613,6 +711,8 @@
                 reg = <0xc8000400 0x200>;
                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA20_CLK_SDMMC3>;
+                resets = <&tegra_car 69>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
@@ -621,6 +721,8 @@
                 reg = <0xc8000600 0x200>;
                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA20_CLK_SDMMC4>;
+                resets = <&tegra_car 15>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 2bd55cfd88ad..31259b09e7cc 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -40,10 +40,13 @@
 
                 clocks = <&tegra_car TEGRA30_CLK_PCIE>,
                          <&tegra_car TEGRA30_CLK_AFI>,
-                         <&tegra_car TEGRA30_CLK_PCIEX>,
                          <&tegra_car TEGRA30_CLK_PLL_E>,
                          <&tegra_car TEGRA30_CLK_CML0>;
-                clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml";
+                clock-names = "pex", "afi", "pll_e", "cml";
+                resets = <&tegra_car 70>,
+                         <&tegra_car 72>,
+                         <&tegra_car 74>;
+                reset-names = "pex", "afi", "pcie_x";
                 status = "disabled";
 
                 pci@1,0 {
@@ -92,6 +95,8 @@
                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
                              <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
                 clocks = <&tegra_car TEGRA30_CLK_HOST1X>;
+                resets = <&tegra_car 28>;
+                reset-names = "host1x";
 
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -103,6 +108,8 @@
                         reg = <0x54040000 0x00040000>;
                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA30_CLK_MPE>;
+                        resets = <&tegra_car 60>;
+                        reset-names = "mpe";
                 };
 
                 vi {
@@ -110,6 +117,8 @@
                         reg = <0x54080000 0x00040000>;
                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA30_CLK_VI>;
+                        resets = <&tegra_car 20>;
+                        reset-names = "vi";
                 };
 
                 epp {
@@ -117,6 +126,8 @@
                         reg = <0x540c0000 0x00040000>;
                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA30_CLK_EPP>;
+                        resets = <&tegra_car 19>;
+                        reset-names = "epp";
                 };
 
                 isp {
@@ -124,12 +135,16 @@
                         reg = <0x54100000 0x00040000>;
                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA30_CLK_ISP>;
+                        resets = <&tegra_car 23>;
+                        reset-names = "isp";
                 };
 
                 gr2d {
                         compatible = "nvidia,tegra30-gr2d";
                         reg = <0x54140000 0x00040000>;
                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+                        resets = <&tegra_car 21>;
+                        reset-names = "2d";
                         clocks = <&tegra_car TEGRA30_CLK_GR2D>;
                 };
 
@@ -139,6 +154,9 @@
                         clocks = <&tegra_car TEGRA30_CLK_GR3D
                                   &tegra_car TEGRA30_CLK_GR3D2>;
                         clock-names = "3d", "3d2";
+                        resets = <&tegra_car 24>,
+                                 <&tegra_car 98>;
+                        reset-names = "3d", "3d2";
                 };
 
                 dc@54200000 {
@@ -147,7 +165,9 @@
                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA30_CLK_DISP1>,
                                  <&tegra_car TEGRA30_CLK_PLL_P>;
-                        clock-names = "disp1", "parent";
+                        clock-names = "dc", "parent";
+                        resets = <&tegra_car 27>;
+                        reset-names = "dc";
 
                         rgb {
                                 status = "disabled";
@@ -160,7 +180,9 @@
                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&tegra_car TEGRA30_CLK_DISP2>,
                                  <&tegra_car TEGRA30_CLK_PLL_P>;
-                        clock-names = "disp2", "parent";
+                        clock-names = "dc", "parent";
+                        resets = <&tegra_car 26>;
+                        reset-names = "dc";
 
                         rgb {
                                 status = "disabled";
@@ -174,6 +196,8 @@
                         clocks = <&tegra_car TEGRA30_CLK_HDMI>,
                                  <&tegra_car TEGRA30_CLK_PLL_D2_OUT0>;
                         clock-names = "hdmi", "parent";
+                        resets = <&tegra_car 51>;
+                        reset-names = "hdmi";
                         status = "disabled";
                 };
 
@@ -189,6 +213,8 @@
                         compatible = "nvidia,tegra30-dsi";
                         reg = <0x54300000 0x00040000>;
                         clocks = <&tegra_car TEGRA30_CLK_DSIA>;
+                        resets = <&tegra_car 48>;
+                        reset-names = "dsi";
                         status = "disabled";
                 };
         };
@@ -234,6 +260,7 @@
                 compatible = "nvidia,tegra30-car";
                 reg = <0x60006000 0x1000>;
                 #clock-cells = <1>;
+                #reset-cells = <1>;
         };
 
         apbdma: dma {
@@ -272,6 +299,9 @@
                              <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA30_CLK_APBDMA>;
+                resets = <&tegra_car 34>;
+                reset-names = "dma";
+                #dma-cells = <1>;
         };
 
         ahb: ahb {
@@ -315,8 +345,11 @@
                 reg = <0x70006000 0x40>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 8>;
                 clocks = <&tegra_car TEGRA30_CLK_UARTA>;
+                resets = <&tegra_car 6>;
+                reset-names = "serial";
+                dmas = <&apbdma 8>, <&apbdma 8>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -325,8 +358,11 @@
                 reg = <0x70006040 0x40>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 9>;
                 clocks = <&tegra_car TEGRA30_CLK_UARTB>;
+                resets = <&tegra_car 7>;
+                reset-names = "serial";
+                dmas = <&apbdma 9>, <&apbdma 9>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -335,8 +371,11 @@
                 reg = <0x70006200 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 10>;
                 clocks = <&tegra_car TEGRA30_CLK_UARTC>;
+                resets = <&tegra_car 55>;
+                reset-names = "serial";
+                dmas = <&apbdma 10>, <&apbdma 10>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -345,8 +384,11 @@
                 reg = <0x70006300 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 19>;
                 clocks = <&tegra_car TEGRA30_CLK_UARTD>;
+                resets = <&tegra_car 65>;
+                reset-names = "serial";
+                dmas = <&apbdma 19>, <&apbdma 19>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -355,8 +397,11 @@
                 reg = <0x70006400 0x100>;
                 reg-shift = <2>;
                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 20>;
                 clocks = <&tegra_car TEGRA30_CLK_UARTE>;
+                resets = <&tegra_car 66>;
+                reset-names = "serial";
+                dmas = <&apbdma 20>, <&apbdma 20>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -365,6 +410,8 @@
                 reg = <0x7000a000 0x100>;
                 #pwm-cells = <2>;
                 clocks = <&tegra_car TEGRA30_CLK_PWM>;
+                resets = <&tegra_car 17>;
+                reset-names = "pwm";
                 status = "disabled";
         };
 
@@ -384,6 +431,10 @@
                 clocks = <&tegra_car TEGRA30_CLK_I2C1>,
                          <&tegra_car TEGRA30_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 12>;
+                reset-names = "i2c";
+                dmas = <&apbdma 21>, <&apbdma 21>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -396,6 +447,10 @@
                 clocks = <&tegra_car TEGRA30_CLK_I2C2>,
                          <&tegra_car TEGRA30_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 54>;
+                reset-names = "i2c";
+                dmas = <&apbdma 22>, <&apbdma 22>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -408,6 +463,10 @@
                 clocks = <&tegra_car TEGRA30_CLK_I2C3>,
                          <&tegra_car TEGRA30_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 67>;
+                reset-names = "i2c";
+                dmas = <&apbdma 23>, <&apbdma 23>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -419,7 +478,11 @@
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA30_CLK_I2C4>,
                          <&tegra_car TEGRA30_CLK_PLL_P_OUT3>;
+                resets = <&tegra_car 103>;
+                reset-names = "i2c";
                 clock-names = "div-clk", "fast-clk";
+                dmas = <&apbdma 26>, <&apbdma 26>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -432,6 +495,10 @@
                 clocks = <&tegra_car TEGRA30_CLK_I2C5>,
                          <&tegra_car TEGRA30_CLK_PLL_P_OUT3>;
                 clock-names = "div-clk", "fast-clk";
+                resets = <&tegra_car 47>;
+                reset-names = "i2c";
+                dmas = <&apbdma 24>, <&apbdma 24>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -439,10 +506,13 @@
                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                 reg = <0x7000d400 0x200>;
                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 15>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA30_CLK_SBC1>;
+                resets = <&tegra_car 41>;
+                reset-names = "spi";
+                dmas = <&apbdma 15>, <&apbdma 15>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -450,10 +520,13 @@
                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                 reg = <0x7000d600 0x200>;
                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 16>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA30_CLK_SBC2>;
+                resets = <&tegra_car 44>;
+                reset-names = "spi";
+                dmas = <&apbdma 16>, <&apbdma 16>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -461,10 +534,13 @@
                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                 reg = <0x7000d800 0x200>;
                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 17>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA30_CLK_SBC3>;
+                resets = <&tegra_car 46>;
+                reset-names = "spi";
+                dmas = <&apbdma 17>, <&apbdma 17>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -472,10 +548,13 @@
                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                 reg = <0x7000da00 0x200>;
                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 18>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA30_CLK_SBC4>;
+                resets = <&tegra_car 68>;
+                reset-names = "spi";
+                dmas = <&apbdma 18>, <&apbdma 18>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -483,10 +562,13 @@
                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                 reg = <0x7000dc00 0x200>;
                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 27>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA30_CLK_SBC5>;
+                resets = <&tegra_car 104>;
+                reset-names = "spi";
+                dmas = <&apbdma 27>, <&apbdma 27>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -494,10 +576,13 @@
                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
                 reg = <0x7000de00 0x200>;
                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 28>;
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&tegra_car TEGRA30_CLK_SBC6>;
+                resets = <&tegra_car 106>;
+                reset-names = "spi";
+                dmas = <&apbdma 28>, <&apbdma 28>;
+                dma-names = "rx", "tx";
                 status = "disabled";
         };
 
@@ -506,6 +591,8 @@
                 reg = <0x7000e200 0x100>;
                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA30_CLK_KBC>;
+                resets = <&tegra_car 36>;
+                reset-names = "kbc";
                 status = "disabled";
         };
 
@@ -540,21 +627,29 @@
                 reg = <0x70080000 0x200
                        0x70080200 0x100>;
                 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-                nvidia,dma-request-selector = <&apbdma 1>;
                 clocks = <&tegra_car TEGRA30_CLK_D_AUDIO>,
-                         <&tegra_car TEGRA30_CLK_APBIF>,
-                         <&tegra_car TEGRA30_CLK_I2S0>,
-                         <&tegra_car TEGRA30_CLK_I2S1>,
-                         <&tegra_car TEGRA30_CLK_I2S2>,
-                         <&tegra_car TEGRA30_CLK_I2S3>,
-                         <&tegra_car TEGRA30_CLK_I2S4>,
-                         <&tegra_car TEGRA30_CLK_DAM0>,
-                         <&tegra_car TEGRA30_CLK_DAM1>,
-                         <&tegra_car TEGRA30_CLK_DAM2>,
-                         <&tegra_car TEGRA30_CLK_SPDIF_IN>;
-                clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
+                         <&tegra_car TEGRA30_CLK_APBIF>;
+                clock-names = "d_audio", "apbif";
+                resets = <&tegra_car 106>, /* d_audio */
+                         <&tegra_car 107>, /* apbif */
+                         <&tegra_car 30>,  /* i2s0 */
+                         <&tegra_car 11>,  /* i2s1 */
+                         <&tegra_car 18>,  /* i2s2 */
+                         <&tegra_car 101>, /* i2s3 */
+                         <&tegra_car 102>, /* i2s4 */
+                         <&tegra_car 108>, /* dam0 */
+                         <&tegra_car 109>, /* dam1 */
+                         <&tegra_car 110>, /* dam2 */
+                         <&tegra_car 10>;  /* spdif */
+                reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
                               "i2s3", "i2s4", "dam0", "dam1", "dam2",
-                              "spdif_in";
+                              "spdif";
+                dmas = <&apbdma 1>, <&apbdma 1>,
+                       <&apbdma 2>, <&apbdma 2>,
+                       <&apbdma 3>, <&apbdma 3>,
+                       <&apbdma 4>, <&apbdma 4>;
+                dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
+                            "rx3", "tx3";
                 ranges;
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -564,6 +659,8 @@
                         reg = <0x70080300 0x100>;
                         nvidia,ahub-cif-ids = <4 4>;
                         clocks = <&tegra_car TEGRA30_CLK_I2S0>;
+                        resets = <&tegra_car 30>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -572,6 +669,8 @@
                         reg = <0x70080400 0x100>;
                         nvidia,ahub-cif-ids = <5 5>;
                         clocks = <&tegra_car TEGRA30_CLK_I2S1>;
+                        resets = <&tegra_car 11>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -580,6 +679,8 @@
                         reg = <0x70080500 0x100>;
                         nvidia,ahub-cif-ids = <6 6>;
                         clocks = <&tegra_car TEGRA30_CLK_I2S2>;
+                        resets = <&tegra_car 18>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -588,6 +689,8 @@
                         reg = <0x70080600 0x100>;
                         nvidia,ahub-cif-ids = <7 7>;
                         clocks = <&tegra_car TEGRA30_CLK_I2S3>;
+                        resets = <&tegra_car 101>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
 
@@ -596,6 +699,8 @@
                         reg = <0x70080700 0x100>;
                         nvidia,ahub-cif-ids = <8 8>;
                         clocks = <&tegra_car TEGRA30_CLK_I2S4>;
+                        resets = <&tegra_car 102>;
+                        reset-names = "i2s";
                         status = "disabled";
                 };
         };
@@ -605,6 +710,8 @@
                 reg = <0x78000000 0x200>;
                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA30_CLK_SDMMC1>;
+                resets = <&tegra_car 14>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
@@ -613,6 +720,8 @@
                 reg = <0x78000200 0x200>;
                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA30_CLK_SDMMC2>;
+                resets = <&tegra_car 9>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
@@ -621,6 +730,8 @@
                 reg = <0x78000400 0x200>;
                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
+                resets = <&tegra_car 69>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
@@ -629,6 +740,8 @@
                 reg = <0x78000600 0x200>;
                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&tegra_car TEGRA30_CLK_SDMMC4>;
+                resets = <&tegra_car 15>;
+                reset-names = "sdhci";
                 status = "disabled";
         };
 
@@ -638,6 +751,8 @@
                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                 phy_type = "utmi";
                 clocks = <&tegra_car TEGRA30_CLK_USBD>;
+                resets = <&tegra_car 22>;
+                reset-names = "usb";
                 nvidia,needs-double-reset;
                 nvidia,phy = <&phy1>;
                 status = "disabled";
@@ -671,6 +786,8 @@
                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
                 phy_type = "ulpi";
                 clocks = <&tegra_car TEGRA30_CLK_USB2>;
+                resets = <&tegra_car 58>;
+                reset-names = "usb";
                 nvidia,phy = <&phy2>;
                 status = "disabled";
         };
@@ -692,6 +809,8 @@
                 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
                 phy_type = "utmi";
                 clocks = <&tegra_car TEGRA30_CLK_USB3>;
+                resets = <&tegra_car 59>;
+                reset-names = "usb";
                 nvidia,phy = <&phy3>;
                 status = "disabled";
         };
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index ce922d0ea7aa..53c6a26b633d 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -66,7 +66,7 @@ static long __init sp804_get_clock_rate(struct clk *clk)
 
 static void __iomem *sched_clock_base;
 
-static u32 sp804_read(void)
+static u64 notrace sp804_read(void)
 {
         return ~readl_relaxed(sched_clock_base + TIMER_VALUE);
 }
@@ -104,7 +104,7 @@ void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
 
         if (use_sched_clock) {
                 sched_clock_base = base;
-                setup_sched_clock(sp804_read, 32, rate);
+                sched_clock_register(sp804_read, 32, rate);
         }
 }
 
diff --git a/arch/arm/configs/ape6evm_defconfig b/arch/arm/configs/ape6evm_defconfig
index 1ce39940795d..cb26c62dc722 100644
--- a/arch/arm/configs/ape6evm_defconfig
+++ b/arch/arm/configs/ape6evm_defconfig
@@ -13,7 +13,7 @@ CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 CONFIG_SLAB=y
 # CONFIG_BLOCK is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A73A4=y
 CONFIG_MACH_APE6EVM=y
 # CONFIG_ARM_THUMB is not set
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
index fae939d3d7f0..5abf1a2e3160 100644
--- a/arch/arm/configs/armadillo800eva_defconfig
+++ b/arch/arm/configs/armadillo800eva_defconfig
@@ -15,7 +15,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7740=y
 CONFIG_MACH_ARMADILLO800EVA=y
 # CONFIG_SH_TIMER_TMU is not set
diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
index b38cd107f82d..1dd39716d7cb 100644
--- a/arch/arm/configs/bockw_defconfig
+++ b/arch/arm/configs/bockw_defconfig
@@ -8,7 +8,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7778=y
 CONFIG_MACH_BOCKW=y
 CONFIG_MEMORY_START=0x60000000
diff --git a/arch/arm/configs/efm32_defconfig b/arch/arm/configs/efm32_defconfig
new file mode 100644
index 000000000000..f59fffb3d0c6
--- /dev/null
+++ b/arch/arm/configs/efm32_defconfig
@@ -0,0 +1,102 @@
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=12
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_UID16 is not set
+# CONFIG_BASE_FULL is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_MMU is not set
+CONFIG_ARCH_EFM32=y
+# CONFIG_KUSER_HELPERS is not set
+CONFIG_SET_MEM_PARAM=y
+CONFIG_DRAM_BASE=0x88000000
+CONFIG_DRAM_SIZE=0x00400000
+CONFIG_FLASH_MEM_BASE=0x8c000000
+CONFIG_FLASH_SIZE=0x01000000
+CONFIG_PREEMPT=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_XIP_KERNEL=y
+CONFIG_XIP_PHYS_ADDR=0x8c000000
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_COREDUMP is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK_RO=y
+CONFIG_MTD_ROM=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_BLK_DEV is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+CONFIG_KS8851=y
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_EFM32_UART=y
+CONFIG_SERIAL_EFM32_UART_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_SPI=y
+CONFIG_SPI_EFM32=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_SPI=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_FTRACE is not set
diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig
index 9943e5da74f1..a0182447d133 100644
--- a/arch/arm/configs/keystone_defconfig
+++ b/arch/arm/configs/keystone_defconfig
@@ -115,6 +115,8 @@ CONFIG_MTD_UBI=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_NETDEVICES=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
@@ -129,10 +131,24 @@ CONFIG_SPI_DAVINCI=y
 CONFIG_SPI_SPIDEV=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_DEBUG=y
+CONFIG_USB_DWC3_VERBOSE=y
+CONFIG_KEYSTONE_USB_PHY=y
 CONFIG_DMADEVICES=y
 CONFIG_COMMON_CLK_DEBUG=y
 CONFIG_MEMORY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_WBUF_VERIFY=y
@@ -144,6 +160,8 @@ CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
 CONFIG_NFSD_V3_ACL=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DEBUG_INFO=y
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
index 825c16dee8a0..7fd65a01ec7e 100644
--- a/arch/arm/configs/koelsch_defconfig
+++ b/arch/arm/configs/koelsch_defconfig
@@ -9,7 +9,7 @@ CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 CONFIG_SLAB=y
 # CONFIG_BLOCK is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7791=y
 CONFIG_MACH_KOELSCH=y
 # CONFIG_SWP_EMULATE is not set
diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig
index 6c37f4a98eb8..217f1dda2965 100644
--- a/arch/arm/configs/kzm9d_defconfig
+++ b/arch/arm/configs/kzm9d_defconfig
@@ -13,7 +13,7 @@ CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_EMEV2=y
 CONFIG_MACH_KZM9D=y
 CONFIG_MEMORY_START=0x40000000
diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
index 1ad028023a64..9934dbc23d64 100644
--- a/arch/arm/configs/kzm9g_defconfig
+++ b/arch/arm/configs/kzm9g_defconfig
@@ -22,7 +22,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_SH73A0=y
 CONFIG_MACH_KZM9G=y
 CONFIG_MEMORY_START=0x41000000
diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
index 35bff5e0d57a..35dc8b2be47f 100644
--- a/arch/arm/configs/lager_defconfig
+++ b/arch/arm/configs/lager_defconfig
@@ -12,7 +12,7 @@ CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7790=y
 CONFIG_MACH_LAGER=y
 # CONFIG_SH_TIMER_TMU is not set
diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
index 9fb11895b2e2..a61e1653fc5e 100644
--- a/arch/arm/configs/mackerel_defconfig
+++ b/arch/arm/configs/mackerel_defconfig
@@ -14,7 +14,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_SH7372=y
 CONFIG_MACH_MACKEREL=y
 CONFIG_MEMORY_SIZE=0x10000000
diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
index 5cc6360340b1..6981338cd08d 100644
--- a/arch/arm/configs/marzen_defconfig
+++ b/arch/arm/configs/marzen_defconfig
@@ -9,7 +9,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_SHMOBILE_LEGACY=y
 CONFIG_ARCH_R8A7779=y
 CONFIG_MACH_MARZEN=y
 CONFIG_MEMORY_START=0x60000000
diff --git a/arch/arm/configs/moxart_defconfig b/arch/arm/configs/moxart_defconfig
new file mode 100644
index 000000000000..a3cb76cfb828
--- /dev/null
+++ b/arch/arm/configs/moxart_defconfig
@@ -0,0 +1,149 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_BASE_FULL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_ARCH_MULTI_V4T=y
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_KEYBOARD_GPIO_POLLED=y
+CONFIG_ARCH_MOXART=y
+CONFIG_MACH_UC7112LX=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_ATAGS is not set
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_NETDEVICES=y
+CONFIG_NETCONSOLE=y
+CONFIG_NETCONSOLE_DYNAMIC=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+CONFIG_ARM_MOXART_ETHER=y
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_REALTEK_PHY=y
+CONFIG_MDIO_MOXART=y
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=1
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_MOXART=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_MOXART_WDT=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI_MOXART=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_MOXART=y
+CONFIG_DMADEVICES=y
+CONFIG_MOXART_DMA=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT3_FS=y
+CONFIG_TMPFS=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_JFFS2_FS=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_DEBUG_PAGEALLOC=y
+CONFIG_DEBUG_OBJECTS=y
+CONFIG_DEBUG_KMEMLEAK=y
+CONFIG_DEBUG_STACK_USAGE=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_PROVE_LOCKING=y
+CONFIG_DMA_API_DEBUG=y
+CONFIG_KGDB=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_UART_8250=y
+CONFIG_DEBUG_UART_PHYS=0x98200000
+CONFIG_DEBUG_UART_VIRT=0xf9820000
+CONFIG_EARLY_PRINTK=y
+CONFIG_KEYS=y
+CONFIG_CRC32_BIT=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index c1df4e9db140..7e3f5cba7cfd 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,9 @@ CONFIG_MACH_ARMADA_370=y
 CONFIG_MACH_ARMADA_XP=y
 CONFIG_ARCH_BCM=y
 CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BERLIN=y
+CONFIG_MACH_BERLIN_BG2=y
+CONFIG_MACH_BERLIN_BG2CD=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_ARCH_HIGHBANK=y
 CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 9ecccc865046..6976b03e5213 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -100,23 +100,19 @@
 #define TASK_UNMAPPED_BASE      UL(0x00000000)
 #endif
 
-#ifndef PHYS_OFFSET
-#define PHYS_OFFSET             UL(CONFIG_DRAM_BASE)
-#endif
-
 #ifndef END_MEM
 #define END_MEM                 (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
 #endif
 
 #ifndef PAGE_OFFSET
-#define PAGE_OFFSET             (PHYS_OFFSET)
+#define PAGE_OFFSET             PLAT_PHYS_OFFSET
 #endif
 
 /*
  * The module can be at any place in ram in nommu mode.
  */
 #define MODULES_END             (END_MEM)
-#define MODULES_VADDR           (PHYS_OFFSET)
+#define MODULES_VADDR           PAGE_OFFSET
 
 #define XIP_VIRT_ADDR(physaddr)  (physaddr)
 
@@ -157,6 +153,16 @@
 #endif
 #define ARCH_PGD_MASK           ((1 << ARCH_PGD_SHIFT) - 1)
 
+/*
+ * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical
+ * memory.  This is used for XIP and NoMMU kernels, or by kernels which
+ * have their own mach/memory.h.  Assembly code must always use
+ * PLAT_PHYS_OFFSET and not PHYS_OFFSET.
+ */
+#ifndef PLAT_PHYS_OFFSET
+#define PLAT_PHYS_OFFSET        UL(CONFIG_PHYS_OFFSET)
+#endif
+
 #ifndef __ASSEMBLY__
 
 /*
@@ -239,6 +245,8 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
 
 #else
 
+#define PHYS_OFFSET     PLAT_PHYS_OFFSET
+
 static inline phys_addr_t __virt_to_phys(unsigned long x)
 {
         return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET;
@@ -251,17 +259,6 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
 
 #endif
 #endif
-#endif /* __ASSEMBLY__ */
-
-#ifndef PHYS_OFFSET
-#ifdef PLAT_PHYS_OFFSET
-#define PHYS_OFFSET     PLAT_PHYS_OFFSET
-#else
-#define PHYS_OFFSET     UL(CONFIG_PHYS_OFFSET)
-#endif
-#endif
-
-#ifndef __ASSEMBLY__
 
 /*
  * PFNs are used to describe any physical page; this means
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index be6a720dd183..f98763f0bc17 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -46,10 +46,10 @@
 #define TEGRA_APB_MISC_GP_HIDREV        (TEGRA_APB_MISC_BASE + 0x804)
 
 /*
- * Must be 1MB-aligned since a 1MB mapping is used early on.
+ * Must be section-aligned since a section mapping is used early on.
  * Must not overlap with regions in mach-tegra/io.c:tegra_io_desc[].
  */
-#define UART_VIRTUAL_BASE               0xfe100000
+#define UART_VIRTUAL_BASE               0xfe800000
 
 #define checkuart(rp, rv, lhu, bit, uart) \
                 /* Load address of CLK_RST register */ \
@@ -156,28 +156,6 @@
 92:             and     \rv, \rp, #0xffffff     @ offset within 1MB section
                 add     \rv, \rv, #UART_VIRTUAL_BASE
                 str     \rv, [\tmp, #8]         @ Store in tegra_uart_virt
-                movw    \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
-                movt    \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
-                ldr     \rv, [\rv, #0]          @ Load HIDREV
-                ubfx    \rv, \rv, #8, #8        @ 15:8 are SoC version
-                cmp     \rv, #0x20              @ Tegra20?
-                moveq   \rv, #0x75              @ Tegra20 divisor
-                movne   \rv, #0xdd              @ Tegra30 divisor
-                str     \rv, [\tmp, #12]        @ Save divisor to scratch
-                /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */
-                mov     \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB
-                str     \rv, [\rp, #UART_LCR << UART_SHIFT]
-                /* uart[UART_DLL] = div & 0xff; */
-                ldr     \rv, [\tmp, #12]
-                and     \rv, \rv, #0xff
-                str     \rv, [\rp, #UART_DLL << UART_SHIFT]
-                /* uart[UART_DLM] = div >> 8; */
-                ldr     \rv, [\tmp, #12]
-                lsr     \rv, \rv, #8
-                str     \rv, [\rp, #UART_DLM << UART_SHIFT]
-                /* uart[UART_LCR] = UART_LCR_WLEN8; */
-                mov     \rv, #UART_LCR_WLEN8
-                str     \rv, [\rp, #UART_LCR << UART_SHIFT]
                 b       100f
 
                 .align
@@ -205,8 +183,8 @@
                 cmp     \rx, #0
                 beq     1002f
 1001:           ldrb    \rd, [\rx, #UART_LSR << UART_SHIFT]
-                and     \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
-                teq     \rd, #UART_LSR_TEMT | UART_LSR_THRE
+                and     \rd, \rd, #UART_LSR_THRE
+                teq     \rd, #UART_LSR_THRE
                 bne     1001b
 1002:
                 .endm
@@ -225,7 +203,7 @@
 /*
  * Storage for the state maintained by the macros above.
  *
- * In the kernel proper, this data is located in arch/arm/mach-tegra/common.c.
+ * In the kernel proper, this data is located in arch/arm/mach-tegra/tegra.c.
  * That's because this header is included from multiple files, and we only
  * want a single copy of the data. In particular, the UART probing code above
  * assumes it's running using physical addresses. This is true when this file
@@ -247,6 +225,4 @@ tegra_uart_config:
         .word 0
         /* Debug UART virtual address */
         .word 0
-        /* Scratch space for debug macro */
-        .word 0
 #endif
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 14235ba64a90..716249cc2ee1 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -68,7 +68,7 @@ ENTRY(stext)
 
 #ifdef CONFIG_ARM_MPU
         /* Calculate the size of a region covering just the kernel */
-        ldr     r5, =PHYS_OFFSET                @ Region start: PHYS_OFFSET
+        ldr     r5, =PLAT_PHYS_OFFSET           @ Region start: PHYS_OFFSET
         ldr     r6, =(_end)                     @ Cover whole kernel
         sub     r6, r6, r5                      @ Minimum size of region to map
         clz     r6, r6                          @ Region size must be 2^N...
@@ -213,7 +213,7 @@ ENTRY(__setup_mpu)
         set_region_nr r0, #MPU_RAM_REGION
         isb
         /* Full access from PL0, PL1, shared for CONFIG_SMP, cacheable */
-        ldr     r0, =PHYS_OFFSET                @ RAM starts at PHYS_OFFSET
+        ldr     r0, =PLAT_PHYS_OFFSET           @ RAM starts at PHYS_OFFSET
         ldr     r5,=(MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL)
 
         setup_region r0, r5, r6, MPU_DATA_SIDE  @ PHYS_OFFSET, shared, enabled
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 11d59b32fb8d..32f317e5828a 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -110,7 +110,7 @@ ENTRY(stext)
         sub     r4, r3, r4                      @ (PHYS_OFFSET - PAGE_OFFSET)
         add     r8, r8, r4                      @ PHYS_OFFSET
 #else
-        ldr     r8, =PHYS_OFFSET                @ always constant in this case
+        ldr     r8, =PLAT_PHYS_OFFSET           @ always constant in this case
 #endif
 
         /*
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 94f6b05f9e24..92f7b15dd221 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -404,6 +404,7 @@ EXPORT_SYMBOL(dump_fpu);
 unsigned long get_wchan(struct task_struct *p)
 {
         struct stackframe frame;
+        unsigned long stack_page;
         int count = 0;
         if (!p || p == current || p->state == TASK_RUNNING)
                 return 0;
@@ -412,9 +413,11 @@ unsigned long get_wchan(struct task_struct *p)
         frame.sp = thread_saved_sp(p);
         frame.lr = 0;                   /* recovered from the stack */
         frame.pc = thread_saved_pc(p);
+        stack_page = (unsigned long)task_stack_page(p);
         do {
-                int ret = unwind_frame(&frame);
-                if (ret < 0)
+                if (frame.sp < stack_page ||
+                    frame.sp >= stack_page + THREAD_SIZE ||
+                    unwind_frame(&frame) < 0)
                         return 0;
                 if (!in_sched_functions(frame.pc))
                         return frame.pc;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 6a1b8a81b1ae..987a7f5bce5f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -873,8 +873,6 @@ void __init setup_arch(char **cmdline_p)
         machine_desc = mdesc;
         machine_name = mdesc->name;
 
-        setup_dma_zone(mdesc);
-
         if (mdesc->reboot_mode != REBOOT_HARD)
                 reboot_mode = mdesc->reboot_mode;
 
@@ -892,6 +890,7 @@ void __init setup_arch(char **cmdline_p)
         sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
 
         early_paging_init(mdesc, lookup_processor_type(read_cpuid_id()));
+        setup_dma_zone(mdesc);
         sanity_check_meminfo();
         arm_memblock_init(&meminfo, mdesc);
 
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 00f79e59985b..af4e8c8a5422 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -31,7 +31,7 @@ int notrace unwind_frame(struct stackframe *frame)
         high = ALIGN(low, THREAD_SIZE);
 
         /* check current frame pointer is within bounds */
-        if (fp < (low + 12) || fp + 4 >= high)
+        if (fp < low + 12 || fp > high - 4)
                 return -EINVAL;
 
         /* restore the registers from the stack frame */
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index dbf0923e8d76..7940241f0576 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -509,9 +509,10 @@ static inline int
 __do_cache_op(unsigned long start, unsigned long end)
 {
         int ret;
-        unsigned long chunk = PAGE_SIZE;
 
         do {
+                unsigned long chunk = min(PAGE_SIZE, end - start);
+
                 if (signal_pending(current)) {
                         struct thread_info *ti = current_thread_info();
 
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 699b71e7f7ec..44eacdd7468b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -67,7 +67,7 @@ config SOC_SAMA5D3
         select HAVE_AT91_DBGU1
         help
           Select this if you are using one of Atmel's SAMA5D3 family SoC.
-          This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35.
+          This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
 endif
 
 if SOC_SAM_V4_V5
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index d3d7b993846b..86c71debab5b 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -53,6 +53,7 @@
 #define ARCH_EXID_SAMA5D33      0x00414300
 #define ARCH_EXID_SAMA5D34      0x00414301
 #define ARCH_EXID_SAMA5D35      0x00584300
+#define ARCH_EXID_SAMA5D36      0x00004301
 
 #define ARCH_FAMILY_AT91X92     0x09200000
 #define ARCH_FAMILY_AT91SAM9    0x01900000
@@ -105,7 +106,7 @@ enum at91_soc_subtype {
 
         /* SAMA5D3 */
         AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
-        AT91_SOC_SAMA5D35,
+        AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D36,
 
         /* No subtype for this SoC */
         AT91_SOC_SUBTYPE_NONE,
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 094b3459c288..eb6468dc60d5 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -233,6 +233,9 @@ static void __init soc_detect(u32 dbgu_base)
                 case ARCH_EXID_SAMA5D35:
                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
                         break;
+                case ARCH_EXID_SAMA5D36:
+                        at91_soc_initdata.subtype = AT91_SOC_SAMA5D36;
+                        break;
                 }
         }
 }
@@ -275,6 +278,7 @@ static const char *soc_subtype_name[] = {
         [AT91_SOC_SAMA5D33]     = "sama5d33",
         [AT91_SOC_SAMA5D34]     = "sama5d34",
         [AT91_SOC_SAMA5D35]     = "sama5d35",
+        [AT91_SOC_SAMA5D36]     = "sama5d36",
         [AT91_SOC_SUBTYPE_NONE] = "None",
         [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
 };
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
new file mode 100644
index 000000000000..7a02d222c378
--- /dev/null
+++ b/arch/arm/mach-berlin/Kconfig
@@ -0,0 +1,29 @@
+config ARCH_BERLIN
+        bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
+        select ARM_GIC
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_IRQ_CHIP
+        select COMMON_CLK
+        select DW_APB_ICTL
+        select DW_APB_TIMER_OF
+
+if ARCH_BERLIN
+
+menu "Marvell Berlin SoC variants"
+
+config MACH_BERLIN_BG2
+        bool "Marvell Armada 1500 (BG2)"
+        select CACHE_L2X0
+        select CPU_PJ4B
+        select HAVE_ARM_TWD if SMP
+        select HAVE_SMP
+
+config MACH_BERLIN_BG2CD
+        bool "Marvell Armada 1500-mini (BG2CD)"
+        select CACHE_L2X0
+        select CPU_V7
+        select HAVE_ARM_TWD if SMP
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-berlin/Makefile b/arch/arm/mach-berlin/Makefile
new file mode 100644
index 000000000000..ab69fe956f49
--- /dev/null
+++ b/arch/arm/mach-berlin/Makefile
@@ -0,0 +1 @@
+obj-y += berlin.o
diff --git a/arch/arm/mach-berlin/berlin.c b/arch/arm/mach-berlin/berlin.c
new file mode 100644
index 000000000000..025bcb5473eb
--- /dev/null
+++ b/arch/arm/mach-berlin/berlin.c
@@ -0,0 +1,39 @@
+/*
+ * Device Tree support for Marvell Berlin SoCs.
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/mach/arch.h>
+
+static void __init berlin_init_machine(void)
+{
+        /*
+         * with DT probing for L2CCs, berlin_init_machine can be removed.
+         * Note: 88DE3005 (Armada 1500-mini) uses pl310 l2cc
+         */
+        l2x0_of_init(0x70c00000, 0xfeffffff);
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const berlin_dt_compat[] = {
+        "marvell,berlin",
+        NULL,
+};
+
+DT_MACHINE_START(BERLIN_DT, "Marvell Berlin")
+        .dt_compat      = berlin_dt_compat,
+        .init_machine   = berlin_init_machine,
+MACHINE_END
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 134641d688bb..a1935911e4f1 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -259,7 +259,7 @@ asmlinkage void __exception_irq_entry clps711x_handle_irq(struct pt_regs *regs)
         } while (1);
 }
 
-static u32 notrace clps711x_sched_clock_read(void)
+static u64 notrace clps711x_sched_clock_read(void)
 {
         return ~readw_relaxed(CLPS711X_VIRT_BASE + TC1D);
 }
@@ -366,7 +366,7 @@ void __init clps711x_timer_init(void)
         tmp = clps_readl(SYSCON1) & ~(SYSCON1_TC1S | SYSCON1_TC1M);
         clps_writel(tmp, SYSCON1);
 
-        setup_sched_clock(clps711x_sched_clock_read, 16, timl);
+        sched_clock_register(clps711x_sched_clock_read, 16, timl);
 
         clocksource_mmio_init(CLPS711X_VIRT_BASE + TC1D,
                               "clps711x_clocksource", timl, 300, 16,
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index c46eccbbd512..78829c513fdc 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -487,7 +487,7 @@ int __init da8xx_register_emac(void)
 
 static struct resource da830_mcasp1_resources[] = {
         {
-                .name   = "mcasp1",
+                .name   = "mpu",
                 .start  = DAVINCI_DA830_MCASP1_REG_BASE,
                 .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
                 .flags  = IORESOURCE_MEM,
@@ -515,7 +515,7 @@ static struct platform_device da830_mcasp1_device = {
 
 static struct resource da850_mcasp_resources[] = {
         {
-                .name   = "mcasp",
+                .name   = "mpu",
                 .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
                 .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
                 .flags  = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index ef9ff1fb6f52..6117fc644188 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -641,6 +641,7 @@ static struct platform_device dm355_edma_device = {
 
 static struct resource dm355_asp1_resources[] = {
         {
+                .name   = "mpu",
                 .start  = DAVINCI_ASP1_BASE,
                 .end    = DAVINCI_ASP1_BASE + SZ_8K - 1,
                 .flags  = IORESOURCE_MEM,
@@ -906,7 +907,7 @@ static struct davinci_gpio_platform_data dm355_gpio_platform_data = {
 int __init dm355_gpio_register(void)
 {
         return davinci_gpio_register(dm355_gpio_resources,
-                                     sizeof(dm355_gpio_resources),
+                                     ARRAY_SIZE(dm355_gpio_resources),
                                      &dm355_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1511a0680f9a..d7c6f85d3fc9 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -720,7 +720,7 @@ static struct davinci_gpio_platform_data dm365_gpio_platform_data = {
 int __init dm365_gpio_register(void)
 {
         return davinci_gpio_register(dm365_gpio_resources,
-                                     sizeof(dm365_gpio_resources),
+                                     ARRAY_SIZE(dm365_gpio_resources),
                                      &dm365_gpio_platform_data);
 }
 
@@ -942,6 +942,7 @@ static struct platform_device dm365_edma_device = {
 
 static struct resource dm365_asp_resources[] = {
         {
+                .name   = "mpu",
                 .start  = DAVINCI_DM365_ASP0_BASE,
                 .end    = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1,
                 .flags  = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 143a3217e8ef..3ce47997bb46 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -572,6 +572,7 @@ static struct platform_device dm644x_edma_device = {
 /* DM6446 EVM uses ASP0; line-out is a pair of RCA jacks */
 static struct resource dm644x_asp_resources[] = {
         {
+                .name   = "mpu",
                 .start  = DAVINCI_ASP0_BASE,
                 .end    = DAVINCI_ASP0_BASE + SZ_8K - 1,
                 .flags  = IORESOURCE_MEM,
@@ -792,7 +793,7 @@ static struct davinci_gpio_platform_data dm644_gpio_platform_data = {
 int __init dm644x_gpio_register(void)
 {
         return davinci_gpio_register(dm644_gpio_resources,
-                                     sizeof(dm644_gpio_resources),
+                                     ARRAY_SIZE(dm644_gpio_resources),
                                      &dm644_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 2a73f299c1d0..0e81fea65e7f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -621,7 +621,7 @@ static struct platform_device dm646x_edma_device = {
 
 static struct resource dm646x_mcasp0_resources[] = {
         {
-                .name   = "mcasp0",
+                .name   = "mpu",
                 .start  = DAVINCI_DM646X_MCASP0_REG_BASE,
                 .end    = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1,
                 .flags  = IORESOURCE_MEM,
@@ -641,7 +641,7 @@ static struct resource dm646x_mcasp0_resources[] = {
 
 static struct resource dm646x_mcasp1_resources[] = {
         {
-                .name   = "mcasp1",
+                .name   = "mpu",
                 .start  = DAVINCI_DM646X_MCASP1_REG_BASE,
                 .end    = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1,
                 .flags  = IORESOURCE_MEM,
@@ -769,7 +769,7 @@ static struct davinci_gpio_platform_data dm646x_gpio_platform_data = {
 int __init dm646x_gpio_register(void)
 {
         return davinci_gpio_register(dm646x_gpio_resources,
-                                     sizeof(dm646x_gpio_resources),
+                                     ARRAY_SIZE(dm646x_gpio_resources),
                                      &dm646x_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 56c6eb5266ad..24ad30f32ae3 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -285,7 +285,7 @@ static struct clocksource clocksource_davinci = {
 /*
  * Overwrite weak default sched_clock with something more precise
  */
-static u32 notrace davinci_read_sched_clock(void)
+static u64 notrace davinci_read_sched_clock(void)
 {
         return timer32_read(&timers[TID_CLOCKSOURCE]);
 }
@@ -391,7 +391,7 @@ void __init davinci_timer_init(void)
                                     davinci_clock_tick_rate))
                 printk(err, clocksource_davinci.name);
 
-        setup_sched_clock(davinci_read_sched_clock, 32,
+        sched_clock_register(davinci_read_sched_clock, 32,
                           davinci_clock_tick_rate);
 
         /* setup clockevent */
diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile
new file mode 100644
index 000000000000..3a74af7413e8
--- /dev/null
+++ b/arch/arm/mach-efm32/Makefile
@@ -0,0 +1 @@
+obj-y += dtmachine.o
diff --git a/arch/arm/mach-efm32/Makefile.boot b/arch/arm/mach-efm32/Makefile.boot
new file mode 100644
index 000000000000..eacfc3f5c33e
--- /dev/null
+++ b/arch/arm/mach-efm32/Makefile.boot
@@ -0,0 +1,3 @@
+# Empty file waiting for deletion once Makefile.boot isn't needed any more.
+# Patch waits for application at
+# http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 .
diff --git a/arch/arm/mach-efm32/dtmachine.c b/arch/arm/mach-efm32/dtmachine.c
new file mode 100644
index 000000000000..2367495193c1
--- /dev/null
+++ b/arch/arm/mach-efm32/dtmachine.c
@@ -0,0 +1,15 @@
+#include <linux/kernel.h>
+
+#include <asm/v7m.h>
+
+#include <asm/mach/arch.h>
+
+static const char *const efm32gg_compat[] __initconst = {
+        "efm32,dk3750",
+        NULL
+};
+
+DT_MACHINE_START(EFM32DT, "EFM32 (Device Tree Support)")
+        .dt_compat = efm32gg_compat,
+        .restart = armv7m_restart,
+MACHINE_END
diff --git a/arch/arm/mach-efm32/include/mach/entry-macro.S b/arch/arm/mach-efm32/include/mach/entry-macro.S
new file mode 100644
index 000000000000..322159d5ed91
--- /dev/null
+++ b/arch/arm/mach-efm32/include/mach/entry-macro.S
@@ -0,0 +1,4 @@
+/*
+ * Empty file waiting for deletion once <mach/entry-macro.S> isn't needed any
+ * more. Patch "ARM: v7-M: drop using mach/entry-macro.S" sitting in next.
+ */
diff --git a/arch/arm/mach-efm32/include/mach/timex.h b/arch/arm/mach-efm32/include/mach/timex.h
new file mode 100644
index 000000000000..7a8b26da6599
--- /dev/null
+++ b/arch/arm/mach-efm32/include/mach/timex.h
@@ -0,0 +1,3 @@
+/*
+ * Empty file waiting for deletion once <mach/timex.h> isn't needed any more.
+ */
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 93e54fd4e3d5..bec570ae6494 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -5,6 +5,7 @@ menu "Cirrus EP93xx Implementation Options"
 config EP93XX_SOC_COMMON
         bool
         default y
+        select SOC_BUS
         select LEDS_GPIO_REGISTER
 
 config CRUNCH
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index d95ee28a616a..157ba88433c9 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -21,6 +21,7 @@
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/dma-mapping.h>
+#include <linux/sys_soc.h>
 #include <linux/timex.h>
 #include <linux/irq.h>
 #include <linux/io.h>
@@ -44,6 +45,7 @@
 #include <linux/platform_data/spi-ep93xx.h>
 #include <mach/gpio-ep93xx.h>
 
+#include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 
@@ -137,7 +139,7 @@ static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
 
 static struct irqaction ep93xx_timer_irq = {
         .name           = "ep93xx timer",
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+        .flags          = IRQF_TIMER | IRQF_IRQPOLL,
         .handler        = ep93xx_timer_interrupt,
 };
 
@@ -925,8 +927,108 @@ void ep93xx_ide_release_gpio(struct platform_device *pdev)
 }
 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
 
-void __init ep93xx_init_devices(void)
+/*************************************************************************
+ * EP93xx Security peripheral
+ *************************************************************************/
+
+/*
+ * The Maverick Key is 256 bits of micro fuses blown at the factory during
+ * manufacturing to uniquely identify a part.
+ *
+ * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
+ */
+#define EP93XX_SECURITY_REG(x)          (EP93XX_SECURITY_BASE + (x))
+#define EP93XX_SECURITY_SECFLG          EP93XX_SECURITY_REG(0x2400)
+#define EP93XX_SECURITY_FUSEFLG         EP93XX_SECURITY_REG(0x2410)
+#define EP93XX_SECURITY_UNIQID          EP93XX_SECURITY_REG(0x2440)
+#define EP93XX_SECURITY_UNIQCHK         EP93XX_SECURITY_REG(0x2450)
+#define EP93XX_SECURITY_UNIQVAL         EP93XX_SECURITY_REG(0x2460)
+#define EP93XX_SECURITY_SECID1          EP93XX_SECURITY_REG(0x2500)
+#define EP93XX_SECURITY_SECID2          EP93XX_SECURITY_REG(0x2504)
+#define EP93XX_SECURITY_SECCHK1         EP93XX_SECURITY_REG(0x2520)
+#define EP93XX_SECURITY_SECCHK2         EP93XX_SECURITY_REG(0x2524)
+#define EP93XX_SECURITY_UNIQID2         EP93XX_SECURITY_REG(0x2700)
+#define EP93XX_SECURITY_UNIQID3         EP93XX_SECURITY_REG(0x2704)
+#define EP93XX_SECURITY_UNIQID4         EP93XX_SECURITY_REG(0x2708)
+#define EP93XX_SECURITY_UNIQID5         EP93XX_SECURITY_REG(0x270c)
+
+static char ep93xx_soc_id[33];
+
+static const char __init *ep93xx_get_soc_id(void)
 {
+        unsigned int id, id2, id3, id4, id5;
+
+        if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
+                return "bad Hamming code";
+
+        id = __raw_readl(EP93XX_SECURITY_UNIQID);
+        id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
+        id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
+        id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
+        id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
+
+        if (id != id2)
+                return "invalid";
+
+        snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
+                 "%08x%08x%08x%08x", id2, id3, id4, id5);
+
+        return ep93xx_soc_id;
+}
+
+static const char __init *ep93xx_get_soc_rev(void)
+{
+        int rev = ep93xx_chip_revision();
+
+        switch (rev) {
+        case EP93XX_CHIP_REV_D0:
+                return "D0";
+        case EP93XX_CHIP_REV_D1:
+                return "D1";
+        case EP93XX_CHIP_REV_E0:
+                return "E0";
+        case EP93XX_CHIP_REV_E1:
+                return "E1";
+        case EP93XX_CHIP_REV_E2:
+                return "E2";
+        default:
+                return "unknown";
+        }
+}
+
+static const char __init *ep93xx_get_machine_name(void)
+{
+        return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
+}
+
+static struct device __init *ep93xx_init_soc(void)
+{
+        struct soc_device_attribute *soc_dev_attr;
+        struct soc_device *soc_dev;
+
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return NULL;
+
+        soc_dev_attr->machine = ep93xx_get_machine_name();
+        soc_dev_attr->family = "Cirrus Logic EP93xx";
+        soc_dev_attr->revision = ep93xx_get_soc_rev();
+        soc_dev_attr->soc_id = ep93xx_get_soc_id();
+
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR(soc_dev)) {
+                kfree(soc_dev_attr->machine);
+                kfree(soc_dev_attr);
+                return NULL;
+        }
+
+        return soc_device_to_device(soc_dev);
+}
+
+struct device __init *ep93xx_init_devices(void)
+{
+        struct device *parent;
+
         /* Disallow access to MaverickCrunch initially */
         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
 
@@ -937,6 +1039,8 @@ void __init ep93xx_init_devices(void)
                                EP93XX_SYSCON_DEVCFG_GONIDE |
                                EP93XX_SYSCON_DEVCFG_HONIDE);
 
+        parent = ep93xx_init_soc();
+
         /* Get the GPIO working early, other devices need it */
         platform_device_register(&ep93xx_gpio_device);
 
@@ -949,6 +1053,8 @@ void __init ep93xx_init_devices(void)
         platform_device_register(&ep93xx_wdt_device);
 
         gpio_led_register_device(-1, &ep93xx_led_data);
+
+        return parent;
 }
 
 void ep93xx_restart(enum reboot_mode mode, const char *cmd)
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index e256e0baec2e..4c0bbd97f741 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -6,6 +6,7 @@
 
 #include <linux/reboot.h>
 
+struct device;
 struct i2c_gpio_platform_data;
 struct i2c_board_info;
 struct spi_board_info;
@@ -54,7 +55,7 @@ void ep93xx_register_ide(void);
 int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
 void ep93xx_ide_release_gpio(struct platform_device *pdev);
 
-void ep93xx_init_devices(void);
+struct device *ep93xx_init_devices(void);
 extern void ep93xx_timer_init(void);
 
 void ep93xx_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b3d7e5634b83..bd3bf66ce344 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -17,12 +17,15 @@
 #include <linux/clkdev.h>
 #include <linux/clocksource.h>
 #include <linux/dma-mapping.h>
+#include <linux/input.h>
 #include <linux/io.h>
 #include <linux/irqchip.h>
+#include <linux/mailbox.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of_address.h>
+#include <linux/reboot.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
 
@@ -130,6 +133,24 @@ static struct platform_device highbank_cpuidle_device = {
         .name = "cpuidle-calxeda",
 };
 
+static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
+{
+        u32 key = *(u32 *)data;
+
+        if (event != 0x1000)
+                return 0;
+
+        if (key == KEY_POWER)
+                orderly_poweroff(false);
+        else if (key == 0xffff)
+                ctrl_alt_del();
+
+        return 0;
+}
+static struct notifier_block hb_keys_nb = {
+        .notifier_call = hb_keys_notifier,
+};
+
 static void __init highbank_init(void)
 {
         struct device_node *np;
@@ -145,6 +166,8 @@ static void __init highbank_init(void)
         bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
         bus_register_notifier(&amba_bustype, &highbank_amba_nb);
 
+        pl320_ipc_register_notifier(&hb_keys_nb);
+
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 
         if (psci_ops.cpu_suspend)
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index 9b6638aadeaa..1a3a5f615770 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -111,7 +111,7 @@ static void gpt_irq_acknowledge(void)
 
 static void __iomem *sched_clock_reg;
 
-static u32 notrace mxc_read_sched_clock(void)
+static u64 notrace mxc_read_sched_clock(void)
 {
         return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
 }
@@ -123,7 +123,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
 
         sched_clock_reg = reg;
 
-        setup_sched_clock(mxc_read_sched_clock, 32, c);
+        sched_clock_register(mxc_read_sched_clock, 32, c);
         return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
                         clocksource_mmio_readl_up);
 }
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index d50dc2dbfd89..473e21b87364 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -277,7 +277,7 @@ struct amba_pl010_data ap_uart_data = {
 
 static unsigned long timer_reload;
 
-static u32 notrace integrator_read_sched_clock(void)
+static u64 notrace integrator_read_sched_clock(void)
 {
         return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
 }
@@ -298,7 +298,7 @@ static void integrator_clocksource_init(unsigned long inrate,
 
         clocksource_mmio_init(base + TIMER_VALUE, "timer2",
                         rate, 200, 16, clocksource_mmio_readl_down);
-        setup_sched_clock(integrator_read_sched_clock, 16, rate);
+        sched_clock_register(integrator_read_sched_clock, 16, rate);
 }
 
 static void __iomem * clkevt_base;
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 9edaf4734fa8..bc9d8ec2918e 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -475,7 +475,7 @@ void __init ixp4xx_sys_init(void)
 /*
  * sched_clock()
  */
-static u32 notrace ixp4xx_read_sched_clock(void)
+static u64 notrace ixp4xx_read_sched_clock(void)
 {
         return *IXP4XX_OSTS;
 }
@@ -493,7 +493,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
 EXPORT_SYMBOL(ixp4xx_timer_freq);
 static void __init ixp4xx_clocksource_init(void)
 {
-        setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
+        sched_clock_register(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
 
         clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
                         ixp4xx_clocksource_read);
diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig
index f20c53e75ed9..dabc5eee52e7 100644
--- a/arch/arm/mach-keystone/Kconfig
+++ b/arch/arm/mach-keystone/Kconfig
@@ -11,6 +11,8 @@ config ARCH_KEYSTONE
         select ARM_ERRATA_798181 if SMP
         select COMMON_CLK_KEYSTONE
         select TI_EDMA
+        select ARCH_SUPPORTS_BIG_ENDIAN
+        select ZONE_DMA if ARM_LPAE
         help
           Support for boards based on the Texas Instruments Keystone family of
           SoCs.
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index b661c5c2870a..6e6bb7d5ea30 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -41,6 +41,7 @@ static void __init keystone_init(void)
         if (WARN_ON(!keystone_rstctrl))
                 pr_warn("ti,keystone-reset iomap error\n");
 
+        keystone_pm_runtime_init();
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
 
@@ -68,6 +69,9 @@ void keystone_restart(enum reboot_mode mode, const char *cmd)
 }
 
 DT_MACHINE_START(KEYSTONE, "Keystone")
+#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
+        .dma_zone_size  = SZ_2G,
+#endif
         .smp            = smp_ops(keystone_smp_ops),
         .init_machine   = keystone_init,
         .dt_compat      = keystone_match,
diff --git a/arch/arm/mach-keystone/keystone.h b/arch/arm/mach-keystone/keystone.h
index 60bef9dedb12..cd04a1c14de8 100644
--- a/arch/arm/mach-keystone/keystone.h
+++ b/arch/arm/mach-keystone/keystone.h
@@ -18,6 +18,7 @@
 extern struct smp_operations keystone_smp_ops;
 extern void secondary_startup(void);
 extern u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr);
+extern int keystone_pm_runtime_init(void);
 
 #endif /* __ASSEMBLER__ */
 #endif /* __KEYSTONE_H__ */
diff --git a/arch/arm/mach-keystone/pm_domain.c b/arch/arm/mach-keystone/pm_domain.c
index 29625232e954..ca79ddac38bc 100644
--- a/arch/arm/mach-keystone/pm_domain.c
+++ b/arch/arm/mach-keystone/pm_domain.c
@@ -74,9 +74,7 @@ int __init keystone_pm_runtime_init(void)
         if (!np)
                 return 0;
 
-        of_clk_init(NULL);
         pm_clk_add_notifier(&platform_bus_type, &platform_domain_notifier);
 
         return 0;
 }
-subsys_initcall(keystone_pm_runtime_init);
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 7ac41e83cfef..024022d91fe3 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -61,7 +61,7 @@ static inline uint32_t timer_read(void)
         return __raw_readl(mmp_timer_base + TMR_CVWR(1));
 }
 
-static u32 notrace mmp_read_sched_clock(void)
+static u64 notrace mmp_read_sched_clock(void)
 {
         return timer_read();
 }
@@ -195,7 +195,7 @@ void __init timer_init(int irq)
 {
         timer_config();
 
-        setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
+        sched_clock_register(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
 
         ckevt.cpumask = cpumask_of(0);
 
diff --git a/arch/arm/mach-moxart/Kconfig b/arch/arm/mach-moxart/Kconfig
new file mode 100644
index 000000000000..ba470d64493b
--- /dev/null
+++ b/arch/arm/mach-moxart/Kconfig
@@ -0,0 +1,31 @@
+config ARCH_MOXART
+        bool "MOXA ART SoC" if ARCH_MULTI_V4T
+        select CPU_FA526
+        select ARM_DMA_MEM_BUFFERABLE
+        select DMA_OF
+        select USE_OF
+        select CLKSRC_OF
+        select CLKSRC_MMIO
+        select HAVE_CLK
+        select COMMON_CLK
+        select GENERIC_IRQ_CHIP
+        select ARCH_REQUIRE_GPIOLIB
+        select GENERIC_CLOCKEVENTS
+        select PHYLIB if NETDEVICES
+        help
+          Say Y here if you want to run your kernel on hardware with a
+          MOXA ART SoC.
+          The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit
+          192 MHz CPU with MMU and 16KB/8KB D/I-cache (UC-7112-LX).
+          Used on models UC-7101, UC-7112/UC-7110, IA240/IA241, IA3341.
+
+if ARCH_MOXART
+
+config MACH_UC7112LX
+        bool "MOXA UC-7112-LX"
+        depends on ARCH_MOXART
+        help
+          Say Y here if you intend to run this kernel on a MOXA
+          UC-7112-LX embedded computer.
+
+endif
diff --git a/arch/arm/mach-moxart/Makefile b/arch/arm/mach-moxart/Makefile
new file mode 100644
index 000000000000..fa022eb10ca1
--- /dev/null
+++ b/arch/arm/mach-moxart/Makefile
@@ -0,0 +1,3 @@
+# Object file lists.
+
+obj-$(CONFIG_MACH_UC7112LX)     += moxart.o
diff --git a/arch/arm/mach-moxart/moxart.c b/arch/arm/mach-moxart/moxart.c
new file mode 100644
index 000000000000..86b6d9b57c54
--- /dev/null
+++ b/arch/arm/mach-moxart/moxart.c
@@ -0,0 +1,15 @@
+/*
+ * arch/arm/mach-moxart/moxart.c
+ *
+ * (C) Copyright 2013, Jonas Jensen <jonas.jensen@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 2586c2865874..702553b96137 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -44,6 +44,7 @@ endchoice
 
 config ARCH_MSM8X60
         bool "MSM8X60"
+        select ARCH_MSM_DT
         select ARM_GIC
         select CPU_V7
         select GPIO_MSM_V2
@@ -52,15 +53,25 @@ config ARCH_MSM8X60
 
 config ARCH_MSM8960
         bool "MSM8960"
+        select ARCH_MSM_DT
         select ARM_GIC
         select CPU_V7
         select HAVE_SMP
         select GPIO_MSM_V2
         select MSM_SCM if SMP
 
+config ARCH_MSM8974
+        bool "MSM8974"
+        select ARCH_MSM_DT
+        select ARM_GIC
+        select CPU_V7
+        select HAVE_ARM_ARCH_TIMER
+        select HAVE_SMP
+        select MSM_SCM if SMP
+        select USE_OF
+
 config ARCH_MSM_DT
-        def_bool y
-        depends on (ARCH_MSM8X60 || ARCH_MSM8960)
+        bool
         select SPARSE_IRQ
         select USE_OF
 
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index ccf6621bc664..015d544aa017 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  *
  */
+#define pr_fmt(fmt) "%s: " fmt, __func__
 
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -68,12 +69,11 @@ static void __init trout_init(void)
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
-#ifdef CONFIG_MMC
-        rc = trout_init_mmc(system_rev);
-        if (rc)
-                printk(KERN_CRIT "%s: MMC init failure (%d)\n", __func__, rc);
-#endif
-
+        if (IS_ENABLED(CONFIG_MMC)) {
+                rc = trout_init_mmc(system_rev);
+                if (rc)
+                        pr_crit("MMC init failure (%d)\n", rc);
+        }
 }
 
 static struct map_desc trout_io_desc[] __initdata = {
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 1e9c3383daba..fd1644987534 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -187,7 +187,7 @@ static struct notifier_block msm_timer_cpu_nb = {
         .notifier_call = msm_timer_cpu_notify,
 };
 
-static notrace u32 msm_sched_clock_read(void)
+static u64 notrace msm_sched_clock_read(void)
 {
         return msm_clocksource.read(&msm_clocksource);
 }
@@ -229,7 +229,7 @@ err:
         res = clocksource_register_hz(cs, dgt_hz);
         if (res)
                 pr_err("clocksource_register failed\n");
-        setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
+        sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
 }
 
 #ifdef CONFIG_OF
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 6b5f298d6638..a7588cfd0286 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -181,7 +181,7 @@ static __init void omap_init_mpu_timer(unsigned long rate)
  * ---------------------------------------------------------------------------
  */
 
-static u32 notrace omap_mpu_read_sched_clock(void)
+static u64 notrace omap_mpu_read_sched_clock(void)
 {
         return ~omap_mpu_timer_read(1);
 }
@@ -193,7 +193,7 @@ static void __init omap_init_clocksource(unsigned long rate)
                         "%s: can't register clocksource!\n";
 
         omap_mpu_timer_start(1, ~0, 1);
-        setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
+        sched_clock_register(omap_mpu_read_sched_clock, 32, rate);
 
         if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
                         300, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 19f1652e94cf..8d972ff18c56 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -131,6 +131,24 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
         .dt_compat      = omap3_gp_boards_compat,
         .restart        = omap3xxx_restart,
 MACHINE_END
+
+static const char *am3517_boards_compat[] __initdata = {
+        "ti,am3517",
+        NULL,
+};
+
+DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
+        .reserve        = omap_reserve,
+        .map_io         = omap3_map_io,
+        .init_early     = am35xx_init_early,
+        .init_irq       = omap_intc_of_init,
+        .handle_irq     = omap3_intc_handle_irq,
+        .init_machine   = omap_generic_init,
+        .init_late      = omap3_init_late,
+        .init_time      = omap3_gptimer_timer_init,
+        .dt_compat      = am3517_boards_compat,
+        .restart        = omap3xxx_restart,
+MACHINE_END
 #endif
 
 #ifdef CONFIG_SOC_AM33XX
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 53f0735817bb..e0a398cf28d8 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -183,6 +183,10 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
 odbfd_exit1:
         kfree(hwmods);
 odbfd_exit:
+        /* if data/we are at fault.. load up a fail handler */
+        if (ret)
+                pdev->dev.pm_domain = &omap_device_fail_pm_domain;
+
         return ret;
 }
 
@@ -604,6 +608,19 @@ static int _od_runtime_resume(struct device *dev)
 
         return pm_generic_runtime_resume(dev);
 }
+
+static int _od_fail_runtime_suspend(struct device *dev)
+{
+        dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
+        return -ENODEV;
+}
+
+static int _od_fail_runtime_resume(struct device *dev)
+{
+        dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
+        return -ENODEV;
+}
+
 #endif
 
 #ifdef CONFIG_SUSPEND
@@ -657,6 +674,13 @@ static int _od_resume_noirq(struct device *dev)
 #define _od_resume_noirq NULL
 #endif
 
+struct dev_pm_domain omap_device_fail_pm_domain = {
+        .ops = {
+                SET_RUNTIME_PM_OPS(_od_fail_runtime_suspend,
+                                   _od_fail_runtime_resume, NULL)
+        }
+};
+
 struct dev_pm_domain omap_device_pm_domain = {
         .ops = {
                 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,
diff --git a/arch/arm/mach-omap2/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 17ca1aec2710..78c02b355179 100644
--- a/arch/arm/mach-omap2/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -29,6 +29,7 @@
 #include "omap_hwmod.h"
 
 extern struct dev_pm_domain omap_device_pm_domain;
+extern struct dev_pm_domain omap_device_fail_pm_domain;
 
 /* omap_device._state values */
 #define OMAP_DEVICE_STATE_UNKNOWN       0
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e3f0ecaf87dd..8a1b5e0bad40 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -399,7 +399,7 @@ static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
 }
 
 /**
- * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
+ * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
  * @oh: struct omap_hwmod *
  * @v: pointer to register contents to modify
  *
@@ -427,6 +427,36 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
 }
 
 /**
+ * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
+ * @oh: struct omap_hwmod *
+ * @v: pointer to register contents to modify
+ *
+ * Clear the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
+ * error or 0 upon success.
+ */
+static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
+{
+        u32 softrst_mask;
+
+        if (!oh->class->sysc ||
+            !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
+                return -EINVAL;
+
+        if (!oh->class->sysc->sysc_fields) {
+                WARN(1,
+                     "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
+                     oh->name);
+                return -EINVAL;
+        }
+
+        softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
+
+        *v &= ~softrst_mask;
+
+        return 0;
+}
+
+/**
  * _wait_softreset_complete - wait for an OCP softreset to complete
  * @oh: struct omap_hwmod * to wait on
  *
@@ -785,6 +815,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
                         pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
                                    oh->name, os->clk);
                         ret = -EINVAL;
+                        continue;
                 }
                 os->_clk = c;
                 /*
@@ -821,6 +852,7 @@ static int _init_opt_clks(struct omap_hwmod *oh)
                         pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
                                    oh->name, oc->clk);
                         ret = -EINVAL;
+                        continue;
                 }
                 oc->_clk = c;
                 /*
@@ -1911,6 +1943,12 @@ static int _ocp_softreset(struct omap_hwmod *oh)
         ret = _set_softreset(oh, &v);
         if (ret)
                 goto dis_opt_clks;
+
+        _write_sysconfig(v, oh);
+        ret = _clear_softreset(oh, &v);
+        if (ret)
+                goto dis_opt_clks;
+
         _write_sysconfig(v, oh);
 
         if (oh->class->sysc->srst_udelay)
@@ -2326,38 +2364,80 @@ static int _shutdown(struct omap_hwmod *oh)
         return 0;
 }
 
+static int of_dev_find_hwmod(struct device_node *np,
+                             struct omap_hwmod *oh)
+{
+        int count, i, res;
+        const char *p;
+
+        count = of_property_count_strings(np, "ti,hwmods");
+        if (count < 1)
+                return -ENODEV;
+
+        for (i = 0; i < count; i++) {
+                res = of_property_read_string_index(np, "ti,hwmods",
+                                                    i, &p);
+                if (res)
+                        continue;
+                if (!strcmp(p, oh->name)) {
+                        pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
+                                 np->name, i, oh->name);
+                        return i;
+                }
+        }
+
+        return -ENODEV;
+}
+
 /**
  * of_dev_hwmod_lookup - look up needed hwmod from dt blob
  * @np: struct device_node *
  * @oh: struct omap_hwmod *
+ * @index: index of the entry found
+ * @found: struct device_node * found or NULL
  *
  * Parse the dt blob and find out needed hwmod. Recursive function is
  * implemented to take care hierarchical dt blob parsing.
- * Return: The device node on success or NULL on failure.
+ * Return: Returns 0 on success, -ENODEV when not found.
  */
-static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
-                                                struct omap_hwmod *oh)
+static int of_dev_hwmod_lookup(struct device_node *np,
+                               struct omap_hwmod *oh,
+                               int *index,
+                               struct device_node **found)
 {
-        struct device_node *np0 = NULL, *np1 = NULL;
-        const char *p;
+        struct device_node *np0 = NULL;
+        int res;
+
+        res = of_dev_find_hwmod(np, oh);
+        if (res >= 0) {
+                *found = np;
+                *index = res;
+                return 0;
+        }
 
         for_each_child_of_node(np, np0) {
-                if (of_find_property(np0, "ti,hwmods", NULL)) {
-                        p = of_get_property(np0, "ti,hwmods", NULL);
-                        if (!strcmp(p, oh->name))
-                                return np0;
-                        np1 = of_dev_hwmod_lookup(np0, oh);
-                        if (np1)
-                                return np1;
+                struct device_node *fc;
+                int i;
+
+                res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
+                if (res == 0) {
+                        *found = fc;
+                        *index = i;
+                        return 0;
                 }
         }
-        return NULL;
+
+        *found = NULL;
+        *index = 0;
+
+        return -ENODEV;
 }
 
 /**
  * _init_mpu_rt_base - populate the virtual address for a hwmod
  * @oh: struct omap_hwmod * to locate the virtual address
  * @data: (unused, caller should pass NULL)
+ * @index: index of the reg entry iospace in device tree
  * @np: struct device_node * of the IP block's device node in the DT data
  *
  * Cache the virtual address used by the MPU to access this IP block's
@@ -2368,7 +2448,7 @@ static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
  * -ENXIO on absent or invalid register target address space.
  */
 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
-                                    struct device_node *np)
+                                    int index, struct device_node *np)
 {
         struct omap_hwmod_addr_space *mem;
         void __iomem *va_start = NULL;
@@ -2390,13 +2470,17 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
                 if (!np)
                         return -ENXIO;
 
-                va_start = of_iomap(np, oh->mpu_rt_idx);
+                va_start = of_iomap(np, index + oh->mpu_rt_idx);
         } else {
                 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
         }
 
         if (!va_start) {
-                pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
+                if (mem)
+                        pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
+                else
+                        pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
+                               oh->name, index, np->full_name);
                 return -ENXIO;
         }
 
@@ -2422,17 +2506,29 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
  */
 static int __init _init(struct omap_hwmod *oh, void *data)
 {
-        int r;
+        int r, index;
         struct device_node *np = NULL;
 
         if (oh->_state != _HWMOD_STATE_REGISTERED)
                 return 0;
 
-        if (of_have_populated_dt())
-                np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh);
+        if (of_have_populated_dt()) {
+                struct device_node *bus;
+
+                bus = of_find_node_by_name(NULL, "ocp");
+                if (!bus)
+                        return -ENODEV;
+
+                r = of_dev_hwmod_lookup(bus, oh, &index, &np);
+                if (r)
+                        pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
+                else if (np && index)
+                        pr_warn("omap_hwmod: %s using broken dt data from %s\n",
+                                oh->name, np->name);
+        }
 
         if (oh->class->sysc) {
-                r = _init_mpu_rt_base(oh, NULL, np);
+                r = _init_mpu_rt_base(oh, NULL, index, np);
                 if (r < 0) {
                         WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
                              oh->name);
@@ -3169,6 +3265,11 @@ int omap_hwmod_softreset(struct omap_hwmod *oh)
                 goto error;
         _write_sysconfig(v, oh);
 
+        ret = _clear_softreset(oh, &v);
+        if (ret)
+                goto error;
+        _write_sysconfig(v, oh);
+
 error:
         return ret;
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 9e56fabd7fa3..d33742908f97 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1943,7 +1943,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
         .syss_offs      = 0x0014,
         .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
                            SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                            MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
         .sysc_fields    = &omap_hwmod_sysc_type1,
@@ -2021,15 +2022,7 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
          * hence HWMOD_SWSUP_MSTANDBY
          */
 
-        /*
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 1e5b12cb8246..3318cae96e7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2937,7 +2937,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
         .sysc_offs      = 0x0010,
         .syss_offs      = 0x0014,
         .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_SOFTRESET),
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                            SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
                            MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -3001,15 +3001,7 @@ static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
          * hence HWMOD_SWSUP_MSTANDBY
          */
 
-        /*
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 9e08d6994a0b..e297d6231c3a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1544,7 +1544,8 @@ static struct omap_hwmod_class_sysconfig omap54xx_usb_host_hs_sysc = {
         .rev_offs       = 0x0000,
         .sysc_offs      = 0x0010,
         .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
-                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                            SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
                            MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -1598,15 +1599,7 @@ static struct omap_hwmod omap54xx_usb_host_hs_hwmod = {
          * hence HWMOD_SWSUP_MSTANDBY
          */
 
-        /*
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
         .main_clk       = "l3init_60m_fclk",
         .prcm = {
                 .omap4 = {
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 3ca81e0ada5e..ec084d158f64 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -379,7 +379,7 @@ static struct clocksource clocksource_gpt = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static u32 notrace dmtimer_read_sched_clock(void)
+static u64 notrace dmtimer_read_sched_clock(void)
 {
         if (clksrc.reserved)
                 return __omap_dm_timer_read_counter(&clksrc,
@@ -471,7 +471,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
         __omap_dm_timer_load_start(&clksrc,
                                    OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
                                    OMAP_TIMER_NONPOSTED);
-        setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
+        sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate);
 
         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
                 pr_err("Could not register clocksource %s\n",
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 0d5dd646f61f..263b15249b5b 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -13,6 +13,7 @@
 
 #include <mach/regs-ost.h>
 #include <mach/reset.h>
+#include <mach/smemc.h>
 
 unsigned int reset_status;
 EXPORT_SYMBOL(reset_status);
@@ -81,6 +82,12 @@ static void do_hw_reset(void)
         writel_relaxed(OSSR_M3, OSSR);
         /* ... in 100 ms */
         writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
+        /*
+         * SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
+         * we put SDRAM into self-refresh to prevent that
+         */
+        while (1)
+                writel_relaxed(MDREFR_SLFRSH, MDREFR);
 }
 
 void pxa_restart(enum reboot_mode mode, const char *cmd)
@@ -104,4 +111,3 @@ void pxa_restart(enum reboot_mode mode, const char *cmd)
                 break;
         }
 }
-
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 9aa852a8fab9..d1bfaa73b1c9 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -33,7 +33,7 @@
  * calls to sched_clock() which should always be the case in practice.
  */
 
-static u32 notrace pxa_read_sched_clock(void)
+static u64 notrace pxa_read_sched_clock(void)
 {
         return readl_relaxed(OSCR);
 }
@@ -149,7 +149,7 @@ void __init pxa_timer_init(void)
         writel_relaxed(0, OIER);
         writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
 
-        setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
+        sched_clock_register(pxa_read_sched_clock, 32, clock_tick_rate);
 
         ckevt_pxa_osmr0.cpumask = cpumask_of(0);
 
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0206b915a6f6..ef5557b807ed 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -425,57 +425,57 @@ static struct platform_device tosa_power_device = {
  * Tosa Keyboard
  */
 static const uint32_t tosakbd_keymap[] = {
-        KEY(0, 2, KEY_W),
-        KEY(0, 6, KEY_K),
-        KEY(0, 7, KEY_BACKSPACE),
-        KEY(0, 8, KEY_P),
-        KEY(1, 1, KEY_Q),
-        KEY(1, 2, KEY_E),
-        KEY(1, 3, KEY_T),
-        KEY(1, 4, KEY_Y),
-        KEY(1, 6, KEY_O),
-        KEY(1, 7, KEY_I),
-        KEY(1, 8, KEY_COMMA),
-        KEY(2, 1, KEY_A),
-        KEY(2, 2, KEY_D),
-        KEY(2, 3, KEY_G),
-        KEY(2, 4, KEY_U),
-        KEY(2, 6, KEY_L),
-        KEY(2, 7, KEY_ENTER),
-        KEY(2, 8, KEY_DOT),
-        KEY(3, 1, KEY_Z),
-        KEY(3, 2, KEY_C),
-        KEY(3, 3, KEY_V),
-        KEY(3, 4, KEY_J),
-        KEY(3, 5, TOSA_KEY_ADDRESSBOOK),
-        KEY(3, 6, TOSA_KEY_CANCEL),
-        KEY(3, 7, TOSA_KEY_CENTER),
-        KEY(3, 8, TOSA_KEY_OK),
-        KEY(3, 9, KEY_LEFTSHIFT),
-        KEY(4, 1, KEY_S),
-        KEY(4, 2, KEY_R),
-        KEY(4, 3, KEY_B),
-        KEY(4, 4, KEY_N),
-        KEY(4, 5, TOSA_KEY_CALENDAR),
-        KEY(4, 6, TOSA_KEY_HOMEPAGE),
-        KEY(4, 7, KEY_LEFTCTRL),
-        KEY(4, 8, TOSA_KEY_LIGHT),
-        KEY(4, 10, KEY_RIGHTSHIFT),
-        KEY(5, 1, KEY_TAB),
-        KEY(5, 2, KEY_SLASH),
-        KEY(5, 3, KEY_H),
-        KEY(5, 4, KEY_M),
-        KEY(5, 5, TOSA_KEY_MENU),
-        KEY(5, 7, KEY_UP),
-        KEY(5, 11, TOSA_KEY_FN),
-        KEY(6, 1, KEY_X),
-        KEY(6, 2, KEY_F),
-        KEY(6, 3, KEY_SPACE),
-        KEY(6, 4, KEY_APOSTROPHE),
-        KEY(6, 5, TOSA_KEY_MAIL),
-        KEY(6, 6, KEY_LEFT),
-        KEY(6, 7, KEY_DOWN),
-        KEY(6, 8, KEY_RIGHT),
+        KEY(0, 1, KEY_W),
+        KEY(0, 5, KEY_K),
+        KEY(0, 6, KEY_BACKSPACE),
+        KEY(0, 7, KEY_P),
+        KEY(1, 0, KEY_Q),
+        KEY(1, 1, KEY_E),
+        KEY(1, 2, KEY_T),
+        KEY(1, 3, KEY_Y),
+        KEY(1, 5, KEY_O),
+        KEY(1, 6, KEY_I),
+        KEY(1, 7, KEY_COMMA),
+        KEY(2, 0, KEY_A),
+        KEY(2, 1, KEY_D),
+        KEY(2, 2, KEY_G),
+        KEY(2, 3, KEY_U),
+        KEY(2, 5, KEY_L),
+        KEY(2, 6, KEY_ENTER),
+        KEY(2, 7, KEY_DOT),
+        KEY(3, 0, KEY_Z),
+        KEY(3, 1, KEY_C),
+        KEY(3, 2, KEY_V),
+        KEY(3, 3, KEY_J),
+        KEY(3, 4, TOSA_KEY_ADDRESSBOOK),
+        KEY(3, 5, TOSA_KEY_CANCEL),
+        KEY(3, 6, TOSA_KEY_CENTER),
+        KEY(3, 7, TOSA_KEY_OK),
+        KEY(3, 8, KEY_LEFTSHIFT),
+        KEY(4, 0, KEY_S),
+        KEY(4, 1, KEY_R),
+        KEY(4, 2, KEY_B),
+        KEY(4, 3, KEY_N),
+        KEY(4, 4, TOSA_KEY_CALENDAR),
+        KEY(4, 5, TOSA_KEY_HOMEPAGE),
+        KEY(4, 6, KEY_LEFTCTRL),
+        KEY(4, 7, TOSA_KEY_LIGHT),
+        KEY(4, 9, KEY_RIGHTSHIFT),
+        KEY(5, 0, KEY_TAB),
+        KEY(5, 1, KEY_SLASH),
+        KEY(5, 2, KEY_H),
+        KEY(5, 3, KEY_M),
+        KEY(5, 4, TOSA_KEY_MENU),
+        KEY(5, 6, KEY_UP),
+        KEY(5, 10, TOSA_KEY_FN),
+        KEY(6, 0, KEY_X),
+        KEY(6, 1, KEY_F),
+        KEY(6, 2, KEY_SPACE),
+        KEY(6, 3, KEY_APOSTROPHE),
+        KEY(6, 4, TOSA_KEY_MAIL),
+        KEY(6, 5, KEY_LEFT),
+        KEY(6, 6, KEY_DOWN),
+        KEY(6, 7, KEY_RIGHT),
 };
 
 static struct matrix_keymap_data tosakbd_keymap_data = {
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 713c86cd3d64..6fd4acb8f187 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -20,7 +20,7 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 
-static u32 notrace sa1100_read_sched_clock(void)
+static u64 notrace sa1100_read_sched_clock(void)
 {
         return readl_relaxed(OSCR);
 }
@@ -122,7 +122,7 @@ void __init sa1100_timer_init(void)
         writel_relaxed(0, OIER);
         writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
 
-        setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
+        sched_clock_register(sa1100_read_sched_clock, 32, 3686400);
 
         ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
 
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index a4a4b75109b2..8c8889211f6d 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -1,6 +1,10 @@
+config ARCH_SHMOBILE
+        bool
+
 config ARCH_SHMOBILE_MULTI
         bool "SH-Mobile Series" if ARCH_MULTI_V7
         depends on MMU
+        select ARCH_SHMOBILE
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select HAVE_ARM_SCU if SMP
@@ -8,6 +12,7 @@ config ARCH_SHMOBILE_MULTI
         select HAVE_SMP
         select ARM_GIC
         select MIGHT_HAVE_CACHE_L2X0
+        select MIGHT_HAVE_PCI
         select NO_IOPORT
         select PINCTRL
         select ARCH_REQUIRE_GPIOLIB
@@ -30,7 +35,7 @@ config MACH_KZM9D
 comment "SH-Mobile System Configuration"
 endif
 
-if ARCH_SHMOBILE
+if ARCH_SHMOBILE_LEGACY
 
 comment "SH-Mobile System Type"
 
@@ -92,23 +97,31 @@ config ARCH_R8A7790
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARM_GIC
         select CPU_V7
+        select MIGHT_HAVE_PCI
         select SH_CLK_CPG
         select RENESAS_IRQC
 
 config ARCH_R8A7791
         bool "R-Car M2 (R8A77910)"
+        select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARM_GIC
         select CPU_V7
+        select MIGHT_HAVE_PCI
         select SH_CLK_CPG
+        select RENESAS_IRQC
 
 config ARCH_EMEV2
         bool "Emma Mobile EV2"
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARM_GIC
         select CPU_V7
+        select MIGHT_HAVE_PCI
+        select USE_OF
+        select AUTO_ZRELADDR
 
 config ARCH_R7S72100
         bool "RZ/A1H (R7S72100)"
+        select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARM_GIC
         select CPU_V7
         select SH_CLK_CPG
@@ -230,12 +243,7 @@ config MACH_KOELSCH
         bool "Koelsch board"
         depends on ARCH_R8A7791
         select USE_OF
-
-config MACH_KZM9D
-        bool "KZM9D board"
-        depends on ARCH_EMEV2
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
-        select USE_OF
+        select MICREL_PHY if SH_ETH
 
 config MACH_KZM9G
         bool "KZM-A9-GT board"
@@ -274,7 +282,7 @@ source "drivers/sh/Kconfig"
 
 endif
 
-if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
+if ARCH_SHMOBILE
 
 menu "Timer and clock configuration"
 
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 51db2bcafabf..c7e877499dc2 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE)	+= board-lager-reference.o
 obj-$(CONFIG_MACH_ARMADILLO800EVA)      += board-armadillo800eva.o
 obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)    += board-armadillo800eva-reference.o
 obj-$(CONFIG_MACH_KOELSCH)      += board-koelsch.o
-obj-$(CONFIG_MACH_KZM9D)        += board-kzm9d.o
 obj-$(CONFIG_MACH_KZM9G)        += board-kzm9g.o
 obj-$(CONFIG_MACH_KZM9G_REFERENCE)      += board-kzm9g-reference.o
 endif
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 391d72a5536c..4f30e3dc0919 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -8,7 +8,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
 loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
 loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
-loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
 loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
 loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
 loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index 38611526fe9a..44b55ef8857e 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -25,6 +25,7 @@
 #include <linux/mmc/sh_mmcif.h>
 #include <linux/mtd/partitions.h>
 #include <linux/pinctrl/machine.h>
+#include <linux/platform_data/camera-rcar.h>
 #include <linux/platform_data/usb-rcar-phy.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/fixed.h>
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
deleted file mode 100644
index 30c2cc695b12..000000000000
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * kzm9d board support
- *
- * Copyright (C) 2012  Renesas Solutions Corp.
- * Copyright (C) 2012  Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-#include <linux/smsc911x.h>
-#include <mach/common.h>
-#include <mach/emev2.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
-/* Ether */
-static struct resource smsc911x_resources[] = {
-        [0] = {
-                .start  = 0x20000000,
-                .end    = 0x2000ffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = EMEV2_GPIO_IRQ(1),
-                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
-        },
-};
-
-static struct smsc911x_platform_config smsc911x_platdata = {
-        .flags          = SMSC911X_USE_32BIT,
-        .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
-        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
-};
-
-static struct platform_device smsc91x_device = {
-        .name   = "smsc911x",
-        .id     = -1,
-        .dev    = {
-                  .platform_data = &smsc911x_platdata,
-                },
-        .num_resources  = ARRAY_SIZE(smsc911x_resources),
-        .resource       = smsc911x_resources,
-};
-
-static struct platform_device *kzm9d_devices[] __initdata = {
-        &smsc91x_device,
-};
-
-void __init kzm9d_add_standard_devices(void)
-{
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
-        emev2_add_standard_devices();
-
-        platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));
-}
-
-static const char *kzm9d_boards_compat_dt[] __initdata = {
-        "renesas,kzm9d",
-        NULL,
-};
-
-DT_MACHINE_START(KZM9D_DT, "kzm9d")
-        .smp            = smp_ops(emev2_smp_ops),
-        .map_io         = emev2_map_io,
-        .init_early     = emev2_init_delay,
-        .init_machine   = kzm9d_add_standard_devices,
-        .init_late      = shmobile_init_late,
-        .dt_compat      = kzm9d_boards_compat_dt,
-MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index 4aba20ca127e..850a8a371b43 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -27,6 +27,7 @@
 #define FRQCR2          0xfcfe0014
 #define STBCR3          0xfcfe0420
 #define STBCR4          0xfcfe0424
+#define STBCR9          0xfcfe0438
 
 #define PLL_RATE 30
 
@@ -144,10 +145,15 @@ struct clk div4_clks[DIV4_NR] = {
                                         | CLK_ENABLE_ON_INIT),
 };
 
-enum { MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
+enum {  MSTP97, MSTP96, MSTP95, MSTP94,
+        MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
         MSTP33, MSTP_NR };
 
 static struct clk mstp_clks[MSTP_NR] = {
+        [MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
+        [MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
+        [MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
+        [MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */
         [MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
         [MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
         [MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index c826bca4024e..e9a3c6401845 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -585,6 +585,7 @@ static struct clk_lookup lookups[] = {
 
         CLKDEV_DEV_ID("sh_cmt.10",              &mstp_clks[MSTP329]),
         CLKDEV_DEV_ID("sh_fsi2",                &mstp_clks[MSTP328]),
+        CLKDEV_DEV_ID("fe1f0000.sound",         &mstp_clks[MSTP328]),
         CLKDEV_DEV_ID("i2c-sh_mobile.1",        &mstp_clks[MSTP323]),
         CLKDEV_DEV_ID("e6c20000.i2c",           &mstp_clks[MSTP323]),
         CLKDEV_DEV_ID("renesas_usbhs",          &mstp_clks[MSTP320]),
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index fb6af83858e3..dfb0fff4d24c 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -115,6 +115,8 @@ static struct clk *main_clks[] = {
 };
 
 enum {
+        MSTP531, MSTP530,
+        MSTP529, MSTP528, MSTP527, MSTP526, MSTP525, MSTP524, MSTP523,
         MSTP331,
         MSTP323, MSTP322, MSTP321,
         MSTP311, MSTP310,
@@ -129,6 +131,15 @@ enum {
         MSTP_NR };
 
 static struct clk mstp_clks[MSTP_NR] = {
+        [MSTP531] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 31, 0), /* SCU0 */
+        [MSTP530] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 30, 0), /* SCU1 */
+        [MSTP529] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 29, 0), /* SCU2 */
+        [MSTP528] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 28, 0), /* SCU3 */
+        [MSTP527] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 27, 0), /* SCU4 */
+        [MSTP526] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 26, 0), /* SCU5 */
+        [MSTP525] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 25, 0), /* SCU6 */
+        [MSTP524] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 24, 0), /* SCU7 */
+        [MSTP523] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 23, 0), /* SCU8 */
         [MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */
         [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
         [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
@@ -173,9 +184,13 @@ static struct clk_lookup lookups[] = {
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
+        CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+        CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+        CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
+        CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
         CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
         CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
         CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
@@ -183,9 +198,13 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
         CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
         CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
+        CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
         CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
+        CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
         CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
+        CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
         CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
+        CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
@@ -195,8 +214,11 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
         CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
         CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
+        CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
         CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+        CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
         CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
+        CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
         CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
 
         CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
@@ -208,6 +230,15 @@ static struct clk_lookup lookups[] = {
         CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
         CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
         CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
+        CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]),
+        CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]),
+        CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]),
+        CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]),
+        CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]),
+        CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]),
+        CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]),
+        CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]),
+        CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]),
 };
 
 void __init r8a7778_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 1f7080fab0a5..b545c8dbb818 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -184,9 +184,13 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
         CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
         CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
+        CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
         CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
+        CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
         CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
+        CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
         CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
+        CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
@@ -194,12 +198,19 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
         CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
+        CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
         CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+        CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
         CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
+        CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+        CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+        CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
+        CLKDEV_DEV_ID("ffe4e000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
+        CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP320]), /* SDHI3 */
         CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
 };
 
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index a64f965c7da1..b6ecea3ec7d5 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -53,6 +53,7 @@
 #define SMSTPCR7 0xe615014c
 #define SMSTPCR8 0xe6150990
 #define SMSTPCR9 0xe6150994
+#define SMSTPCR10 0xe6150998
 
 #define SDCKCR          0xE6150074
 #define SD2CKCR         0xE6150078
@@ -182,10 +183,14 @@ static struct clk div6_clks[DIV6_NR] = {
 
 /* MSTP */
 enum {
+        MSTP1015, MSTP1014, MSTP1013, MSTP1012, MSTP1011, MSTP1010,
+        MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
         MSTP931, MSTP930, MSTP929, MSTP928,
+        MSTP917,
         MSTP813,
         MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
         MSTP717, MSTP716,
+        MSTP704,
         MSTP522,
         MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
         MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
@@ -194,10 +199,22 @@ enum {
 };
 
 static struct clk mstp_clks[MSTP_NR] = {
-        [MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
-        [MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
-        [MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
-        [MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
+        [MSTP1015] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 15, 0), /* SSI0 */
+        [MSTP1014] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 14, 0), /* SSI1 */
+        [MSTP1013] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 13, 0), /* SSI2 */
+        [MSTP1012] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 12, 0), /* SSI3 */
+        [MSTP1011] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 11, 0), /* SSI4 */
+        [MSTP1010] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 10, 0), /* SSI5 */
+        [MSTP1009] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  9, 0), /* SSI6 */
+        [MSTP1008] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  8, 0), /* SSI7 */
+        [MSTP1007] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  7, 0), /* SSI8 */
+        [MSTP1006] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  6, 0), /* SSI9 */
+        [MSTP1005] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  5, 0), /* SSI ALL */
+        [MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
+        [MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
+        [MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
+        [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
+        [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
         [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
         [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
         [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
@@ -208,6 +225,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
         [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
         [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
+        [MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
         [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
         [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
         [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
@@ -262,11 +280,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("ssprs",          &div6_clks[DIV6_SSPRS]),
 
         /* MSTP */
-        CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
-        CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
-        CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
-        CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
-        CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
+        CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP1005]),
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
@@ -278,10 +292,15 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
         CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
         CLKDEV_DEV_ID("e6508000.i2c", &mstp_clks[MSTP931]),
+        CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP931]),
         CLKDEV_DEV_ID("e6518000.i2c", &mstp_clks[MSTP930]),
+        CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP930]),
         CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
+        CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP929]),
         CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
+        CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
         CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+        CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
         CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
         CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
@@ -296,6 +315,27 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
         CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
         CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+        CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+        CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
+
+        /* ICK */
+        CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
+        CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
+        CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
+        CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
+        CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
+        CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
+        CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
+        CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
+        CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
+        CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP1012]),
+        CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP1011]),
+        CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP1010]),
+        CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP1009]),
+        CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP1008]),
+        CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP1007]),
+        CLKDEV_ICK_ID("ssi.9", "rcar_sound", &mstp_clks[MSTP1006]),
+
 };
 
 #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)              \
@@ -321,10 +361,10 @@ void __init r8a7790_clock_init(void)
                 R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
                 break;
         case MD(14):
-                R8A7790_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
+                R8A7790_CLOCK_ROOT(26 / 2, &extal_div2_clk, 200, 240, 122, 102);
                 break;
         case MD(13) | MD(14):
-                R8A7790_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
+                R8A7790_CLOCK_ROOT(30 / 2, &extal_div2_clk, 172, 208, 106, 88);
                 break;
         }
 
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index c9a26f16ce5b..f5461262ee25 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk,			pll1_clk,	1, 12);
 SH_FIXED_RATIO_CLK_SET(p_clk,                   pll1_clk,       1, 24);
 SH_FIXED_RATIO_CLK_SET(rclk_clk,                pll1_clk,       1, (48 * 1024));
 SH_FIXED_RATIO_CLK_SET(mp_clk,                  pll1_div2_clk,  1, 15);
+SH_FIXED_RATIO_CLK_SET(zx_clk,                  pll1_clk,       1, 3);
 
 static struct clk *main_clks[] = {
         &extal_clk,
@@ -116,12 +117,15 @@ static struct clk *main_clks[] = {
         &rclk_clk,
         &mp_clk,
         &cp_clk,
+        &zx_clk,
 };
 
 /* MSTP */
 enum {
-        MSTP721, MSTP720,
+        MSTP813,
+        MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
         MSTP719, MSTP718, MSTP715, MSTP714,
+        MSTP522,
         MSTP216, MSTP207, MSTP206,
         MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
         MSTP124,
@@ -129,12 +133,17 @@ enum {
 };
 
 static struct clk mstp_clks[MSTP_NR] = {
+        [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+        [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
+        [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
+        [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
         [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
         [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
         [MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
         [MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
         [MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
         [MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
+        [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
         [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
         [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
         [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
@@ -164,6 +173,9 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("peripheral_clk", &hp_clk),
 
         /* MSTP */
+        CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7791", &mstp_clks[MSTP726]),
+        CLKDEV_ICK_ID("du.0", "rcar-du-r8a7791", &mstp_clks[MSTP724]),
+        CLKDEV_ICK_ID("du.1", "rcar-du-r8a7791", &mstp_clks[MSTP723]),
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
@@ -180,6 +192,9 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
         CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+        CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
+        CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+        CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */
 };
 
 #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)              \
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index c92c023f0d27..5e6a0566f3c6 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -658,6 +658,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
         CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
         CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
+        CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
         CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
         CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
index c2eb7568d9be..fcb142a14e07 100644
--- a/arch/arm/mach-shmobile/include/mach/emev2.h
+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
@@ -3,12 +3,7 @@
 
 extern void emev2_map_io(void);
 extern void emev2_init_delay(void);
-extern void emev2_add_standard_devices(void);
 extern void emev2_clock_init(void);
-
-#define EMEV2_GPIO_BASE 200
-#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
-
 extern struct smp_operations emev2_smp_ops;
 
 #endif /* __ASM_EMEV2_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
index 441886c9714b..f4076a50e970 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
@@ -20,13 +20,50 @@
 #define __ASM_R8A7778_H__
 
 #include <linux/sh_eth.h>
-#include <linux/platform_data/camera-rcar.h>
 
 /* HPB-DMA slave IDs */
 enum {
         HPBDMA_SLAVE_DUMMY,
         HPBDMA_SLAVE_SDHI0_TX,
         HPBDMA_SLAVE_SDHI0_RX,
+        HPBDMA_SLAVE_SSI0_TX,
+        HPBDMA_SLAVE_SSI0_RX,
+        HPBDMA_SLAVE_SSI1_TX,
+        HPBDMA_SLAVE_SSI1_RX,
+        HPBDMA_SLAVE_SSI2_TX,
+        HPBDMA_SLAVE_SSI2_RX,
+        HPBDMA_SLAVE_SSI3_TX,
+        HPBDMA_SLAVE_SSI3_RX,
+        HPBDMA_SLAVE_SSI4_TX,
+        HPBDMA_SLAVE_SSI4_RX,
+        HPBDMA_SLAVE_SSI5_TX,
+        HPBDMA_SLAVE_SSI5_RX,
+        HPBDMA_SLAVE_SSI6_TX,
+        HPBDMA_SLAVE_SSI6_RX,
+        HPBDMA_SLAVE_SSI7_TX,
+        HPBDMA_SLAVE_SSI7_RX,
+        HPBDMA_SLAVE_SSI8_TX,
+        HPBDMA_SLAVE_SSI8_RX,
+        HPBDMA_SLAVE_HPBIF0_TX,
+        HPBDMA_SLAVE_HPBIF0_RX,
+        HPBDMA_SLAVE_HPBIF1_TX,
+        HPBDMA_SLAVE_HPBIF1_RX,
+        HPBDMA_SLAVE_HPBIF2_TX,
+        HPBDMA_SLAVE_HPBIF2_RX,
+        HPBDMA_SLAVE_HPBIF3_TX,
+        HPBDMA_SLAVE_HPBIF3_RX,
+        HPBDMA_SLAVE_HPBIF4_TX,
+        HPBDMA_SLAVE_HPBIF4_RX,
+        HPBDMA_SLAVE_HPBIF5_TX,
+        HPBDMA_SLAVE_HPBIF5_RX,
+        HPBDMA_SLAVE_HPBIF6_TX,
+        HPBDMA_SLAVE_HPBIF6_RX,
+        HPBDMA_SLAVE_HPBIF7_TX,
+        HPBDMA_SLAVE_HPBIF7_RX,
+        HPBDMA_SLAVE_HPBIF8_TX,
+        HPBDMA_SLAVE_HPBIF8_RX,
+        HPBDMA_SLAVE_USBFUNC_TX,
+        HPBDMA_SLAVE_USBFUNC_RX,
 };
 
 extern void r8a7778_add_standard_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
index 051ead3c286e..200fa699f730 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
@@ -4,6 +4,7 @@
 void r8a7791_add_standard_devices(void);
 void r8a7791_add_dt_devices(void);
 void r8a7791_clock_init(void);
+void r8a7791_pinmux_init(void);
 void r8a7791_init_early(void);
 extern struct smp_operations r8a7791_smp_ops;
 
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index 3ad531caf4f0..c8f2a1a69a52 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -16,24 +16,15 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
+#include <linux/clk-provider.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/gpio-em.h>
 #include <linux/of_platform.h>
-#include <linux/delay.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
 #include <mach/common.h>
 #include <mach/emev2.h>
-#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/time.h>
 
 static struct map_desc emev2_io_desc[] __initdata = {
 #ifdef CONFIG_SMP
@@ -52,150 +43,20 @@ void __init emev2_map_io(void)
         iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
 }
 
-/* UART */
-static struct resource uart0_resources[] = {
-        DEFINE_RES_MEM(0xe1020000, 0x38),
-        DEFINE_RES_IRQ(40),
-};
-
-static struct resource uart1_resources[] = {
-        DEFINE_RES_MEM(0xe1030000, 0x38),
-        DEFINE_RES_IRQ(41),
-};
-
-static struct resource uart2_resources[] = {
-        DEFINE_RES_MEM(0xe1040000, 0x38),
-        DEFINE_RES_IRQ(42),
-};
-
-static struct resource uart3_resources[] = {
-        DEFINE_RES_MEM(0xe1050000, 0x38),
-        DEFINE_RES_IRQ(43),
-};
-
-#define emev2_register_uart(idx)                                        \
-        platform_device_register_simple("serial8250-em", idx,           \
-                                        uart##idx##_resources,          \
-                                        ARRAY_SIZE(uart##idx##_resources))
-
-/* STI */
-static struct resource sti_resources[] = {
-        DEFINE_RES_MEM(0xe0180000, 0x54),
-        DEFINE_RES_IRQ(157),
-};
-
-#define emev2_register_sti()                                    \
-        platform_device_register_simple("em_sti", 0,            \
-                                        sti_resources,          \
-                                        ARRAY_SIZE(sti_resources))
-
-/* GIO */
-static struct gpio_em_config gio0_config = {
-        .gpio_base = 0,
-        .irq_base = EMEV2_GPIO_IRQ(0),
-        .number_of_pins = 32,
-};
-
-static struct resource gio0_resources[] = {
-        DEFINE_RES_MEM(0xe0050000, 0x2c),
-        DEFINE_RES_MEM(0xe0050040, 0x20),
-        DEFINE_RES_IRQ(99),
-        DEFINE_RES_IRQ(100),
-};
-
-static struct gpio_em_config gio1_config = {
-        .gpio_base = 32,
-        .irq_base = EMEV2_GPIO_IRQ(32),
-        .number_of_pins = 32,
-};
-
-static struct resource gio1_resources[] = {
-        DEFINE_RES_MEM(0xe0050080, 0x2c),
-        DEFINE_RES_MEM(0xe00500c0, 0x20),
-        DEFINE_RES_IRQ(101),
-        DEFINE_RES_IRQ(102),
-};
-
-static struct gpio_em_config gio2_config = {
-        .gpio_base = 64,
-        .irq_base = EMEV2_GPIO_IRQ(64),
-        .number_of_pins = 32,
-};
-
-static struct resource gio2_resources[] = {
-        DEFINE_RES_MEM(0xe0050100, 0x2c),
-        DEFINE_RES_MEM(0xe0050140, 0x20),
-        DEFINE_RES_IRQ(103),
-        DEFINE_RES_IRQ(104),
-};
-
-static struct gpio_em_config gio3_config = {
-        .gpio_base = 96,
-        .irq_base = EMEV2_GPIO_IRQ(96),
-        .number_of_pins = 32,
-};
-
-static struct resource gio3_resources[] = {
-        DEFINE_RES_MEM(0xe0050180, 0x2c),
-        DEFINE_RES_MEM(0xe00501c0, 0x20),
-        DEFINE_RES_IRQ(105),
-        DEFINE_RES_IRQ(106),
-};
-
-static struct gpio_em_config gio4_config = {
-        .gpio_base = 128,
-        .irq_base = EMEV2_GPIO_IRQ(128),
-        .number_of_pins = 31,
-};
-
-static struct resource gio4_resources[] = {
-        DEFINE_RES_MEM(0xe0050200, 0x2c),
-        DEFINE_RES_MEM(0xe0050240, 0x20),
-        DEFINE_RES_IRQ(107),
-        DEFINE_RES_IRQ(108),
-};
-
-#define emev2_register_gio(idx)                                         \
-        platform_device_register_resndata(&platform_bus, "em_gio",      \
-                                          idx, gio##idx##_resources,    \
-                                          ARRAY_SIZE(gio##idx##_resources), \
-                                          &gio##idx##_config,           \
-                                          sizeof(struct gpio_em_config))
-
-static struct resource pmu_resources[] = {
-        DEFINE_RES_IRQ(152),
-        DEFINE_RES_IRQ(153),
-};
-
-#define emev2_register_pmu()                                    \
-        platform_device_register_simple("arm-pmu", -1,          \
-                                        pmu_resources,          \
-                                        ARRAY_SIZE(pmu_resources))
-
-void __init emev2_add_standard_devices(void)
-{
-        if (!IS_ENABLED(CONFIG_COMMON_CLK))
-                emev2_clock_init();
-
-        emev2_register_uart(0);
-        emev2_register_uart(1);
-        emev2_register_uart(2);
-        emev2_register_uart(3);
-        emev2_register_sti();
-        emev2_register_gio(0);
-        emev2_register_gio(1);
-        emev2_register_gio(2);
-        emev2_register_gio(3);
-        emev2_register_gio(4);
-        emev2_register_pmu();
-}
-
 void __init emev2_init_delay(void)
 {
         shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
 }
 
-#ifdef CONFIG_USE_OF
+static void __init emev2_add_standard_devices_dt(void)
+{
+#ifdef CONFIG_COMMON_CLK
+        of_clk_init(NULL);
+#else
+        emev2_clock_init();
+#endif
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
 
 static const char *emev2_boards_compat_dt[] __initdata = {
         "renesas,emev2",
@@ -206,7 +67,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
         .smp            = smp_ops(emev2_smp_ops),
         .map_io         = emev2_map_io,
         .init_early     = emev2_init_delay,
+        .init_machine   = emev2_add_standard_devices_dt,
+        .init_late      = shmobile_init_late,
         .dt_compat      = emev2_boards_compat_dt,
 MACHINE_END
-
-#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
index d4eb509a1c87..9c0b3a9d5f7a 100644
--- a/arch/arm/mach-shmobile/setup-r7s72100.c
+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
@@ -22,52 +22,76 @@
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/r7s72100.h>
 #include <asm/mach/arch.h>
 
-#define SCIF_DATA(index, baseaddr, irq)                                 \
-[index] = {                                                             \
+#define R7S72100_SCIF(index, baseaddr, irq)                             \
+static const struct plat_sci_port scif##index##_platform_data = {       \
         .type           = PORT_SCIF,                                    \
         .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,               \
         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,              \
-        .scbrr_algo_id  = SCBRR_ALGO_2,                                 \
         .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
                           SCSCR_REIE,                                   \
-        .mapbase        = baseaddr,                                     \
-        .irqs           = { irq + 1, irq + 2, irq + 3, irq },           \
-}
+};                                                                      \
+                                                                        \
+static struct resource scif##index##_resources[] = {                    \
+        DEFINE_RES_MEM(baseaddr, 0x100),                                \
+        DEFINE_RES_IRQ(irq + 1),                                        \
+        DEFINE_RES_IRQ(irq + 2),                                        \
+        DEFINE_RES_IRQ(irq + 3),                                        \
+        DEFINE_RES_IRQ(irq),                                            \
+}                                                                       \
+
+R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
+R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
+R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
+R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
+R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
+R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
+R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
+R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
 
-enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 };
+#define r7s72100_register_scif(index)                                          \
+        platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+                                          scif##index##_resources,             \
+                                          ARRAY_SIZE(scif##index##_resources), \
+                                          &scif##index##_platform_data,        \
+                                          sizeof(scif##index##_platform_data))
 
-static const struct plat_sci_port scif[] __initconst = {
-        SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */
-        SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */
-        SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */
-        SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */
-        SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */
-        SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */
-        SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */
-        SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */
+
+static struct sh_timer_config mtu2_0_platform_data __initdata = {
+        .name = "MTU2_0",
+        .timer_bit = 0,
+        .channel_offset = -0x80,
+        .clockevent_rating = 200,
 };
 
-static inline void r7s72100_register_scif(int idx)
-{
-        platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
-                                      sizeof(struct plat_sci_port));
-}
+static struct resource mtu2_0_resources[] __initdata = {
+        DEFINE_RES_MEM(0xfcff0300, 0x27),
+        DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
+};
+
+#define r7s72100_register_mtu2(idx)                                     \
+        platform_device_register_resndata(&platform_bus, "sh_mtu2",     \
+                                          idx, mtu2_##idx##_resources,  \
+                                          ARRAY_SIZE(mtu2_##idx##_resources), \
+                                          &mtu2_##idx##_platform_data,  \
+                                          sizeof(struct sh_timer_config))
 
 void __init r7s72100_add_dt_devices(void)
 {
-        r7s72100_register_scif(SCIF0);
-        r7s72100_register_scif(SCIF1);
-        r7s72100_register_scif(SCIF2);
-        r7s72100_register_scif(SCIF3);
-        r7s72100_register_scif(SCIF4);
-        r7s72100_register_scif(SCIF5);
-        r7s72100_register_scif(SCIF6);
-        r7s72100_register_scif(SCIF7);
+        r7s72100_register_scif(0);
+        r7s72100_register_scif(1);
+        r7s72100_register_scif(2);
+        r7s72100_register_scif(3);
+        r7s72100_register_scif(4);
+        r7s72100_register_scif(5);
+        r7s72100_register_scif(6);
+        r7s72100_register_scif(7);
+        r7s72100_register_mtu2(0);
 }
 
 void __init r7s72100_init_early(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index b0f2749071be..cd36f8078325 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -40,41 +40,39 @@ void __init r8a73a4_pinmux_init(void)
                                         ARRAY_SIZE(pfc_resources));
 }
 
-#define SCIF_COMMON(scif_type, baseaddr, irq)                   \
+#define R8A73A4_SCIF(scif_type, _scscr, index, baseaddr, irq)   \
+static struct plat_sci_port scif##index##_platform_data = {     \
         .type           = scif_type,                            \
-        .mapbase        = baseaddr,                             \
         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,      \
-        .scbrr_algo_id  = SCBRR_ALGO_4,                         \
-        .irqs           = SCIx_IRQ_MUXED(irq)
-
-#define SCIFA_DATA(index, baseaddr, irq)                \
-[index] = {                                             \
-        SCIF_COMMON(PORT_SCIFA, baseaddr, irq),         \
-        .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0,      \
+        .scscr          = _scscr,                               \
+};                                                              \
+                                                                \
+static struct resource scif##index##_resources[] = {            \
+        DEFINE_RES_MEM(baseaddr, 0x100),                        \
+        DEFINE_RES_IRQ(irq),                                    \
 }
 
-#define SCIFB_DATA(index, baseaddr, irq)        \
-[index] = {                                     \
-        SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
-        .scscr = SCSCR_RE | SCSCR_TE,           \
-}
+#define R8A73A4_SCIFA(index, baseaddr, irq)     \
+        R8A73A4_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
+                     index, baseaddr, irq)
 
-enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFB3 };
+#define R8A73A4_SCIFB(index, baseaddr, irq)     \
+        R8A73A4_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
+                     index, baseaddr, irq)
 
-static const struct plat_sci_port scif[] = {
-        SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
-        SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
-        SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
-        SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
-        SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
-        SCIFB_DATA(SCIFB3, 0xe6cf0000, gic_spi(151)), /* SCIFB3 */
-};
+R8A73A4_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
+R8A73A4_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
+R8A73A4_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
+R8A73A4_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
+R8A73A4_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
+R8A73A4_SCIFB(5, 0xe6cf0000, gic_spi(151)); /* SCIFB3 */
 
-static inline void r8a73a4_register_scif(int idx)
-{
-        platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
-                                      sizeof(struct plat_sci_port));
-}
+#define r8a73a4_register_scif(index)                                           \
+        platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+                                          scif##index##_resources,             \
+                                          ARRAY_SIZE(scif##index##_resources), \
+                                          &scif##index##_platform_data,        \
+                                          sizeof(scif##index##_platform_data))
 
 static const struct renesas_irqc_config irqc0_data = {
         .irq_base = irq_pin(0), /* IRQ0 -> IRQ31 */
@@ -192,12 +190,12 @@ static struct resource cmt10_resources[] = {
 
 void __init r8a73a4_add_dt_devices(void)
 {
-        r8a73a4_register_scif(SCIFA0);
-        r8a73a4_register_scif(SCIFA1);
-        r8a73a4_register_scif(SCIFB0);
-        r8a73a4_register_scif(SCIFB1);
-        r8a73a4_register_scif(SCIFB2);
-        r8a73a4_register_scif(SCIFB3);
+        r8a73a4_register_scif(0);
+        r8a73a4_register_scif(1);
+        r8a73a4_register_scif(2);
+        r8a73a4_register_scif(3);
+        r8a73a4_register_scif(4);
+        r8a73a4_register_scif(5);
         r8a7790_register_cmt(10);
 }
 
@@ -275,7 +273,7 @@ static const struct sh_dmae_pdata dma_pdata = {
 
 static struct resource dma_resources[] = {
         DEFINE_RES_MEM(0xe6700020, 0x89e0),
-        DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
+        DEFINE_RES_IRQ(gic_spi(220)),
         {
                 /* IRQ for channels 0-19 */
                 .start  = gic_spi(200),
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index b7d4b2c3bc29..8f3c68101d59 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -203,167 +203,38 @@ static struct platform_device irqpin3_device = {
         },
 };
 
-/* SCIFA0 */
-static struct plat_sci_port scif0_platform_data = {
-        .mapbase        = 0xe6c40000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(100)),
-};
-
-static struct platform_device scif0_device = {
-        .name           = "sh-sci",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &scif0_platform_data,
-        },
-};
-
-/* SCIFA1 */
-static struct plat_sci_port scif1_platform_data = {
-        .mapbase        = 0xe6c50000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(101)),
-};
-
-static struct platform_device scif1_device = {
-        .name           = "sh-sci",
-        .id             = 1,
-        .dev            = {
-                .platform_data  = &scif1_platform_data,
-        },
-};
-
-/* SCIFA2 */
-static struct plat_sci_port scif2_platform_data = {
-        .mapbase        = 0xe6c60000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(102)),
-};
-
-static struct platform_device scif2_device = {
-        .name           = "sh-sci",
-        .id             = 2,
-        .dev            = {
-                .platform_data  = &scif2_platform_data,
-        },
-};
-
-/* SCIFA3 */
-static struct plat_sci_port scif3_platform_data = {
-        .mapbase        = 0xe6c70000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(103)),
-};
-
-static struct platform_device scif3_device = {
-        .name           = "sh-sci",
-        .id             = 3,
-        .dev            = {
-                .platform_data  = &scif3_platform_data,
-        },
-};
-
-/* SCIFA4 */
-static struct plat_sci_port scif4_platform_data = {
-        .mapbase        = 0xe6c80000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(104)),
-};
-
-static struct platform_device scif4_device = {
-        .name           = "sh-sci",
-        .id             = 4,
-        .dev            = {
-                .platform_data  = &scif4_platform_data,
-        },
-};
-
-/* SCIFA5 */
-static struct plat_sci_port scif5_platform_data = {
-        .mapbase        = 0xe6cb0000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(105)),
-};
-
-static struct platform_device scif5_device = {
-        .name           = "sh-sci",
-        .id             = 5,
-        .dev            = {
-                .platform_data  = &scif5_platform_data,
-        },
-};
-
-/* SCIFA6 */
-static struct plat_sci_port scif6_platform_data = {
-        .mapbase        = 0xe6cc0000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(106)),
-};
-
-static struct platform_device scif6_device = {
-        .name           = "sh-sci",
-        .id             = 6,
-        .dev            = {
-                .platform_data  = &scif6_platform_data,
-        },
-};
-
-/* SCIFA7 */
-static struct plat_sci_port scif7_platform_data = {
-        .mapbase        = 0xe6cd0000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(107)),
-};
-
-static struct platform_device scif7_device = {
-        .name           = "sh-sci",
-        .id             = 7,
-        .dev            = {
-                .platform_data  = &scif7_platform_data,
-        },
-};
-
-/* SCIFB */
-static struct plat_sci_port scifb_platform_data = {
-        .mapbase        = 0xe6c30000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFB,
-        .irqs           = SCIx_IRQ_MUXED(gic_spi(108)),
-};
+/* SCIF */
+#define R8A7740_SCIF(scif_type, index, baseaddr, irq)           \
+static struct plat_sci_port scif##index##_platform_data = {     \
+        .type           = scif_type,                            \
+        .flags          = UPF_BOOT_AUTOCONF,                    \
+        .scscr          = SCSCR_RE | SCSCR_TE,                  \
+};                                                              \
+                                                                \
+static struct resource scif##index##_resources[] = {            \
+        DEFINE_RES_MEM(baseaddr, 0x100),                        \
+        DEFINE_RES_IRQ(irq),                                    \
+};                                                              \
+                                                                \
+static struct platform_device scif##index##_device = {          \
+        .name           = "sh-sci",                             \
+        .id             = index,                                \
+        .resource       = scif##index##_resources,              \
+        .num_resources  = ARRAY_SIZE(scif##index##_resources),  \
+        .dev            = {                                     \
+                .platform_data  = &scif##index##_platform_data, \
+        },                                                      \
+}
 
-static struct platform_device scifb_device = {
-        .name           = "sh-sci",
-        .id             = 8,
-        .dev            = {
-                .platform_data  = &scifb_platform_data,
-        },
-};
+R8A7740_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(100));
+R8A7740_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(101));
+R8A7740_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(102));
+R8A7740_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(103));
+R8A7740_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(104));
+R8A7740_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(105));
+R8A7740_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(106));
+R8A7740_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(107));
+R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
 
 /* CMT */
 static struct sh_timer_config cmt10_platform_data = {
@@ -528,7 +399,7 @@ static struct platform_device *r8a7740_devices_dt[] __initdata = {
         &scif5_device,
         &scif6_device,
         &scif7_device,
-        &scifb_device,
+        &scif8_device,
         &cmt10_device,
 };
 
@@ -981,7 +852,7 @@ void __init r8a7740_add_standard_devices(void)
         rmobile_add_device_to_domain("A3SP",    &scif5_device);
         rmobile_add_device_to_domain("A3SP",    &scif6_device);
         rmobile_add_device_to_domain("A3SP",    &scif7_device);
-        rmobile_add_device_to_domain("A3SP",    &scifb_device);
+        rmobile_add_device_to_domain("A3SP",    &scif8_device);
         rmobile_add_device_to_domain("A3SP",    &i2c1_device);
 }
 
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 03fcc5974ef9..6d694526e4ca 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -44,24 +44,31 @@
 #include <asm/hardware/cache-l2x0.h>
 
 /* SCIF */
-#define SCIF_INFO(baseaddr, irq)                                \
-{                                                               \
-        .mapbase        = baseaddr,                             \
+#define R8A7778_SCIF(index, baseaddr, irq)                      \
+static struct plat_sci_port scif##index##_platform_data = {     \
         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,      \
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,     \
-        .scbrr_algo_id  = SCBRR_ALGO_2,                         \
         .type           = PORT_SCIF,                            \
-        .irqs           = SCIx_IRQ_MUXED(irq),                  \
+};                                                              \
+                                                                \
+static struct resource scif##index##_resources[] = {            \
+        DEFINE_RES_MEM(baseaddr, 0x100),                        \
+        DEFINE_RES_IRQ(irq),                                    \
 }
 
-static struct plat_sci_port scif_platform_data[] __initdata = {
-        SCIF_INFO(0xffe40000, gic_iid(0x66)),
-        SCIF_INFO(0xffe41000, gic_iid(0x67)),
-        SCIF_INFO(0xffe42000, gic_iid(0x68)),
-        SCIF_INFO(0xffe43000, gic_iid(0x69)),
-        SCIF_INFO(0xffe44000, gic_iid(0x6a)),
-        SCIF_INFO(0xffe45000, gic_iid(0x6b)),
-};
+R8A7778_SCIF(0, 0xffe40000, gic_iid(0x66));
+R8A7778_SCIF(1, 0xffe41000, gic_iid(0x67));
+R8A7778_SCIF(2, 0xffe42000, gic_iid(0x68));
+R8A7778_SCIF(3, 0xffe43000, gic_iid(0x69));
+R8A7778_SCIF(4, 0xffe44000, gic_iid(0x6a));
+R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
+
+#define r8a7778_register_scif(index)                                           \
+        platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+                                          scif##index##_resources,             \
+                                          ARRAY_SIZE(scif##index##_resources), \
+                                          &scif##index##_platform_data,        \
+                                          sizeof(scif##index##_platform_data))
 
 /* TMU */
 static struct resource sh_tmu0_resources[] __initdata = {
@@ -287,8 +294,6 @@ static void __init r8a7778_register_hspi(int id)
 
 void __init r8a7778_add_dt_devices(void)
 {
-        int i;
-
 #ifdef CONFIG_CACHE_L2X0
         void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
         if (base) {
@@ -300,11 +305,12 @@ void __init r8a7778_add_dt_devices(void)
         }
 #endif
 
-        for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++)
-                platform_device_register_data(&platform_bus, "sh-sci", i,
-                                              &scif_platform_data[i],
-                                              sizeof(struct plat_sci_port));
-
+        r8a7778_register_scif(0);
+        r8a7778_register_scif(1);
+        r8a7778_register_scif(2);
+        r8a7778_register_scif(3);
+        r8a7778_register_scif(4);
+        r8a7778_register_scif(5);
         r8a7778_register_tmu(0);
         r8a7778_register_tmu(1);
 }
@@ -319,6 +325,52 @@ void __init r8a7778_add_dt_devices(void)
 #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1)  /* SDHI0 */
 #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI  0       /* SDHI0 */
 
+#define HPBDMA_SSI(_id)                         \
+{                                               \
+        .id     = HPBDMA_SLAVE_SSI## _id ##_TX, \
+        .addr   = 0xffd91008 + (_id * 0x40),    \
+        .dcr    = HPB_DMAE_DCR_CT |             \
+                  HPB_DMAE_DCR_DIP |            \
+                  HPB_DMAE_DCR_SPDS_32BIT |     \
+                  HPB_DMAE_DCR_DMDL |           \
+                  HPB_DMAE_DCR_DPDS_32BIT,      \
+        .port   = _id + (_id << 8),             \
+        .dma_ch = (28 + _id),                   \
+}, {                                            \
+        .id     = HPBDMA_SLAVE_SSI## _id ##_RX, \
+        .addr   = 0xffd9100c + (_id * 0x40),    \
+        .dcr    = HPB_DMAE_DCR_CT |             \
+                  HPB_DMAE_DCR_DIP |            \
+                  HPB_DMAE_DCR_SMDL |           \
+                  HPB_DMAE_DCR_SPDS_32BIT |     \
+                  HPB_DMAE_DCR_DPDS_32BIT,      \
+        .port   = _id + (_id << 8),             \
+        .dma_ch = (28 + _id),                   \
+}
+
+#define HPBDMA_HPBIF(_id)                               \
+{                                                       \
+        .id     = HPBDMA_SLAVE_HPBIF## _id ##_TX,       \
+        .addr   = 0xffda0000 + (_id * 0x1000),          \
+        .dcr    = HPB_DMAE_DCR_CT |                     \
+                  HPB_DMAE_DCR_DIP |                    \
+                  HPB_DMAE_DCR_SPDS_32BIT |             \
+                  HPB_DMAE_DCR_DMDL |                   \
+                  HPB_DMAE_DCR_DPDS_32BIT,              \
+        .port   = 0x1111,                               \
+        .dma_ch = (28 + _id),                           \
+}, {                                                    \
+        .id     = HPBDMA_SLAVE_HPBIF## _id ##_RX,       \
+        .addr   = 0xffda0000 + (_id * 0x1000),          \
+        .dcr    = HPB_DMAE_DCR_CT |                     \
+                  HPB_DMAE_DCR_DIP |                    \
+                  HPB_DMAE_DCR_SMDL |                   \
+                  HPB_DMAE_DCR_SPDS_32BIT |             \
+                  HPB_DMAE_DCR_DPDS_32BIT,              \
+        .port   = 0x1111,                               \
+        .dma_ch = (28 + _id),                           \
+}
+
 static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
         {
                 .id     = HPBDMA_SLAVE_SDHI0_TX,
@@ -348,12 +400,86 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
                 .port   = 0x0D0C,
                 .flags  = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
                 .dma_ch = 22,
+        }, {
+                .id     = HPBDMA_SLAVE_USBFUNC_TX, /* for D0 */
+                .addr   = 0xffe60018,
+                .dcr    = HPB_DMAE_DCR_SPDS_32BIT |
+                          HPB_DMAE_DCR_DMDL |
+                          HPB_DMAE_DCR_DPDS_32BIT,
+                .port   = 0x0000,
+                .dma_ch = 14,
+        }, {
+                .id     = HPBDMA_SLAVE_USBFUNC_RX, /* for D1 */
+                .addr   = 0xffe6001c,
+                .dcr    = HPB_DMAE_DCR_SMDL |
+                          HPB_DMAE_DCR_SPDS_32BIT |
+                          HPB_DMAE_DCR_DPDS_32BIT,
+                .port   = 0x0101,
+                .dma_ch = 15,
         },
+
+        HPBDMA_SSI(0),
+        HPBDMA_SSI(1),
+        HPBDMA_SSI(2),
+        HPBDMA_SSI(3),
+        HPBDMA_SSI(4),
+        HPBDMA_SSI(5),
+        HPBDMA_SSI(6),
+        HPBDMA_SSI(7),
+        HPBDMA_SSI(8),
+
+        HPBDMA_HPBIF(0),
+        HPBDMA_HPBIF(1),
+        HPBDMA_HPBIF(2),
+        HPBDMA_HPBIF(3),
+        HPBDMA_HPBIF(4),
+        HPBDMA_HPBIF(5),
+        HPBDMA_HPBIF(6),
+        HPBDMA_HPBIF(7),
+        HPBDMA_HPBIF(8),
 };
 
 static const struct hpb_dmae_channel hpb_dmae_channels[] = {
+        HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_TX), /* ch. 14 */
+        HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_RX), /* ch. 15 */
         HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
         HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX),   /* ch. 28 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_RX),   /* ch. 28 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_TX),   /* ch. 29 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_RX),   /* ch. 29 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_TX),   /* ch. 30 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_RX),   /* ch. 30 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_TX),   /* ch. 31 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_RX),   /* ch. 31 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_TX),   /* ch. 32 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_RX),   /* ch. 32 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_TX),   /* ch. 33 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_RX),   /* ch. 33 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_TX),   /* ch. 34 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_RX),   /* ch. 34 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_TX),   /* ch. 35 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_RX),   /* ch. 35 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_TX),   /* ch. 36 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_RX),   /* ch. 36 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
+        HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
 };
 
 static struct hpb_dmae_pdata dma_platform_data __initdata = {
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 13049e9d691c..339292e85838 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -188,107 +188,35 @@ void __init r8a7779_pinmux_init(void)
                             ARRAY_SIZE(r8a7779_pinctrl_devices));
 }
 
-static struct plat_sci_port scif0_platform_data = {
-        .mapbase        = 0xffe40000,
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(gic_iid(0x78)),
-};
-
-static struct platform_device scif0_device = {
-        .name           = "sh-sci",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &scif0_platform_data,
-        },
-};
-
-static struct plat_sci_port scif1_platform_data = {
-        .mapbase        = 0xffe41000,
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(gic_iid(0x79)),
-};
-
-static struct platform_device scif1_device = {
-        .name           = "sh-sci",
-        .id             = 1,
-        .dev            = {
-                .platform_data  = &scif1_platform_data,
-        },
-};
-
-static struct plat_sci_port scif2_platform_data = {
-        .mapbase        = 0xffe42000,
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(gic_iid(0x7a)),
-};
-
-static struct platform_device scif2_device = {
-        .name           = "sh-sci",
-        .id             = 2,
-        .dev            = {
-                .platform_data  = &scif2_platform_data,
-        },
-};
-
-static struct plat_sci_port scif3_platform_data = {
-        .mapbase        = 0xffe43000,
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(gic_iid(0x7b)),
-};
-
-static struct platform_device scif3_device = {
-        .name           = "sh-sci",
-        .id             = 3,
-        .dev            = {
-                .platform_data  = &scif3_platform_data,
-        },
-};
-
-static struct plat_sci_port scif4_platform_data = {
-        .mapbase        = 0xffe44000,
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(gic_iid(0x7c)),
-};
-
-static struct platform_device scif4_device = {
-        .name           = "sh-sci",
-        .id             = 4,
-        .dev            = {
-                .platform_data  = &scif4_platform_data,
-        },
-};
-
-static struct plat_sci_port scif5_platform_data = {
-        .mapbase        = 0xffe45000,
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(gic_iid(0x7d)),
-};
+/* SCIF */
+#define R8A7779_SCIF(index, baseaddr, irq)                      \
+static struct plat_sci_port scif##index##_platform_data = {     \
+        .type           = PORT_SCIF,                            \
+        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,      \
+        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,     \
+};                                                              \
+                                                                \
+static struct resource scif##index##_resources[] = {            \
+        DEFINE_RES_MEM(baseaddr, 0x100),                        \
+        DEFINE_RES_IRQ(irq),                                    \
+};                                                              \
+                                                                \
+static struct platform_device scif##index##_device = {          \
+        .name           = "sh-sci",                             \
+        .id             = index,                                \
+        .resource       = scif##index##_resources,              \
+        .num_resources  = ARRAY_SIZE(scif##index##_resources),  \
+        .dev            = {                                     \
+                .platform_data  = &scif##index##_platform_data, \
+        },                                                      \
+}
 
-static struct platform_device scif5_device = {
-        .name           = "sh-sci",
-        .id             = 5,
-        .dev            = {
-                .platform_data  = &scif5_platform_data,
-        },
-};
+R8A7779_SCIF(0, 0xffe40000, gic_iid(0x78));
+R8A7779_SCIF(1, 0xffe41000, gic_iid(0x79));
+R8A7779_SCIF(2, 0xffe42000, gic_iid(0x7a));
+R8A7779_SCIF(3, 0xffe43000, gic_iid(0x7b));
+R8A7779_SCIF(4, 0xffe44000, gic_iid(0x7c));
+R8A7779_SCIF(5, 0xffe45000, gic_iid(0x7d));
 
 /* TMU */
 static struct sh_timer_config tmu00_platform_data = {
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index c47bcebbcb00..66476d21544d 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -63,6 +63,27 @@ R8A7790_GPIO(5);
                 &r8a7790_gpio##idx##_platform_data,                     \
                 sizeof(r8a7790_gpio##idx##_platform_data))
 
+static struct resource i2c_resources[] __initdata = {
+        /* I2C0 */
+        DEFINE_RES_MEM(0xE6508000, 0x40),
+        DEFINE_RES_IRQ(gic_spi(287)),
+        /* I2C1 */
+        DEFINE_RES_MEM(0xE6518000, 0x40),
+        DEFINE_RES_IRQ(gic_spi(288)),
+        /* I2C2 */
+        DEFINE_RES_MEM(0xE6530000, 0x40),
+        DEFINE_RES_IRQ(gic_spi(286)),
+        /* I2C3 */
+        DEFINE_RES_MEM(0xE6540000, 0x40),
+        DEFINE_RES_IRQ(gic_spi(290)),
+
+};
+
+#define r8a7790_register_i2c(idx)               \
+        platform_device_register_simple(        \
+                "i2c-rcar", idx,                \
+                i2c_resources + (2 * idx), 2);  \
+
 void __init r8a7790_pinmux_init(void)
 {
         platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
@@ -73,63 +94,57 @@ void __init r8a7790_pinmux_init(void)
         r8a7790_register_gpio(3);
         r8a7790_register_gpio(4);
         r8a7790_register_gpio(5);
+        r8a7790_register_i2c(0);
+        r8a7790_register_i2c(1);
+        r8a7790_register_i2c(2);
+        r8a7790_register_i2c(3);
 }
 
-#define SCIF_COMMON(scif_type, baseaddr, irq)                   \
-        .type           = scif_type,                            \
-        .mapbase        = baseaddr,                             \
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,      \
-        .irqs           = SCIx_IRQ_MUXED(irq)
-
-#define SCIFA_DATA(index, baseaddr, irq)                \
-[index] = {                                             \
-        SCIF_COMMON(PORT_SCIFA, baseaddr, irq),         \
-        .scbrr_algo_id  = SCBRR_ALGO_4,                 \
-        .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0,      \
-}
-
-#define SCIFB_DATA(index, baseaddr, irq)        \
-[index] = {                                     \
-        SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
-        .scbrr_algo_id  = SCBRR_ALGO_4,         \
-        .scscr = SCSCR_RE | SCSCR_TE,           \
-}
-
-#define SCIF_DATA(index, baseaddr, irq)         \
-[index] = {                                             \
-        SCIF_COMMON(PORT_SCIF, baseaddr, irq),          \
-        .scbrr_algo_id  = SCBRR_ALGO_2,                 \
-        .scscr = SCSCR_RE | SCSCR_TE,   \
-}
-
-#define HSCIF_DATA(index, baseaddr, irq)                \
-[index] = {                                             \
-        SCIF_COMMON(PORT_HSCIF, baseaddr, irq),         \
-        .scbrr_algo_id  = SCBRR_ALGO_6,                 \
-        .scscr = SCSCR_RE | SCSCR_TE,   \
+#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq)         \
+static struct plat_sci_port scif##index##_platform_data = {             \
+        .type           = scif_type,                                    \
+        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,              \
+        .scscr          = _scscr,                                       \
+};                                                                      \
+                                                                        \
+static struct resource scif##index##_resources[] = {                    \
+        DEFINE_RES_MEM(baseaddr, 0x100),                                \
+        DEFINE_RES_IRQ(irq),                                            \
 }
 
-enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
-       HSCIF0, HSCIF1 };
-
-static const struct plat_sci_port scif[] __initconst = {
-        SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
-        SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
-        SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
-        SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
-        SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
-        SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
-        SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
-        SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
-        HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
-        HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
-};
-
-static inline void r8a7790_register_scif(int idx)
-{
-        platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
-                                      sizeof(struct plat_sci_port));
-}
+#define R8A7790_SCIF(index, baseaddr, irq)                              \
+        __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE,                  \
+                       index, baseaddr, irq)
+
+#define R8A7790_SCIFA(index, baseaddr, irq)                             \
+        __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0,    \
+                       index, baseaddr, irq)
+
+#define R8A7790_SCIFB(index, baseaddr, irq)                             \
+        __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE,                 \
+                       index, baseaddr, irq)
+
+#define R8A7790_HSCIF(index, baseaddr, irq)                             \
+        __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE,                 \
+                       index, baseaddr, irq)
+
+R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
+R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
+R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
+R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
+R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
+R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
+R8A7790_SCIF(6,  0xe6e60000, gic_spi(152)); /* SCIF0 */
+R8A7790_SCIF(7,  0xe6e68000, gic_spi(153)); /* SCIF1 */
+R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
+R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
+
+#define r8a7790_register_scif(index)                                           \
+        platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+                                          scif##index##_resources,             \
+                                          ARRAY_SIZE(scif##index##_resources), \
+                                          &scif##index##_platform_data,        \
+                                          sizeof(scif##index##_platform_data))
 
 static const struct renesas_irqc_config irqc0_data __initconst = {
         .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
@@ -182,16 +197,16 @@ static const struct resource cmt00_resources[] __initconst = {
 
 void __init r8a7790_add_dt_devices(void)
 {
-        r8a7790_register_scif(SCIFA0);
-        r8a7790_register_scif(SCIFA1);
-        r8a7790_register_scif(SCIFB0);
-        r8a7790_register_scif(SCIFB1);
-        r8a7790_register_scif(SCIFB2);
-        r8a7790_register_scif(SCIFA2);
-        r8a7790_register_scif(SCIF0);
-        r8a7790_register_scif(SCIF1);
-        r8a7790_register_scif(HSCIF0);
-        r8a7790_register_scif(HSCIF1);
+        r8a7790_register_scif(0);
+        r8a7790_register_scif(1);
+        r8a7790_register_scif(2);
+        r8a7790_register_scif(3);
+        r8a7790_register_scif(4);
+        r8a7790_register_scif(5);
+        r8a7790_register_scif(6);
+        r8a7790_register_scif(7);
+        r8a7790_register_scif(8);
+        r8a7790_register_scif(9);
         r8a7790_register_cmt(00);
 }
 
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index d9393d61ee27..e28404e43860 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -22,6 +22,7 @@
 #include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
+#include <linux/platform_data/gpio-rcar.h>
 #include <linux/platform_data/irq-renesas-irqc.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
@@ -31,66 +32,101 @@
 #include <mach/rcar-gen2.h>
 #include <asm/mach/arch.h>
 
-#define SCIF_COMMON(scif_type, baseaddr, irq)                   \
-        .type           = scif_type,                            \
-        .mapbase        = baseaddr,                             \
-        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,      \
-        .irqs           = SCIx_IRQ_MUXED(irq)
-
-#define SCIFA_DATA(index, baseaddr, irq)                \
-[index] = {                                             \
-        SCIF_COMMON(PORT_SCIFA, baseaddr, irq),         \
-        .scbrr_algo_id  = SCBRR_ALGO_4,                 \
-        .scscr = SCSCR_RE | SCSCR_TE,   \
-}
-
-#define SCIFB_DATA(index, baseaddr, irq)        \
-[index] = {                                     \
-        SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
-        .scbrr_algo_id  = SCBRR_ALGO_4,         \
-        .scscr = SCSCR_RE | SCSCR_TE,           \
-}
+static const struct resource pfc_resources[] __initconst = {
+        DEFINE_RES_MEM(0xe6060000, 0x250),
+};
 
-#define SCIF_DATA(index, baseaddr, irq)         \
-[index] = {                                             \
-        SCIF_COMMON(PORT_SCIF, baseaddr, irq),          \
-        .scbrr_algo_id  = SCBRR_ALGO_2,                 \
-        .scscr = SCSCR_RE | SCSCR_TE,   \
+#define r8a7791_register_pfc()                                          \
+        platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
+                                        ARRAY_SIZE(pfc_resources))
+
+#define R8A7791_GPIO(idx, base, nr)                                     \
+static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
+        DEFINE_RES_MEM((base), 0x50),                                   \
+        DEFINE_RES_IRQ(gic_spi(4 + (idx))),                             \
+};                                                                      \
+                                                                        \
+static const struct gpio_rcar_config                                    \
+r8a7791_gpio##idx##_platform_data __initconst = {                       \
+        .gpio_base      = 32 * (idx),                                   \
+        .irq_base       = 0,                                            \
+        .number_of_pins = (nr),                                         \
+        .pctl_name      = "pfc-r8a7791",                                \
+        .has_both_edge_trigger = 1,                                     \
+};                                                                      \
+
+R8A7791_GPIO(0, 0xe6050000, 32);
+R8A7791_GPIO(1, 0xe6051000, 32);
+R8A7791_GPIO(2, 0xe6052000, 32);
+R8A7791_GPIO(3, 0xe6053000, 32);
+R8A7791_GPIO(4, 0xe6054000, 32);
+R8A7791_GPIO(5, 0xe6055000, 32);
+R8A7791_GPIO(6, 0xe6055400, 32);
+R8A7791_GPIO(7, 0xe6055800, 26);
+
+#define r8a7791_register_gpio(idx)                                      \
+        platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
+                r8a7791_gpio##idx##_resources,                          \
+                ARRAY_SIZE(r8a7791_gpio##idx##_resources),              \
+                &r8a7791_gpio##idx##_platform_data,                     \
+                sizeof(r8a7791_gpio##idx##_platform_data))
+
+void __init r8a7791_pinmux_init(void)
+{
+        r8a7791_register_pfc();
+        r8a7791_register_gpio(0);
+        r8a7791_register_gpio(1);
+        r8a7791_register_gpio(2);
+        r8a7791_register_gpio(3);
+        r8a7791_register_gpio(4);
+        r8a7791_register_gpio(5);
+        r8a7791_register_gpio(6);
+        r8a7791_register_gpio(7);
 }
 
-#define HSCIF_DATA(index, baseaddr, irq)                \
-[index] = {                                             \
-        SCIF_COMMON(PORT_HSCIF, baseaddr, irq),         \
-        .scbrr_algo_id  = SCBRR_ALGO_6,                 \
-        .scscr = SCSCR_RE | SCSCR_TE,   \
+#define __R8A7791_SCIF(scif_type, index, baseaddr, irq)                 \
+static struct plat_sci_port scif##index##_platform_data = {             \
+        .type           = scif_type,                                    \
+        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,              \
+        .scscr          = SCSCR_RE | SCSCR_TE,                          \
+};                                                                      \
+                                                                        \
+static struct resource scif##index##_resources[] = {                    \
+        DEFINE_RES_MEM(baseaddr, 0x100),                                \
+        DEFINE_RES_IRQ(irq),                                            \
 }
 
-enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
-        SCIF2, SCIF3, SCIF4, SCIF5, SCIFA3, SCIFA4, SCIFA5 };
-
-static const struct plat_sci_port scif[] __initconst = {
-        SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
-        SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
-        SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
-        SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
-        SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
-        SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
-        SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
-        SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
-        SCIF_DATA(SCIF2, 0xe6e58000, gic_spi(22)), /* SCIF2 */
-        SCIF_DATA(SCIF3, 0xe6ea8000, gic_spi(23)), /* SCIF3 */
-        SCIF_DATA(SCIF4, 0xe6ee0000, gic_spi(24)), /* SCIF4 */
-        SCIF_DATA(SCIF5, 0xe6ee8000, gic_spi(25)), /* SCIF5 */
-        SCIFA_DATA(SCIFA3, 0xe6c70000, gic_spi(29)), /* SCIFA3 */
-        SCIFA_DATA(SCIFA4, 0xe6c78000, gic_spi(30)), /* SCIFA4 */
-        SCIFA_DATA(SCIFA5, 0xe6c80000, gic_spi(31)), /* SCIFA5 */
-};
-
-static inline void r8a7791_register_scif(int idx)
-{
-        platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
-                                      sizeof(struct plat_sci_port));
-}
+#define R8A7791_SCIF(index, baseaddr, irq)                              \
+        __R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
+
+#define R8A7791_SCIFA(index, baseaddr, irq)                             \
+        __R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
+
+#define R8A7791_SCIFB(index, baseaddr, irq)                             \
+        __R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
+
+R8A7791_SCIFA(0,  0xe6c40000, gic_spi(144)); /* SCIFA0 */
+R8A7791_SCIFA(1,  0xe6c50000, gic_spi(145)); /* SCIFA1 */
+R8A7791_SCIFB(2,  0xe6c20000, gic_spi(148)); /* SCIFB0 */
+R8A7791_SCIFB(3,  0xe6c30000, gic_spi(149)); /* SCIFB1 */
+R8A7791_SCIFB(4,  0xe6ce0000, gic_spi(150)); /* SCIFB2 */
+R8A7791_SCIFA(5,  0xe6c60000, gic_spi(151)); /* SCIFA2 */
+R8A7791_SCIF(6,   0xe6e60000, gic_spi(152)); /* SCIF0 */
+R8A7791_SCIF(7,   0xe6e68000, gic_spi(153)); /* SCIF1 */
+R8A7791_SCIF(8,   0xe6e58000, gic_spi(22)); /* SCIF2 */
+R8A7791_SCIF(9,   0xe6ea8000, gic_spi(23)); /* SCIF3 */
+R8A7791_SCIF(10,  0xe6ee0000, gic_spi(24)); /* SCIF4 */
+R8A7791_SCIF(11,  0xe6ee8000, gic_spi(25)); /* SCIF5 */
+R8A7791_SCIFA(12, 0xe6c70000, gic_spi(29)); /* SCIFA3 */
+R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
+R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
+
+#define r8a7791_register_scif(index)                                           \
+        platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+                                          scif##index##_resources,             \
+                                          ARRAY_SIZE(scif##index##_resources), \
+                                          &scif##index##_platform_data,        \
+                                          sizeof(scif##index##_platform_data))
 
 static const struct sh_timer_config cmt00_platform_data __initconst = {
         .name = "CMT00",
@@ -136,23 +172,34 @@ static struct resource irqc0_resources[] = {
                                           &irqc##idx##_data,            \
                                           sizeof(struct renesas_irqc_config))
 
+static const struct resource thermal_resources[] __initconst = {
+        DEFINE_RES_MEM(0xe61f0000, 0x14),
+        DEFINE_RES_MEM(0xe61f0100, 0x38),
+        DEFINE_RES_IRQ(gic_spi(69)),
+};
+
+#define r8a7791_register_thermal()                                      \
+        platform_device_register_simple("rcar_thermal", -1,             \
+                                        thermal_resources,              \
+                                        ARRAY_SIZE(thermal_resources))
+
 void __init r8a7791_add_dt_devices(void)
 {
-        r8a7791_register_scif(SCIFA0);
-        r8a7791_register_scif(SCIFA1);
-        r8a7791_register_scif(SCIFB0);
-        r8a7791_register_scif(SCIFB1);
-        r8a7791_register_scif(SCIFB2);
-        r8a7791_register_scif(SCIFA2);
-        r8a7791_register_scif(SCIF0);
-        r8a7791_register_scif(SCIF1);
-        r8a7791_register_scif(SCIF2);
-        r8a7791_register_scif(SCIF3);
-        r8a7791_register_scif(SCIF4);
-        r8a7791_register_scif(SCIF5);
-        r8a7791_register_scif(SCIFA3);
-        r8a7791_register_scif(SCIFA4);
-        r8a7791_register_scif(SCIFA5);
+        r8a7791_register_scif(0);
+        r8a7791_register_scif(1);
+        r8a7791_register_scif(2);
+        r8a7791_register_scif(3);
+        r8a7791_register_scif(4);
+        r8a7791_register_scif(5);
+        r8a7791_register_scif(6);
+        r8a7791_register_scif(7);
+        r8a7791_register_scif(8);
+        r8a7791_register_scif(9);
+        r8a7791_register_scif(10);
+        r8a7791_register_scif(11);
+        r8a7791_register_scif(12);
+        r8a7791_register_scif(13);
+        r8a7791_register_scif(14);
         r8a7791_register_cmt(00);
 }
 
@@ -160,6 +207,7 @@ void __init r8a7791_add_standard_devices(void)
 {
         r8a7791_add_dt_devices();
         r8a7791_register_irqc(0);
+        r8a7791_register_thermal();
 }
 
 void __init r8a7791_init_early(void)
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 5734c24bf6c7..69ccc6c6fd33 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
+#include <linux/clk/shmobile.h>
 #include <linux/clocksource.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -44,8 +45,10 @@ u32 __init rcar_gen2_read_mode_pins(void)
 
 void __init rcar_gen2_timer_init(void)
 {
-#ifdef CONFIG_ARM_ARCH_TIMER
+#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK)
         u32 mode = rcar_gen2_read_mode_pins();
+#endif
+#ifdef CONFIG_ARM_ARCH_TIMER
         void __iomem *base;
         int extal_mhz = 0;
         u32 freq;
@@ -78,14 +81,28 @@ void __init rcar_gen2_timer_init(void)
         /* Remap "armgcnt address map" space */
         base = ioremap(0xe6080000, PAGE_SIZE);
 
-        /* Update registers with correct frequency */
-        iowrite32(freq, base + CNTFID0);
-        asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+        /*
+         * Update the timer if it is either not running, or is not at the
+         * right frequency. The timer is only configurable in secure mode
+         * so this avoids an abort if the loader started the timer and
+         * entered the kernel in non-secure mode.
+         */
+
+        if ((ioread32(base + CNTCR) & 1) == 0 ||
+            ioread32(base + CNTFID0) != freq) {
+                /* Update registers with correct frequency */
+                iowrite32(freq, base + CNTFID0);
+                asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+
+                /* make sure arch timer is started by setting bit 0 of CNTCR */
+                iowrite32(1, base + CNTCR);
+        }
 
-        /* make sure arch timer is started by setting bit 0 of CNTCR */
-        iowrite32(1, base + CNTCR);
         iounmap(base);
 #endif /* CONFIG_ARM_ARCH_TIMER */
 
+#ifdef CONFIG_COMMON_CLK
+        rcar_gen2_clocks_init(mode);
+#endif
         clocksource_of_init();
 }
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 311878391e18..27301278c208 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -86,138 +86,36 @@ void __init sh7372_pinmux_init(void)
         platform_device_register(&sh7372_pfc_device);
 }
 
-/* SCIFA0 */
-static struct plat_sci_port scif0_platform_data = {
-        .mapbase        = 0xe6c40000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { evt2irq(0x0c00), evt2irq(0x0c00),
-                            evt2irq(0x0c00), evt2irq(0x0c00) },
-};
-
-static struct platform_device scif0_device = {
-        .name           = "sh-sci",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &scif0_platform_data,
-        },
-};
-
-/* SCIFA1 */
-static struct plat_sci_port scif1_platform_data = {
-        .mapbase        = 0xe6c50000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { evt2irq(0x0c20), evt2irq(0x0c20),
-                            evt2irq(0x0c20), evt2irq(0x0c20) },
-};
-
-static struct platform_device scif1_device = {
-        .name           = "sh-sci",
-        .id             = 1,
-        .dev            = {
-                .platform_data  = &scif1_platform_data,
-        },
-};
-
-/* SCIFA2 */
-static struct plat_sci_port scif2_platform_data = {
-        .mapbase        = 0xe6c60000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { evt2irq(0x0c40), evt2irq(0x0c40),
-                            evt2irq(0x0c40), evt2irq(0x0c40) },
-};
-
-static struct platform_device scif2_device = {
-        .name           = "sh-sci",
-        .id             = 2,
-        .dev            = {
-                .platform_data  = &scif2_platform_data,
-        },
-};
-
-/* SCIFA3 */
-static struct plat_sci_port scif3_platform_data = {
-        .mapbase        = 0xe6c70000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { evt2irq(0x0c60), evt2irq(0x0c60),
-                            evt2irq(0x0c60), evt2irq(0x0c60) },
-};
-
-static struct platform_device scif3_device = {
-        .name           = "sh-sci",
-        .id             = 3,
-        .dev            = {
-                .platform_data  = &scif3_platform_data,
-        },
-};
-
-/* SCIFA4 */
-static struct plat_sci_port scif4_platform_data = {
-        .mapbase        = 0xe6c80000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { evt2irq(0x0d20), evt2irq(0x0d20),
-                            evt2irq(0x0d20), evt2irq(0x0d20) },
-};
-
-static struct platform_device scif4_device = {
-        .name           = "sh-sci",
-        .id             = 4,
-        .dev            = {
-                .platform_data  = &scif4_platform_data,
-        },
-};
-
-/* SCIFA5 */
-static struct plat_sci_port scif5_platform_data = {
-        .mapbase        = 0xe6cb0000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { evt2irq(0x0d40), evt2irq(0x0d40),
-                            evt2irq(0x0d40), evt2irq(0x0d40) },
-};
-
-static struct platform_device scif5_device = {
-        .name           = "sh-sci",
-        .id             = 5,
-        .dev            = {
-                .platform_data  = &scif5_platform_data,
-        },
-};
-
-/* SCIFB */
-static struct plat_sci_port scif6_platform_data = {
-        .mapbase        = 0xe6c30000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFB,
-        .irqs           = { evt2irq(0x0d60), evt2irq(0x0d60),
-                            evt2irq(0x0d60), evt2irq(0x0d60) },
-};
+/* SCIF */
+#define SH7372_SCIF(scif_type, index, baseaddr, irq)            \
+static struct plat_sci_port scif##index##_platform_data = {     \
+        .type           = scif_type,                            \
+        .flags          = UPF_BOOT_AUTOCONF,                    \
+        .scscr          = SCSCR_RE | SCSCR_TE,                  \
+};                                                              \
+                                                                \
+static struct resource scif##index##_resources[] = {            \
+        DEFINE_RES_MEM(baseaddr, 0x100),                        \
+        DEFINE_RES_IRQ(irq),                                    \
+};                                                              \
+                                                                \
+static struct platform_device scif##index##_device = {          \
+        .name           = "sh-sci",                             \
+        .id             = index,                                \
+        .resource       = scif##index##_resources,              \
+        .num_resources  = ARRAY_SIZE(scif##index##_resources),  \
+        .dev            = {                                     \
+                .platform_data  = &scif##index##_platform_data, \
+        },                                                      \
+}
 
-static struct platform_device scif6_device = {
-        .name           = "sh-sci",
-        .id             = 6,
-        .dev            = {
-                .platform_data  = &scif6_platform_data,
-        },
-};
+SH7372_SCIF(PORT_SCIFA, 0, 0xe6c40000, evt2irq(0x0c00));
+SH7372_SCIF(PORT_SCIFA, 1, 0xe6c50000, evt2irq(0x0c20));
+SH7372_SCIF(PORT_SCIFA, 2, 0xe6c60000, evt2irq(0x0c40));
+SH7372_SCIF(PORT_SCIFA, 3, 0xe6c70000, evt2irq(0x0c60));
+SH7372_SCIF(PORT_SCIFA, 4, 0xe6c80000, evt2irq(0x0d20));
+SH7372_SCIF(PORT_SCIFA, 5, 0xe6cb0000, evt2irq(0x0d40));
+SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
 
 /* CMT */
 static struct sh_timer_config cmt2_platform_data = {
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 22de17417fd7..00b348ec48b8 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -71,167 +71,38 @@ void __init sh73a0_pinmux_init(void)
                                         ARRAY_SIZE(pfc_resources));
 }
 
-static struct plat_sci_port scif0_platform_data = {
-        .mapbase        = 0xe6c40000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(72), gic_spi(72),
-                            gic_spi(72), gic_spi(72) },
-};
-
-static struct platform_device scif0_device = {
-        .name           = "sh-sci",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &scif0_platform_data,
-        },
-};
-
-static struct plat_sci_port scif1_platform_data = {
-        .mapbase        = 0xe6c50000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(73), gic_spi(73),
-                            gic_spi(73), gic_spi(73) },
-};
-
-static struct platform_device scif1_device = {
-        .name           = "sh-sci",
-        .id             = 1,
-        .dev            = {
-                .platform_data  = &scif1_platform_data,
-        },
-};
-
-static struct plat_sci_port scif2_platform_data = {
-        .mapbase        = 0xe6c60000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(74), gic_spi(74),
-                            gic_spi(74), gic_spi(74) },
-};
-
-static struct platform_device scif2_device = {
-        .name           = "sh-sci",
-        .id             = 2,
-        .dev            = {
-                .platform_data  = &scif2_platform_data,
-        },
-};
-
-static struct plat_sci_port scif3_platform_data = {
-        .mapbase        = 0xe6c70000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(75), gic_spi(75),
-                            gic_spi(75), gic_spi(75) },
-};
-
-static struct platform_device scif3_device = {
-        .name           = "sh-sci",
-        .id             = 3,
-        .dev            = {
-                .platform_data  = &scif3_platform_data,
-        },
-};
-
-static struct plat_sci_port scif4_platform_data = {
-        .mapbase        = 0xe6c80000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(78), gic_spi(78),
-                            gic_spi(78), gic_spi(78) },
-};
-
-static struct platform_device scif4_device = {
-        .name           = "sh-sci",
-        .id             = 4,
-        .dev            = {
-                .platform_data  = &scif4_platform_data,
-        },
-};
-
-static struct plat_sci_port scif5_platform_data = {
-        .mapbase        = 0xe6cb0000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(79), gic_spi(79),
-                            gic_spi(79), gic_spi(79) },
-};
-
-static struct platform_device scif5_device = {
-        .name           = "sh-sci",
-        .id             = 5,
-        .dev            = {
-                .platform_data  = &scif5_platform_data,
-        },
-};
-
-static struct plat_sci_port scif6_platform_data = {
-        .mapbase        = 0xe6cc0000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(156), gic_spi(156),
-                            gic_spi(156), gic_spi(156) },
-};
-
-static struct platform_device scif6_device = {
-        .name           = "sh-sci",
-        .id             = 6,
-        .dev            = {
-                .platform_data  = &scif6_platform_data,
-        },
-};
-
-static struct plat_sci_port scif7_platform_data = {
-        .mapbase        = 0xe6cd0000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFA,
-        .irqs           = { gic_spi(143), gic_spi(143),
-                            gic_spi(143), gic_spi(143) },
-};
-
-static struct platform_device scif7_device = {
-        .name           = "sh-sci",
-        .id             = 7,
-        .dev            = {
-                .platform_data  = &scif7_platform_data,
-        },
-};
-
-static struct plat_sci_port scif8_platform_data = {
-        .mapbase        = 0xe6c30000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE,
-        .scbrr_algo_id  = SCBRR_ALGO_4,
-        .type           = PORT_SCIFB,
-        .irqs           = { gic_spi(80), gic_spi(80),
-                            gic_spi(80), gic_spi(80) },
-};
+/* SCIF */
+#define SH73A0_SCIF(scif_type, index, baseaddr, irq)            \
+static struct plat_sci_port scif##index##_platform_data = {     \
+        .type           = scif_type,                            \
+        .flags          = UPF_BOOT_AUTOCONF,                    \
+        .scscr          = SCSCR_RE | SCSCR_TE,                  \
+};                                                              \
+                                                                \
+static struct resource scif##index##_resources[] = {            \
+        DEFINE_RES_MEM(baseaddr, 0x100),                        \
+        DEFINE_RES_IRQ(irq),                                    \
+};                                                              \
+                                                                \
+static struct platform_device scif##index##_device = {          \
+        .name           = "sh-sci",                             \
+        .id             = index,                                \
+        .resource       = scif##index##_resources,              \
+        .num_resources  = ARRAY_SIZE(scif##index##_resources),  \
+        .dev            = {                                     \
+                .platform_data  = &scif##index##_platform_data, \
+        },                                                      \
+}
 
-static struct platform_device scif8_device = {
-        .name           = "sh-sci",
-        .id             = 8,
-        .dev            = {
-                .platform_data  = &scif8_platform_data,
-        },
-};
+SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72));
+SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73));
+SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74));
+SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75));
+SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78));
+SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79));
+SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156));
+SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143));
+SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80));
 
 static struct sh_timer_config cmt10_platform_data = {
         .name = "CMT10",
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 09e740f58b27..d1a12a496525 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -14,6 +14,8 @@ config ARCH_TEGRA
         select MIGHT_HAVE_CACHE_L2X0
         select MIGHT_HAVE_PCI
         select PINCTRL
+        select ARCH_HAS_RESET_CONTROLLER
+        select RESET_CONTROLLER
         select SOC_BUS
         select SPARSE_IRQ
         select USB_ARCH_HAS_EHCI if USB_SUPPORT
@@ -63,6 +65,7 @@ config ARCH_TEGRA_124_SOC
         bool "Enable support for Tegra124 family"
         select ARM_L1_CACHE_SHIFT_6
         select HAVE_ARM_ARCH_TIMER
+        select PINCTRL_TEGRA124
         help
           Support for NVIDIA Tegra T124 processor family, based on the
           ARM CortexA15MP CPU
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 9a4e910c3796..c9ac23b385be 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/export.h>
 #include <linux/random.h>
+#include <linux/clk.h>
 #include <linux/tegra-soc.h>
 
 #include "fuse.h"
@@ -54,6 +55,7 @@ int tegra_cpu_speedo_id;		/* only exist in Tegra30 and later */
 int tegra_soc_speedo_id;
 enum tegra_revision tegra_revision;
 
+static struct clk *fuse_clk;
 static int tegra_fuse_spare_bit;
 static void (*tegra_init_speedo_data)(void);
 
@@ -77,6 +79,22 @@ static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
         [TEGRA_REVISION_A04]     = "A04",
 };
 
+static void tegra_fuse_enable_clk(void)
+{
+        if (IS_ERR(fuse_clk))
+                fuse_clk = clk_get_sys(NULL, "fuse");
+        if (IS_ERR(fuse_clk))
+                return;
+        clk_prepare_enable(fuse_clk);
+}
+
+static void tegra_fuse_disable_clk(void)
+{
+        if (IS_ERR(fuse_clk))
+                return;
+        clk_disable_unprepare(fuse_clk);
+}
+
 u32 tegra_fuse_readl(unsigned long offset)
 {
         return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
@@ -84,7 +102,15 @@ u32 tegra_fuse_readl(unsigned long offset)
 
 bool tegra_spare_fuse(int bit)
 {
-        return tegra_fuse_readl(tegra_fuse_spare_bit + bit * 4);
+        bool ret;
+
+        tegra_fuse_enable_clk();
+
+        ret = tegra_fuse_readl(tegra_fuse_spare_bit + bit * 4);
+
+        tegra_fuse_disable_clk();
+
+        return ret;
 }
 
 static enum tegra_revision tegra_get_revision(u32 id)
@@ -113,10 +139,14 @@ static void tegra_get_process_id(void)
 {
         u32 reg;
 
+        tegra_fuse_enable_clk();
+
         reg = tegra_fuse_readl(tegra_fuse_spare_bit);
         tegra_cpu_process_id = (reg >> 6) & 3;
         reg = tegra_fuse_readl(tegra_fuse_spare_bit);
         tegra_core_process_id = (reg >> 12) & 3;
+
+        tegra_fuse_disable_clk();
 }
 
 u32 tegra_read_chipid(void)
@@ -159,6 +189,15 @@ void __init tegra_init_fuse(void)
         reg |= 1 << 28;
         writel(reg, IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
 
+        /*
+         * Enable FUSE clock. This needs to be hardcoded because the clock
+         * subsystem is not active during early boot.
+         */
+        reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x14));
+        reg |= 1 << 7;
+        writel(reg, IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x14));
+        fuse_clk = ERR_PTR(-EINVAL);
+
         reg = tegra_fuse_readl(FUSE_SKU_INFO);
         randomness[0] = reg;
         tegra_sku_id = reg & 0xFF;
@@ -198,10 +237,12 @@ void __init tegra_init_fuse(void)
         switch (tegra_chip_id) {
         case TEGRA20:
                 tegra20_fuse_init_randomness();
+                break;
         case TEGRA30:
         case TEGRA114:
         default:
                 tegra30_fuse_init_randomness();
+                break;
         }
 
         pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index 26b1c2ad0ceb..ee79808e93a3 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -19,6 +19,7 @@
 #ifndef __MACH_TEGRA_IOMAP_H
 #define __MACH_TEGRA_IOMAP_H
 
+#include <asm/pgtable.h>
 #include <asm/sizes.h>
 
 #define TEGRA_IRAM_BASE                 0x40000000
@@ -115,27 +116,26 @@
  * two 256MB io windows (that actually only use about 64KB
  * at the start of each).
  *
- * We will just map the first 1MB of each window (to minimize
+ * We will just map the first MMU section of each window (to minimize
  * pt entries needed) and provide a macro to transform physical
  * io addresses to an appropriate void __iomem *.
- *
  */
 
 #define IO_IRAM_PHYS    0x40000000
 #define IO_IRAM_VIRT    IOMEM(0xFE400000)
 #define IO_IRAM_SIZE    SZ_256K
 
-#define IO_CPU_PHYS     0x50040000
-#define IO_CPU_VIRT     IOMEM(0xFE000000)
+#define IO_CPU_PHYS     0x50040000
+#define IO_CPU_VIRT     IOMEM(0xFE440000)
 #define IO_CPU_SIZE     SZ_16K
 
 #define IO_PPSB_PHYS    0x60000000
 #define IO_PPSB_VIRT    IOMEM(0xFE200000)
-#define IO_PPSB_SIZE    SZ_1M
+#define IO_PPSB_SIZE    SECTION_SIZE
 
 #define IO_APB_PHYS     0x70000000
-#define IO_APB_VIRT     IOMEM(0xFE300000)
-#define IO_APB_SIZE     SZ_1M
+#define IO_APB_VIRT     IOMEM(0xFE000000)
+#define IO_APB_SIZE     SECTION_SIZE
 
 #define IO_TO_VIRT_BETWEEN(p, st, sz)   ((p) >= (st) && (p) < ((st) + (sz)))
 #define IO_TO_VIRT_XLATE(p, pst, vst)   (((p) - (pst) + (vst)))
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 85d28e756bb7..3d0c537d9b94 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -25,6 +25,7 @@
 #include <linux/export.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/reset.h>
 #include <linux/seq_file.h>
 #include <linux/spinlock.h>
 #include <linux/clk/tegra.h>
@@ -33,6 +34,10 @@
 #include "fuse.h"
 #include "iomap.h"
 
+#define DPD_SAMPLE              0x020
+#define  DPD_SAMPLE_ENABLE      (1 << 0)
+#define  DPD_SAMPLE_DISABLE     (0 << 0)
+
 #define PWRGATE_TOGGLE          0x30
 #define  PWRGATE_TOGGLE_START   (1 << 8)
 
@@ -40,6 +45,19 @@
 
 #define PWRGATE_STATUS          0x38
 
+#define IO_DPD_REQ              0x1b8
+#define  IO_DPD_REQ_CODE_IDLE   (0 << 30)
+#define  IO_DPD_REQ_CODE_OFF    (1 << 30)
+#define  IO_DPD_REQ_CODE_ON     (2 << 30)
+#define  IO_DPD_REQ_CODE_MASK   (3 << 30)
+
+#define IO_DPD_STATUS           0x1bc
+#define IO_DPD2_REQ             0x1c0
+#define IO_DPD2_STATUS          0x1c4
+#define SEL_DPD_TIM             0x1c8
+
+#define GPU_RG_CNTRL            0x2d4
+
 static int tegra_num_powerdomains;
 static int tegra_num_cpu_domains;
 static const u8 *tegra_cpu_domains;
@@ -58,6 +76,13 @@ static const u8 tegra114_cpu_domains[] = {
         TEGRA_POWERGATE_CPU3,
 };
 
+static const u8 tegra124_cpu_domains[] = {
+        TEGRA_POWERGATE_CPU0,
+        TEGRA_POWERGATE_CPU1,
+        TEGRA_POWERGATE_CPU2,
+        TEGRA_POWERGATE_CPU3,
+};
+
 static DEFINE_SPINLOCK(tegra_powergate_lock);
 
 static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
@@ -108,6 +133,7 @@ int tegra_powergate_power_off(int id)
 
         return tegra_powergate_set(id, false);
 }
+EXPORT_SYMBOL(tegra_powergate_power_off);
 
 int tegra_powergate_is_powered(int id)
 {
@@ -128,12 +154,23 @@ int tegra_powergate_remove_clamping(int id)
                 return -EINVAL;
 
         /*
+         * The Tegra124 GPU has a separate register (with different semantics)
+         * to remove clamps.
+         */
+        if (tegra_chip_id == TEGRA124) {
+                if (id == TEGRA_POWERGATE_3D) {
+                        pmc_write(0, GPU_RG_CNTRL);
+                        return 0;
+                }
+        }
+
+        /*
          * Tegra 2 has a bug where PCIE and VDE clamping masks are
          * swapped relatively to the partition ids
          */
-        if (id ==  TEGRA_POWERGATE_VDEC)
+        if (id == TEGRA_POWERGATE_VDEC)
                 mask = (1 << TEGRA_POWERGATE_PCIE);
-        else if (id == TEGRA_POWERGATE_PCIE)
+        else if (id == TEGRA_POWERGATE_PCIE)
                 mask = (1 << TEGRA_POWERGATE_VDEC);
         else
                 mask = (1 << id);
@@ -142,13 +179,15 @@ int tegra_powergate_remove_clamping(int id)
 
         return 0;
 }
+EXPORT_SYMBOL(tegra_powergate_remove_clamping);
 
 /* Must be called with clk disabled, and returns with clk enabled */
-int tegra_powergate_sequence_power_up(int id, struct clk *clk)
+int tegra_powergate_sequence_power_up(int id, struct clk *clk,
+                                        struct reset_control *rst)
 {
         int ret;
 
-        tegra_periph_reset_assert(clk);
+        reset_control_assert(rst);
 
         ret = tegra_powergate_power_on(id);
         if (ret)
@@ -165,7 +204,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk)
                 goto err_clamp;
 
         udelay(10);
-        tegra_periph_reset_deassert(clk);
+        reset_control_deassert(rst);
 
         return 0;
 
@@ -202,6 +241,11 @@ int __init tegra_powergate_init(void)
                 tegra_num_cpu_domains = 4;
                 tegra_cpu_domains = tegra114_cpu_domains;
                 break;
+        case TEGRA124:
+                tegra_num_powerdomains = 25;
+                tegra_num_cpu_domains = 4;
+                tegra_cpu_domains = tegra124_cpu_domains;
+                break;
         default:
                 /* Unknown Tegra variant. Disable powergating */
                 tegra_num_powerdomains = 0;
@@ -243,12 +287,36 @@ static const char * const powergate_name_t30[] = {
 };
 
 static const char * const powergate_name_t114[] = {
-        [TEGRA_POWERGATE_CPU]   = "cpu0",
+        [TEGRA_POWERGATE_CPU]   = "crail",
+        [TEGRA_POWERGATE_3D]    = "3d",
+        [TEGRA_POWERGATE_VENC]  = "venc",
+        [TEGRA_POWERGATE_VDEC]  = "vdec",
+        [TEGRA_POWERGATE_MPE]   = "mpe",
+        [TEGRA_POWERGATE_HEG]   = "heg",
+        [TEGRA_POWERGATE_CPU1]  = "cpu1",
+        [TEGRA_POWERGATE_CPU2]  = "cpu2",
+        [TEGRA_POWERGATE_CPU3]  = "cpu3",
+        [TEGRA_POWERGATE_CELP]  = "celp",
+        [TEGRA_POWERGATE_CPU0]  = "cpu0",
+        [TEGRA_POWERGATE_C0NC]  = "c0nc",
+        [TEGRA_POWERGATE_C1NC]  = "c1nc",
+        [TEGRA_POWERGATE_DIS]   = "dis",
+        [TEGRA_POWERGATE_DISB]  = "disb",
+        [TEGRA_POWERGATE_XUSBA] = "xusba",
+        [TEGRA_POWERGATE_XUSBB] = "xusbb",
+        [TEGRA_POWERGATE_XUSBC] = "xusbc",
+};
+
+static const char * const powergate_name_t124[] = {
+        [TEGRA_POWERGATE_CPU]   = "crail",
         [TEGRA_POWERGATE_3D]    = "3d",
         [TEGRA_POWERGATE_VENC]  = "venc",
+        [TEGRA_POWERGATE_PCIE]  = "pcie",
         [TEGRA_POWERGATE_VDEC]  = "vdec",
+        [TEGRA_POWERGATE_L2]    = "l2",
         [TEGRA_POWERGATE_MPE]   = "mpe",
         [TEGRA_POWERGATE_HEG]   = "heg",
+        [TEGRA_POWERGATE_SATA]  = "sata",
         [TEGRA_POWERGATE_CPU1]  = "cpu1",
         [TEGRA_POWERGATE_CPU2]  = "cpu2",
         [TEGRA_POWERGATE_CPU3]  = "cpu3",
@@ -256,11 +324,14 @@ static const char * const powergate_name_t114[] = {
         [TEGRA_POWERGATE_CPU0]  = "cpu0",
         [TEGRA_POWERGATE_C0NC]  = "c0nc",
         [TEGRA_POWERGATE_C1NC]  = "c1nc",
+        [TEGRA_POWERGATE_SOR]   = "sor",
         [TEGRA_POWERGATE_DIS]   = "dis",
         [TEGRA_POWERGATE_DISB]  = "disb",
         [TEGRA_POWERGATE_XUSBA] = "xusba",
         [TEGRA_POWERGATE_XUSBB] = "xusbb",
         [TEGRA_POWERGATE_XUSBC] = "xusbc",
+        [TEGRA_POWERGATE_VIC]   = "vic",
+        [TEGRA_POWERGATE_IRAM]  = "iram",
 };
 
 static int powergate_show(struct seq_file *s, void *data)
@@ -307,6 +378,9 @@ int __init tegra_powergate_debugfs_init(void)
         case TEGRA114:
                 powergate_name = powergate_name_t114;
                 break;
+        case TEGRA124:
+                powergate_name = powergate_name_t124;
+                break;
         }
 
         if (powergate_name) {
@@ -320,3 +394,120 @@ int __init tegra_powergate_debugfs_init(void)
 }
 
 #endif
+
+static int tegra_io_rail_prepare(int id, unsigned long *request,
+                                 unsigned long *status, unsigned int *bit)
+{
+        unsigned long rate, value;
+        struct clk *clk;
+
+        *bit = id % 32;
+
+        /*
+         * There are two sets of 30 bits to select IO rails, but bits 30 and
+         * 31 are control bits rather than IO rail selection bits.
+         */
+        if (id > 63 || *bit == 30 || *bit == 31)
+                return -EINVAL;
+
+        if (id < 32) {
+                *status = IO_DPD_STATUS;
+                *request = IO_DPD_REQ;
+        } else {
+                *status = IO_DPD2_STATUS;
+                *request = IO_DPD2_REQ;
+        }
+
+        clk = clk_get_sys(NULL, "pclk");
+        if (IS_ERR(clk))
+                return PTR_ERR(clk);
+
+        rate = clk_get_rate(clk);
+        clk_put(clk);
+
+        pmc_write(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
+
+        /* must be at least 200 ns, in APB (PCLK) clock cycles */
+        value = DIV_ROUND_UP(1000000000, rate);
+        value = DIV_ROUND_UP(200, value);
+        pmc_write(value, SEL_DPD_TIM);
+
+        return 0;
+}
+
+static int tegra_io_rail_poll(unsigned long offset, unsigned long mask,
+                              unsigned long val, unsigned long timeout)
+{
+        unsigned long value;
+
+        timeout = jiffies + msecs_to_jiffies(timeout);
+
+        while (time_after(timeout, jiffies)) {
+                value = pmc_read(offset);
+                if ((value & mask) == val)
+                        return 0;
+
+                usleep_range(250, 1000);
+        }
+
+        return -ETIMEDOUT;
+}
+
+static void tegra_io_rail_unprepare(void)
+{
+        pmc_write(DPD_SAMPLE_DISABLE, DPD_SAMPLE);
+}
+
+int tegra_io_rail_power_on(int id)
+{
+        unsigned long request, status, value;
+        unsigned int bit, mask;
+        int err;
+
+        err = tegra_io_rail_prepare(id, &request, &status, &bit);
+        if (err < 0)
+                return err;
+
+        mask = 1 << bit;
+
+        value = pmc_read(request);
+        value |= mask;
+        value &= ~IO_DPD_REQ_CODE_MASK;
+        value |= IO_DPD_REQ_CODE_OFF;
+        pmc_write(value, request);
+
+        err = tegra_io_rail_poll(status, mask, 0, 250);
+        if (err < 0)
+                return err;
+
+        tegra_io_rail_unprepare();
+
+        return 0;
+}
+
+int tegra_io_rail_power_off(int id)
+{
+        unsigned long request, status, value;
+        unsigned int bit, mask;
+        int err;
+
+        err = tegra_io_rail_prepare(id, &request, &status, &bit);
+        if (err < 0)
+                return err;
+
+        mask = 1 << bit;
+
+        value = pmc_read(request);
+        value |= mask;
+        value &= ~IO_DPD_REQ_CODE_MASK;
+        value |= IO_DPD_REQ_CODE_ON;
+        pmc_write(value, request);
+
+        err = tegra_io_rail_poll(status, mask, mask, 250);
+        if (err < 0)
+                return err;
+
+        tegra_io_rail_unprepare();
+
+        return 0;
+}
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index 73368176c6e8..ea14d380fc0c 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -60,15 +60,13 @@
  * kernel is loaded. The data is declared here rather than debug-macro.S so
  * that multiple inclusions of debug-macro.S point at the same data.
  */
-u32 tegra_uart_config[4] = {
+u32 tegra_uart_config[3] = {
         /* Debug UART initialization required */
         1,
         /* Debug UART physical address */
         0,
         /* Debug UART virtual address */
         0,
-        /* Scratch space for debug macro */
-        0,
 };
 
 static void __init tegra_init_cache(void)
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 9a5f9fb352ce..9724e4e7cc93 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -341,7 +341,7 @@ static struct irqaction u300_timer_irq = {
  * stamp. (Inspired by OMAP implementation.)
  */
 
-static u32 notrace u300_read_sched_clock(void)
+static u64 notrace u300_read_sched_clock(void)
 {
         return readl(u300_timer_base + U300_TIMER_APP_GPT2CC);
 }
@@ -379,7 +379,7 @@ static void __init u300_timer_init_of(struct device_node *np)
         clk_prepare_enable(clk);
         rate = clk_get_rate(clk);
 
-        setup_sched_clock(u300_read_sched_clock, 32, rate);
+        sched_clock_register(u300_read_sched_clock, 32, rate);
 
         u300_delay_timer.read_current_timer = &u300_read_current_timer;
         u300_delay_timer.freq = rate;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index f6b6bfa88ecf..f61a5707823a 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -158,13 +158,49 @@ struct dma_map_ops arm_coherent_dma_ops = {
 };
 EXPORT_SYMBOL(arm_coherent_dma_ops);
 
+static int __dma_supported(struct device *dev, u64 mask, bool warn)
+{
+        unsigned long max_dma_pfn;
+
+        /*
+         * If the mask allows for more memory than we can address,
+         * and we actually have that much memory, then we must
+         * indicate that DMA to this device is not supported.
+         */
+        if (sizeof(mask) != sizeof(dma_addr_t) &&
+            mask > (dma_addr_t)~0 &&
+            dma_to_pfn(dev, ~0) < max_pfn) {
+                if (warn) {
+                        dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
+                                 mask);
+                        dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
+                }
+                return 0;
+        }
+
+        max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
+
+        /*
+         * Translate the device's DMA mask to a PFN limit.  This
+         * PFN number includes the page which we can DMA to.
+         */
+        if (dma_to_pfn(dev, mask) < max_dma_pfn) {
+                if (warn)
+                        dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
+                                 mask,
+                                 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
+                                 max_dma_pfn + 1);
+                return 0;
+        }
+
+        return 1;
+}
+
 static u64 get_coherent_dma_mask(struct device *dev)
 {
         u64 mask = (u64)DMA_BIT_MASK(32);
 
         if (dev) {
-                unsigned long max_dma_pfn;
-
                 mask = dev->coherent_dma_mask;
 
                 /*
@@ -176,34 +212,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
                         return 0;
                 }
 
-                max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
-
-                /*
-                 * If the mask allows for more memory than we can address,
-                 * and we actually have that much memory, then fail the
-                 * allocation.
-                 */
-                if (sizeof(mask) != sizeof(dma_addr_t) &&
-                    mask > (dma_addr_t)~0 &&
-                    dma_to_pfn(dev, ~0) > max_dma_pfn) {
-                        dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
-                                 mask);
-                        dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
-                        return 0;
-                }
-
-                /*
-                 * Now check that the mask, when translated to a PFN,
-                 * fits within the allowable addresses which we can
-                 * allocate.
-                 */
-                if (dma_to_pfn(dev, mask) < max_dma_pfn) {
-                        dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
-                                 mask,
-                                 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
-                                 arm_dma_pfn_limit + 1);
+                if (!__dma_supported(dev, mask, true))
                         return 0;
-                }
         }
 
         return mask;
@@ -1032,28 +1042,7 @@ void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
  */
 int dma_supported(struct device *dev, u64 mask)
 {
-        unsigned long limit;
-
-        /*
-         * If the mask allows for more memory than we can address,
-         * and we actually have that much memory, then we must
-         * indicate that DMA to this device is not supported.
-         */
-        if (sizeof(mask) != sizeof(dma_addr_t) &&
-            mask > (dma_addr_t)~0 &&
-            dma_to_pfn(dev, ~0) > arm_dma_pfn_limit)
-                return 0;
-
-        /*
-         * Translate the device's DMA mask to a PFN limit.  This
-         * PFN number includes the page which we can DMA to.
-         */
-        limit = dma_to_pfn(dev, mask);
-
-        if (limit < arm_dma_pfn_limit)
-                return 0;
-
-        return 1;
+        return __dma_supported(dev, mask, false);
 }
 EXPORT_SYMBOL(dma_supported);
 
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 3e8f106ee5fe..1f7b19a47060 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -229,7 +229,7 @@ void __init setup_dma_zone(const struct machine_desc *mdesc)
 #ifdef CONFIG_ZONE_DMA
         if (mdesc->dma_zone_size) {
                 arm_dma_zone_size = mdesc->dma_zone_size;
-                arm_dma_limit = PHYS_OFFSET + arm_dma_zone_size - 1;
+                arm_dma_limit = __pv_phys_offset + arm_dma_zone_size - 1;
         } else
                 arm_dma_limit = 0xffffffff;
         arm_dma_pfn_limit = arm_dma_limit >> PAGE_SHIFT;
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 29606bd75f3f..d70b73364a3f 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -54,7 +54,7 @@ static struct clocksource iop_clocksource = {
 /*
  * IOP sched_clock() implementation via its clocksource.
  */
-static u32 notrace iop_read_sched_clock(void)
+static u64 notrace iop_read_sched_clock(void)
 {
         return 0xffffffffu - read_tcr1();
 }
@@ -142,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate)
 {
         u32 timer_ctl;
 
-        setup_sched_clock(iop_read_sched_clock, 32, tick_rate);
+        sched_clock_register(iop_read_sched_clock, 32, tick_rate);
 
         ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
         iop_tick_rate = tick_rate;
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index d9bc98eb2a6b..384a776d8eb2 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -38,7 +38,7 @@
  */
 static void __iomem *sync32k_cnt_reg;
 
-static u32 notrace omap_32k_read_sched_clock(void)
+static u64 notrace omap_32k_read_sched_clock(void)
 {
         return sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
 }
@@ -115,7 +115,7 @@ int __init omap_init_clocksource_32k(void __iomem *vbase)
                 return ret;
         }
 
-        setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
+        sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
         register_persistent_clock(NULL, omap_read_persistent_clock);
         pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
 
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 9d2b2ac74938..dade2920e9a6 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -60,7 +60,7 @@ static u32 ticks_per_jiffy;
  * at least 7.5ns (133MHz TCLK).
  */
 
-static u32 notrace orion_read_sched_clock(void)
+static u64 notrace orion_read_sched_clock(void)
 {
         return ~readl(timer_base + TIMER0_VAL_OFF);
 }
@@ -201,7 +201,7 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask,
         /*
          * Set scale and timer for sched_clock.
          */
-        setup_sched_clock(orion_read_sched_clock, 32, tclk);
+        sched_clock_register(orion_read_sched_clock, 32, tclk);
 
         /*
          * Setup free-running clocksource timer (interrupts
diff --git a/arch/arm/plat-samsung/s5p-irq-eint.c b/arch/arm/plat-samsung/s5p-irq-eint.c
index faa651602780..ebee4dc11a94 100644
--- a/arch/arm/plat-samsung/s5p-irq-eint.c
+++ b/arch/arm/plat-samsung/s5p-irq-eint.c
@@ -16,6 +16,7 @@
 #include <linux/device.h>
 #include <linux/gpio.h>
 #include <linux/irqchip/arm-vic.h>
+#include <linux/of.h>
 
 #include <plat/regs-irqtype.h>
 
@@ -202,6 +203,9 @@ static int __init s5p_init_irq_eint(void)
 {
         int irq;
 
+        if (of_have_populated_dt())
+                return -ENODEV;
+
         for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
                 irq_set_chip(irq, &s5p_irq_vic_eint);
 
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 51b109e3b6c3..c966ae90f4a0 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -26,7 +26,7 @@
 
 static void __iomem *ctr;
 
-static u32 notrace versatile_read_sched_clock(void)
+static u64 notrace versatile_read_sched_clock(void)
 {
         if (ctr)
                 return readl(ctr);
@@ -37,5 +37,5 @@ static u32 notrace versatile_read_sched_clock(void)
 void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
 {
         ctr = reg;
-        setup_sched_clock(versatile_read_sched_clock, 32, rate);
+        sched_clock_register(versatile_read_sched_clock, 32, rate);
 }
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 88c8b6c1341a..6d4dd22ee4b7 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -159,8 +159,7 @@ config NR_CPUS
         range 2 32
         depends on SMP
         # These have to remain sorted largest to smallest
-        default "8" if ARCH_XGENE
-        default "4"
+        default "8"
 
 config HOTPLUG_CPU
         bool "Support for hot-pluggable CPUs"
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 4cc813eddacb..572769727227 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -229,7 +229,7 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot
 extern void __iounmap(volatile void __iomem *addr);
 extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size);
 
-#define PROT_DEFAULT            (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
+#define PROT_DEFAULT            (pgprot_default | PTE_DIRTY)
 #define PROT_DEVICE_nGnRE       (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
 #define PROT_NORMAL_NC          (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
 #define PROT_NORMAL             (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 755f86143320..b1d2e26c3c88 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -43,7 +43,7 @@
  * Section
  */
 #define PMD_SECT_VALID          (_AT(pmdval_t, 1) << 0)
-#define PMD_SECT_PROT_NONE      (_AT(pmdval_t, 1) << 2)
+#define PMD_SECT_PROT_NONE      (_AT(pmdval_t, 1) << 58)
 #define PMD_SECT_USER           (_AT(pmdval_t, 1) << 6)         /* AP[1] */
 #define PMD_SECT_RDONLY         (_AT(pmdval_t, 1) << 7)         /* AP[2] */
 #define PMD_SECT_S              (_AT(pmdval_t, 3) << 8)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 7009387348b7..c68cca5c3523 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -282,8 +282,9 @@ ENDPROC(secondary_holding_pen)
          * be used where CPUs are brought online dynamically by the kernel.
          */
 ENTRY(secondary_entry)
-        bl      __calc_phys_offset              // x2=phys offset
         bl      el2_setup                       // Drop to EL1
+        bl      __calc_phys_offset              // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET
+        bl      set_cpu_boot_mode_flag
         b       secondary_startup
 ENDPROC(secondary_entry)
 
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 421b99fd635d..0f7fec52c7f8 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -111,12 +111,12 @@ ENTRY(__cpu_setup)
         bl      __flush_dcache_all
         mov     lr, x28
         ic      iallu                           // I+BTB cache invalidate
+        tlbi    vmalle1is                       // invalidate I + D TLBs
         dsb     sy
 
         mov     x0, #3 << 20
         msr     cpacr_el1, x0                   // Enable FP/ASIMD
         msr     mdscr_el1, xzr                  // Reset mdscr_el1
-        tlbi    vmalle1is                       // invalidate I + D TLBs
         /*
          * Memory region attributes for LPAE:
          *
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index 7b1f2cd85400..1f121497b517 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -298,8 +298,10 @@ static int __init set_abdac_rate(struct platform_device *pdev)
          */
         retval = clk_round_rate(pll1,
                         CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
-        if (retval < 0)
+        if (retval <= 0) {
+                retval = -EINVAL;
                 goto out_abdac;
+        }
 
         retval = clk_set_rate(pll1, retval);
         if (retval != 0)
diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
index d5aff36ade92..4733e38e7ae6 100644
--- a/arch/avr32/configs/atngw100_defconfig
+++ b/arch/avr32/configs/atngw100_defconfig
@@ -59,7 +59,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atngw100_evklcd100_defconfig b/arch/avr32/configs/atngw100_evklcd100_defconfig
index 4abcf435d599..1be0ee31bd91 100644
--- a/arch/avr32/configs/atngw100_evklcd100_defconfig
+++ b/arch/avr32/configs/atngw100_evklcd100_defconfig
@@ -61,7 +61,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atngw100_evklcd101_defconfig b/arch/avr32/configs/atngw100_evklcd101_defconfig
index 18f3fa0470ff..796e536f7bc4 100644
--- a/arch/avr32/configs/atngw100_evklcd101_defconfig
+++ b/arch/avr32/configs/atngw100_evklcd101_defconfig
@@ -60,7 +60,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atngw100_mrmt_defconfig b/arch/avr32/configs/atngw100_mrmt_defconfig
index 06e389cfcd12..9a57da44eb6f 100644
--- a/arch/avr32/configs/atngw100_mrmt_defconfig
+++ b/arch/avr32/configs/atngw100_mrmt_defconfig
@@ -48,7 +48,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atngw100mkii_defconfig b/arch/avr32/configs/atngw100mkii_defconfig
index 2518a1368d7c..97fe1b399b06 100644
--- a/arch/avr32/configs/atngw100mkii_defconfig
+++ b/arch/avr32/configs/atngw100mkii_defconfig
@@ -59,7 +59,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atngw100mkii_evklcd100_defconfig b/arch/avr32/configs/atngw100mkii_evklcd100_defconfig
index 245ef6bd0fa6..a176d24467e9 100644
--- a/arch/avr32/configs/atngw100mkii_evklcd100_defconfig
+++ b/arch/avr32/configs/atngw100mkii_evklcd100_defconfig
@@ -62,7 +62,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atngw100mkii_evklcd101_defconfig b/arch/avr32/configs/atngw100mkii_evklcd101_defconfig
index fa6cbac6e418..d1bf6dcfc47d 100644
--- a/arch/avr32/configs/atngw100mkii_evklcd101_defconfig
+++ b/arch/avr32/configs/atngw100mkii_evklcd101_defconfig
@@ -61,7 +61,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
index bbd5131021a5..2813dd2b9138 100644
--- a/arch/avr32/configs/atstk1002_defconfig
+++ b/arch/avr32/configs/atstk1002_defconfig
@@ -53,7 +53,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig
index c1cd726f9012..f8ff3a3baad4 100644
--- a/arch/avr32/configs/atstk1003_defconfig
+++ b/arch/avr32/configs/atstk1003_defconfig
@@ -42,7 +42,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig
index 754ae56b2767..992228e54e38 100644
--- a/arch/avr32/configs/atstk1004_defconfig
+++ b/arch/avr32/configs/atstk1004_defconfig
@@ -42,7 +42,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/atstk1006_defconfig b/arch/avr32/configs/atstk1006_defconfig
index 58589d8cc0ac..b8e698b0d1fa 100644
--- a/arch/avr32/configs/atstk1006_defconfig
+++ b/arch/avr32/configs/atstk1006_defconfig
@@ -54,7 +54,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/favr-32_defconfig b/arch/avr32/configs/favr-32_defconfig
index c90fbf6d35bc..07bed3f7eb5e 100644
--- a/arch/avr32/configs/favr-32_defconfig
+++ b/arch/avr32/configs/favr-32_defconfig
@@ -58,7 +58,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/hammerhead_defconfig b/arch/avr32/configs/hammerhead_defconfig
index ba7c31e269cb..18db853386c8 100644
--- a/arch/avr32/configs/hammerhead_defconfig
+++ b/arch/avr32/configs/hammerhead_defconfig
@@ -58,7 +58,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/configs/merisc_defconfig b/arch/avr32/configs/merisc_defconfig
index 65de4431108c..91df6b2986be 100644
--- a/arch/avr32/configs/merisc_defconfig
+++ b/arch/avr32/configs/merisc_defconfig
@@ -46,7 +46,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
 CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
diff --git a/arch/avr32/configs/mimc200_defconfig b/arch/avr32/configs/mimc200_defconfig
index 0a8bfdc420e0..d630e089dd32 100644
--- a/arch/avr32/configs/mimc200_defconfig
+++ b/arch/avr32/configs/mimc200_defconfig
@@ -49,7 +49,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
index 12f828ad5058..d0f771be9e96 100644
--- a/arch/avr32/kernel/time.c
+++ b/arch/avr32/kernel/time.c
@@ -59,7 +59,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
 static struct irqaction timer_irqaction = {
         .handler        = timer_interrupt,
         /* Oprofile uses the same irq as the timer, so allow it to be shared */
-        .flags          = IRQF_TIMER | IRQF_DISABLED | IRQF_SHARED,
+        .flags          = IRQF_TIMER | IRQF_SHARED,
         .name           = "avr32_comparator",
 };
 
diff --git a/arch/avr32/mach-at32ap/pm.c b/arch/avr32/mach-at32ap/pm.c
index 32d680eb6f48..db190842b80c 100644
--- a/arch/avr32/mach-at32ap/pm.c
+++ b/arch/avr32/mach-at32ap/pm.c
@@ -181,7 +181,7 @@ static const struct platform_suspend_ops avr32_pm_ops = {
         .enter  = avr32_pm_enter,
 };
 
-static unsigned long avr32_pm_offset(void *symbol)
+static unsigned long __init avr32_pm_offset(void *symbol)
 {
         extern u8 pm_exception[];
 
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi b/arch/powerpc/boot/dts/mpc5121.dtsi
index bd14c00e5146..2d7cb04ac962 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -77,7 +77,6 @@
                 compatible = "fsl,mpc5121-immr";
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 ranges = <0x0 0x80000000 0x400000>;
                 reg = <0x80000000 0x400000>;
                 bus-frequency = <66000000>;     /* 66 MHz ips bus */
diff --git a/arch/powerpc/configs/52xx/cm5200_defconfig b/arch/powerpc/configs/52xx/cm5200_defconfig
index 69b57daf402e..0b88c7b30bb9 100644
--- a/arch/powerpc/configs/52xx/cm5200_defconfig
+++ b/arch/powerpc/configs/52xx/cm5200_defconfig
@@ -12,7 +12,6 @@ CONFIG_EXPERT=y
 CONFIG_PPC_MPC52xx=y
 CONFIG_PPC_MPC5200_SIMPLE=y
 # CONFIG_PPC_PMAC is not set
-CONFIG_PPC_BESTCOMM=y
 CONFIG_SPARSE_IRQ=y
 CONFIG_PM=y
 # CONFIG_PCI is not set
@@ -71,6 +70,8 @@ CONFIG_USB_DEVICEFS=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
 CONFIG_USB_STORAGE=y
+CONFIG_DMADEVICES=y
+CONFIG_PPC_BESTCOMM=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/powerpc/configs/52xx/lite5200b_defconfig b/arch/powerpc/configs/52xx/lite5200b_defconfig
index f3638ae0a627..104a332e79ab 100644
--- a/arch/powerpc/configs/52xx/lite5200b_defconfig
+++ b/arch/powerpc/configs/52xx/lite5200b_defconfig
@@ -15,7 +15,6 @@ CONFIG_PPC_MPC52xx=y
 CONFIG_PPC_MPC5200_SIMPLE=y
 CONFIG_PPC_LITE5200=y
 # CONFIG_PPC_PMAC is not set
-CONFIG_PPC_BESTCOMM=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_SPARSE_IRQ=y
@@ -59,6 +58,8 @@ CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MPC=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
+CONFIG_DMADEVICES=y
+CONFIG_PPC_BESTCOMM=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/powerpc/configs/52xx/motionpro_defconfig b/arch/powerpc/configs/52xx/motionpro_defconfig
index 0c7de9620ea6..0d13ad7e4478 100644
--- a/arch/powerpc/configs/52xx/motionpro_defconfig
+++ b/arch/powerpc/configs/52xx/motionpro_defconfig
@@ -12,7 +12,6 @@ CONFIG_EXPERT=y
 CONFIG_PPC_MPC52xx=y
 CONFIG_PPC_MPC5200_SIMPLE=y
 # CONFIG_PPC_PMAC is not set
-CONFIG_PPC_BESTCOMM=y
 CONFIG_SPARSE_IRQ=y
 CONFIG_PM=y
 # CONFIG_PCI is not set
@@ -84,6 +83,8 @@ CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_DS1307=y
+CONFIG_DMADEVICES=y
+CONFIG_PPC_BESTCOMM=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/powerpc/configs/52xx/pcm030_defconfig b/arch/powerpc/configs/52xx/pcm030_defconfig
index 22e719575c60..430aa182fa1c 100644
--- a/arch/powerpc/configs/52xx/pcm030_defconfig
+++ b/arch/powerpc/configs/52xx/pcm030_defconfig
@@ -21,7 +21,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_PPC_MPC52xx=y
 CONFIG_PPC_MPC5200_SIMPLE=y
 # CONFIG_PPC_PMAC is not set
-CONFIG_PPC_BESTCOMM=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_HZ_100=y
@@ -87,6 +86,8 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
 CONFIG_USB_STORAGE=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PCF8563=m
+CONFIG_DMADEVICES=y
+CONFIG_PPC_BESTCOMM=y
 CONFIG_EXT2_FS=m
 CONFIG_EXT3_FS=m
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/powerpc/configs/52xx/tqm5200_defconfig b/arch/powerpc/configs/52xx/tqm5200_defconfig
index 716a37be16e3..7af4c5bb7c63 100644
--- a/arch/powerpc/configs/52xx/tqm5200_defconfig
+++ b/arch/powerpc/configs/52xx/tqm5200_defconfig
@@ -17,7 +17,6 @@ CONFIG_PPC_MPC52xx=y
 CONFIG_PPC_MPC5200_SIMPLE=y
 CONFIG_PPC_MPC5200_BUGFIX=y
 # CONFIG_PPC_PMAC is not set
-CONFIG_PPC_BESTCOMM=y
 CONFIG_PM=y
 # CONFIG_PCI is not set
 CONFIG_NET=y
@@ -86,6 +85,8 @@ CONFIG_USB_STORAGE=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_DS1374=y
+CONFIG_DMADEVICES=y
+CONFIG_PPC_BESTCOMM=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index 6640a35bebb7..8b682d1cf4d6 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -15,7 +15,6 @@ CONFIG_PPC_MEDIA5200=y
 CONFIG_PPC_MPC5200_BUGFIX=y
 CONFIG_PPC_MPC5200_LPBFIFO=m
 # CONFIG_PPC_PMAC is not set
-CONFIG_PPC_BESTCOMM=y
 CONFIG_SIMPLE_GPIO=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -125,6 +124,8 @@ CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_DS1374=y
 CONFIG_RTC_DRV_PCF8563=m
+CONFIG_DMADEVICES=y
+CONFIG_PPC_BESTCOMM=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig
index bd8a6f71944f..cec044a3ff69 100644
--- a/arch/powerpc/configs/pasemi_defconfig
+++ b/arch/powerpc/configs/pasemi_defconfig
@@ -2,7 +2,6 @@ CONFIG_PPC64=y
 CONFIG_ALTIVEC=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -45,8 +44,9 @@ CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_SLRAM=y
 CONFIG_MTD_PHRAM=y
@@ -88,7 +88,6 @@ CONFIG_BLK_DEV_DM=y
 CONFIG_DM_CRYPT=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
-CONFIG_MII=y
 CONFIG_TIGON3=y
 CONFIG_E1000=y
 CONFIG_PASEMI_MAC=y
@@ -174,8 +173,8 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_CRC_CCITT=y
 CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_SCHED_DEBUG is not set
diff --git a/arch/powerpc/include/asm/pgalloc-32.h b/arch/powerpc/include/asm/pgalloc-32.h
index 27b2386f738a..842846c1b711 100644
--- a/arch/powerpc/include/asm/pgalloc-32.h
+++ b/arch/powerpc/include/asm/pgalloc-32.h
@@ -84,10 +84,8 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
                                   unsigned long address)
 {
-        struct page *page = page_address(table);
-
         tlb_flush_pgtable(tlb, address);
-        pgtable_page_dtor(page);
-        pgtable_free_tlb(tlb, page, 0);
+        pgtable_page_dtor(table);
+        pgtable_free_tlb(tlb, page_address(table), 0);
 }
 #endif /* _ASM_POWERPC_PGALLOC_32_H */
diff --git a/arch/powerpc/include/asm/pgalloc-64.h b/arch/powerpc/include/asm/pgalloc-64.h
index 694012877bf7..4b0be20fcbfd 100644
--- a/arch/powerpc/include/asm/pgalloc-64.h
+++ b/arch/powerpc/include/asm/pgalloc-64.h
@@ -148,11 +148,9 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
                                   unsigned long address)
 {
-        struct page *page = page_address(table);
-
         tlb_flush_pgtable(tlb, address);
-        pgtable_page_dtor(page);
-        pgtable_free_tlb(tlb, page, 0);
+        pgtable_page_dtor(table);
+        pgtable_free_tlb(tlb, page_address(table), 0);
 }
 
 #else /* if CONFIG_PPC_64K_PAGES */
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index 88a7fb458dfd..75d4f7340da8 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -148,7 +148,7 @@ void __init reserve_crashkernel(void)
                  * a small SLB (128MB) since the crash kernel needs to place
                  * itself and some stacks to be in the first segment.
                  */
-                crashk_res.start = min(0x80000000ULL, (ppc64_rma_size / 2));
+                crashk_res.start = min(0x8000000ULL, (ppc64_rma_size / 2));
 #else
                 crashk_res.start = KDUMP_KERNELBASE;
 #endif
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index e59caf874d05..64bf8db12b15 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -246,8 +246,8 @@ _GLOBAL(__bswapdi2)
         or      r3,r7,r9
         blr
 
-#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
 
+#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
 _GLOBAL(rmci_on)
         sync
         isync
@@ -277,6 +277,9 @@ _GLOBAL(rmci_off)
         isync
         sync
         blr
+#endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
+
+#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
 
 /*
  * Do an IO access in real mode
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 084cdfa40682..2c6d173842b2 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -720,6 +720,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
                 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
         }
         iommu_init_table(tbl, phb->hose->node);
+        iommu_register_group(tbl, pci_domain_nr(pe->pbus), pe->pe_number);
 
         if (pe->pdev)
                 set_iommu_table_base(&pe->pdev->dev, tbl);
diff --git a/arch/powerpc/sysdev/ppc4xx_ocm.c b/arch/powerpc/sysdev/ppc4xx_ocm.c
index b7c43453236d..85d9e37f5ccb 100644
--- a/arch/powerpc/sysdev/ppc4xx_ocm.c
+++ b/arch/powerpc/sysdev/ppc4xx_ocm.c
@@ -339,7 +339,7 @@ void *ppc4xx_ocm_alloc(phys_addr_t *phys, int size, int align,
                 if (IS_ERR_VALUE(offset))
                         continue;
 
-                ocm_blk = kzalloc(sizeof(struct ocm_block *), GFP_KERNEL);
+                ocm_blk = kzalloc(sizeof(struct ocm_block), GFP_KERNEL);
                 if (!ocm_blk) {
                         printk(KERN_ERR "PPC4XX OCM: could not allocate ocm block");
                         rh_free(ocm_reg->rh, offset);
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 5877e71901b3..1e1a03d2d19f 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -347,14 +347,14 @@ config SMP
           Even if you don't know what to do here, say Y.
 
 config NR_CPUS
-        int "Maximum number of CPUs (2-64)"
-        range 2 64
+        int "Maximum number of CPUs (2-256)"
+        range 2 256
         depends on SMP
         default "32" if !64BIT
         default "64" if 64BIT
         help
           This allows you to specify the maximum number of CPUs which this
-          kernel will support.  The maximum supported value is 64 and the
+          kernel will support. The maximum supported value is 256 and the
           minimum value which makes sense is 2.
 
           This is purely to save memory - each supported CPU adds
diff --git a/arch/s390/include/asm/sclp.h b/arch/s390/include/asm/sclp.h
index 30ef748bc161..2f390956c7c1 100644
--- a/arch/s390/include/asm/sclp.h
+++ b/arch/s390/include/asm/sclp.h
@@ -8,6 +8,7 @@
 
 #include <linux/types.h>
 #include <asm/chpid.h>
+#include <asm/cpu.h>
 
 #define SCLP_CHP_INFO_MASK_SIZE         32
 
@@ -37,7 +38,7 @@ struct sclp_cpu_info {
         unsigned int standby;
         unsigned int combined;
         int has_cpu_type;
-        struct sclp_cpu_entry cpu[255];
+        struct sclp_cpu_entry cpu[MAX_CPU_ADDRESS + 1];
 };
 
 int sclp_get_cpu_info(struct sclp_cpu_info *info);
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 496116cd65ec..e4c99a183651 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -72,6 +72,7 @@ int main(void)
         /* constants used by the vdso */
         DEFINE(__CLOCK_REALTIME, CLOCK_REALTIME);
         DEFINE(__CLOCK_MONOTONIC, CLOCK_MONOTONIC);
+        DEFINE(__CLOCK_THREAD_CPUTIME_ID, CLOCK_THREAD_CPUTIME_ID);
         DEFINE(__CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
         BLANK();
         /* idle data offsets */
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index a84476f2a9bb..613649096783 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -125,7 +125,7 @@ int vdso_alloc_per_cpu(struct _lowcore *lowcore)
                 psal[i] = 0x80000000;
 
         lowcore->paste[4] = (u32)(addr_t) psal;
-        psal[0] = 0x20000000;
+        psal[0] = 0x02000000;
         psal[2] = (u32)(addr_t) aste;
         *(unsigned long *) (aste + 2) = segment_table +
                 _ASCE_TABLE_LENGTH + _ASCE_USER_BITS + _ASCE_TYPE_SEGMENT;
diff --git a/arch/s390/kernel/vdso32/clock_gettime.S b/arch/s390/kernel/vdso32/clock_gettime.S
index 5be8e472f57d..65fc3979c2f1 100644
--- a/arch/s390/kernel/vdso32/clock_gettime.S
+++ b/arch/s390/kernel/vdso32/clock_gettime.S
@@ -46,18 +46,13 @@ __kernel_clock_gettime:
         jnm     3f
         a       %r0,__VDSO_TK_MULT(%r5)
 3:      alr     %r0,%r2
-        al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + tk->xtime_nsec */
-        al      %r1,__VDSO_XTIME_NSEC+4(%r5)
-        brc     12,4f
-        ahi     %r0,1
-4:      al      %r0,__VDSO_WTOM_NSEC(%r5)       /*  + wall_to_monotonic.nsec */
+        al      %r0,__VDSO_WTOM_NSEC(%r5)
         al      %r1,__VDSO_WTOM_NSEC+4(%r5)
         brc     12,5f
         ahi     %r0,1
 5:      l       %r2,__VDSO_TK_SHIFT(%r5)        /* Timekeeper shift */
         srdl    %r0,0(%r2)                      /*  >> tk->shift */
-        l       %r2,__VDSO_XTIME_SEC+4(%r5)
-        al      %r2,__VDSO_WTOM_SEC+4(%r5)
+        l       %r2,__VDSO_WTOM_SEC+4(%r5)
         cl      %r4,__VDSO_UPD_COUNT+4(%r5)     /* check update counter */
         jne     1b
         basr    %r5,0
diff --git a/arch/s390/kernel/vdso64/clock_getres.S b/arch/s390/kernel/vdso64/clock_getres.S
index 176e1f75f9aa..34deba7c7ed1 100644
--- a/arch/s390/kernel/vdso64/clock_getres.S
+++ b/arch/s390/kernel/vdso64/clock_getres.S
@@ -23,7 +23,9 @@ __kernel_clock_getres:
         je      0f
         cghi    %r2,__CLOCK_MONOTONIC
         je      0f
-        cghi    %r2,-2          /* CLOCK_THREAD_CPUTIME_ID for this thread */
+        cghi    %r2,__CLOCK_THREAD_CPUTIME_ID
+        je      0f
+        cghi    %r2,-2          /* Per-thread CPUCLOCK with PID=0, VIRT=1 */
         jne     2f
         larl    %r5,_vdso_data
         icm     %r0,15,__LC_ECTG_OK(%r5)
diff --git a/arch/s390/kernel/vdso64/clock_gettime.S b/arch/s390/kernel/vdso64/clock_gettime.S
index 0add1072ba30..91940ed33a4a 100644
--- a/arch/s390/kernel/vdso64/clock_gettime.S
+++ b/arch/s390/kernel/vdso64/clock_gettime.S
@@ -22,7 +22,9 @@ __kernel_clock_gettime:
         larl    %r5,_vdso_data
         cghi    %r2,__CLOCK_REALTIME
         je      4f
-        cghi    %r2,-2          /* CLOCK_THREAD_CPUTIME_ID for this thread */
+        cghi    %r2,__CLOCK_THREAD_CPUTIME_ID
+        je      9f
+        cghi    %r2,-2          /* Per-thread CPUCLOCK with PID=0, VIRT=1 */
         je      9f
         cghi    %r2,__CLOCK_MONOTONIC
         jne     12f
@@ -35,13 +37,11 @@ __kernel_clock_gettime:
         jnz     0b
         stck    48(%r15)                        /* Store TOD clock */
         lgf     %r2,__VDSO_TK_SHIFT(%r5)        /* Timekeeper shift */
-        lg      %r0,__VDSO_XTIME_SEC(%r5)       /* tk->xtime_sec */
-        alg     %r0,__VDSO_WTOM_SEC(%r5)        /*  + wall_to_monotonic.sec */
+        lg      %r0,__VDSO_WTOM_SEC(%r5)
         lg      %r1,48(%r15)
         sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
         msgf    %r1,__VDSO_TK_MULT(%r5)         /*  * tk->mult */
-        alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + tk->xtime_nsec */
-        alg     %r1,__VDSO_WTOM_NSEC(%r5)       /*  + wall_to_monotonic.nsec */
+        alg     %r1,__VDSO_WTOM_NSEC(%r5)
         srlg    %r1,%r1,0(%r2)                  /*  >> tk->shift */
         clg     %r4,__VDSO_UPD_COUNT(%r5)       /* check update counter */
         jne     0b
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index eda00f9be0cf..57d021507120 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -31,8 +31,8 @@ ifeq ($(CONFIG_X86_32),y)
 
         KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return
 
-        # Don't autogenerate SSE instructions
-        KBUILD_CFLAGS += -mno-sse
+        # Don't autogenerate MMX or SSE instructions
+        KBUILD_CFLAGS += -mno-mmx -mno-sse
 
         # Never want PIC in a 32-bit kernel, prevent breakage with GCC built
         # with nonstandard options
@@ -60,8 +60,8 @@ else
         KBUILD_AFLAGS += -m64
         KBUILD_CFLAGS += -m64
 
-        # Don't autogenerate SSE instructions
-        KBUILD_CFLAGS += -mno-sse
+        # Don't autogenerate MMX or SSE instructions
+        KBUILD_CFLAGS += -mno-mmx -mno-sse
 
         # Use -mpreferred-stack-boundary=3 if supported.
         KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index dce69a256896..d9c11956fce0 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -53,18 +53,18 @@ $(obj)/cpustr.h: $(obj)/mkcpustr FORCE
 
 # How to compile the 16-bit code.  Note we always compile for -march=i386,
 # that way we can complain to the user if the CPU is insufficient.
-KBUILD_CFLAGS   := $(USERINCLUDE) -g -Os -D_SETUP -D__KERNEL__ \
+KBUILD_CFLAGS   := $(USERINCLUDE) -m32 -g -Os -D_SETUP -D__KERNEL__ \
                    -DDISABLE_BRANCH_PROFILING \
                    -Wall -Wstrict-prototypes \
                    -march=i386 -mregparm=3 \
                    -include $(srctree)/$(src)/code16gcc.h \
                    -fno-strict-aliasing -fomit-frame-pointer -fno-pic \
+                   -mno-mmx -mno-sse \
                    $(call cc-option, -ffreestanding) \
                    $(call cc-option, -fno-toplevel-reorder,\
-                        $(call cc-option, -fno-unit-at-a-time)) \
+                   $(call cc-option, -fno-unit-at-a-time)) \
                    $(call cc-option, -fno-stack-protector) \
                    $(call cc-option, -mpreferred-stack-boundary=2)
-KBUILD_CFLAGS   += $(call cc-option, -m32)
 KBUILD_AFLAGS   := $(KBUILD_CFLAGS) -D__ASSEMBLY__
 GCOV_PROFILE := n
 
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index dcd90df10ab4..c8a6792e7842 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -13,6 +13,7 @@ KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING
 cflags-$(CONFIG_X86_32) := -march=i386
 cflags-$(CONFIG_X86_64) := -mcmodel=small
 KBUILD_CFLAGS += $(cflags-y)
+KBUILD_CFLAGS += -mno-mmx -mno-sse
 KBUILD_CFLAGS += $(call cc-option,-ffreestanding)
 KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
 
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 5439117d5c4c..dec48bfaddb8 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -143,6 +143,8 @@ static inline int kvm_apic_id(struct kvm_lapic *apic)
         return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
 }
 
+#define KVM_X2APIC_CID_BITS 0
+
 static void recalculate_apic_map(struct kvm *kvm)
 {
         struct kvm_apic_map *new, *old = NULL;
@@ -180,7 +182,8 @@ static void recalculate_apic_map(struct kvm *kvm)
                 if (apic_x2apic_mode(apic)) {
                         new->ldr_bits = 32;
                         new->cid_shift = 16;
-                        new->cid_mask = new->lid_mask = 0xffff;
+                        new->cid_mask = (1 << KVM_X2APIC_CID_BITS) - 1;
+                        new->lid_mask = 0xffff;
                 } else if (kvm_apic_sw_enabled(apic) &&
                                 !new->cid_mask /* flat mode */ &&
                                 kvm_apic_get_reg(apic, APIC_DFR) == APIC_DFR_CLUSTER) {
@@ -841,7 +844,8 @@ static u32 apic_get_tmcct(struct kvm_lapic *apic)
         ASSERT(apic != NULL);
 
         /* if initial count is 0, current count should also be 0 */
-        if (kvm_apic_get_reg(apic, APIC_TMICT) == 0)
+        if (kvm_apic_get_reg(apic, APIC_TMICT) == 0 ||
+                apic->lapic_timer.period == 0)
                 return 0;
 
         remaining = hrtimer_get_remaining(&apic->lapic_timer.timer);
@@ -1691,7 +1695,6 @@ static void apic_sync_pv_eoi_from_guest(struct kvm_vcpu *vcpu,
 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu)
 {
         u32 data;
-        void *vapic;
 
         if (test_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention))
                 apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic);
@@ -1699,9 +1702,8 @@ void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu)
         if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention))
                 return;
 
-        vapic = kmap_atomic(vcpu->arch.apic->vapic_page);
-        data = *(u32 *)(vapic + offset_in_page(vcpu->arch.apic->vapic_addr));
-        kunmap_atomic(vapic);
+        kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
+                                sizeof(u32));
 
         apic_set_tpr(vcpu->arch.apic, data & 0xff);
 }
@@ -1737,7 +1739,6 @@ void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)
         u32 data, tpr;
         int max_irr, max_isr;
         struct kvm_lapic *apic = vcpu->arch.apic;
-        void *vapic;
 
         apic_sync_pv_eoi_to_guest(vcpu, apic);
 
@@ -1753,18 +1754,24 @@ void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)
                 max_isr = 0;
         data = (tpr & 0xff) | ((max_isr & 0xf0) << 8) | (max_irr << 24);
 
-        vapic = kmap_atomic(vcpu->arch.apic->vapic_page);
-        *(u32 *)(vapic + offset_in_page(vcpu->arch.apic->vapic_addr)) = data;
-        kunmap_atomic(vapic);
+        kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
+                                sizeof(u32));
 }
 
-void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr)
+int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr)
 {
-        vcpu->arch.apic->vapic_addr = vapic_addr;
-        if (vapic_addr)
+        if (vapic_addr) {
+                if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
+                                        &vcpu->arch.apic->vapic_cache,
+                                        vapic_addr, sizeof(u32)))
+                        return -EINVAL;
                 __set_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
-        else
+        } else {
                 __clear_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
+        }
+
+        vcpu->arch.apic->vapic_addr = vapic_addr;
+        return 0;
 }
 
 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index c730ac9fe801..c8b0d0d2da5c 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -34,7 +34,7 @@ struct kvm_lapic {
          */
         void *regs;
         gpa_t vapic_addr;
-        struct page *vapic_page;
+        struct gfn_to_hva_cache vapic_cache;
         unsigned long pending_events;
         unsigned int sipi_vector;
 };
@@ -76,7 +76,7 @@ void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
 void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
 
-void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
+int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
 void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
 
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 21ef1ba184ae..5d004da1e35d 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3214,8 +3214,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
                 r = -EFAULT;
                 if (copy_from_user(&va, argp, sizeof va))
                         goto out;
-                r = 0;
-                kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
+                r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
                 break;
         }
         case KVM_X86_SETUP_MCE: {
@@ -5739,36 +5738,6 @@ static void post_kvm_run_save(struct kvm_vcpu *vcpu)
                         !kvm_event_needs_reinjection(vcpu);
 }
 
-static int vapic_enter(struct kvm_vcpu *vcpu)
-{
-        struct kvm_lapic *apic = vcpu->arch.apic;
-        struct page *page;
-
-        if (!apic || !apic->vapic_addr)
-                return 0;
-
-        page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
-        if (is_error_page(page))
-                return -EFAULT;
-
-        vcpu->arch.apic->vapic_page = page;
-        return 0;
-}
-
-static void vapic_exit(struct kvm_vcpu *vcpu)
-{
-        struct kvm_lapic *apic = vcpu->arch.apic;
-        int idx;
-
-        if (!apic || !apic->vapic_addr)
-                return;
-
-        idx = srcu_read_lock(&vcpu->kvm->srcu);
-        kvm_release_page_dirty(apic->vapic_page);
-        mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
-        srcu_read_unlock(&vcpu->kvm->srcu, idx);
-}
-
 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
 {
         int max_irr, tpr;
@@ -6069,11 +6038,6 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
         struct kvm *kvm = vcpu->kvm;
 
         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
-        r = vapic_enter(vcpu);
-        if (r) {
-                srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
-                return r;
-        }
 
         r = 1;
         while (r > 0) {
@@ -6132,8 +6096,6 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
 
         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
 
-        vapic_exit(vcpu);
-
         return r;
 }
 
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 92c02344a060..cceb813044ef 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -690,13 +690,6 @@ void __init efi_init(void)
 
         set_bit(EFI_MEMMAP, &x86_efi_facility);
 
-#ifdef CONFIG_X86_32
-        if (efi_is_native()) {
-                x86_platform.get_wallclock = efi_get_time;
-                x86_platform.set_wallclock = efi_set_rtc_mmss;
-        }
-#endif
-
 #if EFI_DEBUG
         print_efi_memmap();
 #endif
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 0f92173a12b6..efe4d7220397 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -1070,12 +1070,13 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
         unsigned long status;
 
         bcp = &per_cpu(bau_control, cpu);
-        stat = bcp->statp;
-        stat->s_enters++;
 
         if (bcp->nobau)
                 return cpumask;
 
+        stat = bcp->statp;
+        stat->s_enters++;
+
         if (bcp->busy) {
                 descriptor_status =
                         read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
diff --git a/arch/x86/realmode/rm/Makefile b/arch/x86/realmode/rm/Makefile
index 88692871823f..9cac82588cbc 100644
--- a/arch/x86/realmode/rm/Makefile
+++ b/arch/x86/realmode/rm/Makefile
@@ -73,9 +73,10 @@ KBUILD_CFLAGS	:= $(LINUXINCLUDE) -m32 -g -Os -D_SETUP -D__KERNEL__ -D_WAKEUP \
                    -march=i386 -mregparm=3 \
                    -include $(srctree)/$(src)/../../boot/code16gcc.h \
                    -fno-strict-aliasing -fomit-frame-pointer -fno-pic \
+                   -mno-mmx -mno-sse \
                    $(call cc-option, -ffreestanding) \
                    $(call cc-option, -fno-toplevel-reorder,\
-                        $(call cc-option, -fno-unit-at-a-time)) \
+                   $(call cc-option, -fno-unit-at-a-time)) \
                    $(call cc-option, -fno-stack-protector) \
                    $(call cc-option, -mpreferred-stack-boundary=2)
 KBUILD_AFLAGS   := $(KBUILD_CFLAGS) -D__ASSEMBLY__
diff --git a/drivers/Makefile b/drivers/Makefile
index 3cc8214f9b26..8e3b8b06c0b2 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -118,7 +118,7 @@ obj-$(CONFIG_SGI_SN)		+= sn/
 obj-y                           += firmware/
 obj-$(CONFIG_CRYPTO)            += crypto/
 obj-$(CONFIG_SUPERH)            += sh/
-obj-$(CONFIG_ARCH_SHMOBILE)     += sh/
+obj-$(CONFIG_ARCH_SHMOBILE_LEGACY)      += sh/
 ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
 obj-y                           += clocksource/
 endif
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index e3219dfd736c..1b41fca3d65a 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -29,7 +29,6 @@
 #include <linux/async.h>
 #include <linux/suspend.h>
 #include <trace/events/power.h>
-#include <linux/cpufreq.h>
 #include <linux/cpuidle.h>
 #include <linux/timer.h>
 
@@ -541,7 +540,6 @@ static void dpm_resume_noirq(pm_message_t state)
         dpm_show_time(starttime, state, "noirq");
         resume_device_irqs();
         cpuidle_resume();
-        cpufreq_resume();
 }
 
 /**
@@ -957,7 +955,6 @@ static int dpm_suspend_noirq(pm_message_t state)
         ktime_t starttime = ktime_get();
         int error = 0;
 
-        cpufreq_suspend();
         cpuidle_pause();
         suspend_device_irqs();
         mutex_lock(&dpm_list_mtx);
diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c
index 98745dd77e8c..81f977510775 100644
--- a/drivers/base/regmap/regmap-mmio.c
+++ b/drivers/base/regmap/regmap-mmio.c
@@ -40,7 +40,7 @@ static int regmap_mmio_gather_write(void *context,
 
         BUG_ON(reg_size != 4);
 
-        if (ctx->clk) {
+        if (!IS_ERR(ctx->clk)) {
                 ret = clk_enable(ctx->clk);
                 if (ret < 0)
                         return ret;
@@ -73,7 +73,7 @@ static int regmap_mmio_gather_write(void *context,
                 offset += ctx->val_bytes;
         }
 
-        if (ctx->clk)
+        if (!IS_ERR(ctx->clk))
                 clk_disable(ctx->clk);
 
         return 0;
@@ -96,7 +96,7 @@ static int regmap_mmio_read(void *context,
 
         BUG_ON(reg_size != 4);
 
-        if (ctx->clk) {
+        if (!IS_ERR(ctx->clk)) {
                 ret = clk_enable(ctx->clk);
                 if (ret < 0)
                         return ret;
@@ -129,7 +129,7 @@ static int regmap_mmio_read(void *context,
                 offset += ctx->val_bytes;
         }
 
-        if (ctx->clk)
+        if (!IS_ERR(ctx->clk))
                 clk_disable(ctx->clk);
 
         return 0;
@@ -139,7 +139,7 @@ static void regmap_mmio_free_context(void *context)
 {
         struct regmap_mmio_context *ctx = context;
 
-        if (ctx->clk) {
+        if (!IS_ERR(ctx->clk)) {
                 clk_unprepare(ctx->clk);
                 clk_put(ctx->clk);
         }
@@ -209,6 +209,7 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
 
         ctx->regs = regs;
         ctx->val_bytes = config->val_bits / 8;
+        ctx->clk = ERR_PTR(-ENODEV);
 
         if (clk_id == NULL)
                 return ctx;
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 9c021d9cace0..c2e002100949 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -1549,7 +1549,7 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
                                                 val + (i * val_bytes),
                                                 val_bytes);
                         if (ret != 0)
-                                return ret;
+                                goto out;
                 }
         } else {
                 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
@@ -1743,7 +1743,7 @@ static int _regmap_read(struct regmap *map, unsigned int reg,
 /**
  * regmap_read(): Read a value from a single register
  *
- * @map: Register map to write to
+ * @map: Register map to read from
  * @reg: Register to be read from
  * @val: Pointer to store read value
  *
@@ -1770,7 +1770,7 @@ EXPORT_SYMBOL_GPL(regmap_read);
 /**
  * regmap_raw_read(): Read raw data from the device
  *
- * @map: Register map to write to
+ * @map: Register map to read from
  * @reg: First register to be read from
  * @val: Pointer to store read value
  * @val_len: Size of data to read
@@ -1882,7 +1882,7 @@ EXPORT_SYMBOL_GPL(regmap_fields_read);
 /**
  * regmap_bulk_read(): Read multiple registers from the device
  *
- * @map: Register map to write to
+ * @map: Register map to read from
  * @reg: First register to be read from
  * @val: Pointer to store read value, in native register size for device
  * @val_count: Number of registers to read
diff --git a/drivers/block/null_blk.c b/drivers/block/null_blk.c
index ea192ec029c4..f370fc13aea5 100644
--- a/drivers/block/null_blk.c
+++ b/drivers/block/null_blk.c
@@ -495,23 +495,23 @@ static int null_add_dev(void)
 
         spin_lock_init(&nullb->lock);
 
+        if (queue_mode == NULL_Q_MQ && use_per_node_hctx)
+                submit_queues = nr_online_nodes;
+
         if (setup_queues(nullb))
                 goto err;
 
         if (queue_mode == NULL_Q_MQ) {
                 null_mq_reg.numa_node = home_node;
                 null_mq_reg.queue_depth = hw_queue_depth;
+                null_mq_reg.nr_hw_queues = submit_queues;
 
                 if (use_per_node_hctx) {
                         null_mq_reg.ops->alloc_hctx = null_alloc_hctx;
                         null_mq_reg.ops->free_hctx = null_free_hctx;
-
-                        null_mq_reg.nr_hw_queues = nr_online_nodes;
                 } else {
                         null_mq_reg.ops->alloc_hctx = blk_mq_alloc_single_hw_queue;
                         null_mq_reg.ops->free_hctx = blk_mq_free_single_hw_queue;
-
-                        null_mq_reg.nr_hw_queues = submit_queues;
                 }
 
                 nullb->q = blk_mq_init_queue(&null_mq_reg, nullb);
diff --git a/drivers/char/i8k.c b/drivers/char/i8k.c
index 40cc0cf2ded6..e6939e13e338 100644
--- a/drivers/char/i8k.c
+++ b/drivers/char/i8k.c
@@ -664,6 +664,13 @@ static struct dmi_system_id __initdata i8k_dmi_table[] = {
                         DMI_MATCH(DMI_PRODUCT_NAME, "Vostro"),
                 },
         },
+        {
+                .ident = "Dell XPS421",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "XPS L421X"),
+                },
+        },
         { }
 };
 
diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile
index f49fac2d193a..f7dfb72884a4 100644
--- a/drivers/clk/tegra/Makefile
+++ b/drivers/clk/tegra/Makefile
@@ -6,7 +6,12 @@ obj-y					+= clk-periph-gate.o
 obj-y                                   += clk-pll.o
 obj-y                                   += clk-pll-out.o
 obj-y                                   += clk-super.o
-
+obj-y                                   += clk-tegra-audio.o
+obj-y                                   += clk-tegra-periph.o
+obj-y                                   += clk-tegra-pmc.o
+obj-y                                   += clk-tegra-fixed.o
+obj-y                                   += clk-tegra-super-gen4.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += clk-tegra20.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += clk-tegra30.o
 obj-$(CONFIG_ARCH_TEGRA_114_SOC)        += clk-tegra114.o
+obj-$(CONFIG_ARCH_TEGRA_124_SOC)        += clk-tegra124.o
diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h
new file mode 100644
index 000000000000..cf0c323f2c36
--- /dev/null
+++ b/drivers/clk/tegra/clk-id.h
@@ -0,0 +1,235 @@
+/*
+ * This header provides IDs for clocks common between several Tegra SoCs
+ */
+#ifndef _TEGRA_CLK_ID_H
+#define _TEGRA_CLK_ID_H
+
+enum clk_id {
+        tegra_clk_actmon,
+        tegra_clk_adx,
+        tegra_clk_adx1,
+        tegra_clk_afi,
+        tegra_clk_amx,
+        tegra_clk_amx1,
+        tegra_clk_apbdma,
+        tegra_clk_apbif,
+        tegra_clk_audio0,
+        tegra_clk_audio0_2x,
+        tegra_clk_audio0_mux,
+        tegra_clk_audio1,
+        tegra_clk_audio1_2x,
+        tegra_clk_audio1_mux,
+        tegra_clk_audio2,
+        tegra_clk_audio2_2x,
+        tegra_clk_audio2_mux,
+        tegra_clk_audio3,
+        tegra_clk_audio3_2x,
+        tegra_clk_audio3_mux,
+        tegra_clk_audio4,
+        tegra_clk_audio4_2x,
+        tegra_clk_audio4_mux,
+        tegra_clk_blink,
+        tegra_clk_bsea,
+        tegra_clk_bsev,
+        tegra_clk_cclk_g,
+        tegra_clk_cclk_lp,
+        tegra_clk_cilab,
+        tegra_clk_cilcd,
+        tegra_clk_cile,
+        tegra_clk_clk_32k,
+        tegra_clk_clk72Mhz,
+        tegra_clk_clk_m,
+        tegra_clk_clk_m_div2,
+        tegra_clk_clk_m_div4,
+        tegra_clk_clk_out_1,
+        tegra_clk_clk_out_1_mux,
+        tegra_clk_clk_out_2,
+        tegra_clk_clk_out_2_mux,
+        tegra_clk_clk_out_3,
+        tegra_clk_clk_out_3_mux,
+        tegra_clk_cml0,
+        tegra_clk_cml1,
+        tegra_clk_csi,
+        tegra_clk_csite,
+        tegra_clk_csus,
+        tegra_clk_cve,
+        tegra_clk_dam0,
+        tegra_clk_dam1,
+        tegra_clk_dam2,
+        tegra_clk_d_audio,
+        tegra_clk_dds,
+        tegra_clk_dfll_ref,
+        tegra_clk_dfll_soc,
+        tegra_clk_disp1,
+        tegra_clk_disp2,
+        tegra_clk_dp2,
+        tegra_clk_dpaux,
+        tegra_clk_dsia,
+        tegra_clk_dsialp,
+        tegra_clk_dsia_mux,
+        tegra_clk_dsib,
+        tegra_clk_dsiblp,
+        tegra_clk_dsib_mux,
+        tegra_clk_dtv,
+        tegra_clk_emc,
+        tegra_clk_entropy,
+        tegra_clk_epp,
+        tegra_clk_epp_8,
+        tegra_clk_extern1,
+        tegra_clk_extern2,
+        tegra_clk_extern3,
+        tegra_clk_fuse,
+        tegra_clk_fuse_burn,
+        tegra_clk_gpu,
+        tegra_clk_gr2d,
+        tegra_clk_gr2d_8,
+        tegra_clk_gr3d,
+        tegra_clk_gr3d_8,
+        tegra_clk_hclk,
+        tegra_clk_hda,
+        tegra_clk_hda2codec_2x,
+        tegra_clk_hda2hdmi,
+        tegra_clk_hdmi,
+        tegra_clk_hdmi_audio,
+        tegra_clk_host1x,
+        tegra_clk_host1x_8,
+        tegra_clk_i2c1,
+        tegra_clk_i2c2,
+        tegra_clk_i2c3,
+        tegra_clk_i2c4,
+        tegra_clk_i2c5,
+        tegra_clk_i2c6,
+        tegra_clk_i2cslow,
+        tegra_clk_i2s0,
+        tegra_clk_i2s0_sync,
+        tegra_clk_i2s1,
+        tegra_clk_i2s1_sync,
+        tegra_clk_i2s2,
+        tegra_clk_i2s2_sync,
+        tegra_clk_i2s3,
+        tegra_clk_i2s3_sync,
+        tegra_clk_i2s4,
+        tegra_clk_i2s4_sync,
+        tegra_clk_isp,
+        tegra_clk_isp_8,
+        tegra_clk_ispb,
+        tegra_clk_kbc,
+        tegra_clk_kfuse,
+        tegra_clk_la,
+        tegra_clk_mipi,
+        tegra_clk_mipi_cal,
+        tegra_clk_mpe,
+        tegra_clk_mselect,
+        tegra_clk_msenc,
+        tegra_clk_ndflash,
+        tegra_clk_ndflash_8,
+        tegra_clk_ndspeed,
+        tegra_clk_ndspeed_8,
+        tegra_clk_nor,
+        tegra_clk_owr,
+        tegra_clk_pcie,
+        tegra_clk_pclk,
+        tegra_clk_pll_a,
+        tegra_clk_pll_a_out0,
+        tegra_clk_pll_c,
+        tegra_clk_pll_c2,
+        tegra_clk_pll_c3,
+        tegra_clk_pll_c4,
+        tegra_clk_pll_c_out1,
+        tegra_clk_pll_d,
+        tegra_clk_pll_d2,
+        tegra_clk_pll_d2_out0,
+        tegra_clk_pll_d_out0,
+        tegra_clk_pll_dp,
+        tegra_clk_pll_e_out0,
+        tegra_clk_pll_m,
+        tegra_clk_pll_m_out1,
+        tegra_clk_pll_p,
+        tegra_clk_pll_p_out1,
+        tegra_clk_pll_p_out2,
+        tegra_clk_pll_p_out2_int,
+        tegra_clk_pll_p_out3,
+        tegra_clk_pll_p_out4,
+        tegra_clk_pll_p_out5,
+        tegra_clk_pll_ref,
+        tegra_clk_pll_re_out,
+        tegra_clk_pll_re_vco,
+        tegra_clk_pll_u,
+        tegra_clk_pll_u_12m,
+        tegra_clk_pll_u_480m,
+        tegra_clk_pll_u_48m,
+        tegra_clk_pll_u_60m,
+        tegra_clk_pll_x,
+        tegra_clk_pll_x_out0,
+        tegra_clk_pwm,
+        tegra_clk_rtc,
+        tegra_clk_sata,
+        tegra_clk_sata_cold,
+        tegra_clk_sata_oob,
+        tegra_clk_sbc1,
+        tegra_clk_sbc1_8,
+        tegra_clk_sbc2,
+        tegra_clk_sbc2_8,
+        tegra_clk_sbc3,
+        tegra_clk_sbc3_8,
+        tegra_clk_sbc4,
+        tegra_clk_sbc4_8,
+        tegra_clk_sbc5,
+        tegra_clk_sbc5_8,
+        tegra_clk_sbc6,
+        tegra_clk_sbc6_8,
+        tegra_clk_sclk,
+        tegra_clk_sdmmc1,
+        tegra_clk_sdmmc2,
+        tegra_clk_sdmmc3,
+        tegra_clk_sdmmc4,
+        tegra_clk_se,
+        tegra_clk_soc_therm,
+        tegra_clk_sor0,
+        tegra_clk_sor0_lvds,
+        tegra_clk_spdif,
+        tegra_clk_spdif_2x,
+        tegra_clk_spdif_in,
+        tegra_clk_spdif_in_sync,
+        tegra_clk_spdif_mux,
+        tegra_clk_spdif_out,
+        tegra_clk_timer,
+        tegra_clk_trace,
+        tegra_clk_tsec,
+        tegra_clk_tsensor,
+        tegra_clk_tvdac,
+        tegra_clk_tvo,
+        tegra_clk_uarta,
+        tegra_clk_uartb,
+        tegra_clk_uartc,
+        tegra_clk_uartd,
+        tegra_clk_uarte,
+        tegra_clk_usb2,
+        tegra_clk_usb3,
+        tegra_clk_usbd,
+        tegra_clk_vcp,
+        tegra_clk_vde,
+        tegra_clk_vde_8,
+        tegra_clk_vfir,
+        tegra_clk_vi,
+        tegra_clk_vi_8,
+        tegra_clk_vi_9,
+        tegra_clk_vic03,
+        tegra_clk_vim2_clk,
+        tegra_clk_vimclk_sync,
+        tegra_clk_vi_sensor,
+        tegra_clk_vi_sensor2,
+        tegra_clk_vi_sensor_8,
+        tegra_clk_xusb_dev,
+        tegra_clk_xusb_dev_src,
+        tegra_clk_xusb_falcon_src,
+        tegra_clk_xusb_fs_src,
+        tegra_clk_xusb_host,
+        tegra_clk_xusb_host_src,
+        tegra_clk_xusb_hs_src,
+        tegra_clk_xusb_ss,
+        tegra_clk_xusb_ss_src,
+        tegra_clk_max,
+};
+
+#endif  /* _TEGRA_CLK_ID_H */
diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index bafee9895a24..507015314827 100644
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -36,8 +36,6 @@ static DEFINE_SPINLOCK(periph_ref_lock);
 
 #define read_rst(gate) \
         readl_relaxed(gate->clk_base + (gate->regs->rst_reg))
-#define write_rst_set(val, gate) \
-        writel_relaxed(val, gate->clk_base + (gate->regs->rst_set_reg))
 #define write_rst_clr(val, gate) \
         writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg))
 
@@ -123,26 +121,6 @@ static void clk_periph_disable(struct clk_hw *hw)
         spin_unlock_irqrestore(&periph_ref_lock, flags);
 }
 
-void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert)
-{
-        if (gate->flags & TEGRA_PERIPH_NO_RESET)
-                return;
-
-        if (assert) {
-                /*
-                 * If peripheral is in the APB bus then read the APB bus to
-                 * flush the write operation in apb bus. This will avoid the
-                 * peripheral access after disabling clock
-                 */
-                if (gate->flags & TEGRA_PERIPH_ON_APB)
-                        tegra_read_chipid();
-
-                write_rst_set(periph_clk_to_bit(gate), gate);
-        } else {
-                write_rst_clr(periph_clk_to_bit(gate), gate);
-        }
-}
-
 const struct clk_ops tegra_clk_periph_gate_ops = {
         .is_enabled = clk_periph_is_enabled,
         .enable = clk_periph_enable,
@@ -151,12 +129,16 @@ const struct clk_ops tegra_clk_periph_gate_ops = {
 
 struct clk *tegra_clk_register_periph_gate(const char *name,
                 const char *parent_name, u8 gate_flags, void __iomem *clk_base,
-                unsigned long flags, int clk_num,
-                struct tegra_clk_periph_regs *pregs, int *enable_refcnt)
+                unsigned long flags, int clk_num, int *enable_refcnt)
 {
         struct tegra_clk_periph_gate *gate;
         struct clk *clk;
         struct clk_init_data init;
+        struct tegra_clk_periph_regs *pregs;
+
+        pregs = get_reg_bank(clk_num);
+        if (!pregs)
+                return ERR_PTR(-EINVAL);
 
         gate = kzalloc(sizeof(*gate), GFP_KERNEL);
         if (!gate) {
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index b2309d37a963..c534043c0481 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -111,46 +111,6 @@ static void clk_periph_disable(struct clk_hw *hw)
         gate_ops->disable(gate_hw);
 }
 
-void tegra_periph_reset_deassert(struct clk *c)
-{
-        struct clk_hw *hw = __clk_get_hw(c);
-        struct tegra_clk_periph *periph = to_clk_periph(hw);
-        struct tegra_clk_periph_gate *gate;
-
-        if (periph->magic != TEGRA_CLK_PERIPH_MAGIC) {
-                gate = to_clk_periph_gate(hw);
-                if (gate->magic != TEGRA_CLK_PERIPH_GATE_MAGIC) {
-                        WARN_ON(1);
-                        return;
-                }
-        } else {
-                gate = &periph->gate;
-        }
-
-        tegra_periph_reset(gate, 0);
-}
-EXPORT_SYMBOL(tegra_periph_reset_deassert);
-
-void tegra_periph_reset_assert(struct clk *c)
-{
-        struct clk_hw *hw = __clk_get_hw(c);
-        struct tegra_clk_periph *periph = to_clk_periph(hw);
-        struct tegra_clk_periph_gate *gate;
-
-        if (periph->magic != TEGRA_CLK_PERIPH_MAGIC) {
-                gate = to_clk_periph_gate(hw);
-                if (gate->magic != TEGRA_CLK_PERIPH_GATE_MAGIC) {
-                        WARN_ON(1);
-                        return;
-                }
-        } else {
-                gate = &periph->gate;
-        }
-
-        tegra_periph_reset(gate, 1);
-}
-EXPORT_SYMBOL(tegra_periph_reset_assert);
-
 const struct clk_ops tegra_clk_periph_ops = {
         .get_parent = clk_periph_get_parent,
         .set_parent = clk_periph_set_parent,
@@ -170,27 +130,50 @@ const struct clk_ops tegra_clk_periph_nodiv_ops = {
         .disable = clk_periph_disable,
 };
 
+const struct clk_ops tegra_clk_periph_no_gate_ops = {
+        .get_parent = clk_periph_get_parent,
+        .set_parent = clk_periph_set_parent,
+        .recalc_rate = clk_periph_recalc_rate,
+        .round_rate = clk_periph_round_rate,
+        .set_rate = clk_periph_set_rate,
+};
+
 static struct clk *_tegra_clk_register_periph(const char *name,
                         const char **parent_names, int num_parents,
                         struct tegra_clk_periph *periph,
-                        void __iomem *clk_base, u32 offset, bool div,
+                        void __iomem *clk_base, u32 offset,
                         unsigned long flags)
 {
         struct clk *clk;
         struct clk_init_data init;
+        struct tegra_clk_periph_regs *bank;
+        bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV);
+
+        if (periph->gate.flags & TEGRA_PERIPH_NO_DIV) {
+                flags |= CLK_SET_RATE_PARENT;
+                init.ops = &tegra_clk_periph_nodiv_ops;
+        } else if (periph->gate.flags & TEGRA_PERIPH_NO_GATE)
+                init.ops = &tegra_clk_periph_no_gate_ops;
+        else
+                init.ops = &tegra_clk_periph_ops;
 
         init.name = name;
-        init.ops = div ? &tegra_clk_periph_ops : &tegra_clk_periph_nodiv_ops;
         init.flags = flags;
         init.parent_names = parent_names;
         init.num_parents = num_parents;
 
+        bank = get_reg_bank(periph->gate.clk_num);
+        if (!bank)
+                return ERR_PTR(-EINVAL);
+
         /* Data in .init is copied by clk_register(), so stack variable OK */
         periph->hw.init = &init;
         periph->magic = TEGRA_CLK_PERIPH_MAGIC;
         periph->mux.reg = clk_base + offset;
         periph->divider.reg = div ? (clk_base + offset) : NULL;
         periph->gate.clk_base = clk_base;
+        periph->gate.regs = bank;
+        periph->gate.enable_refcnt = periph_clk_enb_refcnt;
 
         clk = clk_register(NULL, &periph->hw);
         if (IS_ERR(clk))
@@ -209,7 +192,7 @@ struct clk *tegra_clk_register_periph(const char *name,
                 u32 offset, unsigned long flags)
 {
         return _tegra_clk_register_periph(name, parent_names, num_parents,
-                        periph, clk_base, offset, true, flags);
+                        periph, clk_base, offset, flags);
 }
 
 struct clk *tegra_clk_register_periph_nodiv(const char *name,
@@ -217,6 +200,7 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name,
                 struct tegra_clk_periph *periph, void __iomem *clk_base,
                 u32 offset)
 {
+        periph->gate.flags |= TEGRA_PERIPH_NO_DIV;
         return _tegra_clk_register_periph(name, parent_names, num_parents,
-                        periph, clk_base, offset, false, CLK_SET_RATE_PARENT);
+                        periph, clk_base, offset, CLK_SET_RATE_PARENT);
 }
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 197074a57754..2dd432266ef6 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -77,7 +77,23 @@
 #define PLLE_MISC_SETUP_VALUE (7 << PLLE_MISC_SETUP_BASE_SHIFT)
 
 #define PLLE_SS_CTRL 0x68
-#define PLLE_SS_DISABLE (7 << 10)
+#define PLLE_SS_CNTL_BYPASS_SS BIT(10)
+#define PLLE_SS_CNTL_INTERP_RESET BIT(11)
+#define PLLE_SS_CNTL_SSC_BYP BIT(12)
+#define PLLE_SS_CNTL_CENTER BIT(14)
+#define PLLE_SS_CNTL_INVERT BIT(15)
+#define PLLE_SS_DISABLE (PLLE_SS_CNTL_BYPASS_SS | PLLE_SS_CNTL_INTERP_RESET |\
+                                PLLE_SS_CNTL_SSC_BYP)
+#define PLLE_SS_MAX_MASK 0x1ff
+#define PLLE_SS_MAX_VAL 0x25
+#define PLLE_SS_INC_MASK (0xff << 16)
+#define PLLE_SS_INC_VAL (0x1 << 16)
+#define PLLE_SS_INCINTRV_MASK (0x3f << 24)
+#define PLLE_SS_INCINTRV_VAL (0x20 << 24)
+#define PLLE_SS_COEFFICIENTS_MASK \
+        (PLLE_SS_MAX_MASK | PLLE_SS_INC_MASK | PLLE_SS_INCINTRV_MASK)
+#define PLLE_SS_COEFFICIENTS_VAL \
+        (PLLE_SS_MAX_VAL | PLLE_SS_INC_VAL | PLLE_SS_INCINTRV_VAL)
 
 #define PLLE_AUX_PLLP_SEL       BIT(2)
 #define PLLE_AUX_ENABLE_SWCTL   BIT(4)
@@ -121,6 +137,36 @@
 #define PMC_SATA_PWRGT_PLLE_IDDQ_VALUE BIT(5)
 #define PMC_SATA_PWRGT_PLLE_IDDQ_SWCTL BIT(4)
 
+#define PLLSS_MISC_KCP          0
+#define PLLSS_MISC_KVCO         0
+#define PLLSS_MISC_SETUP        0
+#define PLLSS_EN_SDM            0
+#define PLLSS_EN_SSC            0
+#define PLLSS_EN_DITHER2        0
+#define PLLSS_EN_DITHER         1
+#define PLLSS_SDM_RESET         0
+#define PLLSS_CLAMP             0
+#define PLLSS_SDM_SSC_MAX       0
+#define PLLSS_SDM_SSC_MIN       0
+#define PLLSS_SDM_SSC_STEP      0
+#define PLLSS_SDM_DIN           0
+#define PLLSS_MISC_DEFAULT ((PLLSS_MISC_KCP << 25) | \
+                            (PLLSS_MISC_KVCO << 24) | \
+                            PLLSS_MISC_SETUP)
+#define PLLSS_CFG_DEFAULT ((PLLSS_EN_SDM << 31) | \
+                           (PLLSS_EN_SSC << 30) | \
+                           (PLLSS_EN_DITHER2 << 29) | \
+                           (PLLSS_EN_DITHER << 28) | \
+                           (PLLSS_SDM_RESET) << 27 | \
+                           (PLLSS_CLAMP << 22))
+#define PLLSS_CTRL1_DEFAULT \
+                        ((PLLSS_SDM_SSC_MAX << 16) | PLLSS_SDM_SSC_MIN)
+#define PLLSS_CTRL2_DEFAULT \
+                        ((PLLSS_SDM_SSC_STEP << 16) | PLLSS_SDM_DIN)
+#define PLLSS_LOCK_OVERRIDE     BIT(24)
+#define PLLSS_REF_SRC_SEL_SHIFT 25
+#define PLLSS_REF_SRC_SEL_MASK  (3 << PLLSS_REF_SRC_SEL_SHIFT)
+
 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
 #define pll_readl_base(p) pll_readl(p->params->base_reg, p)
 #define pll_readl_misc(p) pll_readl(p->params->misc_reg, p)
@@ -134,7 +180,7 @@
 #define mask(w) ((1 << (w)) - 1)
 #define divm_mask(p) mask(p->params->div_nmp->divm_width)
 #define divn_mask(p) mask(p->params->div_nmp->divn_width)
-#define divp_mask(p) (p->flags & TEGRA_PLLU ? PLLU_POST_DIVP_MASK :     \
+#define divp_mask(p) (p->params->flags & TEGRA_PLLU ? PLLU_POST_DIVP_MASK :\
                       mask(p->params->div_nmp->divp_width))
 
 #define divm_max(p) (divm_mask(p))
@@ -154,10 +200,10 @@ static void clk_pll_enable_lock(struct tegra_clk_pll *pll)
 {
         u32 val;
 
-        if (!(pll->flags & TEGRA_PLL_USE_LOCK))
+        if (!(pll->params->flags & TEGRA_PLL_USE_LOCK))
                 return;
 
-        if (!(pll->flags & TEGRA_PLL_HAS_LOCK_ENABLE))
+        if (!(pll->params->flags & TEGRA_PLL_HAS_LOCK_ENABLE))
                 return;
 
         val = pll_readl_misc(pll);
@@ -171,13 +217,13 @@ static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll)
         u32 val, lock_mask;
         void __iomem *lock_addr;
 
-        if (!(pll->flags & TEGRA_PLL_USE_LOCK)) {
+        if (!(pll->params->flags & TEGRA_PLL_USE_LOCK)) {
                 udelay(pll->params->lock_delay);
                 return 0;
         }
 
         lock_addr = pll->clk_base;
-        if (pll->flags & TEGRA_PLL_LOCK_MISC)
+        if (pll->params->flags & TEGRA_PLL_LOCK_MISC)
                 lock_addr += pll->params->misc_reg;
         else
                 lock_addr += pll->params->base_reg;
@@ -204,7 +250,7 @@ static int clk_pll_is_enabled(struct clk_hw *hw)
         struct tegra_clk_pll *pll = to_clk_pll(hw);
         u32 val;
 
-        if (pll->flags & TEGRA_PLLM) {
+        if (pll->params->flags & TEGRA_PLLM) {
                 val = readl_relaxed(pll->pmc + PMC_PLLP_WB0_OVERRIDE);
                 if (val & PMC_PLLP_WB0_OVERRIDE_PLLM_OVERRIDE)
                         return val & PMC_PLLP_WB0_OVERRIDE_PLLM_ENABLE ? 1 : 0;
@@ -223,12 +269,12 @@ static void _clk_pll_enable(struct clk_hw *hw)
         clk_pll_enable_lock(pll);
 
         val = pll_readl_base(pll);
-        if (pll->flags & TEGRA_PLL_BYPASS)
+        if (pll->params->flags & TEGRA_PLL_BYPASS)
                 val &= ~PLL_BASE_BYPASS;
         val |= PLL_BASE_ENABLE;
         pll_writel_base(val, pll);
 
-        if (pll->flags & TEGRA_PLLM) {
+        if (pll->params->flags & TEGRA_PLLM) {
                 val = readl_relaxed(pll->pmc + PMC_PLLP_WB0_OVERRIDE);
                 val |= PMC_PLLP_WB0_OVERRIDE_PLLM_ENABLE;
                 writel_relaxed(val, pll->pmc + PMC_PLLP_WB0_OVERRIDE);
@@ -241,12 +287,12 @@ static void _clk_pll_disable(struct clk_hw *hw)
         u32 val;
 
         val = pll_readl_base(pll);
-        if (pll->flags & TEGRA_PLL_BYPASS)
+        if (pll->params->flags & TEGRA_PLL_BYPASS)
                 val &= ~PLL_BASE_BYPASS;
         val &= ~PLL_BASE_ENABLE;
         pll_writel_base(val, pll);
 
-        if (pll->flags & TEGRA_PLLM) {
+        if (pll->params->flags & TEGRA_PLLM) {
                 val = readl_relaxed(pll->pmc + PMC_PLLP_WB0_OVERRIDE);
                 val &= ~PMC_PLLP_WB0_OVERRIDE_PLLM_ENABLE;
                 writel_relaxed(val, pll->pmc + PMC_PLLP_WB0_OVERRIDE);
@@ -326,7 +372,7 @@ static int _get_table_rate(struct clk_hw *hw,
         struct tegra_clk_pll *pll = to_clk_pll(hw);
         struct tegra_clk_pll_freq_table *sel;
 
-        for (sel = pll->freq_table; sel->input_rate != 0; sel++)
+        for (sel = pll->params->freq_table; sel->input_rate != 0; sel++)
                 if (sel->input_rate == parent_rate &&
                     sel->output_rate == rate)
                         break;
@@ -389,12 +435,11 @@ static int _calc_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg,
         if (cfg->m > divm_max(pll) || cfg->n > divn_max(pll) ||
             (1 << p_div) > divp_max(pll)
             || cfg->output_rate > pll->params->vco_max) {
-                pr_err("%s: Failed to set %s rate %lu\n",
-                       __func__, __clk_get_name(hw->clk), rate);
-                WARN_ON(1);
                 return -EINVAL;
         }
 
+        cfg->output_rate >>= p_div;
+
         if (pll->params->pdiv_tohw) {
                 ret = _p_div_to_hw(hw, 1 << p_div);
                 if (ret < 0)
@@ -414,7 +459,7 @@ static void _update_pll_mnp(struct tegra_clk_pll *pll,
         struct tegra_clk_pll_params *params = pll->params;
         struct div_nmp *div_nmp = params->div_nmp;
 
-        if ((pll->flags & TEGRA_PLLM) &&
+        if ((params->flags & TEGRA_PLLM) &&
                 (pll_override_readl(PMC_PLLP_WB0_OVERRIDE, pll) &
                         PMC_PLLP_WB0_OVERRIDE_PLLM_OVERRIDE)) {
                 val = pll_override_readl(params->pmc_divp_reg, pll);
@@ -450,7 +495,7 @@ static void _get_pll_mnp(struct tegra_clk_pll *pll,
         struct tegra_clk_pll_params *params = pll->params;
         struct div_nmp *div_nmp = params->div_nmp;
 
-        if ((pll->flags & TEGRA_PLLM) &&
+        if ((params->flags & TEGRA_PLLM) &&
                 (pll_override_readl(PMC_PLLP_WB0_OVERRIDE, pll) &
                         PMC_PLLP_WB0_OVERRIDE_PLLM_OVERRIDE)) {
                 val = pll_override_readl(params->pmc_divp_reg, pll);
@@ -479,11 +524,11 @@ static void _update_pll_cpcon(struct tegra_clk_pll *pll,
         val &= ~(PLL_MISC_CPCON_MASK << PLL_MISC_CPCON_SHIFT);
         val |= cfg->cpcon << PLL_MISC_CPCON_SHIFT;
 
-        if (pll->flags & TEGRA_PLL_SET_LFCON) {
+        if (pll->params->flags & TEGRA_PLL_SET_LFCON) {
                 val &= ~(PLL_MISC_LFCON_MASK << PLL_MISC_LFCON_SHIFT);
                 if (cfg->n >= PLLDU_LFCON_SET_DIVN)
                         val |= 1 << PLL_MISC_LFCON_SHIFT;
-        } else if (pll->flags & TEGRA_PLL_SET_DCCON) {
+        } else if (pll->params->flags & TEGRA_PLL_SET_DCCON) {
                 val &= ~(1 << PLL_MISC_DCCON_SHIFT);
                 if (rate >= (pll->params->vco_max >> 1))
                         val |= 1 << PLL_MISC_DCCON_SHIFT;
@@ -505,7 +550,7 @@ static int _program_pll(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg,
 
         _update_pll_mnp(pll, cfg);
 
-        if (pll->flags & TEGRA_PLL_HAS_CPCON)
+        if (pll->params->flags & TEGRA_PLL_HAS_CPCON)
                 _update_pll_cpcon(pll, cfg, rate);
 
         if (state) {
@@ -524,11 +569,11 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
         unsigned long flags = 0;
         int ret = 0;
 
-        if (pll->flags & TEGRA_PLL_FIXED) {
-                if (rate != pll->fixed_rate) {
+        if (pll->params->flags & TEGRA_PLL_FIXED) {
+                if (rate != pll->params->fixed_rate) {
                         pr_err("%s: Can not change %s fixed rate %lu to %lu\n",
                                 __func__, __clk_get_name(hw->clk),
-                                pll->fixed_rate, rate);
+                                pll->params->fixed_rate, rate);
                         return -EINVAL;
                 }
                 return 0;
@@ -536,6 +581,8 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
 
         if (_get_table_rate(hw, &cfg, rate, parent_rate) &&
             _calc_rate(hw, &cfg, rate, parent_rate)) {
+                pr_err("%s: Failed to set %s rate %lu\n", __func__,
+                       __clk_get_name(hw->clk), rate);
                 WARN_ON(1);
                 return -EINVAL;
         }
@@ -559,18 +606,16 @@ static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
         struct tegra_clk_pll *pll = to_clk_pll(hw);
         struct tegra_clk_pll_freq_table cfg;
 
-        if (pll->flags & TEGRA_PLL_FIXED)
-                return pll->fixed_rate;
+        if (pll->params->flags & TEGRA_PLL_FIXED)
+                return pll->params->fixed_rate;
 
         /* PLLM is used for memory; we do not change rate */
-        if (pll->flags & TEGRA_PLLM)
+        if (pll->params->flags & TEGRA_PLLM)
                 return __clk_get_rate(hw->clk);
 
         if (_get_table_rate(hw, &cfg, rate, *prate) &&
-            _calc_rate(hw, &cfg, rate, *prate)) {
-                WARN_ON(1);
+            _calc_rate(hw, &cfg, rate, *prate))
                 return -EINVAL;
-        }
 
         return cfg.output_rate;
 }
@@ -586,17 +631,19 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
 
         val = pll_readl_base(pll);
 
-        if ((pll->flags & TEGRA_PLL_BYPASS) && (val & PLL_BASE_BYPASS))
+        if ((pll->params->flags & TEGRA_PLL_BYPASS) && (val & PLL_BASE_BYPASS))
                 return parent_rate;
 
-        if ((pll->flags & TEGRA_PLL_FIXED) && !(val & PLL_BASE_OVERRIDE)) {
+        if ((pll->params->flags & TEGRA_PLL_FIXED) &&
+                        !(val & PLL_BASE_OVERRIDE)) {
                 struct tegra_clk_pll_freq_table sel;
-                if (_get_table_rate(hw, &sel, pll->fixed_rate, parent_rate)) {
+                if (_get_table_rate(hw, &sel, pll->params->fixed_rate,
+                                        parent_rate)) {
                         pr_err("Clock %s has unknown fixed frequency\n",
                                __clk_get_name(hw->clk));
                         BUG();
                 }
-                return pll->fixed_rate;
+                return pll->params->fixed_rate;
         }
 
         _get_pll_mnp(pll, &cfg);
@@ -664,7 +711,7 @@ static int clk_plle_enable(struct clk_hw *hw)
         u32 val;
         int err;
 
-        if (_get_table_rate(hw, &sel, pll->fixed_rate, input_rate))
+        if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))
                 return -EINVAL;
 
         clk_pll_disable(hw);
@@ -680,7 +727,7 @@ static int clk_plle_enable(struct clk_hw *hw)
                         return err;
         }
 
-        if (pll->flags & TEGRA_PLLE_CONFIGURE) {
+        if (pll->params->flags & TEGRA_PLLE_CONFIGURE) {
                 /* configure dividers */
                 val = pll_readl_base(pll);
                 val &= ~(divm_mask(pll) | divn_mask(pll) | divp_mask(pll));
@@ -744,7 +791,7 @@ const struct clk_ops tegra_clk_plle_ops = {
         .enable = clk_plle_enable,
 };
 
-#ifdef CONFIG_ARCH_TEGRA_114_SOC
+#if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC)
 
 static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params,
                            unsigned long parent_rate)
@@ -755,6 +802,48 @@ static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params,
                 return 1;
 }
 
+static unsigned long _clip_vco_min(unsigned long vco_min,
+                                   unsigned long parent_rate)
+{
+        return DIV_ROUND_UP(vco_min, parent_rate) * parent_rate;
+}
+
+static int _setup_dynamic_ramp(struct tegra_clk_pll_params *pll_params,
+                               void __iomem *clk_base,
+                               unsigned long parent_rate)
+{
+        u32 val;
+        u32 step_a, step_b;
+
+        switch (parent_rate) {
+        case 12000000:
+        case 13000000:
+        case 26000000:
+                step_a = 0x2B;
+                step_b = 0x0B;
+                break;
+        case 16800000:
+                step_a = 0x1A;
+                step_b = 0x09;
+                break;
+        case 19200000:
+                step_a = 0x12;
+                step_b = 0x08;
+                break;
+        default:
+                pr_err("%s: Unexpected reference rate %lu\n",
+                        __func__, parent_rate);
+                WARN_ON(1);
+                return -EINVAL;
+        }
+
+        val = step_a << pll_params->stepa_shift;
+        val |= step_b << pll_params->stepb_shift;
+        writel_relaxed(val, clk_base + pll_params->dyn_ramp_reg);
+
+        return 0;
+}
+
 static int clk_pll_iddq_enable(struct clk_hw *hw)
 {
         struct tegra_clk_pll *pll = to_clk_pll(hw);
@@ -1173,7 +1262,7 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw)
         unsigned long flags = 0;
         unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));
 
-        if (_get_table_rate(hw, &sel, pll->fixed_rate, input_rate))
+        if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))
                 return -EINVAL;
 
         if (pll->lock)
@@ -1217,6 +1306,18 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw)
         if (ret < 0)
                 goto out;
 
+        val = pll_readl(PLLE_SS_CTRL, pll);
+        val &= ~(PLLE_SS_CNTL_CENTER | PLLE_SS_CNTL_INVERT);
+        val &= ~PLLE_SS_COEFFICIENTS_MASK;
+        val |= PLLE_SS_COEFFICIENTS_VAL;
+        pll_writel(val, PLLE_SS_CTRL, pll);
+        val &= ~(PLLE_SS_CNTL_SSC_BYP | PLLE_SS_CNTL_BYPASS_SS);
+        pll_writel(val, PLLE_SS_CTRL, pll);
+        udelay(1);
+        val &= ~PLLE_SS_CNTL_INTERP_RESET;
+        pll_writel(val, PLLE_SS_CTRL, pll);
+        udelay(1);
+
         /* TODO: enable hw control of xusb brick pll */
 
 out:
@@ -1248,9 +1349,8 @@ static void clk_plle_tegra114_disable(struct clk_hw *hw)
 #endif
 
 static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,
-                void __iomem *pmc, unsigned long fixed_rate,
-                struct tegra_clk_pll_params *pll_params, u32 pll_flags,
-                struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock)
+                void __iomem *pmc, struct tegra_clk_pll_params *pll_params,
+                spinlock_t *lock)
 {
         struct tegra_clk_pll *pll;
 
@@ -1261,10 +1361,7 @@ static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,
         pll->clk_base = clk_base;
         pll->pmc = pmc;
 
-        pll->freq_table = freq_table;
         pll->params = pll_params;
-        pll->fixed_rate = fixed_rate;
-        pll->flags = pll_flags;
         pll->lock = lock;
 
         if (!pll_params->div_nmp)
@@ -1293,17 +1390,15 @@ static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
 
 struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
                 void __iomem *clk_base, void __iomem *pmc,
-                unsigned long flags, unsigned long fixed_rate,
-                struct tegra_clk_pll_params *pll_params, u32 pll_flags,
-                struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock)
+                unsigned long flags, struct tegra_clk_pll_params *pll_params,
+                spinlock_t *lock)
 {
         struct tegra_clk_pll *pll;
         struct clk *clk;
 
-        pll_flags |= TEGRA_PLL_BYPASS;
-        pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
-        pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
-                              freq_table, lock);
+        pll_params->flags |= TEGRA_PLL_BYPASS;
+        pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
+        pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
         if (IS_ERR(pll))
                 return ERR_CAST(pll);
 
@@ -1317,17 +1412,15 @@ struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
 
 struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
                 void __iomem *clk_base, void __iomem *pmc,
-                unsigned long flags, unsigned long fixed_rate,
-                struct tegra_clk_pll_params *pll_params, u32 pll_flags,
-                struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock)
+                unsigned long flags, struct tegra_clk_pll_params *pll_params,
+                spinlock_t *lock)
 {
         struct tegra_clk_pll *pll;
         struct clk *clk;
 
-        pll_flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS;
-        pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
-        pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
-                              freq_table, lock);
+        pll_params->flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS;
+        pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
+        pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
         if (IS_ERR(pll))
                 return ERR_CAST(pll);
 
@@ -1339,7 +1432,7 @@ struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
         return clk;
 }
 
-#ifdef CONFIG_ARCH_TEGRA_114_SOC
+#if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC)
 const struct clk_ops tegra_clk_pllxc_ops = {
         .is_enabled = clk_pll_is_enabled,
         .enable = clk_pll_iddq_enable,
@@ -1386,21 +1479,46 @@ const struct clk_ops tegra_clk_plle_tegra114_ops = {
 
 struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
                           void __iomem *clk_base, void __iomem *pmc,
-                          unsigned long flags, unsigned long fixed_rate,
+                          unsigned long flags,
                           struct tegra_clk_pll_params *pll_params,
-                          u32 pll_flags,
-                          struct tegra_clk_pll_freq_table *freq_table,
                           spinlock_t *lock)
 {
         struct tegra_clk_pll *pll;
-        struct clk *clk;
+        struct clk *clk, *parent;
+        unsigned long parent_rate;
+        int err;
+        u32 val, val_iddq;
+
+        parent = __clk_lookup(parent_name);
+        if (!parent) {
+                WARN(1, "parent clk %s of %s must be registered first\n",
+                        name, parent_name);
+                return ERR_PTR(-EINVAL);
+        }
 
         if (!pll_params->pdiv_tohw)
                 return ERR_PTR(-EINVAL);
 
-        pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
-        pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
-                              freq_table, lock);
+        parent_rate = __clk_get_rate(parent);
+
+        pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);
+
+        err = _setup_dynamic_ramp(pll_params, clk_base, parent_rate);
+        if (err)
+                return ERR_PTR(err);
+
+        val = readl_relaxed(clk_base + pll_params->base_reg);
+        val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);
+
+        if (val & PLL_BASE_ENABLE)
+                WARN_ON(val_iddq & BIT(pll_params->iddq_bit_idx));
+        else {
+                val_iddq |= BIT(pll_params->iddq_bit_idx);
+                writel_relaxed(val_iddq, clk_base + pll_params->iddq_reg);
+        }
+
+        pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
+        pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
         if (IS_ERR(pll))
                 return ERR_CAST(pll);
 
@@ -1414,19 +1532,19 @@ struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
 
 struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
                           void __iomem *clk_base, void __iomem *pmc,
-                          unsigned long flags, unsigned long fixed_rate,
+                          unsigned long flags,
                           struct tegra_clk_pll_params *pll_params,
-                          u32 pll_flags,
-                          struct tegra_clk_pll_freq_table *freq_table,
                           spinlock_t *lock, unsigned long parent_rate)
 {
         u32 val;
         struct tegra_clk_pll *pll;
         struct clk *clk;
 
-        pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
-        pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
-                              freq_table, lock);
+        pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
+
+        pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);
+
+        pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
         if (IS_ERR(pll))
                 return ERR_CAST(pll);
 
@@ -1461,23 +1579,32 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
 
 struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
                           void __iomem *clk_base, void __iomem *pmc,
-                          unsigned long flags, unsigned long fixed_rate,
+                          unsigned long flags,
                           struct tegra_clk_pll_params *pll_params,
-                          u32 pll_flags,
-                          struct tegra_clk_pll_freq_table *freq_table,
                           spinlock_t *lock)
 {
         struct tegra_clk_pll *pll;
-        struct clk *clk;
+        struct clk *clk, *parent;
+        unsigned long parent_rate;
 
         if (!pll_params->pdiv_tohw)
                 return ERR_PTR(-EINVAL);
 
-        pll_flags |= TEGRA_PLL_BYPASS;
-        pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
-        pll_flags |= TEGRA_PLLM;
-        pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
-                              freq_table, lock);
+        parent = __clk_lookup(parent_name);
+        if (!parent) {
+                WARN(1, "parent clk %s of %s must be registered first\n",
+                        name, parent_name);
+                return ERR_PTR(-EINVAL);
+        }
+
+        parent_rate = __clk_get_rate(parent);
+
+        pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);
+
+        pll_params->flags |= TEGRA_PLL_BYPASS;
+        pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
+        pll_params->flags |= TEGRA_PLLM;
+        pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
         if (IS_ERR(pll))
                 return ERR_CAST(pll);
 
@@ -1491,10 +1618,8 @@ struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
 
 struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
                           void __iomem *clk_base, void __iomem *pmc,
-                          unsigned long flags, unsigned long fixed_rate,
+                          unsigned long flags,
                           struct tegra_clk_pll_params *pll_params,
-                          u32 pll_flags,
-                          struct tegra_clk_pll_freq_table *freq_table,
                           spinlock_t *lock)
 {
         struct clk *parent, *clk;
@@ -1507,20 +1632,21 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
                 return ERR_PTR(-EINVAL);
 
         parent = __clk_lookup(parent_name);
-        if (IS_ERR(parent)) {
+        if (!parent) {
                 WARN(1, "parent clk %s of %s must be registered first\n",
                         name, parent_name);
                 return ERR_PTR(-EINVAL);
         }
 
-        pll_flags |= TEGRA_PLL_BYPASS;
-        pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
-                              freq_table, lock);
+        parent_rate = __clk_get_rate(parent);
+
+        pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);
+
+        pll_params->flags |= TEGRA_PLL_BYPASS;
+        pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
         if (IS_ERR(pll))
                 return ERR_CAST(pll);
 
-        parent_rate = __clk_get_rate(parent);
-
         /*
          * Most of PLLC register fields are shadowed, and can not be read
          * directly from PLL h/w. Hence, actual PLLC boot state is unknown.
@@ -1567,17 +1693,15 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
 struct clk *tegra_clk_register_plle_tegra114(const char *name,
                                 const char *parent_name,
                                 void __iomem *clk_base, unsigned long flags,
-                                unsigned long fixed_rate,
                                 struct tegra_clk_pll_params *pll_params,
-                                struct tegra_clk_pll_freq_table *freq_table,
                                 spinlock_t *lock)
 {
         struct tegra_clk_pll *pll;
         struct clk *clk;
         u32 val, val_aux;
 
-        pll = _tegra_init_pll(clk_base, NULL, fixed_rate, pll_params,
-                              TEGRA_PLL_HAS_LOCK_ENABLE, freq_table, lock);
+        pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
+        pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
         if (IS_ERR(pll))
                 return ERR_CAST(pll);
 
@@ -1587,11 +1711,13 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name,
         val_aux = pll_readl(pll_params->aux_reg, pll);
 
         if (val & PLL_BASE_ENABLE) {
-                if (!(val_aux & PLLE_AUX_PLLRE_SEL))
+                if ((val_aux & PLLE_AUX_PLLRE_SEL) ||
+                        (val_aux & PLLE_AUX_PLLP_SEL))
                         WARN(1, "pll_e enabled with unsupported parent %s\n",
-                          (val & PLLE_AUX_PLLP_SEL) ? "pllp_out0" : "pll_ref");
+                          (val_aux & PLLE_AUX_PLLP_SEL) ? "pllp_out0" :
+                                        "pll_re_vco");
         } else {
-                val_aux |= PLLE_AUX_PLLRE_SEL;
+                val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL);
                 pll_writel(val, pll_params->aux_reg, pll);
         }
 
@@ -1603,3 +1729,92 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name,
         return clk;
 }
 #endif
+
+#ifdef CONFIG_ARCH_TEGRA_124_SOC
+const struct clk_ops tegra_clk_pllss_ops = {
+        .is_enabled = clk_pll_is_enabled,
+        .enable = clk_pll_iddq_enable,
+        .disable = clk_pll_iddq_disable,
+        .recalc_rate = clk_pll_recalc_rate,
+        .round_rate = clk_pll_ramp_round_rate,
+        .set_rate = clk_pllxc_set_rate,
+};
+
+struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+                                void __iomem *clk_base, unsigned long flags,
+                                struct tegra_clk_pll_params *pll_params,
+                                spinlock_t *lock)
+{
+        struct tegra_clk_pll *pll;
+        struct clk *clk, *parent;
+        struct tegra_clk_pll_freq_table cfg;
+        unsigned long parent_rate;
+        u32 val;
+        int i;
+
+        if (!pll_params->div_nmp)
+                return ERR_PTR(-EINVAL);
+
+        parent = __clk_lookup(parent_name);
+        if (!parent) {
+                WARN(1, "parent clk %s of %s must be registered first\n",
+                        name, parent_name);
+                return ERR_PTR(-EINVAL);
+        }
+
+        pll_params->flags = TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_USE_LOCK;
+        pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
+        if (IS_ERR(pll))
+                return ERR_CAST(pll);
+
+        val = pll_readl_base(pll);
+        val &= ~PLLSS_REF_SRC_SEL_MASK;
+        pll_writel_base(val, pll);
+
+        parent_rate = __clk_get_rate(parent);
+
+        pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);
+
+        /* initialize PLL to minimum rate */
+
+        cfg.m = _pll_fixed_mdiv(pll_params, parent_rate);
+        cfg.n = cfg.m * pll_params->vco_min / parent_rate;
+
+        for (i = 0; pll_params->pdiv_tohw[i].pdiv; i++)
+                ;
+        if (!i) {
+                kfree(pll);
+                return ERR_PTR(-EINVAL);
+        }
+
+        cfg.p = pll_params->pdiv_tohw[i-1].hw_val;
+
+        _update_pll_mnp(pll, &cfg);
+
+        pll_writel_misc(PLLSS_MISC_DEFAULT, pll);
+        pll_writel(PLLSS_CFG_DEFAULT, pll_params->ext_misc_reg[0], pll);
+        pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[1], pll);
+        pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[2], pll);
+
+        val = pll_readl_base(pll);
+        if (val & PLL_BASE_ENABLE) {
+                if (val & BIT(pll_params->iddq_bit_idx)) {
+                        WARN(1, "%s is on but IDDQ set\n", name);
+                        kfree(pll);
+                        return ERR_PTR(-EINVAL);
+                }
+        } else
+                val |= BIT(pll_params->iddq_bit_idx);
+
+        val &= ~PLLSS_LOCK_OVERRIDE;
+        pll_writel_base(val, pll);
+
+        clk = _tegra_clk_register_pll(pll, name, parent_name, flags,
+                                        &tegra_clk_pllss_ops);
+
+        if (IS_ERR(clk))
+                kfree(pll);
+
+        return clk;
+}
+#endif
diff --git a/drivers/clk/tegra/clk-tegra-audio.c b/drivers/clk/tegra/clk-tegra-audio.c
new file mode 100644
index 000000000000..5c38aab2c5b8
--- /dev/null
+++ b/drivers/clk/tegra/clk-tegra-audio.c
@@ -0,0 +1,215 @@
+/*
+ * Copyright (c) 2012, 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/clk/tegra.h>
+
+#include "clk.h"
+#include "clk-id.h"
+
+#define AUDIO_SYNC_CLK_I2S0 0x4a0
+#define AUDIO_SYNC_CLK_I2S1 0x4a4
+#define AUDIO_SYNC_CLK_I2S2 0x4a8
+#define AUDIO_SYNC_CLK_I2S3 0x4ac
+#define AUDIO_SYNC_CLK_I2S4 0x4b0
+#define AUDIO_SYNC_CLK_SPDIF 0x4b4
+
+#define AUDIO_SYNC_DOUBLER 0x49c
+
+#define PLLA_OUT 0xb4
+
+struct tegra_sync_source_initdata {
+        char            *name;
+        unsigned long   rate;
+        unsigned long   max_rate;
+        int             clk_id;
+};
+
+#define SYNC(_name) \
+        {\
+                .name           = #_name,\
+                .rate           = 24000000,\
+                .max_rate       = 24000000,\
+                .clk_id         = tegra_clk_ ## _name,\
+        }
+
+struct tegra_audio_clk_initdata {
+        char            *gate_name;
+        char            *mux_name;
+        u32             offset;
+        int             gate_clk_id;
+        int             mux_clk_id;
+};
+
+#define AUDIO(_name, _offset) \
+        {\
+                .gate_name      = #_name,\
+                .mux_name       = #_name"_mux",\
+                .offset         = _offset,\
+                .gate_clk_id    = tegra_clk_ ## _name,\
+                .mux_clk_id     = tegra_clk_ ## _name ## _mux,\
+        }
+
+struct tegra_audio2x_clk_initdata {
+        char            *parent;
+        char            *gate_name;
+        char            *name_2x;
+        char            *div_name;
+        int             clk_id;
+        int             clk_num;
+        u8              div_offset;
+};
+
+#define AUDIO2X(_name, _num, _offset) \
+        {\
+                .parent         = #_name,\
+                .gate_name      = #_name"_2x",\
+                .name_2x        = #_name"_doubler",\
+                .div_name       = #_name"_div",\
+                .clk_id         = tegra_clk_ ## _name ## _2x,\
+                .clk_num        = _num,\
+                .div_offset     = _offset,\
+        }
+
+static DEFINE_SPINLOCK(clk_doubler_lock);
+
+static const char *mux_audio_sync_clk[] = { "spdif_in_sync", "i2s0_sync",
+        "i2s1_sync", "i2s2_sync", "i2s3_sync", "i2s4_sync", "vimclk_sync",
+};
+
+static struct tegra_sync_source_initdata sync_source_clks[] __initdata = {
+        SYNC(spdif_in_sync),
+        SYNC(i2s0_sync),
+        SYNC(i2s1_sync),
+        SYNC(i2s2_sync),
+        SYNC(i2s3_sync),
+        SYNC(i2s4_sync),
+        SYNC(vimclk_sync),
+};
+
+static struct tegra_audio_clk_initdata audio_clks[] = {
+        AUDIO(audio0, AUDIO_SYNC_CLK_I2S0),
+        AUDIO(audio1, AUDIO_SYNC_CLK_I2S1),
+        AUDIO(audio2, AUDIO_SYNC_CLK_I2S2),
+        AUDIO(audio3, AUDIO_SYNC_CLK_I2S3),
+        AUDIO(audio4, AUDIO_SYNC_CLK_I2S4),
+        AUDIO(spdif, AUDIO_SYNC_CLK_SPDIF),
+};
+
+static struct tegra_audio2x_clk_initdata audio2x_clks[] = {
+        AUDIO2X(audio0, 113, 24),
+        AUDIO2X(audio1, 114, 25),
+        AUDIO2X(audio2, 115, 26),
+        AUDIO2X(audio3, 116, 27),
+        AUDIO2X(audio4, 117, 28),
+        AUDIO2X(spdif, 118, 29),
+};
+
+void __init tegra_audio_clk_init(void __iomem *clk_base,
+                        void __iomem *pmc_base, struct tegra_clk *tegra_clks,
+                        struct tegra_clk_pll_params *pll_a_params)
+{
+        struct clk *clk;
+        struct clk **dt_clk;
+        int i;
+
+        /* PLLA */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_pll_a, tegra_clks);
+        if (dt_clk) {
+                clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base,
+                                pmc_base, 0, pll_a_params, NULL);
+                *dt_clk = clk;
+        }
+
+        /* PLLA_OUT0 */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_pll_a_out0, tegra_clks);
+        if (dt_clk) {
+                clk = tegra_clk_register_divider("pll_a_out0_div", "pll_a",
+                                clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
+                                8, 8, 1, NULL);
+                clk = tegra_clk_register_pll_out("pll_a_out0", "pll_a_out0_div",
+                                clk_base + PLLA_OUT, 1, 0, CLK_IGNORE_UNUSED |
+                                CLK_SET_RATE_PARENT, 0, NULL);
+                *dt_clk = clk;
+        }
+
+        for (i = 0; i < ARRAY_SIZE(sync_source_clks); i++) {
+                struct tegra_sync_source_initdata *data;
+
+                data = &sync_source_clks[i];
+
+                dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                clk = tegra_clk_register_sync_source(data->name,
+                                        data->rate, data->max_rate);
+                *dt_clk = clk;
+        }
+
+        for (i = 0; i < ARRAY_SIZE(audio_clks); i++) {
+                struct tegra_audio_clk_initdata *data;
+
+                data = &audio_clks[i];
+                dt_clk = tegra_lookup_dt_id(data->mux_clk_id, tegra_clks);
+
+                if (!dt_clk)
+                        continue;
+                clk = clk_register_mux(NULL, data->mux_name, mux_audio_sync_clk,
+                                        ARRAY_SIZE(mux_audio_sync_clk),
+                                        CLK_SET_RATE_NO_REPARENT,
+                                        clk_base + data->offset, 0, 3, 0,
+                                        NULL);
+                *dt_clk = clk;
+
+                dt_clk = tegra_lookup_dt_id(data->gate_clk_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                clk = clk_register_gate(NULL, data->gate_name, data->mux_name,
+                                        0, clk_base + data->offset, 4,
+                                        CLK_GATE_SET_TO_DISABLE, NULL);
+                *dt_clk = clk;
+        }
+
+        for (i = 0; i < ARRAY_SIZE(audio2x_clks); i++) {
+                struct tegra_audio2x_clk_initdata *data;
+
+                data = &audio2x_clks[i];
+                dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                clk = clk_register_fixed_factor(NULL, data->name_2x,
+                                data->parent, CLK_SET_RATE_PARENT, 2, 1);
+                clk = tegra_clk_register_divider(data->div_name,
+                                data->name_2x, clk_base + AUDIO_SYNC_DOUBLER,
+                                0, 0, data->div_offset, 1, 0,
+                                &clk_doubler_lock);
+                clk = tegra_clk_register_periph_gate(data->gate_name,
+                                data->div_name, TEGRA_PERIPH_NO_RESET,
+                                clk_base, CLK_SET_RATE_PARENT, data->clk_num,
+                                periph_clk_enb_refcnt);
+                *dt_clk = clk;
+        }
+}
+
diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c
new file mode 100644
index 000000000000..f3b773833429
--- /dev/null
+++ b/drivers/clk/tegra/clk-tegra-fixed.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2012, 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/clk/tegra.h>
+
+#include "clk.h"
+#include "clk-id.h"
+
+#define OSC_CTRL                        0x50
+#define OSC_CTRL_OSC_FREQ_SHIFT         28
+#define OSC_CTRL_PLL_REF_DIV_SHIFT      26
+
+int __init tegra_osc_clk_init(void __iomem *clk_base,
+                                struct tegra_clk *tegra_clks,
+                                unsigned long *input_freqs, int num,
+                                unsigned long *osc_freq,
+                                unsigned long *pll_ref_freq)
+{
+        struct clk *clk;
+        struct clk **dt_clk;
+        u32 val, pll_ref_div;
+        unsigned osc_idx;
+
+        val = readl_relaxed(clk_base + OSC_CTRL);
+        osc_idx = val >> OSC_CTRL_OSC_FREQ_SHIFT;
+
+        if (osc_idx < num)
+                *osc_freq = input_freqs[osc_idx];
+        else
+                *osc_freq = 0;
+
+        if (!*osc_freq) {
+                WARN_ON(1);
+                return -EINVAL;
+        }
+
+        dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, tegra_clks);
+        if (!dt_clk)
+                return 0;
+
+        clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT,
+                                      *osc_freq);
+        *dt_clk = clk;
+
+        /* pll_ref */
+        val = (val >> OSC_CTRL_PLL_REF_DIV_SHIFT) & 3;
+        pll_ref_div = 1 << val;
+        dt_clk = tegra_lookup_dt_id(tegra_clk_pll_ref, tegra_clks);
+        if (!dt_clk)
+                return 0;
+
+        clk = clk_register_fixed_factor(NULL, "pll_ref", "clk_m",
+                                        0, 1, pll_ref_div);
+        *dt_clk = clk;
+
+        if (pll_ref_freq)
+                *pll_ref_freq = *osc_freq / pll_ref_div;
+
+        return 0;
+}
+
+void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
+{
+        struct clk *clk;
+        struct clk **dt_clk;
+
+        /* clk_32k */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
+        if (dt_clk) {
+                clk = clk_register_fixed_rate(NULL, "clk_32k", NULL,
+                                        CLK_IS_ROOT, 32768);
+                *dt_clk = clk;
+        }
+
+        /* clk_m_div2 */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m_div2, tegra_clks);
+        if (dt_clk) {
+                clk = clk_register_fixed_factor(NULL, "clk_m_div2", "clk_m",
+                                        CLK_SET_RATE_PARENT, 1, 2);
+                *dt_clk = clk;
+        }
+
+        /* clk_m_div4 */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m_div4, tegra_clks);
+        if (dt_clk) {
+                clk = clk_register_fixed_factor(NULL, "clk_m_div4", "clk_m",
+                                        CLK_SET_RATE_PARENT, 1, 4);
+                *dt_clk = clk;
+        }
+}
+
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
new file mode 100644
index 000000000000..5c35885f4a7c
--- /dev/null
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -0,0 +1,674 @@
+/*
+ * Copyright (c) 2012, 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/clk/tegra.h>
+
+#include "clk.h"
+#include "clk-id.h"
+
+#define CLK_SOURCE_I2S0 0x1d8
+#define CLK_SOURCE_I2S1 0x100
+#define CLK_SOURCE_I2S2 0x104
+#define CLK_SOURCE_NDFLASH 0x160
+#define CLK_SOURCE_I2S3 0x3bc
+#define CLK_SOURCE_I2S4 0x3c0
+#define CLK_SOURCE_SPDIF_OUT 0x108
+#define CLK_SOURCE_SPDIF_IN 0x10c
+#define CLK_SOURCE_PWM 0x110
+#define CLK_SOURCE_ADX 0x638
+#define CLK_SOURCE_ADX1 0x670
+#define CLK_SOURCE_AMX 0x63c
+#define CLK_SOURCE_AMX1 0x674
+#define CLK_SOURCE_HDA 0x428
+#define CLK_SOURCE_HDA2CODEC_2X 0x3e4
+#define CLK_SOURCE_SBC1 0x134
+#define CLK_SOURCE_SBC2 0x118
+#define CLK_SOURCE_SBC3 0x11c
+#define CLK_SOURCE_SBC4 0x1b4
+#define CLK_SOURCE_SBC5 0x3c8
+#define CLK_SOURCE_SBC6 0x3cc
+#define CLK_SOURCE_SATA_OOB 0x420
+#define CLK_SOURCE_SATA 0x424
+#define CLK_SOURCE_NDSPEED 0x3f8
+#define CLK_SOURCE_VFIR 0x168
+#define CLK_SOURCE_SDMMC1 0x150
+#define CLK_SOURCE_SDMMC2 0x154
+#define CLK_SOURCE_SDMMC3 0x1bc
+#define CLK_SOURCE_SDMMC4 0x164
+#define CLK_SOURCE_CVE 0x140
+#define CLK_SOURCE_TVO 0x188
+#define CLK_SOURCE_TVDAC 0x194
+#define CLK_SOURCE_VDE 0x1c8
+#define CLK_SOURCE_CSITE 0x1d4
+#define CLK_SOURCE_LA 0x1f8
+#define CLK_SOURCE_TRACE 0x634
+#define CLK_SOURCE_OWR 0x1cc
+#define CLK_SOURCE_NOR 0x1d0
+#define CLK_SOURCE_MIPI 0x174
+#define CLK_SOURCE_I2C1 0x124
+#define CLK_SOURCE_I2C2 0x198
+#define CLK_SOURCE_I2C3 0x1b8
+#define CLK_SOURCE_I2C4 0x3c4
+#define CLK_SOURCE_I2C5 0x128
+#define CLK_SOURCE_I2C6 0x65c
+#define CLK_SOURCE_UARTA 0x178
+#define CLK_SOURCE_UARTB 0x17c
+#define CLK_SOURCE_UARTC 0x1a0
+#define CLK_SOURCE_UARTD 0x1c0
+#define CLK_SOURCE_UARTE 0x1c4
+#define CLK_SOURCE_3D 0x158
+#define CLK_SOURCE_2D 0x15c
+#define CLK_SOURCE_MPE 0x170
+#define CLK_SOURCE_UARTE 0x1c4
+#define CLK_SOURCE_VI_SENSOR 0x1a8
+#define CLK_SOURCE_VI 0x148
+#define CLK_SOURCE_EPP 0x16c
+#define CLK_SOURCE_MSENC 0x1f0
+#define CLK_SOURCE_TSEC 0x1f4
+#define CLK_SOURCE_HOST1X 0x180
+#define CLK_SOURCE_HDMI 0x18c
+#define CLK_SOURCE_DISP1 0x138
+#define CLK_SOURCE_DISP2 0x13c
+#define CLK_SOURCE_CILAB 0x614
+#define CLK_SOURCE_CILCD 0x618
+#define CLK_SOURCE_CILE 0x61c
+#define CLK_SOURCE_DSIALP 0x620
+#define CLK_SOURCE_DSIBLP 0x624
+#define CLK_SOURCE_TSENSOR 0x3b8
+#define CLK_SOURCE_D_AUDIO 0x3d0
+#define CLK_SOURCE_DAM0 0x3d8
+#define CLK_SOURCE_DAM1 0x3dc
+#define CLK_SOURCE_DAM2 0x3e0
+#define CLK_SOURCE_ACTMON 0x3e8
+#define CLK_SOURCE_EXTERN1 0x3ec
+#define CLK_SOURCE_EXTERN2 0x3f0
+#define CLK_SOURCE_EXTERN3 0x3f4
+#define CLK_SOURCE_I2CSLOW 0x3fc
+#define CLK_SOURCE_SE 0x42c
+#define CLK_SOURCE_MSELECT 0x3b4
+#define CLK_SOURCE_DFLL_REF 0x62c
+#define CLK_SOURCE_DFLL_SOC 0x630
+#define CLK_SOURCE_SOC_THERM 0x644
+#define CLK_SOURCE_XUSB_HOST_SRC 0x600
+#define CLK_SOURCE_XUSB_FALCON_SRC 0x604
+#define CLK_SOURCE_XUSB_FS_SRC 0x608
+#define CLK_SOURCE_XUSB_SS_SRC 0x610
+#define CLK_SOURCE_XUSB_DEV_SRC 0x60c
+#define CLK_SOURCE_ISP 0x144
+#define CLK_SOURCE_SOR0 0x414
+#define CLK_SOURCE_DPAUX 0x418
+#define CLK_SOURCE_SATA_OOB 0x420
+#define CLK_SOURCE_SATA 0x424
+#define CLK_SOURCE_ENTROPY 0x628
+#define CLK_SOURCE_VI_SENSOR2 0x658
+#define CLK_SOURCE_HDMI_AUDIO 0x668
+#define CLK_SOURCE_VIC03 0x678
+#define CLK_SOURCE_CLK72MHZ 0x66c
+
+#define MASK(x) (BIT(x) - 1)
+
+#define MUX(_name, _parents, _offset,   \
+                            _clk_num, _gate_flags, _clk_id)     \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
+                        _clk_num,  _gate_flags, _clk_id, _parents##_idx, 0,\
+                        NULL)
+
+#define MUX_FLAGS(_name, _parents, _offset,\
+                            _clk_num, _gate_flags, _clk_id, flags)\
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
+                        _clk_num, _gate_flags, _clk_id, _parents##_idx, flags,\
+                        NULL)
+
+#define MUX8(_name, _parents, _offset, \
+                             _clk_num, _gate_flags, _clk_id)    \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
+                        _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\
+                        NULL)
+
+#define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock)      \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,     \
+                              29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
+                              0, TEGRA_PERIPH_NO_GATE, _clk_id,\
+                              _parents##_idx, 0, _lock)
+
+#define INT(_name, _parents, _offset,   \
+                            _clk_num, _gate_flags, _clk_id)     \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
+                        TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
+                        _clk_id, _parents##_idx, 0, NULL)
+
+#define INT_FLAGS(_name, _parents, _offset,\
+                            _clk_num, _gate_flags, _clk_id, flags)\
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
+                        TEGRA_DIVIDER_ROUND_UP, _clk_num,  _gate_flags,\
+                        _clk_id, _parents##_idx, flags, NULL)
+
+#define INT8(_name, _parents, _offset,\
+                            _clk_num, _gate_flags, _clk_id)     \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
+                        TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
+                        _clk_id, _parents##_idx, 0, NULL)
+
+#define UART(_name, _parents, _offset,\
+                             _clk_num, _clk_id)                 \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
+                        TEGRA_DIVIDER_ROUND_UP, _clk_num, 0, _clk_id,\
+                        _parents##_idx, 0, NULL)
+
+#define I2C(_name, _parents, _offset,\
+                             _clk_num, _clk_id)                 \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        30, MASK(2), 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP,\
+                        _clk_num, 0, _clk_id, _parents##_idx, 0, NULL)
+
+#define XUSB(_name, _parents, _offset, \
+                             _clk_num, _gate_flags, _clk_id)     \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
+                        29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
+                        TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
+                        _clk_id, _parents##_idx, 0, NULL)
+
+#define AUDIO(_name, _offset,  _clk_num,\
+                                 _gate_flags, _clk_id)          \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, mux_d_audio_clk,       \
+                        _offset, 16, 0xE01F, 0, 0, 8, 1,                \
+                        TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,  \
+                        _clk_id, mux_d_audio_clk_idx, 0, NULL)
+
+#define NODIV(_name, _parents, _offset, \
+                              _mux_shift, _mux_mask, _clk_num, \
+                              _gate_flags, _clk_id, _lock)              \
+        TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
+                        _mux_shift, _mux_mask, 0, 0, 0, 0, 0,\
+                        _clk_num, (_gate_flags) | TEGRA_PERIPH_NO_DIV,\
+                        _clk_id, _parents##_idx, 0, _lock)
+
+#define GATE(_name, _parent_name,       \
+                             _clk_num, _gate_flags,  _clk_id, _flags)   \
+        {                                                               \
+                .name = _name,                                          \
+                .clk_id = _clk_id,                                      \
+                .p.parent_name = _parent_name,                          \
+                .periph = TEGRA_CLK_PERIPH(0, 0, 0, 0, 0, 0, 0,         \
+                                _clk_num, _gate_flags, 0, NULL),        \
+                .flags = _flags                                         \
+        }
+
+#define PLLP_BASE 0xa0
+#define PLLP_MISC 0xac
+#define PLLP_OUTA 0xa4
+#define PLLP_OUTB 0xa8
+#define PLLP_OUTC 0x67c
+
+#define PLL_BASE_LOCK BIT(27)
+#define PLL_MISC_LOCK_ENABLE 18
+
+static DEFINE_SPINLOCK(PLLP_OUTA_lock);
+static DEFINE_SPINLOCK(PLLP_OUTB_lock);
+static DEFINE_SPINLOCK(PLLP_OUTC_lock);
+static DEFINE_SPINLOCK(sor0_lock);
+
+#define MUX_I2S_SPDIF(_id)                                              \
+static const char *mux_pllaout0_##_id##_2x_pllp_clkm[] = { "pll_a_out0", \
+                                                           #_id, "pll_p",\
+                                                           "clk_m"};
+MUX_I2S_SPDIF(audio0)
+MUX_I2S_SPDIF(audio1)
+MUX_I2S_SPDIF(audio2)
+MUX_I2S_SPDIF(audio3)
+MUX_I2S_SPDIF(audio4)
+MUX_I2S_SPDIF(audio)
+
+#define mux_pllaout0_audio0_2x_pllp_clkm_idx NULL
+#define mux_pllaout0_audio1_2x_pllp_clkm_idx NULL
+#define mux_pllaout0_audio2_2x_pllp_clkm_idx NULL
+#define mux_pllaout0_audio3_2x_pllp_clkm_idx NULL
+#define mux_pllaout0_audio4_2x_pllp_clkm_idx NULL
+#define mux_pllaout0_audio_2x_pllp_clkm_idx NULL
+
+static const char *mux_pllp_pllc_pllm_clkm[] = {
+        "pll_p", "pll_c", "pll_m", "clk_m"
+};
+#define mux_pllp_pllc_pllm_clkm_idx NULL
+
+static const char *mux_pllp_pllc_pllm[] = { "pll_p", "pll_c", "pll_m" };
+#define mux_pllp_pllc_pllm_idx NULL
+
+static const char *mux_pllp_pllc_clk32_clkm[] = {
+        "pll_p", "pll_c", "clk_32k", "clk_m"
+};
+#define mux_pllp_pllc_clk32_clkm_idx NULL
+
+static const char *mux_plla_pllc_pllp_clkm[] = {
+        "pll_a_out0", "pll_c", "pll_p", "clk_m"
+};
+#define mux_plla_pllc_pllp_clkm_idx mux_pllp_pllc_pllm_clkm_idx
+
+static const char *mux_pllp_pllc2_c_c3_pllm_clkm[] = {
+        "pll_p", "pll_c2", "pll_c", "pll_c3", "pll_m", "clk_m"
+};
+static u32 mux_pllp_pllc2_c_c3_pllm_clkm_idx[] = {
+        [0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6,
+};
+
+static const char *mux_pllp_clkm[] = {
+        "pll_p", "clk_m"
+};
+static u32 mux_pllp_clkm_idx[] = {
+        [0] = 0, [1] = 3,
+};
+
+static const char *mux_pllm_pllc2_c_c3_pllp_plla[] = {
+        "pll_m", "pll_c2", "pll_c", "pll_c3", "pll_p", "pll_a_out0"
+};
+#define mux_pllm_pllc2_c_c3_pllp_plla_idx mux_pllp_pllc2_c_c3_pllm_clkm_idx
+
+static const char *mux_pllp_pllm_plld_plla_pllc_plld2_clkm[] = {
+        "pll_p", "pll_m", "pll_d_out0", "pll_a_out0", "pll_c",
+        "pll_d2_out0", "clk_m"
+};
+#define mux_pllp_pllm_plld_plla_pllc_plld2_clkm_idx NULL
+
+static const char *mux_pllm_pllc_pllp_plla[] = {
+        "pll_m", "pll_c", "pll_p", "pll_a_out0"
+};
+#define mux_pllm_pllc_pllp_plla_idx mux_pllp_pllc_pllm_clkm_idx
+
+static const char *mux_pllp_pllc_clkm[] = {
+        "pll_p", "pll_c", "pll_m"
+};
+static u32 mux_pllp_pllc_clkm_idx[] = {
+        [0] = 0, [1] = 1, [2] = 3,
+};
+
+static const char *mux_pllp_pllc_clkm_clk32[] = {
+        "pll_p", "pll_c", "clk_m", "clk_32k"
+};
+#define mux_pllp_pllc_clkm_clk32_idx NULL
+
+static const char *mux_plla_clk32_pllp_clkm_plle[] = {
+        "pll_a_out0", "clk_32k", "pll_p", "clk_m", "pll_e_out0"
+};
+#define mux_plla_clk32_pllp_clkm_plle_idx NULL
+
+static const char *mux_clkm_pllp_pllc_pllre[] = {
+        "clk_m", "pll_p", "pll_c", "pll_re_out"
+};
+static u32 mux_clkm_pllp_pllc_pllre_idx[] = {
+        [0] = 0, [1] = 1, [2] = 3, [3] = 5,
+};
+
+static const char *mux_clkm_48M_pllp_480M[] = {
+        "clk_m", "pll_u_48M", "pll_p", "pll_u_480M"
+};
+#define mux_clkm_48M_pllp_480M_idx NULL
+
+static const char *mux_clkm_pllre_clk32_480M_pllc_ref[] = {
+        "clk_m", "pll_re_out", "clk_32k", "pll_u_480M", "pll_c", "pll_ref"
+};
+static u32 mux_clkm_pllre_clk32_480M_pllc_ref_idx[] = {
+        [0] = 0, [1] = 1, [2] = 3, [3] = 3, [4] = 4, [5] = 7,
+};
+
+static const char *mux_d_audio_clk[] = {
+        "pll_a_out0", "pll_p", "clk_m", "spdif_in_sync", "i2s0_sync",
+        "i2s1_sync", "i2s2_sync", "i2s3_sync", "i2s4_sync", "vimclk_sync",
+};
+static u32 mux_d_audio_clk_idx[] = {
+        [0] = 0, [1] = 0x8000, [2] = 0xc000, [3] = 0xE000, [4] = 0xE001,
+        [5] = 0xE002, [6] = 0xE003, [7] = 0xE004, [8] = 0xE005, [9] = 0xE007,
+};
+
+static const char *mux_pllp_plld_pllc_clkm[] = {
+        "pll_p", "pll_d_out0", "pll_c", "clk_m"
+};
+#define mux_pllp_plld_pllc_clkm_idx NULL
+static const char *mux_pllm_pllc_pllp_plla_clkm_pllc4[] = {
+        "pll_m", "pll_c", "pll_p", "pll_a_out0", "clk_m", "pll_c4",
+};
+static u32 mux_pllm_pllc_pllp_plla_clkm_pllc4_idx[] = {
+        [0] = 0, [1] = 1, [2] = 3, [3] = 3, [4] = 6, [5] = 7,
+};
+
+static const char *mux_pllp_clkm1[] = {
+        "pll_p", "clk_m",
+};
+#define mux_pllp_clkm1_idx NULL
+
+static const char *mux_pllp3_pllc_clkm[] = {
+        "pll_p_out3", "pll_c", "pll_c2", "clk_m",
+};
+#define mux_pllp3_pllc_clkm_idx NULL
+
+static const char *mux_pllm_pllc_pllp_plla_pllc2_c3_clkm[] = {
+        "pll_m", "pll_c", "pll_p", "pll_a", "pll_c2", "pll_c3", "clk_m"
+};
+static u32 mux_pllm_pllc_pllp_plla_pllc2_c3_clkm_idx[] = {
+        [0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6,
+};
+
+static const char *mux_pllm_pllc2_c_c3_pllp_plla_pllc4[] = {
+        "pll_m", "pll_c2", "pll_c", "pll_c3", "pll_p", "pll_a_out0", "pll_c4",
+};
+static u32 mux_pllm_pllc2_c_c3_pllp_plla_pllc4_idx[] = {
+        [0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6, [6] = 7,
+};
+
+static const char *mux_clkm_plldp_sor0lvds[] = {
+        "clk_m", "pll_dp", "sor0_lvds",
+};
+#define mux_clkm_plldp_sor0lvds_idx NULL
+
+static struct tegra_periph_init_data periph_clks[] = {
+        AUDIO("d_audio", CLK_SOURCE_D_AUDIO, 106, TEGRA_PERIPH_ON_APB, tegra_clk_d_audio),
+        AUDIO("dam0", CLK_SOURCE_DAM0, 108, TEGRA_PERIPH_ON_APB, tegra_clk_dam0),
+        AUDIO("dam1", CLK_SOURCE_DAM1, 109, TEGRA_PERIPH_ON_APB, tegra_clk_dam1),
+        AUDIO("dam2", CLK_SOURCE_DAM2, 110, TEGRA_PERIPH_ON_APB, tegra_clk_dam2),
+        I2C("i2c1", mux_pllp_clkm, CLK_SOURCE_I2C1, 12, tegra_clk_i2c1),
+        I2C("i2c2", mux_pllp_clkm, CLK_SOURCE_I2C2, 54, tegra_clk_i2c2),
+        I2C("i2c3", mux_pllp_clkm, CLK_SOURCE_I2C3, 67, tegra_clk_i2c3),
+        I2C("i2c4", mux_pllp_clkm, CLK_SOURCE_I2C4, 103, tegra_clk_i2c4),
+        I2C("i2c5", mux_pllp_clkm, CLK_SOURCE_I2C5, 47, tegra_clk_i2c5),
+        INT("vde", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VDE, 61, 0, tegra_clk_vde),
+        INT("vi", mux_pllm_pllc_pllp_plla, CLK_SOURCE_VI, 20, 0, tegra_clk_vi),
+        INT("epp", mux_pllm_pllc_pllp_plla, CLK_SOURCE_EPP, 19, 0, tegra_clk_epp),
+        INT("host1x", mux_pllm_pllc_pllp_plla, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x),
+        INT("mpe", mux_pllm_pllc_pllp_plla, CLK_SOURCE_MPE, 60, 0, tegra_clk_mpe),
+        INT("2d", mux_pllm_pllc_pllp_plla, CLK_SOURCE_2D, 21, 0, tegra_clk_gr2d),
+        INT("3d", mux_pllm_pllc_pllp_plla, CLK_SOURCE_3D, 24, 0, tegra_clk_gr3d),
+        INT8("vde", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_VDE, 61, 0, tegra_clk_vde_8),
+        INT8("vi", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_8),
+        INT8("vi", mux_pllm_pllc2_c_c3_pllp_plla_pllc4, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_9),
+        INT8("epp", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_EPP, 19, 0, tegra_clk_epp_8),
+        INT8("msenc", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_MSENC, 91, TEGRA_PERIPH_WAR_1005168, tegra_clk_msenc),
+        INT8("tsec", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_TSEC, 83, 0, tegra_clk_tsec),
+        INT8("host1x", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_8),
+        INT8("se", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
+        INT8("2d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_2D, 21, 0, tegra_clk_gr2d_8),
+        INT8("3d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_3D, 24, 0, tegra_clk_gr3d_8),
+        INT8("vic03", mux_pllm_pllc_pllp_plla_pllc2_c3_clkm, CLK_SOURCE_VIC03, 178, 0, tegra_clk_vic03),
+        INT_FLAGS("mselect", mux_pllp_clkm, CLK_SOURCE_MSELECT, 99, 0, tegra_clk_mselect, CLK_IGNORE_UNUSED),
+        MUX("i2s0", mux_pllaout0_audio0_2x_pllp_clkm, CLK_SOURCE_I2S0, 30, TEGRA_PERIPH_ON_APB, tegra_clk_i2s0),
+        MUX("i2s1", mux_pllaout0_audio1_2x_pllp_clkm, CLK_SOURCE_I2S1, 11, TEGRA_PERIPH_ON_APB, tegra_clk_i2s1),
+        MUX("i2s2", mux_pllaout0_audio2_2x_pllp_clkm, CLK_SOURCE_I2S2, 18, TEGRA_PERIPH_ON_APB, tegra_clk_i2s2),
+        MUX("i2s3", mux_pllaout0_audio3_2x_pllp_clkm, CLK_SOURCE_I2S3, 101, TEGRA_PERIPH_ON_APB, tegra_clk_i2s3),
+        MUX("i2s4", mux_pllaout0_audio4_2x_pllp_clkm, CLK_SOURCE_I2S4, 102, TEGRA_PERIPH_ON_APB, tegra_clk_i2s4),
+        MUX("spdif_out", mux_pllaout0_audio_2x_pllp_clkm, CLK_SOURCE_SPDIF_OUT, 10, TEGRA_PERIPH_ON_APB, tegra_clk_spdif_out),
+        MUX("spdif_in", mux_pllp_pllc_pllm, CLK_SOURCE_SPDIF_IN, 10, TEGRA_PERIPH_ON_APB, tegra_clk_spdif_in),
+        MUX("pwm", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_PWM, 17, TEGRA_PERIPH_ON_APB, tegra_clk_pwm),
+        MUX("adx", mux_plla_pllc_pllp_clkm, CLK_SOURCE_ADX, 154, TEGRA_PERIPH_ON_APB, tegra_clk_adx),
+        MUX("amx", mux_plla_pllc_pllp_clkm, CLK_SOURCE_AMX, 153, TEGRA_PERIPH_ON_APB, tegra_clk_amx),
+        MUX("hda", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA, 125, TEGRA_PERIPH_ON_APB, tegra_clk_hda),
+        MUX("hda2codec_2x", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA2CODEC_2X, 111, TEGRA_PERIPH_ON_APB, tegra_clk_hda2codec_2x),
+        MUX("vfir", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VFIR, 7, TEGRA_PERIPH_ON_APB, tegra_clk_vfir),
+        MUX("sdmmc1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC1, 14, 0, tegra_clk_sdmmc1),
+        MUX("sdmmc2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC2, 9, 0, tegra_clk_sdmmc2),
+        MUX("sdmmc3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC3, 69, 0, tegra_clk_sdmmc3),
+        MUX("sdmmc4", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC4, 15, 0, tegra_clk_sdmmc4),
+        MUX("la", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_LA, 76, TEGRA_PERIPH_ON_APB, tegra_clk_la),
+        MUX("trace", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_TRACE, 77, TEGRA_PERIPH_ON_APB, tegra_clk_trace),
+        MUX("owr", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_OWR, 71, TEGRA_PERIPH_ON_APB, tegra_clk_owr),
+        MUX("nor", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_NOR, 42, 0, tegra_clk_nor),
+        MUX("mipi", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_MIPI, 50, TEGRA_PERIPH_ON_APB, tegra_clk_mipi),
+        MUX("vi_sensor", mux_pllm_pllc_pllp_plla, CLK_SOURCE_VI_SENSOR, 20, TEGRA_PERIPH_NO_RESET, tegra_clk_vi_sensor),
+        MUX("cilab", mux_pllp_pllc_clkm, CLK_SOURCE_CILAB, 144, 0, tegra_clk_cilab),
+        MUX("cilcd", mux_pllp_pllc_clkm, CLK_SOURCE_CILCD, 145, 0, tegra_clk_cilcd),
+        MUX("cile", mux_pllp_pllc_clkm, CLK_SOURCE_CILE, 146, 0, tegra_clk_cile),
+        MUX("dsialp", mux_pllp_pllc_clkm, CLK_SOURCE_DSIALP, 147, 0, tegra_clk_dsialp),
+        MUX("dsiblp", mux_pllp_pllc_clkm, CLK_SOURCE_DSIBLP, 148, 0, tegra_clk_dsiblp),
+        MUX("tsensor", mux_pllp_pllc_clkm_clk32, CLK_SOURCE_TSENSOR, 100, TEGRA_PERIPH_ON_APB, tegra_clk_tsensor),
+        MUX("actmon", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_ACTMON, 119, 0, tegra_clk_actmon),
+        MUX("dfll_ref", mux_pllp_clkm, CLK_SOURCE_DFLL_REF, 155, TEGRA_PERIPH_ON_APB, tegra_clk_dfll_ref),
+        MUX("dfll_soc", mux_pllp_clkm, CLK_SOURCE_DFLL_SOC, 155, TEGRA_PERIPH_ON_APB, tegra_clk_dfll_soc),
+        MUX("i2cslow", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_I2CSLOW, 81, TEGRA_PERIPH_ON_APB, tegra_clk_i2cslow),
+        MUX("sbc1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC1, 41, TEGRA_PERIPH_ON_APB, tegra_clk_sbc1),
+        MUX("sbc2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC2, 44, TEGRA_PERIPH_ON_APB, tegra_clk_sbc2),
+        MUX("sbc3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC3, 46, TEGRA_PERIPH_ON_APB, tegra_clk_sbc3),
+        MUX("sbc4", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC4, 68, TEGRA_PERIPH_ON_APB, tegra_clk_sbc4),
+        MUX("sbc5", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC5, 104, TEGRA_PERIPH_ON_APB, tegra_clk_sbc5),
+        MUX("sbc6", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC6, 105, TEGRA_PERIPH_ON_APB, tegra_clk_sbc6),
+        MUX("cve", mux_pllp_plld_pllc_clkm, CLK_SOURCE_CVE, 49, 0, tegra_clk_cve),
+        MUX("tvo", mux_pllp_plld_pllc_clkm, CLK_SOURCE_TVO, 49, 0, tegra_clk_tvo),
+        MUX("tvdac", mux_pllp_plld_pllc_clkm, CLK_SOURCE_TVDAC, 53, 0, tegra_clk_tvdac),
+        MUX("ndflash", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_NDFLASH, 13, TEGRA_PERIPH_ON_APB, tegra_clk_ndflash),
+        MUX("ndspeed", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_NDSPEED, 80, TEGRA_PERIPH_ON_APB, tegra_clk_ndspeed),
+        MUX("sata_oob", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SATA_OOB, 123, TEGRA_PERIPH_ON_APB, tegra_clk_sata_oob),
+        MUX("sata", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SATA, 124, TEGRA_PERIPH_ON_APB, tegra_clk_sata),
+        MUX("adx1", mux_plla_pllc_pllp_clkm, CLK_SOURCE_ADX1, 180, TEGRA_PERIPH_ON_APB, tegra_clk_adx1),
+        MUX("amx1", mux_plla_pllc_pllp_clkm, CLK_SOURCE_AMX1, 185, TEGRA_PERIPH_ON_APB, tegra_clk_amx1),
+        MUX("vi_sensor2", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI_SENSOR2, 20, TEGRA_PERIPH_NO_RESET, tegra_clk_vi_sensor2),
+        MUX8("sbc1", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC1, 41, TEGRA_PERIPH_ON_APB, tegra_clk_sbc1_8),
+        MUX8("sbc2", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC2, 44, TEGRA_PERIPH_ON_APB, tegra_clk_sbc2_8),
+        MUX8("sbc3", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC3, 46, TEGRA_PERIPH_ON_APB, tegra_clk_sbc3_8),
+        MUX8("sbc4", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC4, 68, TEGRA_PERIPH_ON_APB, tegra_clk_sbc4_8),
+        MUX8("sbc5", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC5, 104, TEGRA_PERIPH_ON_APB, tegra_clk_sbc5_8),
+        MUX8("sbc6", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC6, 105, TEGRA_PERIPH_ON_APB, tegra_clk_sbc6_8),
+        MUX8("ndflash", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_NDFLASH, 13, TEGRA_PERIPH_ON_APB, tegra_clk_ndflash_8),
+        MUX8("ndspeed", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_NDSPEED, 80, TEGRA_PERIPH_ON_APB, tegra_clk_ndspeed_8),
+        MUX8("hdmi", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_HDMI, 51, 0, tegra_clk_hdmi),
+        MUX8("extern1", mux_plla_clk32_pllp_clkm_plle, CLK_SOURCE_EXTERN1, 120, 0, tegra_clk_extern1),
+        MUX8("extern2", mux_plla_clk32_pllp_clkm_plle, CLK_SOURCE_EXTERN2, 121, 0, tegra_clk_extern2),
+        MUX8("extern3", mux_plla_clk32_pllp_clkm_plle, CLK_SOURCE_EXTERN3, 122, 0, tegra_clk_extern3),
+        MUX8("soc_therm", mux_pllm_pllc_pllp_plla, CLK_SOURCE_SOC_THERM, 78, TEGRA_PERIPH_ON_APB, tegra_clk_soc_therm),
+        MUX8("vi_sensor", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI_SENSOR, 20, TEGRA_PERIPH_NO_RESET, tegra_clk_vi_sensor_8),
+        MUX8("isp", mux_pllm_pllc_pllp_plla_clkm_pllc4, CLK_SOURCE_ISP, 23, TEGRA_PERIPH_ON_APB, tegra_clk_isp_8),
+        MUX8("entropy", mux_pllp_clkm1, CLK_SOURCE_ENTROPY, 149,  0, tegra_clk_entropy),
+        MUX8("hdmi_audio", mux_pllp3_pllc_clkm, CLK_SOURCE_HDMI_AUDIO, 176, TEGRA_PERIPH_NO_RESET, tegra_clk_hdmi_audio),
+        MUX8("clk72mhz", mux_pllp3_pllc_clkm, CLK_SOURCE_CLK72MHZ, 177, TEGRA_PERIPH_NO_RESET, tegra_clk_clk72Mhz),
+        MUX8_NOGATE_LOCK("sor0_lvds", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_SOR0, tegra_clk_sor0_lvds, &sor0_lock),
+        MUX_FLAGS("csite", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_CSITE, 73, TEGRA_PERIPH_ON_APB, tegra_clk_csite, CLK_IGNORE_UNUSED),
+        NODIV("disp1", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_DISP1, 29, 7, 27, 0, tegra_clk_disp1, NULL),
+        NODIV("disp2", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_DISP2, 29, 7, 26, 0, tegra_clk_disp2, NULL),
+        NODIV("sor0", mux_clkm_plldp_sor0lvds, CLK_SOURCE_SOR0, 14, 3, 182, 0, tegra_clk_sor0, &sor0_lock),
+        UART("uarta", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTA, 6, tegra_clk_uarta),
+        UART("uartb", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTB, 7, tegra_clk_uartb),
+        UART("uartc", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTC, 55, tegra_clk_uartc),
+        UART("uartd", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTD, 65, tegra_clk_uartd),
+        UART("uarte", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTE, 65, tegra_clk_uarte),
+        XUSB("xusb_host_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_HOST_SRC, 143, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_host_src),
+        XUSB("xusb_falcon_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_FALCON_SRC, 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_falcon_src),
+        XUSB("xusb_fs_src", mux_clkm_48M_pllp_480M, CLK_SOURCE_XUSB_FS_SRC, 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_fs_src),
+        XUSB("xusb_ss_src", mux_clkm_pllre_clk32_480M_pllc_ref, CLK_SOURCE_XUSB_SS_SRC, 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_ss_src),
+        XUSB("xusb_dev_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_DEV_SRC, 95, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_dev_src),
+};
+
+static struct tegra_periph_init_data gate_clks[] = {
+        GATE("rtc", "clk_32k", 4, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_rtc, 0),
+        GATE("timer", "clk_m", 5, 0, tegra_clk_timer, 0),
+        GATE("isp", "clk_m", 23, 0, tegra_clk_isp, 0),
+        GATE("vcp", "clk_m", 29, 0, tegra_clk_vcp, 0),
+        GATE("apbdma", "clk_m", 34, 0, tegra_clk_apbdma, 0),
+        GATE("kbc", "clk_32k", 36, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_kbc, 0),
+        GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, 0),
+        GATE("fuse_burn", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse_burn, 0),
+        GATE("kfuse", "clk_m", 40, TEGRA_PERIPH_ON_APB, tegra_clk_kfuse, 0),
+        GATE("apbif", "clk_m", 107, TEGRA_PERIPH_ON_APB, tegra_clk_apbif, 0),
+        GATE("hda2hdmi", "clk_m", 128, TEGRA_PERIPH_ON_APB, tegra_clk_hda2hdmi, 0),
+        GATE("bsea", "clk_m", 62, 0, tegra_clk_bsea, 0),
+        GATE("bsev", "clk_m", 63, 0, tegra_clk_bsev, 0),
+        GATE("mipi-cal", "clk_m", 56, 0, tegra_clk_mipi_cal, 0),
+        GATE("usbd", "clk_m", 22, 0, tegra_clk_usbd, 0),
+        GATE("usb2", "clk_m", 58, 0, tegra_clk_usb2, 0),
+        GATE("usb3", "clk_m", 59, 0, tegra_clk_usb3, 0),
+        GATE("csi", "pll_p_out3", 52, 0, tegra_clk_csi, 0),
+        GATE("afi", "clk_m", 72, 0, tegra_clk_afi, 0),
+        GATE("csus", "clk_m", 92, TEGRA_PERIPH_NO_RESET, tegra_clk_csus, 0),
+        GATE("dds", "clk_m", 150, TEGRA_PERIPH_ON_APB, tegra_clk_dds, 0),
+        GATE("dp2", "clk_m", 152, TEGRA_PERIPH_ON_APB, tegra_clk_dp2, 0),
+        GATE("dtv", "clk_m", 79, TEGRA_PERIPH_ON_APB, tegra_clk_dtv, 0),
+        GATE("xusb_host", "xusb_host_src", 89, 0, tegra_clk_xusb_host, 0),
+        GATE("xusb_ss", "xusb_ss_src", 156, 0, tegra_clk_xusb_ss, 0),
+        GATE("xusb_dev", "xusb_dev_src", 95, 0, tegra_clk_xusb_dev, 0),
+        GATE("dsia", "dsia_mux", 48, 0, tegra_clk_dsia, 0),
+        GATE("dsib", "dsib_mux", 82, 0, tegra_clk_dsib, 0),
+        GATE("emc", "emc_mux", 57, 0, tegra_clk_emc, CLK_IGNORE_UNUSED),
+        GATE("sata_cold", "clk_m", 129, TEGRA_PERIPH_ON_APB, tegra_clk_sata_cold, 0),
+        GATE("ispb", "clk_m", 3, 0, tegra_clk_ispb, 0),
+        GATE("vim2_clk", "clk_m", 11, 0, tegra_clk_vim2_clk, 0),
+        GATE("pcie", "clk_m", 70, 0, tegra_clk_pcie, 0),
+        GATE("dpaux", "clk_m", 181, 0, tegra_clk_dpaux, 0),
+        GATE("gpu", "pll_ref", 184, 0, tegra_clk_gpu, 0),
+};
+
+struct pll_out_data {
+        char *div_name;
+        char *pll_out_name;
+        u32 offset;
+        int clk_id;
+        u8 div_shift;
+        u8 div_flags;
+        u8 rst_shift;
+        spinlock_t *lock;
+};
+
+#define PLL_OUT(_num, _offset, _div_shift, _div_flags, _rst_shift, _id) \
+        {\
+                .div_name = "pll_p_out" #_num "_div",\
+                .pll_out_name = "pll_p_out" #_num,\
+                .offset = _offset,\
+                .div_shift = _div_shift,\
+                .div_flags = _div_flags | TEGRA_DIVIDER_FIXED |\
+                                        TEGRA_DIVIDER_ROUND_UP,\
+                .rst_shift = _rst_shift,\
+                .clk_id = tegra_clk_ ## _id,\
+                .lock = &_offset ##_lock,\
+        }
+
+static struct pll_out_data pllp_out_clks[] = {
+        PLL_OUT(1, PLLP_OUTA, 8, 0, 0, pll_p_out1),
+        PLL_OUT(2, PLLP_OUTA, 24, 0, 16, pll_p_out2),
+        PLL_OUT(2, PLLP_OUTA, 24, TEGRA_DIVIDER_INT, 16, pll_p_out2_int),
+        PLL_OUT(3, PLLP_OUTB, 8, 0, 0, pll_p_out3),
+        PLL_OUT(4, PLLP_OUTB, 24, 0, 16, pll_p_out4),
+        PLL_OUT(5, PLLP_OUTC, 24, 0, 16, pll_p_out5),
+};
+
+static void __init periph_clk_init(void __iomem *clk_base,
+                                struct tegra_clk *tegra_clks)
+{
+        int i;
+        struct clk *clk;
+        struct clk **dt_clk;
+
+        for (i = 0; i < ARRAY_SIZE(periph_clks); i++) {
+                struct tegra_clk_periph_regs *bank;
+                struct tegra_periph_init_data *data;
+
+                data = periph_clks + i;
+
+                dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                bank = get_reg_bank(data->periph.gate.clk_num);
+                if (!bank)
+                        continue;
+
+                data->periph.gate.regs = bank;
+                clk = tegra_clk_register_periph(data->name,
+                        data->p.parent_names, data->num_parents,
+                        &data->periph, clk_base, data->offset,
+                        data->flags);
+                *dt_clk = clk;
+        }
+}
+
+static void __init gate_clk_init(void __iomem *clk_base,
+                                struct tegra_clk *tegra_clks)
+{
+        int i;
+        struct clk *clk;
+        struct clk **dt_clk;
+
+        for (i = 0; i < ARRAY_SIZE(gate_clks); i++) {
+                struct tegra_periph_init_data *data;
+
+                data = gate_clks + i;
+
+                dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                clk = tegra_clk_register_periph_gate(data->name,
+                                data->p.parent_name, data->periph.gate.flags,
+                                clk_base, data->flags,
+                                data->periph.gate.clk_num,
+                                periph_clk_enb_refcnt);
+                *dt_clk = clk;
+        }
+}
+
+static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base,
+                                struct tegra_clk *tegra_clks,
+                                struct tegra_clk_pll_params *pll_params)
+{
+        struct clk *clk;
+        struct clk **dt_clk;
+        int i;
+
+        dt_clk = tegra_lookup_dt_id(tegra_clk_pll_p, tegra_clks);
+        if (dt_clk) {
+                /* PLLP */
+                clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base,
+                                        pmc_base, 0, pll_params, NULL);
+                clk_register_clkdev(clk, "pll_p", NULL);
+                *dt_clk = clk;
+        }
+
+        for (i = 0; i < ARRAY_SIZE(pllp_out_clks); i++) {
+                struct pll_out_data *data;
+
+                data = pllp_out_clks + i;
+
+                dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                clk = tegra_clk_register_divider(data->div_name, "pll_p",
+                                clk_base + data->offset, 0, data->div_flags,
+                                data->div_shift, 8, 1, data->lock);
+                clk = tegra_clk_register_pll_out(data->pll_out_name,
+                                data->div_name, clk_base + data->offset,
+                                data->rst_shift + 1, data->rst_shift,
+                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
+                                data->lock);
+                *dt_clk = clk;
+        }
+}
+
+void __init tegra_periph_clk_init(void __iomem *clk_base,
+                        void __iomem *pmc_base, struct tegra_clk *tegra_clks,
+                        struct tegra_clk_pll_params *pll_params)
+{
+        init_pllp(clk_base, pmc_base, tegra_clks, pll_params);
+        periph_clk_init(clk_base, tegra_clks);
+        gate_clk_init(clk_base, tegra_clks);
+}
diff --git a/drivers/clk/tegra/clk-tegra-pmc.c b/drivers/clk/tegra/clk-tegra-pmc.c
new file mode 100644
index 000000000000..08b21c1ee867
--- /dev/null
+++ b/drivers/clk/tegra/clk-tegra-pmc.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2012, 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/clk/tegra.h>
+
+#include "clk.h"
+#include "clk-id.h"
+
+#define PMC_CLK_OUT_CNTRL 0x1a8
+#define PMC_DPD_PADS_ORIDE 0x1c
+#define PMC_DPD_PADS_ORIDE_BLINK_ENB 20
+#define PMC_CTRL 0
+#define PMC_CTRL_BLINK_ENB 7
+#define PMC_BLINK_TIMER 0x40
+
+struct pmc_clk_init_data {
+        char *mux_name;
+        char *gate_name;
+        const char **parents;
+        int num_parents;
+        int mux_id;
+        int gate_id;
+        char *dev_name;
+        u8 mux_shift;
+        u8 gate_shift;
+};
+
+#define PMC_CLK(_num, _mux_shift, _gate_shift)\
+        {\
+                .mux_name = "clk_out_" #_num "_mux",\
+                .gate_name = "clk_out_" #_num,\
+                .parents = clk_out ##_num ##_parents,\
+                .num_parents = ARRAY_SIZE(clk_out ##_num ##_parents),\
+                .mux_id = tegra_clk_clk_out_ ##_num ##_mux,\
+                .gate_id = tegra_clk_clk_out_ ##_num,\
+                .dev_name = "extern" #_num,\
+                .mux_shift = _mux_shift,\
+                .gate_shift = _gate_shift,\
+        }
+
+static DEFINE_SPINLOCK(clk_out_lock);
+
+static const char *clk_out1_parents[] = { "clk_m", "clk_m_div2",
+        "clk_m_div4", "extern1",
+};
+
+static const char *clk_out2_parents[] = { "clk_m", "clk_m_div2",
+        "clk_m_div4", "extern2",
+};
+
+static const char *clk_out3_parents[] = { "clk_m", "clk_m_div2",
+        "clk_m_div4", "extern3",
+};
+
+static struct pmc_clk_init_data pmc_clks[] = {
+        PMC_CLK(1, 6, 2),
+        PMC_CLK(2, 14, 10),
+        PMC_CLK(3, 22, 18),
+};
+
+void __init tegra_pmc_clk_init(void __iomem *pmc_base,
+                                struct tegra_clk *tegra_clks)
+{
+        struct clk *clk;
+        struct clk **dt_clk;
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(pmc_clks); i++) {
+                struct pmc_clk_init_data *data;
+
+                data = pmc_clks + i;
+
+                dt_clk = tegra_lookup_dt_id(data->mux_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                clk = clk_register_mux(NULL, data->mux_name, data->parents,
+                                data->num_parents, CLK_SET_RATE_NO_REPARENT,
+                                pmc_base + PMC_CLK_OUT_CNTRL, data->mux_shift,
+                                3, 0, &clk_out_lock);
+                *dt_clk = clk;
+
+
+                dt_clk = tegra_lookup_dt_id(data->gate_id, tegra_clks);
+                if (!dt_clk)
+                        continue;
+
+                clk = clk_register_gate(NULL, data->gate_name, data->mux_name,
+                                        0, pmc_base + PMC_CLK_OUT_CNTRL,
+                                        data->gate_shift, 0, &clk_out_lock);
+                *dt_clk = clk;
+                clk_register_clkdev(clk, data->dev_name, data->gate_name);
+        }
+
+        /* blink */
+        writel_relaxed(0, pmc_base + PMC_BLINK_TIMER);
+        clk = clk_register_gate(NULL, "blink_override", "clk_32k", 0,
+                                pmc_base + PMC_DPD_PADS_ORIDE,
+                                PMC_DPD_PADS_ORIDE_BLINK_ENB, 0, NULL);
+
+        dt_clk = tegra_lookup_dt_id(tegra_clk_blink, tegra_clks);
+        if (!dt_clk)
+                return;
+
+        clk = clk_register_gate(NULL, "blink", "blink_override", 0,
+                                pmc_base + PMC_CTRL,
+                                PMC_CTRL_BLINK_ENB, 0, NULL);
+        clk_register_clkdev(clk, "blink", NULL);
+        *dt_clk = clk;
+}
+
diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c
new file mode 100644
index 000000000000..05dce4aa2c11
--- /dev/null
+++ b/drivers/clk/tegra/clk-tegra-super-gen4.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2012, 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/clk/tegra.h>
+
+#include "clk.h"
+#include "clk-id.h"
+
+#define PLLX_BASE 0xe0
+#define PLLX_MISC 0xe4
+#define PLLX_MISC2 0x514
+#define PLLX_MISC3 0x518
+
+#define CCLKG_BURST_POLICY 0x368
+#define CCLKLP_BURST_POLICY 0x370
+#define SCLK_BURST_POLICY 0x028
+#define SYSTEM_CLK_RATE 0x030
+
+static DEFINE_SPINLOCK(sysrate_lock);
+
+static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
+                               "pll_p", "pll_p_out2", "unused",
+                               "clk_32k", "pll_m_out1" };
+
+static const char *cclk_g_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
+                                        "pll_p", "pll_p_out4", "unused",
+                                        "unused", "pll_x" };
+
+static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
+                                         "pll_p", "pll_p_out4", "unused",
+                                         "unused", "pll_x", "pll_x_out0" };
+
+static void __init tegra_sclk_init(void __iomem *clk_base,
+                                struct tegra_clk *tegra_clks)
+{
+        struct clk *clk;
+        struct clk **dt_clk;
+
+        /* SCLK */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_sclk, tegra_clks);
+        if (dt_clk) {
+                clk = tegra_clk_register_super_mux("sclk", sclk_parents,
+                                                ARRAY_SIZE(sclk_parents),
+                                                CLK_SET_RATE_PARENT,
+                                                clk_base + SCLK_BURST_POLICY,
+                                                0, 4, 0, 0, NULL);
+                *dt_clk = clk;
+        }
+
+        /* HCLK */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_hclk, tegra_clks);
+        if (dt_clk) {
+                clk = clk_register_divider(NULL, "hclk_div", "sclk", 0,
+                                   clk_base + SYSTEM_CLK_RATE, 4, 2, 0,
+                                   &sysrate_lock);
+                clk = clk_register_gate(NULL, "hclk", "hclk_div",
+                                CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+                                clk_base + SYSTEM_CLK_RATE,
+                                7, CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
+                *dt_clk = clk;
+        }
+
+        /* PCLK */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_pclk, tegra_clks);
+        if (!dt_clk)
+                return;
+
+        clk = clk_register_divider(NULL, "pclk_div", "hclk", 0,
+                                   clk_base + SYSTEM_CLK_RATE, 0, 2, 0,
+                                   &sysrate_lock);
+        clk = clk_register_gate(NULL, "pclk", "pclk_div", CLK_SET_RATE_PARENT |
+                                CLK_IGNORE_UNUSED, clk_base + SYSTEM_CLK_RATE,
+                                3, CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
+        *dt_clk = clk;
+}
+
+void __init tegra_super_clk_gen4_init(void __iomem *clk_base,
+                                void __iomem *pmc_base,
+                                struct tegra_clk *tegra_clks,
+                                struct tegra_clk_pll_params *params)
+{
+        struct clk *clk;
+        struct clk **dt_clk;
+
+        /* CCLKG */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_cclk_g, tegra_clks);
+        if (dt_clk) {
+                clk = tegra_clk_register_super_mux("cclk_g", cclk_g_parents,
+                                        ARRAY_SIZE(cclk_g_parents),
+                                        CLK_SET_RATE_PARENT,
+                                        clk_base + CCLKG_BURST_POLICY,
+                                        0, 4, 0, 0, NULL);
+                *dt_clk = clk;
+        }
+
+        /* CCLKLP */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_cclk_lp, tegra_clks);
+        if (dt_clk) {
+                clk = tegra_clk_register_super_mux("cclk_lp", cclk_lp_parents,
+                                        ARRAY_SIZE(cclk_lp_parents),
+                                        CLK_SET_RATE_PARENT,
+                                        clk_base + CCLKLP_BURST_POLICY,
+                                        0, 4, 8, 9, NULL);
+                *dt_clk = clk;
+        }
+
+        tegra_sclk_init(clk_base, tegra_clks);
+
+#if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC)
+        /* PLLX */
+        dt_clk = tegra_lookup_dt_id(tegra_clk_pll_x, tegra_clks);
+        if (!dt_clk)
+                return;
+
+        clk = tegra_clk_register_pllxc("pll_x", "pll_ref", clk_base,
+                        pmc_base, CLK_IGNORE_UNUSED, params, NULL);
+        *dt_clk = clk;
+
+        /* PLLX_OUT0 */
+
+        dt_clk = tegra_lookup_dt_id(tegra_clk_pll_x_out0, tegra_clks);
+        if (!dt_clk)
+                return;
+        clk = clk_register_fixed_factor(NULL, "pll_x_out0", "pll_x",
+                                        CLK_SET_RATE_PARENT, 1, 2);
+        *dt_clk = clk;
+#endif
+}
+
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index 9467da7dee49..90d9d25f2228 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -23,30 +23,15 @@
 #include <linux/delay.h>
 #include <linux/export.h>
 #include <linux/clk/tegra.h>
+#include <dt-bindings/clock/tegra114-car.h>
 
 #include "clk.h"
+#include "clk-id.h"
 
-#define RST_DEVICES_L                   0x004
-#define RST_DEVICES_H                   0x008
-#define RST_DEVICES_U                   0x00C
 #define RST_DFLL_DVCO                   0x2F4
-#define RST_DEVICES_V                   0x358
-#define RST_DEVICES_W                   0x35C
-#define RST_DEVICES_X                   0x28C
-#define RST_DEVICES_SET_L               0x300
-#define RST_DEVICES_CLR_L               0x304
-#define RST_DEVICES_SET_H               0x308
-#define RST_DEVICES_CLR_H               0x30c
-#define RST_DEVICES_SET_U               0x310
-#define RST_DEVICES_CLR_U               0x314
-#define RST_DEVICES_SET_V               0x430
-#define RST_DEVICES_CLR_V               0x434
-#define RST_DEVICES_SET_W               0x438
-#define RST_DEVICES_CLR_W               0x43c
 #define CPU_FINETRIM_SELECT             0x4d4   /* override default prop dlys */
 #define CPU_FINETRIM_DR                 0x4d8   /* rise->rise prop dly A */
 #define CPU_FINETRIM_R                  0x4e4   /* rise->rise prop dly inc A */
-#define RST_DEVICES_NUM                 5
 
 /* RST_DFLL_DVCO bitfields */
 #define DVFS_DFLL_RESET_SHIFT           0
@@ -73,25 +58,7 @@
 #define CPU_FINETRIM_R_FCPU_6_SHIFT     10              /* ftop */
 #define CPU_FINETRIM_R_FCPU_6_MASK      (0x3 << CPU_FINETRIM_R_FCPU_6_SHIFT)
 
-#define CLK_OUT_ENB_L                   0x010
-#define CLK_OUT_ENB_H                   0x014
-#define CLK_OUT_ENB_U                   0x018
-#define CLK_OUT_ENB_V                   0x360
-#define CLK_OUT_ENB_W                   0x364
-#define CLK_OUT_ENB_X                   0x280
-#define CLK_OUT_ENB_SET_L               0x320
-#define CLK_OUT_ENB_CLR_L               0x324
-#define CLK_OUT_ENB_SET_H               0x328
-#define CLK_OUT_ENB_CLR_H               0x32c
-#define CLK_OUT_ENB_SET_U               0x330
-#define CLK_OUT_ENB_CLR_U               0x334
-#define CLK_OUT_ENB_SET_V               0x440
-#define CLK_OUT_ENB_CLR_V               0x444
-#define CLK_OUT_ENB_SET_W               0x448
-#define CLK_OUT_ENB_CLR_W               0x44c
-#define CLK_OUT_ENB_SET_X               0x284
-#define CLK_OUT_ENB_CLR_X               0x288
-#define CLK_OUT_ENB_NUM                 6
+#define TEGRA114_CLK_PERIPH_BANKS       5
 
 #define PLLC_BASE 0x80
 #define PLLC_MISC2 0x88
@@ -139,25 +106,6 @@
 #define PLLE_AUX 0x48c
 #define PLLC_OUT 0x84
 #define PLLM_OUT 0x94
-#define PLLP_OUTA 0xa4
-#define PLLP_OUTB 0xa8
-#define PLLA_OUT 0xb4
-
-#define AUDIO_SYNC_CLK_I2S0 0x4a0
-#define AUDIO_SYNC_CLK_I2S1 0x4a4
-#define AUDIO_SYNC_CLK_I2S2 0x4a8
-#define AUDIO_SYNC_CLK_I2S3 0x4ac
-#define AUDIO_SYNC_CLK_I2S4 0x4b0
-#define AUDIO_SYNC_CLK_SPDIF 0x4b4
-
-#define AUDIO_SYNC_DOUBLER 0x49c
-
-#define PMC_CLK_OUT_CNTRL 0x1a8
-#define PMC_DPD_PADS_ORIDE 0x1c
-#define PMC_DPD_PADS_ORIDE_BLINK_ENB 20
-#define PMC_CTRL 0
-#define PMC_CTRL_BLINK_ENB 7
-#define PMC_BLINK_TIMER 0x40
 
 #define OSC_CTRL                        0x50
 #define OSC_CTRL_OSC_FREQ_SHIFT         28
@@ -166,9 +114,6 @@
 #define PLLXC_SW_MAX_P                  6
 
 #define CCLKG_BURST_POLICY 0x368
-#define CCLKLP_BURST_POLICY 0x370
-#define SCLK_BURST_POLICY 0x028
-#define SYSTEM_CLK_RATE 0x030
 
 #define UTMIP_PLL_CFG2 0x488
 #define UTMIP_PLL_CFG2_STABLE_COUNT(x) (((x) & 0xffff) << 6)
@@ -196,91 +141,8 @@
 #define UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE     BIT(1)
 #define UTMIPLL_HW_PWRDN_CFG0_IDDQ_SWCTL        BIT(0)
 
-#define CLK_SOURCE_I2S0 0x1d8
-#define CLK_SOURCE_I2S1 0x100
-#define CLK_SOURCE_I2S2 0x104
-#define CLK_SOURCE_NDFLASH 0x160
-#define CLK_SOURCE_I2S3 0x3bc
-#define CLK_SOURCE_I2S4 0x3c0
-#define CLK_SOURCE_SPDIF_OUT 0x108
-#define CLK_SOURCE_SPDIF_IN 0x10c
-#define CLK_SOURCE_PWM 0x110
-#define CLK_SOURCE_ADX 0x638
-#define CLK_SOURCE_AMX 0x63c
-#define CLK_SOURCE_HDA 0x428
-#define CLK_SOURCE_HDA2CODEC_2X 0x3e4
-#define CLK_SOURCE_SBC1 0x134
-#define CLK_SOURCE_SBC2 0x118
-#define CLK_SOURCE_SBC3 0x11c
-#define CLK_SOURCE_SBC4 0x1b4
-#define CLK_SOURCE_SBC5 0x3c8
-#define CLK_SOURCE_SBC6 0x3cc
-#define CLK_SOURCE_SATA_OOB 0x420
-#define CLK_SOURCE_SATA 0x424
-#define CLK_SOURCE_NDSPEED 0x3f8
-#define CLK_SOURCE_VFIR 0x168
-#define CLK_SOURCE_SDMMC1 0x150
-#define CLK_SOURCE_SDMMC2 0x154
-#define CLK_SOURCE_SDMMC3 0x1bc
-#define CLK_SOURCE_SDMMC4 0x164
-#define CLK_SOURCE_VDE 0x1c8
 #define CLK_SOURCE_CSITE 0x1d4
-#define CLK_SOURCE_LA 0x1f8
-#define CLK_SOURCE_TRACE 0x634
-#define CLK_SOURCE_OWR 0x1cc
-#define CLK_SOURCE_NOR 0x1d0
-#define CLK_SOURCE_MIPI 0x174
-#define CLK_SOURCE_I2C1 0x124
-#define CLK_SOURCE_I2C2 0x198
-#define CLK_SOURCE_I2C3 0x1b8
-#define CLK_SOURCE_I2C4 0x3c4
-#define CLK_SOURCE_I2C5 0x128
-#define CLK_SOURCE_UARTA 0x178
-#define CLK_SOURCE_UARTB 0x17c
-#define CLK_SOURCE_UARTC 0x1a0
-#define CLK_SOURCE_UARTD 0x1c0
-#define CLK_SOURCE_UARTE 0x1c4
-#define CLK_SOURCE_UARTA_DBG 0x178
-#define CLK_SOURCE_UARTB_DBG 0x17c
-#define CLK_SOURCE_UARTC_DBG 0x1a0
-#define CLK_SOURCE_UARTD_DBG 0x1c0
-#define CLK_SOURCE_UARTE_DBG 0x1c4
-#define CLK_SOURCE_3D 0x158
-#define CLK_SOURCE_2D 0x15c
-#define CLK_SOURCE_VI_SENSOR 0x1a8
-#define CLK_SOURCE_VI 0x148
-#define CLK_SOURCE_EPP 0x16c
-#define CLK_SOURCE_MSENC 0x1f0
-#define CLK_SOURCE_TSEC 0x1f4
-#define CLK_SOURCE_HOST1X 0x180
-#define CLK_SOURCE_HDMI 0x18c
-#define CLK_SOURCE_DISP1 0x138
-#define CLK_SOURCE_DISP2 0x13c
-#define CLK_SOURCE_CILAB 0x614
-#define CLK_SOURCE_CILCD 0x618
-#define CLK_SOURCE_CILE 0x61c
-#define CLK_SOURCE_DSIALP 0x620
-#define CLK_SOURCE_DSIBLP 0x624
-#define CLK_SOURCE_TSENSOR 0x3b8
-#define CLK_SOURCE_D_AUDIO 0x3d0
-#define CLK_SOURCE_DAM0 0x3d8
-#define CLK_SOURCE_DAM1 0x3dc
-#define CLK_SOURCE_DAM2 0x3e0
-#define CLK_SOURCE_ACTMON 0x3e8
-#define CLK_SOURCE_EXTERN1 0x3ec
-#define CLK_SOURCE_EXTERN2 0x3f0
-#define CLK_SOURCE_EXTERN3 0x3f4
-#define CLK_SOURCE_I2CSLOW 0x3fc
-#define CLK_SOURCE_SE 0x42c
-#define CLK_SOURCE_MSELECT 0x3b4
-#define CLK_SOURCE_DFLL_REF 0x62c
-#define CLK_SOURCE_DFLL_SOC 0x630
-#define CLK_SOURCE_SOC_THERM 0x644
-#define CLK_SOURCE_XUSB_HOST_SRC 0x600
-#define CLK_SOURCE_XUSB_FALCON_SRC 0x604
-#define CLK_SOURCE_XUSB_FS_SRC 0x608
 #define CLK_SOURCE_XUSB_SS_SRC 0x610
-#define CLK_SOURCE_XUSB_DEV_SRC 0x60c
 #define CLK_SOURCE_EMC 0x19c
 
 /* PLLM override registers */
@@ -298,19 +160,13 @@ static struct cpu_clk_suspend_context {
 } tegra114_cpu_clk_sctx;
 #endif
 
-static int periph_clk_enb_refcnt[CLK_OUT_ENB_NUM * 32];
-
 static void __iomem *clk_base;
 static void __iomem *pmc_base;
 
 static DEFINE_SPINLOCK(pll_d_lock);
 static DEFINE_SPINLOCK(pll_d2_lock);
 static DEFINE_SPINLOCK(pll_u_lock);
-static DEFINE_SPINLOCK(pll_div_lock);
 static DEFINE_SPINLOCK(pll_re_lock);
-static DEFINE_SPINLOCK(clk_doubler_lock);
-static DEFINE_SPINLOCK(clk_out_lock);
-static DEFINE_SPINLOCK(sysrate_lock);
 
 static struct div_nmp pllxc_nmp = {
         .divm_shift = 0,
@@ -370,6 +226,8 @@ static struct tegra_clk_pll_params pll_c_params = {
         .stepb_shift = 9,
         .pdiv_tohw = pllxc_p,
         .div_nmp = &pllxc_nmp,
+        .freq_table = pll_c_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
 };
 
 static struct div_nmp pllcx_nmp = {
@@ -417,6 +275,8 @@ static struct tegra_clk_pll_params pll_c2_params = {
         .ext_misc_reg[0] = 0x4f0,
         .ext_misc_reg[1] = 0x4f4,
         .ext_misc_reg[2] = 0x4f8,
+        .freq_table = pll_cx_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_params pll_c3_params = {
@@ -437,6 +297,8 @@ static struct tegra_clk_pll_params pll_c3_params = {
         .ext_misc_reg[0] = 0x504,
         .ext_misc_reg[1] = 0x508,
         .ext_misc_reg[2] = 0x50c,
+        .freq_table = pll_cx_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
 };
 
 static struct div_nmp pllm_nmp = {
@@ -483,6 +345,8 @@ static struct tegra_clk_pll_params pll_m_params = {
         .div_nmp = &pllm_nmp,
         .pmc_divnm_reg = PMC_PLLM_WB0_OVERRIDE,
         .pmc_divp_reg = PMC_PLLM_WB0_OVERRIDE_2,
+        .freq_table = pll_m_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
 };
 
 static struct div_nmp pllp_nmp = {
@@ -516,6 +380,9 @@ static struct tegra_clk_pll_params pll_p_params = {
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
         .div_nmp = &pllp_nmp,
+        .freq_table = pll_p_freq_table,
+        .flags = TEGRA_PLL_FIXED | TEGRA_PLL_USE_LOCK,
+        .fixed_rate = 408000000,
 };
 
 static struct tegra_clk_pll_freq_table pll_a_freq_table[] = {
@@ -543,6 +410,8 @@ static struct tegra_clk_pll_params pll_a_params = {
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
         .div_nmp = &pllp_nmp,
+        .freq_table = pll_a_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_freq_table pll_d_freq_table[] = {
@@ -579,6 +448,9 @@ static struct tegra_clk_pll_params pll_d_params = {
         .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
         .lock_delay = 1000,
         .div_nmp = &pllp_nmp,
+        .freq_table = pll_d_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
+                 TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_params pll_d2_params = {
@@ -594,6 +466,9 @@ static struct tegra_clk_pll_params pll_d2_params = {
         .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
         .lock_delay = 1000,
         .div_nmp = &pllp_nmp,
+        .freq_table = pll_d_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
+                 TEGRA_PLL_USE_LOCK,
 };
 
 static struct pdiv_map pllu_p[] = {
@@ -634,6 +509,9 @@ static struct tegra_clk_pll_params pll_u_params = {
         .lock_delay = 1000,
         .pdiv_tohw = pllu_p,
         .div_nmp = &pllu_nmp,
+        .freq_table = pll_u_freq_table,
+        .flags = TEGRA_PLLU | TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
+                 TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_freq_table pll_x_freq_table[] = {
@@ -667,12 +545,15 @@ static struct tegra_clk_pll_params pll_x_params = {
         .stepb_shift = 24,
         .pdiv_tohw = pllxc_p,
         .div_nmp = &pllxc_nmp,
+        .freq_table = pll_x_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_freq_table pll_e_freq_table[] = {
         /* PLLE special case: use cpcon field to store cml divider value */
         {336000000, 100000000, 100, 21, 16, 11},
         {312000000, 100000000, 200, 26, 24, 13},
+        {12000000, 100000000, 200,  1,  24, 13},
         {0, 0, 0, 0, 0, 0},
 };
 
@@ -699,6 +580,9 @@ static struct tegra_clk_pll_params pll_e_params = {
         .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
         .lock_delay = 300,
         .div_nmp = &plle_nmp,
+        .freq_table = pll_e_freq_table,
+        .flags = TEGRA_PLL_FIXED,
+        .fixed_rate = 100000000,
 };
 
 static struct div_nmp pllre_nmp = {
@@ -725,53 +609,7 @@ static struct tegra_clk_pll_params pll_re_vco_params = {
         .iddq_reg = PLLRE_MISC,
         .iddq_bit_idx = PLLRE_IDDQ_BIT,
         .div_nmp = &pllre_nmp,
-};
-
-/* Peripheral clock registers */
-
-static struct tegra_clk_periph_regs periph_l_regs = {
-        .enb_reg = CLK_OUT_ENB_L,
-        .enb_set_reg = CLK_OUT_ENB_SET_L,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_L,
-        .rst_reg = RST_DEVICES_L,
-        .rst_set_reg = RST_DEVICES_SET_L,
-        .rst_clr_reg = RST_DEVICES_CLR_L,
-};
-
-static struct tegra_clk_periph_regs periph_h_regs = {
-        .enb_reg = CLK_OUT_ENB_H,
-        .enb_set_reg = CLK_OUT_ENB_SET_H,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_H,
-        .rst_reg = RST_DEVICES_H,
-        .rst_set_reg = RST_DEVICES_SET_H,
-        .rst_clr_reg = RST_DEVICES_CLR_H,
-};
-
-static struct tegra_clk_periph_regs periph_u_regs = {
-        .enb_reg = CLK_OUT_ENB_U,
-        .enb_set_reg = CLK_OUT_ENB_SET_U,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_U,
-        .rst_reg = RST_DEVICES_U,
-        .rst_set_reg = RST_DEVICES_SET_U,
-        .rst_clr_reg = RST_DEVICES_CLR_U,
-};
-
-static struct tegra_clk_periph_regs periph_v_regs = {
-        .enb_reg = CLK_OUT_ENB_V,
-        .enb_set_reg = CLK_OUT_ENB_SET_V,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_V,
-        .rst_reg = RST_DEVICES_V,
-        .rst_set_reg = RST_DEVICES_SET_V,
-        .rst_clr_reg = RST_DEVICES_CLR_V,
-};
-
-static struct tegra_clk_periph_regs periph_w_regs = {
-        .enb_reg = CLK_OUT_ENB_W,
-        .enb_set_reg = CLK_OUT_ENB_SET_W,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_W,
-        .rst_reg = RST_DEVICES_W,
-        .rst_set_reg = RST_DEVICES_SET_W,
-        .rst_clr_reg = RST_DEVICES_CLR_W,
+        .flags = TEGRA_PLL_USE_LOCK,
 };
 
 /* possible OSC frequencies in Hz */
@@ -787,120 +625,6 @@ static unsigned long tegra114_input_freq[] = {
 
 #define MASK(x) (BIT(x) - 1)
 
-#define TEGRA_INIT_DATA_MUX(_name, _con_id, _dev_id, _parents, _offset, \
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        30, MASK(2), 0, 0, 8, 1, 0, _regs, _clk_num,    \
-                        periph_clk_enb_refcnt, _gate_flags, _clk_id,    \
-                        _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_MUX_FLAGS(_name, _con_id, _dev_id, _parents, _offset,\
-                            _clk_num, _regs, _gate_flags, _clk_id, flags)\
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        30, MASK(2), 0, 0, 8, 1, 0, _regs, _clk_num,    \
-                        periph_clk_enb_refcnt, _gate_flags, _clk_id,    \
-                        _parents##_idx, flags)
-
-#define TEGRA_INIT_DATA_MUX8(_name, _con_id, _dev_id, _parents, _offset, \
-                             _clk_num, _regs, _gate_flags, _clk_id)     \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        29, MASK(3), 0, 0, 8, 1, 0, _regs, _clk_num,    \
-                        periph_clk_enb_refcnt, _gate_flags, _clk_id,    \
-                        _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_INT(_name, _con_id, _dev_id, _parents, _offset, \
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT, _regs,\
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
-                        _clk_id, _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_INT_FLAGS(_name, _con_id, _dev_id, _parents, _offset,\
-                            _clk_num, _regs, _gate_flags, _clk_id, flags)\
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT, _regs,\
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
-                        _clk_id, _parents##_idx, flags)
-
-#define TEGRA_INIT_DATA_INT8(_name, _con_id, _dev_id, _parents, _offset,\
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT, _regs,\
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
-                        _clk_id, _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_UART(_name, _con_id, _dev_id, _parents, _offset,\
-                             _clk_num, _regs, _clk_id)                  \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART, _regs,\
-                        _clk_num, periph_clk_enb_refcnt, 0, _clk_id,    \
-                        _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_I2C(_name, _con_id, _dev_id, _parents, _offset,\
-                             _clk_num, _regs, _clk_id)                  \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        30, MASK(2), 0, 0, 16, 0, 0, _regs, _clk_num,   \
-                        periph_clk_enb_refcnt, 0, _clk_id, _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_NODIV(_name, _con_id, _dev_id, _parents, _offset, \
-                              _mux_shift, _mux_mask, _clk_num, _regs,   \
-                              _gate_flags, _clk_id)                     \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset,\
-                        _mux_shift, _mux_mask, 0, 0, 0, 0, 0, _regs,    \
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
-                        _clk_id, _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_XUSB(_name, _con_id, _dev_id, _parents, _offset, \
-                             _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parents, _offset, \
-                        29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT, _regs, \
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,    \
-                        _clk_id, _parents##_idx, 0)
-
-#define TEGRA_INIT_DATA_AUDIO(_name, _con_id, _dev_id, _offset,  _clk_num,\
-                                 _regs, _gate_flags, _clk_id)           \
-        TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, mux_d_audio_clk, \
-                        _offset, 16, 0xE01F, 0, 0, 8, 1, 0, _regs, _clk_num, \
-                        periph_clk_enb_refcnt, _gate_flags , _clk_id,   \
-                        mux_d_audio_clk_idx, 0)
-
-enum tegra114_clk {
-        rtc = 4, timer = 5, uarta = 6, sdmmc2 = 9, i2s1 = 11, i2c1 = 12,
-        ndflash = 13, sdmmc1 = 14, sdmmc4 = 15, pwm = 17, i2s2 = 18, epp = 19,
-        gr_2d = 21, usbd = 22, isp = 23, gr_3d = 24, disp2 = 26, disp1 = 27,
-        host1x = 28, vcp = 29, i2s0 = 30, apbdma = 34, kbc = 36, kfuse = 40,
-        sbc1 = 41, nor = 42, sbc2 = 44, sbc3 = 46, i2c5 = 47, dsia = 48,
-        mipi = 50, hdmi = 51, csi = 52, i2c2 = 54, uartc = 55, mipi_cal = 56,
-        emc, usb2, usb3, vde = 61, bsea = 62, bsev = 63, uartd = 65,
-        i2c3 = 67, sbc4 = 68, sdmmc3 = 69, owr = 71, csite = 73,
-        la = 76, trace = 77, soc_therm = 78, dtv = 79, ndspeed = 80,
-        i2cslow = 81, dsib = 82, tsec = 83, xusb_host = 89, msenc = 91,
-        csus = 92, mselect = 99, tsensor = 100, i2s3 = 101, i2s4 = 102,
-        i2c4 = 103, sbc5 = 104, sbc6 = 105, d_audio, apbif = 107, dam0, dam1,
-        dam2, hda2codec_2x = 111, audio0_2x = 113, audio1_2x, audio2_2x,
-        audio3_2x, audio4_2x, spdif_2x, actmon = 119, extern1 = 120,
-        extern2 = 121, extern3 = 122, hda = 125, se = 127, hda2hdmi = 128,
-        cilab = 144, cilcd = 145, cile = 146, dsialp = 147, dsiblp = 148,
-        dds = 150, dp2 = 152, amx = 153, adx = 154, xusb_ss = 156, uartb = 192,
-        vfir, spdif_in, spdif_out, vi, vi_sensor, fuse, fuse_burn, clk_32k,
-        clk_m, clk_m_div2, clk_m_div4, pll_ref, pll_c, pll_c_out1, pll_c2,
-        pll_c3, pll_m, pll_m_out1, pll_p, pll_p_out1, pll_p_out2, pll_p_out3,
-        pll_p_out4, pll_a, pll_a_out0, pll_d, pll_d_out0, pll_d2, pll_d2_out0,
-        pll_u, pll_u_480M, pll_u_60M, pll_u_48M, pll_u_12M, pll_x, pll_x_out0,
-        pll_re_vco, pll_re_out, pll_e_out0, spdif_in_sync, i2s0_sync,
-        i2s1_sync, i2s2_sync, i2s3_sync, i2s4_sync, vimclk_sync, audio0,
-        audio1, audio2, audio3, audio4, spdif, clk_out_1, clk_out_2, clk_out_3,
-        blink, xusb_host_src = 252, xusb_falcon_src, xusb_fs_src, xusb_ss_src,
-        xusb_dev_src, xusb_dev, xusb_hs_src, sclk, hclk, pclk, cclk_g, cclk_lp,
-        dfll_ref = 264, dfll_soc,
-
-        /* Mux clocks */
-
-        audio0_mux = 300, audio1_mux, audio2_mux, audio3_mux, audio4_mux,
-        spdif_mux, clk_out_1_mux, clk_out_2_mux, clk_out_3_mux, dsia_mux,
-        dsib_mux, clk_max,
-};
-
 struct utmi_clk_param {
         /* Oscillator Frequency in KHz */
         u32 osc_frequency;
@@ -934,122 +658,11 @@ static const struct utmi_clk_param utmi_parameters[] = {
 
 /* peripheral mux definitions */
 
-#define MUX_I2S_SPDIF(_id)                                              \
-static const char *mux_pllaout0_##_id##_2x_pllp_clkm[] = { "pll_a_out0", \
-                                                           #_id, "pll_p",\
-                                                           "clk_m"};
-MUX_I2S_SPDIF(audio0)
-MUX_I2S_SPDIF(audio1)
-MUX_I2S_SPDIF(audio2)
-MUX_I2S_SPDIF(audio3)
-MUX_I2S_SPDIF(audio4)
-MUX_I2S_SPDIF(audio)
-
-#define mux_pllaout0_audio0_2x_pllp_clkm_idx NULL
-#define mux_pllaout0_audio1_2x_pllp_clkm_idx NULL
-#define mux_pllaout0_audio2_2x_pllp_clkm_idx NULL
-#define mux_pllaout0_audio3_2x_pllp_clkm_idx NULL
-#define mux_pllaout0_audio4_2x_pllp_clkm_idx NULL
-#define mux_pllaout0_audio_2x_pllp_clkm_idx NULL
-
-static const char *mux_pllp_pllc_pllm_clkm[] = {
-        "pll_p", "pll_c", "pll_m", "clk_m"
-};
-#define mux_pllp_pllc_pllm_clkm_idx NULL
-
-static const char *mux_pllp_pllc_pllm[] = { "pll_p", "pll_c", "pll_m" };
-#define mux_pllp_pllc_pllm_idx NULL
-
-static const char *mux_pllp_pllc_clk32_clkm[] = {
-        "pll_p", "pll_c", "clk_32k", "clk_m"
-};
-#define mux_pllp_pllc_clk32_clkm_idx NULL
-
-static const char *mux_plla_pllc_pllp_clkm[] = {
-        "pll_a_out0", "pll_c", "pll_p", "clk_m"
-};
-#define mux_plla_pllc_pllp_clkm_idx mux_pllp_pllc_pllm_clkm_idx
-
-static const char *mux_pllp_pllc2_c_c3_pllm_clkm[] = {
-        "pll_p", "pll_c2", "pll_c", "pll_c3", "pll_m", "clk_m"
-};
-static u32 mux_pllp_pllc2_c_c3_pllm_clkm_idx[] = {
-        [0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6,
-};
-
-static const char *mux_pllp_clkm[] = {
-        "pll_p", "clk_m"
-};
-static u32 mux_pllp_clkm_idx[] = {
-        [0] = 0, [1] = 3,
-};
-
-static const char *mux_pllm_pllc2_c_c3_pllp_plla[] = {
-        "pll_m", "pll_c2", "pll_c", "pll_c3", "pll_p", "pll_a_out0"
-};
-#define mux_pllm_pllc2_c_c3_pllp_plla_idx mux_pllp_pllc2_c_c3_pllm_clkm_idx
-
-static const char *mux_pllp_pllm_plld_plla_pllc_plld2_clkm[] = {
-        "pll_p", "pll_m", "pll_d_out0", "pll_a_out0", "pll_c",
-        "pll_d2_out0", "clk_m"
-};
-#define mux_pllp_pllm_plld_plla_pllc_plld2_clkm_idx NULL
-
-static const char *mux_pllm_pllc_pllp_plla[] = {
-        "pll_m", "pll_c", "pll_p", "pll_a_out0"
-};
-#define mux_pllm_pllc_pllp_plla_idx mux_pllp_pllc_pllm_clkm_idx
-
-static const char *mux_pllp_pllc_clkm[] = {
-        "pll_p", "pll_c", "pll_m"
-};
-static u32 mux_pllp_pllc_clkm_idx[] = {
-        [0] = 0, [1] = 1, [2] = 3,
-};
-
-static const char *mux_pllp_pllc_clkm_clk32[] = {
-        "pll_p", "pll_c", "clk_m", "clk_32k"
-};
-#define mux_pllp_pllc_clkm_clk32_idx NULL
-
-static const char *mux_plla_clk32_pllp_clkm_plle[] = {
-        "pll_a_out0", "clk_32k", "pll_p", "clk_m", "pll_e_out0"
-};
-#define mux_plla_clk32_pllp_clkm_plle_idx NULL
-
-static const char *mux_clkm_pllp_pllc_pllre[] = {
-        "clk_m", "pll_p", "pll_c", "pll_re_out"
-};
-static u32 mux_clkm_pllp_pllc_pllre_idx[] = {
-        [0] = 0, [1] = 1, [2] = 3, [3] = 5,
-};
-
-static const char *mux_clkm_48M_pllp_480M[] = {
-        "clk_m", "pll_u_48M", "pll_p", "pll_u_480M"
-};
-#define mux_clkm_48M_pllp_480M_idx NULL
-
-static const char *mux_clkm_pllre_clk32_480M_pllc_ref[] = {
-        "clk_m", "pll_re_out", "clk_32k", "pll_u_480M", "pll_c", "pll_ref"
-};
-static u32 mux_clkm_pllre_clk32_480M_pllc_ref_idx[] = {
-        [0] = 0, [1] = 1, [2] = 3, [3] = 3, [4] = 4, [5] = 7,
-};
-
 static const char *mux_plld_out0_plld2_out0[] = {
         "pll_d_out0", "pll_d2_out0",
 };
 #define mux_plld_out0_plld2_out0_idx NULL
 
-static const char *mux_d_audio_clk[] = {
-        "pll_a_out0", "pll_p", "clk_m", "spdif_in_sync", "i2s0_sync",
-        "i2s1_sync", "i2s2_sync", "i2s3_sync", "i2s4_sync", "vimclk_sync",
-};
-static u32 mux_d_audio_clk_idx[] = {
-        [0] = 0, [1] = 0x8000, [2] = 0xc000, [3] = 0xE000, [4] = 0xE001,
-        [5] = 0xE002, [6] = 0xE003, [7] = 0xE004, [8] = 0xE005, [9] = 0xE007,
-};
-
 static const char *mux_pllmcp_clkm[] = {
         "pll_m_out0", "pll_c_out0", "pll_p_out0", "clk_m", "pll_m_ud",
 };
@@ -1064,8 +677,253 @@ static const struct clk_div_table pll_re_div_table[] = {
         { .val = 0, .div = 0 },
 };
 
-static struct clk *clks[clk_max];
-static struct clk_onecell_data clk_data;
+static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {
+        [tegra_clk_rtc] = { .dt_id = TEGRA114_CLK_RTC, .present = true },
+        [tegra_clk_timer] = { .dt_id = TEGRA114_CLK_TIMER, .present = true },
+        [tegra_clk_uarta] = { .dt_id = TEGRA114_CLK_UARTA, .present = true },
+        [tegra_clk_uartd] = { .dt_id = TEGRA114_CLK_UARTD, .present = true },
+        [tegra_clk_sdmmc2] = { .dt_id = TEGRA114_CLK_SDMMC2, .present = true },
+        [tegra_clk_i2s1] = { .dt_id = TEGRA114_CLK_I2S1, .present = true },
+        [tegra_clk_i2c1] = { .dt_id = TEGRA114_CLK_I2C1, .present = true },
+        [tegra_clk_ndflash] = { .dt_id = TEGRA114_CLK_NDFLASH, .present = true },
+        [tegra_clk_sdmmc1] = { .dt_id = TEGRA114_CLK_SDMMC1, .present = true },
+        [tegra_clk_sdmmc4] = { .dt_id = TEGRA114_CLK_SDMMC4, .present = true },
+        [tegra_clk_pwm] = { .dt_id = TEGRA114_CLK_PWM, .present = true },
+        [tegra_clk_i2s0] = { .dt_id = TEGRA114_CLK_I2S0, .present = true },
+        [tegra_clk_i2s2] = { .dt_id = TEGRA114_CLK_I2S2, .present = true },
+        [tegra_clk_epp_8] = { .dt_id = TEGRA114_CLK_EPP, .present = true },
+        [tegra_clk_gr2d_8] = { .dt_id = TEGRA114_CLK_GR2D, .present = true },
+        [tegra_clk_usbd] = { .dt_id = TEGRA114_CLK_USBD, .present = true },
+        [tegra_clk_isp] = { .dt_id = TEGRA114_CLK_ISP, .present = true },
+        [tegra_clk_gr3d_8] = { .dt_id = TEGRA114_CLK_GR3D, .present = true },
+        [tegra_clk_disp2] = { .dt_id = TEGRA114_CLK_DISP2, .present = true },
+        [tegra_clk_disp1] = { .dt_id = TEGRA114_CLK_DISP1, .present = true },
+        [tegra_clk_host1x_8] = { .dt_id = TEGRA114_CLK_HOST1X, .present = true },
+        [tegra_clk_vcp] = { .dt_id = TEGRA114_CLK_VCP, .present = true },
+        [tegra_clk_apbdma] = { .dt_id = TEGRA114_CLK_APBDMA, .present = true },
+        [tegra_clk_kbc] = { .dt_id = TEGRA114_CLK_KBC, .present = true },
+        [tegra_clk_kfuse] = { .dt_id = TEGRA114_CLK_KFUSE, .present = true },
+        [tegra_clk_sbc1_8] = { .dt_id = TEGRA114_CLK_SBC1, .present = true },
+        [tegra_clk_nor] = { .dt_id = TEGRA114_CLK_NOR, .present = true },
+        [tegra_clk_sbc2_8] = { .dt_id = TEGRA114_CLK_SBC2, .present = true },
+        [tegra_clk_sbc3_8] = { .dt_id = TEGRA114_CLK_SBC3, .present = true },
+        [tegra_clk_i2c5] = { .dt_id = TEGRA114_CLK_I2C5, .present = true },
+        [tegra_clk_dsia] = { .dt_id = TEGRA114_CLK_DSIA, .present = true },
+        [tegra_clk_mipi] = { .dt_id = TEGRA114_CLK_MIPI, .present = true },
+        [tegra_clk_hdmi] = { .dt_id = TEGRA114_CLK_HDMI, .present = true },
+        [tegra_clk_csi] = { .dt_id = TEGRA114_CLK_CSI, .present = true },
+        [tegra_clk_i2c2] = { .dt_id = TEGRA114_CLK_I2C2, .present = true },
+        [tegra_clk_uartc] = { .dt_id = TEGRA114_CLK_UARTC, .present = true },
+        [tegra_clk_mipi_cal] = { .dt_id = TEGRA114_CLK_MIPI_CAL, .present = true },
+        [tegra_clk_emc] = { .dt_id = TEGRA114_CLK_EMC, .present = true },
+        [tegra_clk_usb2] = { .dt_id = TEGRA114_CLK_USB2, .present = true },
+        [tegra_clk_usb3] = { .dt_id = TEGRA114_CLK_USB3, .present = true },
+        [tegra_clk_vde_8] = { .dt_id = TEGRA114_CLK_VDE, .present = true },
+        [tegra_clk_bsea] = { .dt_id = TEGRA114_CLK_BSEA, .present = true },
+        [tegra_clk_bsev] = { .dt_id = TEGRA114_CLK_BSEV, .present = true },
+        [tegra_clk_i2c3] = { .dt_id = TEGRA114_CLK_I2C3, .present = true },
+        [tegra_clk_sbc4_8] = { .dt_id = TEGRA114_CLK_SBC4, .present = true },
+        [tegra_clk_sdmmc3] = { .dt_id = TEGRA114_CLK_SDMMC3, .present = true },
+        [tegra_clk_owr] = { .dt_id = TEGRA114_CLK_OWR, .present = true },
+        [tegra_clk_csite] = { .dt_id = TEGRA114_CLK_CSITE, .present = true },
+        [tegra_clk_la] = { .dt_id = TEGRA114_CLK_LA, .present = true },
+        [tegra_clk_trace] = { .dt_id = TEGRA114_CLK_TRACE, .present = true },
+        [tegra_clk_soc_therm] = { .dt_id = TEGRA114_CLK_SOC_THERM, .present = true },
+        [tegra_clk_dtv] = { .dt_id = TEGRA114_CLK_DTV, .present = true },
+        [tegra_clk_ndspeed] = { .dt_id = TEGRA114_CLK_NDSPEED, .present = true },
+        [tegra_clk_i2cslow] = { .dt_id = TEGRA114_CLK_I2CSLOW, .present = true },
+        [tegra_clk_dsib] = { .dt_id = TEGRA114_CLK_DSIB, .present = true },
+        [tegra_clk_tsec] = { .dt_id = TEGRA114_CLK_TSEC, .present = true },
+        [tegra_clk_xusb_host] = { .dt_id = TEGRA114_CLK_XUSB_HOST, .present = true },
+        [tegra_clk_msenc] = { .dt_id = TEGRA114_CLK_MSENC, .present = true },
+        [tegra_clk_csus] = { .dt_id = TEGRA114_CLK_CSUS, .present = true },
+        [tegra_clk_mselect] = { .dt_id = TEGRA114_CLK_MSELECT, .present = true },
+        [tegra_clk_tsensor] = { .dt_id = TEGRA114_CLK_TSENSOR, .present = true },
+        [tegra_clk_i2s3] = { .dt_id = TEGRA114_CLK_I2S3, .present = true },
+        [tegra_clk_i2s4] = { .dt_id = TEGRA114_CLK_I2S4, .present = true },
+        [tegra_clk_i2c4] = { .dt_id = TEGRA114_CLK_I2C4, .present = true },
+        [tegra_clk_sbc5_8] = { .dt_id = TEGRA114_CLK_SBC5, .present = true },
+        [tegra_clk_sbc6_8] = { .dt_id = TEGRA114_CLK_SBC6, .present = true },
+        [tegra_clk_d_audio] = { .dt_id = TEGRA114_CLK_D_AUDIO, .present = true },
+        [tegra_clk_apbif] = { .dt_id = TEGRA114_CLK_APBIF, .present = true },
+        [tegra_clk_dam0] = { .dt_id = TEGRA114_CLK_DAM0, .present = true },
+        [tegra_clk_dam1] = { .dt_id = TEGRA114_CLK_DAM1, .present = true },
+        [tegra_clk_dam2] = { .dt_id = TEGRA114_CLK_DAM2, .present = true },
+        [tegra_clk_hda2codec_2x] = { .dt_id = TEGRA114_CLK_HDA2CODEC_2X, .present = true },
+        [tegra_clk_audio0_2x] = { .dt_id = TEGRA114_CLK_AUDIO0_2X, .present = true },
+        [tegra_clk_audio1_2x] = { .dt_id = TEGRA114_CLK_AUDIO1_2X, .present = true },
+        [tegra_clk_audio2_2x] = { .dt_id = TEGRA114_CLK_AUDIO2_2X, .present = true },
+        [tegra_clk_audio3_2x] = { .dt_id = TEGRA114_CLK_AUDIO3_2X, .present = true },
+        [tegra_clk_audio4_2x] = { .dt_id = TEGRA114_CLK_AUDIO4_2X, .present = true },
+        [tegra_clk_spdif_2x] = { .dt_id = TEGRA114_CLK_SPDIF_2X, .present = true },
+        [tegra_clk_actmon] = { .dt_id = TEGRA114_CLK_ACTMON, .present = true },
+        [tegra_clk_extern1] = { .dt_id = TEGRA114_CLK_EXTERN1, .present = true },
+        [tegra_clk_extern2] = { .dt_id = TEGRA114_CLK_EXTERN2, .present = true },
+        [tegra_clk_extern3] = { .dt_id = TEGRA114_CLK_EXTERN3, .present = true },
+        [tegra_clk_hda] = { .dt_id = TEGRA114_CLK_HDA, .present = true },
+        [tegra_clk_se] = { .dt_id = TEGRA114_CLK_SE, .present = true },
+        [tegra_clk_hda2hdmi] = { .dt_id = TEGRA114_CLK_HDA2HDMI, .present = true },
+        [tegra_clk_cilab] = { .dt_id = TEGRA114_CLK_CILAB, .present = true },
+        [tegra_clk_cilcd] = { .dt_id = TEGRA114_CLK_CILCD, .present = true },
+        [tegra_clk_cile] = { .dt_id = TEGRA114_CLK_CILE, .present = true },
+        [tegra_clk_dsialp] = { .dt_id = TEGRA114_CLK_DSIALP, .present = true },
+        [tegra_clk_dsiblp] = { .dt_id = TEGRA114_CLK_DSIBLP, .present = true },
+        [tegra_clk_dds] = { .dt_id = TEGRA114_CLK_DDS, .present = true },
+        [tegra_clk_dp2] = { .dt_id = TEGRA114_CLK_DP2, .present = true },
+        [tegra_clk_amx] = { .dt_id = TEGRA114_CLK_AMX, .present = true },
+        [tegra_clk_adx] = { .dt_id = TEGRA114_CLK_ADX, .present = true },
+        [tegra_clk_xusb_ss] = { .dt_id = TEGRA114_CLK_XUSB_SS, .present = true },
+        [tegra_clk_uartb] = { .dt_id = TEGRA114_CLK_UARTB, .present = true },
+        [tegra_clk_vfir] = { .dt_id = TEGRA114_CLK_VFIR, .present = true },
+        [tegra_clk_spdif_in] = { .dt_id = TEGRA114_CLK_SPDIF_IN, .present = true },
+        [tegra_clk_spdif_out] = { .dt_id = TEGRA114_CLK_SPDIF_OUT, .present = true },
+        [tegra_clk_vi_8] = { .dt_id = TEGRA114_CLK_VI, .present = true },
+        [tegra_clk_vi_sensor_8] = { .dt_id = TEGRA114_CLK_VI_SENSOR, .present = true },
+        [tegra_clk_fuse] = { .dt_id = TEGRA114_CLK_FUSE, .present = true },
+        [tegra_clk_fuse_burn] = { .dt_id = TEGRA114_CLK_FUSE_BURN, .present = true },
+        [tegra_clk_clk_32k] = { .dt_id = TEGRA114_CLK_CLK_32K, .present = true },
+        [tegra_clk_clk_m] = { .dt_id = TEGRA114_CLK_CLK_M, .present = true },
+        [tegra_clk_clk_m_div2] = { .dt_id = TEGRA114_CLK_CLK_M_DIV2, .present = true },
+        [tegra_clk_clk_m_div4] = { .dt_id = TEGRA114_CLK_CLK_M_DIV4, .present = true },
+        [tegra_clk_pll_ref] = { .dt_id = TEGRA114_CLK_PLL_REF, .present = true },
+        [tegra_clk_pll_c] = { .dt_id = TEGRA114_CLK_PLL_C, .present = true },
+        [tegra_clk_pll_c_out1] = { .dt_id = TEGRA114_CLK_PLL_C_OUT1, .present = true },
+        [tegra_clk_pll_c2] = { .dt_id = TEGRA114_CLK_PLL_C2, .present = true },
+        [tegra_clk_pll_c3] = { .dt_id = TEGRA114_CLK_PLL_C3, .present = true },
+        [tegra_clk_pll_m] = { .dt_id = TEGRA114_CLK_PLL_M, .present = true },
+        [tegra_clk_pll_m_out1] = { .dt_id = TEGRA114_CLK_PLL_M_OUT1, .present = true },
+        [tegra_clk_pll_p] = { .dt_id = TEGRA114_CLK_PLL_P, .present = true },
+        [tegra_clk_pll_p_out1] = { .dt_id = TEGRA114_CLK_PLL_P_OUT1, .present = true },
+        [tegra_clk_pll_p_out2_int] = { .dt_id = TEGRA114_CLK_PLL_P_OUT2, .present = true },
+        [tegra_clk_pll_p_out3] = { .dt_id = TEGRA114_CLK_PLL_P_OUT3, .present = true },
+        [tegra_clk_pll_p_out4] = { .dt_id = TEGRA114_CLK_PLL_P_OUT4, .present = true },
+        [tegra_clk_pll_a] = { .dt_id = TEGRA114_CLK_PLL_A, .present = true },
+        [tegra_clk_pll_a_out0] = { .dt_id = TEGRA114_CLK_PLL_A_OUT0, .present = true },
+        [tegra_clk_pll_d] = { .dt_id = TEGRA114_CLK_PLL_D, .present = true },
+        [tegra_clk_pll_d_out0] = { .dt_id = TEGRA114_CLK_PLL_D_OUT0, .present = true },
+        [tegra_clk_pll_d2] = { .dt_id = TEGRA114_CLK_PLL_D2, .present = true },
+        [tegra_clk_pll_d2_out0] = { .dt_id = TEGRA114_CLK_PLL_D2_OUT0, .present = true },
+        [tegra_clk_pll_u] = { .dt_id = TEGRA114_CLK_PLL_U, .present = true },
+        [tegra_clk_pll_u_480m] = { .dt_id = TEGRA114_CLK_PLL_U_480M, .present = true },
+        [tegra_clk_pll_u_60m] = { .dt_id = TEGRA114_CLK_PLL_U_60M, .present = true },
+        [tegra_clk_pll_u_48m] = { .dt_id = TEGRA114_CLK_PLL_U_48M, .present = true },
+        [tegra_clk_pll_u_12m] = { .dt_id = TEGRA114_CLK_PLL_U_12M, .present = true },
+        [tegra_clk_pll_x] = { .dt_id = TEGRA114_CLK_PLL_X, .present = true },
+        [tegra_clk_pll_x_out0] = { .dt_id = TEGRA114_CLK_PLL_X_OUT0, .present = true },
+        [tegra_clk_pll_re_vco] = { .dt_id = TEGRA114_CLK_PLL_RE_VCO, .present = true },
+        [tegra_clk_pll_re_out] = { .dt_id = TEGRA114_CLK_PLL_RE_OUT, .present = true },
+        [tegra_clk_pll_e_out0] = { .dt_id = TEGRA114_CLK_PLL_E_OUT0, .present = true },
+        [tegra_clk_spdif_in_sync] = { .dt_id = TEGRA114_CLK_SPDIF_IN_SYNC, .present = true },
+        [tegra_clk_i2s0_sync] = { .dt_id = TEGRA114_CLK_I2S0_SYNC, .present = true },
+        [tegra_clk_i2s1_sync] = { .dt_id = TEGRA114_CLK_I2S1_SYNC, .present = true },
+        [tegra_clk_i2s2_sync] = { .dt_id = TEGRA114_CLK_I2S2_SYNC, .present = true },
+        [tegra_clk_i2s3_sync] = { .dt_id = TEGRA114_CLK_I2S3_SYNC, .present = true },
+        [tegra_clk_i2s4_sync] = { .dt_id = TEGRA114_CLK_I2S4_SYNC, .present = true },
+        [tegra_clk_vimclk_sync] = { .dt_id = TEGRA114_CLK_VIMCLK_SYNC, .present = true },
+        [tegra_clk_audio0] = { .dt_id = TEGRA114_CLK_AUDIO0, .present = true },
+        [tegra_clk_audio1] = { .dt_id = TEGRA114_CLK_AUDIO1, .present = true },
+        [tegra_clk_audio2] = { .dt_id = TEGRA114_CLK_AUDIO2, .present = true },
+        [tegra_clk_audio3] = { .dt_id = TEGRA114_CLK_AUDIO3, .present = true },
+        [tegra_clk_audio4] = { .dt_id = TEGRA114_CLK_AUDIO4, .present = true },
+        [tegra_clk_spdif] = { .dt_id = TEGRA114_CLK_SPDIF, .present = true },
+        [tegra_clk_clk_out_1] = { .dt_id = TEGRA114_CLK_CLK_OUT_1, .present = true },
+        [tegra_clk_clk_out_2] = { .dt_id = TEGRA114_CLK_CLK_OUT_2, .present = true },
+        [tegra_clk_clk_out_3] = { .dt_id = TEGRA114_CLK_CLK_OUT_3, .present = true },
+        [tegra_clk_blink] = { .dt_id = TEGRA114_CLK_BLINK, .present = true },
+        [tegra_clk_xusb_host_src] = { .dt_id = TEGRA114_CLK_XUSB_HOST_SRC, .present = true },
+        [tegra_clk_xusb_falcon_src] = { .dt_id = TEGRA114_CLK_XUSB_FALCON_SRC, .present = true },
+        [tegra_clk_xusb_fs_src] = { .dt_id = TEGRA114_CLK_XUSB_FS_SRC, .present = true },
+        [tegra_clk_xusb_ss_src] = { .dt_id = TEGRA114_CLK_XUSB_SS_SRC, .present = true },
+        [tegra_clk_xusb_dev_src] = { .dt_id = TEGRA114_CLK_XUSB_DEV_SRC, .present = true },
+        [tegra_clk_xusb_dev] = { .dt_id = TEGRA114_CLK_XUSB_DEV, .present = true },
+        [tegra_clk_xusb_hs_src] = { .dt_id = TEGRA114_CLK_XUSB_HS_SRC, .present = true },
+        [tegra_clk_sclk] = { .dt_id = TEGRA114_CLK_SCLK, .present = true },
+        [tegra_clk_hclk] = { .dt_id = TEGRA114_CLK_HCLK, .present = true },
+        [tegra_clk_pclk] = { .dt_id = TEGRA114_CLK_PCLK, .present = true },
+        [tegra_clk_cclk_g] = { .dt_id = TEGRA114_CLK_CCLK_G, .present = true },
+        [tegra_clk_cclk_lp] = { .dt_id = TEGRA114_CLK_CCLK_LP, .present = true },
+        [tegra_clk_dfll_ref] = { .dt_id = TEGRA114_CLK_DFLL_REF, .present = true },
+        [tegra_clk_dfll_soc] = { .dt_id = TEGRA114_CLK_DFLL_SOC, .present = true },
+        [tegra_clk_audio0_mux] = { .dt_id = TEGRA114_CLK_AUDIO0_MUX, .present = true },
+        [tegra_clk_audio1_mux] = { .dt_id = TEGRA114_CLK_AUDIO1_MUX, .present = true },
+        [tegra_clk_audio2_mux] = { .dt_id = TEGRA114_CLK_AUDIO2_MUX, .present = true },
+        [tegra_clk_audio3_mux] = { .dt_id = TEGRA114_CLK_AUDIO3_MUX, .present = true },
+        [tegra_clk_audio4_mux] = { .dt_id = TEGRA114_CLK_AUDIO4_MUX, .present = true },
+        [tegra_clk_spdif_mux] = { .dt_id = TEGRA114_CLK_SPDIF_MUX, .present = true },
+        [tegra_clk_clk_out_1_mux] = { .dt_id = TEGRA114_CLK_CLK_OUT_1_MUX, .present = true },
+        [tegra_clk_clk_out_2_mux] = { .dt_id = TEGRA114_CLK_CLK_OUT_2_MUX, .present = true },
+        [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA114_CLK_CLK_OUT_3_MUX, .present = true },
+        [tegra_clk_dsia_mux] = { .dt_id = TEGRA114_CLK_DSIA_MUX, .present = true },
+        [tegra_clk_dsib_mux] = { .dt_id = TEGRA114_CLK_DSIB_MUX, .present = true },
+};
+
+static struct tegra_devclk devclks[] __initdata = {
+        { .con_id = "clk_m", .dt_id = TEGRA114_CLK_CLK_M },
+        { .con_id = "pll_ref", .dt_id = TEGRA114_CLK_PLL_REF },
+        { .con_id = "clk_32k", .dt_id = TEGRA114_CLK_CLK_32K },
+        { .con_id = "clk_m_div2", .dt_id = TEGRA114_CLK_CLK_M_DIV2 },
+        { .con_id = "clk_m_div4", .dt_id = TEGRA114_CLK_CLK_M_DIV4 },
+        { .con_id = "pll_c", .dt_id = TEGRA114_CLK_PLL_C },
+        { .con_id = "pll_c_out1", .dt_id = TEGRA114_CLK_PLL_C_OUT1 },
+        { .con_id = "pll_c2", .dt_id = TEGRA114_CLK_PLL_C2 },
+        { .con_id = "pll_c3", .dt_id = TEGRA114_CLK_PLL_C3 },
+        { .con_id = "pll_p", .dt_id = TEGRA114_CLK_PLL_P },
+        { .con_id = "pll_p_out1", .dt_id = TEGRA114_CLK_PLL_P_OUT1 },
+        { .con_id = "pll_p_out2", .dt_id = TEGRA114_CLK_PLL_P_OUT2 },
+        { .con_id = "pll_p_out3", .dt_id = TEGRA114_CLK_PLL_P_OUT3 },
+        { .con_id = "pll_p_out4", .dt_id = TEGRA114_CLK_PLL_P_OUT4 },
+        { .con_id = "pll_m", .dt_id = TEGRA114_CLK_PLL_M },
+        { .con_id = "pll_m_out1", .dt_id = TEGRA114_CLK_PLL_M_OUT1 },
+        { .con_id = "pll_x", .dt_id = TEGRA114_CLK_PLL_X },
+        { .con_id = "pll_x_out0", .dt_id = TEGRA114_CLK_PLL_X_OUT0 },
+        { .con_id = "pll_u", .dt_id = TEGRA114_CLK_PLL_U },
+        { .con_id = "pll_u_480M", .dt_id = TEGRA114_CLK_PLL_U_480M },
+        { .con_id = "pll_u_60M", .dt_id = TEGRA114_CLK_PLL_U_60M },
+        { .con_id = "pll_u_48M", .dt_id = TEGRA114_CLK_PLL_U_48M },
+        { .con_id = "pll_u_12M", .dt_id = TEGRA114_CLK_PLL_U_12M },
+        { .con_id = "pll_d", .dt_id = TEGRA114_CLK_PLL_D },
+        { .con_id = "pll_d_out0", .dt_id = TEGRA114_CLK_PLL_D_OUT0 },
+        { .con_id = "pll_d2", .dt_id = TEGRA114_CLK_PLL_D2 },
+        { .con_id = "pll_d2_out0", .dt_id = TEGRA114_CLK_PLL_D2_OUT0 },
+        { .con_id = "pll_a", .dt_id = TEGRA114_CLK_PLL_A },
+        { .con_id = "pll_a_out0", .dt_id = TEGRA114_CLK_PLL_A_OUT0 },
+        { .con_id = "pll_re_vco", .dt_id = TEGRA114_CLK_PLL_RE_VCO },
+        { .con_id = "pll_re_out", .dt_id = TEGRA114_CLK_PLL_RE_OUT },
+        { .con_id = "pll_e_out0", .dt_id = TEGRA114_CLK_PLL_E_OUT0 },
+        { .con_id = "spdif_in_sync", .dt_id = TEGRA114_CLK_SPDIF_IN_SYNC },
+        { .con_id = "i2s0_sync", .dt_id = TEGRA114_CLK_I2S0_SYNC },
+        { .con_id = "i2s1_sync", .dt_id = TEGRA114_CLK_I2S1_SYNC },
+        { .con_id = "i2s2_sync", .dt_id = TEGRA114_CLK_I2S2_SYNC },
+        { .con_id = "i2s3_sync", .dt_id = TEGRA114_CLK_I2S3_SYNC },
+        { .con_id = "i2s4_sync", .dt_id = TEGRA114_CLK_I2S4_SYNC },
+        { .con_id = "vimclk_sync", .dt_id = TEGRA114_CLK_VIMCLK_SYNC },
+        { .con_id = "audio0", .dt_id = TEGRA114_CLK_AUDIO0 },
+        { .con_id = "audio1", .dt_id = TEGRA114_CLK_AUDIO1 },
+        { .con_id = "audio2", .dt_id = TEGRA114_CLK_AUDIO2 },
+        { .con_id = "audio3", .dt_id = TEGRA114_CLK_AUDIO3 },
+        { .con_id = "audio4", .dt_id = TEGRA114_CLK_AUDIO4 },
+        { .con_id = "spdif", .dt_id = TEGRA114_CLK_SPDIF },
+        { .con_id = "audio0_2x", .dt_id = TEGRA114_CLK_AUDIO0_2X },
+        { .con_id = "audio1_2x", .dt_id = TEGRA114_CLK_AUDIO1_2X },
+        { .con_id = "audio2_2x", .dt_id = TEGRA114_CLK_AUDIO2_2X },
+        { .con_id = "audio3_2x", .dt_id = TEGRA114_CLK_AUDIO3_2X },
+        { .con_id = "audio4_2x", .dt_id = TEGRA114_CLK_AUDIO4_2X },
+        { .con_id = "spdif_2x", .dt_id = TEGRA114_CLK_SPDIF_2X },
+        { .con_id = "extern1", .dev_id = "clk_out_1", .dt_id = TEGRA114_CLK_EXTERN1 },
+        { .con_id = "extern2", .dev_id = "clk_out_2", .dt_id = TEGRA114_CLK_EXTERN2 },
+        { .con_id = "extern3", .dev_id = "clk_out_3", .dt_id = TEGRA114_CLK_EXTERN3 },
+        { .con_id = "blink", .dt_id = TEGRA114_CLK_BLINK },
+        { .con_id = "cclk_g", .dt_id = TEGRA114_CLK_CCLK_G },
+        { .con_id = "cclk_lp", .dt_id = TEGRA114_CLK_CCLK_LP },
+        { .con_id = "sclk", .dt_id = TEGRA114_CLK_SCLK },
+        { .con_id = "hclk", .dt_id = TEGRA114_CLK_HCLK },
+        { .con_id = "pclk", .dt_id = TEGRA114_CLK_PCLK },
+        { .con_id = "fuse", .dt_id = TEGRA114_CLK_FUSE },
+        { .dev_id = "rtc-tegra", .dt_id = TEGRA114_CLK_RTC },
+        { .dev_id = "timer", .dt_id = TEGRA114_CLK_TIMER },
+};
+
+static struct clk **clks;
 
 static unsigned long osc_freq;
 static unsigned long pll_ref_freq;
@@ -1086,16 +944,14 @@ static int __init tegra114_osc_clk_init(void __iomem *clk_base)
         /* clk_m */
         clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT,
                                       osc_freq);
-        clk_register_clkdev(clk, "clk_m", NULL);
-        clks[clk_m] = clk;
+        clks[TEGRA114_CLK_CLK_M] = clk;
 
         /* pll_ref */
         val = (val >> OSC_CTRL_PLL_REF_DIV_SHIFT) & 3;
         pll_ref_div = 1 << val;
         clk = clk_register_fixed_factor(NULL, "pll_ref", "clk_m",
                                         CLK_SET_RATE_PARENT, 1, pll_ref_div);
-        clk_register_clkdev(clk, "pll_ref", NULL);
-        clks[pll_ref] = clk;
+        clks[TEGRA114_CLK_PLL_REF] = clk;
 
         pll_ref_freq = osc_freq / pll_ref_div;
 
@@ -1109,20 +965,17 @@ static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
         /* clk_32k */
         clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
                                       32768);
-        clk_register_clkdev(clk, "clk_32k", NULL);
-        clks[clk_32k] = clk;
+        clks[TEGRA114_CLK_CLK_32K] = clk;
 
         /* clk_m_div2 */
         clk = clk_register_fixed_factor(NULL, "clk_m_div2", "clk_m",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "clk_m_div2", NULL);
-        clks[clk_m_div2] = clk;
+        clks[TEGRA114_CLK_CLK_M_DIV2] = clk;
 
         /* clk_m_div4 */
         clk = clk_register_fixed_factor(NULL, "clk_m_div4", "clk_m",
                                         CLK_SET_RATE_PARENT, 1, 4);
-        clk_register_clkdev(clk, "clk_m_div4", NULL);
-        clks[clk_m_div4] = clk;
+        clks[TEGRA114_CLK_CLK_M_DIV4] = clk;
 
 }
 
@@ -1208,63 +1061,6 @@ static __init void tegra114_utmi_param_configure(void __iomem *clk_base)
         writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
 }
 
-static void __init _clip_vco_min(struct tegra_clk_pll_params *pll_params)
-{
-        pll_params->vco_min =
-                DIV_ROUND_UP(pll_params->vco_min, pll_ref_freq) * pll_ref_freq;
-}
-
-static int __init _setup_dynamic_ramp(struct tegra_clk_pll_params *pll_params,
-                                      void __iomem *clk_base)
-{
-        u32 val;
-        u32 step_a, step_b;
-
-        switch (pll_ref_freq) {
-        case 12000000:
-        case 13000000:
-        case 26000000:
-                step_a = 0x2B;
-                step_b = 0x0B;
-                break;
-        case 16800000:
-                step_a = 0x1A;
-                step_b = 0x09;
-                break;
-        case 19200000:
-                step_a = 0x12;
-                step_b = 0x08;
-                break;
-        default:
-                pr_err("%s: Unexpected reference rate %lu\n",
-                        __func__, pll_ref_freq);
-                WARN_ON(1);
-                return -EINVAL;
-        }
-
-        val = step_a << pll_params->stepa_shift;
-        val |= step_b << pll_params->stepb_shift;
-        writel_relaxed(val, clk_base + pll_params->dyn_ramp_reg);
-
-        return 0;
-}
-
-static void __init _init_iddq(struct tegra_clk_pll_params *pll_params,
-                              void __iomem *clk_base)
-{
-        u32 val, val_iddq;
-
-        val = readl_relaxed(clk_base + pll_params->base_reg);
-        val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);
-
-        if (val & BIT(30))
-                WARN_ON(val_iddq & BIT(pll_params->iddq_bit_idx));
-        else {
-                val_iddq |= BIT(pll_params->iddq_bit_idx);
-                writel_relaxed(val_iddq, clk_base + pll_params->iddq_reg);
-        }
-}
-
 static void __init tegra114_pll_init(void __iomem *clk_base,
                                      void __iomem *pmc)
 {
@@ -1272,104 +1068,34 @@ static void __init tegra114_pll_init(void __iomem *clk_base,
         struct clk *clk;
 
         /* PLLC */
-        _clip_vco_min(&pll_c_params);
-        if (_setup_dynamic_ramp(&pll_c_params, clk_base) >= 0) {
-                _init_iddq(&pll_c_params, clk_base);
-                clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
-                                pmc, 0, 0, &pll_c_params, TEGRA_PLL_USE_LOCK,
-                                pll_c_freq_table, NULL);
-                clk_register_clkdev(clk, "pll_c", NULL);
-                clks[pll_c] = clk;
-
-                /* PLLC_OUT1 */
-                clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",
-                                clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
-                                8, 8, 1, NULL);
-                clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",
-                                        clk_base + PLLC_OUT, 1, 0,
-                                        CLK_SET_RATE_PARENT, 0, NULL);
-                clk_register_clkdev(clk, "pll_c_out1", NULL);
-                clks[pll_c_out1] = clk;
-        }
+        clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
+                        pmc, 0, &pll_c_params, NULL);
+        clks[TEGRA114_CLK_PLL_C] = clk;
+
+        /* PLLC_OUT1 */
+        clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",
+                        clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
+                        8, 8, 1, NULL);
+        clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",
+                                clk_base + PLLC_OUT, 1, 0,
+                                CLK_SET_RATE_PARENT, 0, NULL);
+        clks[TEGRA114_CLK_PLL_C_OUT1] = clk;
 
         /* PLLC2 */
-        _clip_vco_min(&pll_c2_params);
-        clk = tegra_clk_register_pllc("pll_c2", "pll_ref", clk_base, pmc, 0, 0,
-                             &pll_c2_params, TEGRA_PLL_USE_LOCK,
-                             pll_cx_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_c2", NULL);
-        clks[pll_c2] = clk;
+        clk = tegra_clk_register_pllc("pll_c2", "pll_ref", clk_base, pmc, 0,
+                             &pll_c2_params, NULL);
+        clks[TEGRA114_CLK_PLL_C2] = clk;
 
         /* PLLC3 */
-        _clip_vco_min(&pll_c3_params);
-        clk = tegra_clk_register_pllc("pll_c3", "pll_ref", clk_base, pmc, 0, 0,
-                             &pll_c3_params, TEGRA_PLL_USE_LOCK,
-                             pll_cx_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_c3", NULL);
-        clks[pll_c3] = clk;
-
-        /* PLLP */
-        clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base, pmc, 0,
-                            408000000, &pll_p_params,
-                            TEGRA_PLL_FIXED | TEGRA_PLL_USE_LOCK,
-                            pll_p_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_p", NULL);
-        clks[pll_p] = clk;
-
-        /* PLLP_OUT1 */
-        clk = tegra_clk_register_divider("pll_p_out1_div", "pll_p",
-                                clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP, 8, 8, 1, &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out1", "pll_p_out1_div",
-                                clk_base + PLLP_OUTA, 1, 0,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out1", NULL);
-        clks[pll_p_out1] = clk;
-
-        /* PLLP_OUT2 */
-        clk = tegra_clk_register_divider("pll_p_out2_div", "pll_p",
-                                clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP | TEGRA_DIVIDER_INT, 24,
-                                8, 1, &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out2", "pll_p_out2_div",
-                                clk_base + PLLP_OUTA, 17, 16,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out2", NULL);
-        clks[pll_p_out2] = clk;
-
-        /* PLLP_OUT3 */
-        clk = tegra_clk_register_divider("pll_p_out3_div", "pll_p",
-                                clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP, 8, 8, 1, &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out3", "pll_p_out3_div",
-                                clk_base + PLLP_OUTB, 1, 0,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out3", NULL);
-        clks[pll_p_out3] = clk;
-
-        /* PLLP_OUT4 */
-        clk = tegra_clk_register_divider("pll_p_out4_div", "pll_p",
-                                clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP, 24, 8, 1,
-                                &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out4", "pll_p_out4_div",
-                                clk_base + PLLP_OUTB, 17, 16,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out4", NULL);
-        clks[pll_p_out4] = clk;
+        clk = tegra_clk_register_pllc("pll_c3", "pll_ref", clk_base, pmc, 0,
+                             &pll_c3_params, NULL);
+        clks[TEGRA114_CLK_PLL_C3] = clk;
 
         /* PLLM */
-        _clip_vco_min(&pll_m_params);
         clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc,
-                             CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE, 0,
-                             &pll_m_params, TEGRA_PLL_USE_LOCK,
-                             pll_m_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_m", NULL);
-        clks[pll_m] = clk;
+                             CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
+                             &pll_m_params, NULL);
+        clks[TEGRA114_CLK_PLL_M] = clk;
 
         /* PLLM_OUT1 */
         clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",
@@ -1378,41 +1104,20 @@ static void __init tegra114_pll_init(void __iomem *clk_base,
         clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",
                                 clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED |
                                 CLK_SET_RATE_PARENT, 0, NULL);
-        clk_register_clkdev(clk, "pll_m_out1", NULL);
-        clks[pll_m_out1] = clk;
+        clks[TEGRA114_CLK_PLL_M_OUT1] = clk;
 
         /* PLLM_UD */
         clk = clk_register_fixed_factor(NULL, "pll_m_ud", "pll_m",
                                         CLK_SET_RATE_PARENT, 1, 1);
 
-        /* PLLX */
-        _clip_vco_min(&pll_x_params);
-        if (_setup_dynamic_ramp(&pll_x_params, clk_base) >= 0) {
-                _init_iddq(&pll_x_params, clk_base);
-                clk = tegra_clk_register_pllxc("pll_x", "pll_ref", clk_base,
-                                pmc, CLK_IGNORE_UNUSED, 0, &pll_x_params,
-                                TEGRA_PLL_USE_LOCK, pll_x_freq_table, NULL);
-                clk_register_clkdev(clk, "pll_x", NULL);
-                clks[pll_x] = clk;
-        }
-
-        /* PLLX_OUT0 */
-        clk = clk_register_fixed_factor(NULL, "pll_x_out0", "pll_x",
-                                        CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "pll_x_out0", NULL);
-        clks[pll_x_out0] = clk;
-
         /* PLLU */
         val = readl(clk_base + pll_u_params.base_reg);
         val &= ~BIT(24); /* disable PLLU_OVERRIDE */
         writel(val, clk_base + pll_u_params.base_reg);
 
         clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, pmc, 0,
-                            0, &pll_u_params, TEGRA_PLLU |
-                            TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
-                            TEGRA_PLL_USE_LOCK, pll_u_freq_table, &pll_u_lock);
-        clk_register_clkdev(clk, "pll_u", NULL);
-        clks[pll_u] = clk;
+                            &pll_u_params, &pll_u_lock);
+        clks[TEGRA114_CLK_PLL_U] = clk;
 
         tegra114_utmi_param_configure(clk_base);
 
@@ -1420,731 +1125,97 @@ static void __init tegra114_pll_init(void __iomem *clk_base,
         clk = clk_register_gate(NULL, "pll_u_480M", "pll_u",
                                 CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
                                 22, 0, &pll_u_lock);
-        clk_register_clkdev(clk, "pll_u_480M", NULL);
-        clks[pll_u_480M] = clk;
+        clks[TEGRA114_CLK_PLL_U_480M] = clk;
 
         /* PLLU_60M */
         clk = clk_register_fixed_factor(NULL, "pll_u_60M", "pll_u",
                                         CLK_SET_RATE_PARENT, 1, 8);
-        clk_register_clkdev(clk, "pll_u_60M", NULL);
-        clks[pll_u_60M] = clk;
+        clks[TEGRA114_CLK_PLL_U_60M] = clk;
 
         /* PLLU_48M */
         clk = clk_register_fixed_factor(NULL, "pll_u_48M", "pll_u",
                                         CLK_SET_RATE_PARENT, 1, 10);
-        clk_register_clkdev(clk, "pll_u_48M", NULL);
-        clks[pll_u_48M] = clk;
+        clks[TEGRA114_CLK_PLL_U_48M] = clk;
 
         /* PLLU_12M */
         clk = clk_register_fixed_factor(NULL, "pll_u_12M", "pll_u",
                                         CLK_SET_RATE_PARENT, 1, 40);
-        clk_register_clkdev(clk, "pll_u_12M", NULL);
-        clks[pll_u_12M] = clk;
+        clks[TEGRA114_CLK_PLL_U_12M] = clk;
 
         /* PLLD */
         clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,
-                            0, &pll_d_params,
-                            TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
-                            TEGRA_PLL_USE_LOCK, pll_d_freq_table, &pll_d_lock);
-        clk_register_clkdev(clk, "pll_d", NULL);
-        clks[pll_d] = clk;
+                            &pll_d_params, &pll_d_lock);
+        clks[TEGRA114_CLK_PLL_D] = clk;
 
         /* PLLD_OUT0 */
         clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "pll_d_out0", NULL);
-        clks[pll_d_out0] = clk;
+        clks[TEGRA114_CLK_PLL_D_OUT0] = clk;
 
         /* PLLD2 */
         clk = tegra_clk_register_pll("pll_d2", "pll_ref", clk_base, pmc, 0,
-                            0, &pll_d2_params,
-                            TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
-                            TEGRA_PLL_USE_LOCK, pll_d_freq_table, &pll_d2_lock);
-        clk_register_clkdev(clk, "pll_d2", NULL);
-        clks[pll_d2] = clk;
+                            &pll_d2_params, &pll_d2_lock);
+        clks[TEGRA114_CLK_PLL_D2] = clk;
 
         /* PLLD2_OUT0 */
         clk = clk_register_fixed_factor(NULL, "pll_d2_out0", "pll_d2",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "pll_d2_out0", NULL);
-        clks[pll_d2_out0] = clk;
-
-        /* PLLA */
-        clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base, pmc, 0,
-                            0, &pll_a_params, TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_USE_LOCK, pll_a_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_a", NULL);
-        clks[pll_a] = clk;
-
-        /* PLLA_OUT0 */
-        clk = tegra_clk_register_divider("pll_a_out0_div", "pll_a",
-                                clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
-                                8, 8, 1, NULL);
-        clk = tegra_clk_register_pll_out("pll_a_out0", "pll_a_out0_div",
-                                clk_base + PLLA_OUT, 1, 0, CLK_IGNORE_UNUSED |
-                                CLK_SET_RATE_PARENT, 0, NULL);
-        clk_register_clkdev(clk, "pll_a_out0", NULL);
-        clks[pll_a_out0] = clk;
+        clks[TEGRA114_CLK_PLL_D2_OUT0] = clk;
 
         /* PLLRE */
-        _clip_vco_min(&pll_re_vco_params);
         clk = tegra_clk_register_pllre("pll_re_vco", "pll_ref", clk_base, pmc,
-                             0, 0, &pll_re_vco_params, TEGRA_PLL_USE_LOCK,
-                             NULL, &pll_re_lock, pll_ref_freq);
-        clk_register_clkdev(clk, "pll_re_vco", NULL);
-        clks[pll_re_vco] = clk;
+                             0, &pll_re_vco_params, &pll_re_lock, pll_ref_freq);
+        clks[TEGRA114_CLK_PLL_RE_VCO] = clk;
 
         clk = clk_register_divider_table(NULL, "pll_re_out", "pll_re_vco", 0,
                                          clk_base + PLLRE_BASE, 16, 4, 0,
                                          pll_re_div_table, &pll_re_lock);
-        clk_register_clkdev(clk, "pll_re_out", NULL);
-        clks[pll_re_out] = clk;
+        clks[TEGRA114_CLK_PLL_RE_OUT] = clk;
 
         /* PLLE */
-        clk = tegra_clk_register_plle_tegra114("pll_e_out0", "pll_re_vco",
-                                      clk_base, 0, 100000000, &pll_e_params,
-                                      pll_e_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_e_out0", NULL);
-        clks[pll_e_out0] = clk;
-}
-
-static const char *mux_audio_sync_clk[] = { "spdif_in_sync", "i2s0_sync",
-        "i2s1_sync", "i2s2_sync", "i2s3_sync", "i2s4_sync", "vimclk_sync",
-};
-
-static const char *clk_out1_parents[] = { "clk_m", "clk_m_div2",
-        "clk_m_div4", "extern1",
-};
-
-static const char *clk_out2_parents[] = { "clk_m", "clk_m_div2",
-        "clk_m_div4", "extern2",
-};
-
-static const char *clk_out3_parents[] = { "clk_m", "clk_m_div2",
-        "clk_m_div4", "extern3",
-};
-
-static void __init tegra114_audio_clk_init(void __iomem *clk_base)
-{
-        struct clk *clk;
-
-        /* spdif_in_sync */
-        clk = tegra_clk_register_sync_source("spdif_in_sync", 24000000,
-                                             24000000);
-        clk_register_clkdev(clk, "spdif_in_sync", NULL);
-        clks[spdif_in_sync] = clk;
-
-        /* i2s0_sync */
-        clk = tegra_clk_register_sync_source("i2s0_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s0_sync", NULL);
-        clks[i2s0_sync] = clk;
-
-        /* i2s1_sync */
-        clk = tegra_clk_register_sync_source("i2s1_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s1_sync", NULL);
-        clks[i2s1_sync] = clk;
-
-        /* i2s2_sync */
-        clk = tegra_clk_register_sync_source("i2s2_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s2_sync", NULL);
-        clks[i2s2_sync] = clk;
-
-        /* i2s3_sync */
-        clk = tegra_clk_register_sync_source("i2s3_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s3_sync", NULL);
-        clks[i2s3_sync] = clk;
-
-        /* i2s4_sync */
-        clk = tegra_clk_register_sync_source("i2s4_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s4_sync", NULL);
-        clks[i2s4_sync] = clk;
-
-        /* vimclk_sync */
-        clk = tegra_clk_register_sync_source("vimclk_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "vimclk_sync", NULL);
-        clks[vimclk_sync] = clk;
-
-        /* audio0 */
-        clk = clk_register_mux(NULL, "audio0_mux", mux_audio_sync_clk,
-                               ARRAY_SIZE(mux_audio_sync_clk),
-                               CLK_SET_RATE_NO_REPARENT,
-                               clk_base + AUDIO_SYNC_CLK_I2S0, 0, 3, 0,
-                               NULL);
-        clks[audio0_mux] = clk;
-        clk = clk_register_gate(NULL, "audio0", "audio0_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S0, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio0", NULL);
-        clks[audio0] = clk;
-
-        /* audio1 */
-        clk = clk_register_mux(NULL, "audio1_mux", mux_audio_sync_clk,
-                               ARRAY_SIZE(mux_audio_sync_clk),
-                               CLK_SET_RATE_NO_REPARENT,
-                               clk_base + AUDIO_SYNC_CLK_I2S1, 0, 3, 0,
-                               NULL);
-        clks[audio1_mux] = clk;
-        clk = clk_register_gate(NULL, "audio1", "audio1_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S1, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio1", NULL);
-        clks[audio1] = clk;
-
-        /* audio2 */
-        clk = clk_register_mux(NULL, "audio2_mux", mux_audio_sync_clk,
-                               ARRAY_SIZE(mux_audio_sync_clk),
-                               CLK_SET_RATE_NO_REPARENT,
-                               clk_base + AUDIO_SYNC_CLK_I2S2, 0, 3, 0,
-                               NULL);
-        clks[audio2_mux] = clk;
-        clk = clk_register_gate(NULL, "audio2", "audio2_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S2, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio2", NULL);
-        clks[audio2] = clk;
-
-        /* audio3 */
-        clk = clk_register_mux(NULL, "audio3_mux", mux_audio_sync_clk,
-                               ARRAY_SIZE(mux_audio_sync_clk),
-                               CLK_SET_RATE_NO_REPARENT,
-                               clk_base + AUDIO_SYNC_CLK_I2S3, 0, 3, 0,
-                               NULL);
-        clks[audio3_mux] = clk;
-        clk = clk_register_gate(NULL, "audio3", "audio3_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S3, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio3", NULL);
-        clks[audio3] = clk;
-
-        /* audio4 */
-        clk = clk_register_mux(NULL, "audio4_mux", mux_audio_sync_clk,
-                               ARRAY_SIZE(mux_audio_sync_clk),
-                               CLK_SET_RATE_NO_REPARENT,
-                               clk_base + AUDIO_SYNC_CLK_I2S4, 0, 3, 0,
-                               NULL);
-        clks[audio4_mux] = clk;
-        clk = clk_register_gate(NULL, "audio4", "audio4_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S4, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio4", NULL);
-        clks[audio4] = clk;
-
-        /* spdif */
-        clk = clk_register_mux(NULL, "spdif_mux", mux_audio_sync_clk,
-                               ARRAY_SIZE(mux_audio_sync_clk),
-                               CLK_SET_RATE_NO_REPARENT,
-                               clk_base + AUDIO_SYNC_CLK_SPDIF, 0, 3, 0,
-                               NULL);
-        clks[spdif_mux] = clk;
-        clk = clk_register_gate(NULL, "spdif", "spdif_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_SPDIF, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "spdif", NULL);
-        clks[spdif] = clk;
-
-        /* audio0_2x */
-        clk = clk_register_fixed_factor(NULL, "audio0_doubler", "audio0",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio0_div", "audio0_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 24, 1,
-                                0, &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio0_2x", "audio0_div",
-                                  TEGRA_PERIPH_NO_RESET, clk_base,
-                                  CLK_SET_RATE_PARENT, 113, &periph_v_regs,
-                                  periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio0_2x", NULL);
-        clks[audio0_2x] = clk;
-
-        /* audio1_2x */
-        clk = clk_register_fixed_factor(NULL, "audio1_doubler", "audio1",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio1_div", "audio1_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 25, 1,
-                                0, &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio1_2x", "audio1_div",
-                                  TEGRA_PERIPH_NO_RESET, clk_base,
-                                  CLK_SET_RATE_PARENT, 114, &periph_v_regs,
-                                  periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio1_2x", NULL);
-        clks[audio1_2x] = clk;
-
-        /* audio2_2x */
-        clk = clk_register_fixed_factor(NULL, "audio2_doubler", "audio2",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio2_div", "audio2_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 26, 1,
-                                0, &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio2_2x", "audio2_div",
-                                  TEGRA_PERIPH_NO_RESET, clk_base,
-                                  CLK_SET_RATE_PARENT, 115, &periph_v_regs,
-                                  periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio2_2x", NULL);
-        clks[audio2_2x] = clk;
-
-        /* audio3_2x */
-        clk = clk_register_fixed_factor(NULL, "audio3_doubler", "audio3",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio3_div", "audio3_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 27, 1,
-                                0, &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio3_2x", "audio3_div",
-                                  TEGRA_PERIPH_NO_RESET, clk_base,
-                                  CLK_SET_RATE_PARENT, 116, &periph_v_regs,
-                                  periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio3_2x", NULL);
-        clks[audio3_2x] = clk;
-
-        /* audio4_2x */
-        clk = clk_register_fixed_factor(NULL, "audio4_doubler", "audio4",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio4_div", "audio4_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 28, 1,
-                                0, &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio4_2x", "audio4_div",
-                                  TEGRA_PERIPH_NO_RESET, clk_base,
-                                  CLK_SET_RATE_PARENT, 117, &periph_v_regs,
-                                  periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio4_2x", NULL);
-        clks[audio4_2x] = clk;
-
-        /* spdif_2x */
-        clk = clk_register_fixed_factor(NULL, "spdif_doubler", "spdif",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("spdif_div", "spdif_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 29, 1,
-                                0, &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("spdif_2x", "spdif_div",
-                                  TEGRA_PERIPH_NO_RESET, clk_base,
-                                  CLK_SET_RATE_PARENT, 118,
-                                  &periph_v_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "spdif_2x", NULL);
-        clks[spdif_2x] = clk;
-}
-
-static void __init tegra114_pmc_clk_init(void __iomem *pmc_base)
-{
-        struct clk *clk;
-
-        /* clk_out_1 */
-        clk = clk_register_mux(NULL, "clk_out_1_mux", clk_out1_parents,
-                               ARRAY_SIZE(clk_out1_parents),
-                               CLK_SET_RATE_NO_REPARENT,
-                               pmc_base + PMC_CLK_OUT_CNTRL, 6, 3, 0,
-                               &clk_out_lock);
-        clks[clk_out_1_mux] = clk;
-        clk = clk_register_gate(NULL, "clk_out_1", "clk_out_1_mux", 0,
-                                pmc_base + PMC_CLK_OUT_CNTRL, 2, 0,
-                                &clk_out_lock);
-        clk_register_clkdev(clk, "extern1", "clk_out_1");
-        clks[clk_out_1] = clk;
-
-        /* clk_out_2 */
-        clk = clk_register_mux(NULL, "clk_out_2_mux", clk_out2_parents,
-                               ARRAY_SIZE(clk_out2_parents),
-                               CLK_SET_RATE_NO_REPARENT,
-                               pmc_base + PMC_CLK_OUT_CNTRL, 14, 3, 0,
-                               &clk_out_lock);
-        clks[clk_out_2_mux] = clk;
-        clk = clk_register_gate(NULL, "clk_out_2", "clk_out_2_mux", 0,
-                                pmc_base + PMC_CLK_OUT_CNTRL, 10, 0,
-                                &clk_out_lock);
-        clk_register_clkdev(clk, "extern2", "clk_out_2");
-        clks[clk_out_2] = clk;
-
-        /* clk_out_3 */
-        clk = clk_register_mux(NULL, "clk_out_3_mux", clk_out3_parents,
-                               ARRAY_SIZE(clk_out3_parents),
-                               CLK_SET_RATE_NO_REPARENT,
-                               pmc_base + PMC_CLK_OUT_CNTRL, 22, 3, 0,
-                               &clk_out_lock);
-        clks[clk_out_3_mux] = clk;
-        clk = clk_register_gate(NULL, "clk_out_3", "clk_out_3_mux", 0,
-                                pmc_base + PMC_CLK_OUT_CNTRL, 18, 0,
-                                &clk_out_lock);
-        clk_register_clkdev(clk, "extern3", "clk_out_3");
-        clks[clk_out_3] = clk;
-
-        /* blink */
-        /* clear the blink timer register to directly output clk_32k */
-        writel_relaxed(0, pmc_base + PMC_BLINK_TIMER);
-        clk = clk_register_gate(NULL, "blink_override", "clk_32k", 0,
-                                pmc_base + PMC_DPD_PADS_ORIDE,
-                                PMC_DPD_PADS_ORIDE_BLINK_ENB, 0, NULL);
-        clk = clk_register_gate(NULL, "blink", "blink_override", 0,
-                                pmc_base + PMC_CTRL,
-                                PMC_CTRL_BLINK_ENB, 0, NULL);
-        clk_register_clkdev(clk, "blink", NULL);
-        clks[blink] = clk;
-
+        clk = tegra_clk_register_plle_tegra114("pll_e_out0", "pll_ref",
+                                      clk_base, 0, &pll_e_params, NULL);
+        clks[TEGRA114_CLK_PLL_E_OUT0] = clk;
 }
 
-static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
-                               "pll_p", "pll_p_out2", "unused",
-                               "clk_32k", "pll_m_out1" };
-
-static const char *cclk_g_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
-                                        "pll_p", "pll_p_out4", "unused",
-                                        "unused", "pll_x" };
-
-static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
-                                         "pll_p", "pll_p_out4", "unused",
-                                         "unused", "pll_x", "pll_x_out0" };
-
-static void __init tegra114_super_clk_init(void __iomem *clk_base)
+static __init void tegra114_periph_clk_init(void __iomem *clk_base,
+                                            void __iomem *pmc_base)
 {
         struct clk *clk;
+        u32 val;
 
-        /* CCLKG */
-        clk = tegra_clk_register_super_mux("cclk_g", cclk_g_parents,
-                                        ARRAY_SIZE(cclk_g_parents),
-                                        CLK_SET_RATE_PARENT,
-                                        clk_base + CCLKG_BURST_POLICY,
-                                        0, 4, 0, 0, NULL);
-        clk_register_clkdev(clk, "cclk_g", NULL);
-        clks[cclk_g] = clk;
-
-        /* CCLKLP */
-        clk = tegra_clk_register_super_mux("cclk_lp", cclk_lp_parents,
-                                        ARRAY_SIZE(cclk_lp_parents),
-                                        CLK_SET_RATE_PARENT,
-                                        clk_base + CCLKLP_BURST_POLICY,
-                                        0, 4, 8, 9, NULL);
-        clk_register_clkdev(clk, "cclk_lp", NULL);
-        clks[cclk_lp] = clk;
-
-        /* SCLK */
-        clk = tegra_clk_register_super_mux("sclk", sclk_parents,
-                                        ARRAY_SIZE(sclk_parents),
-                                        CLK_SET_RATE_PARENT,
-                                        clk_base + SCLK_BURST_POLICY,
-                                        0, 4, 0, 0, NULL);
-        clk_register_clkdev(clk, "sclk", NULL);
-        clks[sclk] = clk;
-
-        /* HCLK */
-        clk = clk_register_divider(NULL, "hclk_div", "sclk", 0,
-                                   clk_base + SYSTEM_CLK_RATE, 4, 2, 0,
-                                   &sysrate_lock);
-        clk = clk_register_gate(NULL, "hclk", "hclk_div", CLK_SET_RATE_PARENT |
-                                CLK_IGNORE_UNUSED, clk_base + SYSTEM_CLK_RATE,
-                                7, CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
-        clk_register_clkdev(clk, "hclk", NULL);
-        clks[hclk] = clk;
-
-        /* PCLK */
-        clk = clk_register_divider(NULL, "pclk_div", "hclk", 0,
-                                   clk_base + SYSTEM_CLK_RATE, 0, 2, 0,
-                                   &sysrate_lock);
-        clk = clk_register_gate(NULL, "pclk", "pclk_div", CLK_SET_RATE_PARENT |
-                                CLK_IGNORE_UNUSED, clk_base + SYSTEM_CLK_RATE,
-                                3, CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
-        clk_register_clkdev(clk, "pclk", NULL);
-        clks[pclk] = clk;
-}
-
-static struct tegra_periph_init_data tegra_periph_clk_list[] = {
-        TEGRA_INIT_DATA_MUX("i2s0", NULL, "tegra30-i2s.0", mux_pllaout0_audio0_2x_pllp_clkm, CLK_SOURCE_I2S0, 30, &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s0),
-        TEGRA_INIT_DATA_MUX("i2s1", NULL, "tegra30-i2s.1", mux_pllaout0_audio1_2x_pllp_clkm, CLK_SOURCE_I2S1, 11, &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s1),
-        TEGRA_INIT_DATA_MUX("i2s2", NULL, "tegra30-i2s.2", mux_pllaout0_audio2_2x_pllp_clkm, CLK_SOURCE_I2S2, 18, &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s2),
-        TEGRA_INIT_DATA_MUX("i2s3", NULL, "tegra30-i2s.3", mux_pllaout0_audio3_2x_pllp_clkm, CLK_SOURCE_I2S3, 101, &periph_v_regs, TEGRA_PERIPH_ON_APB, i2s3),
-        TEGRA_INIT_DATA_MUX("i2s4", NULL, "tegra30-i2s.4", mux_pllaout0_audio4_2x_pllp_clkm, CLK_SOURCE_I2S4, 102, &periph_v_regs, TEGRA_PERIPH_ON_APB, i2s4),
-        TEGRA_INIT_DATA_MUX("spdif_out", "spdif_out", "tegra30-spdif", mux_pllaout0_audio_2x_pllp_clkm, CLK_SOURCE_SPDIF_OUT, 10, &periph_l_regs, TEGRA_PERIPH_ON_APB, spdif_out),
-        TEGRA_INIT_DATA_MUX("spdif_in", "spdif_in", "tegra30-spdif", mux_pllp_pllc_pllm, CLK_SOURCE_SPDIF_IN, 10, &periph_l_regs, TEGRA_PERIPH_ON_APB, spdif_in),
-        TEGRA_INIT_DATA_MUX("pwm", NULL, "pwm", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_PWM, 17, &periph_l_regs, TEGRA_PERIPH_ON_APB, pwm),
-        TEGRA_INIT_DATA_MUX("adx", NULL, "adx", mux_plla_pllc_pllp_clkm, CLK_SOURCE_ADX, 154, &periph_w_regs, TEGRA_PERIPH_ON_APB, adx),
-        TEGRA_INIT_DATA_MUX("amx", NULL, "amx", mux_plla_pllc_pllp_clkm, CLK_SOURCE_AMX, 153, &periph_w_regs, TEGRA_PERIPH_ON_APB, amx),
-        TEGRA_INIT_DATA_MUX("hda", "hda", "tegra30-hda", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA, 125, &periph_v_regs, TEGRA_PERIPH_ON_APB, hda),
-        TEGRA_INIT_DATA_MUX("hda2codec_2x", "hda2codec", "tegra30-hda", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA2CODEC_2X, 111, &periph_v_regs, TEGRA_PERIPH_ON_APB, hda2codec_2x),
-        TEGRA_INIT_DATA_MUX("sbc1", NULL, "tegra11-spi.0", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC1, 41, &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc1),
-        TEGRA_INIT_DATA_MUX("sbc2", NULL, "tegra11-spi.1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC2, 44, &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc2),
-        TEGRA_INIT_DATA_MUX("sbc3", NULL, "tegra11-spi.2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC3, 46, &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc3),
-        TEGRA_INIT_DATA_MUX("sbc4", NULL, "tegra11-spi.3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC4, 68, &periph_u_regs, TEGRA_PERIPH_ON_APB, sbc4),
-        TEGRA_INIT_DATA_MUX("sbc5", NULL, "tegra11-spi.4", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC5, 104, &periph_v_regs, TEGRA_PERIPH_ON_APB, sbc5),
-        TEGRA_INIT_DATA_MUX("sbc6", NULL, "tegra11-spi.5", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC6, 105, &periph_v_regs, TEGRA_PERIPH_ON_APB, sbc6),
-        TEGRA_INIT_DATA_MUX8("ndflash", NULL, "tegra_nand", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_NDFLASH, 13, &periph_u_regs, TEGRA_PERIPH_ON_APB, ndspeed),
-        TEGRA_INIT_DATA_MUX8("ndspeed", NULL, "tegra_nand_speed", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_NDSPEED, 80, &periph_u_regs, TEGRA_PERIPH_ON_APB, ndspeed),
-        TEGRA_INIT_DATA_MUX("vfir", NULL, "vfir", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VFIR, 7, &periph_l_regs, TEGRA_PERIPH_ON_APB, vfir),
-        TEGRA_INIT_DATA_MUX("sdmmc1", NULL, "sdhci-tegra.0", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC1, 14, &periph_l_regs, 0, sdmmc1),
-        TEGRA_INIT_DATA_MUX("sdmmc2", NULL, "sdhci-tegra.1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC2, 9, &periph_l_regs, 0, sdmmc2),
-        TEGRA_INIT_DATA_MUX("sdmmc3", NULL, "sdhci-tegra.2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC3, 69, &periph_u_regs, 0, sdmmc3),
-        TEGRA_INIT_DATA_MUX("sdmmc4", NULL, "sdhci-tegra.3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC4, 15, &periph_l_regs, 0, sdmmc4),
-        TEGRA_INIT_DATA_INT("vde", NULL, "vde", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_VDE, 61, &periph_h_regs, 0, vde),
-        TEGRA_INIT_DATA_MUX_FLAGS("csite", NULL, "csite", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_CSITE, 73, &periph_u_regs, TEGRA_PERIPH_ON_APB, csite, CLK_IGNORE_UNUSED),
-        TEGRA_INIT_DATA_MUX("la", NULL, "la", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_LA, 76, &periph_u_regs, TEGRA_PERIPH_ON_APB, la),
-        TEGRA_INIT_DATA_MUX("trace", NULL, "trace", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_TRACE, 77, &periph_u_regs, TEGRA_PERIPH_ON_APB, trace),
-        TEGRA_INIT_DATA_MUX("owr", NULL, "tegra_w1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_OWR, 71, &periph_u_regs, TEGRA_PERIPH_ON_APB, owr),
-        TEGRA_INIT_DATA_MUX("nor", NULL, "tegra-nor", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_NOR, 42, &periph_h_regs, 0, nor),
-        TEGRA_INIT_DATA_MUX("mipi", NULL, "mipi", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_MIPI, 50, &periph_h_regs, TEGRA_PERIPH_ON_APB, mipi),
-        TEGRA_INIT_DATA_I2C("i2c1", "div-clk", "tegra11-i2c.0", mux_pllp_clkm, CLK_SOURCE_I2C1, 12, &periph_l_regs, i2c1),
-        TEGRA_INIT_DATA_I2C("i2c2", "div-clk", "tegra11-i2c.1", mux_pllp_clkm, CLK_SOURCE_I2C2, 54, &periph_h_regs, i2c2),
-        TEGRA_INIT_DATA_I2C("i2c3", "div-clk", "tegra11-i2c.2", mux_pllp_clkm, CLK_SOURCE_I2C3, 67, &periph_u_regs, i2c3),
-        TEGRA_INIT_DATA_I2C("i2c4", "div-clk", "tegra11-i2c.3", mux_pllp_clkm, CLK_SOURCE_I2C4, 103, &periph_v_regs, i2c4),
-        TEGRA_INIT_DATA_I2C("i2c5", "div-clk", "tegra11-i2c.4", mux_pllp_clkm, CLK_SOURCE_I2C5, 47, &periph_h_regs, i2c5),
-        TEGRA_INIT_DATA_UART("uarta", NULL, "tegra_uart.0", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTA, 6, &periph_l_regs, uarta),
-        TEGRA_INIT_DATA_UART("uartb", NULL, "tegra_uart.1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTB, 7, &periph_l_regs, uartb),
-        TEGRA_INIT_DATA_UART("uartc", NULL, "tegra_uart.2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTC, 55, &periph_h_regs, uartc),
-        TEGRA_INIT_DATA_UART("uartd", NULL, "tegra_uart.3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTD, 65, &periph_u_regs, uartd),
-        TEGRA_INIT_DATA_INT("3d", NULL, "3d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_3D, 24, &periph_l_regs, 0, gr_3d),
-        TEGRA_INIT_DATA_INT("2d", NULL, "2d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_2D, 21, &periph_l_regs, 0, gr_2d),
-        TEGRA_INIT_DATA_MUX("vi_sensor", "vi_sensor", "tegra_camera", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI_SENSOR, 20, &periph_l_regs, TEGRA_PERIPH_NO_RESET, vi_sensor),
-        TEGRA_INIT_DATA_INT8("vi", "vi", "tegra_camera", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI, 20, &periph_l_regs, 0, vi),
-        TEGRA_INIT_DATA_INT8("epp", NULL, "epp", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_EPP, 19, &periph_l_regs, 0, epp),
-        TEGRA_INIT_DATA_INT8("msenc", NULL, "msenc", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_MSENC, 91, &periph_u_regs, TEGRA_PERIPH_WAR_1005168, msenc),
-        TEGRA_INIT_DATA_INT8("tsec", NULL, "tsec", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_TSEC, 83, &periph_u_regs, 0, tsec),
-        TEGRA_INIT_DATA_INT8("host1x", NULL, "host1x", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_HOST1X, 28, &periph_l_regs, 0, host1x),
-        TEGRA_INIT_DATA_MUX8("hdmi", NULL, "hdmi", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_HDMI, 51, &periph_h_regs, 0, hdmi),
-        TEGRA_INIT_DATA_MUX("cilab", "cilab", "tegra_camera", mux_pllp_pllc_clkm, CLK_SOURCE_CILAB, 144, &periph_w_regs, 0, cilab),
-        TEGRA_INIT_DATA_MUX("cilcd", "cilcd", "tegra_camera", mux_pllp_pllc_clkm, CLK_SOURCE_CILCD, 145, &periph_w_regs, 0, cilcd),
-        TEGRA_INIT_DATA_MUX("cile", "cile", "tegra_camera", mux_pllp_pllc_clkm, CLK_SOURCE_CILE, 146, &periph_w_regs, 0, cile),
-        TEGRA_INIT_DATA_MUX("dsialp", "dsialp", "tegradc.0", mux_pllp_pllc_clkm, CLK_SOURCE_DSIALP, 147, &periph_w_regs, 0, dsialp),
-        TEGRA_INIT_DATA_MUX("dsiblp", "dsiblp", "tegradc.1", mux_pllp_pllc_clkm, CLK_SOURCE_DSIBLP, 148, &periph_w_regs, 0, dsiblp),
-        TEGRA_INIT_DATA_MUX("tsensor", NULL, "tegra-tsensor", mux_pllp_pllc_clkm_clk32, CLK_SOURCE_TSENSOR, 100, &periph_v_regs, TEGRA_PERIPH_ON_APB, tsensor),
-        TEGRA_INIT_DATA_MUX("actmon", NULL, "actmon", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_ACTMON, 119, &periph_v_regs, 0, actmon),
-        TEGRA_INIT_DATA_MUX8("extern1", NULL, "extern1", mux_plla_clk32_pllp_clkm_plle, CLK_SOURCE_EXTERN1, 120, &periph_v_regs, 0, extern1),
-        TEGRA_INIT_DATA_MUX8("extern2", NULL, "extern2", mux_plla_clk32_pllp_clkm_plle, CLK_SOURCE_EXTERN2, 121, &periph_v_regs, 0, extern2),
-        TEGRA_INIT_DATA_MUX8("extern3", NULL, "extern3", mux_plla_clk32_pllp_clkm_plle, CLK_SOURCE_EXTERN3, 122, &periph_v_regs, 0, extern3),
-        TEGRA_INIT_DATA_MUX("i2cslow", NULL, "i2cslow", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_I2CSLOW, 81, &periph_u_regs, TEGRA_PERIPH_ON_APB, i2cslow),
-        TEGRA_INIT_DATA_INT8("se", NULL, "se", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SE, 127, &periph_v_regs, TEGRA_PERIPH_ON_APB, se),
-        TEGRA_INIT_DATA_INT_FLAGS("mselect", NULL, "mselect", mux_pllp_clkm, CLK_SOURCE_MSELECT, 99, &periph_v_regs, 0, mselect, CLK_IGNORE_UNUSED),
-        TEGRA_INIT_DATA_MUX("dfll_ref", "ref", "t114_dfll", mux_pllp_clkm, CLK_SOURCE_DFLL_REF, 155, &periph_w_regs, TEGRA_PERIPH_ON_APB, dfll_ref),
-        TEGRA_INIT_DATA_MUX("dfll_soc", "soc", "t114_dfll", mux_pllp_clkm, CLK_SOURCE_DFLL_SOC, 155, &periph_w_regs, TEGRA_PERIPH_ON_APB, dfll_soc),
-        TEGRA_INIT_DATA_MUX8("soc_therm", NULL, "soc_therm", mux_pllm_pllc_pllp_plla, CLK_SOURCE_SOC_THERM, 78, &periph_u_regs, TEGRA_PERIPH_ON_APB, soc_therm),
-        TEGRA_INIT_DATA_XUSB("xusb_host_src", "host_src", "tegra_xhci", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_HOST_SRC, 143, &periph_w_regs, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, xusb_host_src),
-        TEGRA_INIT_DATA_XUSB("xusb_falcon_src", "falcon_src", "tegra_xhci", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_FALCON_SRC, 143, &periph_w_regs, TEGRA_PERIPH_NO_RESET, xusb_falcon_src),
-        TEGRA_INIT_DATA_XUSB("xusb_fs_src", "fs_src", "tegra_xhci", mux_clkm_48M_pllp_480M, CLK_SOURCE_XUSB_FS_SRC, 143, &periph_w_regs, TEGRA_PERIPH_NO_RESET, xusb_fs_src),
-        TEGRA_INIT_DATA_XUSB("xusb_ss_src", "ss_src", "tegra_xhci", mux_clkm_pllre_clk32_480M_pllc_ref, CLK_SOURCE_XUSB_SS_SRC, 143, &periph_w_regs, TEGRA_PERIPH_NO_RESET, xusb_ss_src),
-        TEGRA_INIT_DATA_XUSB("xusb_dev_src", "dev_src", "tegra_xhci", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_DEV_SRC, 95, &periph_u_regs, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, xusb_dev_src),
-        TEGRA_INIT_DATA_AUDIO("d_audio", "d_audio", "tegra30-ahub", CLK_SOURCE_D_AUDIO, 106, &periph_v_regs, TEGRA_PERIPH_ON_APB, d_audio),
-        TEGRA_INIT_DATA_AUDIO("dam0", NULL, "tegra30-dam.0", CLK_SOURCE_DAM0, 108, &periph_v_regs, TEGRA_PERIPH_ON_APB, dam0),
-        TEGRA_INIT_DATA_AUDIO("dam1", NULL, "tegra30-dam.1", CLK_SOURCE_DAM1, 109, &periph_v_regs, TEGRA_PERIPH_ON_APB, dam1),
-        TEGRA_INIT_DATA_AUDIO("dam2", NULL, "tegra30-dam.2", CLK_SOURCE_DAM2, 110, &periph_v_regs, TEGRA_PERIPH_ON_APB, dam2),
-};
-
-static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
-        TEGRA_INIT_DATA_NODIV("disp1", NULL, "tegradc.0", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_DISP1, 29, 7, 27, &periph_l_regs, 0, disp1),
-        TEGRA_INIT_DATA_NODIV("disp2", NULL, "tegradc.1", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_DISP2, 29, 7, 26, &periph_l_regs, 0, disp2),
-};
+        /* xusb_hs_src */
+        val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC);
+        val |= BIT(25); /* always select PLLU_60M */
+        writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC);
 
-static __init void tegra114_periph_clk_init(void __iomem *clk_base)
-{
-        struct tegra_periph_init_data *data;
-        struct clk *clk;
-        int i;
-        u32 val;
+        clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0,
+                                        1, 1);
+        clks[TEGRA114_CLK_XUSB_HS_SRC] = clk;
 
-        /* apbdma */
-        clk = tegra_clk_register_periph_gate("apbdma", "clk_m", 0, clk_base,
-                                  0, 34, &periph_h_regs,
-                                  periph_clk_enb_refcnt);
-        clks[apbdma] = clk;
-
-        /* rtc */
-        clk = tegra_clk_register_periph_gate("rtc", "clk_32k",
-                                    TEGRA_PERIPH_ON_APB |
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    0, 4, &periph_l_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "rtc-tegra");
-        clks[rtc] = clk;
-
-        /* kbc */
-        clk = tegra_clk_register_periph_gate("kbc", "clk_32k",
-                                    TEGRA_PERIPH_ON_APB |
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    0, 36, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clks[kbc] = clk;
-
-        /* timer */
-        clk = tegra_clk_register_periph_gate("timer", "clk_m", 0, clk_base,
-                                  0, 5, &periph_l_regs,
-                                  periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "timer");
-        clks[timer] = clk;
-
-        /* kfuse */
-        clk = tegra_clk_register_periph_gate("kfuse", "clk_m",
-                                  TEGRA_PERIPH_ON_APB, clk_base,  0, 40,
-                                  &periph_h_regs, periph_clk_enb_refcnt);
-        clks[kfuse] = clk;
-
-        /* fuse */
-        clk = tegra_clk_register_periph_gate("fuse", "clk_m",
-                                  TEGRA_PERIPH_ON_APB, clk_base,  0, 39,
-                                  &periph_h_regs, periph_clk_enb_refcnt);
-        clks[fuse] = clk;
-
-        /* fuse_burn */
-        clk = tegra_clk_register_periph_gate("fuse_burn", "clk_m",
-                                  TEGRA_PERIPH_ON_APB, clk_base,  0, 39,
-                                  &periph_h_regs, periph_clk_enb_refcnt);
-        clks[fuse_burn] = clk;
-
-        /* apbif */
-        clk = tegra_clk_register_periph_gate("apbif", "clk_m",
-                                  TEGRA_PERIPH_ON_APB, clk_base,  0, 107,
-                                  &periph_v_regs, periph_clk_enb_refcnt);
-        clks[apbif] = clk;
-
-        /* hda2hdmi */
-        clk = tegra_clk_register_periph_gate("hda2hdmi", "clk_m",
-                                    TEGRA_PERIPH_ON_APB, clk_base,  0, 128,
-                                    &periph_w_regs, periph_clk_enb_refcnt);
-        clks[hda2hdmi] = clk;
-
-        /* vcp */
-        clk = tegra_clk_register_periph_gate("vcp", "clk_m", 0, clk_base,  0,
-                                  29, &periph_l_regs,
-                                  periph_clk_enb_refcnt);
-        clks[vcp] = clk;
-
-        /* bsea */
-        clk = tegra_clk_register_periph_gate("bsea", "clk_m", 0, clk_base,
-                                  0, 62, &periph_h_regs,
-                                  periph_clk_enb_refcnt);
-        clks[bsea] = clk;
-
-        /* bsev */
-        clk = tegra_clk_register_periph_gate("bsev", "clk_m", 0, clk_base,
-                                  0, 63, &periph_h_regs,
-                                  periph_clk_enb_refcnt);
-        clks[bsev] = clk;
-
-        /* mipi-cal */
-        clk = tegra_clk_register_periph_gate("mipi-cal", "clk_m", 0, clk_base,
-                                   0, 56, &periph_h_regs,
-                                  periph_clk_enb_refcnt);
-        clks[mipi_cal] = clk;
-
-        /* usbd */
-        clk = tegra_clk_register_periph_gate("usbd", "clk_m", 0, clk_base,
-                                  0, 22, &periph_l_regs,
-                                  periph_clk_enb_refcnt);
-        clks[usbd] = clk;
-
-        /* usb2 */
-        clk = tegra_clk_register_periph_gate("usb2", "clk_m", 0, clk_base,
-                                  0, 58, &periph_h_regs,
-                                  periph_clk_enb_refcnt);
-        clks[usb2] = clk;
-
-        /* usb3 */
-        clk = tegra_clk_register_periph_gate("usb3", "clk_m", 0, clk_base,
-                                  0, 59, &periph_h_regs,
-                                  periph_clk_enb_refcnt);
-        clks[usb3] = clk;
-
-        /* csi */
-        clk = tegra_clk_register_periph_gate("csi", "pll_p_out3", 0, clk_base,
-                                   0, 52, &periph_h_regs,
-                                  periph_clk_enb_refcnt);
-        clks[csi] = clk;
-
-        /* isp */
-        clk = tegra_clk_register_periph_gate("isp", "clk_m", 0, clk_base, 0,
-                                  23, &periph_l_regs,
-                                  periph_clk_enb_refcnt);
-        clks[isp] = clk;
-
-        /* csus */
-        clk = tegra_clk_register_periph_gate("csus", "clk_m",
-                                  TEGRA_PERIPH_NO_RESET, clk_base, 0, 92,
-                                  &periph_u_regs, periph_clk_enb_refcnt);
-        clks[csus] = clk;
-
-        /* dds */
-        clk = tegra_clk_register_periph_gate("dds", "clk_m",
-                                  TEGRA_PERIPH_ON_APB, clk_base, 0, 150,
-                                  &periph_w_regs, periph_clk_enb_refcnt);
-        clks[dds] = clk;
-
-        /* dp2 */
-        clk = tegra_clk_register_periph_gate("dp2", "clk_m",
-                                  TEGRA_PERIPH_ON_APB, clk_base, 0, 152,
-                                  &periph_w_regs, periph_clk_enb_refcnt);
-        clks[dp2] = clk;
-
-        /* dtv */
-        clk = tegra_clk_register_periph_gate("dtv", "clk_m",
-                                    TEGRA_PERIPH_ON_APB, clk_base, 0, 79,
-                                    &periph_u_regs, periph_clk_enb_refcnt);
-        clks[dtv] = clk;
-
-        /* dsia */
+        /* dsia mux */
         clk = clk_register_mux(NULL, "dsia_mux", mux_plld_out0_plld2_out0,
                                ARRAY_SIZE(mux_plld_out0_plld2_out0),
                                CLK_SET_RATE_NO_REPARENT,
                                clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock);
-        clks[dsia_mux] = clk;
-        clk = tegra_clk_register_periph_gate("dsia", "dsia_mux", 0, clk_base,
-                                    0, 48, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clks[dsia] = clk;
+        clks[TEGRA114_CLK_DSIA_MUX] = clk;
 
-        /* dsib */
+        /* dsib mux */
         clk = clk_register_mux(NULL, "dsib_mux", mux_plld_out0_plld2_out0,
                                ARRAY_SIZE(mux_plld_out0_plld2_out0),
                                CLK_SET_RATE_NO_REPARENT,
                                clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock);
-        clks[dsib_mux] = clk;
-        clk = tegra_clk_register_periph_gate("dsib", "dsib_mux", 0, clk_base,
-                                    0, 82, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clks[dsib] = clk;
+        clks[TEGRA114_CLK_DSIB_MUX] = clk;
 
-        /* xusb_hs_src */
-        val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC);
-        val |= BIT(25); /* always select PLLU_60M */
-        writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC);
-
-        clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0,
-                                        1, 1);
-        clks[xusb_hs_src] = clk;
-
-        /* xusb_host */
-        clk = tegra_clk_register_periph_gate("xusb_host", "xusb_host_src", 0,
-                                    clk_base, 0, 89, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clks[xusb_host] = clk;
-
-        /* xusb_ss */
-        clk = tegra_clk_register_periph_gate("xusb_ss", "xusb_ss_src", 0,
-                                    clk_base, 0, 156, &periph_w_regs,
-                                    periph_clk_enb_refcnt);
-        clks[xusb_host] = clk;
-
-        /* xusb_dev */
-        clk = tegra_clk_register_periph_gate("xusb_dev", "xusb_dev_src", 0,
-                                    clk_base, 0, 95, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clks[xusb_dev] = clk;
-
-        /* emc */
+        /* emc mux */
         clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
                                ARRAY_SIZE(mux_pllmcp_clkm),
                                CLK_SET_RATE_NO_REPARENT,
                                clk_base + CLK_SOURCE_EMC,
                                29, 3, 0, NULL);
-        clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base,
-                                CLK_IGNORE_UNUSED, 57, &periph_h_regs,
-                                periph_clk_enb_refcnt);
-        clks[emc] = clk;
-
-        for (i = 0; i < ARRAY_SIZE(tegra_periph_clk_list); i++) {
-                data = &tegra_periph_clk_list[i];
-                clk = tegra_clk_register_periph(data->name, data->parent_names,
-                                data->num_parents, &data->periph,
-                                clk_base, data->offset, data->flags);
-                clks[data->clk_id] = clk;
-        }
 
-        for (i = 0; i < ARRAY_SIZE(tegra_periph_nodiv_clk_list); i++) {
-                data = &tegra_periph_nodiv_clk_list[i];
-                clk = tegra_clk_register_periph_nodiv(data->name,
-                                data->parent_names, data->num_parents,
-                                &data->periph, clk_base, data->offset);
-                clks[data->clk_id] = clk;
-        }
+        tegra_periph_clk_init(clk_base, pmc_base, tegra114_clks,
+                                &pll_p_params);
 }
 
 /* Tegra114 CPU clock and reset control functions */
@@ -2207,28 +1278,37 @@ static const struct of_device_id pmc_match[] __initconst = {
  * breaks
  */
 static struct tegra_clk_init_table init_table[] __initdata = {
-        {uarta, pll_p, 408000000, 0},
-        {uartb, pll_p, 408000000, 0},
-        {uartc, pll_p, 408000000, 0},
-        {uartd, pll_p, 408000000, 0},
-        {pll_a, clk_max, 564480000, 1},
-        {pll_a_out0, clk_max, 11289600, 1},
-        {extern1, pll_a_out0, 0, 1},
-        {clk_out_1_mux, extern1, 0, 1},
-        {clk_out_1, clk_max, 0, 1},
-        {i2s0, pll_a_out0, 11289600, 0},
-        {i2s1, pll_a_out0, 11289600, 0},
-        {i2s2, pll_a_out0, 11289600, 0},
-        {i2s3, pll_a_out0, 11289600, 0},
-        {i2s4, pll_a_out0, 11289600, 0},
-        {dfll_soc, pll_p, 51000000, 1},
-        {dfll_ref, pll_p, 51000000, 1},
-        {clk_max, clk_max, 0, 0}, /* This MUST be the last entry. */
+        {TEGRA114_CLK_UARTA, TEGRA114_CLK_PLL_P, 408000000, 0},
+        {TEGRA114_CLK_UARTB, TEGRA114_CLK_PLL_P, 408000000, 0},
+        {TEGRA114_CLK_UARTC, TEGRA114_CLK_PLL_P, 408000000, 0},
+        {TEGRA114_CLK_UARTD, TEGRA114_CLK_PLL_P, 408000000, 0},
+        {TEGRA114_CLK_PLL_A, TEGRA114_CLK_CLK_MAX, 564480000, 1},
+        {TEGRA114_CLK_PLL_A_OUT0, TEGRA114_CLK_CLK_MAX, 11289600, 1},
+        {TEGRA114_CLK_EXTERN1, TEGRA114_CLK_PLL_A_OUT0, 0, 1},
+        {TEGRA114_CLK_CLK_OUT_1_MUX, TEGRA114_CLK_EXTERN1, 0, 1},
+        {TEGRA114_CLK_CLK_OUT_1, TEGRA114_CLK_CLK_MAX, 0, 1},
+        {TEGRA114_CLK_I2S0, TEGRA114_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA114_CLK_I2S1, TEGRA114_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA114_CLK_I2S2, TEGRA114_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA114_CLK_I2S3, TEGRA114_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA114_CLK_I2S4, TEGRA114_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA114_CLK_HOST1X, TEGRA114_CLK_PLL_P, 136000000, 0},
+        {TEGRA114_CLK_DFLL_SOC, TEGRA114_CLK_PLL_P, 51000000, 1},
+        {TEGRA114_CLK_DFLL_REF, TEGRA114_CLK_PLL_P, 51000000, 1},
+        {TEGRA114_CLK_DISP1, TEGRA114_CLK_PLL_P, 0, 0},
+        {TEGRA114_CLK_DISP2, TEGRA114_CLK_PLL_P, 0, 0},
+        {TEGRA114_CLK_GR2D, TEGRA114_CLK_PLL_C2, 300000000, 0},
+        {TEGRA114_CLK_GR3D, TEGRA114_CLK_PLL_C2, 300000000, 0},
+        {TEGRA114_CLK_DSIALP, TEGRA114_CLK_PLL_P, 68000000, 0},
+        {TEGRA114_CLK_DSIBLP, TEGRA114_CLK_PLL_P, 68000000, 0},
+
+        /* This MUST be the last entry. */
+        {TEGRA114_CLK_CLK_MAX, TEGRA114_CLK_CLK_MAX, 0, 0},
 };
 
 static void __init tegra114_clock_apply_init_table(void)
 {
-        tegra_init_from_table(init_table, clks, clk_max);
+        tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX);
 }
 
 
@@ -2359,7 +1439,6 @@ EXPORT_SYMBOL(tegra114_clock_deassert_dfll_dvco_reset);
 static void __init tegra114_clock_init(struct device_node *np)
 {
         struct device_node *node;
-        int i;
 
         clk_base = of_iomap(np, 0);
         if (!clk_base) {
@@ -2381,29 +1460,24 @@ static void __init tegra114_clock_init(struct device_node *np)
                 return;
         }
 
+        clks = tegra_clk_init(clk_base, TEGRA114_CLK_CLK_MAX,
+                                TEGRA114_CLK_PERIPH_BANKS);
+        if (!clks)
+                return;
+
         if (tegra114_osc_clk_init(clk_base) < 0)
                 return;
 
         tegra114_fixed_clk_init(clk_base);
         tegra114_pll_init(clk_base, pmc_base);
-        tegra114_periph_clk_init(clk_base);
-        tegra114_audio_clk_init(clk_base);
-        tegra114_pmc_clk_init(pmc_base);
-        tegra114_super_clk_init(clk_base);
-
-        for (i = 0; i < ARRAY_SIZE(clks); i++) {
-                if (IS_ERR(clks[i])) {
-                        pr_err
-                            ("Tegra114 clk %d: register failed with %ld\n",
-                             i, PTR_ERR(clks[i]));
-                }
-                if (!clks[i])
-                        clks[i] = ERR_PTR(-EINVAL);
-        }
-
-        clk_data.clks = clks;
-        clk_data.clk_num = ARRAY_SIZE(clks);
-        of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+        tegra114_periph_clk_init(clk_base, pmc_base);
+        tegra_audio_clk_init(clk_base, pmc_base, tegra114_clks, &pll_a_params);
+        tegra_pmc_clk_init(pmc_base, tegra114_clks);
+        tegra_super_clk_gen4_init(clk_base, pmc_base, tegra114_clks,
+                                        &pll_x_params);
+
+        tegra_add_of_provider(np);
+        tegra_register_devclks(devclks, ARRAY_SIZE(devclks));
 
         tegra_clk_apply_init_table = tegra114_clock_apply_init_table;
 
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
new file mode 100644
index 000000000000..aff86b5bc745
--- /dev/null
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -0,0 +1,1424 @@
+/*
+ * Copyright (c) 2012, 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/clk/tegra.h>
+#include <dt-bindings/clock/tegra124-car.h>
+
+#include "clk.h"
+#include "clk-id.h"
+
+#define CLK_SOURCE_CSITE 0x1d4
+#define CLK_SOURCE_EMC 0x19c
+#define CLK_SOURCE_XUSB_SS_SRC 0x610
+
+#define PLLC_BASE 0x80
+#define PLLC_OUT 0x84
+#define PLLC_MISC2 0x88
+#define PLLC_MISC 0x8c
+#define PLLC2_BASE 0x4e8
+#define PLLC2_MISC 0x4ec
+#define PLLC3_BASE 0x4fc
+#define PLLC3_MISC 0x500
+#define PLLM_BASE 0x90
+#define PLLM_OUT 0x94
+#define PLLM_MISC 0x9c
+#define PLLP_BASE 0xa0
+#define PLLP_MISC 0xac
+#define PLLA_BASE 0xb0
+#define PLLA_MISC 0xbc
+#define PLLD_BASE 0xd0
+#define PLLD_MISC 0xdc
+#define PLLU_BASE 0xc0
+#define PLLU_MISC 0xcc
+#define PLLX_BASE 0xe0
+#define PLLX_MISC 0xe4
+#define PLLX_MISC2 0x514
+#define PLLX_MISC3 0x518
+#define PLLE_BASE 0xe8
+#define PLLE_MISC 0xec
+#define PLLD2_BASE 0x4b8
+#define PLLD2_MISC 0x4bc
+#define PLLE_AUX 0x48c
+#define PLLRE_BASE 0x4c4
+#define PLLRE_MISC 0x4c8
+#define PLLDP_BASE 0x590
+#define PLLDP_MISC 0x594
+#define PLLC4_BASE 0x5a4
+#define PLLC4_MISC 0x5a8
+
+#define PLLC_IDDQ_BIT 26
+#define PLLRE_IDDQ_BIT 16
+#define PLLSS_IDDQ_BIT 19
+
+#define PLL_BASE_LOCK BIT(27)
+#define PLLE_MISC_LOCK BIT(11)
+#define PLLRE_MISC_LOCK BIT(24)
+
+#define PLL_MISC_LOCK_ENABLE 18
+#define PLLC_MISC_LOCK_ENABLE 24
+#define PLLDU_MISC_LOCK_ENABLE 22
+#define PLLE_MISC_LOCK_ENABLE 9
+#define PLLRE_MISC_LOCK_ENABLE 30
+#define PLLSS_MISC_LOCK_ENABLE 30
+
+#define PLLXC_SW_MAX_P 6
+
+#define PMC_PLLM_WB0_OVERRIDE 0x1dc
+#define PMC_PLLM_WB0_OVERRIDE_2 0x2b0
+
+#define UTMIP_PLL_CFG2 0x488
+#define UTMIP_PLL_CFG2_STABLE_COUNT(x) (((x) & 0xffff) << 6)
+#define UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(x) (((x) & 0x3f) << 18)
+#define UTMIP_PLL_CFG2_FORCE_PD_SAMP_A_POWERDOWN BIT(0)
+#define UTMIP_PLL_CFG2_FORCE_PD_SAMP_B_POWERDOWN BIT(2)
+#define UTMIP_PLL_CFG2_FORCE_PD_SAMP_C_POWERDOWN BIT(4)
+
+#define UTMIP_PLL_CFG1 0x484
+#define UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 6)
+#define UTMIP_PLL_CFG1_XTAL_FREQ_COUNT(x) (((x) & 0xfff) << 0)
+#define UTMIP_PLL_CFG1_FORCE_PLLU_POWERUP BIT(17)
+#define UTMIP_PLL_CFG1_FORCE_PLLU_POWERDOWN BIT(16)
+#define UTMIP_PLL_CFG1_FORCE_PLL_ENABLE_POWERUP BIT(15)
+#define UTMIP_PLL_CFG1_FORCE_PLL_ENABLE_POWERDOWN BIT(14)
+#define UTMIP_PLL_CFG1_FORCE_PLL_ACTIVE_POWERDOWN BIT(12)
+
+#define UTMIPLL_HW_PWRDN_CFG0                   0x52c
+#define UTMIPLL_HW_PWRDN_CFG0_SEQ_START_STATE   BIT(25)
+#define UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE        BIT(24)
+#define UTMIPLL_HW_PWRDN_CFG0_USE_LOCKDET       BIT(6)
+#define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE     BIT(5)
+#define UTMIPLL_HW_PWRDN_CFG0_SEQ_IN_SWCTL      BIT(4)
+#define UTMIPLL_HW_PWRDN_CFG0_CLK_ENABLE_SWCTL  BIT(2)
+#define UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE     BIT(1)
+#define UTMIPLL_HW_PWRDN_CFG0_IDDQ_SWCTL        BIT(0)
+
+/* Tegra CPU clock and reset control regs */
+#define CLK_RST_CONTROLLER_CPU_CMPLX_STATUS     0x470
+
+#ifdef CONFIG_PM_SLEEP
+static struct cpu_clk_suspend_context {
+        u32 clk_csite_src;
+} tegra124_cpu_clk_sctx;
+#endif
+
+static void __iomem *clk_base;
+static void __iomem *pmc_base;
+
+static unsigned long osc_freq;
+static unsigned long pll_ref_freq;
+
+static DEFINE_SPINLOCK(pll_d_lock);
+static DEFINE_SPINLOCK(pll_d2_lock);
+static DEFINE_SPINLOCK(pll_e_lock);
+static DEFINE_SPINLOCK(pll_re_lock);
+static DEFINE_SPINLOCK(pll_u_lock);
+
+/* possible OSC frequencies in Hz */
+static unsigned long tegra124_input_freq[] = {
+        [0] = 13000000,
+        [1] = 16800000,
+        [4] = 19200000,
+        [5] = 38400000,
+        [8] = 12000000,
+        [9] = 48000000,
+        [12] = 260000000,
+};
+
+static const char *mux_plld_out0_plld2_out0[] = {
+        "pll_d_out0", "pll_d2_out0",
+};
+#define mux_plld_out0_plld2_out0_idx NULL
+
+static const char *mux_pllmcp_clkm[] = {
+        "pll_m", "pll_c", "pll_p", "clk_m", "pll_m_ud", "pll_c2", "pll_c3",
+};
+#define mux_pllmcp_clkm_idx NULL
+
+static struct div_nmp pllxc_nmp = {
+        .divm_shift = 0,
+        .divm_width = 8,
+        .divn_shift = 8,
+        .divn_width = 8,
+        .divp_shift = 20,
+        .divp_width = 4,
+};
+
+static struct pdiv_map pllxc_p[] = {
+        { .pdiv = 1, .hw_val = 0 },
+        { .pdiv = 2, .hw_val = 1 },
+        { .pdiv = 3, .hw_val = 2 },
+        { .pdiv = 4, .hw_val = 3 },
+        { .pdiv = 5, .hw_val = 4 },
+        { .pdiv = 6, .hw_val = 5 },
+        { .pdiv = 8, .hw_val = 6 },
+        { .pdiv = 10, .hw_val = 7 },
+        { .pdiv = 12, .hw_val = 8 },
+        { .pdiv = 16, .hw_val = 9 },
+        { .pdiv = 12, .hw_val = 10 },
+        { .pdiv = 16, .hw_val = 11 },
+        { .pdiv = 20, .hw_val = 12 },
+        { .pdiv = 24, .hw_val = 13 },
+        { .pdiv = 32, .hw_val = 14 },
+        { .pdiv = 0, .hw_val = 0 },
+};
+
+static struct tegra_clk_pll_freq_table pll_x_freq_table[] = {
+        /* 1 GHz */
+        {12000000, 1000000000, 83, 0, 1},       /* actual: 996.0 MHz */
+        {13000000, 1000000000, 76, 0, 1},       /* actual: 988.0 MHz */
+        {16800000, 1000000000, 59, 0, 1},       /* actual: 991.2 MHz */
+        {19200000, 1000000000, 52, 0, 1},       /* actual: 998.4 MHz */
+        {26000000, 1000000000, 76, 1, 1},       /* actual: 988.0 MHz */
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct tegra_clk_pll_params pll_x_params = {
+        .input_min = 12000000,
+        .input_max = 800000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000,     /* s/w policy, h/w capability 50 MHz */
+        .vco_min = 700000000,
+        .vco_max = 3000000000UL,
+        .base_reg = PLLX_BASE,
+        .misc_reg = PLLX_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .iddq_reg = PLLX_MISC3,
+        .iddq_bit_idx = 3,
+        .max_p = 6,
+        .dyn_ramp_reg = PLLX_MISC2,
+        .stepa_shift = 16,
+        .stepb_shift = 24,
+        .pdiv_tohw = pllxc_p,
+        .div_nmp = &pllxc_nmp,
+        .freq_table = pll_x_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
+};
+
+static struct tegra_clk_pll_freq_table pll_c_freq_table[] = {
+        { 12000000, 624000000, 104, 1, 2},
+        { 12000000, 600000000, 100, 1, 2},
+        { 13000000, 600000000,  92, 1, 2},      /* actual: 598.0 MHz */
+        { 16800000, 600000000,  71, 1, 2},      /* actual: 596.4 MHz */
+        { 19200000, 600000000,  62, 1, 2},      /* actual: 595.2 MHz */
+        { 26000000, 600000000,  92, 2, 2},      /* actual: 598.0 MHz */
+        { 0, 0, 0, 0, 0, 0 },
+};
+
+static struct tegra_clk_pll_params pll_c_params = {
+        .input_min = 12000000,
+        .input_max = 800000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000,     /* s/w policy, h/w capability 50 MHz */
+        .vco_min = 600000000,
+        .vco_max = 1400000000,
+        .base_reg = PLLC_BASE,
+        .misc_reg = PLLC_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLLC_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .iddq_reg = PLLC_MISC,
+        .iddq_bit_idx = PLLC_IDDQ_BIT,
+        .max_p = PLLXC_SW_MAX_P,
+        .dyn_ramp_reg = PLLC_MISC2,
+        .stepa_shift = 17,
+        .stepb_shift = 9,
+        .pdiv_tohw = pllxc_p,
+        .div_nmp = &pllxc_nmp,
+        .freq_table = pll_c_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
+};
+
+static struct div_nmp pllcx_nmp = {
+        .divm_shift = 0,
+        .divm_width = 2,
+        .divn_shift = 8,
+        .divn_width = 8,
+        .divp_shift = 20,
+        .divp_width = 3,
+};
+
+static struct pdiv_map pllc_p[] = {
+        { .pdiv = 1, .hw_val = 0 },
+        { .pdiv = 2, .hw_val = 1 },
+        { .pdiv = 3, .hw_val = 2 },
+        { .pdiv = 4, .hw_val = 3 },
+        { .pdiv = 6, .hw_val = 4 },
+        { .pdiv = 8, .hw_val = 5 },
+        { .pdiv = 12, .hw_val = 6 },
+        { .pdiv = 16, .hw_val = 7 },
+        { .pdiv = 0, .hw_val = 0 },
+};
+
+static struct tegra_clk_pll_freq_table pll_cx_freq_table[] = {
+        {12000000, 600000000, 100, 1, 2},
+        {13000000, 600000000, 92, 1, 2},        /* actual: 598.0 MHz */
+        {16800000, 600000000, 71, 1, 2},        /* actual: 596.4 MHz */
+        {19200000, 600000000, 62, 1, 2},        /* actual: 595.2 MHz */
+        {26000000, 600000000, 92, 2, 2},        /* actual: 598.0 MHz */
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct tegra_clk_pll_params pll_c2_params = {
+        .input_min = 12000000,
+        .input_max = 48000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000,
+        .vco_min = 600000000,
+        .vco_max = 1200000000,
+        .base_reg = PLLC2_BASE,
+        .misc_reg = PLLC2_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .pdiv_tohw = pllc_p,
+        .div_nmp = &pllcx_nmp,
+        .max_p = 7,
+        .ext_misc_reg[0] = 0x4f0,
+        .ext_misc_reg[1] = 0x4f4,
+        .ext_misc_reg[2] = 0x4f8,
+        .freq_table = pll_cx_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
+};
+
+static struct tegra_clk_pll_params pll_c3_params = {
+        .input_min = 12000000,
+        .input_max = 48000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000,
+        .vco_min = 600000000,
+        .vco_max = 1200000000,
+        .base_reg = PLLC3_BASE,
+        .misc_reg = PLLC3_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .pdiv_tohw = pllc_p,
+        .div_nmp = &pllcx_nmp,
+        .max_p = 7,
+        .ext_misc_reg[0] = 0x504,
+        .ext_misc_reg[1] = 0x508,
+        .ext_misc_reg[2] = 0x50c,
+        .freq_table = pll_cx_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
+};
+
+static struct div_nmp pllss_nmp = {
+        .divm_shift = 0,
+        .divm_width = 8,
+        .divn_shift = 8,
+        .divn_width = 8,
+        .divp_shift = 20,
+        .divp_width = 4,
+};
+
+static struct pdiv_map pll12g_ssd_esd_p[] = {
+        { .pdiv = 1, .hw_val = 0 },
+        { .pdiv = 2, .hw_val = 1 },
+        { .pdiv = 3, .hw_val = 2 },
+        { .pdiv = 4, .hw_val = 3 },
+        { .pdiv = 5, .hw_val = 4 },
+        { .pdiv = 6, .hw_val = 5 },
+        { .pdiv = 8, .hw_val = 6 },
+        { .pdiv = 10, .hw_val = 7 },
+        { .pdiv = 12, .hw_val = 8 },
+        { .pdiv = 16, .hw_val = 9 },
+        { .pdiv = 12, .hw_val = 10 },
+        { .pdiv = 16, .hw_val = 11 },
+        { .pdiv = 20, .hw_val = 12 },
+        { .pdiv = 24, .hw_val = 13 },
+        { .pdiv = 32, .hw_val = 14 },
+        { .pdiv = 0, .hw_val = 0 },
+};
+
+static struct tegra_clk_pll_freq_table pll_c4_freq_table[] = {
+        { 12000000, 600000000, 100, 1, 1},
+        { 13000000, 600000000,  92, 1, 1},      /* actual: 598.0 MHz */
+        { 16800000, 600000000,  71, 1, 1},      /* actual: 596.4 MHz */
+        { 19200000, 600000000,  62, 1, 1},      /* actual: 595.2 MHz */
+        { 26000000, 600000000,  92, 2, 1},      /* actual: 598.0 MHz */
+        { 0, 0, 0, 0, 0, 0 },
+};
+
+static struct tegra_clk_pll_params pll_c4_params = {
+        .input_min = 12000000,
+        .input_max = 1000000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000, /* s/w policy, h/w capability 38 MHz */
+        .vco_min = 600000000,
+        .vco_max = 1200000000,
+        .base_reg = PLLC4_BASE,
+        .misc_reg = PLLC4_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLLSS_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .iddq_reg = PLLC4_BASE,
+        .iddq_bit_idx = PLLSS_IDDQ_BIT,
+        .pdiv_tohw = pll12g_ssd_esd_p,
+        .div_nmp = &pllss_nmp,
+        .ext_misc_reg[0] = 0x5ac,
+        .ext_misc_reg[1] = 0x5b0,
+        .ext_misc_reg[2] = 0x5b4,
+        .freq_table = pll_c4_freq_table,
+};
+
+static struct pdiv_map pllm_p[] = {
+        { .pdiv = 1, .hw_val = 0 },
+        { .pdiv = 2, .hw_val = 1 },
+        { .pdiv = 0, .hw_val = 0 },
+};
+
+static struct tegra_clk_pll_freq_table pll_m_freq_table[] = {
+        {12000000, 800000000, 66, 1, 1},        /* actual: 792.0 MHz */
+        {13000000, 800000000, 61, 1, 1},        /* actual: 793.0 MHz */
+        {16800000, 800000000, 47, 1, 1},        /* actual: 789.6 MHz */
+        {19200000, 800000000, 41, 1, 1},        /* actual: 787.2 MHz */
+        {26000000, 800000000, 61, 2, 1},        /* actual: 793.0 MHz */
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct div_nmp pllm_nmp = {
+        .divm_shift = 0,
+        .divm_width = 8,
+        .override_divm_shift = 0,
+        .divn_shift = 8,
+        .divn_width = 8,
+        .override_divn_shift = 8,
+        .divp_shift = 20,
+        .divp_width = 1,
+        .override_divp_shift = 27,
+};
+
+static struct tegra_clk_pll_params pll_m_params = {
+        .input_min = 12000000,
+        .input_max = 500000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000,     /* s/w policy, h/w capability 50 MHz */
+        .vco_min = 400000000,
+        .vco_max = 1066000000,
+        .base_reg = PLLM_BASE,
+        .misc_reg = PLLM_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .max_p = 2,
+        .pdiv_tohw = pllm_p,
+        .div_nmp = &pllm_nmp,
+        .pmc_divnm_reg = PMC_PLLM_WB0_OVERRIDE,
+        .pmc_divp_reg = PMC_PLLM_WB0_OVERRIDE_2,
+        .freq_table = pll_m_freq_table,
+        .flags = TEGRA_PLL_USE_LOCK,
+};
+
+static struct tegra_clk_pll_freq_table pll_e_freq_table[] = {
+        /* PLLE special case: use cpcon field to store cml divider value */
+        {336000000, 100000000, 100, 21, 16, 11},
+        {312000000, 100000000, 200, 26, 24, 13},
+        {13000000,  100000000, 200, 1,  26, 13},
+        {12000000,  100000000, 200, 1,  24, 13},
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct div_nmp plle_nmp = {
+        .divm_shift = 0,
+        .divm_width = 8,
+        .divn_shift = 8,
+        .divn_width = 8,
+        .divp_shift = 24,
+        .divp_width = 4,
+};
+
+static struct tegra_clk_pll_params pll_e_params = {
+        .input_min = 12000000,
+        .input_max = 1000000000,
+        .cf_min = 12000000,
+        .cf_max = 75000000,
+        .vco_min = 1600000000,
+        .vco_max = 2400000000U,
+        .base_reg = PLLE_BASE,
+        .misc_reg = PLLE_MISC,
+        .aux_reg = PLLE_AUX,
+        .lock_mask = PLLE_MISC_LOCK,
+        .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .div_nmp = &plle_nmp,
+        .freq_table = pll_e_freq_table,
+        .flags = TEGRA_PLL_FIXED,
+        .fixed_rate = 100000000,
+};
+
+static const struct clk_div_table pll_re_div_table[] = {
+        { .val = 0, .div = 1 },
+        { .val = 1, .div = 2 },
+        { .val = 2, .div = 3 },
+        { .val = 3, .div = 4 },
+        { .val = 4, .div = 5 },
+        { .val = 5, .div = 6 },
+        { .val = 0, .div = 0 },
+};
+
+static struct div_nmp pllre_nmp = {
+        .divm_shift = 0,
+        .divm_width = 8,
+        .divn_shift = 8,
+        .divn_width = 8,
+        .divp_shift = 16,
+        .divp_width = 4,
+};
+
+static struct tegra_clk_pll_params pll_re_vco_params = {
+        .input_min = 12000000,
+        .input_max = 1000000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000, /* s/w policy, h/w capability 38 MHz */
+        .vco_min = 300000000,
+        .vco_max = 600000000,
+        .base_reg = PLLRE_BASE,
+        .misc_reg = PLLRE_MISC,
+        .lock_mask = PLLRE_MISC_LOCK,
+        .lock_enable_bit_idx = PLLRE_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .iddq_reg = PLLRE_MISC,
+        .iddq_bit_idx = PLLRE_IDDQ_BIT,
+        .div_nmp = &pllre_nmp,
+        .flags = TEGRA_PLL_USE_LOCK,
+};
+
+static struct div_nmp pllp_nmp = {
+        .divm_shift = 0,
+        .divm_width = 5,
+        .divn_shift = 8,
+        .divn_width = 10,
+        .divp_shift = 20,
+        .divp_width = 3,
+};
+
+static struct tegra_clk_pll_freq_table pll_p_freq_table[] = {
+        {12000000, 216000000, 432, 12, 1, 8},
+        {13000000, 216000000, 432, 13, 1, 8},
+        {16800000, 216000000, 360, 14, 1, 8},
+        {19200000, 216000000, 360, 16, 1, 8},
+        {26000000, 216000000, 432, 26, 1, 8},
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct tegra_clk_pll_params pll_p_params = {
+        .input_min = 2000000,
+        .input_max = 31000000,
+        .cf_min = 1000000,
+        .cf_max = 6000000,
+        .vco_min = 200000000,
+        .vco_max = 700000000,
+        .base_reg = PLLP_BASE,
+        .misc_reg = PLLP_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .div_nmp = &pllp_nmp,
+        .freq_table = pll_p_freq_table,
+        .fixed_rate = 408000000,
+        .flags = TEGRA_PLL_FIXED | TEGRA_PLL_USE_LOCK,
+};
+
+static struct tegra_clk_pll_freq_table pll_a_freq_table[] = {
+        {9600000, 282240000, 147, 5, 0, 4},
+        {9600000, 368640000, 192, 5, 0, 4},
+        {9600000, 240000000, 200, 8, 0, 8},
+
+        {28800000, 282240000, 245, 25, 0, 8},
+        {28800000, 368640000, 320, 25, 0, 8},
+        {28800000, 240000000, 200, 24, 0, 8},
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct tegra_clk_pll_params pll_a_params = {
+        .input_min = 2000000,
+        .input_max = 31000000,
+        .cf_min = 1000000,
+        .cf_max = 6000000,
+        .vco_min = 200000000,
+        .vco_max = 700000000,
+        .base_reg = PLLA_BASE,
+        .misc_reg = PLLA_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .div_nmp = &pllp_nmp,
+        .freq_table = pll_a_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_USE_LOCK,
+};
+
+static struct tegra_clk_pll_freq_table pll_d_freq_table[] = {
+        {12000000, 216000000, 864, 12, 4, 12},
+        {13000000, 216000000, 864, 13, 4, 12},
+        {16800000, 216000000, 720, 14, 4, 12},
+        {19200000, 216000000, 720, 16, 4, 12},
+        {26000000, 216000000, 864, 26, 4, 12},
+
+        {12000000, 594000000, 594, 12, 1, 12},
+        {13000000, 594000000, 594, 13, 1, 12},
+        {16800000, 594000000, 495, 14, 1, 12},
+        {19200000, 594000000, 495, 16, 1, 12},
+        {26000000, 594000000, 594, 26, 1, 12},
+
+        {12000000, 1000000000, 1000, 12, 1, 12},
+        {13000000, 1000000000, 1000, 13, 1, 12},
+        {19200000, 1000000000, 625, 12, 1, 12},
+        {26000000, 1000000000, 1000, 26, 1, 12},
+
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct tegra_clk_pll_params pll_d_params = {
+        .input_min = 2000000,
+        .input_max = 40000000,
+        .cf_min = 1000000,
+        .cf_max = 6000000,
+        .vco_min = 500000000,
+        .vco_max = 1000000000,
+        .base_reg = PLLD_BASE,
+        .misc_reg = PLLD_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
+        .lock_delay = 1000,
+        .div_nmp = &pllp_nmp,
+        .freq_table = pll_d_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
+                 TEGRA_PLL_USE_LOCK,
+};
+
+static struct tegra_clk_pll_freq_table tegra124_pll_d2_freq_table[] = {
+        { 12000000, 148500000,  99, 1, 8},
+        { 12000000, 594000000,  99, 1, 1},
+        { 13000000, 594000000,  91, 1, 1},      /* actual: 591.5 MHz */
+        { 16800000, 594000000,  71, 1, 1},      /* actual: 596.4 MHz */
+        { 19200000, 594000000,  62, 1, 1},      /* actual: 595.2 MHz */
+        { 26000000, 594000000,  91, 2, 1},      /* actual: 591.5 MHz */
+        { 0, 0, 0, 0, 0, 0 },
+};
+
+static struct tegra_clk_pll_params tegra124_pll_d2_params = {
+        .input_min = 12000000,
+        .input_max = 1000000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000, /* s/w policy, h/w capability 38 MHz */
+        .vco_min = 600000000,
+        .vco_max = 1200000000,
+        .base_reg = PLLD2_BASE,
+        .misc_reg = PLLD2_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLLSS_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .iddq_reg = PLLD2_BASE,
+        .iddq_bit_idx = PLLSS_IDDQ_BIT,
+        .pdiv_tohw = pll12g_ssd_esd_p,
+        .div_nmp = &pllss_nmp,
+        .ext_misc_reg[0] = 0x570,
+        .ext_misc_reg[1] = 0x574,
+        .ext_misc_reg[2] = 0x578,
+        .max_p = 15,
+        .freq_table = tegra124_pll_d2_freq_table,
+};
+
+static struct tegra_clk_pll_freq_table pll_dp_freq_table[] = {
+        { 12000000, 600000000, 100, 1, 1},
+        { 13000000, 600000000,  92, 1, 1},      /* actual: 598.0 MHz */
+        { 16800000, 600000000,  71, 1, 1},      /* actual: 596.4 MHz */
+        { 19200000, 600000000,  62, 1, 1},      /* actual: 595.2 MHz */
+        { 26000000, 600000000,  92, 2, 1},      /* actual: 598.0 MHz */
+        { 0, 0, 0, 0, 0, 0 },
+};
+
+static struct tegra_clk_pll_params pll_dp_params = {
+        .input_min = 12000000,
+        .input_max = 1000000000,
+        .cf_min = 12000000,
+        .cf_max = 19200000, /* s/w policy, h/w capability 38 MHz */
+        .vco_min = 600000000,
+        .vco_max = 1200000000,
+        .base_reg = PLLDP_BASE,
+        .misc_reg = PLLDP_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLLSS_MISC_LOCK_ENABLE,
+        .lock_delay = 300,
+        .iddq_reg = PLLDP_BASE,
+        .iddq_bit_idx = PLLSS_IDDQ_BIT,
+        .pdiv_tohw = pll12g_ssd_esd_p,
+        .div_nmp = &pllss_nmp,
+        .ext_misc_reg[0] = 0x598,
+        .ext_misc_reg[1] = 0x59c,
+        .ext_misc_reg[2] = 0x5a0,
+        .max_p = 5,
+        .freq_table = pll_dp_freq_table,
+};
+
+static struct pdiv_map pllu_p[] = {
+        { .pdiv = 1, .hw_val = 1 },
+        { .pdiv = 2, .hw_val = 0 },
+        { .pdiv = 0, .hw_val = 0 },
+};
+
+static struct div_nmp pllu_nmp = {
+        .divm_shift = 0,
+        .divm_width = 5,
+        .divn_shift = 8,
+        .divn_width = 10,
+        .divp_shift = 20,
+        .divp_width = 1,
+};
+
+static struct tegra_clk_pll_freq_table pll_u_freq_table[] = {
+        {12000000, 480000000, 960, 12, 2, 12},
+        {13000000, 480000000, 960, 13, 2, 12},
+        {16800000, 480000000, 400, 7, 2, 5},
+        {19200000, 480000000, 200, 4, 2, 3},
+        {26000000, 480000000, 960, 26, 2, 12},
+        {0, 0, 0, 0, 0, 0},
+};
+
+static struct tegra_clk_pll_params pll_u_params = {
+        .input_min = 2000000,
+        .input_max = 40000000,
+        .cf_min = 1000000,
+        .cf_max = 6000000,
+        .vco_min = 480000000,
+        .vco_max = 960000000,
+        .base_reg = PLLU_BASE,
+        .misc_reg = PLLU_MISC,
+        .lock_mask = PLL_BASE_LOCK,
+        .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
+        .lock_delay = 1000,
+        .pdiv_tohw = pllu_p,
+        .div_nmp = &pllu_nmp,
+        .freq_table = pll_u_freq_table,
+        .flags = TEGRA_PLLU | TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
+                 TEGRA_PLL_USE_LOCK,
+};
+
+struct utmi_clk_param {
+        /* Oscillator Frequency in KHz */
+        u32 osc_frequency;
+        /* UTMIP PLL Enable Delay Count  */
+        u8 enable_delay_count;
+        /* UTMIP PLL Stable count */
+        u8 stable_count;
+        /*  UTMIP PLL Active delay count */
+        u8 active_delay_count;
+        /* UTMIP PLL Xtal frequency count */
+        u8 xtal_freq_count;
+};
+
+static const struct utmi_clk_param utmi_parameters[] = {
+        {.osc_frequency = 13000000, .enable_delay_count = 0x02,
+         .stable_count = 0x33, .active_delay_count = 0x05,
+         .xtal_freq_count = 0x7F},
+        {.osc_frequency = 19200000, .enable_delay_count = 0x03,
+         .stable_count = 0x4B, .active_delay_count = 0x06,
+         .xtal_freq_count = 0xBB},
+        {.osc_frequency = 12000000, .enable_delay_count = 0x02,
+         .stable_count = 0x2F, .active_delay_count = 0x04,
+         .xtal_freq_count = 0x76},
+        {.osc_frequency = 26000000, .enable_delay_count = 0x04,
+         .stable_count = 0x66, .active_delay_count = 0x09,
+         .xtal_freq_count = 0xFE},
+        {.osc_frequency = 16800000, .enable_delay_count = 0x03,
+         .stable_count = 0x41, .active_delay_count = 0x0A,
+         .xtal_freq_count = 0xA4},
+};
+
+static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
+        [tegra_clk_ispb] = { .dt_id = TEGRA124_CLK_ISPB, .present = true },
+        [tegra_clk_rtc] = { .dt_id = TEGRA124_CLK_RTC, .present = true },
+        [tegra_clk_timer] = { .dt_id = TEGRA124_CLK_TIMER, .present = true },
+        [tegra_clk_uarta] = { .dt_id = TEGRA124_CLK_UARTA, .present = true },
+        [tegra_clk_sdmmc2] = { .dt_id = TEGRA124_CLK_SDMMC2, .present = true },
+        [tegra_clk_i2s1] = { .dt_id = TEGRA124_CLK_I2S1, .present = true },
+        [tegra_clk_i2c1] = { .dt_id = TEGRA124_CLK_I2C1, .present = true },
+        [tegra_clk_ndflash] = { .dt_id = TEGRA124_CLK_NDFLASH, .present = true },
+        [tegra_clk_sdmmc1] = { .dt_id = TEGRA124_CLK_SDMMC1, .present = true },
+        [tegra_clk_sdmmc4] = { .dt_id = TEGRA124_CLK_SDMMC4, .present = true },
+        [tegra_clk_pwm] = { .dt_id = TEGRA124_CLK_PWM, .present = true },
+        [tegra_clk_i2s2] = { .dt_id = TEGRA124_CLK_I2S2, .present = true },
+        [tegra_clk_gr2d] = { .dt_id = TEGRA124_CLK_GR_2D, .present = true },
+        [tegra_clk_usbd] = { .dt_id = TEGRA124_CLK_USBD, .present = true },
+        [tegra_clk_isp_8] = { .dt_id = TEGRA124_CLK_ISP, .present = true },
+        [tegra_clk_gr3d] = { .dt_id = TEGRA124_CLK_GR_3D, .present = true },
+        [tegra_clk_disp2] = { .dt_id = TEGRA124_CLK_DISP2, .present = true },
+        [tegra_clk_disp1] = { .dt_id = TEGRA124_CLK_DISP1, .present = true },
+        [tegra_clk_host1x] = { .dt_id = TEGRA124_CLK_HOST1X, .present = true },
+        [tegra_clk_vcp] = { .dt_id = TEGRA124_CLK_VCP, .present = true },
+        [tegra_clk_i2s0] = { .dt_id = TEGRA124_CLK_I2S0, .present = true },
+        [tegra_clk_apbdma] = { .dt_id = TEGRA124_CLK_APBDMA, .present = true },
+        [tegra_clk_kbc] = { .dt_id = TEGRA124_CLK_KBC, .present = true },
+        [tegra_clk_kfuse] = { .dt_id = TEGRA124_CLK_KFUSE, .present = true },
+        [tegra_clk_sbc1] = { .dt_id = TEGRA124_CLK_SBC1, .present = true },
+        [tegra_clk_nor] = { .dt_id = TEGRA124_CLK_NOR, .present = true },
+        [tegra_clk_sbc2] = { .dt_id = TEGRA124_CLK_SBC2, .present = true },
+        [tegra_clk_sbc3] = { .dt_id = TEGRA124_CLK_SBC3, .present = true },
+        [tegra_clk_i2c5] = { .dt_id = TEGRA124_CLK_I2C5, .present = true },
+        [tegra_clk_dsia] = { .dt_id = TEGRA124_CLK_DSIA, .present = true },
+        [tegra_clk_mipi] = { .dt_id = TEGRA124_CLK_MIPI, .present = true },
+        [tegra_clk_hdmi] = { .dt_id = TEGRA124_CLK_HDMI, .present = true },
+        [tegra_clk_csi] = { .dt_id = TEGRA124_CLK_CSI, .present = true },
+        [tegra_clk_i2c2] = { .dt_id = TEGRA124_CLK_I2C2, .present = true },
+        [tegra_clk_uartc] = { .dt_id = TEGRA124_CLK_UARTC, .present = true },
+        [tegra_clk_mipi_cal] = { .dt_id = TEGRA124_CLK_MIPI_CAL, .present = true },
+        [tegra_clk_emc] = { .dt_id = TEGRA124_CLK_EMC, .present = true },
+        [tegra_clk_usb2] = { .dt_id = TEGRA124_CLK_USB2, .present = true },
+        [tegra_clk_usb3] = { .dt_id = TEGRA124_CLK_USB3, .present = true },
+        [tegra_clk_vde_8] = { .dt_id = TEGRA124_CLK_VDE, .present = true },
+        [tegra_clk_bsea] = { .dt_id = TEGRA124_CLK_BSEA, .present = true },
+        [tegra_clk_bsev] = { .dt_id = TEGRA124_CLK_BSEV, .present = true },
+        [tegra_clk_uartd] = { .dt_id = TEGRA124_CLK_UARTD, .present = true },
+        [tegra_clk_i2c3] = { .dt_id = TEGRA124_CLK_I2C3, .present = true },
+        [tegra_clk_sbc4] = { .dt_id = TEGRA124_CLK_SBC4, .present = true },
+        [tegra_clk_sdmmc3] = { .dt_id = TEGRA124_CLK_SDMMC3, .present = true },
+        [tegra_clk_pcie] = { .dt_id = TEGRA124_CLK_PCIE, .present = true },
+        [tegra_clk_owr] = { .dt_id = TEGRA124_CLK_OWR, .present = true },
+        [tegra_clk_afi] = { .dt_id = TEGRA124_CLK_AFI, .present = true },
+        [tegra_clk_csite] = { .dt_id = TEGRA124_CLK_CSITE, .present = true },
+        [tegra_clk_la] = { .dt_id = TEGRA124_CLK_LA, .present = true },
+        [tegra_clk_trace] = { .dt_id = TEGRA124_CLK_TRACE, .present = true },
+        [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true },
+        [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true },
+        [tegra_clk_ndspeed] = { .dt_id = TEGRA124_CLK_NDSPEED, .present = true },
+        [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true },
+        [tegra_clk_dsib] = { .dt_id = TEGRA124_CLK_DSIB, .present = true },
+        [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true },
+        [tegra_clk_xusb_host] = { .dt_id = TEGRA124_CLK_XUSB_HOST, .present = true },
+        [tegra_clk_msenc] = { .dt_id = TEGRA124_CLK_MSENC, .present = true },
+        [tegra_clk_csus] = { .dt_id = TEGRA124_CLK_CSUS, .present = true },
+        [tegra_clk_mselect] = { .dt_id = TEGRA124_CLK_MSELECT, .present = true },
+        [tegra_clk_tsensor] = { .dt_id = TEGRA124_CLK_TSENSOR, .present = true },
+        [tegra_clk_i2s3] = { .dt_id = TEGRA124_CLK_I2S3, .present = true },
+        [tegra_clk_i2s4] = { .dt_id = TEGRA124_CLK_I2S4, .present = true },
+        [tegra_clk_i2c4] = { .dt_id = TEGRA124_CLK_I2C4, .present = true },
+        [tegra_clk_sbc5] = { .dt_id = TEGRA124_CLK_SBC5, .present = true },
+        [tegra_clk_sbc6] = { .dt_id = TEGRA124_CLK_SBC6, .present = true },
+        [tegra_clk_d_audio] = { .dt_id = TEGRA124_CLK_D_AUDIO, .present = true },
+        [tegra_clk_apbif] = { .dt_id = TEGRA124_CLK_APBIF, .present = true },
+        [tegra_clk_dam0] = { .dt_id = TEGRA124_CLK_DAM0, .present = true },
+        [tegra_clk_dam1] = { .dt_id = TEGRA124_CLK_DAM1, .present = true },
+        [tegra_clk_dam2] = { .dt_id = TEGRA124_CLK_DAM2, .present = true },
+        [tegra_clk_hda2codec_2x] = { .dt_id = TEGRA124_CLK_HDA2CODEC_2X, .present = true },
+        [tegra_clk_audio0_2x] = { .dt_id = TEGRA124_CLK_AUDIO0_2X, .present = true },
+        [tegra_clk_audio1_2x] = { .dt_id = TEGRA124_CLK_AUDIO1_2X, .present = true },
+        [tegra_clk_audio2_2x] = { .dt_id = TEGRA124_CLK_AUDIO2_2X, .present = true },
+        [tegra_clk_audio3_2x] = { .dt_id = TEGRA124_CLK_AUDIO3_2X, .present = true },
+        [tegra_clk_audio4_2x] = { .dt_id = TEGRA124_CLK_AUDIO4_2X, .present = true },
+        [tegra_clk_spdif_2x] = { .dt_id = TEGRA124_CLK_SPDIF_2X, .present = true },
+        [tegra_clk_actmon] = { .dt_id = TEGRA124_CLK_ACTMON, .present = true },
+        [tegra_clk_extern1] = { .dt_id = TEGRA124_CLK_EXTERN1, .present = true },
+        [tegra_clk_extern2] = { .dt_id = TEGRA124_CLK_EXTERN2, .present = true },
+        [tegra_clk_extern3] = { .dt_id = TEGRA124_CLK_EXTERN3, .present = true },
+        [tegra_clk_sata_oob] = { .dt_id = TEGRA124_CLK_SATA_OOB, .present = true },
+        [tegra_clk_sata] = { .dt_id = TEGRA124_CLK_SATA, .present = true },
+        [tegra_clk_hda] = { .dt_id = TEGRA124_CLK_HDA, .present = true },
+        [tegra_clk_se] = { .dt_id = TEGRA124_CLK_SE, .present = true },
+        [tegra_clk_hda2hdmi] = { .dt_id = TEGRA124_CLK_HDA2HDMI, .present = true },
+        [tegra_clk_sata_cold] = { .dt_id = TEGRA124_CLK_SATA_COLD, .present = true },
+        [tegra_clk_cilab] = { .dt_id = TEGRA124_CLK_CILAB, .present = true },
+        [tegra_clk_cilcd] = { .dt_id = TEGRA124_CLK_CILCD, .present = true },
+        [tegra_clk_cile] = { .dt_id = TEGRA124_CLK_CILE, .present = true },
+        [tegra_clk_dsialp] = { .dt_id = TEGRA124_CLK_DSIALP, .present = true },
+        [tegra_clk_dsiblp] = { .dt_id = TEGRA124_CLK_DSIBLP, .present = true },
+        [tegra_clk_entropy] = { .dt_id = TEGRA124_CLK_ENTROPY, .present = true },
+        [tegra_clk_dds] = { .dt_id = TEGRA124_CLK_DDS, .present = true },
+        [tegra_clk_dp2] = { .dt_id = TEGRA124_CLK_DP2, .present = true },
+        [tegra_clk_amx] = { .dt_id = TEGRA124_CLK_AMX, .present = true },
+        [tegra_clk_adx] = { .dt_id = TEGRA124_CLK_ADX, .present = true },
+        [tegra_clk_xusb_ss] = { .dt_id = TEGRA124_CLK_XUSB_SS, .present = true },
+        [tegra_clk_i2c6] = { .dt_id = TEGRA124_CLK_I2C6, .present = true },
+        [tegra_clk_vim2_clk] = { .dt_id = TEGRA124_CLK_VIM2_CLK, .present = true },
+        [tegra_clk_hdmi_audio] = { .dt_id = TEGRA124_CLK_HDMI_AUDIO, .present = true },
+        [tegra_clk_clk72Mhz] = { .dt_id = TEGRA124_CLK_CLK72MHZ, .present = true },
+        [tegra_clk_vic03] = { .dt_id = TEGRA124_CLK_VIC03, .present = true },
+        [tegra_clk_adx1] = { .dt_id = TEGRA124_CLK_ADX1, .present = true },
+        [tegra_clk_dpaux] = { .dt_id = TEGRA124_CLK_DPAUX, .present = true },
+        [tegra_clk_sor0] = { .dt_id = TEGRA124_CLK_SOR0, .present = true },
+        [tegra_clk_sor0_lvds] = { .dt_id = TEGRA124_CLK_SOR0_LVDS, .present = true },
+        [tegra_clk_gpu] = { .dt_id = TEGRA124_CLK_GPU, .present = true },
+        [tegra_clk_amx1] = { .dt_id = TEGRA124_CLK_AMX1, .present = true },
+        [tegra_clk_uartb] = { .dt_id = TEGRA124_CLK_UARTB, .present = true },
+        [tegra_clk_vfir] = { .dt_id = TEGRA124_CLK_VFIR, .present = true },
+        [tegra_clk_spdif_in] = { .dt_id = TEGRA124_CLK_SPDIF_IN, .present = true },
+        [tegra_clk_spdif_out] = { .dt_id = TEGRA124_CLK_SPDIF_OUT, .present = true },
+        [tegra_clk_vi_9] = { .dt_id = TEGRA124_CLK_VI, .present = true },
+        [tegra_clk_vi_sensor] = { .dt_id = TEGRA124_CLK_VI_SENSOR, .present = true },
+        [tegra_clk_fuse] = { .dt_id = TEGRA124_CLK_FUSE, .present = true },
+        [tegra_clk_fuse_burn] = { .dt_id = TEGRA124_CLK_FUSE_BURN, .present = true },
+        [tegra_clk_clk_32k] = { .dt_id = TEGRA124_CLK_CLK_32K, .present = true },
+        [tegra_clk_clk_m] = { .dt_id = TEGRA124_CLK_CLK_M, .present = true },
+        [tegra_clk_clk_m_div2] = { .dt_id = TEGRA124_CLK_CLK_M_DIV2, .present = true },
+        [tegra_clk_clk_m_div4] = { .dt_id = TEGRA124_CLK_CLK_M_DIV4, .present = true },
+        [tegra_clk_pll_ref] = { .dt_id = TEGRA124_CLK_PLL_REF, .present = true },
+        [tegra_clk_pll_c] = { .dt_id = TEGRA124_CLK_PLL_C, .present = true },
+        [tegra_clk_pll_c_out1] = { .dt_id = TEGRA124_CLK_PLL_C_OUT1, .present = true },
+        [tegra_clk_pll_c2] = { .dt_id = TEGRA124_CLK_PLL_C2, .present = true },
+        [tegra_clk_pll_c3] = { .dt_id = TEGRA124_CLK_PLL_C3, .present = true },
+        [tegra_clk_pll_m] = { .dt_id = TEGRA124_CLK_PLL_M, .present = true },
+        [tegra_clk_pll_m_out1] = { .dt_id = TEGRA124_CLK_PLL_M_OUT1, .present = true },
+        [tegra_clk_pll_p] = { .dt_id = TEGRA124_CLK_PLL_P, .present = true },
+        [tegra_clk_pll_p_out1] = { .dt_id = TEGRA124_CLK_PLL_P_OUT1, .present = true },
+        [tegra_clk_pll_p_out2] = { .dt_id = TEGRA124_CLK_PLL_P_OUT2, .present = true },
+        [tegra_clk_pll_p_out3] = { .dt_id = TEGRA124_CLK_PLL_P_OUT3, .present = true },
+        [tegra_clk_pll_p_out4] = { .dt_id = TEGRA124_CLK_PLL_P_OUT4, .present = true },
+        [tegra_clk_pll_a] = { .dt_id = TEGRA124_CLK_PLL_A, .present = true },
+        [tegra_clk_pll_a_out0] = { .dt_id = TEGRA124_CLK_PLL_A_OUT0, .present = true },
+        [tegra_clk_pll_d] = { .dt_id = TEGRA124_CLK_PLL_D, .present = true },
+        [tegra_clk_pll_d_out0] = { .dt_id = TEGRA124_CLK_PLL_D_OUT0, .present = true },
+        [tegra_clk_pll_d2] = { .dt_id = TEGRA124_CLK_PLL_D2, .present = true },
+        [tegra_clk_pll_d2_out0] = { .dt_id = TEGRA124_CLK_PLL_D2_OUT0, .present = true },
+        [tegra_clk_pll_u] = { .dt_id = TEGRA124_CLK_PLL_U, .present = true },
+        [tegra_clk_pll_u_480m] = { .dt_id = TEGRA124_CLK_PLL_U_480M, .present = true },
+        [tegra_clk_pll_u_60m] = { .dt_id = TEGRA124_CLK_PLL_U_60M, .present = true },
+        [tegra_clk_pll_u_48m] = { .dt_id = TEGRA124_CLK_PLL_U_48M, .present = true },
+        [tegra_clk_pll_u_12m] = { .dt_id = TEGRA124_CLK_PLL_U_12M, .present = true },
+        [tegra_clk_pll_x] = { .dt_id = TEGRA124_CLK_PLL_X, .present = true },
+        [tegra_clk_pll_x_out0] = { .dt_id = TEGRA124_CLK_PLL_X_OUT0, .present = true },
+        [tegra_clk_pll_re_vco] = { .dt_id = TEGRA124_CLK_PLL_RE_VCO, .present = true },
+        [tegra_clk_pll_re_out] = { .dt_id = TEGRA124_CLK_PLL_RE_OUT, .present = true },
+        [tegra_clk_spdif_in_sync] = { .dt_id = TEGRA124_CLK_SPDIF_IN_SYNC, .present = true },
+        [tegra_clk_i2s0_sync] = { .dt_id = TEGRA124_CLK_I2S0_SYNC, .present = true },
+        [tegra_clk_i2s1_sync] = { .dt_id = TEGRA124_CLK_I2S1_SYNC, .present = true },
+        [tegra_clk_i2s2_sync] = { .dt_id = TEGRA124_CLK_I2S2_SYNC, .present = true },
+        [tegra_clk_i2s3_sync] = { .dt_id = TEGRA124_CLK_I2S3_SYNC, .present = true },
+        [tegra_clk_i2s4_sync] = { .dt_id = TEGRA124_CLK_I2S4_SYNC, .present = true },
+        [tegra_clk_vimclk_sync] = { .dt_id = TEGRA124_CLK_VIMCLK_SYNC, .present = true },
+        [tegra_clk_audio0] = { .dt_id = TEGRA124_CLK_AUDIO0, .present = true },
+        [tegra_clk_audio1] = { .dt_id = TEGRA124_CLK_AUDIO1, .present = true },
+        [tegra_clk_audio2] = { .dt_id = TEGRA124_CLK_AUDIO2, .present = true },
+        [tegra_clk_audio3] = { .dt_id = TEGRA124_CLK_AUDIO3, .present = true },
+        [tegra_clk_audio4] = { .dt_id = TEGRA124_CLK_AUDIO4, .present = true },
+        [tegra_clk_spdif] = { .dt_id = TEGRA124_CLK_SPDIF, .present = true },
+        [tegra_clk_clk_out_1] = { .dt_id = TEGRA124_CLK_CLK_OUT_1, .present = true },
+        [tegra_clk_clk_out_2] = { .dt_id = TEGRA124_CLK_CLK_OUT_2, .present = true },
+        [tegra_clk_clk_out_3] = { .dt_id = TEGRA124_CLK_CLK_OUT_3, .present = true },
+        [tegra_clk_blink] = { .dt_id = TEGRA124_CLK_BLINK, .present = true },
+        [tegra_clk_xusb_host_src] = { .dt_id = TEGRA124_CLK_XUSB_HOST_SRC, .present = true },
+        [tegra_clk_xusb_falcon_src] = { .dt_id = TEGRA124_CLK_XUSB_FALCON_SRC, .present = true },
+        [tegra_clk_xusb_fs_src] = { .dt_id = TEGRA124_CLK_XUSB_FS_SRC, .present = true },
+        [tegra_clk_xusb_ss_src] = { .dt_id = TEGRA124_CLK_XUSB_SS_SRC, .present = true },
+        [tegra_clk_xusb_dev_src] = { .dt_id = TEGRA124_CLK_XUSB_DEV_SRC, .present = true },
+        [tegra_clk_xusb_dev] = { .dt_id = TEGRA124_CLK_XUSB_DEV, .present = true },
+        [tegra_clk_xusb_hs_src] = { .dt_id = TEGRA124_CLK_XUSB_HS_SRC, .present = true },
+        [tegra_clk_sclk] = { .dt_id = TEGRA124_CLK_SCLK, .present = true },
+        [tegra_clk_hclk] = { .dt_id = TEGRA124_CLK_HCLK, .present = true },
+        [tegra_clk_pclk] = { .dt_id = TEGRA124_CLK_PCLK, .present = true },
+        [tegra_clk_cclk_g] = { .dt_id = TEGRA124_CLK_CCLK_G, .present = true },
+        [tegra_clk_cclk_lp] = { .dt_id = TEGRA124_CLK_CCLK_LP, .present = true },
+        [tegra_clk_dfll_ref] = { .dt_id = TEGRA124_CLK_DFLL_REF, .present = true },
+        [tegra_clk_dfll_soc] = { .dt_id = TEGRA124_CLK_DFLL_SOC, .present = true },
+        [tegra_clk_vi_sensor2] = { .dt_id = TEGRA124_CLK_VI_SENSOR2, .present = true },
+        [tegra_clk_pll_p_out5] = { .dt_id = TEGRA124_CLK_PLL_P_OUT5, .present = true },
+        [tegra_clk_pll_c4] = { .dt_id = TEGRA124_CLK_PLL_C4, .present = true },
+        [tegra_clk_pll_dp] = { .dt_id = TEGRA124_CLK_PLL_DP, .present = true },
+        [tegra_clk_audio0_mux] = { .dt_id = TEGRA124_CLK_AUDIO0_MUX, .present = true },
+        [tegra_clk_audio1_mux] = { .dt_id = TEGRA124_CLK_AUDIO1_MUX, .present = true },
+        [tegra_clk_audio2_mux] = { .dt_id = TEGRA124_CLK_AUDIO2_MUX, .present = true },
+        [tegra_clk_audio3_mux] = { .dt_id = TEGRA124_CLK_AUDIO3_MUX, .present = true },
+        [tegra_clk_audio4_mux] = { .dt_id = TEGRA124_CLK_AUDIO4_MUX, .present = true },
+        [tegra_clk_spdif_mux] = { .dt_id = TEGRA124_CLK_SPDIF_MUX, .present = true },
+        [tegra_clk_clk_out_1_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_1_MUX, .present = true },
+        [tegra_clk_clk_out_2_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_2_MUX, .present = true },
+        [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true },
+        [tegra_clk_dsia_mux] = { .dt_id = TEGRA124_CLK_DSIA_MUX, .present = true },
+        [tegra_clk_dsib_mux] = { .dt_id = TEGRA124_CLK_DSIB_MUX, .present = true },
+        [tegra_clk_uarte] = { .dt_id = TEGRA124_CLK_UARTE, .present = true },
+};
+
+static struct tegra_devclk devclks[] __initdata = {
+        { .con_id = "clk_m", .dt_id = TEGRA124_CLK_CLK_M },
+        { .con_id = "pll_ref", .dt_id = TEGRA124_CLK_PLL_REF },
+        { .con_id = "clk_32k", .dt_id = TEGRA124_CLK_CLK_32K },
+        { .con_id = "clk_m_div2", .dt_id = TEGRA124_CLK_CLK_M_DIV2 },
+        { .con_id = "clk_m_div4", .dt_id = TEGRA124_CLK_CLK_M_DIV4 },
+        { .con_id = "pll_c", .dt_id = TEGRA124_CLK_PLL_C },
+        { .con_id = "pll_c_out1", .dt_id = TEGRA124_CLK_PLL_C_OUT1 },
+        { .con_id = "pll_c2", .dt_id = TEGRA124_CLK_PLL_C2 },
+        { .con_id = "pll_c3", .dt_id = TEGRA124_CLK_PLL_C3 },
+        { .con_id = "pll_p", .dt_id = TEGRA124_CLK_PLL_P },
+        { .con_id = "pll_p_out1", .dt_id = TEGRA124_CLK_PLL_P_OUT1 },
+        { .con_id = "pll_p_out2", .dt_id = TEGRA124_CLK_PLL_P_OUT2 },
+        { .con_id = "pll_p_out3", .dt_id = TEGRA124_CLK_PLL_P_OUT3 },
+        { .con_id = "pll_p_out4", .dt_id = TEGRA124_CLK_PLL_P_OUT4 },
+        { .con_id = "pll_m", .dt_id = TEGRA124_CLK_PLL_M },
+        { .con_id = "pll_m_out1", .dt_id = TEGRA124_CLK_PLL_M_OUT1 },
+        { .con_id = "pll_x", .dt_id = TEGRA124_CLK_PLL_X },
+        { .con_id = "pll_x_out0", .dt_id = TEGRA124_CLK_PLL_X_OUT0 },
+        { .con_id = "pll_u", .dt_id = TEGRA124_CLK_PLL_U },
+        { .con_id = "pll_u_480M", .dt_id = TEGRA124_CLK_PLL_U_480M },
+        { .con_id = "pll_u_60M", .dt_id = TEGRA124_CLK_PLL_U_60M },
+        { .con_id = "pll_u_48M", .dt_id = TEGRA124_CLK_PLL_U_48M },
+        { .con_id = "pll_u_12M", .dt_id = TEGRA124_CLK_PLL_U_12M },
+        { .con_id = "pll_d", .dt_id = TEGRA124_CLK_PLL_D },
+        { .con_id = "pll_d_out0", .dt_id = TEGRA124_CLK_PLL_D_OUT0 },
+        { .con_id = "pll_d2", .dt_id = TEGRA124_CLK_PLL_D2 },
+        { .con_id = "pll_d2_out0", .dt_id = TEGRA124_CLK_PLL_D2_OUT0 },
+        { .con_id = "pll_a", .dt_id = TEGRA124_CLK_PLL_A },
+        { .con_id = "pll_a_out0", .dt_id = TEGRA124_CLK_PLL_A_OUT0 },
+        { .con_id = "pll_re_vco", .dt_id = TEGRA124_CLK_PLL_RE_VCO },
+        { .con_id = "pll_re_out", .dt_id = TEGRA124_CLK_PLL_RE_OUT },
+        { .con_id = "spdif_in_sync", .dt_id = TEGRA124_CLK_SPDIF_IN_SYNC },
+        { .con_id = "i2s0_sync", .dt_id = TEGRA124_CLK_I2S0_SYNC },
+        { .con_id = "i2s1_sync", .dt_id = TEGRA124_CLK_I2S1_SYNC },
+        { .con_id = "i2s2_sync", .dt_id = TEGRA124_CLK_I2S2_SYNC },
+        { .con_id = "i2s3_sync", .dt_id = TEGRA124_CLK_I2S3_SYNC },
+        { .con_id = "i2s4_sync", .dt_id = TEGRA124_CLK_I2S4_SYNC },
+        { .con_id = "vimclk_sync", .dt_id = TEGRA124_CLK_VIMCLK_SYNC },
+        { .con_id = "audio0", .dt_id = TEGRA124_CLK_AUDIO0 },
+        { .con_id = "audio1", .dt_id = TEGRA124_CLK_AUDIO1 },
+        { .con_id = "audio2", .dt_id = TEGRA124_CLK_AUDIO2 },
+        { .con_id = "audio3", .dt_id = TEGRA124_CLK_AUDIO3 },
+        { .con_id = "audio4", .dt_id = TEGRA124_CLK_AUDIO4 },
+        { .con_id = "spdif", .dt_id = TEGRA124_CLK_SPDIF },
+        { .con_id = "audio0_2x", .dt_id = TEGRA124_CLK_AUDIO0_2X },
+        { .con_id = "audio1_2x", .dt_id = TEGRA124_CLK_AUDIO1_2X },
+        { .con_id = "audio2_2x", .dt_id = TEGRA124_CLK_AUDIO2_2X },
+        { .con_id = "audio3_2x", .dt_id = TEGRA124_CLK_AUDIO3_2X },
+        { .con_id = "audio4_2x", .dt_id = TEGRA124_CLK_AUDIO4_2X },
+        { .con_id = "spdif_2x", .dt_id = TEGRA124_CLK_SPDIF_2X },
+        { .con_id = "extern1", .dev_id = "clk_out_1", .dt_id = TEGRA124_CLK_EXTERN1 },
+        { .con_id = "extern2", .dev_id = "clk_out_2", .dt_id = TEGRA124_CLK_EXTERN2 },
+        { .con_id = "extern3", .dev_id = "clk_out_3", .dt_id = TEGRA124_CLK_EXTERN3 },
+        { .con_id = "blink", .dt_id = TEGRA124_CLK_BLINK },
+        { .con_id = "cclk_g", .dt_id = TEGRA124_CLK_CCLK_G },
+        { .con_id = "cclk_lp", .dt_id = TEGRA124_CLK_CCLK_LP },
+        { .con_id = "sclk", .dt_id = TEGRA124_CLK_SCLK },
+        { .con_id = "hclk", .dt_id = TEGRA124_CLK_HCLK },
+        { .con_id = "pclk", .dt_id = TEGRA124_CLK_PCLK },
+        { .con_id = "fuse", .dt_id = TEGRA124_CLK_FUSE },
+        { .dev_id = "rtc-tegra", .dt_id = TEGRA124_CLK_RTC },
+        { .dev_id = "timer", .dt_id = TEGRA124_CLK_TIMER },
+};
+
+static struct clk **clks;
+
+static void tegra124_utmi_param_configure(void __iomem *clk_base)
+{
+        u32 reg;
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(utmi_parameters); i++) {
+                if (osc_freq == utmi_parameters[i].osc_frequency)
+                        break;
+        }
+
+        if (i >= ARRAY_SIZE(utmi_parameters)) {
+                pr_err("%s: Unexpected oscillator freq %lu\n", __func__,
+                       osc_freq);
+                return;
+        }
+
+        reg = readl_relaxed(clk_base + UTMIP_PLL_CFG2);
+
+        /* Program UTMIP PLL stable and active counts */
+        /* [FIXME] arclk_rst.h says WRONG! This should be 1ms -> 0x50 Check! */
+        reg &= ~UTMIP_PLL_CFG2_STABLE_COUNT(~0);
+        reg |= UTMIP_PLL_CFG2_STABLE_COUNT(utmi_parameters[i].stable_count);
+
+        reg &= ~UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(~0);
+
+        reg |= UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(utmi_parameters[i].
+                                            active_delay_count);
+
+        /* Remove power downs from UTMIP PLL control bits */
+        reg &= ~UTMIP_PLL_CFG2_FORCE_PD_SAMP_A_POWERDOWN;
+        reg &= ~UTMIP_PLL_CFG2_FORCE_PD_SAMP_B_POWERDOWN;
+        reg &= ~UTMIP_PLL_CFG2_FORCE_PD_SAMP_C_POWERDOWN;
+
+        writel_relaxed(reg, clk_base + UTMIP_PLL_CFG2);
+
+        /* Program UTMIP PLL delay and oscillator frequency counts */
+        reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
+        reg &= ~UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(~0);
+
+        reg |= UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(utmi_parameters[i].
+                                            enable_delay_count);
+
+        reg &= ~UTMIP_PLL_CFG1_XTAL_FREQ_COUNT(~0);
+        reg |= UTMIP_PLL_CFG1_XTAL_FREQ_COUNT(utmi_parameters[i].
+                                           xtal_freq_count);
+
+        /* Remove power downs from UTMIP PLL control bits */
+        reg &= ~UTMIP_PLL_CFG1_FORCE_PLL_ENABLE_POWERDOWN;
+        reg &= ~UTMIP_PLL_CFG1_FORCE_PLL_ACTIVE_POWERDOWN;
+        reg &= ~UTMIP_PLL_CFG1_FORCE_PLLU_POWERUP;
+        reg &= ~UTMIP_PLL_CFG1_FORCE_PLLU_POWERDOWN;
+        writel_relaxed(reg, clk_base + UTMIP_PLL_CFG1);
+
+        /* Setup HW control of UTMIPLL */
+        reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
+        reg |= UTMIPLL_HW_PWRDN_CFG0_USE_LOCKDET;
+        reg &= ~UTMIPLL_HW_PWRDN_CFG0_CLK_ENABLE_SWCTL;
+        reg |= UTMIPLL_HW_PWRDN_CFG0_SEQ_START_STATE;
+        writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
+
+        reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
+        reg &= ~UTMIP_PLL_CFG1_FORCE_PLL_ENABLE_POWERUP;
+        reg &= ~UTMIP_PLL_CFG1_FORCE_PLL_ENABLE_POWERDOWN;
+        writel_relaxed(reg, clk_base + UTMIP_PLL_CFG1);
+
+        udelay(1);
+
+        /* Setup SW override of UTMIPLL assuming USB2.0
+           ports are assigned to USB2 */
+        reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
+        reg |= UTMIPLL_HW_PWRDN_CFG0_IDDQ_SWCTL;
+        reg &= ~UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE;
+        writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
+
+        udelay(1);
+
+        /* Enable HW control UTMIPLL */
+        reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
+        reg |= UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE;
+        writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
+}
+
+static __init void tegra124_periph_clk_init(void __iomem *clk_base,
+                                            void __iomem *pmc_base)
+{
+        struct clk *clk;
+        u32 val;
+
+        /* xusb_hs_src */
+        val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC);
+        val |= BIT(25); /* always select PLLU_60M */
+        writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC);
+
+        clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0,
+                                        1, 1);
+        clks[TEGRA124_CLK_XUSB_HS_SRC] = clk;
+
+        /* dsia mux */
+        clk = clk_register_mux(NULL, "dsia_mux", mux_plld_out0_plld2_out0,
+                               ARRAY_SIZE(mux_plld_out0_plld2_out0), 0,
+                               clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock);
+        clks[TEGRA124_CLK_DSIA_MUX] = clk;
+
+        /* dsib mux */
+        clk = clk_register_mux(NULL, "dsib_mux", mux_plld_out0_plld2_out0,
+                               ARRAY_SIZE(mux_plld_out0_plld2_out0), 0,
+                               clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock);
+        clks[TEGRA124_CLK_DSIB_MUX] = clk;
+
+        /* emc mux */
+        clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
+                               ARRAY_SIZE(mux_pllmcp_clkm), 0,
+                               clk_base + CLK_SOURCE_EMC,
+                               29, 3, 0, NULL);
+
+        /* cml0 */
+        clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,
+                                0, 0, &pll_e_lock);
+        clk_register_clkdev(clk, "cml0", NULL);
+        clks[TEGRA124_CLK_CML0] = clk;
+
+        /* cml1 */
+        clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,
+                                1, 0, &pll_e_lock);
+        clk_register_clkdev(clk, "cml1", NULL);
+        clks[TEGRA124_CLK_CML1] = clk;
+
+        tegra_periph_clk_init(clk_base, pmc_base, tegra124_clks, &pll_p_params);
+}
+
+static void __init tegra124_pll_init(void __iomem *clk_base,
+                                     void __iomem *pmc)
+{
+        u32 val;
+        struct clk *clk;
+
+        /* PLLC */
+        clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
+                        pmc, 0, &pll_c_params, NULL);
+        clk_register_clkdev(clk, "pll_c", NULL);
+        clks[TEGRA124_CLK_PLL_C] = clk;
+
+        /* PLLC_OUT1 */
+        clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",
+                        clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
+                        8, 8, 1, NULL);
+        clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",
+                                clk_base + PLLC_OUT, 1, 0,
+                                CLK_SET_RATE_PARENT, 0, NULL);
+        clk_register_clkdev(clk, "pll_c_out1", NULL);
+        clks[TEGRA124_CLK_PLL_C_OUT1] = clk;
+
+        /* PLLC2 */
+        clk = tegra_clk_register_pllc("pll_c2", "pll_ref", clk_base, pmc, 0,
+                             &pll_c2_params, NULL);
+        clk_register_clkdev(clk, "pll_c2", NULL);
+        clks[TEGRA124_CLK_PLL_C2] = clk;
+
+        /* PLLC3 */
+        clk = tegra_clk_register_pllc("pll_c3", "pll_ref", clk_base, pmc, 0,
+                             &pll_c3_params, NULL);
+        clk_register_clkdev(clk, "pll_c3", NULL);
+        clks[TEGRA124_CLK_PLL_C3] = clk;
+
+        /* PLLM */
+        clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc,
+                             CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
+                             &pll_m_params, NULL);
+        clk_register_clkdev(clk, "pll_m", NULL);
+        clks[TEGRA124_CLK_PLL_M] = clk;
+
+        /* PLLM_OUT1 */
+        clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",
+                                clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
+                                8, 8, 1, NULL);
+        clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",
+                                clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED |
+                                CLK_SET_RATE_PARENT, 0, NULL);
+        clk_register_clkdev(clk, "pll_m_out1", NULL);
+        clks[TEGRA124_CLK_PLL_M_OUT1] = clk;
+
+        /* PLLM_UD */
+        clk = clk_register_fixed_factor(NULL, "pll_m_ud", "pll_m",
+                                        CLK_SET_RATE_PARENT, 1, 1);
+
+        /* PLLU */
+        val = readl(clk_base + pll_u_params.base_reg);
+        val &= ~BIT(24); /* disable PLLU_OVERRIDE */
+        writel(val, clk_base + pll_u_params.base_reg);
+
+        clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, pmc, 0,
+                            &pll_u_params, &pll_u_lock);
+        clk_register_clkdev(clk, "pll_u", NULL);
+        clks[TEGRA124_CLK_PLL_U] = clk;
+
+        tegra124_utmi_param_configure(clk_base);
+
+        /* PLLU_480M */
+        clk = clk_register_gate(NULL, "pll_u_480M", "pll_u",
+                                CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
+                                22, 0, &pll_u_lock);
+        clk_register_clkdev(clk, "pll_u_480M", NULL);
+        clks[TEGRA124_CLK_PLL_U_480M] = clk;
+
+        /* PLLU_60M */
+        clk = clk_register_fixed_factor(NULL, "pll_u_60M", "pll_u",
+                                        CLK_SET_RATE_PARENT, 1, 8);
+        clk_register_clkdev(clk, "pll_u_60M", NULL);
+        clks[TEGRA124_CLK_PLL_U_60M] = clk;
+
+        /* PLLU_48M */
+        clk = clk_register_fixed_factor(NULL, "pll_u_48M", "pll_u",
+                                        CLK_SET_RATE_PARENT, 1, 10);
+        clk_register_clkdev(clk, "pll_u_48M", NULL);
+        clks[TEGRA124_CLK_PLL_U_48M] = clk;
+
+        /* PLLU_12M */
+        clk = clk_register_fixed_factor(NULL, "pll_u_12M", "pll_u",
+                                        CLK_SET_RATE_PARENT, 1, 40);
+        clk_register_clkdev(clk, "pll_u_12M", NULL);
+        clks[TEGRA124_CLK_PLL_U_12M] = clk;
+
+        /* PLLD */
+        clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,
+                            &pll_d_params, &pll_d_lock);
+        clk_register_clkdev(clk, "pll_d", NULL);
+        clks[TEGRA124_CLK_PLL_D] = clk;
+
+        /* PLLD_OUT0 */
+        clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",
+                                        CLK_SET_RATE_PARENT, 1, 2);
+        clk_register_clkdev(clk, "pll_d_out0", NULL);
+        clks[TEGRA124_CLK_PLL_D_OUT0] = clk;
+
+        /* PLLRE */
+        clk = tegra_clk_register_pllre("pll_re_vco", "pll_ref", clk_base, pmc,
+                             0, &pll_re_vco_params, &pll_re_lock, pll_ref_freq);
+        clk_register_clkdev(clk, "pll_re_vco", NULL);
+        clks[TEGRA124_CLK_PLL_RE_VCO] = clk;
+
+        clk = clk_register_divider_table(NULL, "pll_re_out", "pll_re_vco", 0,
+                                         clk_base + PLLRE_BASE, 16, 4, 0,
+                                         pll_re_div_table, &pll_re_lock);
+        clk_register_clkdev(clk, "pll_re_out", NULL);
+        clks[TEGRA124_CLK_PLL_RE_OUT] = clk;
+
+        /* PLLE */
+        clk = tegra_clk_register_plle_tegra114("pll_e", "pll_ref",
+                                      clk_base, 0, &pll_e_params, NULL);
+        clk_register_clkdev(clk, "pll_e", NULL);
+        clks[TEGRA124_CLK_PLL_E] = clk;
+
+        /* PLLC4 */
+        clk = tegra_clk_register_pllss("pll_c4", "pll_ref", clk_base, 0,
+                                        &pll_c4_params, NULL);
+        clk_register_clkdev(clk, "pll_c4", NULL);
+        clks[TEGRA124_CLK_PLL_C4] = clk;
+
+        /* PLLDP */
+        clk = tegra_clk_register_pllss("pll_dp", "pll_ref", clk_base, 0,
+                                        &pll_dp_params, NULL);
+        clk_register_clkdev(clk, "pll_dp", NULL);
+        clks[TEGRA124_CLK_PLL_DP] = clk;
+
+        /* PLLD2 */
+        clk = tegra_clk_register_pllss("pll_d2", "pll_ref", clk_base, 0,
+                                        &tegra124_pll_d2_params, NULL);
+        clk_register_clkdev(clk, "pll_d2", NULL);
+        clks[TEGRA124_CLK_PLL_D2] = clk;
+
+        /* PLLD2_OUT0 ?? */
+        clk = clk_register_fixed_factor(NULL, "pll_d2_out0", "pll_d2",
+                                        CLK_SET_RATE_PARENT, 1, 2);
+        clk_register_clkdev(clk, "pll_d2_out0", NULL);
+        clks[TEGRA124_CLK_PLL_D2_OUT0] = clk;
+
+}
+
+/* Tegra124 CPU clock and reset control functions */
+static void tegra124_wait_cpu_in_reset(u32 cpu)
+{
+        unsigned int reg;
+
+        do {
+                reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
+                cpu_relax();
+        } while (!(reg & (1 << cpu)));  /* check CPU been reset or not */
+}
+
+static void tegra124_disable_cpu_clock(u32 cpu)
+{
+        /* flow controller would take care in the power sequence. */
+}
+
+#ifdef CONFIG_PM_SLEEP
+static void tegra124_cpu_clock_suspend(void)
+{
+        /* switch coresite to clk_m, save off original source */
+        tegra124_cpu_clk_sctx.clk_csite_src =
+                                readl(clk_base + CLK_SOURCE_CSITE);
+        writel(3 << 30, clk_base + CLK_SOURCE_CSITE);
+}
+
+static void tegra124_cpu_clock_resume(void)
+{
+        writel(tegra124_cpu_clk_sctx.clk_csite_src,
+                                clk_base + CLK_SOURCE_CSITE);
+}
+#endif
+
+static struct tegra_cpu_car_ops tegra124_cpu_car_ops = {
+        .wait_for_reset = tegra124_wait_cpu_in_reset,
+        .disable_clock  = tegra124_disable_cpu_clock,
+#ifdef CONFIG_PM_SLEEP
+        .suspend        = tegra124_cpu_clock_suspend,
+        .resume         = tegra124_cpu_clock_resume,
+#endif
+};
+
+static const struct of_device_id pmc_match[] __initconst = {
+        { .compatible = "nvidia,tegra124-pmc" },
+        {},
+};
+
+static struct tegra_clk_init_table init_table[] __initdata = {
+        {TEGRA124_CLK_UARTA, TEGRA124_CLK_PLL_P, 408000000, 0},
+        {TEGRA124_CLK_UARTB, TEGRA124_CLK_PLL_P, 408000000, 0},
+        {TEGRA124_CLK_UARTC, TEGRA124_CLK_PLL_P, 408000000, 0},
+        {TEGRA124_CLK_UARTD, TEGRA124_CLK_PLL_P, 408000000, 0},
+        {TEGRA124_CLK_PLL_A, TEGRA124_CLK_CLK_MAX, 564480000, 1},
+        {TEGRA124_CLK_PLL_A_OUT0, TEGRA124_CLK_CLK_MAX, 11289600, 1},
+        {TEGRA124_CLK_EXTERN1, TEGRA124_CLK_PLL_A_OUT0, 0, 1},
+        {TEGRA124_CLK_CLK_OUT_1_MUX, TEGRA124_CLK_EXTERN1, 0, 1},
+        {TEGRA124_CLK_CLK_OUT_1, TEGRA124_CLK_CLK_MAX, 0, 1},
+        {TEGRA124_CLK_I2S0, TEGRA124_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA124_CLK_I2S1, TEGRA124_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA124_CLK_I2S2, TEGRA124_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA124_CLK_I2S3, TEGRA124_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA124_CLK_I2S4, TEGRA124_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA124_CLK_VDE, TEGRA124_CLK_PLL_P, 0, 0},
+        {TEGRA124_CLK_HOST1X, TEGRA124_CLK_PLL_P, 136000000, 1},
+        {TEGRA124_CLK_SCLK, TEGRA124_CLK_PLL_P_OUT2, 102000000, 1},
+        {TEGRA124_CLK_DFLL_SOC, TEGRA124_CLK_PLL_P, 51000000, 1},
+        {TEGRA124_CLK_DFLL_REF, TEGRA124_CLK_PLL_P, 51000000, 1},
+        {TEGRA124_CLK_PLL_C, TEGRA124_CLK_CLK_MAX, 768000000, 0},
+        {TEGRA124_CLK_PLL_C_OUT1, TEGRA124_CLK_CLK_MAX, 100000000, 0},
+        {TEGRA124_CLK_SBC4, TEGRA124_CLK_PLL_P, 12000000, 1},
+        {TEGRA124_CLK_TSEC, TEGRA124_CLK_PLL_C3, 0, 0},
+        {TEGRA124_CLK_MSENC, TEGRA124_CLK_PLL_C3, 0, 0},
+        /* This MUST be the last entry. */
+        {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
+};
+
+static void __init tegra124_clock_apply_init_table(void)
+{
+        tegra_init_from_table(init_table, clks, TEGRA124_CLK_CLK_MAX);
+}
+
+static void __init tegra124_clock_init(struct device_node *np)
+{
+        struct device_node *node;
+
+        clk_base = of_iomap(np, 0);
+        if (!clk_base) {
+                pr_err("ioremap tegra124 CAR failed\n");
+                return;
+        }
+
+        node = of_find_matching_node(NULL, pmc_match);
+        if (!node) {
+                pr_err("Failed to find pmc node\n");
+                WARN_ON(1);
+                return;
+        }
+
+        pmc_base = of_iomap(node, 0);
+        if (!pmc_base) {
+                pr_err("Can't map pmc registers\n");
+                WARN_ON(1);
+                return;
+        }
+
+        clks = tegra_clk_init(clk_base, TEGRA124_CLK_CLK_MAX, 6);
+        if (!clks)
+                return;
+
+        if (tegra_osc_clk_init(clk_base, tegra124_clks, tegra124_input_freq,
+                ARRAY_SIZE(tegra124_input_freq), &osc_freq, &pll_ref_freq) < 0)
+                return;
+
+        tegra_fixed_clk_init(tegra124_clks);
+        tegra124_pll_init(clk_base, pmc_base);
+        tegra124_periph_clk_init(clk_base, pmc_base);
+        tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params);
+        tegra_pmc_clk_init(pmc_base, tegra124_clks);
+
+        tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks,
+                                        &pll_x_params);
+        tegra_add_of_provider(np);
+        tegra_register_devclks(devclks, ARRAY_SIZE(devclks));
+
+        tegra_clk_apply_init_table = tegra124_clock_apply_init_table;
+
+        tegra_cpu_car_ops = &tegra124_cpu_car_ops;
+}
+CLK_OF_DECLARE(tegra124, "nvidia,tegra124-car", tegra124_clock_init);
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index 056f649d0d89..dbace152b2fa 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -22,30 +22,10 @@
 #include <linux/of_address.h>
 #include <linux/clk/tegra.h>
 #include <linux/delay.h>
+#include <dt-bindings/clock/tegra20-car.h>
 
 #include "clk.h"
-
-#define RST_DEVICES_L 0x004
-#define RST_DEVICES_H 0x008
-#define RST_DEVICES_U 0x00c
-#define RST_DEVICES_SET_L 0x300
-#define RST_DEVICES_CLR_L 0x304
-#define RST_DEVICES_SET_H 0x308
-#define RST_DEVICES_CLR_H 0x30c
-#define RST_DEVICES_SET_U 0x310
-#define RST_DEVICES_CLR_U 0x314
-#define RST_DEVICES_NUM 3
-
-#define CLK_OUT_ENB_L 0x010
-#define CLK_OUT_ENB_H 0x014
-#define CLK_OUT_ENB_U 0x018
-#define CLK_OUT_ENB_SET_L 0x320
-#define CLK_OUT_ENB_CLR_L 0x324
-#define CLK_OUT_ENB_SET_H 0x328
-#define CLK_OUT_ENB_CLR_H 0x32c
-#define CLK_OUT_ENB_SET_U 0x330
-#define CLK_OUT_ENB_CLR_U 0x334
-#define CLK_OUT_ENB_NUM 3
+#include "clk-id.h"
 
 #define OSC_CTRL 0x50
 #define OSC_CTRL_OSC_FREQ_MASK (3<<30)
@@ -67,6 +47,8 @@
 #define OSC_FREQ_DET_BUSY (1<<31)
 #define OSC_FREQ_DET_CNT_MASK 0xFFFF
 
+#define TEGRA20_CLK_PERIPH_BANKS        3
+
 #define PLLS_BASE 0xf0
 #define PLLS_MISC 0xf4
 #define PLLC_BASE 0x80
@@ -114,34 +96,15 @@
 
 #define CLK_SOURCE_I2S1 0x100
 #define CLK_SOURCE_I2S2 0x104
-#define CLK_SOURCE_SPDIF_OUT 0x108
-#define CLK_SOURCE_SPDIF_IN 0x10c
 #define CLK_SOURCE_PWM 0x110
 #define CLK_SOURCE_SPI 0x114
-#define CLK_SOURCE_SBC1 0x134
-#define CLK_SOURCE_SBC2 0x118
-#define CLK_SOURCE_SBC3 0x11c
-#define CLK_SOURCE_SBC4 0x1b4
 #define CLK_SOURCE_XIO 0x120
 #define CLK_SOURCE_TWC 0x12c
 #define CLK_SOURCE_IDE 0x144
-#define CLK_SOURCE_NDFLASH 0x160
-#define CLK_SOURCE_VFIR 0x168
-#define CLK_SOURCE_SDMMC1 0x150
-#define CLK_SOURCE_SDMMC2 0x154
-#define CLK_SOURCE_SDMMC3 0x1bc
-#define CLK_SOURCE_SDMMC4 0x164
-#define CLK_SOURCE_CVE 0x140
-#define CLK_SOURCE_TVO 0x188
-#define CLK_SOURCE_TVDAC 0x194
 #define CLK_SOURCE_HDMI 0x18c
 #define CLK_SOURCE_DISP1 0x138
 #define CLK_SOURCE_DISP2 0x13c
 #define CLK_SOURCE_CSITE 0x1d4
-#define CLK_SOURCE_LA 0x1f8
-#define CLK_SOURCE_OWR 0x1cc
-#define CLK_SOURCE_NOR 0x1d0
-#define CLK_SOURCE_MIPI 0x174
 #define CLK_SOURCE_I2C1 0x124
 #define CLK_SOURCE_I2C2 0x198
 #define CLK_SOURCE_I2C3 0x1b8
@@ -151,24 +114,10 @@
 #define CLK_SOURCE_UARTC 0x1a0
 #define CLK_SOURCE_UARTD 0x1c0
 #define CLK_SOURCE_UARTE 0x1c4
-#define CLK_SOURCE_3D 0x158
-#define CLK_SOURCE_2D 0x15c
-#define CLK_SOURCE_MPE 0x170
-#define CLK_SOURCE_EPP 0x16c
-#define CLK_SOURCE_HOST1X 0x180
-#define CLK_SOURCE_VDE 0x1c8
-#define CLK_SOURCE_VI 0x148
-#define CLK_SOURCE_VI_SENSOR 0x1a8
 #define CLK_SOURCE_EMC 0x19c
 
 #define AUDIO_SYNC_CLK 0x38
 
-#define PMC_CTRL 0x0
-#define PMC_CTRL_BLINK_ENB 7
-#define PMC_DPD_PADS_ORIDE 0x1c
-#define PMC_DPD_PADS_ORIDE_BLINK_ENB 20
-#define PMC_BLINK_TIMER 0x40
-
 /* Tegra CPU clock and reset control regs */
 #define TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX          0x4c
 #define TEGRA_CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET      0x340
@@ -188,64 +137,32 @@ static struct cpu_clk_suspend_context {
 } tegra20_cpu_clk_sctx;
 #endif
 
-static int periph_clk_enb_refcnt[CLK_OUT_ENB_NUM * 32];
-
 static void __iomem *clk_base;
 static void __iomem *pmc_base;
 
-static DEFINE_SPINLOCK(pll_div_lock);
-static DEFINE_SPINLOCK(sysrate_lock);
-
-#define TEGRA_INIT_DATA_MUX(_name, _con_id, _dev_id, _parents, _offset, \
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
+#define TEGRA_INIT_DATA_MUX(_name, _parents, _offset,   \
+                            _clk_num, _gate_flags, _clk_id)     \
+        TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset,   \
                         30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,      \
-                        _regs, _clk_num, periph_clk_enb_refcnt,         \
+                        _clk_num, \
                         _gate_flags, _clk_id)
 
-#define TEGRA_INIT_DATA_INT(_name, _con_id, _dev_id, _parents, _offset, \
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_INT, _regs,    \
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
-                        _clk_id)
-
-#define TEGRA_INIT_DATA_DIV16(_name, _con_id, _dev_id, _parents, _offset, \
-                              _clk_num, _regs, _gate_flags, _clk_id)    \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        30, 2, 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP, _regs, \
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
+#define TEGRA_INIT_DATA_DIV16(_name, _parents, _offset, \
+                              _clk_num, _gate_flags, _clk_id)   \
+        TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset,   \
+                        30, 2, 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP, \
+                        _clk_num, _gate_flags,  \
                         _clk_id)
 
-#define TEGRA_INIT_DATA_NODIV(_name, _con_id, _dev_id, _parents, _offset, \
-                              _mux_shift, _mux_width, _clk_num, _regs,  \
+#define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \
+                              _mux_shift, _mux_width, _clk_num, \
                               _gate_flags, _clk_id)                     \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        _mux_shift, _mux_width, 0, 0, 0, 0, 0, _regs,   \
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
+        TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset,   \
+                        _mux_shift, _mux_width, 0, 0, 0, 0, 0, \
+                        _clk_num, _gate_flags,  \
                         _clk_id)
 
-/* IDs assigned here must be in sync with DT bindings definition
- * for Tegra20 clocks .
- */
-enum tegra20_clk {
-        cpu, ac97 = 3, rtc, timer, uarta, gpio = 8, sdmmc2, i2s1 = 11, i2c1,
-        ndflash, sdmmc1, sdmmc4, twc, pwm, i2s2, epp, gr2d = 21, usbd, isp,
-        gr3d, ide, disp2, disp1, host1x, vcp, cache2 = 31, mem, ahbdma, apbdma,
-        kbc = 36, stat_mon, pmc, fuse, kfuse, sbc1, nor, spi, sbc2, xio, sbc3,
-        dvc, dsi, mipi = 50, hdmi, csi, tvdac, i2c2, uartc, emc = 57, usb2,
-        usb3, mpe, vde, bsea, bsev, speedo, uartd, uarte, i2c3, sbc4, sdmmc3,
-        pex, owr, afi, csite, pcie_xclk, avpucq = 75, la, irama = 84, iramb,
-        iramc, iramd, cram2, audio_2x, clk_d, csus = 92, cdev2, cdev1,
-        uartb = 96, vfir, spdif_in, spdif_out, vi, vi_sensor, tvo, cve,
-        osc, clk_32k, clk_m, sclk, cclk, hclk, pclk, blink, pll_a, pll_a_out0,
-        pll_c, pll_c_out1, pll_d, pll_d_out0, pll_e, pll_m, pll_m_out1,
-        pll_p, pll_p_out1, pll_p_out2, pll_p_out3, pll_p_out4, pll_s, pll_u,
-        pll_x, cop, audio, pll_ref, twd, clk_max,
-};
-
-static struct clk *clks[clk_max];
-static struct clk_onecell_data clk_data;
+static struct clk **clks;
 
 static struct tegra_clk_pll_freq_table pll_c_freq_table[] = {
         { 12000000, 600000000, 600, 12, 0, 8 },
@@ -383,6 +300,8 @@ static struct tegra_clk_pll_params pll_c_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_c_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON,
 };
 
 static struct tegra_clk_pll_params pll_m_params = {
@@ -397,6 +316,8 @@ static struct tegra_clk_pll_params pll_m_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_m_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON,
 };
 
 static struct tegra_clk_pll_params pll_p_params = {
@@ -411,6 +332,9 @@ static struct tegra_clk_pll_params pll_p_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_p_freq_table,
+        .flags = TEGRA_PLL_FIXED | TEGRA_PLL_HAS_CPCON,
+        .fixed_rate =  216000000,
 };
 
 static struct tegra_clk_pll_params pll_a_params = {
@@ -425,6 +349,8 @@ static struct tegra_clk_pll_params pll_a_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_a_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON,
 };
 
 static struct tegra_clk_pll_params pll_d_params = {
@@ -439,6 +365,8 @@ static struct tegra_clk_pll_params pll_d_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
         .lock_delay = 1000,
+        .freq_table = pll_d_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON,
 };
 
 static struct pdiv_map pllu_p[] = {
@@ -460,6 +388,8 @@ static struct tegra_clk_pll_params pll_u_params = {
         .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
         .lock_delay = 1000,
         .pdiv_tohw = pllu_p,
+        .freq_table = pll_u_freq_table,
+        .flags = TEGRA_PLLU | TEGRA_PLL_HAS_CPCON,
 };
 
 static struct tegra_clk_pll_params pll_x_params = {
@@ -474,6 +404,8 @@ static struct tegra_clk_pll_params pll_x_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_x_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON,
 };
 
 static struct tegra_clk_pll_params pll_e_params = {
@@ -488,34 +420,160 @@ static struct tegra_clk_pll_params pll_e_params = {
         .lock_mask = PLLE_MISC_LOCK,
         .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
         .lock_delay = 0,
+        .freq_table = pll_e_freq_table,
+        .flags = TEGRA_PLL_FIXED,
+        .fixed_rate = 100000000,
 };
 
-/* Peripheral clock registers */
-static struct tegra_clk_periph_regs periph_l_regs = {
-        .enb_reg = CLK_OUT_ENB_L,
-        .enb_set_reg = CLK_OUT_ENB_SET_L,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_L,
-        .rst_reg = RST_DEVICES_L,
-        .rst_set_reg = RST_DEVICES_SET_L,
-        .rst_clr_reg = RST_DEVICES_CLR_L,
-};
-
-static struct tegra_clk_periph_regs periph_h_regs = {
-        .enb_reg = CLK_OUT_ENB_H,
-        .enb_set_reg = CLK_OUT_ENB_SET_H,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_H,
-        .rst_reg = RST_DEVICES_H,
-        .rst_set_reg = RST_DEVICES_SET_H,
-        .rst_clr_reg = RST_DEVICES_CLR_H,
+static struct tegra_devclk devclks[] __initdata = {
+        { .con_id = "pll_c", .dt_id = TEGRA20_CLK_PLL_C },
+        { .con_id = "pll_c_out1", .dt_id = TEGRA20_CLK_PLL_C_OUT1 },
+        { .con_id = "pll_p", .dt_id = TEGRA20_CLK_PLL_P },
+        { .con_id = "pll_p_out1", .dt_id = TEGRA20_CLK_PLL_P_OUT1 },
+        { .con_id = "pll_p_out2", .dt_id = TEGRA20_CLK_PLL_P_OUT2 },
+        { .con_id = "pll_p_out3", .dt_id = TEGRA20_CLK_PLL_P_OUT3 },
+        { .con_id = "pll_p_out4", .dt_id = TEGRA20_CLK_PLL_P_OUT4 },
+        { .con_id = "pll_m", .dt_id = TEGRA20_CLK_PLL_M },
+        { .con_id = "pll_m_out1", .dt_id = TEGRA20_CLK_PLL_M_OUT1 },
+        { .con_id = "pll_x", .dt_id = TEGRA20_CLK_PLL_X },
+        { .con_id = "pll_u", .dt_id = TEGRA20_CLK_PLL_U },
+        { .con_id = "pll_d", .dt_id = TEGRA20_CLK_PLL_D },
+        { .con_id = "pll_d_out0", .dt_id = TEGRA20_CLK_PLL_D_OUT0 },
+        { .con_id = "pll_a", .dt_id = TEGRA20_CLK_PLL_A },
+        { .con_id = "pll_a_out0", .dt_id = TEGRA20_CLK_PLL_A_OUT0 },
+        { .con_id = "pll_e", .dt_id = TEGRA20_CLK_PLL_E },
+        { .con_id = "cclk", .dt_id = TEGRA20_CLK_CCLK },
+        { .con_id = "sclk", .dt_id = TEGRA20_CLK_SCLK },
+        { .con_id = "hclk", .dt_id = TEGRA20_CLK_HCLK },
+        { .con_id = "pclk", .dt_id = TEGRA20_CLK_PCLK },
+        { .con_id = "fuse", .dt_id = TEGRA20_CLK_FUSE },
+        { .con_id = "twd", .dt_id = TEGRA20_CLK_TWD },
+        { .con_id = "audio", .dt_id = TEGRA20_CLK_AUDIO },
+        { .con_id = "audio_2x", .dt_id = TEGRA20_CLK_AUDIO_2X },
+        { .dev_id = "tegra20-ac97", .dt_id = TEGRA20_CLK_AC97 },
+        { .dev_id = "tegra-apbdma", .dt_id = TEGRA20_CLK_APBDMA },
+        { .dev_id = "rtc-tegra", .dt_id = TEGRA20_CLK_RTC },
+        { .dev_id = "timer", .dt_id = TEGRA20_CLK_TIMER },
+        { .dev_id = "tegra-kbc", .dt_id = TEGRA20_CLK_KBC },
+        { .con_id = "csus", .dev_id =  "tegra_camera", .dt_id = TEGRA20_CLK_CSUS },
+        { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_VCP },
+        { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_BSEA },
+        { .con_id = "bsev", .dev_id = "tegra-aes", .dt_id = TEGRA20_CLK_BSEV },
+        { .con_id = "emc", .dt_id = TEGRA20_CLK_EMC },
+        { .dev_id = "fsl-tegra-udc", .dt_id = TEGRA20_CLK_USBD },
+        { .dev_id = "tegra-ehci.1", .dt_id = TEGRA20_CLK_USB2 },
+        { .dev_id = "tegra-ehci.2", .dt_id = TEGRA20_CLK_USB3 },
+        { .dev_id = "dsi", .dt_id = TEGRA20_CLK_DSI },
+        { .con_id = "csi", .dev_id = "tegra_camera", .dt_id = TEGRA20_CLK_CSI },
+        { .con_id = "isp", .dev_id = "tegra_camera", .dt_id = TEGRA20_CLK_ISP },
+        { .con_id = "pex", .dt_id = TEGRA20_CLK_PEX },
+        { .con_id = "afi", .dt_id = TEGRA20_CLK_AFI },
+        { .con_id = "cdev1", .dt_id = TEGRA20_CLK_CDEV1 },
+        { .con_id = "cdev2", .dt_id = TEGRA20_CLK_CDEV2 },
+        { .con_id = "clk_32k", .dt_id = TEGRA20_CLK_CLK_32K },
+        { .con_id = "blink", .dt_id = TEGRA20_CLK_BLINK },
+        { .con_id = "clk_m", .dt_id = TEGRA20_CLK_CLK_M },
+        { .con_id = "pll_ref", .dt_id = TEGRA20_CLK_PLL_REF },
+        { .dev_id = "tegra20-i2s.0", .dt_id = TEGRA20_CLK_I2S1 },
+        { .dev_id = "tegra20-i2s.1", .dt_id = TEGRA20_CLK_I2S2 },
+        { .con_id = "spdif_out", .dev_id = "tegra20-spdif", .dt_id = TEGRA20_CLK_SPDIF_OUT },
+        { .con_id = "spdif_in", .dev_id = "tegra20-spdif", .dt_id = TEGRA20_CLK_SPDIF_IN },
+        { .dev_id = "spi_tegra.0", .dt_id = TEGRA20_CLK_SBC1 },
+        { .dev_id = "spi_tegra.1", .dt_id = TEGRA20_CLK_SBC2 },
+        { .dev_id = "spi_tegra.2", .dt_id = TEGRA20_CLK_SBC3 },
+        { .dev_id = "spi_tegra.3", .dt_id = TEGRA20_CLK_SBC4 },
+        { .dev_id = "spi", .dt_id = TEGRA20_CLK_SPI },
+        { .dev_id = "xio", .dt_id = TEGRA20_CLK_XIO },
+        { .dev_id = "twc", .dt_id = TEGRA20_CLK_TWC },
+        { .dev_id = "ide", .dt_id = TEGRA20_CLK_IDE },
+        { .dev_id = "tegra_nand", .dt_id = TEGRA20_CLK_NDFLASH },
+        { .dev_id = "vfir", .dt_id = TEGRA20_CLK_VFIR },
+        { .dev_id = "csite", .dt_id = TEGRA20_CLK_CSITE },
+        { .dev_id = "la", .dt_id = TEGRA20_CLK_LA },
+        { .dev_id = "tegra_w1", .dt_id = TEGRA20_CLK_OWR },
+        { .dev_id = "mipi", .dt_id = TEGRA20_CLK_MIPI },
+        { .dev_id = "vde", .dt_id = TEGRA20_CLK_VDE },
+        { .con_id = "vi", .dev_id =  "tegra_camera", .dt_id = TEGRA20_CLK_VI },
+        { .dev_id = "epp", .dt_id = TEGRA20_CLK_EPP },
+        { .dev_id = "mpe", .dt_id = TEGRA20_CLK_MPE },
+        { .dev_id = "host1x", .dt_id = TEGRA20_CLK_HOST1X },
+        { .dev_id = "3d", .dt_id = TEGRA20_CLK_GR3D },
+        { .dev_id = "2d", .dt_id = TEGRA20_CLK_GR2D },
+        { .dev_id = "tegra-nor", .dt_id = TEGRA20_CLK_NOR },
+        { .dev_id = "sdhci-tegra.0", .dt_id = TEGRA20_CLK_SDMMC1 },
+        { .dev_id = "sdhci-tegra.1", .dt_id = TEGRA20_CLK_SDMMC2 },
+        { .dev_id = "sdhci-tegra.2", .dt_id = TEGRA20_CLK_SDMMC3 },
+        { .dev_id = "sdhci-tegra.3", .dt_id = TEGRA20_CLK_SDMMC4 },
+        { .dev_id = "cve", .dt_id = TEGRA20_CLK_CVE },
+        { .dev_id = "tvo", .dt_id = TEGRA20_CLK_TVO },
+        { .dev_id = "tvdac", .dt_id = TEGRA20_CLK_TVDAC },
+        { .con_id = "vi_sensor", .dev_id = "tegra_camera", .dt_id = TEGRA20_CLK_VI_SENSOR },
+        { .dev_id = "hdmi", .dt_id = TEGRA20_CLK_HDMI },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.0", .dt_id = TEGRA20_CLK_I2C1 },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.1", .dt_id = TEGRA20_CLK_I2C2 },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.2", .dt_id = TEGRA20_CLK_I2C3 },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.3", .dt_id = TEGRA20_CLK_DVC },
+        { .dev_id = "tegra-pwm", .dt_id = TEGRA20_CLK_PWM },
+        { .dev_id = "tegra_uart.0", .dt_id = TEGRA20_CLK_UARTA },
+        { .dev_id = "tegra_uart.1", .dt_id = TEGRA20_CLK_UARTB },
+        { .dev_id = "tegra_uart.2", .dt_id = TEGRA20_CLK_UARTC },
+        { .dev_id = "tegra_uart.3", .dt_id = TEGRA20_CLK_UARTD },
+        { .dev_id = "tegra_uart.4", .dt_id = TEGRA20_CLK_UARTE },
+        { .dev_id = "tegradc.0", .dt_id = TEGRA20_CLK_DISP1 },
+        { .dev_id = "tegradc.1", .dt_id = TEGRA20_CLK_DISP2 },
 };
 
-static struct tegra_clk_periph_regs periph_u_regs = {
-        .enb_reg = CLK_OUT_ENB_U,
-        .enb_set_reg = CLK_OUT_ENB_SET_U,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_U,
-        .rst_reg = RST_DEVICES_U,
-        .rst_set_reg = RST_DEVICES_SET_U,
-        .rst_clr_reg = RST_DEVICES_CLR_U,
+static struct tegra_clk tegra20_clks[tegra_clk_max] __initdata = {
+        [tegra_clk_spdif_out] = { .dt_id = TEGRA20_CLK_SPDIF_OUT, .present = true },
+        [tegra_clk_spdif_in] = { .dt_id = TEGRA20_CLK_SPDIF_IN, .present = true },
+        [tegra_clk_sdmmc1] = { .dt_id = TEGRA20_CLK_SDMMC1, .present = true },
+        [tegra_clk_sdmmc2] = { .dt_id = TEGRA20_CLK_SDMMC2, .present = true },
+        [tegra_clk_sdmmc3] = { .dt_id = TEGRA20_CLK_SDMMC3, .present = true },
+        [tegra_clk_sdmmc4] = { .dt_id = TEGRA20_CLK_SDMMC4, .present = true },
+        [tegra_clk_la] = { .dt_id = TEGRA20_CLK_LA, .present = true },
+        [tegra_clk_csite] = { .dt_id = TEGRA20_CLK_CSITE, .present = true },
+        [tegra_clk_vfir] = { .dt_id = TEGRA20_CLK_VFIR, .present = true },
+        [tegra_clk_mipi] = { .dt_id = TEGRA20_CLK_MIPI, .present = true },
+        [tegra_clk_nor] = { .dt_id = TEGRA20_CLK_NOR, .present = true },
+        [tegra_clk_rtc] = { .dt_id = TEGRA20_CLK_RTC, .present = true },
+        [tegra_clk_timer] = { .dt_id = TEGRA20_CLK_TIMER, .present = true },
+        [tegra_clk_kbc] = { .dt_id = TEGRA20_CLK_KBC, .present = true },
+        [tegra_clk_csus] = { .dt_id = TEGRA20_CLK_CSUS, .present = true },
+        [tegra_clk_vcp] = { .dt_id = TEGRA20_CLK_VCP, .present = true },
+        [tegra_clk_bsea] = { .dt_id = TEGRA20_CLK_BSEA, .present = true },
+        [tegra_clk_bsev] = { .dt_id = TEGRA20_CLK_BSEV, .present = true },
+        [tegra_clk_usbd] = { .dt_id = TEGRA20_CLK_USBD, .present = true },
+        [tegra_clk_usb2] = { .dt_id = TEGRA20_CLK_USB2, .present = true },
+        [tegra_clk_usb3] = { .dt_id = TEGRA20_CLK_USB3, .present = true },
+        [tegra_clk_csi] = { .dt_id = TEGRA20_CLK_CSI, .present = true },
+        [tegra_clk_isp] = { .dt_id = TEGRA20_CLK_ISP, .present = true },
+        [tegra_clk_clk_32k] = { .dt_id = TEGRA20_CLK_CLK_32K, .present = true },
+        [tegra_clk_blink] = { .dt_id = TEGRA20_CLK_BLINK, .present = true },
+        [tegra_clk_hclk] = { .dt_id = TEGRA20_CLK_HCLK, .present = true },
+        [tegra_clk_pclk] = { .dt_id = TEGRA20_CLK_PCLK, .present = true },
+        [tegra_clk_pll_p_out1] = { .dt_id = TEGRA20_CLK_PLL_P_OUT1, .present = true },
+        [tegra_clk_pll_p_out2] = { .dt_id = TEGRA20_CLK_PLL_P_OUT2, .present = true },
+        [tegra_clk_pll_p_out3] = { .dt_id = TEGRA20_CLK_PLL_P_OUT3, .present = true },
+        [tegra_clk_pll_p_out4] = { .dt_id = TEGRA20_CLK_PLL_P_OUT4, .present = true },
+        [tegra_clk_pll_p] = { .dt_id = TEGRA20_CLK_PLL_P, .present = true },
+        [tegra_clk_owr] = { .dt_id = TEGRA20_CLK_OWR, .present = true },
+        [tegra_clk_sbc1] = { .dt_id = TEGRA20_CLK_SBC1, .present = true },
+        [tegra_clk_sbc2] = { .dt_id = TEGRA20_CLK_SBC2, .present = true },
+        [tegra_clk_sbc3] = { .dt_id = TEGRA20_CLK_SBC3, .present = true },
+        [tegra_clk_sbc4] = { .dt_id = TEGRA20_CLK_SBC4, .present = true },
+        [tegra_clk_vde] = { .dt_id = TEGRA20_CLK_VDE, .present = true },
+        [tegra_clk_vi] = { .dt_id = TEGRA20_CLK_VI, .present = true },
+        [tegra_clk_epp] = { .dt_id = TEGRA20_CLK_EPP, .present = true },
+        [tegra_clk_mpe] = { .dt_id = TEGRA20_CLK_MPE, .present = true },
+        [tegra_clk_host1x] = { .dt_id = TEGRA20_CLK_HOST1X, .present = true },
+        [tegra_clk_gr2d] = { .dt_id = TEGRA20_CLK_GR2D, .present = true },
+        [tegra_clk_gr3d] = { .dt_id = TEGRA20_CLK_GR3D, .present = true },
+        [tegra_clk_ndflash] = { .dt_id = TEGRA20_CLK_NDFLASH, .present = true },
+        [tegra_clk_cve] = { .dt_id = TEGRA20_CLK_CVE, .present = true },
+        [tegra_clk_tvo] = { .dt_id = TEGRA20_CLK_TVO, .present = true },
+        [tegra_clk_tvdac] = { .dt_id = TEGRA20_CLK_TVDAC, .present = true },
+        [tegra_clk_vi_sensor] = { .dt_id = TEGRA20_CLK_VI_SENSOR, .present = true },
+        [tegra_clk_afi] = { .dt_id = TEGRA20_CLK_AFI, .present = true },
 };
 
 static unsigned long tegra20_clk_measure_input_freq(void)
@@ -577,10 +635,8 @@ static void tegra20_pll_init(void)
 
         /* PLLC */
         clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0,
-                            0, &pll_c_params, TEGRA_PLL_HAS_CPCON,
-                            pll_c_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_c", NULL);
-        clks[pll_c] = clk;
+                            &pll_c_params, NULL);
+        clks[TEGRA20_CLK_PLL_C] = clk;
 
         /* PLLC_OUT1 */
         clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",
@@ -589,71 +645,13 @@ static void tegra20_pll_init(void)
         clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",
                                 clk_base + PLLC_OUT, 1, 0, CLK_SET_RATE_PARENT,
                                 0, NULL);
-        clk_register_clkdev(clk, "pll_c_out1", NULL);
-        clks[pll_c_out1] = clk;
-
-        /* PLLP */
-        clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base, NULL, 0,
-                            216000000, &pll_p_params, TEGRA_PLL_FIXED |
-                            TEGRA_PLL_HAS_CPCON, pll_p_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_p", NULL);
-        clks[pll_p] = clk;
-
-        /* PLLP_OUT1 */
-        clk = tegra_clk_register_divider("pll_p_out1_div", "pll_p",
-                                clk_base + PLLP_OUTA, 0,
-                                TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP,
-                                8, 8, 1, &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out1", "pll_p_out1_div",
-                                clk_base + PLLP_OUTA, 1, 0,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out1", NULL);
-        clks[pll_p_out1] = clk;
-
-        /* PLLP_OUT2 */
-        clk = tegra_clk_register_divider("pll_p_out2_div", "pll_p",
-                                clk_base + PLLP_OUTA, 0,
-                                TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP,
-                                24, 8, 1, &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out2", "pll_p_out2_div",
-                                clk_base + PLLP_OUTA, 17, 16,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out2", NULL);
-        clks[pll_p_out2] = clk;
-
-        /* PLLP_OUT3 */
-        clk = tegra_clk_register_divider("pll_p_out3_div", "pll_p",
-                                clk_base + PLLP_OUTB, 0,
-                                TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP,
-                                8, 8, 1, &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out3", "pll_p_out3_div",
-                                clk_base + PLLP_OUTB, 1, 0,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out3", NULL);
-        clks[pll_p_out3] = clk;
-
-        /* PLLP_OUT4 */
-        clk = tegra_clk_register_divider("pll_p_out4_div", "pll_p",
-                                clk_base + PLLP_OUTB, 0,
-                                TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP,
-                                24, 8, 1, &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out4", "pll_p_out4_div",
-                                clk_base + PLLP_OUTB, 17, 16,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out4", NULL);
-        clks[pll_p_out4] = clk;
+        clks[TEGRA20_CLK_PLL_C_OUT1] = clk;
 
         /* PLLM */
         clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, NULL,
-                            CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE, 0,
-                            &pll_m_params, TEGRA_PLL_HAS_CPCON,
-                            pll_m_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_m", NULL);
-        clks[pll_m] = clk;
+                            CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
+                            &pll_m_params, NULL);
+        clks[TEGRA20_CLK_PLL_M] = clk;
 
         /* PLLM_OUT1 */
         clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",
@@ -662,42 +660,32 @@ static void tegra20_pll_init(void)
         clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",
                                 clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED |
                                 CLK_SET_RATE_PARENT, 0, NULL);
-        clk_register_clkdev(clk, "pll_m_out1", NULL);
-        clks[pll_m_out1] = clk;
+        clks[TEGRA20_CLK_PLL_M_OUT1] = clk;
 
         /* PLLX */
         clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, NULL, 0,
-                            0, &pll_x_params, TEGRA_PLL_HAS_CPCON,
-                            pll_x_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_x", NULL);
-        clks[pll_x] = clk;
+                            &pll_x_params, NULL);
+        clks[TEGRA20_CLK_PLL_X] = clk;
 
         /* PLLU */
         clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, NULL, 0,
-                            0, &pll_u_params, TEGRA_PLLU | TEGRA_PLL_HAS_CPCON,
-                            pll_u_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_u", NULL);
-        clks[pll_u] = clk;
+                            &pll_u_params, NULL);
+        clks[TEGRA20_CLK_PLL_U] = clk;
 
         /* PLLD */
         clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, NULL, 0,
-                            0, &pll_d_params, TEGRA_PLL_HAS_CPCON,
-                            pll_d_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_d", NULL);
-        clks[pll_d] = clk;
+                            &pll_d_params, NULL);
+        clks[TEGRA20_CLK_PLL_D] = clk;
 
         /* PLLD_OUT0 */
         clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "pll_d_out0", NULL);
-        clks[pll_d_out0] = clk;
+        clks[TEGRA20_CLK_PLL_D_OUT0] = clk;
 
         /* PLLA */
         clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base, NULL, 0,
-                            0, &pll_a_params, TEGRA_PLL_HAS_CPCON,
-                            pll_a_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_a", NULL);
-        clks[pll_a] = clk;
+                            &pll_a_params, NULL);
+        clks[TEGRA20_CLK_PLL_A] = clk;
 
         /* PLLA_OUT0 */
         clk = tegra_clk_register_divider("pll_a_out0_div", "pll_a",
@@ -706,15 +694,12 @@ static void tegra20_pll_init(void)
         clk = tegra_clk_register_pll_out("pll_a_out0", "pll_a_out0_div",
                                 clk_base + PLLA_OUT, 1, 0, CLK_IGNORE_UNUSED |
                                 CLK_SET_RATE_PARENT, 0, NULL);
-        clk_register_clkdev(clk, "pll_a_out0", NULL);
-        clks[pll_a_out0] = clk;
+        clks[TEGRA20_CLK_PLL_A_OUT0] = clk;
 
         /* PLLE */
         clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base,
-                             0, 100000000, &pll_e_params,
-                             0, pll_e_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_e", NULL);
-        clks[pll_e] = clk;
+                             0, &pll_e_params, NULL);
+        clks[TEGRA20_CLK_PLL_E] = clk;
 }
 
 static const char *cclk_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
@@ -732,40 +717,17 @@ static void tegra20_super_clk_init(void)
         clk = tegra_clk_register_super_mux("cclk", cclk_parents,
                               ARRAY_SIZE(cclk_parents), CLK_SET_RATE_PARENT,
                               clk_base + CCLK_BURST_POLICY, 0, 4, 0, 0, NULL);
-        clk_register_clkdev(clk, "cclk", NULL);
-        clks[cclk] = clk;
+        clks[TEGRA20_CLK_CCLK] = clk;
 
         /* SCLK */
         clk = tegra_clk_register_super_mux("sclk", sclk_parents,
                               ARRAY_SIZE(sclk_parents), CLK_SET_RATE_PARENT,
                               clk_base + SCLK_BURST_POLICY, 0, 4, 0, 0, NULL);
-        clk_register_clkdev(clk, "sclk", NULL);
-        clks[sclk] = clk;
-
-        /* HCLK */
-        clk = clk_register_divider(NULL, "hclk_div", "sclk", 0,
-                                   clk_base + CLK_SYSTEM_RATE, 4, 2, 0,
-                                   &sysrate_lock);
-        clk = clk_register_gate(NULL, "hclk", "hclk_div", CLK_SET_RATE_PARENT,
-                                clk_base + CLK_SYSTEM_RATE, 7,
-                                CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
-        clk_register_clkdev(clk, "hclk", NULL);
-        clks[hclk] = clk;
-
-        /* PCLK */
-        clk = clk_register_divider(NULL, "pclk_div", "hclk", 0,
-                                   clk_base + CLK_SYSTEM_RATE, 0, 2, 0,
-                                   &sysrate_lock);
-        clk = clk_register_gate(NULL, "pclk", "pclk_div", CLK_SET_RATE_PARENT,
-                                clk_base + CLK_SYSTEM_RATE, 3,
-                                CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
-        clk_register_clkdev(clk, "pclk", NULL);
-        clks[pclk] = clk;
+        clks[TEGRA20_CLK_SCLK] = clk;
 
         /* twd */
         clk = clk_register_fixed_factor(NULL, "twd", "cclk", 0, 1, 4);
-        clk_register_clkdev(clk, "twd", NULL);
-        clks[twd] = clk;
+        clks[TEGRA20_CLK_TWD] = clk;
 }
 
 static const char *audio_parents[] = {"spdif_in", "i2s1", "i2s2", "unused",
@@ -784,18 +746,16 @@ static void __init tegra20_audio_clk_init(void)
         clk = clk_register_gate(NULL, "audio", "audio_mux", 0,
                                 clk_base + AUDIO_SYNC_CLK, 4,
                                 CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio", NULL);
-        clks[audio] = clk;
+        clks[TEGRA20_CLK_AUDIO] = clk;
 
         /* audio_2x */
         clk = clk_register_fixed_factor(NULL, "audio_doubler", "audio",
                                         CLK_SET_RATE_PARENT, 2, 1);
         clk = tegra_clk_register_periph_gate("audio_2x", "audio_doubler",
                                     TEGRA_PERIPH_NO_RESET, clk_base,
-                                    CLK_SET_RATE_PARENT, 89, &periph_u_regs,
+                                    CLK_SET_RATE_PARENT, 89,
                                     periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio_2x", NULL);
-        clks[audio_2x] = clk;
+        clks[TEGRA20_CLK_AUDIO_2X] = clk;
 
 }
 
@@ -803,68 +763,36 @@ static const char *i2s1_parents[] = {"pll_a_out0", "audio_2x", "pll_p",
                                      "clk_m"};
 static const char *i2s2_parents[] = {"pll_a_out0", "audio_2x", "pll_p",
                                      "clk_m"};
-static const char *spdif_out_parents[] = {"pll_a_out0", "audio_2x", "pll_p",
-                                          "clk_m"};
-static const char *spdif_in_parents[] = {"pll_p", "pll_c", "pll_m"};
 static const char *pwm_parents[] = {"pll_p", "pll_c", "audio", "clk_m",
                                     "clk_32k"};
 static const char *mux_pllpcm_clkm[] = {"pll_p", "pll_c", "pll_m", "clk_m"};
-static const char *mux_pllmcpa[] = {"pll_m", "pll_c", "pll_c", "pll_a"};
 static const char *mux_pllpdc_clkm[] = {"pll_p", "pll_d_out0", "pll_c",
                                         "clk_m"};
 static const char *mux_pllmcp_clkm[] = {"pll_m", "pll_c", "pll_p", "clk_m"};
 
 static struct tegra_periph_init_data tegra_periph_clk_list[] = {
-        TEGRA_INIT_DATA_MUX("i2s1",     NULL,           "tegra20-i2s.0", i2s1_parents,      CLK_SOURCE_I2S1,      11,   &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s1),
-        TEGRA_INIT_DATA_MUX("i2s2",     NULL,           "tegra20-i2s.1", i2s2_parents,      CLK_SOURCE_I2S2,      18,   &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s2),
-        TEGRA_INIT_DATA_MUX("spdif_out", "spdif_out",   "tegra20-spdif", spdif_out_parents, CLK_SOURCE_SPDIF_OUT, 10,   &periph_l_regs, TEGRA_PERIPH_ON_APB, spdif_out),
-        TEGRA_INIT_DATA_MUX("spdif_in", "spdif_in",     "tegra20-spdif", spdif_in_parents,  CLK_SOURCE_SPDIF_IN,  10,   &periph_l_regs, TEGRA_PERIPH_ON_APB, spdif_in),
-        TEGRA_INIT_DATA_MUX("sbc1",     NULL,           "spi_tegra.0",   mux_pllpcm_clkm,   CLK_SOURCE_SBC1,      41,   &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc1),
-        TEGRA_INIT_DATA_MUX("sbc2",     NULL,           "spi_tegra.1",   mux_pllpcm_clkm,   CLK_SOURCE_SBC2,      44,   &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc2),
-        TEGRA_INIT_DATA_MUX("sbc3",     NULL,           "spi_tegra.2",   mux_pllpcm_clkm,   CLK_SOURCE_SBC3,      46,   &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc3),
-        TEGRA_INIT_DATA_MUX("sbc4",     NULL,           "spi_tegra.3",   mux_pllpcm_clkm,   CLK_SOURCE_SBC4,      68,   &periph_u_regs, TEGRA_PERIPH_ON_APB, sbc4),
-        TEGRA_INIT_DATA_MUX("spi",      NULL,           "spi",           mux_pllpcm_clkm,   CLK_SOURCE_SPI,       43,   &periph_h_regs, TEGRA_PERIPH_ON_APB, spi),
-        TEGRA_INIT_DATA_MUX("xio",      NULL,           "xio",           mux_pllpcm_clkm,   CLK_SOURCE_XIO,       45,   &periph_h_regs, 0, xio),
-        TEGRA_INIT_DATA_MUX("twc",      NULL,           "twc",           mux_pllpcm_clkm,   CLK_SOURCE_TWC,       16,   &periph_l_regs, TEGRA_PERIPH_ON_APB, twc),
-        TEGRA_INIT_DATA_MUX("ide",      NULL,           "ide",           mux_pllpcm_clkm,   CLK_SOURCE_XIO,       25,   &periph_l_regs, 0, ide),
-        TEGRA_INIT_DATA_MUX("ndflash",  NULL,           "tegra_nand",    mux_pllpcm_clkm,   CLK_SOURCE_NDFLASH,   13,   &periph_l_regs, 0, ndflash),
-        TEGRA_INIT_DATA_MUX("vfir",     NULL,           "vfir",          mux_pllpcm_clkm,   CLK_SOURCE_VFIR,      7,    &periph_l_regs, TEGRA_PERIPH_ON_APB, vfir),
-        TEGRA_INIT_DATA_MUX("csite",    NULL,           "csite",         mux_pllpcm_clkm,   CLK_SOURCE_CSITE,     73,   &periph_u_regs, 0, csite),
-        TEGRA_INIT_DATA_MUX("la",       NULL,           "la",            mux_pllpcm_clkm,   CLK_SOURCE_LA,        76,   &periph_u_regs, 0, la),
-        TEGRA_INIT_DATA_MUX("owr",      NULL,           "tegra_w1",      mux_pllpcm_clkm,   CLK_SOURCE_OWR,       71,   &periph_u_regs, TEGRA_PERIPH_ON_APB, owr),
-        TEGRA_INIT_DATA_MUX("mipi",     NULL,           "mipi",          mux_pllpcm_clkm,   CLK_SOURCE_MIPI,      50,   &periph_h_regs, TEGRA_PERIPH_ON_APB, mipi),
-        TEGRA_INIT_DATA_MUX("vde",      NULL,           "vde",           mux_pllpcm_clkm,   CLK_SOURCE_VDE,       61,   &periph_h_regs, 0, vde),
-        TEGRA_INIT_DATA_MUX("vi",       "vi",           "tegra_camera",  mux_pllmcpa,       CLK_SOURCE_VI,        20,   &periph_l_regs, 0, vi),
-        TEGRA_INIT_DATA_MUX("epp",      NULL,           "epp",           mux_pllmcpa,       CLK_SOURCE_EPP,       19,   &periph_l_regs, 0, epp),
-        TEGRA_INIT_DATA_MUX("mpe",      NULL,           "mpe",           mux_pllmcpa,       CLK_SOURCE_MPE,       60,   &periph_h_regs, 0, mpe),
-        TEGRA_INIT_DATA_MUX("host1x",   NULL,           "host1x",        mux_pllmcpa,       CLK_SOURCE_HOST1X,    28,   &periph_l_regs, 0, host1x),
-        TEGRA_INIT_DATA_MUX("3d",       NULL,           "3d",            mux_pllmcpa,       CLK_SOURCE_3D,        24,   &periph_l_regs, TEGRA_PERIPH_MANUAL_RESET, gr3d),
-        TEGRA_INIT_DATA_MUX("2d",       NULL,           "2d",            mux_pllmcpa,       CLK_SOURCE_2D,        21,   &periph_l_regs, 0, gr2d),
-        TEGRA_INIT_DATA_MUX("nor",      NULL,           "tegra-nor",     mux_pllpcm_clkm,   CLK_SOURCE_NOR,       42,   &periph_h_regs, 0, nor),
-        TEGRA_INIT_DATA_MUX("sdmmc1",   NULL,           "sdhci-tegra.0", mux_pllpcm_clkm,   CLK_SOURCE_SDMMC1,    14,   &periph_l_regs, 0, sdmmc1),
-        TEGRA_INIT_DATA_MUX("sdmmc2",   NULL,           "sdhci-tegra.1", mux_pllpcm_clkm,   CLK_SOURCE_SDMMC2,    9,    &periph_l_regs, 0, sdmmc2),
-        TEGRA_INIT_DATA_MUX("sdmmc3",   NULL,           "sdhci-tegra.2", mux_pllpcm_clkm,   CLK_SOURCE_SDMMC3,    69,   &periph_u_regs, 0, sdmmc3),
-        TEGRA_INIT_DATA_MUX("sdmmc4",   NULL,           "sdhci-tegra.3", mux_pllpcm_clkm,   CLK_SOURCE_SDMMC4,    15,   &periph_l_regs, 0, sdmmc4),
-        TEGRA_INIT_DATA_MUX("cve",      NULL,           "cve",           mux_pllpdc_clkm,   CLK_SOURCE_CVE,       49,   &periph_h_regs, 0, cve),
-        TEGRA_INIT_DATA_MUX("tvo",      NULL,           "tvo",           mux_pllpdc_clkm,   CLK_SOURCE_TVO,       49,   &periph_h_regs, 0, tvo),
-        TEGRA_INIT_DATA_MUX("tvdac",    NULL,           "tvdac",         mux_pllpdc_clkm,   CLK_SOURCE_TVDAC,     53,   &periph_h_regs, 0, tvdac),
-        TEGRA_INIT_DATA_MUX("vi_sensor", "vi_sensor",   "tegra_camera",  mux_pllmcpa,       CLK_SOURCE_VI_SENSOR, 20,   &periph_l_regs, TEGRA_PERIPH_NO_RESET, vi_sensor),
-        TEGRA_INIT_DATA_DIV16("i2c1",   "div-clk",      "tegra-i2c.0",   mux_pllpcm_clkm,   CLK_SOURCE_I2C1,      12,   &periph_l_regs, TEGRA_PERIPH_ON_APB, i2c1),
-        TEGRA_INIT_DATA_DIV16("i2c2",   "div-clk",      "tegra-i2c.1",   mux_pllpcm_clkm,   CLK_SOURCE_I2C2,      54,   &periph_h_regs, TEGRA_PERIPH_ON_APB, i2c2),
-        TEGRA_INIT_DATA_DIV16("i2c3",   "div-clk",      "tegra-i2c.2",   mux_pllpcm_clkm,   CLK_SOURCE_I2C3,      67,   &periph_u_regs, TEGRA_PERIPH_ON_APB, i2c3),
-        TEGRA_INIT_DATA_DIV16("dvc",    "div-clk",      "tegra-i2c.3",   mux_pllpcm_clkm,   CLK_SOURCE_DVC,       47,   &periph_h_regs, TEGRA_PERIPH_ON_APB, dvc),
-        TEGRA_INIT_DATA_MUX("hdmi",     NULL,           "hdmi",          mux_pllpdc_clkm,   CLK_SOURCE_HDMI,      51,   &periph_h_regs, 0, hdmi),
-        TEGRA_INIT_DATA("pwm",          NULL,           "tegra-pwm",     pwm_parents,       CLK_SOURCE_PWM,       28, 3, 0, 0, 8, 1, 0, &periph_l_regs, 17, periph_clk_enb_refcnt, TEGRA_PERIPH_ON_APB, pwm),
+        TEGRA_INIT_DATA_MUX("i2s1", i2s1_parents,     CLK_SOURCE_I2S1,   11, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_I2S1),
+        TEGRA_INIT_DATA_MUX("i2s2", i2s2_parents,     CLK_SOURCE_I2S2,   18, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_I2S2),
+        TEGRA_INIT_DATA_MUX("spi",   mux_pllpcm_clkm,   CLK_SOURCE_SPI,   43, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_SPI),
+        TEGRA_INIT_DATA_MUX("xio",   mux_pllpcm_clkm,   CLK_SOURCE_XIO,   45, 0, TEGRA20_CLK_XIO),
+        TEGRA_INIT_DATA_MUX("twc",   mux_pllpcm_clkm,   CLK_SOURCE_TWC,   16, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_TWC),
+        TEGRA_INIT_DATA_MUX("ide",   mux_pllpcm_clkm,   CLK_SOURCE_XIO,   25, 0, TEGRA20_CLK_IDE),
+        TEGRA_INIT_DATA_DIV16("dvc", mux_pllpcm_clkm,   CLK_SOURCE_DVC,   47, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_DVC),
+        TEGRA_INIT_DATA_DIV16("i2c1", mux_pllpcm_clkm,   CLK_SOURCE_I2C1,   12, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_I2C1),
+        TEGRA_INIT_DATA_DIV16("i2c2", mux_pllpcm_clkm,   CLK_SOURCE_I2C2,   54, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_I2C2),
+        TEGRA_INIT_DATA_DIV16("i2c3", mux_pllpcm_clkm,   CLK_SOURCE_I2C3,   67, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_I2C3),
+        TEGRA_INIT_DATA_MUX("hdmi", mux_pllpdc_clkm,   CLK_SOURCE_HDMI,   51, 0, TEGRA20_CLK_HDMI),
+        TEGRA_INIT_DATA("pwm", NULL, NULL, pwm_parents,     CLK_SOURCE_PWM,   28, 3, 0, 0, 8, 1, 0, 17, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_PWM),
 };
 
 static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
-        TEGRA_INIT_DATA_NODIV("uarta",  NULL, "tegra_uart.0", mux_pllpcm_clkm, CLK_SOURCE_UARTA, 30, 2, 6,  &periph_l_regs, TEGRA_PERIPH_ON_APB, uarta),
-        TEGRA_INIT_DATA_NODIV("uartb",  NULL, "tegra_uart.1", mux_pllpcm_clkm, CLK_SOURCE_UARTB, 30, 2, 7,  &periph_l_regs, TEGRA_PERIPH_ON_APB, uartb),
-        TEGRA_INIT_DATA_NODIV("uartc",  NULL, "tegra_uart.2", mux_pllpcm_clkm, CLK_SOURCE_UARTC, 30, 2, 55, &periph_h_regs, TEGRA_PERIPH_ON_APB, uartc),
-        TEGRA_INIT_DATA_NODIV("uartd",  NULL, "tegra_uart.3", mux_pllpcm_clkm, CLK_SOURCE_UARTD, 30, 2, 65, &periph_u_regs, TEGRA_PERIPH_ON_APB, uartd),
-        TEGRA_INIT_DATA_NODIV("uarte",  NULL, "tegra_uart.4", mux_pllpcm_clkm, CLK_SOURCE_UARTE, 30, 2, 66, &periph_u_regs, TEGRA_PERIPH_ON_APB, uarte),
-        TEGRA_INIT_DATA_NODIV("disp1",  NULL, "tegradc.0",    mux_pllpdc_clkm, CLK_SOURCE_DISP1, 30, 2, 27, &periph_l_regs, 0, disp1),
-        TEGRA_INIT_DATA_NODIV("disp2",  NULL, "tegradc.1",    mux_pllpdc_clkm, CLK_SOURCE_DISP2, 30, 2, 26, &periph_l_regs, 0, disp2),
+        TEGRA_INIT_DATA_NODIV("uarta",  mux_pllpcm_clkm, CLK_SOURCE_UARTA, 30, 2, 6,   TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTA),
+        TEGRA_INIT_DATA_NODIV("uartb",  mux_pllpcm_clkm, CLK_SOURCE_UARTB, 30, 2, 7,   TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTB),
+        TEGRA_INIT_DATA_NODIV("uartc",  mux_pllpcm_clkm, CLK_SOURCE_UARTC, 30, 2, 55,  TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTC),
+        TEGRA_INIT_DATA_NODIV("uartd",  mux_pllpcm_clkm, CLK_SOURCE_UARTD, 30, 2, 65,  TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTD),
+        TEGRA_INIT_DATA_NODIV("uarte",  mux_pllpcm_clkm, CLK_SOURCE_UARTE, 30, 2, 66,  TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTE),
+        TEGRA_INIT_DATA_NODIV("disp1",  mux_pllpdc_clkm, CLK_SOURCE_DISP1, 30, 2, 27,  0, TEGRA20_CLK_DISP1),
+        TEGRA_INIT_DATA_NODIV("disp2",  mux_pllpdc_clkm, CLK_SOURCE_DISP2, 30, 2, 26,  0, TEGRA20_CLK_DISP2),
 };
 
 static void __init tegra20_periph_clk_init(void)
@@ -876,69 +804,13 @@ static void __init tegra20_periph_clk_init(void)
         /* ac97 */
         clk = tegra_clk_register_periph_gate("ac97", "pll_a_out0",
                                     TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 3, &periph_l_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra20-ac97");
-        clks[ac97] = clk;
+                                    clk_base, 0, 3, periph_clk_enb_refcnt);
+        clks[TEGRA20_CLK_AC97] = clk;
 
         /* apbdma */
         clk = tegra_clk_register_periph_gate("apbdma", "pclk", 0, clk_base,
-                                    0, 34, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-apbdma");
-        clks[apbdma] = clk;
-
-        /* rtc */
-        clk = tegra_clk_register_periph_gate("rtc", "clk_32k",
-                                    TEGRA_PERIPH_NO_RESET,
-                                    clk_base, 0, 4, &periph_l_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "rtc-tegra");
-        clks[rtc] = clk;
-
-        /* timer */
-        clk = tegra_clk_register_periph_gate("timer", "clk_m", 0, clk_base,
-                                    0, 5, &periph_l_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "timer");
-        clks[timer] = clk;
-
-        /* kbc */
-        clk = tegra_clk_register_periph_gate("kbc", "clk_32k",
-                                    TEGRA_PERIPH_NO_RESET | TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 36, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-kbc");
-        clks[kbc] = clk;
-
-        /* csus */
-        clk = tegra_clk_register_periph_gate("csus", "clk_m",
-                                    TEGRA_PERIPH_NO_RESET,
-                                    clk_base, 0, 92, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "csus", "tengra_camera");
-        clks[csus] = clk;
-
-        /* vcp */
-        clk = tegra_clk_register_periph_gate("vcp", "clk_m", 0,
-                                    clk_base, 0, 29, &periph_l_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "vcp", "tegra-avp");
-        clks[vcp] = clk;
-
-        /* bsea */
-        clk = tegra_clk_register_periph_gate("bsea", "clk_m", 0,
-                                    clk_base, 0, 62, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "bsea", "tegra-avp");
-        clks[bsea] = clk;
-
-        /* bsev */
-        clk = tegra_clk_register_periph_gate("bsev", "clk_m", 0,
-                                    clk_base, 0, 63, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "bsev", "tegra-aes");
-        clks[bsev] = clk;
+                                    0, 34, periph_clk_enb_refcnt);
+        clks[TEGRA20_CLK_APBDMA] = clk;
 
         /* emc */
         clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
@@ -947,130 +819,52 @@ static void __init tegra20_periph_clk_init(void)
                                clk_base + CLK_SOURCE_EMC,
                                30, 2, 0, NULL);
         clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base, 0,
-                                    57, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "emc", NULL);
-        clks[emc] = clk;
-
-        /* usbd */
-        clk = tegra_clk_register_periph_gate("usbd", "clk_m", 0, clk_base, 0,
-                                    22, &periph_l_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "fsl-tegra-udc");
-        clks[usbd] = clk;
-
-        /* usb2 */
-        clk = tegra_clk_register_periph_gate("usb2", "clk_m", 0, clk_base, 0,
-                                    58, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-ehci.1");
-        clks[usb2] = clk;
-
-        /* usb3 */
-        clk = tegra_clk_register_periph_gate("usb3", "clk_m", 0, clk_base, 0,
-                                    59, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-ehci.2");
-        clks[usb3] = clk;
+                                    57, periph_clk_enb_refcnt);
+        clks[TEGRA20_CLK_EMC] = clk;
 
         /* dsi */
         clk = tegra_clk_register_periph_gate("dsi", "pll_d", 0, clk_base, 0,
-                                    48, &periph_h_regs, periph_clk_enb_refcnt);
+                                    48, periph_clk_enb_refcnt);
         clk_register_clkdev(clk, NULL, "dsi");
-        clks[dsi] = clk;
-
-        /* csi */
-        clk = tegra_clk_register_periph_gate("csi", "pll_p_out3", 0, clk_base,
-                                    0, 52, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "csi", "tegra_camera");
-        clks[csi] = clk;
-
-        /* isp */
-        clk = tegra_clk_register_periph_gate("isp", "clk_m", 0, clk_base, 0, 23,
-                                    &periph_l_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "isp", "tegra_camera");
-        clks[isp] = clk;
+        clks[TEGRA20_CLK_DSI] = clk;
 
         /* pex */
         clk = tegra_clk_register_periph_gate("pex", "clk_m", 0, clk_base, 0, 70,
-                                    &periph_u_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "pex", NULL);
-        clks[pex] = clk;
-
-        /* afi */
-        clk = tegra_clk_register_periph_gate("afi", "clk_m", 0, clk_base, 0, 72,
-                                    &periph_u_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "afi", NULL);
-        clks[afi] = clk;
-
-        /* pcie_xclk */
-        clk = tegra_clk_register_periph_gate("pcie_xclk", "clk_m", 0, clk_base,
-                                    0, 74, &periph_u_regs,
                                     periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "pcie_xclk", NULL);
-        clks[pcie_xclk] = clk;
+        clks[TEGRA20_CLK_PEX] = clk;
 
         /* cdev1 */
         clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, CLK_IS_ROOT,
                                       26000000);
         clk = tegra_clk_register_periph_gate("cdev1", "cdev1_fixed", 0,
-                                    clk_base, 0, 94, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "cdev1", NULL);
-        clks[cdev1] = clk;
+                                    clk_base, 0, 94, periph_clk_enb_refcnt);
+        clks[TEGRA20_CLK_CDEV1] = clk;
 
         /* cdev2 */
         clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, CLK_IS_ROOT,
                                       26000000);
         clk = tegra_clk_register_periph_gate("cdev2", "cdev2_fixed", 0,
-                                    clk_base, 0, 93, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "cdev2", NULL);
-        clks[cdev2] = clk;
+                                    clk_base, 0, 93, periph_clk_enb_refcnt);
+        clks[TEGRA20_CLK_CDEV2] = clk;
 
         for (i = 0; i < ARRAY_SIZE(tegra_periph_clk_list); i++) {
                 data = &tegra_periph_clk_list[i];
-                clk = tegra_clk_register_periph(data->name, data->parent_names,
+                clk = tegra_clk_register_periph(data->name, data->p.parent_names,
                                 data->num_parents, &data->periph,
                                 clk_base, data->offset, data->flags);
-                clk_register_clkdev(clk, data->con_id, data->dev_id);
                 clks[data->clk_id] = clk;
         }
 
         for (i = 0; i < ARRAY_SIZE(tegra_periph_nodiv_clk_list); i++) {
                 data = &tegra_periph_nodiv_clk_list[i];
                 clk = tegra_clk_register_periph_nodiv(data->name,
-                                        data->parent_names,
+                                        data->p.parent_names,
                                         data->num_parents, &data->periph,
                                         clk_base, data->offset);
-                clk_register_clkdev(clk, data->con_id, data->dev_id);
                 clks[data->clk_id] = clk;
         }
-}
-
-
-static void __init tegra20_fixed_clk_init(void)
-{
-        struct clk *clk;
-
-        /* clk_32k */
-        clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
-                                      32768);
-        clk_register_clkdev(clk, "clk_32k", NULL);
-        clks[clk_32k] = clk;
-}
-
-static void __init tegra20_pmc_clk_init(void)
-{
-        struct clk *clk;
 
-        /* blink */
-        writel_relaxed(0, pmc_base + PMC_BLINK_TIMER);
-        clk = clk_register_gate(NULL, "blink_override", "clk_32k", 0,
-                                pmc_base + PMC_DPD_PADS_ORIDE,
-                                PMC_DPD_PADS_ORIDE_BLINK_ENB, 0, NULL);
-        clk = clk_register_gate(NULL, "blink", "blink_override", 0,
-                                pmc_base + PMC_CTRL,
-                                PMC_CTRL_BLINK_ENB, 0, NULL);
-        clk_register_clkdev(clk, "blink", NULL);
-        clks[blink] = clk;
+        tegra_periph_clk_init(clk_base, pmc_base, tegra20_clks, &pll_p_params);
 }
 
 static void __init tegra20_osc_clk_init(void)
@@ -1084,15 +878,13 @@ static void __init tegra20_osc_clk_init(void)
         /* clk_m */
         clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT |
                                       CLK_IGNORE_UNUSED, input_freq);
-        clk_register_clkdev(clk, "clk_m", NULL);
-        clks[clk_m] = clk;
+        clks[TEGRA20_CLK_CLK_M] = clk;
 
         /* pll_ref */
         pll_ref_div = tegra20_get_pll_ref_div();
         clk = clk_register_fixed_factor(NULL, "pll_ref", "clk_m",
                                         CLK_SET_RATE_PARENT, 1, pll_ref_div);
-        clk_register_clkdev(clk, "pll_ref", NULL);
-        clks[pll_ref] = clk;
+        clks[TEGRA20_CLK_PLL_REF] = clk;
 }
 
 /* Tegra20 CPU clock and reset control functions */
@@ -1226,49 +1018,49 @@ static struct tegra_cpu_car_ops tegra20_cpu_car_ops = {
 };
 
 static struct tegra_clk_init_table init_table[] __initdata = {
-        {pll_p, clk_max, 216000000, 1},
-        {pll_p_out1, clk_max, 28800000, 1},
-        {pll_p_out2, clk_max, 48000000, 1},
-        {pll_p_out3, clk_max, 72000000, 1},
-        {pll_p_out4, clk_max, 24000000, 1},
-        {pll_c, clk_max, 600000000, 1},
-        {pll_c_out1, clk_max, 120000000, 1},
-        {sclk, pll_c_out1, 0, 1},
-        {hclk, clk_max, 0, 1},
-        {pclk, clk_max, 60000000, 1},
-        {csite, clk_max, 0, 1},
-        {emc, clk_max, 0, 1},
-        {cclk, clk_max, 0, 1},
-        {uarta, pll_p, 0, 0},
-        {uartb, pll_p, 0, 0},
-        {uartc, pll_p, 0, 0},
-        {uartd, pll_p, 0, 0},
-        {uarte, pll_p, 0, 0},
-        {pll_a, clk_max, 56448000, 1},
-        {pll_a_out0, clk_max, 11289600, 1},
-        {cdev1, clk_max, 0, 1},
-        {blink, clk_max, 32768, 1},
-        {i2s1, pll_a_out0, 11289600, 0},
-        {i2s2, pll_a_out0, 11289600, 0},
-        {sdmmc1, pll_p, 48000000, 0},
-        {sdmmc3, pll_p, 48000000, 0},
-        {sdmmc4, pll_p, 48000000, 0},
-        {spi, pll_p, 20000000, 0},
-        {sbc1, pll_p, 100000000, 0},
-        {sbc2, pll_p, 100000000, 0},
-        {sbc3, pll_p, 100000000, 0},
-        {sbc4, pll_p, 100000000, 0},
-        {host1x, pll_c, 150000000, 0},
-        {disp1, pll_p, 600000000, 0},
-        {disp2, pll_p, 600000000, 0},
-        {gr2d, pll_c, 300000000, 0},
-        {gr3d, pll_c, 300000000, 0},
-        {clk_max, clk_max, 0, 0}, /* This MUST be the last entry */
+        {TEGRA20_CLK_PLL_P, TEGRA20_CLK_CLK_MAX, 216000000, 1},
+        {TEGRA20_CLK_PLL_P_OUT1, TEGRA20_CLK_CLK_MAX, 28800000, 1},
+        {TEGRA20_CLK_PLL_P_OUT2, TEGRA20_CLK_CLK_MAX, 48000000, 1},
+        {TEGRA20_CLK_PLL_P_OUT3, TEGRA20_CLK_CLK_MAX, 72000000, 1},
+        {TEGRA20_CLK_PLL_P_OUT4, TEGRA20_CLK_CLK_MAX, 24000000, 1},
+        {TEGRA20_CLK_PLL_C, TEGRA20_CLK_CLK_MAX, 600000000, 1},
+        {TEGRA20_CLK_PLL_C_OUT1, TEGRA20_CLK_CLK_MAX, 120000000, 1},
+        {TEGRA20_CLK_SCLK, TEGRA20_CLK_PLL_C_OUT1, 0, 1},
+        {TEGRA20_CLK_HCLK, TEGRA20_CLK_CLK_MAX, 0, 1},
+        {TEGRA20_CLK_PCLK, TEGRA20_CLK_CLK_MAX, 60000000, 1},
+        {TEGRA20_CLK_CSITE, TEGRA20_CLK_CLK_MAX, 0, 1},
+        {TEGRA20_CLK_EMC, TEGRA20_CLK_CLK_MAX, 0, 1},
+        {TEGRA20_CLK_CCLK, TEGRA20_CLK_CLK_MAX, 0, 1},
+        {TEGRA20_CLK_UARTA, TEGRA20_CLK_PLL_P, 0, 0},
+        {TEGRA20_CLK_UARTB, TEGRA20_CLK_PLL_P, 0, 0},
+        {TEGRA20_CLK_UARTC, TEGRA20_CLK_PLL_P, 0, 0},
+        {TEGRA20_CLK_UARTD, TEGRA20_CLK_PLL_P, 0, 0},
+        {TEGRA20_CLK_UARTE, TEGRA20_CLK_PLL_P, 0, 0},
+        {TEGRA20_CLK_PLL_A, TEGRA20_CLK_CLK_MAX, 56448000, 1},
+        {TEGRA20_CLK_PLL_A_OUT0, TEGRA20_CLK_CLK_MAX, 11289600, 1},
+        {TEGRA20_CLK_CDEV1, TEGRA20_CLK_CLK_MAX, 0, 1},
+        {TEGRA20_CLK_BLINK, TEGRA20_CLK_CLK_MAX, 32768, 1},
+        {TEGRA20_CLK_I2S1, TEGRA20_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA20_CLK_I2S2, TEGRA20_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA20_CLK_SDMMC1, TEGRA20_CLK_PLL_P, 48000000, 0},
+        {TEGRA20_CLK_SDMMC3, TEGRA20_CLK_PLL_P, 48000000, 0},
+        {TEGRA20_CLK_SDMMC4, TEGRA20_CLK_PLL_P, 48000000, 0},
+        {TEGRA20_CLK_SPI, TEGRA20_CLK_PLL_P, 20000000, 0},
+        {TEGRA20_CLK_SBC1, TEGRA20_CLK_PLL_P, 100000000, 0},
+        {TEGRA20_CLK_SBC2, TEGRA20_CLK_PLL_P, 100000000, 0},
+        {TEGRA20_CLK_SBC3, TEGRA20_CLK_PLL_P, 100000000, 0},
+        {TEGRA20_CLK_SBC4, TEGRA20_CLK_PLL_P, 100000000, 0},
+        {TEGRA20_CLK_HOST1X, TEGRA20_CLK_PLL_C, 150000000, 0},
+        {TEGRA20_CLK_DISP1, TEGRA20_CLK_PLL_P, 600000000, 0},
+        {TEGRA20_CLK_DISP2, TEGRA20_CLK_PLL_P, 600000000, 0},
+        {TEGRA20_CLK_GR2D, TEGRA20_CLK_PLL_C, 300000000, 0},
+        {TEGRA20_CLK_GR3D, TEGRA20_CLK_PLL_C, 300000000, 0},
+        {TEGRA20_CLK_CLK_MAX, TEGRA20_CLK_CLK_MAX, 0, 0}, /* This MUST be the last entry */
 };
 
 static void __init tegra20_clock_apply_init_table(void)
 {
-        tegra_init_from_table(init_table, clks, clk_max);
+        tegra_init_from_table(init_table, clks, TEGRA20_CLK_CLK_MAX);
 }
 
 /*
@@ -1277,11 +1069,11 @@ static void __init tegra20_clock_apply_init_table(void)
  * table under two names.
  */
 static struct tegra_clk_duplicate tegra_clk_duplicates[] = {
-        TEGRA_CLK_DUPLICATE(usbd,   "utmip-pad",    NULL),
-        TEGRA_CLK_DUPLICATE(usbd,   "tegra-ehci.0", NULL),
-        TEGRA_CLK_DUPLICATE(usbd,   "tegra-otg",    NULL),
-        TEGRA_CLK_DUPLICATE(cclk,   NULL,           "cpu"),
-        TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* Must be the last entry */
+        TEGRA_CLK_DUPLICATE(TEGRA20_CLK_USBD,   "utmip-pad",    NULL),
+        TEGRA_CLK_DUPLICATE(TEGRA20_CLK_USBD,   "tegra-ehci.0", NULL),
+        TEGRA_CLK_DUPLICATE(TEGRA20_CLK_USBD,   "tegra-otg",    NULL),
+        TEGRA_CLK_DUPLICATE(TEGRA20_CLK_CCLK,   NULL,           "cpu"),
+        TEGRA_CLK_DUPLICATE(TEGRA20_CLK_CLK_MAX, NULL, NULL), /* Must be the last entry */
 };
 
 static const struct of_device_id pmc_match[] __initconst = {
@@ -1291,7 +1083,6 @@ static const struct of_device_id pmc_match[] __initconst = {
 
 static void __init tegra20_clock_init(struct device_node *np)
 {
-        int i;
         struct device_node *node;
 
         clk_base = of_iomap(np, 0);
@@ -1312,30 +1103,24 @@ static void __init tegra20_clock_init(struct device_node *np)
                 BUG();
         }
 
+        clks = tegra_clk_init(clk_base, TEGRA20_CLK_CLK_MAX,
+                                TEGRA20_CLK_PERIPH_BANKS);
+        if (!clks)
+                return;
+
         tegra20_osc_clk_init();
-        tegra20_pmc_clk_init();
-        tegra20_fixed_clk_init();
+        tegra_fixed_clk_init(tegra20_clks);
         tegra20_pll_init();
         tegra20_super_clk_init();
+        tegra_super_clk_gen4_init(clk_base, pmc_base, tegra20_clks, NULL);
         tegra20_periph_clk_init();
         tegra20_audio_clk_init();
+        tegra_pmc_clk_init(pmc_base, tegra20_clks);
 
+        tegra_init_dup_clks(tegra_clk_duplicates, clks, TEGRA20_CLK_CLK_MAX);
 
-        for (i = 0; i < ARRAY_SIZE(clks); i++) {
-                if (IS_ERR(clks[i])) {
-                        pr_err("Tegra20 clk %d: register failed with %ld\n",
-                               i, PTR_ERR(clks[i]));
-                        BUG();
-                }
-                if (!clks[i])
-                        clks[i] = ERR_PTR(-EINVAL);
-        }
-
-        tegra_init_dup_clks(tegra_clk_duplicates, clks, clk_max);
-
-        clk_data.clks = clks;
-        clk_data.clk_num = ARRAY_SIZE(clks);
-        of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+        tegra_add_of_provider(np);
+        tegra_register_devclks(devclks, ARRAY_SIZE(devclks));
 
         tegra_clk_apply_init_table = tegra20_clock_apply_init_table;
 
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index dbe7c8003c5c..8b10c38b6e3c 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -23,42 +23,9 @@
 #include <linux/of_address.h>
 #include <linux/clk/tegra.h>
 #include <linux/tegra-powergate.h>
-
+#include <dt-bindings/clock/tegra30-car.h>
 #include "clk.h"
-
-#define RST_DEVICES_L 0x004
-#define RST_DEVICES_H 0x008
-#define RST_DEVICES_U 0x00c
-#define RST_DEVICES_V 0x358
-#define RST_DEVICES_W 0x35c
-#define RST_DEVICES_SET_L 0x300
-#define RST_DEVICES_CLR_L 0x304
-#define RST_DEVICES_SET_H 0x308
-#define RST_DEVICES_CLR_H 0x30c
-#define RST_DEVICES_SET_U 0x310
-#define RST_DEVICES_CLR_U 0x314
-#define RST_DEVICES_SET_V 0x430
-#define RST_DEVICES_CLR_V 0x434
-#define RST_DEVICES_SET_W 0x438
-#define RST_DEVICES_CLR_W 0x43c
-#define RST_DEVICES_NUM 5
-
-#define CLK_OUT_ENB_L 0x010
-#define CLK_OUT_ENB_H 0x014
-#define CLK_OUT_ENB_U 0x018
-#define CLK_OUT_ENB_V 0x360
-#define CLK_OUT_ENB_W 0x364
-#define CLK_OUT_ENB_SET_L 0x320
-#define CLK_OUT_ENB_CLR_L 0x324
-#define CLK_OUT_ENB_SET_H 0x328
-#define CLK_OUT_ENB_CLR_H 0x32c
-#define CLK_OUT_ENB_SET_U 0x330
-#define CLK_OUT_ENB_CLR_U 0x334
-#define CLK_OUT_ENB_SET_V 0x440
-#define CLK_OUT_ENB_CLR_V 0x444
-#define CLK_OUT_ENB_SET_W 0x448
-#define CLK_OUT_ENB_CLR_W 0x44c
-#define CLK_OUT_ENB_NUM 5
+#include "clk-id.h"
 
 #define OSC_CTRL                        0x50
 #define OSC_CTRL_OSC_FREQ_MASK          (0xF<<28)
@@ -92,6 +59,8 @@
 
 #define SYSTEM_CLK_RATE 0x030
 
+#define TEGRA30_CLK_PERIPH_BANKS        5
+
 #define PLLC_BASE 0x80
 #define PLLC_MISC 0x8c
 #define PLLM_BASE 0x90
@@ -132,88 +101,21 @@
 #define AUDIO_SYNC_CLK_I2S4 0x4b0
 #define AUDIO_SYNC_CLK_SPDIF 0x4b4
 
-#define PMC_CLK_OUT_CNTRL 0x1a8
-
-#define CLK_SOURCE_I2S0 0x1d8
-#define CLK_SOURCE_I2S1 0x100
-#define CLK_SOURCE_I2S2 0x104
-#define CLK_SOURCE_I2S3 0x3bc
-#define CLK_SOURCE_I2S4 0x3c0
 #define CLK_SOURCE_SPDIF_OUT 0x108
-#define CLK_SOURCE_SPDIF_IN 0x10c
 #define CLK_SOURCE_PWM 0x110
 #define CLK_SOURCE_D_AUDIO 0x3d0
 #define CLK_SOURCE_DAM0 0x3d8
 #define CLK_SOURCE_DAM1 0x3dc
 #define CLK_SOURCE_DAM2 0x3e0
-#define CLK_SOURCE_HDA 0x428
-#define CLK_SOURCE_HDA2CODEC_2X 0x3e4
-#define CLK_SOURCE_SBC1 0x134
-#define CLK_SOURCE_SBC2 0x118
-#define CLK_SOURCE_SBC3 0x11c
-#define CLK_SOURCE_SBC4 0x1b4
-#define CLK_SOURCE_SBC5 0x3c8
-#define CLK_SOURCE_SBC6 0x3cc
-#define CLK_SOURCE_SATA_OOB 0x420
-#define CLK_SOURCE_SATA 0x424
-#define CLK_SOURCE_NDFLASH 0x160
-#define CLK_SOURCE_NDSPEED 0x3f8
-#define CLK_SOURCE_VFIR 0x168
-#define CLK_SOURCE_SDMMC1 0x150
-#define CLK_SOURCE_SDMMC2 0x154
-#define CLK_SOURCE_SDMMC3 0x1bc
-#define CLK_SOURCE_SDMMC4 0x164
-#define CLK_SOURCE_VDE 0x1c8
-#define CLK_SOURCE_CSITE 0x1d4
-#define CLK_SOURCE_LA 0x1f8
-#define CLK_SOURCE_OWR 0x1cc
-#define CLK_SOURCE_NOR 0x1d0
-#define CLK_SOURCE_MIPI 0x174
-#define CLK_SOURCE_I2C1 0x124
-#define CLK_SOURCE_I2C2 0x198
-#define CLK_SOURCE_I2C3 0x1b8
-#define CLK_SOURCE_I2C4 0x3c4
-#define CLK_SOURCE_I2C5 0x128
-#define CLK_SOURCE_UARTA 0x178
-#define CLK_SOURCE_UARTB 0x17c
-#define CLK_SOURCE_UARTC 0x1a0
-#define CLK_SOURCE_UARTD 0x1c0
-#define CLK_SOURCE_UARTE 0x1c4
-#define CLK_SOURCE_VI 0x148
-#define CLK_SOURCE_VI_SENSOR 0x1a8
-#define CLK_SOURCE_3D 0x158
 #define CLK_SOURCE_3D2 0x3b0
 #define CLK_SOURCE_2D 0x15c
-#define CLK_SOURCE_EPP 0x16c
-#define CLK_SOURCE_MPE 0x170
-#define CLK_SOURCE_HOST1X 0x180
-#define CLK_SOURCE_CVE 0x140
-#define CLK_SOURCE_TVO 0x188
-#define CLK_SOURCE_DTV 0x1dc
 #define CLK_SOURCE_HDMI 0x18c
-#define CLK_SOURCE_TVDAC 0x194
-#define CLK_SOURCE_DISP1 0x138
-#define CLK_SOURCE_DISP2 0x13c
 #define CLK_SOURCE_DSIB 0xd0
-#define CLK_SOURCE_TSENSOR 0x3b8
-#define CLK_SOURCE_ACTMON 0x3e8
-#define CLK_SOURCE_EXTERN1 0x3ec
-#define CLK_SOURCE_EXTERN2 0x3f0
-#define CLK_SOURCE_EXTERN3 0x3f4
-#define CLK_SOURCE_I2CSLOW 0x3fc
 #define CLK_SOURCE_SE 0x42c
-#define CLK_SOURCE_MSELECT 0x3b4
 #define CLK_SOURCE_EMC 0x19c
 
 #define AUDIO_SYNC_DOUBLER 0x49c
 
-#define PMC_CTRL 0
-#define PMC_CTRL_BLINK_ENB 7
-
-#define PMC_DPD_PADS_ORIDE 0x1c
-#define PMC_DPD_PADS_ORIDE_BLINK_ENB 20
-#define PMC_BLINK_TIMER 0x40
-
 #define UTMIP_PLL_CFG2 0x488
 #define UTMIP_PLL_CFG2_STABLE_COUNT(x) (((x) & 0xffff) << 6)
 #define UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(x) (((x) & 0x3f) << 18)
@@ -266,89 +168,41 @@ static struct cpu_clk_suspend_context {
 } tegra30_cpu_clk_sctx;
 #endif
 
-static int periph_clk_enb_refcnt[CLK_OUT_ENB_NUM * 32];
-
 static void __iomem *clk_base;
 static void __iomem *pmc_base;
 static unsigned long input_freq;
 
-static DEFINE_SPINLOCK(clk_doubler_lock);
-static DEFINE_SPINLOCK(clk_out_lock);
-static DEFINE_SPINLOCK(pll_div_lock);
 static DEFINE_SPINLOCK(cml_lock);
 static DEFINE_SPINLOCK(pll_d_lock);
-static DEFINE_SPINLOCK(sysrate_lock);
-
-#define TEGRA_INIT_DATA_MUX(_name, _con_id, _dev_id, _parents, _offset, \
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        30, 2, 0, 0, 8, 1, 0, _regs, _clk_num,          \
-                        periph_clk_enb_refcnt, _gate_flags, _clk_id)
-
-#define TEGRA_INIT_DATA_DIV16(_name, _con_id, _dev_id, _parents, _offset, \
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        30, 2, 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP,     \
-                        _regs, _clk_num, periph_clk_enb_refcnt,         \
-                        _gate_flags, _clk_id)
-
-#define TEGRA_INIT_DATA_MUX8(_name, _con_id, _dev_id, _parents, _offset, \
-                             _clk_num, _regs, _gate_flags, _clk_id)     \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        29, 3, 0, 0, 8, 1, 0, _regs, _clk_num,          \
-                        periph_clk_enb_refcnt, _gate_flags, _clk_id)
-
-#define TEGRA_INIT_DATA_INT(_name, _con_id, _dev_id, _parents, _offset, \
-                            _clk_num, _regs, _gate_flags, _clk_id)      \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_INT, _regs,    \
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
-                        _clk_id)
 
-#define TEGRA_INIT_DATA_UART(_name, _con_id, _dev_id, _parents, _offset,\
-                             _clk_num, _regs, _clk_id)                  \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        30, 2, 0, 0, 16, 1, TEGRA_DIVIDER_UART, _regs,  \
-                        _clk_num, periph_clk_enb_refcnt, 0, _clk_id)
+#define TEGRA_INIT_DATA_MUX(_name, _parents, _offset,   \
+                            _clk_num, _gate_flags, _clk_id)     \
+        TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset,   \
+                        30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
+                        _clk_num, _gate_flags, _clk_id)
+
+#define TEGRA_INIT_DATA_MUX8(_name, _parents, _offset, \
+                             _clk_num, _gate_flags, _clk_id)    \
+        TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset,   \
+                        29, 3, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
+                        _clk_num, _gate_flags, _clk_id)
+
+#define TEGRA_INIT_DATA_INT(_name, _parents, _offset,   \
+                            _clk_num, _gate_flags, _clk_id)     \
+        TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset,   \
+                        30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_INT |          \
+                        TEGRA_DIVIDER_ROUND_UP, _clk_num,       \
+                        _gate_flags, _clk_id)
 
-#define TEGRA_INIT_DATA_NODIV(_name, _con_id, _dev_id, _parents, _offset, \
-                              _mux_shift, _mux_width, _clk_num, _regs,  \
+#define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \
+                              _mux_shift, _mux_width, _clk_num, \
                               _gate_flags, _clk_id)                     \
-        TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parents, _offset,     \
-                        _mux_shift, _mux_width, 0, 0, 0, 0, 0, _regs,   \
-                        _clk_num, periph_clk_enb_refcnt, _gate_flags,   \
+        TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset,   \
+                        _mux_shift, _mux_width, 0, 0, 0, 0, 0,\
+                        _clk_num, _gate_flags,  \
                         _clk_id)
 
-/*
- * IDs assigned here must be in sync with DT bindings definition
- * for Tegra30 clocks.
- */
-enum tegra30_clk {
-        cpu, rtc = 4, timer, uarta, gpio = 8, sdmmc2, i2s1 = 11, i2c1, ndflash,
-        sdmmc1, sdmmc4, pwm = 17, i2s2, epp, gr2d = 21, usbd, isp, gr3d,
-        disp2 = 26, disp1, host1x, vcp, i2s0, cop_cache, mc, ahbdma, apbdma,
-        kbc = 36, statmon, pmc, kfuse = 40, sbc1, nor, sbc2 = 44, sbc3 = 46,
-        i2c5, dsia, mipi = 50, hdmi, csi, tvdac, i2c2, uartc, emc = 57, usb2,
-        usb3, mpe, vde, bsea, bsev, speedo, uartd, uarte, i2c3, sbc4, sdmmc3,
-        pcie, owr, afi, csite, pciex, avpucq, la, dtv = 79, ndspeed, i2cslow,
-        dsib, irama = 84, iramb, iramc, iramd, cram2, audio_2x = 90, csus = 92,
-        cdev2, cdev1, cpu_g = 96, cpu_lp, gr3d2, mselect, tsensor, i2s3, i2s4,
-        i2c4, sbc5, sbc6, d_audio, apbif, dam0, dam1, dam2, hda2codec_2x,
-        atomics, audio0_2x, audio1_2x, audio2_2x, audio3_2x, audio4_2x,
-        spdif_2x, actmon, extern1, extern2, extern3, sata_oob, sata, hda,
-        se = 127, hda2hdmi, sata_cold, uartb = 160, vfir, spdif_in, spdif_out,
-        vi, vi_sensor, fuse, fuse_burn, cve, tvo, clk_32k, clk_m, clk_m_div2,
-        clk_m_div4, pll_ref, pll_c, pll_c_out1, pll_m, pll_m_out1, pll_p,
-        pll_p_out1, pll_p_out2, pll_p_out3, pll_p_out4, pll_a, pll_a_out0,
-        pll_d, pll_d_out0, pll_d2, pll_d2_out0, pll_u, pll_x, pll_x_out0, pll_e,
-        spdif_in_sync, i2s0_sync, i2s1_sync, i2s2_sync, i2s3_sync, i2s4_sync,
-        vimclk_sync, audio0, audio1, audio2, audio3, audio4, spdif, clk_out_1,
-        clk_out_2, clk_out_3, sclk, blink, cclk_g, cclk_lp, twd, cml0, cml1,
-        hclk, pclk, clk_out_1_mux = 300, clk_max
-};
-
-static struct clk *clks[clk_max];
-static struct clk_onecell_data clk_data;
+static struct clk **clks;
 
 /*
  * Structure defining the fields for USB UTMI clocks Parameters.
@@ -564,6 +418,8 @@ static struct tegra_clk_pll_params pll_c_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_c_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_USE_LOCK,
 };
 
 static struct div_nmp pllm_nmp = {
@@ -593,6 +449,9 @@ static struct tegra_clk_pll_params pll_m_params = {
         .div_nmp = &pllm_nmp,
         .pmc_divnm_reg = PMC_PLLM_WB0_OVERRIDE,
         .pmc_divp_reg = PMC_PLLM_WB0_OVERRIDE,
+        .freq_table = pll_m_freq_table,
+        .flags = TEGRA_PLLM | TEGRA_PLL_HAS_CPCON |
+                 TEGRA_PLL_SET_DCCON | TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_params pll_p_params = {
@@ -607,6 +466,9 @@ static struct tegra_clk_pll_params pll_p_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_p_freq_table,
+        .flags = TEGRA_PLL_FIXED | TEGRA_PLL_HAS_CPCON | TEGRA_PLL_USE_LOCK,
+        .fixed_rate = 408000000,
 };
 
 static struct tegra_clk_pll_params pll_a_params = {
@@ -621,6 +483,8 @@ static struct tegra_clk_pll_params pll_a_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_a_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_params pll_d_params = {
@@ -635,6 +499,10 @@ static struct tegra_clk_pll_params pll_d_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
         .lock_delay = 1000,
+        .freq_table = pll_d_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
+                 TEGRA_PLL_USE_LOCK,
+
 };
 
 static struct tegra_clk_pll_params pll_d2_params = {
@@ -649,6 +517,9 @@ static struct tegra_clk_pll_params pll_d2_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
         .lock_delay = 1000,
+        .freq_table = pll_d_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
+                 TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_params pll_u_params = {
@@ -664,6 +535,8 @@ static struct tegra_clk_pll_params pll_u_params = {
         .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
         .lock_delay = 1000,
         .pdiv_tohw = pllu_p,
+        .freq_table = pll_u_freq_table,
+        .flags = TEGRA_PLLU | TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON,
 };
 
 static struct tegra_clk_pll_params pll_x_params = {
@@ -678,6 +551,9 @@ static struct tegra_clk_pll_params pll_x_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_x_freq_table,
+        .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_DCCON |
+                 TEGRA_PLL_USE_LOCK,
 };
 
 static struct tegra_clk_pll_params pll_e_params = {
@@ -692,116 +568,299 @@ static struct tegra_clk_pll_params pll_e_params = {
         .lock_mask = PLLE_MISC_LOCK,
         .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .freq_table = pll_e_freq_table,
+        .flags = TEGRA_PLLE_CONFIGURE | TEGRA_PLL_FIXED,
+        .fixed_rate = 100000000,
 };
 
-/* Peripheral clock registers */
-static struct tegra_clk_periph_regs periph_l_regs = {
-        .enb_reg = CLK_OUT_ENB_L,
-        .enb_set_reg = CLK_OUT_ENB_SET_L,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_L,
-        .rst_reg = RST_DEVICES_L,
-        .rst_set_reg = RST_DEVICES_SET_L,
-        .rst_clr_reg = RST_DEVICES_CLR_L,
+static unsigned long tegra30_input_freq[] = {
+        [0] = 13000000,
+        [1] = 16800000,
+        [4] = 19200000,
+        [5] = 38400000,
+        [8] = 12000000,
+        [9] = 48000000,
+        [12] = 260000000,
 };
 
-static struct tegra_clk_periph_regs periph_h_regs = {
-        .enb_reg = CLK_OUT_ENB_H,
-        .enb_set_reg = CLK_OUT_ENB_SET_H,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_H,
-        .rst_reg = RST_DEVICES_H,
-        .rst_set_reg = RST_DEVICES_SET_H,
-        .rst_clr_reg = RST_DEVICES_CLR_H,
+static struct tegra_devclk devclks[] __initdata = {
+        { .con_id = "pll_c", .dt_id = TEGRA30_CLK_PLL_C },
+        { .con_id = "pll_c_out1", .dt_id = TEGRA30_CLK_PLL_C_OUT1 },
+        { .con_id = "pll_p", .dt_id = TEGRA30_CLK_PLL_P },
+        { .con_id = "pll_p_out1", .dt_id = TEGRA30_CLK_PLL_P_OUT1 },
+        { .con_id = "pll_p_out2", .dt_id = TEGRA30_CLK_PLL_P_OUT2 },
+        { .con_id = "pll_p_out3", .dt_id = TEGRA30_CLK_PLL_P_OUT3 },
+        { .con_id = "pll_p_out4", .dt_id = TEGRA30_CLK_PLL_P_OUT4 },
+        { .con_id = "pll_m", .dt_id = TEGRA30_CLK_PLL_M },
+        { .con_id = "pll_m_out1", .dt_id = TEGRA30_CLK_PLL_M_OUT1 },
+        { .con_id = "pll_x", .dt_id = TEGRA30_CLK_PLL_X },
+        { .con_id = "pll_x_out0", .dt_id = TEGRA30_CLK_PLL_X_OUT0 },
+        { .con_id = "pll_u", .dt_id = TEGRA30_CLK_PLL_U },
+        { .con_id = "pll_d", .dt_id = TEGRA30_CLK_PLL_D },
+        { .con_id = "pll_d_out0", .dt_id = TEGRA30_CLK_PLL_D_OUT0 },
+        { .con_id = "pll_d2", .dt_id = TEGRA30_CLK_PLL_D2 },
+        { .con_id = "pll_d2_out0", .dt_id = TEGRA30_CLK_PLL_D2_OUT0 },
+        { .con_id = "pll_a", .dt_id = TEGRA30_CLK_PLL_A },
+        { .con_id = "pll_a_out0", .dt_id = TEGRA30_CLK_PLL_A_OUT0 },
+        { .con_id = "pll_e", .dt_id = TEGRA30_CLK_PLL_E },
+        { .con_id = "spdif_in_sync", .dt_id = TEGRA30_CLK_SPDIF_IN_SYNC },
+        { .con_id = "i2s0_sync", .dt_id = TEGRA30_CLK_I2S0_SYNC },
+        { .con_id = "i2s1_sync", .dt_id = TEGRA30_CLK_I2S1_SYNC },
+        { .con_id = "i2s2_sync", .dt_id = TEGRA30_CLK_I2S2_SYNC },
+        { .con_id = "i2s3_sync", .dt_id = TEGRA30_CLK_I2S3_SYNC },
+        { .con_id = "i2s4_sync", .dt_id = TEGRA30_CLK_I2S4_SYNC },
+        { .con_id = "vimclk_sync", .dt_id = TEGRA30_CLK_VIMCLK_SYNC },
+        { .con_id = "audio0", .dt_id = TEGRA30_CLK_AUDIO0 },
+        { .con_id = "audio1", .dt_id = TEGRA30_CLK_AUDIO1 },
+        { .con_id = "audio2", .dt_id = TEGRA30_CLK_AUDIO2 },
+        { .con_id = "audio3", .dt_id = TEGRA30_CLK_AUDIO3 },
+        { .con_id = "audio4", .dt_id = TEGRA30_CLK_AUDIO4 },
+        { .con_id = "spdif", .dt_id = TEGRA30_CLK_SPDIF },
+        { .con_id = "audio0_2x", .dt_id = TEGRA30_CLK_AUDIO0_2X },
+        { .con_id = "audio1_2x", .dt_id = TEGRA30_CLK_AUDIO1_2X },
+        { .con_id = "audio2_2x", .dt_id = TEGRA30_CLK_AUDIO2_2X },
+        { .con_id = "audio3_2x", .dt_id = TEGRA30_CLK_AUDIO3_2X },
+        { .con_id = "audio4_2x", .dt_id = TEGRA30_CLK_AUDIO4_2X },
+        { .con_id = "spdif_2x", .dt_id = TEGRA30_CLK_SPDIF_2X },
+        { .con_id = "extern1", .dev_id = "clk_out_1", .dt_id = TEGRA30_CLK_EXTERN1 },
+        { .con_id = "extern2", .dev_id = "clk_out_2", .dt_id = TEGRA30_CLK_EXTERN2 },
+        { .con_id = "extern3", .dev_id = "clk_out_3", .dt_id = TEGRA30_CLK_EXTERN3 },
+        { .con_id = "blink", .dt_id = TEGRA30_CLK_BLINK },
+        { .con_id = "cclk_g", .dt_id = TEGRA30_CLK_CCLK_G },
+        { .con_id = "cclk_lp", .dt_id = TEGRA30_CLK_CCLK_LP },
+        { .con_id = "sclk", .dt_id = TEGRA30_CLK_SCLK },
+        { .con_id = "hclk", .dt_id = TEGRA30_CLK_HCLK },
+        { .con_id = "pclk", .dt_id = TEGRA30_CLK_PCLK },
+        { .con_id = "twd", .dt_id = TEGRA30_CLK_TWD },
+        { .con_id = "emc", .dt_id = TEGRA30_CLK_EMC },
+        { .con_id = "clk_32k", .dt_id = TEGRA30_CLK_CLK_32K },
+        { .con_id = "clk_m_div2", .dt_id = TEGRA30_CLK_CLK_M_DIV2 },
+        { .con_id = "clk_m_div4", .dt_id = TEGRA30_CLK_CLK_M_DIV4 },
+        { .con_id = "cml0", .dt_id = TEGRA30_CLK_CML0 },
+        { .con_id = "cml1", .dt_id = TEGRA30_CLK_CML1 },
+        { .con_id = "clk_m", .dt_id = TEGRA30_CLK_CLK_M },
+        { .con_id = "pll_ref", .dt_id = TEGRA30_CLK_PLL_REF },
+        { .con_id = "csus", .dev_id = "tengra_camera", .dt_id = TEGRA30_CLK_CSUS },
+        { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_VCP },
+        { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_BSEA },
+        { .con_id = "bsev", .dev_id = "tegra-aes", .dt_id = TEGRA30_CLK_BSEV },
+        { .con_id = "dsia", .dev_id = "tegradc.0", .dt_id = TEGRA30_CLK_DSIA },
+        { .con_id = "csi", .dev_id = "tegra_camera", .dt_id = TEGRA30_CLK_CSI },
+        { .con_id = "isp", .dev_id = "tegra_camera", .dt_id = TEGRA30_CLK_ISP },
+        { .con_id = "pcie", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_PCIE },
+        { .con_id = "afi", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_AFI },
+        { .con_id = "fuse", .dt_id = TEGRA30_CLK_FUSE },
+        { .con_id = "fuse_burn", .dev_id = "fuse-tegra", .dt_id = TEGRA30_CLK_FUSE_BURN },
+        { .con_id = "apbif", .dev_id = "tegra30-ahub", .dt_id = TEGRA30_CLK_APBIF },
+        { .con_id = "hda2hdmi", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA2HDMI },
+        { .dev_id =  "tegra-apbdma", .dt_id = TEGRA30_CLK_APBDMA },
+        { .dev_id =  "rtc-tegra", .dt_id = TEGRA30_CLK_RTC },
+        { .dev_id =  "timer", .dt_id = TEGRA30_CLK_TIMER },
+        { .dev_id =  "tegra-kbc", .dt_id = TEGRA30_CLK_KBC },
+        { .dev_id =  "fsl-tegra-udc", .dt_id = TEGRA30_CLK_USBD },
+        { .dev_id =  "tegra-ehci.1", .dt_id = TEGRA30_CLK_USB2 },
+        { .dev_id =  "tegra-ehci.2", .dt_id = TEGRA30_CLK_USB2 },
+        { .dev_id =  "kfuse-tegra", .dt_id = TEGRA30_CLK_KFUSE },
+        { .dev_id =  "tegra_sata_cold", .dt_id = TEGRA30_CLK_SATA_COLD },
+        { .dev_id =  "dtv", .dt_id = TEGRA30_CLK_DTV },
+        { .dev_id = "tegra30-i2s.0", .dt_id = TEGRA30_CLK_I2S0 },
+        { .dev_id = "tegra30-i2s.1", .dt_id = TEGRA30_CLK_I2S1 },
+        { .dev_id = "tegra30-i2s.2", .dt_id = TEGRA30_CLK_I2S2 },
+        { .dev_id = "tegra30-i2s.3", .dt_id = TEGRA30_CLK_I2S3 },
+        { .dev_id = "tegra30-i2s.4", .dt_id = TEGRA30_CLK_I2S4 },
+        { .con_id = "spdif_out", .dev_id = "tegra30-spdif", .dt_id = TEGRA30_CLK_SPDIF_OUT },
+        { .con_id = "spdif_in", .dev_id = "tegra30-spdif", .dt_id = TEGRA30_CLK_SPDIF_IN },
+        { .con_id = "d_audio", .dev_id = "tegra30-ahub", .dt_id = TEGRA30_CLK_D_AUDIO },
+        { .dev_id = "tegra30-dam.0", .dt_id = TEGRA30_CLK_DAM0 },
+        { .dev_id = "tegra30-dam.1", .dt_id = TEGRA30_CLK_DAM1 },
+        { .dev_id = "tegra30-dam.2", .dt_id = TEGRA30_CLK_DAM2 },
+        { .con_id = "hda", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA },
+        { .con_id = "hda2codec", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA2CODEC_2X },
+        { .dev_id = "spi_tegra.0", .dt_id = TEGRA30_CLK_SBC1 },
+        { .dev_id = "spi_tegra.1", .dt_id = TEGRA30_CLK_SBC2 },
+        { .dev_id = "spi_tegra.2", .dt_id = TEGRA30_CLK_SBC3 },
+        { .dev_id = "spi_tegra.3", .dt_id = TEGRA30_CLK_SBC4 },
+        { .dev_id = "spi_tegra.4", .dt_id = TEGRA30_CLK_SBC5 },
+        { .dev_id = "spi_tegra.5", .dt_id = TEGRA30_CLK_SBC6 },
+        { .dev_id = "tegra_sata_oob", .dt_id = TEGRA30_CLK_SATA_OOB },
+        { .dev_id = "tegra_sata", .dt_id = TEGRA30_CLK_SATA },
+        { .dev_id = "tegra_nand", .dt_id = TEGRA30_CLK_NDFLASH },
+        { .dev_id = "tegra_nand_speed", .dt_id = TEGRA30_CLK_NDSPEED },
+        { .dev_id = "vfir", .dt_id = TEGRA30_CLK_VFIR },
+        { .dev_id = "csite", .dt_id = TEGRA30_CLK_CSITE },
+        { .dev_id = "la", .dt_id = TEGRA30_CLK_LA },
+        { .dev_id = "tegra_w1", .dt_id = TEGRA30_CLK_OWR },
+        { .dev_id = "mipi", .dt_id = TEGRA30_CLK_MIPI },
+        { .dev_id = "tegra-tsensor", .dt_id = TEGRA30_CLK_TSENSOR },
+        { .dev_id = "i2cslow", .dt_id = TEGRA30_CLK_I2CSLOW },
+        { .dev_id = "vde", .dt_id = TEGRA30_CLK_VDE },
+        { .con_id = "vi", .dev_id = "tegra_camera", .dt_id = TEGRA30_CLK_VI },
+        { .dev_id = "epp", .dt_id = TEGRA30_CLK_EPP },
+        { .dev_id = "mpe", .dt_id = TEGRA30_CLK_MPE },
+        { .dev_id = "host1x", .dt_id = TEGRA30_CLK_HOST1X },
+        { .dev_id = "3d", .dt_id = TEGRA30_CLK_GR3D },
+        { .dev_id = "3d2", .dt_id = TEGRA30_CLK_GR3D2 },
+        { .dev_id = "2d", .dt_id = TEGRA30_CLK_GR2D },
+        { .dev_id = "se", .dt_id = TEGRA30_CLK_SE },
+        { .dev_id = "mselect", .dt_id = TEGRA30_CLK_MSELECT },
+        { .dev_id = "tegra-nor", .dt_id = TEGRA30_CLK_NOR },
+        { .dev_id = "sdhci-tegra.0", .dt_id = TEGRA30_CLK_SDMMC1 },
+        { .dev_id = "sdhci-tegra.1", .dt_id = TEGRA30_CLK_SDMMC2 },
+        { .dev_id = "sdhci-tegra.2", .dt_id = TEGRA30_CLK_SDMMC3 },
+        { .dev_id = "sdhci-tegra.3", .dt_id = TEGRA30_CLK_SDMMC4 },
+        { .dev_id = "cve", .dt_id = TEGRA30_CLK_CVE },
+        { .dev_id = "tvo", .dt_id = TEGRA30_CLK_TVO },
+        { .dev_id = "tvdac", .dt_id = TEGRA30_CLK_TVDAC },
+        { .dev_id = "actmon", .dt_id = TEGRA30_CLK_ACTMON },
+        { .con_id = "vi_sensor", .dev_id = "tegra_camera", .dt_id = TEGRA30_CLK_VI_SENSOR },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.0", .dt_id = TEGRA30_CLK_I2C1 },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.1", .dt_id = TEGRA30_CLK_I2C2 },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.2", .dt_id = TEGRA30_CLK_I2C3 },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.3", .dt_id = TEGRA30_CLK_I2C4 },
+        { .con_id = "div-clk", .dev_id = "tegra-i2c.4", .dt_id = TEGRA30_CLK_I2C5 },
+        { .dev_id = "tegra_uart.0", .dt_id = TEGRA30_CLK_UARTA },
+        { .dev_id = "tegra_uart.1", .dt_id = TEGRA30_CLK_UARTB },
+        { .dev_id = "tegra_uart.2", .dt_id = TEGRA30_CLK_UARTC },
+        { .dev_id = "tegra_uart.3", .dt_id = TEGRA30_CLK_UARTD },
+        { .dev_id = "tegra_uart.4", .dt_id = TEGRA30_CLK_UARTE },
+        { .dev_id = "hdmi", .dt_id = TEGRA30_CLK_HDMI },
+        { .dev_id = "extern1", .dt_id = TEGRA30_CLK_EXTERN1 },
+        { .dev_id = "extern2", .dt_id = TEGRA30_CLK_EXTERN2 },
+        { .dev_id = "extern3", .dt_id = TEGRA30_CLK_EXTERN3 },
+        { .dev_id = "pwm", .dt_id = TEGRA30_CLK_PWM },
+        { .dev_id = "tegradc.0", .dt_id = TEGRA30_CLK_DISP1 },
+        { .dev_id = "tegradc.1", .dt_id = TEGRA30_CLK_DISP2 },
+        { .dev_id = "tegradc.1", .dt_id = TEGRA30_CLK_DSIB },
 };
 
-static struct tegra_clk_periph_regs periph_u_regs = {
-        .enb_reg = CLK_OUT_ENB_U,
-        .enb_set_reg = CLK_OUT_ENB_SET_U,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_U,
-        .rst_reg = RST_DEVICES_U,
-        .rst_set_reg = RST_DEVICES_SET_U,
-        .rst_clr_reg = RST_DEVICES_CLR_U,
-};
+static struct tegra_clk tegra30_clks[tegra_clk_max] __initdata = {
+        [tegra_clk_clk_32k] = { .dt_id = TEGRA30_CLK_CLK_32K, .present = true },
+        [tegra_clk_clk_m] = { .dt_id = TEGRA30_CLK_CLK_M, .present = true },
+        [tegra_clk_clk_m_div2] = { .dt_id = TEGRA30_CLK_CLK_M_DIV2, .present = true },
+        [tegra_clk_clk_m_div4] = { .dt_id = TEGRA30_CLK_CLK_M_DIV4, .present = true },
+        [tegra_clk_pll_ref] = { .dt_id = TEGRA30_CLK_PLL_REF, .present = true },
+        [tegra_clk_spdif_in_sync] = { .dt_id = TEGRA30_CLK_SPDIF_IN_SYNC, .present = true },
+        [tegra_clk_i2s0_sync] = { .dt_id = TEGRA30_CLK_I2S0_SYNC, .present = true },
+        [tegra_clk_i2s1_sync] = { .dt_id = TEGRA30_CLK_I2S1_SYNC, .present = true },
+        [tegra_clk_i2s2_sync] = { .dt_id = TEGRA30_CLK_I2S2_SYNC, .present = true },
+        [tegra_clk_i2s3_sync] = { .dt_id = TEGRA30_CLK_I2S3_SYNC, .present = true },
+        [tegra_clk_i2s4_sync] = { .dt_id = TEGRA30_CLK_I2S4_SYNC, .present = true },
+        [tegra_clk_vimclk_sync] = { .dt_id = TEGRA30_CLK_VIMCLK_SYNC, .present = true },
+        [tegra_clk_audio0] = { .dt_id = TEGRA30_CLK_AUDIO0, .present = true },
+        [tegra_clk_audio1] = { .dt_id = TEGRA30_CLK_AUDIO1, .present = true },
+        [tegra_clk_audio2] = { .dt_id = TEGRA30_CLK_AUDIO2, .present = true },
+        [tegra_clk_audio3] = { .dt_id = TEGRA30_CLK_AUDIO3, .present = true },
+        [tegra_clk_audio4] = { .dt_id = TEGRA30_CLK_AUDIO4, .present = true },
+        [tegra_clk_spdif] = { .dt_id = TEGRA30_CLK_SPDIF, .present = true },
+        [tegra_clk_audio0_mux] = { .dt_id = TEGRA30_CLK_AUDIO0_MUX, .present = true },
+        [tegra_clk_audio1_mux] = { .dt_id = TEGRA30_CLK_AUDIO1_MUX, .present = true },
+        [tegra_clk_audio2_mux] = { .dt_id = TEGRA30_CLK_AUDIO2_MUX, .present = true },
+        [tegra_clk_audio3_mux] = { .dt_id = TEGRA30_CLK_AUDIO3_MUX, .present = true },
+        [tegra_clk_audio4_mux] = { .dt_id = TEGRA30_CLK_AUDIO4_MUX, .present = true },
+        [tegra_clk_spdif_mux] = { .dt_id = TEGRA30_CLK_SPDIF_MUX, .present = true },
+        [tegra_clk_audio0_2x] = { .dt_id = TEGRA30_CLK_AUDIO0_2X, .present = true },
+        [tegra_clk_audio1_2x] = { .dt_id = TEGRA30_CLK_AUDIO1_2X, .present = true },
+        [tegra_clk_audio2_2x] = { .dt_id = TEGRA30_CLK_AUDIO2_2X, .present = true },
+        [tegra_clk_audio3_2x] = { .dt_id = TEGRA30_CLK_AUDIO3_2X, .present = true },
+        [tegra_clk_audio4_2x] = { .dt_id = TEGRA30_CLK_AUDIO4_2X, .present = true },
+        [tegra_clk_spdif_2x] = { .dt_id = TEGRA30_CLK_SPDIF_2X, .present = true },
+        [tegra_clk_clk_out_1] = { .dt_id = TEGRA30_CLK_CLK_OUT_1, .present = true },
+        [tegra_clk_clk_out_2] = { .dt_id = TEGRA30_CLK_CLK_OUT_2, .present = true },
+        [tegra_clk_clk_out_3] = { .dt_id = TEGRA30_CLK_CLK_OUT_3, .present = true },
+        [tegra_clk_blink] = { .dt_id = TEGRA30_CLK_BLINK, .present = true },
+        [tegra_clk_clk_out_1_mux] = { .dt_id = TEGRA30_CLK_CLK_OUT_1_MUX, .present = true },
+        [tegra_clk_clk_out_2_mux] = { .dt_id = TEGRA30_CLK_CLK_OUT_2_MUX, .present = true },
+        [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA30_CLK_CLK_OUT_3_MUX, .present = true },
+        [tegra_clk_hclk] = { .dt_id = TEGRA30_CLK_HCLK, .present = true },
+        [tegra_clk_pclk] = { .dt_id = TEGRA30_CLK_PCLK, .present = true },
+        [tegra_clk_i2s0] = { .dt_id = TEGRA30_CLK_I2S0, .present = true },
+        [tegra_clk_i2s1] = { .dt_id = TEGRA30_CLK_I2S1, .present = true },
+        [tegra_clk_i2s2] = { .dt_id = TEGRA30_CLK_I2S2, .present = true },
+        [tegra_clk_i2s3] = { .dt_id = TEGRA30_CLK_I2S3, .present = true },
+        [tegra_clk_i2s4] = { .dt_id = TEGRA30_CLK_I2S4, .present = true },
+        [tegra_clk_spdif_in] = { .dt_id = TEGRA30_CLK_SPDIF_IN, .present = true },
+        [tegra_clk_hda] = { .dt_id = TEGRA30_CLK_HDA, .present = true },
+        [tegra_clk_hda2codec_2x] = { .dt_id = TEGRA30_CLK_HDA2CODEC_2X, .present = true },
+        [tegra_clk_sbc1] = { .dt_id = TEGRA30_CLK_SBC1, .present = true },
+        [tegra_clk_sbc2] = { .dt_id = TEGRA30_CLK_SBC2, .present = true },
+        [tegra_clk_sbc3] = { .dt_id = TEGRA30_CLK_SBC3, .present = true },
+        [tegra_clk_sbc4] = { .dt_id = TEGRA30_CLK_SBC4, .present = true },
+        [tegra_clk_sbc5] = { .dt_id = TEGRA30_CLK_SBC5, .present = true },
+        [tegra_clk_sbc6] = { .dt_id = TEGRA30_CLK_SBC6, .present = true },
+        [tegra_clk_ndflash] = { .dt_id = TEGRA30_CLK_NDFLASH, .present = true },
+        [tegra_clk_ndspeed] = { .dt_id = TEGRA30_CLK_NDSPEED, .present = true },
+        [tegra_clk_vfir] = { .dt_id = TEGRA30_CLK_VFIR, .present = true },
+        [tegra_clk_la] = { .dt_id = TEGRA30_CLK_LA, .present = true },
+        [tegra_clk_csite] = { .dt_id = TEGRA30_CLK_CSITE, .present = true },
+        [tegra_clk_owr] = { .dt_id = TEGRA30_CLK_OWR, .present = true },
+        [tegra_clk_mipi] = { .dt_id = TEGRA30_CLK_MIPI, .present = true },
+        [tegra_clk_tsensor] = { .dt_id = TEGRA30_CLK_TSENSOR, .present = true },
+        [tegra_clk_i2cslow] = { .dt_id = TEGRA30_CLK_I2CSLOW, .present = true },
+        [tegra_clk_vde] = { .dt_id = TEGRA30_CLK_VDE, .present = true },
+        [tegra_clk_vi] = { .dt_id = TEGRA30_CLK_VI, .present = true },
+        [tegra_clk_epp] = { .dt_id = TEGRA30_CLK_EPP, .present = true },
+        [tegra_clk_mpe] = { .dt_id = TEGRA30_CLK_MPE, .present = true },
+        [tegra_clk_host1x] = { .dt_id = TEGRA30_CLK_HOST1X, .present = true },
+        [tegra_clk_gr2d] = { .dt_id = TEGRA30_CLK_GR2D, .present = true },
+        [tegra_clk_gr3d] = { .dt_id = TEGRA30_CLK_GR3D, .present = true },
+        [tegra_clk_mselect] = { .dt_id = TEGRA30_CLK_MSELECT, .present = true },
+        [tegra_clk_nor] = { .dt_id = TEGRA30_CLK_NOR, .present = true },
+        [tegra_clk_sdmmc1] = { .dt_id = TEGRA30_CLK_SDMMC1, .present = true },
+        [tegra_clk_sdmmc2] = { .dt_id = TEGRA30_CLK_SDMMC2, .present = true },
+        [tegra_clk_sdmmc3] = { .dt_id = TEGRA30_CLK_SDMMC3, .present = true },
+        [tegra_clk_sdmmc4] = { .dt_id = TEGRA30_CLK_SDMMC4, .present = true },
+        [tegra_clk_cve] = { .dt_id = TEGRA30_CLK_CVE, .present = true },
+        [tegra_clk_tvo] = { .dt_id = TEGRA30_CLK_TVO, .present = true },
+        [tegra_clk_tvdac] = { .dt_id = TEGRA30_CLK_TVDAC, .present = true },
+        [tegra_clk_actmon] = { .dt_id = TEGRA30_CLK_ACTMON, .present = true },
+        [tegra_clk_vi_sensor] = { .dt_id = TEGRA30_CLK_VI_SENSOR, .present = true },
+        [tegra_clk_i2c1] = { .dt_id = TEGRA30_CLK_I2C1, .present = true },
+        [tegra_clk_i2c2] = { .dt_id = TEGRA30_CLK_I2C2, .present = true },
+        [tegra_clk_i2c3] = { .dt_id = TEGRA30_CLK_I2C3, .present = true },
+        [tegra_clk_i2c4] = { .dt_id = TEGRA30_CLK_I2C4, .present = true },
+        [tegra_clk_i2c5] = { .dt_id = TEGRA30_CLK_I2C5, .present = true },
+        [tegra_clk_uarta] = { .dt_id = TEGRA30_CLK_UARTA, .present = true },
+        [tegra_clk_uartb] = { .dt_id = TEGRA30_CLK_UARTB, .present = true },
+        [tegra_clk_uartc] = { .dt_id = TEGRA30_CLK_UARTC, .present = true },
+        [tegra_clk_uartd] = { .dt_id = TEGRA30_CLK_UARTD, .present = true },
+        [tegra_clk_uarte] = { .dt_id = TEGRA30_CLK_UARTE, .present = true },
+        [tegra_clk_extern1] = { .dt_id = TEGRA30_CLK_EXTERN1, .present = true },
+        [tegra_clk_extern2] = { .dt_id = TEGRA30_CLK_EXTERN2, .present = true },
+        [tegra_clk_extern3] = { .dt_id = TEGRA30_CLK_EXTERN3, .present = true },
+        [tegra_clk_disp1] = { .dt_id = TEGRA30_CLK_DISP1, .present = true },
+        [tegra_clk_disp2] = { .dt_id = TEGRA30_CLK_DISP2, .present = true },
+        [tegra_clk_apbdma] = { .dt_id = TEGRA30_CLK_APBDMA, .present = true },
+        [tegra_clk_rtc] = { .dt_id = TEGRA30_CLK_RTC, .present = true },
+        [tegra_clk_timer] = { .dt_id = TEGRA30_CLK_TIMER, .present = true },
+        [tegra_clk_kbc] = { .dt_id = TEGRA30_CLK_KBC, .present = true },
+        [tegra_clk_csus] = { .dt_id = TEGRA30_CLK_CSUS, .present = true },
+        [tegra_clk_vcp] = { .dt_id = TEGRA30_CLK_VCP, .present = true },
+        [tegra_clk_bsea] = { .dt_id = TEGRA30_CLK_BSEA, .present = true },
+        [tegra_clk_bsev] = { .dt_id = TEGRA30_CLK_BSEV, .present = true },
+        [tegra_clk_usbd] = { .dt_id = TEGRA30_CLK_USBD, .present = true },
+        [tegra_clk_usb2] = { .dt_id = TEGRA30_CLK_USB2, .present = true },
+        [tegra_clk_usb3] = { .dt_id = TEGRA30_CLK_USB3, .present = true },
+        [tegra_clk_csi] = { .dt_id = TEGRA30_CLK_CSI, .present = true },
+        [tegra_clk_isp] = { .dt_id = TEGRA30_CLK_ISP, .present = true },
+        [tegra_clk_kfuse] = { .dt_id = TEGRA30_CLK_KFUSE, .present = true },
+        [tegra_clk_fuse] = { .dt_id = TEGRA30_CLK_FUSE, .present = true },
+        [tegra_clk_fuse_burn] = { .dt_id = TEGRA30_CLK_FUSE_BURN, .present = true },
+        [tegra_clk_apbif] = { .dt_id = TEGRA30_CLK_APBIF, .present = true },
+        [tegra_clk_hda2hdmi] = { .dt_id = TEGRA30_CLK_HDA2HDMI, .present = true },
+        [tegra_clk_sata_cold] = { .dt_id = TEGRA30_CLK_SATA_COLD, .present = true },
+        [tegra_clk_sata_oob] = { .dt_id = TEGRA30_CLK_SATA_OOB, .present = true },
+        [tegra_clk_sata] = { .dt_id = TEGRA30_CLK_SATA, .present = true },
+        [tegra_clk_dtv] = { .dt_id = TEGRA30_CLK_DTV, .present = true },
+        [tegra_clk_pll_p] = { .dt_id = TEGRA30_CLK_PLL_P, .present = true },
+        [tegra_clk_pll_p_out1] = { .dt_id = TEGRA30_CLK_PLL_P_OUT1, .present = true },
+        [tegra_clk_pll_p_out2] = { .dt_id = TEGRA30_CLK_PLL_P_OUT2, .present = true },
+        [tegra_clk_pll_p_out3] = { .dt_id = TEGRA30_CLK_PLL_P_OUT3, .present = true },
+        [tegra_clk_pll_p_out4] = { .dt_id = TEGRA30_CLK_PLL_P_OUT4, .present = true },
+        [tegra_clk_pll_a] = { .dt_id = TEGRA30_CLK_PLL_A, .present = true },
+        [tegra_clk_pll_a_out0] = { .dt_id = TEGRA30_CLK_PLL_A_OUT0, .present = true },
 
-static struct tegra_clk_periph_regs periph_v_regs = {
-        .enb_reg = CLK_OUT_ENB_V,
-        .enb_set_reg = CLK_OUT_ENB_SET_V,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_V,
-        .rst_reg = RST_DEVICES_V,
-        .rst_set_reg = RST_DEVICES_SET_V,
-        .rst_clr_reg = RST_DEVICES_CLR_V,
 };
 
-static struct tegra_clk_periph_regs periph_w_regs = {
-        .enb_reg = CLK_OUT_ENB_W,
-        .enb_set_reg = CLK_OUT_ENB_SET_W,
-        .enb_clr_reg = CLK_OUT_ENB_CLR_W,
-        .rst_reg = RST_DEVICES_W,
-        .rst_set_reg = RST_DEVICES_SET_W,
-        .rst_clr_reg = RST_DEVICES_CLR_W,
-};
-
-static void tegra30_clk_measure_input_freq(void)
-{
-        u32 osc_ctrl = readl_relaxed(clk_base + OSC_CTRL);
-        u32 auto_clk_control = osc_ctrl & OSC_CTRL_OSC_FREQ_MASK;
-        u32 pll_ref_div = osc_ctrl & OSC_CTRL_PLL_REF_DIV_MASK;
-
-        switch (auto_clk_control) {
-        case OSC_CTRL_OSC_FREQ_12MHZ:
-                BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1);
-                input_freq = 12000000;
-                break;
-        case OSC_CTRL_OSC_FREQ_13MHZ:
-                BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1);
-                input_freq = 13000000;
-                break;
-        case OSC_CTRL_OSC_FREQ_19_2MHZ:
-                BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1);
-                input_freq = 19200000;
-                break;
-        case OSC_CTRL_OSC_FREQ_26MHZ:
-                BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1);
-                input_freq = 26000000;
-                break;
-        case OSC_CTRL_OSC_FREQ_16_8MHZ:
-                BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_1);
-                input_freq = 16800000;
-                break;
-        case OSC_CTRL_OSC_FREQ_38_4MHZ:
-                BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_2);
-                input_freq = 38400000;
-                break;
-        case OSC_CTRL_OSC_FREQ_48MHZ:
-                BUG_ON(pll_ref_div != OSC_CTRL_PLL_REF_DIV_4);
-                input_freq = 48000000;
-                break;
-        default:
-                pr_err("Unexpected auto clock control value %d",
-                        auto_clk_control);
-                BUG();
-                return;
-        }
-}
-
-static unsigned int tegra30_get_pll_ref_div(void)
-{
-        u32 pll_ref_div = readl_relaxed(clk_base + OSC_CTRL) &
-                                        OSC_CTRL_PLL_REF_DIV_MASK;
-
-        switch (pll_ref_div) {
-        case OSC_CTRL_PLL_REF_DIV_1:
-                return 1;
-        case OSC_CTRL_PLL_REF_DIV_2:
-                return 2;
-        case OSC_CTRL_PLL_REF_DIV_4:
-                return 4;
-        default:
-                pr_err("Invalid pll ref divider %d", pll_ref_div);
-                BUG();
-        }
-        return 0;
-}
-
 static void tegra30_utmi_param_configure(void)
 {
         u32 reg;
@@ -863,11 +922,8 @@ static void __init tegra30_pll_init(void)
 
         /* PLLC */
         clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0,
-                            0, &pll_c_params,
-                            TEGRA_PLL_HAS_CPCON | TEGRA_PLL_USE_LOCK,
-                            pll_c_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_c", NULL);
-        clks[pll_c] = clk;
+                                &pll_c_params, NULL);
+        clks[TEGRA30_CLK_PLL_C] = clk;
 
         /* PLLC_OUT1 */
         clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",
@@ -876,73 +932,13 @@ static void __init tegra30_pll_init(void)
         clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",
                                 clk_base + PLLC_OUT, 1, 0, CLK_SET_RATE_PARENT,
                                 0, NULL);
-        clk_register_clkdev(clk, "pll_c_out1", NULL);
-        clks[pll_c_out1] = clk;
-
-        /* PLLP */
-        clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base, pmc_base, 0,
-                            408000000, &pll_p_params,
-                            TEGRA_PLL_FIXED | TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_USE_LOCK, pll_p_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_p", NULL);
-        clks[pll_p] = clk;
-
-        /* PLLP_OUT1 */
-        clk = tegra_clk_register_divider("pll_p_out1_div", "pll_p",
-                                clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP, 8, 8, 1,
-                                &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out1", "pll_p_out1_div",
-                                clk_base + PLLP_OUTA, 1, 0,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out1", NULL);
-        clks[pll_p_out1] = clk;
-
-        /* PLLP_OUT2 */
-        clk = tegra_clk_register_divider("pll_p_out2_div", "pll_p",
-                                clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP, 24, 8, 1,
-                                &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out2", "pll_p_out2_div",
-                                clk_base + PLLP_OUTA, 17, 16,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out2", NULL);
-        clks[pll_p_out2] = clk;
-
-        /* PLLP_OUT3 */
-        clk = tegra_clk_register_divider("pll_p_out3_div", "pll_p",
-                                clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP, 8, 8, 1,
-                                &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out3", "pll_p_out3_div",
-                                clk_base + PLLP_OUTB, 1, 0,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out3", NULL);
-        clks[pll_p_out3] = clk;
-
-        /* PLLP_OUT4 */
-        clk = tegra_clk_register_divider("pll_p_out4_div", "pll_p",
-                                clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED |
-                                TEGRA_DIVIDER_ROUND_UP, 24, 8, 1,
-                                &pll_div_lock);
-        clk = tegra_clk_register_pll_out("pll_p_out4", "pll_p_out4_div",
-                                clk_base + PLLP_OUTB, 17, 16,
-                                CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0,
-                                &pll_div_lock);
-        clk_register_clkdev(clk, "pll_p_out4", NULL);
-        clks[pll_p_out4] = clk;
+        clks[TEGRA30_CLK_PLL_C_OUT1] = clk;
 
         /* PLLM */
         clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, pmc_base,
-                            CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE, 0,
-                            &pll_m_params, TEGRA_PLLM | TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_SET_DCCON | TEGRA_PLL_USE_LOCK,
-                            pll_m_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_m", NULL);
-        clks[pll_m] = clk;
+                            CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
+                            &pll_m_params, NULL);
+        clks[TEGRA30_CLK_PLL_M] = clk;
 
         /* PLLM_OUT1 */
         clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",
@@ -951,78 +947,44 @@ static void __init tegra30_pll_init(void)
         clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",
                                 clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED |
                                 CLK_SET_RATE_PARENT, 0, NULL);
-        clk_register_clkdev(clk, "pll_m_out1", NULL);
-        clks[pll_m_out1] = clk;
+        clks[TEGRA30_CLK_PLL_M_OUT1] = clk;
 
         /* PLLX */
         clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, pmc_base, 0,
-                            0, &pll_x_params, TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_SET_DCCON | TEGRA_PLL_USE_LOCK,
-                            pll_x_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_x", NULL);
-        clks[pll_x] = clk;
+                            &pll_x_params, NULL);
+        clks[TEGRA30_CLK_PLL_X] = clk;
 
         /* PLLX_OUT0 */
         clk = clk_register_fixed_factor(NULL, "pll_x_out0", "pll_x",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "pll_x_out0", NULL);
-        clks[pll_x_out0] = clk;
+        clks[TEGRA30_CLK_PLL_X_OUT0] = clk;
 
         /* PLLU */
         clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, pmc_base, 0,
-                            0, &pll_u_params, TEGRA_PLLU | TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_SET_LFCON,
-                            pll_u_freq_table,
-                            NULL);
-        clk_register_clkdev(clk, "pll_u", NULL);
-        clks[pll_u] = clk;
+                            &pll_u_params, NULL);
+        clks[TEGRA30_CLK_PLL_U] = clk;
 
         tegra30_utmi_param_configure();
 
         /* PLLD */
         clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc_base, 0,
-                            0, &pll_d_params, TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_SET_LFCON | TEGRA_PLL_USE_LOCK,
-                            pll_d_freq_table, &pll_d_lock);
-        clk_register_clkdev(clk, "pll_d", NULL);
-        clks[pll_d] = clk;
+                            &pll_d_params, &pll_d_lock);
+        clks[TEGRA30_CLK_PLL_D] = clk;
 
         /* PLLD_OUT0 */
         clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "pll_d_out0", NULL);
-        clks[pll_d_out0] = clk;
+        clks[TEGRA30_CLK_PLL_D_OUT0] = clk;
 
         /* PLLD2 */
         clk = tegra_clk_register_pll("pll_d2", "pll_ref", clk_base, pmc_base, 0,
-                            0, &pll_d2_params, TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_SET_LFCON | TEGRA_PLL_USE_LOCK,
-                            pll_d_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_d2", NULL);
-        clks[pll_d2] = clk;
+                            &pll_d2_params, NULL);
+        clks[TEGRA30_CLK_PLL_D2] = clk;
 
         /* PLLD2_OUT0 */
         clk = clk_register_fixed_factor(NULL, "pll_d2_out0", "pll_d2",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "pll_d2_out0", NULL);
-        clks[pll_d2_out0] = clk;
-
-        /* PLLA */
-        clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base, pmc_base,
-                            0, 0, &pll_a_params, TEGRA_PLL_HAS_CPCON |
-                            TEGRA_PLL_USE_LOCK, pll_a_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_a", NULL);
-        clks[pll_a] = clk;
-
-        /* PLLA_OUT0 */
-        clk = tegra_clk_register_divider("pll_a_out0_div", "pll_a",
-                                clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
-                                8, 8, 1, NULL);
-        clk = tegra_clk_register_pll_out("pll_a_out0", "pll_a_out0_div",
-                                clk_base + PLLA_OUT, 1, 0, CLK_IGNORE_UNUSED |
-                                CLK_SET_RATE_PARENT, 0, NULL);
-        clk_register_clkdev(clk, "pll_a_out0", NULL);
-        clks[pll_a_out0] = clk;
+        clks[TEGRA30_CLK_PLL_D2_OUT0] = clk;
 
         /* PLLE */
         clk = clk_register_mux(NULL, "pll_e_mux", pll_e_parents,
@@ -1030,258 +992,8 @@ static void __init tegra30_pll_init(void)
                                CLK_SET_RATE_NO_REPARENT,
                                clk_base + PLLE_AUX, 2, 1, 0, NULL);
         clk = tegra_clk_register_plle("pll_e", "pll_e_mux", clk_base, pmc_base,
-                             CLK_GET_RATE_NOCACHE, 100000000, &pll_e_params,
-                             TEGRA_PLLE_CONFIGURE, pll_e_freq_table, NULL);
-        clk_register_clkdev(clk, "pll_e", NULL);
-        clks[pll_e] = clk;
-}
-
-static const char *mux_audio_sync_clk[] = { "spdif_in_sync", "i2s0_sync",
-        "i2s1_sync", "i2s2_sync", "i2s3_sync", "i2s4_sync", "vimclk_sync",};
-static const char *clk_out1_parents[] = { "clk_m", "clk_m_div2",
-                                          "clk_m_div4", "extern1", };
-static const char *clk_out2_parents[] = { "clk_m", "clk_m_div2",
-                                          "clk_m_div4", "extern2", };
-static const char *clk_out3_parents[] = { "clk_m", "clk_m_div2",
-                                          "clk_m_div4", "extern3", };
-
-static void __init tegra30_audio_clk_init(void)
-{
-        struct clk *clk;
-
-        /* spdif_in_sync */
-        clk = tegra_clk_register_sync_source("spdif_in_sync", 24000000,
-                                             24000000);
-        clk_register_clkdev(clk, "spdif_in_sync", NULL);
-        clks[spdif_in_sync] = clk;
-
-        /* i2s0_sync */
-        clk = tegra_clk_register_sync_source("i2s0_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s0_sync", NULL);
-        clks[i2s0_sync] = clk;
-
-        /* i2s1_sync */
-        clk = tegra_clk_register_sync_source("i2s1_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s1_sync", NULL);
-        clks[i2s1_sync] = clk;
-
-        /* i2s2_sync */
-        clk = tegra_clk_register_sync_source("i2s2_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s2_sync", NULL);
-        clks[i2s2_sync] = clk;
-
-        /* i2s3_sync */
-        clk = tegra_clk_register_sync_source("i2s3_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s3_sync", NULL);
-        clks[i2s3_sync] = clk;
-
-        /* i2s4_sync */
-        clk = tegra_clk_register_sync_source("i2s4_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "i2s4_sync", NULL);
-        clks[i2s4_sync] = clk;
-
-        /* vimclk_sync */
-        clk = tegra_clk_register_sync_source("vimclk_sync", 24000000, 24000000);
-        clk_register_clkdev(clk, "vimclk_sync", NULL);
-        clks[vimclk_sync] = clk;
-
-        /* audio0 */
-        clk = clk_register_mux(NULL, "audio0_mux", mux_audio_sync_clk,
-                                ARRAY_SIZE(mux_audio_sync_clk),
-                                CLK_SET_RATE_NO_REPARENT,
-                                clk_base + AUDIO_SYNC_CLK_I2S0, 0, 3, 0, NULL);
-        clk = clk_register_gate(NULL, "audio0", "audio0_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S0, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio0", NULL);
-        clks[audio0] = clk;
-
-        /* audio1 */
-        clk = clk_register_mux(NULL, "audio1_mux", mux_audio_sync_clk,
-                                ARRAY_SIZE(mux_audio_sync_clk),
-                                CLK_SET_RATE_NO_REPARENT,
-                                clk_base + AUDIO_SYNC_CLK_I2S1, 0, 3, 0, NULL);
-        clk = clk_register_gate(NULL, "audio1", "audio1_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S1, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio1", NULL);
-        clks[audio1] = clk;
-
-        /* audio2 */
-        clk = clk_register_mux(NULL, "audio2_mux", mux_audio_sync_clk,
-                                ARRAY_SIZE(mux_audio_sync_clk),
-                                CLK_SET_RATE_NO_REPARENT,
-                                clk_base + AUDIO_SYNC_CLK_I2S2, 0, 3, 0, NULL);
-        clk = clk_register_gate(NULL, "audio2", "audio2_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S2, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio2", NULL);
-        clks[audio2] = clk;
-
-        /* audio3 */
-        clk = clk_register_mux(NULL, "audio3_mux", mux_audio_sync_clk,
-                                ARRAY_SIZE(mux_audio_sync_clk),
-                                CLK_SET_RATE_NO_REPARENT,
-                                clk_base + AUDIO_SYNC_CLK_I2S3, 0, 3, 0, NULL);
-        clk = clk_register_gate(NULL, "audio3", "audio3_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S3, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio3", NULL);
-        clks[audio3] = clk;
-
-        /* audio4 */
-        clk = clk_register_mux(NULL, "audio4_mux", mux_audio_sync_clk,
-                                ARRAY_SIZE(mux_audio_sync_clk),
-                                CLK_SET_RATE_NO_REPARENT,
-                                clk_base + AUDIO_SYNC_CLK_I2S4, 0, 3, 0, NULL);
-        clk = clk_register_gate(NULL, "audio4", "audio4_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_I2S4, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "audio4", NULL);
-        clks[audio4] = clk;
-
-        /* spdif */
-        clk = clk_register_mux(NULL, "spdif_mux", mux_audio_sync_clk,
-                                ARRAY_SIZE(mux_audio_sync_clk),
-                                CLK_SET_RATE_NO_REPARENT,
-                                clk_base + AUDIO_SYNC_CLK_SPDIF, 0, 3, 0, NULL);
-        clk = clk_register_gate(NULL, "spdif", "spdif_mux", 0,
-                                clk_base + AUDIO_SYNC_CLK_SPDIF, 4,
-                                CLK_GATE_SET_TO_DISABLE, NULL);
-        clk_register_clkdev(clk, "spdif", NULL);
-        clks[spdif] = clk;
-
-        /* audio0_2x */
-        clk = clk_register_fixed_factor(NULL, "audio0_doubler", "audio0",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio0_div", "audio0_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 24, 1, 0,
-                                &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio0_2x", "audio0_div",
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    CLK_SET_RATE_PARENT, 113, &periph_v_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio0_2x", NULL);
-        clks[audio0_2x] = clk;
-
-        /* audio1_2x */
-        clk = clk_register_fixed_factor(NULL, "audio1_doubler", "audio1",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio1_div", "audio1_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 25, 1, 0,
-                                &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio1_2x", "audio1_div",
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    CLK_SET_RATE_PARENT, 114, &periph_v_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio1_2x", NULL);
-        clks[audio1_2x] = clk;
-
-        /* audio2_2x */
-        clk = clk_register_fixed_factor(NULL, "audio2_doubler", "audio2",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio2_div", "audio2_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 26, 1, 0,
-                                &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio2_2x", "audio2_div",
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    CLK_SET_RATE_PARENT, 115, &periph_v_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio2_2x", NULL);
-        clks[audio2_2x] = clk;
-
-        /* audio3_2x */
-        clk = clk_register_fixed_factor(NULL, "audio3_doubler", "audio3",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio3_div", "audio3_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 27, 1, 0,
-                                &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio3_2x", "audio3_div",
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    CLK_SET_RATE_PARENT, 116, &periph_v_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio3_2x", NULL);
-        clks[audio3_2x] = clk;
-
-        /* audio4_2x */
-        clk = clk_register_fixed_factor(NULL, "audio4_doubler", "audio4",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("audio4_div", "audio4_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 28, 1, 0,
-                                &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("audio4_2x", "audio4_div",
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    CLK_SET_RATE_PARENT, 117, &periph_v_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "audio4_2x", NULL);
-        clks[audio4_2x] = clk;
-
-        /* spdif_2x */
-        clk = clk_register_fixed_factor(NULL, "spdif_doubler", "spdif",
-                                        CLK_SET_RATE_PARENT, 2, 1);
-        clk = tegra_clk_register_divider("spdif_div", "spdif_doubler",
-                                clk_base + AUDIO_SYNC_DOUBLER, 0, 0, 29, 1, 0,
-                                &clk_doubler_lock);
-        clk = tegra_clk_register_periph_gate("spdif_2x", "spdif_div",
-                                    TEGRA_PERIPH_NO_RESET, clk_base,
-                                    CLK_SET_RATE_PARENT, 118, &periph_v_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "spdif_2x", NULL);
-        clks[spdif_2x] = clk;
-}
-
-static void __init tegra30_pmc_clk_init(void)
-{
-        struct clk *clk;
-
-        /* clk_out_1 */
-        clk = clk_register_mux(NULL, "clk_out_1_mux", clk_out1_parents,
-                               ARRAY_SIZE(clk_out1_parents),
-                               CLK_SET_RATE_NO_REPARENT,
-                               pmc_base + PMC_CLK_OUT_CNTRL, 6, 3, 0,
-                               &clk_out_lock);
-        clks[clk_out_1_mux] = clk;
-        clk = clk_register_gate(NULL, "clk_out_1", "clk_out_1_mux", 0,
-                                pmc_base + PMC_CLK_OUT_CNTRL, 2, 0,
-                                &clk_out_lock);
-        clk_register_clkdev(clk, "extern1", "clk_out_1");
-        clks[clk_out_1] = clk;
-
-        /* clk_out_2 */
-        clk = clk_register_mux(NULL, "clk_out_2_mux", clk_out2_parents,
-                               ARRAY_SIZE(clk_out2_parents),
-                               CLK_SET_RATE_NO_REPARENT,
-                               pmc_base + PMC_CLK_OUT_CNTRL, 14, 3, 0,
-                               &clk_out_lock);
-        clk = clk_register_gate(NULL, "clk_out_2", "clk_out_2_mux", 0,
-                                pmc_base + PMC_CLK_OUT_CNTRL, 10, 0,
-                                &clk_out_lock);
-        clk_register_clkdev(clk, "extern2", "clk_out_2");
-        clks[clk_out_2] = clk;
-
-        /* clk_out_3 */
-        clk = clk_register_mux(NULL, "clk_out_3_mux", clk_out3_parents,
-                               ARRAY_SIZE(clk_out3_parents),
-                               CLK_SET_RATE_NO_REPARENT,
-                               pmc_base + PMC_CLK_OUT_CNTRL, 22, 3, 0,
-                               &clk_out_lock);
-        clk = clk_register_gate(NULL, "clk_out_3", "clk_out_3_mux", 0,
-                                pmc_base + PMC_CLK_OUT_CNTRL, 18, 0,
-                                &clk_out_lock);
-        clk_register_clkdev(clk, "extern3", "clk_out_3");
-        clks[clk_out_3] = clk;
-
-        /* blink */
-        writel_relaxed(0, pmc_base + PMC_BLINK_TIMER);
-        clk = clk_register_gate(NULL, "blink_override", "clk_32k", 0,
-                                pmc_base + PMC_DPD_PADS_ORIDE,
-                                PMC_DPD_PADS_ORIDE_BLINK_ENB, 0, NULL);
-        clk = clk_register_gate(NULL, "blink", "blink_override", 0,
-                                pmc_base + PMC_CTRL,
-                                PMC_CTRL_BLINK_ENB, 0, NULL);
-        clk_register_clkdev(clk, "blink", NULL);
-        clks[blink] = clk;
-
+                             CLK_GET_RATE_NOCACHE, &pll_e_params, NULL);
+        clks[TEGRA30_CLK_PLL_E] = clk;
 }
 
 static const char *cclk_g_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
@@ -1332,8 +1044,7 @@ static void __init tegra30_super_clk_init(void)
                                   CLK_SET_RATE_PARENT,
                                   clk_base + CCLKG_BURST_POLICY,
                                   0, 4, 0, 0, NULL);
-        clk_register_clkdev(clk, "cclk_g", NULL);
-        clks[cclk_g] = clk;
+        clks[TEGRA30_CLK_CCLK_G] = clk;
 
         /*
          * Clock input to cclk_lp divided from pll_p using
@@ -1369,8 +1080,7 @@ static void __init tegra30_super_clk_init(void)
                                   clk_base + CCLKLP_BURST_POLICY,
                                   TEGRA_DIVIDER_2, 4, 8, 9,
                               NULL);
-        clk_register_clkdev(clk, "cclk_lp", NULL);
-        clks[cclk_lp] = clk;
+        clks[TEGRA30_CLK_CCLK_LP] = clk;
 
         /* SCLK */
         clk = tegra_clk_register_super_mux("sclk", sclk_parents,
@@ -1378,142 +1088,44 @@ static void __init tegra30_super_clk_init(void)
                                   CLK_SET_RATE_PARENT,
                                   clk_base + SCLK_BURST_POLICY,
                                   0, 4, 0, 0, NULL);
-        clk_register_clkdev(clk, "sclk", NULL);
-        clks[sclk] = clk;
-
-        /* HCLK */
-        clk = clk_register_divider(NULL, "hclk_div", "sclk", 0,
-                                   clk_base + SYSTEM_CLK_RATE, 4, 2, 0,
-                                   &sysrate_lock);
-        clk = clk_register_gate(NULL, "hclk", "hclk_div", CLK_SET_RATE_PARENT,
-                                clk_base + SYSTEM_CLK_RATE, 7,
-                                CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
-        clk_register_clkdev(clk, "hclk", NULL);
-        clks[hclk] = clk;
-
-        /* PCLK */
-        clk = clk_register_divider(NULL, "pclk_div", "hclk", 0,
-                                   clk_base + SYSTEM_CLK_RATE, 0, 2, 0,
-                                   &sysrate_lock);
-        clk = clk_register_gate(NULL, "pclk", "pclk_div", CLK_SET_RATE_PARENT,
-                                clk_base + SYSTEM_CLK_RATE, 3,
-                                CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
-        clk_register_clkdev(clk, "pclk", NULL);
-        clks[pclk] = clk;
+        clks[TEGRA30_CLK_SCLK] = clk;
 
         /* twd */
         clk = clk_register_fixed_factor(NULL, "twd", "cclk_g",
                                         CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "twd", NULL);
-        clks[twd] = clk;
+        clks[TEGRA30_CLK_TWD] = clk;
+
+        tegra_super_clk_gen4_init(clk_base, pmc_base, tegra30_clks, NULL);
 }
 
 static const char *mux_pllacp_clkm[] = { "pll_a_out0", "unused", "pll_p",
                                          "clk_m" };
 static const char *mux_pllpcm_clkm[] = { "pll_p", "pll_c", "pll_m", "clk_m" };
 static const char *mux_pllmcp_clkm[] = { "pll_m", "pll_c", "pll_p", "clk_m" };
-static const char *i2s0_parents[] = { "pll_a_out0", "audio0_2x", "pll_p",
-                                      "clk_m" };
-static const char *i2s1_parents[] = { "pll_a_out0", "audio1_2x", "pll_p",
-                                      "clk_m" };
-static const char *i2s2_parents[] = { "pll_a_out0", "audio2_2x", "pll_p",
-                                      "clk_m" };
-static const char *i2s3_parents[] = { "pll_a_out0", "audio3_2x", "pll_p",
-                                      "clk_m" };
-static const char *i2s4_parents[] = { "pll_a_out0", "audio4_2x", "pll_p",
-                                      "clk_m" };
 static const char *spdif_out_parents[] = { "pll_a_out0", "spdif_2x", "pll_p",
                                            "clk_m" };
-static const char *spdif_in_parents[] = { "pll_p", "pll_c", "pll_m" };
-static const char *mux_pllpc_clk32k_clkm[] = { "pll_p", "pll_c", "clk_32k",
-                                               "clk_m" };
-static const char *mux_pllpc_clkm_clk32k[] = { "pll_p", "pll_c", "clk_m",
-                                               "clk_32k" };
 static const char *mux_pllmcpa[] = { "pll_m", "pll_c", "pll_p", "pll_a_out0" };
-static const char *mux_pllpdc_clkm[] = { "pll_p", "pll_d_out0", "pll_c",
-                                         "clk_m" };
-static const char *mux_pllp_clkm[] = { "pll_p", "unused", "unused", "clk_m" };
 static const char *mux_pllpmdacd2_clkm[] = { "pll_p", "pll_m", "pll_d_out0",
                                              "pll_a_out0", "pll_c",
                                              "pll_d2_out0", "clk_m" };
-static const char *mux_plla_clk32k_pllp_clkm_plle[] = { "pll_a_out0",
-                                                        "clk_32k", "pll_p",
-                                                        "clk_m", "pll_e" };
 static const char *mux_plld_out0_plld2_out0[] = { "pll_d_out0",
                                                   "pll_d2_out0" };
+static const char *pwm_parents[] = { "pll_p", "pll_c", "clk_32k", "clk_m" };
 
 static struct tegra_periph_init_data tegra_periph_clk_list[] = {
-        TEGRA_INIT_DATA_MUX("i2s0",     NULL,           "tegra30-i2s.0",        i2s0_parents,           CLK_SOURCE_I2S0,        30,     &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s0),
-        TEGRA_INIT_DATA_MUX("i2s1",     NULL,           "tegra30-i2s.1",        i2s1_parents,           CLK_SOURCE_I2S1,        11,     &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s1),
-        TEGRA_INIT_DATA_MUX("i2s2",     NULL,           "tegra30-i2s.2",        i2s2_parents,           CLK_SOURCE_I2S2,        18,     &periph_l_regs, TEGRA_PERIPH_ON_APB, i2s2),
-        TEGRA_INIT_DATA_MUX("i2s3",     NULL,           "tegra30-i2s.3",        i2s3_parents,           CLK_SOURCE_I2S3,        101,    &periph_v_regs, TEGRA_PERIPH_ON_APB, i2s3),
-        TEGRA_INIT_DATA_MUX("i2s4",     NULL,           "tegra30-i2s.4",        i2s4_parents,           CLK_SOURCE_I2S4,        102,    &periph_v_regs, TEGRA_PERIPH_ON_APB, i2s4),
-        TEGRA_INIT_DATA_MUX("spdif_out", "spdif_out",   "tegra30-spdif",        spdif_out_parents,      CLK_SOURCE_SPDIF_OUT,   10,     &periph_l_regs, TEGRA_PERIPH_ON_APB, spdif_out),
-        TEGRA_INIT_DATA_MUX("spdif_in", "spdif_in",     "tegra30-spdif",        spdif_in_parents,       CLK_SOURCE_SPDIF_IN,    10,     &periph_l_regs, TEGRA_PERIPH_ON_APB, spdif_in),
-        TEGRA_INIT_DATA_MUX("d_audio",  "d_audio",      "tegra30-ahub",         mux_pllacp_clkm,        CLK_SOURCE_D_AUDIO,     106,    &periph_v_regs, 0, d_audio),
-        TEGRA_INIT_DATA_MUX("dam0",     NULL,           "tegra30-dam.0",        mux_pllacp_clkm,        CLK_SOURCE_DAM0,        108,    &periph_v_regs, 0, dam0),
-        TEGRA_INIT_DATA_MUX("dam1",     NULL,           "tegra30-dam.1",        mux_pllacp_clkm,        CLK_SOURCE_DAM1,        109,    &periph_v_regs, 0, dam1),
-        TEGRA_INIT_DATA_MUX("dam2",     NULL,           "tegra30-dam.2",        mux_pllacp_clkm,        CLK_SOURCE_DAM2,        110,    &periph_v_regs, 0, dam2),
-        TEGRA_INIT_DATA_MUX("hda",      "hda",          "tegra30-hda",          mux_pllpcm_clkm,        CLK_SOURCE_HDA,         125,    &periph_v_regs, 0, hda),
-        TEGRA_INIT_DATA_MUX("hda2codec_2x", "hda2codec", "tegra30-hda",         mux_pllpcm_clkm,        CLK_SOURCE_HDA2CODEC_2X, 111,   &periph_v_regs, 0, hda2codec_2x),
-        TEGRA_INIT_DATA_MUX("sbc1",     NULL,           "spi_tegra.0",          mux_pllpcm_clkm,        CLK_SOURCE_SBC1,        41,     &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc1),
-        TEGRA_INIT_DATA_MUX("sbc2",     NULL,           "spi_tegra.1",          mux_pllpcm_clkm,        CLK_SOURCE_SBC2,        44,     &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc2),
-        TEGRA_INIT_DATA_MUX("sbc3",     NULL,           "spi_tegra.2",          mux_pllpcm_clkm,        CLK_SOURCE_SBC3,        46,     &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc3),
-        TEGRA_INIT_DATA_MUX("sbc4",     NULL,           "spi_tegra.3",          mux_pllpcm_clkm,        CLK_SOURCE_SBC4,        68,     &periph_u_regs, TEGRA_PERIPH_ON_APB, sbc4),
-        TEGRA_INIT_DATA_MUX("sbc5",     NULL,           "spi_tegra.4",          mux_pllpcm_clkm,        CLK_SOURCE_SBC5,        104,    &periph_v_regs, TEGRA_PERIPH_ON_APB, sbc5),
-        TEGRA_INIT_DATA_MUX("sbc6",     NULL,           "spi_tegra.5",          mux_pllpcm_clkm,        CLK_SOURCE_SBC6,        105,    &periph_v_regs, TEGRA_PERIPH_ON_APB, sbc6),
-        TEGRA_INIT_DATA_MUX("sata_oob", NULL,           "tegra_sata_oob",       mux_pllpcm_clkm,        CLK_SOURCE_SATA_OOB,    123,    &periph_v_regs, TEGRA_PERIPH_ON_APB, sata_oob),
-        TEGRA_INIT_DATA_MUX("sata",     NULL,           "tegra_sata",           mux_pllpcm_clkm,        CLK_SOURCE_SATA,        124,    &periph_v_regs, TEGRA_PERIPH_ON_APB, sata),
-        TEGRA_INIT_DATA_MUX("ndflash",  NULL,           "tegra_nand",           mux_pllpcm_clkm,        CLK_SOURCE_NDFLASH,     13,     &periph_l_regs, TEGRA_PERIPH_ON_APB, ndflash),
-        TEGRA_INIT_DATA_MUX("ndspeed",  NULL,           "tegra_nand_speed",     mux_pllpcm_clkm,        CLK_SOURCE_NDSPEED,     80,     &periph_u_regs, TEGRA_PERIPH_ON_APB, ndspeed),
-        TEGRA_INIT_DATA_MUX("vfir",     NULL,           "vfir",                 mux_pllpcm_clkm,        CLK_SOURCE_VFIR,        7,      &periph_l_regs, TEGRA_PERIPH_ON_APB, vfir),
-        TEGRA_INIT_DATA_MUX("csite",    NULL,           "csite",                mux_pllpcm_clkm,        CLK_SOURCE_CSITE,       73,     &periph_u_regs, TEGRA_PERIPH_ON_APB, csite),
-        TEGRA_INIT_DATA_MUX("la",       NULL,           "la",                   mux_pllpcm_clkm,        CLK_SOURCE_LA,          76,     &periph_u_regs, TEGRA_PERIPH_ON_APB, la),
-        TEGRA_INIT_DATA_MUX("owr",      NULL,           "tegra_w1",             mux_pllpcm_clkm,        CLK_SOURCE_OWR,         71,     &periph_u_regs, TEGRA_PERIPH_ON_APB, owr),
-        TEGRA_INIT_DATA_MUX("mipi",     NULL,           "mipi",                 mux_pllpcm_clkm,        CLK_SOURCE_MIPI,        50,     &periph_h_regs, TEGRA_PERIPH_ON_APB, mipi),
-        TEGRA_INIT_DATA_MUX("tsensor",  NULL,           "tegra-tsensor",        mux_pllpc_clkm_clk32k,  CLK_SOURCE_TSENSOR,     100,    &periph_v_regs, TEGRA_PERIPH_ON_APB, tsensor),
-        TEGRA_INIT_DATA_MUX("i2cslow",  NULL,           "i2cslow",              mux_pllpc_clk32k_clkm,  CLK_SOURCE_I2CSLOW,     81,     &periph_u_regs, TEGRA_PERIPH_ON_APB, i2cslow),
-        TEGRA_INIT_DATA_INT("vde",      NULL,           "vde",                  mux_pllpcm_clkm,        CLK_SOURCE_VDE,         61,     &periph_h_regs, 0, vde),
-        TEGRA_INIT_DATA_INT("vi",       "vi",           "tegra_camera",         mux_pllmcpa,            CLK_SOURCE_VI,          20,     &periph_l_regs, 0, vi),
-        TEGRA_INIT_DATA_INT("epp",      NULL,           "epp",                  mux_pllmcpa,            CLK_SOURCE_EPP,         19,     &periph_l_regs, 0, epp),
-        TEGRA_INIT_DATA_INT("mpe",      NULL,           "mpe",                  mux_pllmcpa,            CLK_SOURCE_MPE,         60,     &periph_h_regs, 0, mpe),
-        TEGRA_INIT_DATA_INT("host1x",   NULL,           "host1x",               mux_pllmcpa,            CLK_SOURCE_HOST1X,      28,     &periph_l_regs, 0, host1x),
-        TEGRA_INIT_DATA_INT("3d",       NULL,           "3d",                   mux_pllmcpa,            CLK_SOURCE_3D,          24,     &periph_l_regs, TEGRA_PERIPH_MANUAL_RESET, gr3d),
-        TEGRA_INIT_DATA_INT("3d2",      NULL,           "3d2",                  mux_pllmcpa,            CLK_SOURCE_3D2,         98,     &periph_v_regs, TEGRA_PERIPH_MANUAL_RESET, gr3d2),
-        TEGRA_INIT_DATA_INT("2d",       NULL,           "2d",                   mux_pllmcpa,            CLK_SOURCE_2D,          21,     &periph_l_regs, 0, gr2d),
-        TEGRA_INIT_DATA_INT("se",       NULL,           "se",                   mux_pllpcm_clkm,        CLK_SOURCE_SE,          127,    &periph_v_regs, 0, se),
-        TEGRA_INIT_DATA_MUX("mselect",  NULL,           "mselect",              mux_pllp_clkm,          CLK_SOURCE_MSELECT,     99,     &periph_v_regs, 0, mselect),
-        TEGRA_INIT_DATA_MUX("nor",      NULL,           "tegra-nor",            mux_pllpcm_clkm,        CLK_SOURCE_NOR,         42,     &periph_h_regs, 0, nor),
-        TEGRA_INIT_DATA_MUX("sdmmc1",   NULL,           "sdhci-tegra.0",        mux_pllpcm_clkm,        CLK_SOURCE_SDMMC1,      14,     &periph_l_regs, 0, sdmmc1),
-        TEGRA_INIT_DATA_MUX("sdmmc2",   NULL,           "sdhci-tegra.1",        mux_pllpcm_clkm,        CLK_SOURCE_SDMMC2,      9,      &periph_l_regs, 0, sdmmc2),
-        TEGRA_INIT_DATA_MUX("sdmmc3",   NULL,           "sdhci-tegra.2",        mux_pllpcm_clkm,        CLK_SOURCE_SDMMC3,      69,     &periph_u_regs, 0, sdmmc3),
-        TEGRA_INIT_DATA_MUX("sdmmc4",   NULL,           "sdhci-tegra.3",        mux_pllpcm_clkm,        CLK_SOURCE_SDMMC4,      15,     &periph_l_regs, 0, sdmmc4),
-        TEGRA_INIT_DATA_MUX("cve",      NULL,           "cve",                  mux_pllpdc_clkm,        CLK_SOURCE_CVE,         49,     &periph_h_regs, 0, cve),
-        TEGRA_INIT_DATA_MUX("tvo",      NULL,           "tvo",                  mux_pllpdc_clkm,        CLK_SOURCE_TVO,         49,     &periph_h_regs, 0, tvo),
-        TEGRA_INIT_DATA_MUX("tvdac",    NULL,           "tvdac",                mux_pllpdc_clkm,        CLK_SOURCE_TVDAC,       53,     &periph_h_regs, 0, tvdac),
-        TEGRA_INIT_DATA_MUX("actmon",   NULL,           "actmon",               mux_pllpc_clk32k_clkm,  CLK_SOURCE_ACTMON,      119,    &periph_v_regs, 0, actmon),
-        TEGRA_INIT_DATA_MUX("vi_sensor", "vi_sensor",   "tegra_camera",         mux_pllmcpa,            CLK_SOURCE_VI_SENSOR,   20,     &periph_l_regs, TEGRA_PERIPH_NO_RESET, vi_sensor),
-        TEGRA_INIT_DATA_DIV16("i2c1",   "div-clk",      "tegra-i2c.0",          mux_pllp_clkm,          CLK_SOURCE_I2C1,        12,     &periph_l_regs, TEGRA_PERIPH_ON_APB, i2c1),
-        TEGRA_INIT_DATA_DIV16("i2c2",   "div-clk",      "tegra-i2c.1",          mux_pllp_clkm,          CLK_SOURCE_I2C2,        54,     &periph_h_regs, TEGRA_PERIPH_ON_APB, i2c2),
-        TEGRA_INIT_DATA_DIV16("i2c3",   "div-clk",      "tegra-i2c.2",          mux_pllp_clkm,          CLK_SOURCE_I2C3,        67,     &periph_u_regs, TEGRA_PERIPH_ON_APB, i2c3),
-        TEGRA_INIT_DATA_DIV16("i2c4",   "div-clk",      "tegra-i2c.3",          mux_pllp_clkm,          CLK_SOURCE_I2C4,        103,    &periph_v_regs, TEGRA_PERIPH_ON_APB, i2c4),
-        TEGRA_INIT_DATA_DIV16("i2c5",   "div-clk",      "tegra-i2c.4",          mux_pllp_clkm,          CLK_SOURCE_I2C5,        47,     &periph_h_regs, TEGRA_PERIPH_ON_APB, i2c5),
-        TEGRA_INIT_DATA_UART("uarta",   NULL,           "tegra_uart.0",         mux_pllpcm_clkm,        CLK_SOURCE_UARTA,       6,      &periph_l_regs, uarta),
-        TEGRA_INIT_DATA_UART("uartb",   NULL,           "tegra_uart.1",         mux_pllpcm_clkm,        CLK_SOURCE_UARTB,       7,      &periph_l_regs, uartb),
-        TEGRA_INIT_DATA_UART("uartc",   NULL,           "tegra_uart.2",         mux_pllpcm_clkm,        CLK_SOURCE_UARTC,       55,     &periph_h_regs, uartc),
-        TEGRA_INIT_DATA_UART("uartd",   NULL,           "tegra_uart.3",         mux_pllpcm_clkm,        CLK_SOURCE_UARTD,       65,     &periph_u_regs, uartd),
-        TEGRA_INIT_DATA_UART("uarte",   NULL,           "tegra_uart.4",         mux_pllpcm_clkm,        CLK_SOURCE_UARTE,       66,     &periph_u_regs, uarte),
-        TEGRA_INIT_DATA_MUX8("hdmi",    NULL,           "hdmi",                 mux_pllpmdacd2_clkm,    CLK_SOURCE_HDMI,        51,     &periph_h_regs, 0, hdmi),
-        TEGRA_INIT_DATA_MUX8("extern1", NULL,           "extern1",              mux_plla_clk32k_pllp_clkm_plle, CLK_SOURCE_EXTERN1,     120,    &periph_v_regs, 0, extern1),
-        TEGRA_INIT_DATA_MUX8("extern2", NULL,           "extern2",              mux_plla_clk32k_pllp_clkm_plle, CLK_SOURCE_EXTERN2,     121,    &periph_v_regs, 0, extern2),
-        TEGRA_INIT_DATA_MUX8("extern3", NULL,           "extern3",              mux_plla_clk32k_pllp_clkm_plle, CLK_SOURCE_EXTERN3,     122,    &periph_v_regs, 0, extern3),
-        TEGRA_INIT_DATA("pwm",          NULL,           "pwm",                  mux_pllpc_clk32k_clkm,  CLK_SOURCE_PWM,         28, 2, 0, 0, 8, 1, 0, &periph_l_regs, 17, periph_clk_enb_refcnt, 0, pwm),
+        TEGRA_INIT_DATA_MUX("spdif_out", spdif_out_parents, CLK_SOURCE_SPDIF_OUT, 10, TEGRA_PERIPH_ON_APB, TEGRA30_CLK_SPDIF_OUT),
+        TEGRA_INIT_DATA_MUX("d_audio", mux_pllacp_clkm, CLK_SOURCE_D_AUDIO, 106, 0, TEGRA30_CLK_D_AUDIO),
+        TEGRA_INIT_DATA_MUX("dam0", mux_pllacp_clkm, CLK_SOURCE_DAM0, 108, 0, TEGRA30_CLK_DAM0),
+        TEGRA_INIT_DATA_MUX("dam1", mux_pllacp_clkm, CLK_SOURCE_DAM1, 109, 0, TEGRA30_CLK_DAM1),
+        TEGRA_INIT_DATA_MUX("dam2", mux_pllacp_clkm, CLK_SOURCE_DAM2, 110, 0, TEGRA30_CLK_DAM2),
+        TEGRA_INIT_DATA_INT("3d2", mux_pllmcpa, CLK_SOURCE_3D2, 98, TEGRA_PERIPH_MANUAL_RESET, TEGRA30_CLK_GR3D2),
+        TEGRA_INIT_DATA_INT("se", mux_pllpcm_clkm, CLK_SOURCE_SE, 127, 0, TEGRA30_CLK_SE),
+        TEGRA_INIT_DATA_MUX8("hdmi", mux_pllpmdacd2_clkm, CLK_SOURCE_HDMI, 51, 0, TEGRA30_CLK_HDMI),
+        TEGRA_INIT_DATA("pwm", NULL, NULL, pwm_parents, CLK_SOURCE_PWM, 28, 2, 0, 0, 8, 1, 0, 17, TEGRA_PERIPH_ON_APB, TEGRA30_CLK_PWM),
 };
 
 static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
-        TEGRA_INIT_DATA_NODIV("disp1",  NULL, "tegradc.0", mux_pllpmdacd2_clkm,      CLK_SOURCE_DISP1,  29, 3, 27, &periph_l_regs, 0, disp1),
-        TEGRA_INIT_DATA_NODIV("disp2",  NULL, "tegradc.1", mux_pllpmdacd2_clkm,      CLK_SOURCE_DISP2,  29, 3, 26, &periph_l_regs, 0, disp2),
-        TEGRA_INIT_DATA_NODIV("dsib",   NULL, "tegradc.1", mux_plld_out0_plld2_out0, CLK_SOURCE_DSIB,   25, 1, 82, &periph_u_regs, 0, dsib),
+        TEGRA_INIT_DATA_NODIV("dsib", mux_plld_out0_plld2_out0, CLK_SOURCE_DSIB, 25, 1, 82, 0, TEGRA30_CLK_DSIB),
 };
 
 static void __init tegra30_periph_clk_init(void)
@@ -1522,170 +1134,20 @@ static void __init tegra30_periph_clk_init(void)
         struct clk *clk;
         int i;
 
-        /* apbdma */
-        clk = tegra_clk_register_periph_gate("apbdma", "clk_m", 0, clk_base, 0, 34,
-                                    &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-apbdma");
-        clks[apbdma] = clk;
-
-        /* rtc */
-        clk = tegra_clk_register_periph_gate("rtc", "clk_32k",
-                                    TEGRA_PERIPH_NO_RESET | TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 4, &periph_l_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "rtc-tegra");
-        clks[rtc] = clk;
-
-        /* timer */
-        clk = tegra_clk_register_periph_gate("timer", "clk_m", 0, clk_base, 0,
-                                    5, &periph_l_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "timer");
-        clks[timer] = clk;
-
-        /* kbc */
-        clk = tegra_clk_register_periph_gate("kbc", "clk_32k",
-                                    TEGRA_PERIPH_NO_RESET | TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 36, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-kbc");
-        clks[kbc] = clk;
-
-        /* csus */
-        clk = tegra_clk_register_periph_gate("csus", "clk_m",
-                                    TEGRA_PERIPH_NO_RESET | TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 92, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "csus", "tengra_camera");
-        clks[csus] = clk;
-
-        /* vcp */
-        clk = tegra_clk_register_periph_gate("vcp", "clk_m", 0, clk_base, 0, 29,
-                                    &periph_l_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "vcp", "tegra-avp");
-        clks[vcp] = clk;
-
-        /* bsea */
-        clk = tegra_clk_register_periph_gate("bsea", "clk_m", 0, clk_base, 0,
-                                    62, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "bsea", "tegra-avp");
-        clks[bsea] = clk;
-
-        /* bsev */
-        clk = tegra_clk_register_periph_gate("bsev", "clk_m", 0, clk_base, 0,
-                                    63, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "bsev", "tegra-aes");
-        clks[bsev] = clk;
-
-        /* usbd */
-        clk = tegra_clk_register_periph_gate("usbd", "clk_m", 0, clk_base, 0,
-                                    22, &periph_l_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "fsl-tegra-udc");
-        clks[usbd] = clk;
-
-        /* usb2 */
-        clk = tegra_clk_register_periph_gate("usb2", "clk_m", 0, clk_base, 0,
-                                    58, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-ehci.1");
-        clks[usb2] = clk;
-
-        /* usb3 */
-        clk = tegra_clk_register_periph_gate("usb3", "clk_m", 0, clk_base, 0,
-                                    59, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra-ehci.2");
-        clks[usb3] = clk;
-
         /* dsia */
         clk = tegra_clk_register_periph_gate("dsia", "pll_d_out0", 0, clk_base,
-                                    0, 48, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "dsia", "tegradc.0");
-        clks[dsia] = clk;
-
-        /* csi */
-        clk = tegra_clk_register_periph_gate("csi", "pll_p_out3", 0, clk_base,
-                                    0, 52, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "csi", "tegra_camera");
-        clks[csi] = clk;
-
-        /* isp */
-        clk = tegra_clk_register_periph_gate("isp", "clk_m", 0, clk_base, 0, 23,
-                                    &periph_l_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "isp", "tegra_camera");
-        clks[isp] = clk;
+                                    0, 48, periph_clk_enb_refcnt);
+        clks[TEGRA30_CLK_DSIA] = clk;
 
         /* pcie */
         clk = tegra_clk_register_periph_gate("pcie", "clk_m", 0, clk_base, 0,
-                                    70, &periph_u_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "pcie", "tegra-pcie");
-        clks[pcie] = clk;
+                                    70, periph_clk_enb_refcnt);
+        clks[TEGRA30_CLK_PCIE] = clk;
 
         /* afi */
         clk = tegra_clk_register_periph_gate("afi", "clk_m", 0, clk_base, 0, 72,
-                                    &periph_u_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "afi", "tegra-pcie");
-        clks[afi] = clk;
-
-        /* pciex */
-        clk = tegra_clk_register_periph_gate("pciex", "pll_e", 0, clk_base, 0,
-                                    74, &periph_u_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "pciex", "tegra-pcie");
-        clks[pciex] = clk;
-
-        /* kfuse */
-        clk = tegra_clk_register_periph_gate("kfuse", "clk_m",
-                                    TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 40, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "kfuse-tegra");
-        clks[kfuse] = clk;
-
-        /* fuse */
-        clk = tegra_clk_register_periph_gate("fuse", "clk_m",
-                                    TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 39, &periph_h_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "fuse", "fuse-tegra");
-        clks[fuse] = clk;
-
-        /* fuse_burn */
-        clk = tegra_clk_register_periph_gate("fuse_burn", "clk_m",
-                                    TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 39, &periph_h_regs,
                                     periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "fuse_burn", "fuse-tegra");
-        clks[fuse_burn] = clk;
-
-        /* apbif */
-        clk = tegra_clk_register_periph_gate("apbif", "clk_m", 0,
-                                    clk_base, 0, 107, &periph_v_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "apbif", "tegra30-ahub");
-        clks[apbif] = clk;
-
-        /* hda2hdmi */
-        clk = tegra_clk_register_periph_gate("hda2hdmi", "clk_m",
-                                    TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 128, &periph_w_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "hda2hdmi", "tegra30-hda");
-        clks[hda2hdmi] = clk;
-
-        /* sata_cold */
-        clk = tegra_clk_register_periph_gate("sata_cold", "clk_m",
-                                    TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 129, &periph_w_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "tegra_sata_cold");
-        clks[sata_cold] = clk;
-
-        /* dtv */
-        clk = tegra_clk_register_periph_gate("dtv", "clk_m",
-                                    TEGRA_PERIPH_ON_APB,
-                                    clk_base, 0, 79, &periph_u_regs,
-                                    periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, NULL, "dtv");
-        clks[dtv] = clk;
+        clks[TEGRA30_CLK_AFI] = clk;
 
         /* emc */
         clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
@@ -1694,84 +1156,37 @@ static void __init tegra30_periph_clk_init(void)
                                clk_base + CLK_SOURCE_EMC,
                                30, 2, 0, NULL);
         clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base, 0,
-                                    57, &periph_h_regs, periph_clk_enb_refcnt);
-        clk_register_clkdev(clk, "emc", NULL);
-        clks[emc] = clk;
+                                    57, periph_clk_enb_refcnt);
+        clks[TEGRA30_CLK_EMC] = clk;
+
+        /* cml0 */
+        clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,
+                                0, 0, &cml_lock);
+        clks[TEGRA30_CLK_CML0] = clk;
+
+        /* cml1 */
+        clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,
+                                1, 0, &cml_lock);
+        clks[TEGRA30_CLK_CML1] = clk;
 
         for (i = 0; i < ARRAY_SIZE(tegra_periph_clk_list); i++) {
                 data = &tegra_periph_clk_list[i];
-                clk = tegra_clk_register_periph(data->name, data->parent_names,
+                clk = tegra_clk_register_periph(data->name, data->p.parent_names,
                                 data->num_parents, &data->periph,
                                 clk_base, data->offset, data->flags);
-                clk_register_clkdev(clk, data->con_id, data->dev_id);
                 clks[data->clk_id] = clk;
         }
 
         for (i = 0; i < ARRAY_SIZE(tegra_periph_nodiv_clk_list); i++) {
                 data = &tegra_periph_nodiv_clk_list[i];
                 clk = tegra_clk_register_periph_nodiv(data->name,
-                                        data->parent_names,
+                                        data->p.parent_names,
                                         data->num_parents, &data->periph,
                                         clk_base, data->offset);
-                clk_register_clkdev(clk, data->con_id, data->dev_id);
                 clks[data->clk_id] = clk;
         }
-}
-
-static void __init tegra30_fixed_clk_init(void)
-{
-        struct clk *clk;
-
-        /* clk_32k */
-        clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
-                                32768);
-        clk_register_clkdev(clk, "clk_32k", NULL);
-        clks[clk_32k] = clk;
 
-        /* clk_m_div2 */
-        clk = clk_register_fixed_factor(NULL, "clk_m_div2", "clk_m",
-                                CLK_SET_RATE_PARENT, 1, 2);
-        clk_register_clkdev(clk, "clk_m_div2", NULL);
-        clks[clk_m_div2] = clk;
-
-        /* clk_m_div4 */
-        clk = clk_register_fixed_factor(NULL, "clk_m_div4", "clk_m",
-                                CLK_SET_RATE_PARENT, 1, 4);
-        clk_register_clkdev(clk, "clk_m_div4", NULL);
-        clks[clk_m_div4] = clk;
-
-        /* cml0 */
-        clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,
-                                0, 0, &cml_lock);
-        clk_register_clkdev(clk, "cml0", NULL);
-        clks[cml0] = clk;
-
-        /* cml1 */
-        clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,
-                                1, 0, &cml_lock);
-        clk_register_clkdev(clk, "cml1", NULL);
-        clks[cml1] = clk;
-}
-
-static void __init tegra30_osc_clk_init(void)
-{
-        struct clk *clk;
-        unsigned int pll_ref_div;
-
-        tegra30_clk_measure_input_freq();
-
-        /* clk_m */
-        clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT,
-                                input_freq);
-        clk_register_clkdev(clk, "clk_m", NULL);
-        clks[clk_m] = clk;
-
-        /* pll_ref */
-        pll_ref_div = tegra30_get_pll_ref_div();
-        clk = clk_register_fixed_factor(NULL, "pll_ref", "clk_m",
-                                CLK_SET_RATE_PARENT, 1, pll_ref_div);
-        clk_register_clkdev(clk, "pll_ref", NULL);
-        clks[pll_ref] = clk;
+        tegra_periph_clk_init(clk_base, pmc_base, tegra30_clks, &pll_p_params);
 }
 
 /* Tegra30 CPU clock and reset control functions */
@@ -1913,48 +1328,49 @@ static struct tegra_cpu_car_ops tegra30_cpu_car_ops = {
 };
 
 static struct tegra_clk_init_table init_table[] __initdata = {
-        {uarta, pll_p, 408000000, 0},
-        {uartb, pll_p, 408000000, 0},
-        {uartc, pll_p, 408000000, 0},
-        {uartd, pll_p, 408000000, 0},
-        {uarte, pll_p, 408000000, 0},
-        {pll_a, clk_max, 564480000, 1},
-        {pll_a_out0, clk_max, 11289600, 1},
-        {extern1, pll_a_out0, 0, 1},
-        {clk_out_1_mux, extern1, 0, 0},
-        {clk_out_1, clk_max, 0, 1},
-        {blink, clk_max, 0, 1},
-        {i2s0, pll_a_out0, 11289600, 0},
-        {i2s1, pll_a_out0, 11289600, 0},
-        {i2s2, pll_a_out0, 11289600, 0},
-        {i2s3, pll_a_out0, 11289600, 0},
-        {i2s4, pll_a_out0, 11289600, 0},
-        {sdmmc1, pll_p, 48000000, 0},
-        {sdmmc2, pll_p, 48000000, 0},
-        {sdmmc3, pll_p, 48000000, 0},
-        {pll_m, clk_max, 0, 1},
-        {pclk, clk_max, 0, 1},
-        {csite, clk_max, 0, 1},
-        {emc, clk_max, 0, 1},
-        {mselect, clk_max, 0, 1},
-        {sbc1, pll_p, 100000000, 0},
-        {sbc2, pll_p, 100000000, 0},
-        {sbc3, pll_p, 100000000, 0},
-        {sbc4, pll_p, 100000000, 0},
-        {sbc5, pll_p, 100000000, 0},
-        {sbc6, pll_p, 100000000, 0},
-        {host1x, pll_c, 150000000, 0},
-        {disp1, pll_p, 600000000, 0},
-        {disp2, pll_p, 600000000, 0},
-        {twd, clk_max, 0, 1},
-        {gr2d, pll_c, 300000000, 0},
-        {gr3d, pll_c, 300000000, 0},
-        {clk_max, clk_max, 0, 0}, /* This MUST be the last entry. */
+        {TEGRA30_CLK_UARTA, TEGRA30_CLK_PLL_P, 408000000, 0},
+        {TEGRA30_CLK_UARTB, TEGRA30_CLK_PLL_P, 408000000, 0},
+        {TEGRA30_CLK_UARTC, TEGRA30_CLK_PLL_P, 408000000, 0},
+        {TEGRA30_CLK_UARTD, TEGRA30_CLK_PLL_P, 408000000, 0},
+        {TEGRA30_CLK_UARTE, TEGRA30_CLK_PLL_P, 408000000, 0},
+        {TEGRA30_CLK_PLL_A, TEGRA30_CLK_CLK_MAX, 564480000, 1},
+        {TEGRA30_CLK_PLL_A_OUT0, TEGRA30_CLK_CLK_MAX, 11289600, 1},
+        {TEGRA30_CLK_EXTERN1, TEGRA30_CLK_PLL_A_OUT0, 0, 1},
+        {TEGRA30_CLK_CLK_OUT_1_MUX, TEGRA30_CLK_EXTERN1, 0, 0},
+        {TEGRA30_CLK_CLK_OUT_1, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_BLINK, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_I2S0, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA30_CLK_I2S1, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA30_CLK_I2S2, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA30_CLK_I2S3, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA30_CLK_I2S4, TEGRA30_CLK_PLL_A_OUT0, 11289600, 0},
+        {TEGRA30_CLK_SDMMC1, TEGRA30_CLK_PLL_P, 48000000, 0},
+        {TEGRA30_CLK_SDMMC2, TEGRA30_CLK_PLL_P, 48000000, 0},
+        {TEGRA30_CLK_SDMMC3, TEGRA30_CLK_PLL_P, 48000000, 0},
+        {TEGRA30_CLK_PLL_M, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_PCLK, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_CSITE, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_EMC, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_MSELECT, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_SBC1, TEGRA30_CLK_PLL_P, 100000000, 0},
+        {TEGRA30_CLK_SBC2, TEGRA30_CLK_PLL_P, 100000000, 0},
+        {TEGRA30_CLK_SBC3, TEGRA30_CLK_PLL_P, 100000000, 0},
+        {TEGRA30_CLK_SBC4, TEGRA30_CLK_PLL_P, 100000000, 0},
+        {TEGRA30_CLK_SBC5, TEGRA30_CLK_PLL_P, 100000000, 0},
+        {TEGRA30_CLK_SBC6, TEGRA30_CLK_PLL_P, 100000000, 0},
+        {TEGRA30_CLK_HOST1X, TEGRA30_CLK_PLL_C, 150000000, 0},
+        {TEGRA30_CLK_DISP1, TEGRA30_CLK_PLL_P, 600000000, 0},
+        {TEGRA30_CLK_DISP2, TEGRA30_CLK_PLL_P, 600000000, 0},
+        {TEGRA30_CLK_TWD, TEGRA30_CLK_CLK_MAX, 0, 1},
+        {TEGRA30_CLK_GR2D, TEGRA30_CLK_PLL_C, 300000000, 0},
+        {TEGRA30_CLK_GR3D, TEGRA30_CLK_PLL_C, 300000000, 0},
+        {TEGRA30_CLK_GR3D2, TEGRA30_CLK_PLL_C, 300000000, 0},
+        {TEGRA30_CLK_CLK_MAX, TEGRA30_CLK_CLK_MAX, 0, 0}, /* This MUST be the last entry. */
 };
 
 static void __init tegra30_clock_apply_init_table(void)
 {
-        tegra_init_from_table(init_table, clks, clk_max);
+        tegra_init_from_table(init_table, clks, TEGRA30_CLK_CLK_MAX);
 }
 
 /*
@@ -1963,19 +1379,18 @@ static void __init tegra30_clock_apply_init_table(void)
  * table under two names.
  */
 static struct tegra_clk_duplicate tegra_clk_duplicates[] = {
-        TEGRA_CLK_DUPLICATE(usbd, "utmip-pad", NULL),
-        TEGRA_CLK_DUPLICATE(usbd, "tegra-ehci.0", NULL),
-        TEGRA_CLK_DUPLICATE(usbd, "tegra-otg", NULL),
-        TEGRA_CLK_DUPLICATE(bsev, "tegra-avp", "bsev"),
-        TEGRA_CLK_DUPLICATE(bsev, "nvavp", "bsev"),
-        TEGRA_CLK_DUPLICATE(vde, "tegra-aes", "vde"),
-        TEGRA_CLK_DUPLICATE(bsea, "tegra-aes", "bsea"),
-        TEGRA_CLK_DUPLICATE(bsea, "nvavp", "bsea"),
-        TEGRA_CLK_DUPLICATE(cml1, "tegra_sata_cml", NULL),
-        TEGRA_CLK_DUPLICATE(cml0, "tegra_pcie", "cml"),
-        TEGRA_CLK_DUPLICATE(pciex, "tegra_pcie", "pciex"),
-        TEGRA_CLK_DUPLICATE(vcp, "nvavp", "vcp"),
-        TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* MUST be the last entry */
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_USBD, "utmip-pad", NULL),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_USBD, "tegra-ehci.0", NULL),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_USBD, "tegra-otg", NULL),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_BSEV, "tegra-avp", "bsev"),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_BSEV, "nvavp", "bsev"),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_VDE, "tegra-aes", "vde"),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_BSEA, "tegra-aes", "bsea"),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_BSEA, "nvavp", "bsea"),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_CML1, "tegra_sata_cml", NULL),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_CML0, "tegra_pcie", "cml"),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_VCP, "nvavp", "vcp"),
+        TEGRA_CLK_DUPLICATE(TEGRA30_CLK_CLK_MAX, NULL, NULL), /* MUST be the last entry */
 };
 
 static const struct of_device_id pmc_match[] __initconst = {
@@ -1986,7 +1401,6 @@ static const struct of_device_id pmc_match[] __initconst = {
 static void __init tegra30_clock_init(struct device_node *np)
 {
         struct device_node *node;
-        int i;
 
         clk_base = of_iomap(np, 0);
         if (!clk_base) {
@@ -2006,29 +1420,27 @@ static void __init tegra30_clock_init(struct device_node *np)
                 BUG();
         }
 
-        tegra30_osc_clk_init();
-        tegra30_fixed_clk_init();
+        clks = tegra_clk_init(clk_base, TEGRA30_CLK_CLK_MAX,
+                                TEGRA30_CLK_PERIPH_BANKS);
+        if (!clks)
+                return;
+
+        if (tegra_osc_clk_init(clk_base, tegra30_clks, tegra30_input_freq,
+                ARRAY_SIZE(tegra30_input_freq), &input_freq, NULL) < 0)
+                return;
+
+
+        tegra_fixed_clk_init(tegra30_clks);
         tegra30_pll_init();
         tegra30_super_clk_init();
         tegra30_periph_clk_init();
-        tegra30_audio_clk_init();
-        tegra30_pmc_clk_init();
-
-        for (i = 0; i < ARRAY_SIZE(clks); i++) {
-                if (IS_ERR(clks[i])) {
-                        pr_err("Tegra30 clk %d: register failed with %ld\n",
-                               i, PTR_ERR(clks[i]));
-                        BUG();
-                }
-                if (!clks[i])
-                        clks[i] = ERR_PTR(-EINVAL);
-        }
+        tegra_audio_clk_init(clk_base, pmc_base, tegra30_clks, &pll_a_params);
+        tegra_pmc_clk_init(pmc_base, tegra30_clks);
 
-        tegra_init_dup_clks(tegra_clk_duplicates, clks, clk_max);
+        tegra_init_dup_clks(tegra_clk_duplicates, clks, TEGRA30_CLK_CLK_MAX);
 
-        clk_data.clks = clks;
-        clk_data.clk_num = ARRAY_SIZE(clks);
-        of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+        tegra_add_of_provider(np);
+        tegra_register_devclks(devclks, ARRAY_SIZE(devclks));
 
         tegra_clk_apply_init_table = tegra30_clock_apply_init_table;
 
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index 86581ac1fd69..c0a7d7723510 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -18,13 +18,175 @@
 #include <linux/clk-provider.h>
 #include <linux/of.h>
 #include <linux/clk/tegra.h>
+#include <linux/reset-controller.h>
+#include <linux/tegra-soc.h>
 
 #include "clk.h"
 
+#define CLK_OUT_ENB_L                   0x010
+#define CLK_OUT_ENB_H                   0x014
+#define CLK_OUT_ENB_U                   0x018
+#define CLK_OUT_ENB_V                   0x360
+#define CLK_OUT_ENB_W                   0x364
+#define CLK_OUT_ENB_X                   0x280
+#define CLK_OUT_ENB_SET_L               0x320
+#define CLK_OUT_ENB_CLR_L               0x324
+#define CLK_OUT_ENB_SET_H               0x328
+#define CLK_OUT_ENB_CLR_H               0x32c
+#define CLK_OUT_ENB_SET_U               0x330
+#define CLK_OUT_ENB_CLR_U               0x334
+#define CLK_OUT_ENB_SET_V               0x440
+#define CLK_OUT_ENB_CLR_V               0x444
+#define CLK_OUT_ENB_SET_W               0x448
+#define CLK_OUT_ENB_CLR_W               0x44c
+#define CLK_OUT_ENB_SET_X               0x284
+#define CLK_OUT_ENB_CLR_X               0x288
+
+#define RST_DEVICES_L                   0x004
+#define RST_DEVICES_H                   0x008
+#define RST_DEVICES_U                   0x00C
+#define RST_DFLL_DVCO                   0x2F4
+#define RST_DEVICES_V                   0x358
+#define RST_DEVICES_W                   0x35C
+#define RST_DEVICES_X                   0x28C
+#define RST_DEVICES_SET_L               0x300
+#define RST_DEVICES_CLR_L               0x304
+#define RST_DEVICES_SET_H               0x308
+#define RST_DEVICES_CLR_H               0x30c
+#define RST_DEVICES_SET_U               0x310
+#define RST_DEVICES_CLR_U               0x314
+#define RST_DEVICES_SET_V               0x430
+#define RST_DEVICES_CLR_V               0x434
+#define RST_DEVICES_SET_W               0x438
+#define RST_DEVICES_CLR_W               0x43c
+#define RST_DEVICES_SET_X               0x290
+#define RST_DEVICES_CLR_X               0x294
+
 /* Global data of Tegra CPU CAR ops */
 static struct tegra_cpu_car_ops dummy_car_ops;
 struct tegra_cpu_car_ops *tegra_cpu_car_ops = &dummy_car_ops;
 
+int *periph_clk_enb_refcnt;
+static int periph_banks;
+static struct clk **clks;
+static int clk_num;
+static struct clk_onecell_data clk_data;
+
+static struct tegra_clk_periph_regs periph_regs[] = {
+        [0] = {
+                .enb_reg = CLK_OUT_ENB_L,
+                .enb_set_reg = CLK_OUT_ENB_SET_L,
+                .enb_clr_reg = CLK_OUT_ENB_CLR_L,
+                .rst_reg = RST_DEVICES_L,
+                .rst_set_reg = RST_DEVICES_SET_L,
+                .rst_clr_reg = RST_DEVICES_CLR_L,
+        },
+        [1] = {
+                .enb_reg = CLK_OUT_ENB_H,
+                .enb_set_reg = CLK_OUT_ENB_SET_H,
+                .enb_clr_reg = CLK_OUT_ENB_CLR_H,
+                .rst_reg = RST_DEVICES_H,
+                .rst_set_reg = RST_DEVICES_SET_H,
+                .rst_clr_reg = RST_DEVICES_CLR_H,
+        },
+        [2] = {
+                .enb_reg = CLK_OUT_ENB_U,
+                .enb_set_reg = CLK_OUT_ENB_SET_U,
+                .enb_clr_reg = CLK_OUT_ENB_CLR_U,
+                .rst_reg = RST_DEVICES_U,
+                .rst_set_reg = RST_DEVICES_SET_U,
+                .rst_clr_reg = RST_DEVICES_CLR_U,
+        },
+        [3] = {
+                .enb_reg = CLK_OUT_ENB_V,
+                .enb_set_reg = CLK_OUT_ENB_SET_V,
+                .enb_clr_reg = CLK_OUT_ENB_CLR_V,
+                .rst_reg = RST_DEVICES_V,
+                .rst_set_reg = RST_DEVICES_SET_V,
+                .rst_clr_reg = RST_DEVICES_CLR_V,
+        },
+        [4] = {
+                .enb_reg = CLK_OUT_ENB_W,
+                .enb_set_reg = CLK_OUT_ENB_SET_W,
+                .enb_clr_reg = CLK_OUT_ENB_CLR_W,
+                .rst_reg = RST_DEVICES_W,
+                .rst_set_reg = RST_DEVICES_SET_W,
+                .rst_clr_reg = RST_DEVICES_CLR_W,
+        },
+        [5] = {
+                .enb_reg = CLK_OUT_ENB_X,
+                .enb_set_reg = CLK_OUT_ENB_SET_X,
+                .enb_clr_reg = CLK_OUT_ENB_CLR_X,
+                .rst_reg = RST_DEVICES_X,
+                .rst_set_reg = RST_DEVICES_SET_X,
+                .rst_clr_reg = RST_DEVICES_CLR_X,
+        },
+};
+
+static void __iomem *clk_base;
+
+static int tegra_clk_rst_assert(struct reset_controller_dev *rcdev,
+                unsigned long id)
+{
+        /*
+         * If peripheral is on the APB bus then we must read the APB bus to
+         * flush the write operation in apb bus. This will avoid peripheral
+         * access after disabling clock. Since the reset driver has no
+         * knowledge of which reset IDs represent which devices, simply do
+         * this all the time.
+         */
+        tegra_read_chipid();
+
+        writel_relaxed(BIT(id % 32),
+                        clk_base + periph_regs[id / 32].rst_set_reg);
+
+        return 0;
+}
+
+static int tegra_clk_rst_deassert(struct reset_controller_dev *rcdev,
+                unsigned long id)
+{
+        writel_relaxed(BIT(id % 32),
+                        clk_base + periph_regs[id / 32].rst_clr_reg);
+
+        return 0;
+}
+
+struct tegra_clk_periph_regs *get_reg_bank(int clkid)
+{
+        int reg_bank = clkid / 32;
+
+        if (reg_bank < periph_banks)
+                return &periph_regs[reg_bank];
+        else {
+                WARN_ON(1);
+                return NULL;
+        }
+}
+
+struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
+{
+        clk_base = regs;
+
+        if (WARN_ON(banks > ARRAY_SIZE(periph_regs)))
+                return NULL;
+
+        periph_clk_enb_refcnt = kzalloc(32 * banks *
+                                sizeof(*periph_clk_enb_refcnt), GFP_KERNEL);
+        if (!periph_clk_enb_refcnt)
+                return NULL;
+
+        periph_banks = banks;
+
+        clks = kzalloc(num * sizeof(struct clk *), GFP_KERNEL);
+        if (!clks)
+                kfree(periph_clk_enb_refcnt);
+
+        clk_num = num;
+
+        return clks;
+}
+
 void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
                                 struct clk *clks[], int clk_max)
 {
@@ -74,6 +236,58 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
         }
 }
 
+static struct reset_control_ops rst_ops = {
+        .assert = tegra_clk_rst_assert,
+        .deassert = tegra_clk_rst_deassert,
+};
+
+static struct reset_controller_dev rst_ctlr = {
+        .ops = &rst_ops,
+        .owner = THIS_MODULE,
+        .of_reset_n_cells = 1,
+};
+
+void __init tegra_add_of_provider(struct device_node *np)
+{
+        int i;
+
+        for (i = 0; i < clk_num; i++) {
+                if (IS_ERR(clks[i])) {
+                        pr_err
+                            ("Tegra clk %d: register failed with %ld\n",
+                             i, PTR_ERR(clks[i]));
+                }
+                if (!clks[i])
+                        clks[i] = ERR_PTR(-EINVAL);
+        }
+
+        clk_data.clks = clks;
+        clk_data.clk_num = clk_num;
+        of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+
+        rst_ctlr.of_node = np;
+        rst_ctlr.nr_resets = clk_num * 32;
+        reset_controller_register(&rst_ctlr);
+}
+
+void __init tegra_register_devclks(struct tegra_devclk *dev_clks, int num)
+{
+        int i;
+
+        for (i = 0; i < num; i++, dev_clks++)
+                clk_register_clkdev(clks[dev_clks->dt_id], dev_clks->con_id,
+                                dev_clks->dev_id);
+}
+
+struct clk ** __init tegra_lookup_dt_id(int clk_id,
+                                        struct tegra_clk *tegra_clk)
+{
+        if (tegra_clk[clk_id].present)
+                return &clks[tegra_clk[clk_id].dt_id];
+        else
+                return NULL;
+}
+
 tegra_clk_apply_init_table_func tegra_clk_apply_init_table;
 
 void __init tegra_clocks_apply_init_table(void)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 07cfacd91686..16ec8d6bb87f 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -37,6 +37,8 @@ struct tegra_clk_sync_source {
         container_of(_hw, struct tegra_clk_sync_source, hw)
 
 extern const struct clk_ops tegra_clk_sync_source_ops;
+extern int *periph_clk_enb_refcnt;
+
 struct clk *tegra_clk_register_sync_source(const char *name,
                 unsigned long fixed_rate, unsigned long max_rate);
 
@@ -188,12 +190,15 @@ struct tegra_clk_pll_params {
         u32             ext_misc_reg[3];
         u32             pmc_divnm_reg;
         u32             pmc_divp_reg;
+        u32             flags;
         int             stepa_shift;
         int             stepb_shift;
         int             lock_delay;
         int             max_p;
         struct pdiv_map *pdiv_tohw;
         struct div_nmp  *div_nmp;
+        struct tegra_clk_pll_freq_table *freq_table;
+        unsigned long   fixed_rate;
 };
 
 /**
@@ -233,10 +238,7 @@ struct tegra_clk_pll {
         struct clk_hw   hw;
         void __iomem    *clk_base;
         void __iomem    *pmc;
-        u32             flags;
-        unsigned long   fixed_rate;
         spinlock_t      *lock;
-        struct tegra_clk_pll_freq_table *freq_table;
         struct tegra_clk_pll_params     *params;
 };
 
@@ -258,56 +260,49 @@ extern const struct clk_ops tegra_clk_pll_ops;
 extern const struct clk_ops tegra_clk_plle_ops;
 struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
                 void __iomem *clk_base, void __iomem *pmc,
-                unsigned long flags, unsigned long fixed_rate,
-                struct tegra_clk_pll_params *pll_params, u32 pll_flags,
-                struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock);
+                unsigned long flags, struct tegra_clk_pll_params *pll_params,
+                spinlock_t *lock);
 
 struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
                 void __iomem *clk_base, void __iomem *pmc,
-                unsigned long flags, unsigned long fixed_rate,
-                struct tegra_clk_pll_params *pll_params, u32 pll_flags,
-                struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock);
+                unsigned long flags, struct tegra_clk_pll_params *pll_params,
+                spinlock_t *lock);
 
 struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
                             void __iomem *clk_base, void __iomem *pmc,
-                            unsigned long flags, unsigned long fixed_rate,
+                            unsigned long flags,
                             struct tegra_clk_pll_params *pll_params,
-                            u32 pll_flags,
-                            struct tegra_clk_pll_freq_table *freq_table,
                             spinlock_t *lock);
 
 struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
                            void __iomem *clk_base, void __iomem *pmc,
-                           unsigned long flags, unsigned long fixed_rate,
+                           unsigned long flags,
                            struct tegra_clk_pll_params *pll_params,
-                           u32 pll_flags,
-                           struct tegra_clk_pll_freq_table *freq_table,
                            spinlock_t *lock);
 
 struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
                            void __iomem *clk_base, void __iomem *pmc,
-                           unsigned long flags, unsigned long fixed_rate,
+                           unsigned long flags,
                            struct tegra_clk_pll_params *pll_params,
-                           u32 pll_flags,
-                           struct tegra_clk_pll_freq_table *freq_table,
                            spinlock_t *lock);
 
 struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
                            void __iomem *clk_base, void __iomem *pmc,
-                           unsigned long flags, unsigned long fixed_rate,
+                           unsigned long flags,
                            struct tegra_clk_pll_params *pll_params,
-                           u32 pll_flags,
-                           struct tegra_clk_pll_freq_table *freq_table,
                            spinlock_t *lock, unsigned long parent_rate);
 
 struct clk *tegra_clk_register_plle_tegra114(const char *name,
                                 const char *parent_name,
                                 void __iomem *clk_base, unsigned long flags,
-                                unsigned long fixed_rate,
                                 struct tegra_clk_pll_params *pll_params,
-                                struct tegra_clk_pll_freq_table *freq_table,
                                 spinlock_t *lock);
 
+struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+                           void __iomem *clk_base, unsigned long flags,
+                           struct tegra_clk_pll_params *pll_params,
+                           spinlock_t *lock);
+
 /**
  * struct tegra_clk_pll_out - PLL divider down clock
  *
@@ -395,13 +390,13 @@ struct tegra_clk_periph_gate {
 #define TEGRA_PERIPH_MANUAL_RESET BIT(1)
 #define TEGRA_PERIPH_ON_APB BIT(2)
 #define TEGRA_PERIPH_WAR_1005168 BIT(3)
+#define TEGRA_PERIPH_NO_DIV BIT(4)
+#define TEGRA_PERIPH_NO_GATE BIT(5)
 
-void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert);
 extern const struct clk_ops tegra_clk_periph_gate_ops;
 struct clk *tegra_clk_register_periph_gate(const char *name,
                 const char *parent_name, u8 gate_flags, void __iomem *clk_base,
-                unsigned long flags, int clk_num,
-                struct tegra_clk_periph_regs *pregs, int *enable_refcnt);
+                unsigned long flags, int clk_num, int *enable_refcnt);
 
 /**
  * struct clk-periph - peripheral clock
@@ -443,26 +438,26 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name,
 
 #define TEGRA_CLK_PERIPH(_mux_shift, _mux_mask, _mux_flags,             \
                          _div_shift, _div_width, _div_frac_width,       \
-                         _div_flags, _clk_num, _enb_refcnt, _regs,      \
-                         _gate_flags, _table)                           \
+                         _div_flags, _clk_num,\
+                         _gate_flags, _table, _lock)                    \
         {                                                               \
                 .mux = {                                                \
                         .flags = _mux_flags,                            \
                         .shift = _mux_shift,                            \
                         .mask = _mux_mask,                              \
                         .table = _table,                                \
+                        .lock = _lock,                                  \
                 },                                                      \
                 .divider = {                                            \
                         .flags = _div_flags,                            \
                         .shift = _div_shift,                            \
                         .width = _div_width,                            \
                         .frac_width = _div_frac_width,                  \
+                        .lock = _lock,                                  \
                 },                                                      \
                 .gate = {                                               \
                         .flags = _gate_flags,                           \
                         .clk_num = _clk_num,                            \
-                        .enable_refcnt = _enb_refcnt,                   \
-                        .regs = _regs,                                  \
                 },                                                      \
                 .mux_ops = &clk_mux_ops,                                \
                 .div_ops = &tegra_clk_frac_div_ops,                     \
@@ -472,7 +467,10 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name,
 struct tegra_periph_init_data {
         const char *name;
         int clk_id;
-        const char **parent_names;
+        union {
+                const char **parent_names;
+                const char *parent_name;
+        } p;
         int num_parents;
         struct tegra_clk_periph periph;
         u32 offset;
@@ -483,20 +481,19 @@ struct tegra_periph_init_data {
 
 #define TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parent_names, _offset,\
                         _mux_shift, _mux_mask, _mux_flags, _div_shift,  \
-                        _div_width, _div_frac_width, _div_flags, _regs, \
-                        _clk_num, _enb_refcnt, _gate_flags, _clk_id, _table,\
-                        _flags) \
+                        _div_width, _div_frac_width, _div_flags,        \
+                        _clk_num, _gate_flags, _clk_id, _table,         \
+                        _flags, _lock) \
         {                                                               \
                 .name = _name,                                          \
                 .clk_id = _clk_id,                                      \
-                .parent_names = _parent_names,                          \
+                .p.parent_names = _parent_names,                        \
                 .num_parents = ARRAY_SIZE(_parent_names),               \
                 .periph = TEGRA_CLK_PERIPH(_mux_shift, _mux_mask,       \
                                            _mux_flags, _div_shift,      \
                                            _div_width, _div_frac_width, \
                                            _div_flags, _clk_num,        \
-                                           _enb_refcnt, _regs,          \
-                                           _gate_flags, _table),        \
+                                           _gate_flags, _table, _lock), \
                 .offset = _offset,                                      \
                 .con_id = _con_id,                                      \
                 .dev_id = _dev_id,                                      \
@@ -505,13 +502,13 @@ struct tegra_periph_init_data {
 
 #define TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parent_names, _offset,\
                         _mux_shift, _mux_width, _mux_flags, _div_shift, \
-                        _div_width, _div_frac_width, _div_flags, _regs, \
-                        _clk_num, _enb_refcnt, _gate_flags, _clk_id)    \
+                        _div_width, _div_frac_width, _div_flags, \
+                        _clk_num, _gate_flags, _clk_id) \
         TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parent_names, _offset,\
                         _mux_shift, BIT(_mux_width) - 1, _mux_flags,    \
                         _div_shift, _div_width, _div_frac_width, _div_flags, \
-                        _regs, _clk_num, _enb_refcnt, _gate_flags, _clk_id,\
-                        NULL, 0)
+                        _clk_num, _gate_flags, _clk_id,\
+                        NULL, 0, NULL)
 
 /**
  * struct clk_super_mux - super clock
@@ -581,12 +578,49 @@ struct tegra_clk_duplicate {
                 },                              \
         }
 
+struct tegra_clk {
+        int                     dt_id;
+        bool                    present;
+};
+
+struct tegra_devclk {
+        int             dt_id;
+        char            *dev_id;
+        char            *con_id;
+};
+
 void tegra_init_from_table(struct tegra_clk_init_table *tbl,
                 struct clk *clks[], int clk_max);
 
 void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
                 struct clk *clks[], int clk_max);
 
+struct tegra_clk_periph_regs *get_reg_bank(int clkid);
+struct clk **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
+
+struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
+
+void tegra_add_of_provider(struct device_node *np);
+void tegra_register_devclks(struct tegra_devclk *dev_clks, int num);
+
+void tegra_audio_clk_init(void __iomem *clk_base,
+                        void __iomem *pmc_base, struct tegra_clk *tegra_clks,
+                        struct tegra_clk_pll_params *pll_params);
+
+void tegra_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base,
+                        struct tegra_clk *tegra_clks,
+                        struct tegra_clk_pll_params *pll_params);
+
+void tegra_pmc_clk_init(void __iomem *pmc_base, struct tegra_clk *tegra_clks);
+void tegra_fixed_clk_init(struct tegra_clk *tegra_clks);
+int tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *tegra_clks,
+                                unsigned long *input_freqs, int num,
+                                unsigned long *osc_freq,
+                                unsigned long *pll_ref_freq);
+void tegra_super_clk_gen4_init(void __iomem *clk_base,
+                        void __iomem *pmc_base, struct tegra_clk *tegra_clks,
+                        struct tegra_clk_pll_params *pll_params);
+
 void tegra114_clock_tune_cpu_trimmers_high(void);
 void tegra114_clock_tune_cpu_trimmers_low(void);
 void tegra114_clock_tune_cpu_trimmers_init(void);
diff --git a/drivers/cpufreq/at32ap-cpufreq.c b/drivers/cpufreq/at32ap-cpufreq.c
index 856ad80418ae..7c03dd84f66a 100644
--- a/drivers/cpufreq/at32ap-cpufreq.c
+++ b/drivers/cpufreq/at32ap-cpufreq.c
@@ -58,7 +58,7 @@ static int at32_set_target(struct cpufreq_policy *policy, unsigned int index)
         return 0;
 }
 
-static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy)
+static int at32_cpufreq_driver_init(struct cpufreq_policy *policy)
 {
         unsigned int frequency, rate, min_freq;
         int retval, steps, i;
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 81e9d4412db8..02d534da22dd 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -26,7 +26,6 @@
 #include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/slab.h>
-#include <linux/suspend.h>
 #include <linux/syscore_ops.h>
 #include <linux/tick.h>
 #include <trace/events/power.h>
@@ -48,9 +47,6 @@ static LIST_HEAD(cpufreq_policy_list);
 static DEFINE_PER_CPU(char[CPUFREQ_NAME_LEN], cpufreq_cpu_governor);
 #endif
 
-/* Flag to suspend/resume CPUFreq governors */
-static bool cpufreq_suspended;
-
 static inline bool has_target(void)
 {
         return cpufreq_driver->target_index || cpufreq_driver->target;
@@ -1466,41 +1462,6 @@ static struct subsys_interface cpufreq_interface = {
         .remove_dev     = cpufreq_remove_dev,
 };
 
-void cpufreq_suspend(void)
-{
-        struct cpufreq_policy *policy;
-
-        if (!has_target())
-                return;
-
-        pr_debug("%s: Suspending Governors\n", __func__);
-
-        list_for_each_entry(policy, &cpufreq_policy_list, policy_list)
-                if (__cpufreq_governor(policy, CPUFREQ_GOV_STOP))
-                        pr_err("%s: Failed to stop governor for policy: %p\n",
-                                __func__, policy);
-
-        cpufreq_suspended = true;
-}
-
-void cpufreq_resume(void)
-{
-        struct cpufreq_policy *policy;
-
-        if (!has_target())
-                return;
-
-        pr_debug("%s: Resuming Governors\n", __func__);
-
-        cpufreq_suspended = false;
-
-        list_for_each_entry(policy, &cpufreq_policy_list, policy_list)
-                if (__cpufreq_governor(policy, CPUFREQ_GOV_START)
-                    || __cpufreq_governor(policy, CPUFREQ_GOV_LIMITS))
-                        pr_err("%s: Failed to start governor for policy: %p\n",
-                                __func__, policy);
-}
-
 /**
  * cpufreq_bp_suspend - Prepare the boot CPU for system suspend.
  *
@@ -1803,10 +1764,6 @@ static int __cpufreq_governor(struct cpufreq_policy *policy,
         struct cpufreq_governor *gov = NULL;
 #endif
 
-        /* Don't start any governor operations if we are entering suspend */
-        if (cpufreq_suspended)
-                return 0;
-
         if (policy->governor->max_transition_latency &&
             policy->cpuinfo.transition_latency >
             policy->governor->max_transition_latency) {
@@ -2119,6 +2076,9 @@ static int cpufreq_cpu_callback(struct notifier_block *nfb,
         dev = get_cpu_device(cpu);
         if (dev) {
 
+                if (action & CPU_TASKS_FROZEN)
+                        frozen = true;
+
                 switch (action & ~CPU_TASKS_FROZEN) {
                 case CPU_ONLINE:
                         __cpufreq_add_dev(dev, NULL, frozen);
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 16a2aa28f856..ec4ee5c1fe9d 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -1169,7 +1169,7 @@ static void pl08x_desc_free(struct virt_dma_desc *vd)
         struct pl08x_txd *txd = to_pl08x_txd(&vd->tx);
         struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan);
 
-        dma_descriptor_unmap(txd);
+        dma_descriptor_unmap(&vd->tx);
         if (!txd->done)
                 pl08x_release_mux(plchan);
 
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index ea806bdc12ef..24095ff8a93b 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -535,11 +535,41 @@ struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
 }
 EXPORT_SYMBOL_GPL(dma_get_slave_channel);
 
+struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
+{
+        dma_cap_mask_t mask;
+        struct dma_chan *chan;
+        int err;
+
+        dma_cap_zero(mask);
+        dma_cap_set(DMA_SLAVE, mask);
+
+        /* lock against __dma_request_channel */
+        mutex_lock(&dma_list_mutex);
+
+        chan = private_candidate(&mask, device, NULL, NULL);
+        if (chan) {
+                err = dma_chan_get(chan);
+                if (err) {
+                        pr_debug("%s: failed to get %s: (%d)\n",
+                                __func__, dma_chan_name(chan), err);
+                        chan = NULL;
+                }
+        }
+
+        mutex_unlock(&dma_list_mutex);
+
+        return chan;
+}
+EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
+
 /**
  * __dma_request_channel - try to allocate an exclusive channel
  * @mask: capabilities that the channel must satisfy
  * @fn: optional callback to disposition available channels
  * @fn_param: opaque parameter to pass to dma_filter_fn
+ *
+ * Returns pointer to appropriate DMA channel on success or NULL.
  */
 struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
                                        dma_filter_fn fn, void *fn_param)
@@ -591,18 +621,43 @@ EXPORT_SYMBOL_GPL(__dma_request_channel);
  * dma_request_slave_channel - try to allocate an exclusive slave channel
  * @dev:        pointer to client device structure
  * @name:       slave channel name
+ *
+ * Returns pointer to appropriate DMA channel on success or an error pointer.
  */
-struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name)
+struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
+                                                  const char *name)
 {
+        struct dma_chan *chan;
+
         /* If device-tree is present get slave info from here */
         if (dev->of_node)
                 return of_dma_request_slave_channel(dev->of_node, name);
 
         /* If device was enumerated by ACPI get slave info from here */
-        if (ACPI_HANDLE(dev))
-                return acpi_dma_request_slave_chan_by_name(dev, name);
+        if (ACPI_HANDLE(dev)) {
+                chan = acpi_dma_request_slave_chan_by_name(dev, name);
+                if (chan)
+                        return chan;
+        }
 
-        return NULL;
+        return ERR_PTR(-ENODEV);
+}
+EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason);
+
+/**
+ * dma_request_slave_channel - try to allocate an exclusive slave channel
+ * @dev:        pointer to client device structure
+ * @name:       slave channel name
+ *
+ * Returns pointer to appropriate DMA channel on success or NULL.
+ */
+struct dma_chan *dma_request_slave_channel(struct device *dev,
+                                           const char *name)
+{
+        struct dma_chan *ch = dma_request_slave_channel_reason(dev, name);
+        if (IS_ERR(ch))
+                return NULL;
+        return ch;
 }
 EXPORT_SYMBOL_GPL(dma_request_slave_channel);
 
diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
index dcb1e05149a7..c6a01ea8bc59 100644
--- a/drivers/dma/mmp_pdma.c
+++ b/drivers/dma/mmp_pdma.c
@@ -893,33 +893,17 @@ static struct dma_chan *mmp_pdma_dma_xlate(struct of_phandle_args *dma_spec,
                                            struct of_dma *ofdma)
 {
         struct mmp_pdma_device *d = ofdma->of_dma_data;
-        struct dma_chan *chan, *candidate;
+        struct dma_chan *chan;
+        struct mmp_pdma_chan *c;
 
-retry:
-        candidate = NULL;
-
-        /* walk the list of channels registered with the current instance and
-         * find one that is currently unused */
-        list_for_each_entry(chan, &d->device.channels, device_node)
-                if (chan->client_count == 0) {
-                        candidate = chan;
-                        break;
-                }
-
-        if (!candidate)
+        chan = dma_get_any_slave_channel(&d->device);
+        if (!chan)
                 return NULL;
 
-        /* dma_get_slave_channel will return NULL if we lost a race between
-         * the lookup and the reservation */
-        chan = dma_get_slave_channel(candidate);
-
-        if (chan) {
-                struct mmp_pdma_chan *c = to_mmp_pdma_chan(chan);
-                c->drcmr = dma_spec->args[0];
-                return chan;
-        }
+        c = to_mmp_pdma_chan(chan);
+        c->drcmr = dma_spec->args[0];
 
-        goto retry;
+        return chan;
 }
 
 static int mmp_pdma_probe(struct platform_device *op)
@@ -1017,6 +1001,7 @@ static int mmp_pdma_probe(struct platform_device *op)
                 }
         }
 
+        platform_set_drvdata(op, pdev);
         dev_info(pdev->device.dev, "initialized %d channels\n", dma_channels);
         return 0;
 }
diff --git a/drivers/dma/of-dma.c b/drivers/dma/of-dma.c
index 0b88dd3d05f4..e8fe9dc455f4 100644
--- a/drivers/dma/of-dma.c
+++ b/drivers/dma/of-dma.c
@@ -143,7 +143,7 @@ static int of_dma_match_channel(struct device_node *np, const char *name,
  * @np:         device node to get DMA request from
  * @name:       name of desired channel
  *
- * Returns pointer to appropriate dma channel on success or NULL on error.
+ * Returns pointer to appropriate DMA channel on success or an error pointer.
  */
 struct dma_chan *of_dma_request_slave_channel(struct device_node *np,
                                               const char *name)
@@ -152,17 +152,18 @@ struct dma_chan *of_dma_request_slave_channel(struct device_node *np,
         struct of_dma           *ofdma;
         struct dma_chan         *chan;
         int                     count, i;
+        int                     ret_no_channel = -ENODEV;
 
         if (!np || !name) {
                 pr_err("%s: not enough information provided\n", __func__);
-                return NULL;
+                return ERR_PTR(-ENODEV);
         }
 
         count = of_property_count_strings(np, "dma-names");
         if (count < 0) {
                 pr_err("%s: dma-names property of node '%s' missing or empty\n",
                         __func__, np->full_name);
-                return NULL;
+                return ERR_PTR(-ENODEV);
         }
 
         for (i = 0; i < count; i++) {
@@ -172,10 +173,12 @@ struct dma_chan *of_dma_request_slave_channel(struct device_node *np,
                 mutex_lock(&of_dma_lock);
                 ofdma = of_dma_find_controller(&dma_spec);
 
-                if (ofdma)
+                if (ofdma) {
                         chan = ofdma->of_dma_xlate(&dma_spec, ofdma);
-                else
+                } else {
+                        ret_no_channel = -EPROBE_DEFER;
                         chan = NULL;
+                }
 
                 mutex_unlock(&of_dma_lock);
 
@@ -185,7 +188,7 @@ struct dma_chan *of_dma_request_slave_channel(struct device_node *np,
                         return chan;
         }
 
-        return NULL;
+        return ERR_PTR(ret_no_channel);
 }
 
 /**
diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
index 4cb127978636..4eddedb6eb7d 100644
--- a/drivers/dma/s3c24xx-dma.c
+++ b/drivers/dma/s3c24xx-dma.c
@@ -628,42 +628,13 @@ retry:
         s3cchan->state = S3C24XX_DMA_CHAN_IDLE;
 }
 
-static void s3c24xx_dma_unmap_buffers(struct s3c24xx_txd *txd)
-{
-        struct device *dev = txd->vd.tx.chan->device->dev;
-        struct s3c24xx_sg *dsg;
-
-        if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
-                if (txd->vd.tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_single(dev, dsg->src_addr, dsg->len,
-                                                DMA_TO_DEVICE);
-                else {
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_page(dev, dsg->src_addr, dsg->len,
-                                                DMA_TO_DEVICE);
-                }
-        }
-
-        if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
-                if (txd->vd.tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_single(dev, dsg->dst_addr, dsg->len,
-                                                DMA_FROM_DEVICE);
-                else
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_page(dev, dsg->dst_addr, dsg->len,
-                                                DMA_FROM_DEVICE);
-        }
-}
-
 static void s3c24xx_dma_desc_free(struct virt_dma_desc *vd)
 {
         struct s3c24xx_txd *txd = to_s3c24xx_txd(&vd->tx);
         struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(vd->tx.chan);
 
         if (!s3cchan->slave)
-                s3c24xx_dma_unmap_buffers(txd);
+                dma_descriptor_unmap(&vd->tx);
 
         s3c24xx_dma_free_txd(txd);
 }
@@ -795,7 +766,7 @@ static enum dma_status s3c24xx_dma_tx_status(struct dma_chan *chan,
 
         spin_lock_irqsave(&s3cchan->vc.lock, flags);
         ret = dma_cookie_status(chan, cookie, txstate);
-        if (ret == DMA_SUCCESS) {
+        if (ret == DMA_COMPLETE) {
                 spin_unlock_irqrestore(&s3cchan->vc.lock, flags);
                 return ret;
         }
diff --git a/drivers/dma/sh/rcar-hpbdma.c b/drivers/dma/sh/rcar-hpbdma.c
index ebad84591a6e..3083d901a414 100644
--- a/drivers/dma/sh/rcar-hpbdma.c
+++ b/drivers/dma/sh/rcar-hpbdma.c
@@ -60,6 +60,7 @@
 #define HPB_DMAE_DSTPR_DMSTP    BIT(0)
 
 /* DMA status register (DSTSR) bits */
+#define HPB_DMAE_DSTSR_DQSTS    BIT(2)
 #define HPB_DMAE_DSTSR_DMSTS    BIT(0)
 
 /* DMA common registers */
@@ -286,6 +287,9 @@ static void hpb_dmae_halt(struct shdma_chan *schan)
 
         ch_reg_write(chan, HPB_DMAE_DCMDR_DQEND, HPB_DMAE_DCMDR);
         ch_reg_write(chan, HPB_DMAE_DSTPR_DMSTP, HPB_DMAE_DSTPR);
+
+        chan->plane_idx = 0;
+        chan->first_desc = true;
 }
 
 static const struct hpb_dmae_slave_config *
@@ -385,7 +389,10 @@ static bool hpb_dmae_channel_busy(struct shdma_chan *schan)
         struct hpb_dmae_chan *chan = to_chan(schan);
         u32 dstsr = ch_reg_read(chan, HPB_DMAE_DSTSR);
 
-        return (dstsr & HPB_DMAE_DSTSR_DMSTS) == HPB_DMAE_DSTSR_DMSTS;
+        if (chan->xfer_mode == XFER_DOUBLE)
+                return dstsr & HPB_DMAE_DSTSR_DQSTS;
+        else
+                return dstsr & HPB_DMAE_DSTSR_DMSTS;
 }
 
 static int
@@ -510,6 +517,8 @@ static int hpb_dmae_chan_probe(struct hpb_dmae_device *hpbdev, int id)
         }
 
         schan = &new_hpb_chan->shdma_chan;
+        schan->max_xfer_len = HPB_DMA_TCR_MAX;
+
         shdma_chan_probe(sdev, schan, id);
 
         if (pdev->id >= 0)
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 73654e33f13b..d11bb3620f27 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -1,7 +1,7 @@
 /*
  * DMA driver for Nvidia's Tegra20 APB DMA controller.
  *
- * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -29,11 +29,12 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/of_dma.h>
 #include <linux/platform_device.h>
 #include <linux/pm.h>
 #include <linux/pm_runtime.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
-#include <linux/clk/tegra.h>
 
 #include "dmaengine.h"
 
@@ -199,6 +200,7 @@ struct tegra_dma_channel {
         void                    *callback_param;
 
         /* Channel-slave specific configuration */
+        unsigned int slave_id;
         struct dma_slave_config dma_sconfig;
         struct tegra_dma_channel_regs   channel_reg;
 };
@@ -208,6 +210,7 @@ struct tegra_dma {
         struct dma_device               dma_dev;
         struct device                   *dev;
         struct clk                      *dma_clk;
+        struct reset_control            *rst;
         spinlock_t                      global_lock;
         void __iomem                    *base_addr;
         const struct tegra_dma_chip_data *chip_data;
@@ -339,6 +342,8 @@ static int tegra_dma_slave_config(struct dma_chan *dc,
         }
 
         memcpy(&tdc->dma_sconfig, sconfig, sizeof(*sconfig));
+        if (!tdc->slave_id)
+                tdc->slave_id = sconfig->slave_id;
         tdc->config_init = true;
         return 0;
 }
@@ -941,7 +946,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg(
         ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
 
         csr |= TEGRA_APBDMA_CSR_ONCE | TEGRA_APBDMA_CSR_FLOW;
-        csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
+        csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
         if (flags & DMA_PREP_INTERRUPT)
                 csr |= TEGRA_APBDMA_CSR_IE_EOC;
 
@@ -1085,7 +1090,7 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
         csr |= TEGRA_APBDMA_CSR_FLOW;
         if (flags & DMA_PREP_INTERRUPT)
                 csr |= TEGRA_APBDMA_CSR_IE_EOC;
-        csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
+        csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
 
         apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
 
@@ -1205,6 +1210,25 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc)
                 kfree(sg_req);
         }
         clk_disable_unprepare(tdma->dma_clk);
+
+        tdc->slave_id = 0;
+}
+
+static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec,
+                                           struct of_dma *ofdma)
+{
+        struct tegra_dma *tdma = ofdma->of_dma_data;
+        struct dma_chan *chan;
+        struct tegra_dma_channel *tdc;
+
+        chan = dma_get_any_slave_channel(&tdma->dma_dev);
+        if (!chan)
+                return NULL;
+
+        tdc = to_tegra_dma_chan(chan);
+        tdc->slave_id = dma_spec->args[0];
+
+        return chan;
 }
 
 /* Tegra20 specific DMA controller information */
@@ -1282,6 +1306,12 @@ static int tegra_dma_probe(struct platform_device *pdev)
                 return PTR_ERR(tdma->dma_clk);
         }
 
+        tdma->rst = devm_reset_control_get(&pdev->dev, "dma");
+        if (IS_ERR(tdma->rst)) {
+                dev_err(&pdev->dev, "Error: Missing reset\n");
+                return PTR_ERR(tdma->rst);
+        }
+
         spin_lock_init(&tdma->global_lock);
 
         pm_runtime_enable(&pdev->dev);
@@ -1302,9 +1332,9 @@ static int tegra_dma_probe(struct platform_device *pdev)
         }
 
         /* Reset DMA controller */
-        tegra_periph_reset_assert(tdma->dma_clk);
+        reset_control_assert(tdma->rst);
         udelay(2);
-        tegra_periph_reset_deassert(tdma->dma_clk);
+        reset_control_deassert(tdma->rst);
 
         /* Enable global DMA registers */
         tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE);
@@ -1376,10 +1406,20 @@ static int tegra_dma_probe(struct platform_device *pdev)
                 goto err_irq;
         }
 
+        ret = of_dma_controller_register(pdev->dev.of_node,
+                                         tegra_dma_of_xlate, tdma);
+        if (ret < 0) {
+                dev_err(&pdev->dev,
+                        "Tegra20 APB DMA OF registration failed %d\n", ret);
+                goto err_unregister_dma_dev;
+        }
+
         dev_info(&pdev->dev, "Tegra20 APB DMA driver register %d channels\n",
                         cdata->nr_channels);
         return 0;
 
+err_unregister_dma_dev:
+        dma_async_device_unregister(&tdma->dma_dev);
 err_irq:
         while (--i >= 0) {
                 struct tegra_dma_channel *tdc = &tdma->channels[i];
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index 8472405c5586..d7f1b57bd3be 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -945,7 +945,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
         u32                     tad_offset;
         u32                     rir_way;
         u32                     mb, kb;
-        u64                     ch_addr, offset, limit, prv = 0;
+        u64                     ch_addr, offset, limit = 0, prv = 0;
 
 
         /*
diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c
index 3c55ec856e39..a287cece0593 100644
--- a/drivers/extcon/extcon-arizona.c
+++ b/drivers/extcon/extcon-arizona.c
@@ -1082,7 +1082,7 @@ static void arizona_micd_set_level(struct arizona *arizona, int index,
 static int arizona_extcon_probe(struct platform_device *pdev)
 {
         struct arizona *arizona = dev_get_drvdata(pdev->dev.parent);
-        struct arizona_pdata *pdata;
+        struct arizona_pdata *pdata = &arizona->pdata;
         struct arizona_extcon_info *info;
         unsigned int val;
         int jack_irq_fall, jack_irq_rise;
@@ -1091,8 +1091,6 @@ static int arizona_extcon_probe(struct platform_device *pdev)
         if (!arizona->dapm || !arizona->dapm->card)
                 return -EPROBE_DEFER;
 
-        pdata = dev_get_platdata(arizona->dev);
-
         info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
         if (!info) {
                 dev_err(&pdev->dev, "Failed to allocate memory\n");
diff --git a/drivers/extcon/extcon-class.c b/drivers/extcon/extcon-class.c
index 15443d3b6be1..76322330cbd7 100644
--- a/drivers/extcon/extcon-class.c
+++ b/drivers/extcon/extcon-class.c
@@ -792,6 +792,8 @@ void extcon_dev_unregister(struct extcon_dev *edev)
                 return;
         }
 
+        device_unregister(&edev->dev);
+
         if (edev->mutually_exclusive && edev->max_supported) {
                 for (index = 0; edev->mutually_exclusive[index];
                                 index++)
@@ -812,7 +814,6 @@ void extcon_dev_unregister(struct extcon_dev *edev)
         if (switch_class)
                 class_compat_remove_link(switch_class, &edev->dev, NULL);
 #endif
-        device_unregister(&edev->dev);
         put_device(&edev->dev);
 }
 EXPORT_SYMBOL_GPL(extcon_dev_unregister);
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 8847adf392b7..84be70157ad6 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -327,7 +327,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
          * NOTE:  we assume for now that only irqs in the first gpio_chip
          * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs).
          */
-        if (offset < d->irq_base)
+        if (offset < d->gpio_unbanked)
                 return d->gpio_irq + offset;
         else
                 return -ENODEV;
@@ -419,6 +419,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 
                 /* pass "bank 0" GPIO IRQs to AINTC */
                 chips[0].chip.to_irq = gpio_to_irq_unbanked;
+                chips[0].gpio_irq = bank_irq;
+                chips[0].gpio_unbanked = pdata->gpio_unbanked;
                 binten = BIT(0);
 
                 /* AINTC handles mask/unmask; GPIO handles triggering */
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index fb7cf0e796f6..0a1e4a5f4234 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2674,7 +2674,7 @@ static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
         int modes = 0;
         u8 cea_mode;
 
-        if (video_db == NULL || video_index > video_len)
+        if (video_db == NULL || video_index >= video_len)
                 return 0;
 
         /* CEA modes are numbered 1..127 */
@@ -2701,7 +2701,7 @@ static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
         if (structure & (1 << 8)) {
                 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
                 if (newmode) {
-                        newmode->flags = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
+                        newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
                         drm_mode_probed_add(connector, newmode);
                         modes++;
                 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index b676006a95a0..22b8f5eced80 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -173,28 +173,37 @@ static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
 static void exynos_drm_preclose(struct drm_device *dev,
                                         struct drm_file *file)
 {
+        exynos_drm_subdrv_close(dev, file);
+}
+
+static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file)
+{
         struct exynos_drm_private *private = dev->dev_private;
-        struct drm_pending_vblank_event *e, *t;
+        struct drm_pending_vblank_event *v, *vt;
+        struct drm_pending_event *e, *et;
         unsigned long flags;
 
-        /* release events of current file */
+        if (!file->driver_priv)
+                return;
+
+        /* Release all events not unhandled by page flip handler. */
         spin_lock_irqsave(&dev->event_lock, flags);
-        list_for_each_entry_safe(e, t, &private->pageflip_event_list,
+        list_for_each_entry_safe(v, vt, &private->pageflip_event_list,
                         base.link) {
-                if (e->base.file_priv == file) {
-                        list_del(&e->base.link);
-                        e->base.destroy(&e->base);
+                if (v->base.file_priv == file) {
+                        list_del(&v->base.link);
+                        drm_vblank_put(dev, v->pipe);
+                        v->base.destroy(&v->base);
                 }
         }
-        spin_unlock_irqrestore(&dev->event_lock, flags);
 
-        exynos_drm_subdrv_close(dev, file);
-}
+        /* Release all events handled by page flip handler but not freed. */
+        list_for_each_entry_safe(e, et, &file->event_list, link) {
+                list_del(&e->link);
+                e->destroy(e);
+        }
+        spin_unlock_irqrestore(&dev->event_lock, flags);
 
-static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file)
-{
-        if (!file->driver_priv)
-                return;
 
         kfree(file->driver_priv);
         file->driver_priv = NULL;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 23da72b5eae9..a61878bf5dcd 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -31,7 +31,7 @@
 #include "exynos_drm_iommu.h"
 
 /*
- * FIMD is stand for Fully Interactive Mobile Display and
+ * FIMD stands for Fully Interactive Mobile Display and
  * as a display controller, it transfers contents drawn on memory
  * to a LCD Panel through Display Interfaces such as RGB or
  * CPU Interface.
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 989be12cdd6e..2e367a1c6a64 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -534,8 +534,10 @@ static int i915_drm_freeze(struct drm_device *dev)
                  * Disable CRTCs directly since we want to preserve sw state
                  * for _thaw.
                  */
+                mutex_lock(&dev->mode_config.mutex);
                 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
                         dev_priv->display.crtc_disable(crtc);
+                mutex_unlock(&dev->mode_config.mutex);
 
                 intel_modeset_suspend_hw(dev);
         }
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 12bbd5eac70d..621c7c67a643 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4442,10 +4442,9 @@ i915_gem_init_hw(struct drm_device *dev)
         if (dev_priv->ellc_size)
                 I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
 
-        if (IS_HSW_GT3(dev))
-                I915_WRITE(MI_PREDICATE_RESULT_2, LOWER_SLICE_ENABLED);
-        else
-                I915_WRITE(MI_PREDICATE_RESULT_2, LOWER_SLICE_DISABLED);
+        if (IS_HASWELL(dev))
+                I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev) ?
+                           LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
 
         if (HAS_PCH_NOP(dev)) {
                 u32 temp = I915_READ(GEN7_MSG_CTL);
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index 7d5752fda5f1..9bb533e0d762 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -125,13 +125,15 @@ static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)
 
         ret = i915_gem_object_get_pages(obj);
         if (ret)
-                goto error;
+                goto err;
+
+        i915_gem_object_pin_pages(obj);
 
         ret = -ENOMEM;
 
         pages = drm_malloc_ab(obj->base.size >> PAGE_SHIFT, sizeof(*pages));
         if (pages == NULL)
-                goto error;
+                goto err_unpin;
 
         i = 0;
         for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents, 0)
@@ -141,15 +143,16 @@ static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)
         drm_free_large(pages);
 
         if (!obj->dma_buf_vmapping)
-                goto error;
+                goto err_unpin;
 
         obj->vmapping_count = 1;
-        i915_gem_object_pin_pages(obj);
 out_unlock:
         mutex_unlock(&dev->struct_mutex);
         return obj->dma_buf_vmapping;
 
-error:
+err_unpin:
+        i915_gem_object_unpin_pages(obj);
+err:
         mutex_unlock(&dev->struct_mutex);
         return ERR_PTR(ret);
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 885d595e0e02..b7e787fb4649 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -33,6 +33,9 @@
 #include "intel_drv.h"
 #include <linux/dma_remapping.h>
 
+#define  __EXEC_OBJECT_HAS_PIN (1<<31)
+#define  __EXEC_OBJECT_HAS_FENCE (1<<30)
+
 struct eb_vmas {
         struct list_head vmas;
         int and;
@@ -187,7 +190,28 @@ static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
         }
 }
 
-static void eb_destroy(struct eb_vmas *eb) {
+static void
+i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
+{
+        struct drm_i915_gem_exec_object2 *entry;
+        struct drm_i915_gem_object *obj = vma->obj;
+
+        if (!drm_mm_node_allocated(&vma->node))
+                return;
+
+        entry = vma->exec_entry;
+
+        if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
+                i915_gem_object_unpin_fence(obj);
+
+        if (entry->flags & __EXEC_OBJECT_HAS_PIN)
+                i915_gem_object_unpin(obj);
+
+        entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
+}
+
+static void eb_destroy(struct eb_vmas *eb)
+{
         while (!list_empty(&eb->vmas)) {
                 struct i915_vma *vma;
 
@@ -195,6 +219,7 @@ static void eb_destroy(struct eb_vmas *eb) {
                                        struct i915_vma,
                                        exec_list);
                 list_del_init(&vma->exec_list);
+                i915_gem_execbuffer_unreserve_vma(vma);
                 drm_gem_object_unreference(&vma->obj->base);
         }
         kfree(eb);
@@ -478,9 +503,6 @@ i915_gem_execbuffer_relocate(struct eb_vmas *eb,
         return ret;
 }
 
-#define  __EXEC_OBJECT_HAS_PIN (1<<31)
-#define  __EXEC_OBJECT_HAS_FENCE (1<<30)
-
 static int
 need_reloc_mappable(struct i915_vma *vma)
 {
@@ -552,26 +574,6 @@ i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
         return 0;
 }
 
-static void
-i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
-{
-        struct drm_i915_gem_exec_object2 *entry;
-        struct drm_i915_gem_object *obj = vma->obj;
-
-        if (!drm_mm_node_allocated(&vma->node))
-                return;
-
-        entry = vma->exec_entry;
-
-        if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
-                i915_gem_object_unpin_fence(obj);
-
-        if (entry->flags & __EXEC_OBJECT_HAS_PIN)
-                i915_gem_object_unpin(obj);
-
-        entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
-}
-
 static int
 i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
                             struct list_head *vmas,
@@ -670,13 +672,14 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
                                 goto err;
                 }
 
-err:            /* Decrement pin count for bound objects */
-                list_for_each_entry(vma, vmas, exec_list)
-                        i915_gem_execbuffer_unreserve_vma(vma);
-
+err:
                 if (ret != -ENOSPC || retry++)
                         return ret;
 
+                /* Decrement pin count for bound objects */
+                list_for_each_entry(vma, vmas, exec_list)
+                        i915_gem_execbuffer_unreserve_vma(vma);
+
                 ret = i915_gem_evict_vm(vm, true);
                 if (ret)
                         return ret;
@@ -708,6 +711,7 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
         while (!list_empty(&eb->vmas)) {
                 vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
                 list_del_init(&vma->exec_list);
+                i915_gem_execbuffer_unreserve_vma(vma);
                 drm_gem_object_unreference(&vma->obj->base);
         }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 3620a1b0a73c..38cb8d44a013 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -57,7 +57,9 @@ typedef gen8_gtt_pte_t gen8_ppgtt_pde_t;
 #define HSW_WB_LLC_AGE3                 HSW_CACHEABILITY_CONTROL(0x2)
 #define HSW_WB_LLC_AGE0                 HSW_CACHEABILITY_CONTROL(0x3)
 #define HSW_WB_ELLC_LLC_AGE0            HSW_CACHEABILITY_CONTROL(0xb)
+#define HSW_WB_ELLC_LLC_AGE3            HSW_CACHEABILITY_CONTROL(0x8)
 #define HSW_WT_ELLC_LLC_AGE0            HSW_CACHEABILITY_CONTROL(0x6)
+#define HSW_WT_ELLC_LLC_AGE3            HSW_CACHEABILITY_CONTROL(0x7)
 
 #define GEN8_PTES_PER_PAGE              (PAGE_SIZE / sizeof(gen8_gtt_pte_t))
 #define GEN8_PDES_PER_PAGE              (PAGE_SIZE / sizeof(gen8_ppgtt_pde_t))
@@ -185,10 +187,10 @@ static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,
         case I915_CACHE_NONE:
                 break;
         case I915_CACHE_WT:
-                pte |= HSW_WT_ELLC_LLC_AGE0;
+                pte |= HSW_WT_ELLC_LLC_AGE3;
                 break;
         default:
-                pte |= HSW_WB_ELLC_LLC_AGE0;
+                pte |= HSW_WB_ELLC_LLC_AGE3;
                 break;
         }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f9eafb6ed523..ee2742122a02 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -235,6 +235,7 @@
  */
 #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*x-1)
 #define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*x-1)
+#define  MI_SRM_LRM_GLOBAL_GTT          (1<<22)
 #define MI_FLUSH_DW             MI_INSTR(0x26, 1) /* for GEN6 */
 #define   MI_FLUSH_DW_STORE_INDEX       (1<<21)
 #define   MI_INVALIDATE_TLB             (1<<18)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 330077bcd0bd..526c8ded16b0 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -173,7 +173,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
                 ddi_translations = ddi_translations_dp;
                 break;
         case PORT_D:
-                if (intel_dpd_is_edp(dev))
+                if (intel_dp_is_edp(dev, PORT_D))
                         ddi_translations = ddi_translations_edp;
                 else
                         ddi_translations = ddi_translations_dp;
@@ -1158,9 +1158,10 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder)
         if (wait)
                 intel_wait_ddi_buf_idle(dev_priv, port);
 
-        if (type == INTEL_OUTPUT_EDP) {
+        if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
                 ironlake_edp_panel_vdd_on(intel_dp);
+                intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
                 ironlake_edp_panel_off(intel_dp);
         }
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7ec8b488bb1d..080f6fd4e839 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5815,7 +5815,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc)
                 uint16_t postoff = 0;
 
                 if (intel_crtc->config.limited_color_range)
-                        postoff = (16 * (1 << 13) / 255) & 0x1fff;
+                        postoff = (16 * (1 << 12) / 255) & 0x1fff;
 
                 I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);
                 I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff);
@@ -6402,7 +6402,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
 
         /* Make sure we're not on PC8 state before disabling PC8, otherwise
          * we'll hang the machine! */
-        dev_priv->uncore.funcs.force_wake_get(dev_priv);
+        gen6_gt_force_wake_get(dev_priv);
 
         if (val & LCPLL_POWER_DOWN_ALLOW) {
                 val &= ~LCPLL_POWER_DOWN_ALLOW;
@@ -6436,7 +6436,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
                         DRM_ERROR("Switching back to LCPLL failed\n");
         }
 
-        dev_priv->uncore.funcs.force_wake_put(dev_priv);
+        gen6_gt_force_wake_put(dev_priv);
 }
 
 void hsw_enable_pc8_work(struct work_struct *__work)
@@ -8354,7 +8354,8 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
                 intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE |
                                         DERRMR_PIPEB_PRI_FLIP_DONE |
                                         DERRMR_PIPEC_PRI_FLIP_DONE));
-                intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1));
+                intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1) |
+                                MI_SRM_LRM_GLOBAL_GTT);
                 intel_ring_emit(ring, DERRMR);
                 intel_ring_emit(ring, ring->scratch.gtt_offset + 256);
         }
@@ -10049,7 +10050,7 @@ static void intel_setup_outputs(struct drm_device *dev)
                         intel_ddi_init(dev, PORT_D);
         } else if (HAS_PCH_SPLIT(dev)) {
                 int found;
-                dpd_is_edp = intel_dpd_is_edp(dev);
+                dpd_is_edp = intel_dp_is_edp(dev, PORT_D);
 
                 if (has_edp_a(dev))
                         intel_dp_init(dev, DP_A, PORT_A);
@@ -10086,8 +10087,7 @@ static void intel_setup_outputs(struct drm_device *dev)
                         intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC,
                                         PORT_C);
                         if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED)
-                                intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C,
-                                              PORT_C);
+                                intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C);
                 }
 
                 intel_dsi_init(dev);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0b2e842fef01..30c627c7b7ba 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3326,11 +3326,19 @@ intel_trans_dp_port_sel(struct drm_crtc *crtc)
 }
 
 /* check the VBT to see whether the eDP is on DP-D port */
-bool intel_dpd_is_edp(struct drm_device *dev)
+bool intel_dp_is_edp(struct drm_device *dev, enum port port)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         union child_device_config *p_child;
         int i;
+        static const short port_mapping[] = {
+                [PORT_B] = PORT_IDPB,
+                [PORT_C] = PORT_IDPC,
+                [PORT_D] = PORT_IDPD,
+        };
+
+        if (port == PORT_A)
+                return true;
 
         if (!dev_priv->vbt.child_dev_num)
                 return false;
@@ -3338,7 +3346,7 @@ bool intel_dpd_is_edp(struct drm_device *dev)
         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
                 p_child = dev_priv->vbt.child_dev + i;
 
-                if (p_child->common.dvo_port == PORT_IDPD &&
+                if (p_child->common.dvo_port == port_mapping[port] &&
                     (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
                     (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
                         return true;
@@ -3616,26 +3624,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
         intel_dp->DP = I915_READ(intel_dp->output_reg);
         intel_dp->attached_connector = intel_connector;
 
-        type = DRM_MODE_CONNECTOR_DisplayPort;
-        /*
-         * FIXME : We need to initialize built-in panels before external panels.
-         * For X0, DP_C is fixed as eDP. Revisit this as part of VLV eDP cleanup
-         */
-        switch (port) {
-        case PORT_A:
+        if (intel_dp_is_edp(dev, port))
                 type = DRM_MODE_CONNECTOR_eDP;
-                break;
-        case PORT_C:
-                if (IS_VALLEYVIEW(dev))
-                        type = DRM_MODE_CONNECTOR_eDP;
-                break;
-        case PORT_D:
-                if (HAS_PCH_SPLIT(dev) && intel_dpd_is_edp(dev))
-                        type = DRM_MODE_CONNECTOR_eDP;
-                break;
-        default:        /* silence GCC warning */
-                break;
-        }
+        else
+                type = DRM_MODE_CONNECTOR_DisplayPort;
 
         /*
          * For eDP we always set the encoder type to INTEL_OUTPUT_EDP, but
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1e49aa8f5377..a18e88b3e425 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -708,7 +708,7 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder);
 void intel_dp_check_link_status(struct intel_dp *intel_dp);
 bool intel_dp_compute_config(struct intel_encoder *encoder,
                              struct intel_crtc_config *pipe_config);
-bool intel_dpd_is_edp(struct drm_device *dev);
+bool intel_dp_is_edp(struct drm_device *dev, enum port port);
 void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
 void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
 void ironlake_edp_panel_on(struct intel_dp *intel_dp);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index caf2ee4e5441..6e0d5e075b15 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1180,7 +1180,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
 
         adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
         clock = adjusted_mode->crtc_clock;
-        htotal = adjusted_mode->htotal;
+        htotal = adjusted_mode->crtc_htotal;
         hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
         pixel_size = crtc->fb->bits_per_pixel / 8;
 
@@ -1267,7 +1267,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
         crtc = intel_get_crtc_for_plane(dev, plane);
         adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
         clock = adjusted_mode->crtc_clock;
-        htotal = adjusted_mode->htotal;
+        htotal = adjusted_mode->crtc_htotal;
         hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
         pixel_size = crtc->fb->bits_per_pixel / 8;
 
@@ -1498,7 +1498,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
                 const struct drm_display_mode *adjusted_mode =
                         &to_intel_crtc(crtc)->config.adjusted_mode;
                 int clock = adjusted_mode->crtc_clock;
-                int htotal = adjusted_mode->htotal;
+                int htotal = adjusted_mode->crtc_htotal;
                 int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
                 int pixel_size = crtc->fb->bits_per_pixel / 8;
                 unsigned long line_time_us;
@@ -1624,7 +1624,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
                 const struct drm_display_mode *adjusted_mode =
                         &to_intel_crtc(enabled)->config.adjusted_mode;
                 int clock = adjusted_mode->crtc_clock;
-                int htotal = adjusted_mode->htotal;
+                int htotal = adjusted_mode->crtc_htotal;
                 int hdisplay = to_intel_crtc(enabled)->config.pipe_src_w;
                 int pixel_size = enabled->fb->bits_per_pixel / 8;
                 unsigned long line_time_us;
@@ -1776,7 +1776,7 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
         crtc = intel_get_crtc_for_plane(dev, plane);
         adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
         clock = adjusted_mode->crtc_clock;
-        htotal = adjusted_mode->htotal;
+        htotal = adjusted_mode->crtc_htotal;
         hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
         pixel_size = crtc->fb->bits_per_pixel / 8;
 
@@ -2469,8 +2469,9 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
         /* The WM are computed with base on how long it takes to fill a single
          * row at the given clock rate, multiplied by 8.
          * */
-        linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock);
-        ips_linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8,
+        linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
+                                     mode->crtc_clock);
+        ips_linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
                                          intel_ddi_get_cdclk_freq(dev_priv));
 
         return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) |
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index edcf801613e6..b3fa1ba191b7 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -59,6 +59,7 @@ nouveau-y += core/subdev/clock/nv40.o
 nouveau-y += core/subdev/clock/nv50.o
 nouveau-y += core/subdev/clock/nv84.o
 nouveau-y += core/subdev/clock/nva3.o
+nouveau-y += core/subdev/clock/nvaa.o
 nouveau-y += core/subdev/clock/nvc0.o
 nouveau-y += core/subdev/clock/nve0.o
 nouveau-y += core/subdev/clock/pllnv04.o
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv50.c b/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
index db139827047c..db3fc7be856a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
@@ -283,7 +283,7 @@ nv50_identify(struct nouveau_device *device)
                 device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
                 device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                 device->oclass[NVDEV_SUBDEV_I2C    ] = &nv94_i2c_oclass;
-                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nv84_clock_oclass;
+                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nvaa_clock_oclass;
                 device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                 device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
@@ -311,7 +311,7 @@ nv50_identify(struct nouveau_device *device)
                 device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
                 device->oclass[NVDEV_SUBDEV_GPIO   ] = &nv50_gpio_oclass;
                 device->oclass[NVDEV_SUBDEV_I2C    ] = &nv94_i2c_oclass;
-                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nv84_clock_oclass;
+                device->oclass[NVDEV_SUBDEV_CLOCK  ] =  nvaa_clock_oclass;
                 device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                 device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
index 5f555788121c..e6352bd5b4ff 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
@@ -33,6 +33,7 @@
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
 
+#include "nv04.h"
 #include "nv50.h"
 
 /*******************************************************************************
@@ -460,6 +461,8 @@ nv50_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
         nv_subdev(priv)->intr = nv04_fifo_intr;
         nv_engine(priv)->cclass = &nv50_fifo_cclass;
         nv_engine(priv)->sclass = nv50_fifo_sclass;
+        priv->base.pause = nv04_fifo_pause;
+        priv->base.start = nv04_fifo_start;
         return 0;
 }
 
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
index 0908dc834c84..fe0f41e65d9b 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
@@ -35,6 +35,7 @@
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
 
+#include "nv04.h"
 #include "nv50.h"
 
 /*******************************************************************************
@@ -432,6 +433,8 @@ nv84_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
         nv_subdev(priv)->intr = nv04_fifo_intr;
         nv_engine(priv)->cclass = &nv84_fifo_cclass;
         nv_engine(priv)->sclass = nv84_fifo_sclass;
+        priv->base.pause = nv04_fifo_pause;
+        priv->base.start = nv04_fifo_start;
         return 0;
 }
 
diff --git a/drivers/gpu/drm/nouveau/core/engine/software/nv50.c b/drivers/gpu/drm/nouveau/core/engine/software/nv50.c
index b574dd4bb828..5ce686ee729e 100644
--- a/drivers/gpu/drm/nouveau/core/engine/software/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/software/nv50.c
@@ -176,7 +176,7 @@ nv50_software_context_ctor(struct nouveau_object *parent,
         if (ret)
                 return ret;
 
-        chan->vblank.nr_event = pdisp->vblank->index_nr;
+        chan->vblank.nr_event = pdisp ? pdisp->vblank->index_nr : 0;
         chan->vblank.event = kzalloc(chan->vblank.nr_event *
                                      sizeof(*chan->vblank.event), GFP_KERNEL);
         if (!chan->vblank.event)
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
index e2675bc0edba..8f4ced75444a 100644
--- a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
+++ b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
@@ -14,6 +14,9 @@ enum nv_clk_src {
         nv_clk_src_hclk,
         nv_clk_src_hclkm3,
         nv_clk_src_hclkm3d2,
+        nv_clk_src_hclkm2d3, /* NVAA */
+        nv_clk_src_hclkm4, /* NVAA */
+        nv_clk_src_cclk, /* NVAA */
 
         nv_clk_src_host,
 
@@ -127,6 +130,7 @@ extern struct nouveau_oclass nv04_clock_oclass;
 extern struct nouveau_oclass nv40_clock_oclass;
 extern struct nouveau_oclass *nv50_clock_oclass;
 extern struct nouveau_oclass *nv84_clock_oclass;
+extern struct nouveau_oclass *nvaa_clock_oclass;
 extern struct nouveau_oclass nva3_clock_oclass;
 extern struct nouveau_oclass nvc0_clock_oclass;
 extern struct nouveau_oclass nve0_clock_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
index da50c1b12928..30c1f3a4158e 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
@@ -69,6 +69,11 @@ nv04_clock_pll_prog(struct nouveau_clock *clk, u32 reg1,
         return 0;
 }
 
+static struct nouveau_clocks
+nv04_domain[] = {
+        { nv_clk_src_max }
+};
+
 static int
 nv04_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                 struct nouveau_oclass *oclass, void *data, u32 size,
@@ -77,7 +82,7 @@ nv04_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
         struct nv04_clock_priv *priv;
         int ret;
 
-        ret = nouveau_clock_create(parent, engine, oclass, NULL, &priv);
+        ret = nouveau_clock_create(parent, engine, oclass, nv04_domain, &priv);
         *pobject = nv_object(priv);
         if (ret)
                 return ret;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
new file mode 100644
index 000000000000..7a723b4f564d
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
@@ -0,0 +1,445 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <engine/fifo.h>
+#include <subdev/bios.h>
+#include <subdev/bios/pll.h>
+#include <subdev/timer.h>
+#include <subdev/clock.h>
+
+#include "pll.h"
+
+struct nvaa_clock_priv {
+        struct nouveau_clock base;
+        enum nv_clk_src csrc, ssrc, vsrc;
+        u32 cctrl, sctrl;
+        u32 ccoef, scoef;
+        u32 cpost, spost;
+        u32 vdiv;
+};
+
+static u32
+read_div(struct nouveau_clock *clk)
+{
+        return nv_rd32(clk, 0x004600);
+}
+
+static u32
+read_pll(struct nouveau_clock *clk, u32 base)
+{
+        u32 ctrl = nv_rd32(clk, base + 0);
+        u32 coef = nv_rd32(clk, base + 4);
+        u32 ref = clk->read(clk, nv_clk_src_href);
+        u32 post_div = 0;
+        u32 clock = 0;
+        int N1, M1;
+
+        switch (base){
+        case 0x4020:
+                post_div = 1 << ((nv_rd32(clk, 0x4070) & 0x000f0000) >> 16);
+                break;
+        case 0x4028:
+                post_div = (nv_rd32(clk, 0x4040) & 0x000f0000) >> 16;
+                break;
+        default:
+                break;
+        }
+
+        N1 = (coef & 0x0000ff00) >> 8;
+        M1 = (coef & 0x000000ff);
+        if ((ctrl & 0x80000000) && M1) {
+                clock = ref * N1 / M1;
+                clock = clock / post_div;
+        }
+
+        return clock;
+}
+
+static int
+nvaa_clock_read(struct nouveau_clock *clk, enum nv_clk_src src)
+{
+        struct nvaa_clock_priv *priv = (void *)clk;
+        u32 mast = nv_rd32(clk, 0x00c054);
+        u32 P = 0;
+
+        switch (src) {
+        case nv_clk_src_crystal:
+                return nv_device(priv)->crystal;
+        case nv_clk_src_href:
+                return 100000; /* PCIE reference clock */
+        case nv_clk_src_hclkm4:
+                return clk->read(clk, nv_clk_src_href) * 4;
+        case nv_clk_src_hclkm2d3:
+                return clk->read(clk, nv_clk_src_href) * 2 / 3;
+        case nv_clk_src_host:
+                switch (mast & 0x000c0000) {
+                case 0x00000000: return clk->read(clk, nv_clk_src_hclkm2d3);
+                case 0x00040000: break;
+                case 0x00080000: return clk->read(clk, nv_clk_src_hclkm4);
+                case 0x000c0000: return clk->read(clk, nv_clk_src_cclk);
+                }
+                break;
+        case nv_clk_src_core:
+                P = (nv_rd32(clk, 0x004028) & 0x00070000) >> 16;
+
+                switch (mast & 0x00000003) {
+                case 0x00000000: return clk->read(clk, nv_clk_src_crystal) >> P;
+                case 0x00000001: return 0;
+                case 0x00000002: return clk->read(clk, nv_clk_src_hclkm4) >> P;
+                case 0x00000003: return read_pll(clk, 0x004028) >> P;
+                }
+                break;
+        case nv_clk_src_cclk:
+                if ((mast & 0x03000000) != 0x03000000)
+                        return clk->read(clk, nv_clk_src_core);
+
+                if ((mast & 0x00000200) == 0x00000000)
+                        return clk->read(clk, nv_clk_src_core);
+
+                switch (mast & 0x00000c00) {
+                case 0x00000000: return clk->read(clk, nv_clk_src_href);
+                case 0x00000400: return clk->read(clk, nv_clk_src_hclkm4);
+                case 0x00000800: return clk->read(clk, nv_clk_src_hclkm2d3);
+                default: return 0;
+                }
+        case nv_clk_src_shader:
+                P = (nv_rd32(clk, 0x004020) & 0x00070000) >> 16;
+                switch (mast & 0x00000030) {
+                case 0x00000000:
+                        if (mast & 0x00000040)
+                                return clk->read(clk, nv_clk_src_href) >> P;
+                        return clk->read(clk, nv_clk_src_crystal) >> P;
+                case 0x00000010: break;
+                case 0x00000020: return read_pll(clk, 0x004028) >> P;
+                case 0x00000030: return read_pll(clk, 0x004020) >> P;
+                }
+                break;
+        case nv_clk_src_mem:
+                return 0;
+                break;
+        case nv_clk_src_vdec:
+                P = (read_div(clk) & 0x00000700) >> 8;
+
+                switch (mast & 0x00400000) {
+                case 0x00400000:
+                        return clk->read(clk, nv_clk_src_core) >> P;
+                        break;
+                default:
+                        return 500000 >> P;
+                        break;
+                }
+                break;
+        default:
+                break;
+        }
+
+        nv_debug(priv, "unknown clock source %d 0x%08x\n", src, mast);
+        return 0;
+}
+
+static u32
+calc_pll(struct nvaa_clock_priv *priv, u32 reg,
+         u32 clock, int *N, int *M, int *P)
+{
+        struct nouveau_bios *bios = nouveau_bios(priv);
+        struct nvbios_pll pll;
+        struct nouveau_clock *clk = &priv->base;
+        int ret;
+
+        ret = nvbios_pll_parse(bios, reg, &pll);
+        if (ret)
+                return 0;
+
+        pll.vco2.max_freq = 0;
+        pll.refclk = clk->read(clk, nv_clk_src_href);
+        if (!pll.refclk)
+                return 0;
+
+        return nv04_pll_calc(nv_subdev(priv), &pll, clock, N, M, NULL, NULL, P);
+}
+
+static inline u32
+calc_P(u32 src, u32 target, int *div)
+{
+        u32 clk0 = src, clk1 = src;
+        for (*div = 0; *div <= 7; (*div)++) {
+                if (clk0 <= target) {
+                        clk1 = clk0 << (*div ? 1 : 0);
+                        break;
+                }
+                clk0 >>= 1;
+        }
+
+        if (target - clk0 <= clk1 - target)
+                return clk0;
+        (*div)--;
+        return clk1;
+}
+
+static int
+nvaa_clock_calc(struct nouveau_clock *clk, struct nouveau_cstate *cstate)
+{
+        struct nvaa_clock_priv *priv = (void *)clk;
+        const int shader = cstate->domain[nv_clk_src_shader];
+        const int core = cstate->domain[nv_clk_src_core];
+        const int vdec = cstate->domain[nv_clk_src_vdec];
+        u32 out = 0, clock = 0;
+        int N, M, P1, P2 = 0;
+        int divs = 0;
+
+        /* cclk: find suitable source, disable PLL if we can */
+        if (core < clk->read(clk, nv_clk_src_hclkm4))
+                out = calc_P(clk->read(clk, nv_clk_src_hclkm4), core, &divs);
+
+        /* Calculate clock * 2, so shader clock can use it too */
+        clock = calc_pll(priv, 0x4028, (core << 1), &N, &M, &P1);
+
+        if (abs(core - out) <=
+            abs(core - (clock >> 1))) {
+                priv->csrc = nv_clk_src_hclkm4;
+                priv->cctrl = divs << 16;
+        } else {
+                /* NVCTRL is actually used _after_ NVPOST, and after what we
+                 * call NVPLL. To make matters worse, NVPOST is an integer
+                 * divider instead of a right-shift number. */
+                if(P1 > 2) {
+                        P2 = P1 - 2;
+                        P1 = 2;
+                }
+
+                priv->csrc = nv_clk_src_core;
+                priv->ccoef = (N << 8) | M;
+
+                priv->cctrl = (P2 + 1) << 16;
+                priv->cpost = (1 << P1) << 16;
+        }
+
+        /* sclk: nvpll + divisor, href or spll */
+        out = 0;
+        if (shader == clk->read(clk, nv_clk_src_href)) {
+                priv->ssrc = nv_clk_src_href;
+        } else {
+                clock = calc_pll(priv, 0x4020, shader, &N, &M, &P1);
+                if (priv->csrc == nv_clk_src_core) {
+                        out = calc_P((core << 1), shader, &divs);
+                }
+
+                if (abs(shader - out) <=
+                    abs(shader - clock) &&
+                   (divs + P2) <= 7) {
+                        priv->ssrc = nv_clk_src_core;
+                        priv->sctrl = (divs + P2) << 16;
+                } else {
+                        priv->ssrc = nv_clk_src_shader;
+                        priv->scoef = (N << 8) | M;
+                        priv->sctrl = P1 << 16;
+                }
+        }
+
+        /* vclk */
+        out = calc_P(core, vdec, &divs);
+        clock = calc_P(500000, vdec, &P1);
+        if(abs(vdec - out) <=
+           abs(vdec - clock)) {
+                priv->vsrc = nv_clk_src_cclk;
+                priv->vdiv = divs << 16;
+        } else {
+                priv->vsrc = nv_clk_src_vdec;
+                priv->vdiv = P1 << 16;
+        }
+
+        /* Print strategy! */
+        nv_debug(priv, "nvpll: %08x %08x %08x\n",
+                        priv->ccoef, priv->cpost, priv->cctrl);
+        nv_debug(priv, " spll: %08x %08x %08x\n",
+                        priv->scoef, priv->spost, priv->sctrl);
+        nv_debug(priv, " vdiv: %08x\n", priv->vdiv);
+        if (priv->csrc == nv_clk_src_hclkm4)
+                nv_debug(priv, "core: hrefm4\n");
+        else
+                nv_debug(priv, "core: nvpll\n");
+
+        if (priv->ssrc == nv_clk_src_hclkm4)
+                nv_debug(priv, "shader: hrefm4\n");
+        else if (priv->ssrc == nv_clk_src_core)
+                nv_debug(priv, "shader: nvpll\n");
+        else
+                nv_debug(priv, "shader: spll\n");
+
+        if (priv->vsrc == nv_clk_src_hclkm4)
+                nv_debug(priv, "vdec: 500MHz\n");
+        else
+                nv_debug(priv, "vdec: core\n");
+
+        return 0;
+}
+
+static int
+nvaa_clock_prog(struct nouveau_clock *clk)
+{
+        struct nvaa_clock_priv *priv = (void *)clk;
+        struct nouveau_fifo *pfifo = nouveau_fifo(clk);
+        unsigned long flags;
+        u32 pllmask = 0, mast, ptherm_gate;
+        int ret = -EBUSY;
+
+        /* halt and idle execution engines */
+        ptherm_gate = nv_mask(clk, 0x020060, 0x00070000, 0x00000000);
+        nv_mask(clk, 0x002504, 0x00000001, 0x00000001);
+        /* Wait until the interrupt handler is finished */
+        if (!nv_wait(clk, 0x000100, 0xffffffff, 0x00000000))
+                goto resume;
+
+        if (pfifo)
+                pfifo->pause(pfifo, &flags);
+
+        if (!nv_wait(clk, 0x002504, 0x00000010, 0x00000010))
+                goto resume;
+        if (!nv_wait(clk, 0x00251c, 0x0000003f, 0x0000003f))
+                goto resume;
+
+        /* First switch to safe clocks: href */
+        mast = nv_mask(clk, 0xc054, 0x03400e70, 0x03400640);
+        mast &= ~0x00400e73;
+        mast |= 0x03000000;
+
+        switch (priv->csrc) {
+        case nv_clk_src_hclkm4:
+                nv_mask(clk, 0x4028, 0x00070000, priv->cctrl);
+                mast |= 0x00000002;
+                break;
+        case nv_clk_src_core:
+                nv_wr32(clk, 0x402c, priv->ccoef);
+                nv_wr32(clk, 0x4028, 0x80000000 | priv->cctrl);
+                nv_wr32(clk, 0x4040, priv->cpost);
+                pllmask |= (0x3 << 8);
+                mast |= 0x00000003;
+                break;
+        default:
+                nv_warn(priv,"Reclocking failed: unknown core clock\n");
+                goto resume;
+        }
+
+        switch (priv->ssrc) {
+        case nv_clk_src_href:
+                nv_mask(clk, 0x4020, 0x00070000, 0x00000000);
+                /* mast |= 0x00000000; */
+                break;
+        case nv_clk_src_core:
+                nv_mask(clk, 0x4020, 0x00070000, priv->sctrl);
+                mast |= 0x00000020;
+                break;
+        case nv_clk_src_shader:
+                nv_wr32(clk, 0x4024, priv->scoef);
+                nv_wr32(clk, 0x4020, 0x80000000 | priv->sctrl);
+                nv_wr32(clk, 0x4070, priv->spost);
+                pllmask |= (0x3 << 12);
+                mast |= 0x00000030;
+                break;
+        default:
+                nv_warn(priv,"Reclocking failed: unknown sclk clock\n");
+                goto resume;
+        }
+
+        if (!nv_wait(clk, 0x004080, pllmask, pllmask)) {
+                nv_warn(priv,"Reclocking failed: unstable PLLs\n");
+                goto resume;
+        }
+
+        switch (priv->vsrc) {
+        case nv_clk_src_cclk:
+                mast |= 0x00400000;
+        default:
+                nv_wr32(clk, 0x4600, priv->vdiv);
+        }
+
+        nv_wr32(clk, 0xc054, mast);
+        ret = 0;
+
+resume:
+        if (pfifo)
+                pfifo->start(pfifo, &flags);
+
+        nv_mask(clk, 0x002504, 0x00000001, 0x00000000);
+        nv_wr32(clk, 0x020060, ptherm_gate);
+
+        /* Disable some PLLs and dividers when unused */
+        if (priv->csrc != nv_clk_src_core) {
+                nv_wr32(clk, 0x4040, 0x00000000);
+                nv_mask(clk, 0x4028, 0x80000000, 0x00000000);
+        }
+
+        if (priv->ssrc != nv_clk_src_shader) {
+                nv_wr32(clk, 0x4070, 0x00000000);
+                nv_mask(clk, 0x4020, 0x80000000, 0x00000000);
+        }
+
+        return ret;
+}
+
+static void
+nvaa_clock_tidy(struct nouveau_clock *clk)
+{
+}
+
+static struct nouveau_clocks
+nvaa_domains[] = {
+        { nv_clk_src_crystal, 0xff },
+        { nv_clk_src_href   , 0xff },
+        { nv_clk_src_core   , 0xff, 0, "core", 1000 },
+        { nv_clk_src_shader , 0xff, 0, "shader", 1000 },
+        { nv_clk_src_vdec   , 0xff, 0, "vdec", 1000 },
+        { nv_clk_src_max }
+};
+
+static int
+nvaa_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+                struct nouveau_oclass *oclass, void *data, u32 size,
+                struct nouveau_object **pobject)
+{
+        struct nvaa_clock_priv *priv;
+        int ret;
+
+        ret = nouveau_clock_create(parent, engine, oclass, nvaa_domains, &priv);
+        *pobject = nv_object(priv);
+        if (ret)
+                return ret;
+
+        priv->base.read = nvaa_clock_read;
+        priv->base.calc = nvaa_clock_calc;
+        priv->base.prog = nvaa_clock_prog;
+        priv->base.tidy = nvaa_clock_tidy;
+        return 0;
+}
+
+struct nouveau_oclass *
+nvaa_clock_oclass = &(struct nouveau_oclass) {
+        .handle = NV_SUBDEV(CLOCK, 0xaa),
+        .ofuncs = &(struct nouveau_ofuncs) {
+                .ctor = nvaa_clock_ctor,
+                .dtor = _nouveau_clock_dtor,
+                .init = _nouveau_clock_init,
+                .fini = _nouveau_clock_fini,
+        },
+};
diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
index 3618ac6b6316..32e7064b819b 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
@@ -58,8 +58,8 @@ struct nouveau_plane {
 };
 
 static uint32_t formats[] = {
-        DRM_FORMAT_NV12,
         DRM_FORMAT_UYVY,
+        DRM_FORMAT_NV12,
 };
 
 /* Sine can be approximated with
@@ -99,13 +99,28 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
         struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
         struct nouveau_bo *cur = nv_plane->cur;
         bool flip = nv_plane->flip;
-        int format = ALIGN(src_w * 4, 0x100);
         int soff = NV_PCRTC0_SIZE * nv_crtc->index;
         int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index;
-        int ret;
+        int format, ret;
+
+        /* Source parameters given in 16.16 fixed point, ignore fractional. */
+        src_x >>= 16;
+        src_y >>= 16;
+        src_w >>= 16;
+        src_h >>= 16;
+
+        format = ALIGN(src_w * 4, 0x100);
 
         if (format > 0xffff)
-                return -EINVAL;
+                return -ERANGE;
+
+        if (dev->chipset >= 0x30) {
+                if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1))
+                        return -ERANGE;
+        } else {
+                if (crtc_w < (src_w >> 3) || crtc_h < (src_h >> 3))
+                        return -ERANGE;
+        }
 
         ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM);
         if (ret)
@@ -113,12 +128,6 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
 
         nv_plane->cur = nv_fb->nvbo;
 
-        /* Source parameters given in 16.16 fixed point, ignore fractional. */
-        src_x = src_x >> 16;
-        src_y = src_y >> 16;
-        src_w = src_w >> 16;
-        src_h = src_h >> 16;
-
         nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY);
         nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0);
 
@@ -245,14 +254,25 @@ nv10_overlay_init(struct drm_device *device)
 {
         struct nouveau_device *dev = nouveau_dev(device);
         struct nouveau_plane *plane = kzalloc(sizeof(struct nouveau_plane), GFP_KERNEL);
+        int num_formats = ARRAY_SIZE(formats);
         int ret;
 
         if (!plane)
                 return;
 
+        switch (dev->chipset) {
+        case 0x10:
+        case 0x11:
+        case 0x15:
+        case 0x1a:
+        case 0x20:
+                num_formats = 1;
+                break;
+        }
+
         ret = drm_plane_init(device, &plane->base, 3 /* both crtc's */,
                              &nv10_plane_funcs,
-                             formats, ARRAY_SIZE(formats), false);
+                             formats, num_formats, false);
         if (ret)
                 goto err;
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 7809d92183c4..29c3efdfc7dd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -608,6 +608,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
         fence = nouveau_fence_ref(new_bo->bo.sync_obj);
         spin_unlock(&new_bo->bo.bdev->fence_lock);
         ret = nouveau_fence_sync(fence, chan);
+        nouveau_fence_unref(&fence);
         if (ret)
                 return ret;
 
@@ -701,7 +702,7 @@ nouveau_finish_page_flip(struct nouveau_channel *chan,
 
         s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
         if (s->event)
-                drm_send_vblank_event(dev, -1, s->event);
+                drm_send_vblank_event(dev, s->crtc, s->event);
 
         list_del(&s->head);
         if (ps)
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index f8e66c08b11a..4e384a2f99c3 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1265,7 +1265,7 @@ nv50_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
                     uint32_t start, uint32_t size)
 {
         struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-        u32 end = max(start + size, (u32)256);
+        u32 end = min_t(u32, start + size, 256);
         u32 i;
 
         for (i = start; i < end; i++) {
diff --git a/drivers/gpu/drm/radeon/atombios_i2c.c b/drivers/gpu/drm/radeon/atombios_i2c.c
index 0652ee0a2098..f685035dbe39 100644
--- a/drivers/gpu/drm/radeon/atombios_i2c.c
+++ b/drivers/gpu/drm/radeon/atombios_i2c.c
@@ -44,7 +44,7 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
         PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
         int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
         unsigned char *base;
-        u16 out;
+        u16 out = cpu_to_le16(0);
 
         memset(&args, 0, sizeof(args));
 
@@ -55,11 +55,14 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
                         DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
                         return -EINVAL;
                 }
-                args.ucRegIndex = buf[0];
-                if (num > 1) {
+                if (buf == NULL)
+                        args.ucRegIndex = 0;
+                else
+                        args.ucRegIndex = buf[0];
+                if (num)
                         num--;
+                if (num)
                         memcpy(&out, &buf[1], num);
-                }
                 args.lpI2CDataOut = cpu_to_le16(out);
         } else {
                 if (num > ATOM_MAX_HW_I2C_READ) {
@@ -96,14 +99,14 @@ int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
         struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
         struct i2c_msg *p;
         int i, remaining, current_count, buffer_offset, max_bytes, ret;
-        u8 buf = 0, flags;
+        u8 flags;
 
         /* check for bus probe */
         p = &msgs[0];
         if ((num == 1) && (p->len == 0)) {
                 ret = radeon_process_i2c_ch(i2c,
                                             p->addr, HW_I2C_WRITE,
-                                            &buf, 1);
+                                            NULL, 0);
                 if (ret)
                         return ret;
                 else
diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c
index 009f46e0ce72..de86493cbc44 100644
--- a/drivers/gpu/drm/radeon/dce6_afmt.c
+++ b/drivers/gpu/drm/radeon/dce6_afmt.c
@@ -93,11 +93,13 @@ void dce6_afmt_select_pin(struct drm_encoder *encoder)
         struct radeon_device *rdev = encoder->dev->dev_private;
         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
         struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
-        u32 offset = dig->afmt->offset;
+        u32 offset;
 
-        if (!dig->afmt->pin)
+        if (!dig || !dig->afmt || !dig->afmt->pin)
                 return;
 
+        offset = dig->afmt->offset;
+
         WREG32(AFMT_AUDIO_SRC_CONTROL + offset,
                AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id));
 }
@@ -112,7 +114,7 @@ void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
         struct radeon_connector *radeon_connector = NULL;
         u32 tmp = 0, offset;
 
-        if (!dig->afmt->pin)
+        if (!dig || !dig->afmt || !dig->afmt->pin)
                 return;
 
         offset = dig->afmt->pin->offset;
@@ -156,7 +158,7 @@ void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder)
         u8 *sadb;
         int sad_count;
 
-        if (!dig->afmt->pin)
+        if (!dig || !dig->afmt || !dig->afmt->pin)
                 return;
 
         offset = dig->afmt->pin->offset;
@@ -217,7 +219,7 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder)
                 { AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO },
         };
 
-        if (!dig->afmt->pin)
+        if (!dig || !dig->afmt || !dig->afmt->pin)
                 return;
 
         offset = dig->afmt->pin->offset;
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index cdc003085a76..49c4d48f54d6 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -785,8 +785,8 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
         struct ni_ps *ps = ni_get_ps(rps);
         struct radeon_clock_and_voltage_limits *max_limits;
         bool disable_mclk_switching;
-        u32 mclk, sclk;
-        u16 vddc, vddci;
+        u32 mclk;
+        u16 vddci;
         u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
         int i;
 
@@ -839,24 +839,14 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
 
         /* XXX validate the min clocks required for display */
 
+        /* adjust low state */
         if (disable_mclk_switching) {
-                mclk  = ps->performance_levels[ps->performance_level_count - 1].mclk;
-                sclk = ps->performance_levels[0].sclk;
-                vddc = ps->performance_levels[0].vddc;
-                vddci = ps->performance_levels[ps->performance_level_count - 1].vddci;
-        } else {
-                sclk = ps->performance_levels[0].sclk;
-                mclk = ps->performance_levels[0].mclk;
-                vddc = ps->performance_levels[0].vddc;
-                vddci = ps->performance_levels[0].vddci;
+                ps->performance_levels[0].mclk =
+                        ps->performance_levels[ps->performance_level_count - 1].mclk;
+                ps->performance_levels[0].vddci =
+                        ps->performance_levels[ps->performance_level_count - 1].vddci;
         }
 
-        /* adjusted low state */
-        ps->performance_levels[0].sclk = sclk;
-        ps->performance_levels[0].mclk = mclk;
-        ps->performance_levels[0].vddc = vddc;
-        ps->performance_levels[0].vddci = vddci;
-
         btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk,
                                   &ps->performance_levels[0].sclk,
                                   &ps->performance_levels[0].mclk);
@@ -868,11 +858,15 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
                         ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc;
         }
 
+        /* adjust remaining states */
         if (disable_mclk_switching) {
                 mclk = ps->performance_levels[0].mclk;
+                vddci = ps->performance_levels[0].vddci;
                 for (i = 1; i < ps->performance_level_count; i++) {
                         if (mclk < ps->performance_levels[i].mclk)
                                 mclk = ps->performance_levels[i].mclk;
+                        if (vddci < ps->performance_levels[i].vddci)
+                                vddci = ps->performance_levels[i].vddci;
                 }
                 for (i = 0; i < ps->performance_level_count; i++) {
                         ps->performance_levels[i].mclk = mclk;
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 4b89262f3f0e..b7d3ecba43e3 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -304,9 +304,9 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
                         WREG32(DCCG_AUDIO_DTO1_MODULE, dto_modulo);
                         WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */
                 }
-        } else if (ASIC_IS_DCE3(rdev)) {
+        } else {
                 /* according to the reg specs, this should DCE3.2 only, but in
-                 * practice it seems to cover DCE3.0/3.1 as well.
+                 * practice it seems to cover DCE2.0/3.0/3.1 as well.
                  */
                 if (dig->dig_encoder == 0) {
                         WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100);
@@ -317,10 +317,6 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
                         WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100);
                         WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */
                 }
-        } else {
-                /* according to the reg specs, this should be DCE2.0 and DCE3.0/3.1 */
-                WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) |
-                       AUDIO_DTO_MODULE(clock / 10));
         }
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ecf2a3960c07..b1f990d0eaa1 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -2710,10 +2710,10 @@ void radeon_vm_fence(struct radeon_device *rdev,
                      struct radeon_vm *vm,
                      struct radeon_fence *fence);
 uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr);
-int radeon_vm_bo_update_pte(struct radeon_device *rdev,
-                            struct radeon_vm *vm,
-                            struct radeon_bo *bo,
-                            struct ttm_mem_reg *mem);
+int radeon_vm_bo_update(struct radeon_device *rdev,
+                        struct radeon_vm *vm,
+                        struct radeon_bo *bo,
+                        struct ttm_mem_reg *mem);
 void radeon_vm_bo_invalidate(struct radeon_device *rdev,
                              struct radeon_bo *bo);
 struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm,
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index f79ee184ffd5..5c39bf7c3d88 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -2918,7 +2918,7 @@ int radeon_atom_get_memory_pll_dividers(struct radeon_device *rdev,
                         mpll_param->dll_speed = args.ucDllSpeed;
                         mpll_param->bwcntl = args.ucBWCntl;
                         mpll_param->vco_mode =
-                                (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK) ? 1 : 0;
+                                (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK);
                         mpll_param->yclk_sel =
                                 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0;
                         mpll_param->qdr =
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index f41594b2eeac..0b366169d64d 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -360,13 +360,13 @@ static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser,
         struct radeon_bo *bo;
         int r;
 
-        r = radeon_vm_bo_update_pte(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem);
+        r = radeon_vm_bo_update(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem);
         if (r) {
                 return r;
         }
         list_for_each_entry(lobj, &parser->validated, tv.head) {
                 bo = lobj->bo;
-                r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem);
+                r = radeon_vm_bo_update(parser->rdev, vm, bo, &bo->tbo.mem);
                 if (r) {
                         return r;
                 }
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 543dcfae7e6f..00e0d449021c 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -108,9 +108,10 @@
  * 1.31- Add support for num Z pipes from GET_PARAM
  * 1.32- fixes for rv740 setup
  * 1.33- Add r6xx/r7xx const buffer support
+ * 1.34- fix evergreen/cayman GS register
  */
 #define DRIVER_MAJOR            1
-#define DRIVER_MINOR            33
+#define DRIVER_MINOR            34
 #define DRIVER_PATCHLEVEL       0
 
 long radeon_drm_ioctl(struct file *filp,
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index 3044e504f4ec..96e440061bdb 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -29,6 +29,7 @@
 #include <drm/radeon_drm.h>
 #include "radeon.h"
 #include "radeon_reg.h"
+#include "radeon_trace.h"
 
 /*
  * GART
@@ -737,6 +738,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
         for (i = 0; i < 2; ++i) {
                 if (choices[i]) {
                         vm->id = choices[i];
+                        trace_radeon_vm_grab_id(vm->id, ring);
                         return rdev->vm_manager.active[choices[i]];
                 }
         }
@@ -1116,7 +1118,7 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev,
 }
 
 /**
- * radeon_vm_bo_update_pte - map a bo into the vm page table
+ * radeon_vm_bo_update - map a bo into the vm page table
  *
  * @rdev: radeon_device pointer
  * @vm: requested vm
@@ -1128,10 +1130,10 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev,
  *
  * Object have to be reserved & global and local mutex must be locked!
  */
-int radeon_vm_bo_update_pte(struct radeon_device *rdev,
-                            struct radeon_vm *vm,
-                            struct radeon_bo *bo,
-                            struct ttm_mem_reg *mem)
+int radeon_vm_bo_update(struct radeon_device *rdev,
+                        struct radeon_vm *vm,
+                        struct radeon_bo *bo,
+                        struct ttm_mem_reg *mem)
 {
         struct radeon_ib ib;
         struct radeon_bo_va *bo_va;
@@ -1176,6 +1178,8 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev,
                 bo_va->valid = false;
         }
 
+        trace_radeon_vm_bo_update(bo_va);
+
         nptes = radeon_bo_ngpu_pages(bo);
 
         /* assume two extra pdes in case the mapping overlaps the borders */
@@ -1257,7 +1261,7 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev,
         mutex_lock(&rdev->vm_manager.lock);
         mutex_lock(&bo_va->vm->mutex);
         if (bo_va->soffset) {
-                r = radeon_vm_bo_update_pte(rdev, bo_va->vm, bo_va->bo, NULL);
+                r = radeon_vm_bo_update(rdev, bo_va->vm, bo_va->bo, NULL);
         }
         mutex_unlock(&rdev->vm_manager.lock);
         list_del(&bo_va->vm_list);
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index d1385ccc672c..984097b907ef 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -537,8 +537,7 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev,
                                       struct device_attribute *attr,
                                       char *buf)
 {
-        struct drm_device *ddev = dev_get_drvdata(dev);
-        struct radeon_device *rdev = ddev->dev_private;
+        struct radeon_device *rdev = dev_get_drvdata(dev);
         int temp;
 
         if (rdev->asic->pm.get_temperature)
@@ -553,8 +552,7 @@ static ssize_t radeon_hwmon_show_temp_thresh(struct device *dev,
                                              struct device_attribute *attr,
                                              char *buf)
 {
-        struct drm_device *ddev = dev_get_drvdata(dev);
-        struct radeon_device *rdev = ddev->dev_private;
+        struct radeon_device *rdev = dev_get_drvdata(dev);
         int hyst = to_sensor_dev_attr(attr)->index;
         int temp;
 
@@ -566,23 +564,14 @@ static ssize_t radeon_hwmon_show_temp_thresh(struct device *dev,
         return snprintf(buf, PAGE_SIZE, "%d\n", temp);
 }
 
-static ssize_t radeon_hwmon_show_name(struct device *dev,
-                                      struct device_attribute *attr,
-                                      char *buf)
-{
-        return sprintf(buf, "radeon\n");
-}
-
 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0);
 static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 0);
 static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 1);
-static SENSOR_DEVICE_ATTR(name, S_IRUGO, radeon_hwmon_show_name, NULL, 0);
 
 static struct attribute *hwmon_attributes[] = {
         &sensor_dev_attr_temp1_input.dev_attr.attr,
         &sensor_dev_attr_temp1_crit.dev_attr.attr,
         &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
-        &sensor_dev_attr_name.dev_attr.attr,
         NULL
 };
 
@@ -590,8 +579,7 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
                                         struct attribute *attr, int index)
 {
         struct device *dev = container_of(kobj, struct device, kobj);
-        struct drm_device *ddev = dev_get_drvdata(dev);
-        struct radeon_device *rdev = ddev->dev_private;
+        struct radeon_device *rdev = dev_get_drvdata(dev);
 
         /* Skip limit attributes if DPM is not enabled */
         if (rdev->pm.pm_method != PM_METHOD_DPM &&
@@ -607,11 +595,15 @@ static const struct attribute_group hwmon_attrgroup = {
         .is_visible = hwmon_attributes_visible,
 };
 
+static const struct attribute_group *hwmon_groups[] = {
+        &hwmon_attrgroup,
+        NULL
+};
+
 static int radeon_hwmon_init(struct radeon_device *rdev)
 {
         int err = 0;
-
-        rdev->pm.int_hwmon_dev = NULL;
+        struct device *hwmon_dev;
 
         switch (rdev->pm.int_thermal_type) {
         case THERMAL_TYPE_RV6XX:
@@ -624,20 +616,13 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
         case THERMAL_TYPE_KV:
                 if (rdev->asic->pm.get_temperature == NULL)
                         return err;
-                rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev);
-                if (IS_ERR(rdev->pm.int_hwmon_dev)) {
-                        err = PTR_ERR(rdev->pm.int_hwmon_dev);
+                hwmon_dev = hwmon_device_register_with_groups(rdev->dev,
+                                                              "radeon", rdev,
+                                                              hwmon_groups);
+                if (IS_ERR(hwmon_dev)) {
+                        err = PTR_ERR(hwmon_dev);
                         dev_err(rdev->dev,
                                 "Unable to register hwmon device: %d\n", err);
-                        break;
-                }
-                dev_set_drvdata(rdev->pm.int_hwmon_dev, rdev->ddev);
-                err = sysfs_create_group(&rdev->pm.int_hwmon_dev->kobj,
-                                         &hwmon_attrgroup);
-                if (err) {
-                        dev_err(rdev->dev,
-                                "Unable to create hwmon sysfs file: %d\n", err);
-                        hwmon_device_unregister(rdev->dev);
                 }
                 break;
         default:
@@ -647,14 +632,6 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
         return err;
 }
 
-static void radeon_hwmon_fini(struct radeon_device *rdev)
-{
-        if (rdev->pm.int_hwmon_dev) {
-                sysfs_remove_group(&rdev->pm.int_hwmon_dev->kobj, &hwmon_attrgroup);
-                hwmon_device_unregister(rdev->pm.int_hwmon_dev);
-        }
-}
-
 static void radeon_dpm_thermal_work_handler(struct work_struct *work)
 {
         struct radeon_device *rdev =
@@ -1337,8 +1314,6 @@ static void radeon_pm_fini_old(struct radeon_device *rdev)
 
         if (rdev->pm.power_state)
                 kfree(rdev->pm.power_state);
-
-        radeon_hwmon_fini(rdev);
 }
 
 static void radeon_pm_fini_dpm(struct radeon_device *rdev)
@@ -1358,8 +1333,6 @@ static void radeon_pm_fini_dpm(struct radeon_device *rdev)
 
         if (rdev->pm.power_state)
                 kfree(rdev->pm.power_state);
-
-        radeon_hwmon_fini(rdev);
 }
 
 void radeon_pm_fini(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h
index 9f0e18172b6e..0473257d4078 100644
--- a/drivers/gpu/drm/radeon/radeon_trace.h
+++ b/drivers/gpu/drm/radeon/radeon_trace.h
@@ -47,6 +47,39 @@ TRACE_EVENT(radeon_cs,
                       __entry->fences)
 );
 
+TRACE_EVENT(radeon_vm_grab_id,
+            TP_PROTO(unsigned vmid, int ring),
+            TP_ARGS(vmid, ring),
+            TP_STRUCT__entry(
+                             __field(u32, vmid)
+                             __field(u32, ring)
+                             ),
+
+            TP_fast_assign(
+                           __entry->vmid = vmid;
+                           __entry->ring = ring;
+                           ),
+            TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring)
+);
+
+TRACE_EVENT(radeon_vm_bo_update,
+            TP_PROTO(struct radeon_bo_va *bo_va),
+            TP_ARGS(bo_va),
+            TP_STRUCT__entry(
+                             __field(u64, soffset)
+                             __field(u64, eoffset)
+                             __field(u32, flags)
+                             ),
+
+            TP_fast_assign(
+                           __entry->soffset = bo_va->soffset;
+                           __entry->eoffset = bo_va->eoffset;
+                           __entry->flags = bo_va->flags;
+                           ),
+            TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x",
+                      __entry->soffset, __entry->eoffset, __entry->flags)
+);
+
 TRACE_EVENT(radeon_vm_set_page,
             TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
                      uint32_t incr, uint32_t flags),
diff --git a/drivers/gpu/drm/radeon/reg_srcs/cayman b/drivers/gpu/drm/radeon/reg_srcs/cayman
index a072fa8c46b0..d46b58d078aa 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/cayman
+++ b/drivers/gpu/drm/radeon/reg_srcs/cayman
@@ -21,7 +21,7 @@ cayman 0x9400
 0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE
 0x000089B0 VGT_HS_OFFCHIP_PARAM
 0x00008A14 PA_CL_ENHANCE
-0x00008A60 PA_SC_LINE_STIPPLE_VALUE
+0x00008A60 PA_SU_LINE_STIPPLE_VALUE
 0x00008B10 PA_SC_LINE_STIPPLE_STATE
 0x00008BF0 PA_SC_ENHANCE
 0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
@@ -532,7 +532,7 @@ cayman 0x9400
 0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET
 0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE
 0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET
-0x00028B74 VGT_GS_INSTANCE_CNT
+0x00028B90 VGT_GS_INSTANCE_CNT
 0x00028BD4 PA_SC_CENTROID_PRIORITY_0
 0x00028BD8 PA_SC_CENTROID_PRIORITY_1
 0x00028BDC PA_SC_LINE_CNTL
diff --git a/drivers/gpu/drm/radeon/reg_srcs/evergreen b/drivers/gpu/drm/radeon/reg_srcs/evergreen
index b912a37689bf..57745c8761c8 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/evergreen
+++ b/drivers/gpu/drm/radeon/reg_srcs/evergreen
@@ -22,7 +22,7 @@ evergreen 0x9400
 0x000089A4 VGT_COMPUTE_START_Z
 0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE
 0x00008A14 PA_CL_ENHANCE
-0x00008A60 PA_SC_LINE_STIPPLE_VALUE
+0x00008A60 PA_SU_LINE_STIPPLE_VALUE
 0x00008B10 PA_SC_LINE_STIPPLE_STATE
 0x00008BF0 PA_SC_ENHANCE
 0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
@@ -545,7 +545,7 @@ evergreen 0x9400
 0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET
 0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE
 0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET
-0x00028B74 VGT_GS_INSTANCE_CNT
+0x00028B90 VGT_GS_INSTANCE_CNT
 0x00028C00 PA_SC_LINE_CNTL
 0x00028C08 PA_SU_VTX_CNTL
 0x00028C0C PA_CL_GB_VERT_CLIP_ADJ
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 6a64ccaa0695..a36736dab5e0 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -3882,8 +3882,15 @@ static int si_mc_init(struct radeon_device *rdev)
         rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
         rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
         /* size in MB on si */
-        rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;
-        rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;
+        tmp = RREG32(CONFIG_MEMSIZE);
+        /* some boards may have garbage in the upper 16 bits */
+        if (tmp & 0xffff0000) {
+                DRM_INFO("Probable bad vram size: 0x%08x\n", tmp);
+                if (tmp & 0xffff)
+                        tmp &= 0xffff;
+        }
+        rdev->mc.mc_vram_size = tmp * 1024ULL * 1024ULL;
+        rdev->mc.real_vram_size = rdev->mc.mc_vram_size;
         rdev->mc.visible_vram_size = rdev->mc.aper_size;
         si_vram_gtt_location(rdev, &rdev->mc);
         radeon_update_bandwidth_info(rdev);
diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index 8961ba6a34b8..8db9b3bce001 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -2,6 +2,7 @@ config DRM_TEGRA
         bool "NVIDIA Tegra DRM"
         depends on ARCH_TEGRA || ARCH_MULTIPLATFORM
         depends on DRM
+        depends on RESET_CONTROLLER
         select TEGRA_HOST1X
         select DRM_KMS_HELPER
         select DRM_KMS_FB_HELPER
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index ae1cb31ead7e..cd7f1e499616 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -8,8 +8,8 @@
  */
 
 #include <linux/clk.h>
-#include <linux/clk/tegra.h>
 #include <linux/debugfs.h>
+#include <linux/reset.h>
 
 #include "dc.h"
 #include "drm.h"
@@ -712,7 +712,7 @@ static void tegra_crtc_prepare(struct drm_crtc *crtc)
         unsigned long value;
 
         /* hardware initialization */
-        tegra_periph_reset_deassert(dc->clk);
+        reset_control_deassert(dc->rst);
         usleep_range(10000, 20000);
 
         if (dc->pipe)
@@ -1187,6 +1187,12 @@ static int tegra_dc_probe(struct platform_device *pdev)
                 return PTR_ERR(dc->clk);
         }
 
+        dc->rst = devm_reset_control_get(&pdev->dev, "dc");
+        if (IS_ERR(dc->rst)) {
+                dev_err(&pdev->dev, "failed to get reset\n");
+                return PTR_ERR(dc->rst);
+        }
+
         err = clk_prepare_enable(dc->clk);
         if (err < 0)
                 return err;
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 28e178137718..07eba596d458 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -135,11 +135,11 @@ int tegra_drm_submit(struct tegra_drm_context *context,
         unsigned int num_relocs = args->num_relocs;
         unsigned int num_waitchks = args->num_waitchks;
         struct drm_tegra_cmdbuf __user *cmdbufs =
-                (void * __user)(uintptr_t)args->cmdbufs;
+                (void __user *)(uintptr_t)args->cmdbufs;
         struct drm_tegra_reloc __user *relocs =
-                (void * __user)(uintptr_t)args->relocs;
+                (void __user *)(uintptr_t)args->relocs;
         struct drm_tegra_waitchk __user *waitchks =
-                (void * __user)(uintptr_t)args->waitchks;
+                (void __user *)(uintptr_t)args->waitchks;
         struct drm_tegra_syncpt syncpt;
         struct host1x_job *job;
         int err;
@@ -163,9 +163,10 @@ int tegra_drm_submit(struct tegra_drm_context *context,
                 struct drm_tegra_cmdbuf cmdbuf;
                 struct host1x_bo *bo;
 
-                err = copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf));
-                if (err)
+                if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
+                        err = -EFAULT;
                         goto fail;
+                }
 
                 bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
                 if (!bo) {
@@ -178,10 +179,11 @@ int tegra_drm_submit(struct tegra_drm_context *context,
                 cmdbufs++;
         }
 
-        err = copy_from_user(job->relocarray, relocs,
-                             sizeof(*relocs) * num_relocs);
-        if (err)
+        if (copy_from_user(job->relocarray, relocs,
+                           sizeof(*relocs) * num_relocs)) {
+                err = -EFAULT;
                 goto fail;
+        }
 
         while (num_relocs--) {
                 struct host1x_reloc *reloc = &job->relocarray[num_relocs];
@@ -199,15 +201,17 @@ int tegra_drm_submit(struct tegra_drm_context *context,
                 }
         }
 
-        err = copy_from_user(job->waitchk, waitchks,
-                             sizeof(*waitchks) * num_waitchks);
-        if (err)
+        if (copy_from_user(job->waitchk, waitchks,
+                           sizeof(*waitchks) * num_waitchks)) {
+                err = -EFAULT;
                 goto fail;
+        }
 
-        err = copy_from_user(&syncpt, (void * __user)(uintptr_t)args->syncpts,
-                             sizeof(syncpt));
-        if (err)
+        if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
+                           sizeof(syncpt))) {
+                err = -EFAULT;
                 goto fail;
+        }
 
         job->is_addr_reg = context->client->ops->is_addr_reg;
         job->syncpt_incrs = syncpt.incrs;
@@ -573,7 +577,7 @@ static void tegra_debugfs_cleanup(struct drm_minor *minor)
 }
 #endif
 
-struct drm_driver tegra_drm_driver = {
+static struct drm_driver tegra_drm_driver = {
         .driver_features = DRIVER_MODESET | DRIVER_GEM,
         .load = tegra_drm_load,
         .unload = tegra_drm_unload,
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index fdfe259ed7f8..266aae08a3bd 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -19,6 +19,8 @@
 #include <drm/drm_fb_helper.h>
 #include <drm/drm_fixed.h>
 
+struct reset_control;
+
 struct tegra_fb {
         struct drm_framebuffer base;
         struct tegra_bo **planes;
@@ -93,6 +95,7 @@ struct tegra_dc {
         int pipe;
 
         struct clk *clk;
+        struct reset_control *rst;
         void __iomem *regs;
         int irq;
 
@@ -116,7 +119,7 @@ host1x_client_to_dc(struct host1x_client *client)
 
 static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
 {
-        return container_of(crtc, struct tegra_dc, base);
+        return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
 }
 
 static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value,
diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c
index 490f7719e317..a3835e7de184 100644
--- a/drivers/gpu/drm/tegra/fb.c
+++ b/drivers/gpu/drm/tegra/fb.c
@@ -247,7 +247,7 @@ static int tegra_fbdev_probe(struct drm_fb_helper *helper,
                  info->var.yoffset * fb->pitches[0];
 
         drm->mode_config.fb_base = (resource_size_t)bo->paddr;
-        info->screen_base = bo->vaddr + offset;
+        info->screen_base = (void __iomem *)bo->vaddr + offset;
         info->screen_size = size;
         info->fix.smem_start = (unsigned long)(bo->paddr + offset);
         info->fix.smem_len = size;
diff --git a/drivers/gpu/drm/tegra/gr3d.c b/drivers/gpu/drm/tegra/gr3d.c
index 4cec8f526af7..0cbb24b1ae04 100644
--- a/drivers/gpu/drm/tegra/gr3d.c
+++ b/drivers/gpu/drm/tegra/gr3d.c
@@ -11,6 +11,7 @@
 #include <linux/host1x.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/reset.h>
 #include <linux/tegra-powergate.h>
 
 #include "drm.h"
@@ -22,6 +23,8 @@ struct gr3d {
         struct host1x_channel *channel;
         struct clk *clk_secondary;
         struct clk *clk;
+        struct reset_control *rst_secondary;
+        struct reset_control *rst;
 
         DECLARE_BITMAP(addr_regs, GR3D_NUM_REGS);
 };
@@ -255,15 +258,29 @@ static int gr3d_probe(struct platform_device *pdev)
                 return PTR_ERR(gr3d->clk);
         }
 
+        gr3d->rst = devm_reset_control_get(&pdev->dev, "3d");
+        if (IS_ERR(gr3d->rst)) {
+                dev_err(&pdev->dev, "cannot get reset\n");
+                return PTR_ERR(gr3d->rst);
+        }
+
         if (of_device_is_compatible(np, "nvidia,tegra30-gr3d")) {
                 gr3d->clk_secondary = devm_clk_get(&pdev->dev, "3d2");
                 if (IS_ERR(gr3d->clk)) {
                         dev_err(&pdev->dev, "cannot get secondary clock\n");
                         return PTR_ERR(gr3d->clk);
                 }
+
+                gr3d->rst_secondary = devm_reset_control_get(&pdev->dev,
+                                                                "3d2");
+                if (IS_ERR(gr3d->rst_secondary)) {
+                        dev_err(&pdev->dev, "cannot get secondary reset\n");
+                        return PTR_ERR(gr3d->rst_secondary);
+                }
         }
 
-        err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk);
+        err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk,
+                                                gr3d->rst);
         if (err < 0) {
                 dev_err(&pdev->dev, "failed to power up 3D unit\n");
                 return err;
@@ -271,7 +288,8 @@ static int gr3d_probe(struct platform_device *pdev)
 
         if (gr3d->clk_secondary) {
                 err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D1,
-                                                        gr3d->clk_secondary);
+                                                        gr3d->clk_secondary,
+                                                        gr3d->rst_secondary);
                 if (err < 0) {
                         dev_err(&pdev->dev,
                                 "failed to power up secondary 3D unit\n");
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index 0cd9bc2056e8..7f6253ea5cb5 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -8,10 +8,10 @@
  */
 
 #include <linux/clk.h>
-#include <linux/clk/tegra.h>
 #include <linux/debugfs.h>
 #include <linux/hdmi.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 
 #include "hdmi.h"
 #include "drm.h"
@@ -49,6 +49,7 @@ struct tegra_hdmi {
 
         struct clk *clk_parent;
         struct clk *clk;
+        struct reset_control *rst;
 
         const struct tegra_hdmi_config *config;
 
@@ -731,9 +732,9 @@ static int tegra_output_hdmi_enable(struct tegra_output *output)
                 return err;
         }
 
-        tegra_periph_reset_assert(hdmi->clk);
+        reset_control_assert(hdmi->rst);
         usleep_range(1000, 2000);
-        tegra_periph_reset_deassert(hdmi->clk);
+        reset_control_deassert(hdmi->rst);
 
         tegra_dc_writel(dc, VSYNC_H_POSITION(1),
                         DC_DISP_DISP_TIMING_OPTIONS);
@@ -912,7 +913,7 @@ static int tegra_output_hdmi_disable(struct tegra_output *output)
 {
         struct tegra_hdmi *hdmi = to_hdmi(output);
 
-        tegra_periph_reset_assert(hdmi->clk);
+        reset_control_assert(hdmi->rst);
         clk_disable(hdmi->clk);
         regulator_disable(hdmi->pll);
 
@@ -1338,6 +1339,12 @@ static int tegra_hdmi_probe(struct platform_device *pdev)
                 return PTR_ERR(hdmi->clk);
         }
 
+        hdmi->rst = devm_reset_control_get(&pdev->dev, "hdmi");
+        if (IS_ERR(hdmi->rst)) {
+                dev_err(&pdev->dev, "failed to get reset\n");
+                return PTR_ERR(hdmi->rst);
+        }
+
         err = clk_prepare(hdmi->clk);
         if (err < 0)
                 return err;
diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c
index ba47ca4fb880..3b29018913a5 100644
--- a/drivers/gpu/drm/tegra/rgb.c
+++ b/drivers/gpu/drm/tegra/rgb.c
@@ -14,6 +14,8 @@
 
 struct tegra_rgb {
         struct tegra_output output;
+        struct tegra_dc *dc;
+
         struct clk *clk_parent;
         struct clk *clk;
 };
@@ -84,18 +86,18 @@ static void tegra_dc_write_regs(struct tegra_dc *dc,
 
 static int tegra_output_rgb_enable(struct tegra_output *output)
 {
-        struct tegra_dc *dc = to_tegra_dc(output->encoder.crtc);
+        struct tegra_rgb *rgb = to_rgb(output);
 
-        tegra_dc_write_regs(dc, rgb_enable, ARRAY_SIZE(rgb_enable));
+        tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable));
 
         return 0;
 }
 
 static int tegra_output_rgb_disable(struct tegra_output *output)
 {
-        struct tegra_dc *dc = to_tegra_dc(output->encoder.crtc);
+        struct tegra_rgb *rgb = to_rgb(output);
 
-        tegra_dc_write_regs(dc, rgb_disable, ARRAY_SIZE(rgb_disable));
+        tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable));
 
         return 0;
 }
@@ -146,6 +148,7 @@ int tegra_dc_rgb_probe(struct tegra_dc *dc)
 
         rgb->output.dev = dc->dev;
         rgb->output.of_node = np;
+        rgb->dc = dc;
 
         err = tegra_output_probe(&rgb->output);
         if (err < 0)
diff --git a/drivers/gpu/drm/udl/udl_gem.c b/drivers/gpu/drm/udl/udl_gem.c
index 24ffbe990736..8d67b943ac05 100644
--- a/drivers/gpu/drm/udl/udl_gem.c
+++ b/drivers/gpu/drm/udl/udl_gem.c
@@ -125,6 +125,12 @@ static int udl_gem_get_pages(struct udl_gem_object *obj, gfp_t gfpmask)
 
 static void udl_gem_put_pages(struct udl_gem_object *obj)
 {
+        if (obj->base.import_attach) {
+                drm_free_large(obj->pages);
+                obj->pages = NULL;
+                return;
+        }
+
         drm_gem_put_pages(&obj->base, obj->pages, false, false);
         obj->pages = NULL;
 }
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
index 7776e6f0aef6..0489c6152482 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
@@ -150,6 +150,8 @@ struct vmw_ttm_tt {
         bool mapped;
 };
 
+const size_t vmw_tt_size = sizeof(struct vmw_ttm_tt);
+
 /**
  * Helper functions to advance a struct vmw_piter iterator.
  *
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index db85985c7086..20890ad8408b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -615,6 +615,7 @@ extern int vmw_mmap(struct file *filp, struct vm_area_struct *vma);
  * TTM buffer object driver - vmwgfx_buffer.c
  */
 
+extern const size_t vmw_tt_size;
 extern struct ttm_placement vmw_vram_placement;
 extern struct ttm_placement vmw_vram_ne_placement;
 extern struct ttm_placement vmw_vram_sys_placement;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index ecb3d867b426..03f1c2038631 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -75,6 +75,7 @@ void vmw_display_unit_cleanup(struct vmw_display_unit *du)
                 vmw_surface_unreference(&du->cursor_surface);
         if (du->cursor_dmabuf)
                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
+        drm_sysfs_connector_remove(&du->connector);
         drm_crtc_cleanup(&du->crtc);
         drm_encoder_cleanup(&du->encoder);
         drm_connector_cleanup(&du->connector);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index 79f7e8e60529..a055a26819c2 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -260,6 +260,7 @@ static int vmw_ldu_crtc_set_config(struct drm_mode_set *set)
                 connector->encoder = NULL;
                 encoder->crtc = NULL;
                 crtc->fb = NULL;
+                crtc->enabled = false;
 
                 vmw_ldu_del_active(dev_priv, ldu);
 
@@ -285,6 +286,7 @@ static int vmw_ldu_crtc_set_config(struct drm_mode_set *set)
         crtc->x = set->x;
         crtc->y = set->y;
         crtc->mode = *mode;
+        crtc->enabled = true;
 
         vmw_ldu_add_active(dev_priv, ldu, vfb);
 
@@ -369,6 +371,8 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
         encoder->possible_crtcs = (1 << unit);
         encoder->possible_clones = 0;
 
+        (void) drm_sysfs_connector_add(connector);
+
         drm_crtc_init(dev, crtc, &vmw_legacy_crtc_funcs);
 
         drm_mode_crtc_set_gamma_size(crtc, 256);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index efe2b74c5eb1..9b5ea2ac7ddf 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -352,6 +352,38 @@ int vmw_user_lookup_handle(struct vmw_private *dev_priv,
 /**
  * Buffer management.
  */
+
+/**
+ * vmw_dmabuf_acc_size - Calculate the pinned memory usage of buffers
+ *
+ * @dev_priv: Pointer to a struct vmw_private identifying the device.
+ * @size: The requested buffer size.
+ * @user: Whether this is an ordinary dma buffer or a user dma buffer.
+ */
+static size_t vmw_dmabuf_acc_size(struct vmw_private *dev_priv, size_t size,
+                                  bool user)
+{
+        static size_t struct_size, user_struct_size;
+        size_t num_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
+        size_t page_array_size = ttm_round_pot(num_pages * sizeof(void *));
+
+        if (unlikely(struct_size == 0)) {
+                size_t backend_size = ttm_round_pot(vmw_tt_size);
+
+                struct_size = backend_size +
+                        ttm_round_pot(sizeof(struct vmw_dma_buffer));
+                user_struct_size = backend_size +
+                        ttm_round_pot(sizeof(struct vmw_user_dma_buffer));
+        }
+
+        if (dev_priv->map_mode == vmw_dma_alloc_coherent)
+                page_array_size +=
+                        ttm_round_pot(num_pages * sizeof(dma_addr_t));
+
+        return ((user) ? user_struct_size : struct_size) +
+                page_array_size;
+}
+
 void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo)
 {
         struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
@@ -359,6 +391,13 @@ void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo)
         kfree(vmw_bo);
 }
 
+static void vmw_user_dmabuf_destroy(struct ttm_buffer_object *bo)
+{
+        struct vmw_user_dma_buffer *vmw_user_bo = vmw_user_dma_buffer(bo);
+
+        ttm_prime_object_kfree(vmw_user_bo, prime);
+}
+
 int vmw_dmabuf_init(struct vmw_private *dev_priv,
                     struct vmw_dma_buffer *vmw_bo,
                     size_t size, struct ttm_placement *placement,
@@ -368,28 +407,23 @@ int vmw_dmabuf_init(struct vmw_private *dev_priv,
         struct ttm_bo_device *bdev = &dev_priv->bdev;
         size_t acc_size;
         int ret;
+        bool user = (bo_free == &vmw_user_dmabuf_destroy);
 
-        BUG_ON(!bo_free);
+        BUG_ON(!bo_free && (!user && (bo_free != vmw_dmabuf_bo_free)));
 
-        acc_size = ttm_bo_acc_size(bdev, size, sizeof(struct vmw_dma_buffer));
+        acc_size = vmw_dmabuf_acc_size(dev_priv, size, user);
         memset(vmw_bo, 0, sizeof(*vmw_bo));
 
         INIT_LIST_HEAD(&vmw_bo->res_list);
 
         ret = ttm_bo_init(bdev, &vmw_bo->base, size,
-                          ttm_bo_type_device, placement,
+                          (user) ? ttm_bo_type_device :
+                          ttm_bo_type_kernel, placement,
                           0, interruptible,
                           NULL, acc_size, NULL, bo_free);
         return ret;
 }
 
-static void vmw_user_dmabuf_destroy(struct ttm_buffer_object *bo)
-{
-        struct vmw_user_dma_buffer *vmw_user_bo = vmw_user_dma_buffer(bo);
-
-        ttm_prime_object_kfree(vmw_user_bo, prime);
-}
-
 static void vmw_user_dmabuf_release(struct ttm_base_object **p_base)
 {
         struct vmw_user_dma_buffer *vmw_user_bo;
@@ -781,54 +815,55 @@ err_ref:
 }
 
 
+/**
+ * vmw_dumb_create - Create a dumb kms buffer
+ *
+ * @file_priv: Pointer to a struct drm_file identifying the caller.
+ * @dev: Pointer to the drm device.
+ * @args: Pointer to a struct drm_mode_create_dumb structure
+ *
+ * This is a driver callback for the core drm create_dumb functionality.
+ * Note that this is very similar to the vmw_dmabuf_alloc ioctl, except
+ * that the arguments have a different format.
+ */
 int vmw_dumb_create(struct drm_file *file_priv,
                     struct drm_device *dev,
                     struct drm_mode_create_dumb *args)
 {
         struct vmw_private *dev_priv = vmw_priv(dev);
         struct vmw_master *vmaster = vmw_master(file_priv->master);
-        struct vmw_user_dma_buffer *vmw_user_bo;
-        struct ttm_buffer_object *tmp;
+        struct vmw_dma_buffer *dma_buf;
         int ret;
 
         args->pitch = args->width * ((args->bpp + 7) / 8);
         args->size = args->pitch * args->height;
 
-        vmw_user_bo = kzalloc(sizeof(*vmw_user_bo), GFP_KERNEL);
-        if (vmw_user_bo == NULL)
-                return -ENOMEM;
-
         ret = ttm_read_lock(&vmaster->lock, true);
-        if (ret != 0) {
-                kfree(vmw_user_bo);
+        if (unlikely(ret != 0))
                 return ret;
-        }
 
-        ret = vmw_dmabuf_init(dev_priv, &vmw_user_bo->dma, args->size,
-                              &vmw_vram_sys_placement, true,
-                              &vmw_user_dmabuf_destroy);
-        if (ret != 0)
-                goto out_no_dmabuf;
-
-        tmp = ttm_bo_reference(&vmw_user_bo->dma.base);
-        ret = ttm_prime_object_init(vmw_fpriv(file_priv)->tfile,
-                                    args->size,
-                                    &vmw_user_bo->prime,
-                                    false,
-                                    ttm_buffer_type,
-                                    &vmw_user_dmabuf_release, NULL);
+        ret = vmw_user_dmabuf_alloc(dev_priv, vmw_fpriv(file_priv)->tfile,
+                                    args->size, false, &args->handle,
+                                    &dma_buf);
         if (unlikely(ret != 0))
-                goto out_no_base_object;
-
-        args->handle = vmw_user_bo->prime.base.hash.key;
+                goto out_no_dmabuf;
 
-out_no_base_object:
-        ttm_bo_unref(&tmp);
+        vmw_dmabuf_unreference(&dma_buf);
 out_no_dmabuf:
         ttm_read_unlock(&vmaster->lock);
         return ret;
 }
 
+/**
+ * vmw_dumb_map_offset - Return the address space offset of a dumb buffer
+ *
+ * @file_priv: Pointer to a struct drm_file identifying the caller.
+ * @dev: Pointer to the drm device.
+ * @handle: Handle identifying the dumb buffer.
+ * @offset: The address space offset returned.
+ *
+ * This is a driver callback for the core drm dumb_map_offset functionality.
+ */
 int vmw_dumb_map_offset(struct drm_file *file_priv,
                         struct drm_device *dev, uint32_t handle,
                         uint64_t *offset)
@@ -846,6 +881,15 @@ int vmw_dumb_map_offset(struct drm_file *file_priv,
         return 0;
 }
 
+/**
+ * vmw_dumb_destroy - Destroy a dumb boffer
+ *
+ * @file_priv: Pointer to a struct drm_file identifying the caller.
+ * @dev: Pointer to the drm device.
+ * @handle: Handle identifying the dumb buffer.
+ *
+ * This is a driver callback for the core drm dumb_destroy functionality.
+ */
 int vmw_dumb_destroy(struct drm_file *file_priv,
                      struct drm_device *dev,
                      uint32_t handle)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 26387c3d5a21..22406c8651ea 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -310,6 +310,7 @@ static int vmw_sou_crtc_set_config(struct drm_mode_set *set)
                 crtc->fb = NULL;
                 crtc->x = 0;
                 crtc->y = 0;
+                crtc->enabled = false;
 
                 vmw_sou_del_active(dev_priv, sou);
 
@@ -370,6 +371,7 @@ static int vmw_sou_crtc_set_config(struct drm_mode_set *set)
                 crtc->fb = NULL;
                 crtc->x = 0;
                 crtc->y = 0;
+                crtc->enabled = false;
 
                 return ret;
         }
@@ -382,6 +384,7 @@ static int vmw_sou_crtc_set_config(struct drm_mode_set *set)
         crtc->fb = fb;
         crtc->x = set->x;
         crtc->y = set->y;
+        crtc->enabled = true;
 
         return 0;
 }
@@ -464,6 +467,8 @@ static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
         encoder->possible_crtcs = (1 << unit);
         encoder->possible_clones = 0;
 
+        (void) drm_sysfs_connector_add(connector);
+
         drm_crtc_init(dev, crtc, &vmw_screen_object_crtc_funcs);
 
         drm_mode_crtc_set_gamma_size(crtc, 256);
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
index 509383f8be03..6a929591aa73 100644
--- a/drivers/gpu/host1x/bus.c
+++ b/drivers/gpu/host1x/bus.c
@@ -19,6 +19,7 @@
 #include <linux/of.h>
 #include <linux/slab.h>
 
+#include "bus.h"
 #include "dev.h"
 
 static DEFINE_MUTEX(clients_lock);
@@ -257,7 +258,7 @@ static int host1x_unregister_client(struct host1x *host1x,
         return -ENODEV;
 }
 
-struct bus_type host1x_bus_type = {
+static struct bus_type host1x_bus_type = {
         .name = "host1x",
 };
 
@@ -301,7 +302,7 @@ static int host1x_device_add(struct host1x *host1x,
         device->dev.coherent_dma_mask = host1x->dev->coherent_dma_mask;
         device->dev.dma_mask = &device->dev.coherent_dma_mask;
         device->dev.release = host1x_device_release;
-        dev_set_name(&device->dev, driver->name);
+        dev_set_name(&device->dev, "%s", driver->name);
         device->dev.bus = &host1x_bus_type;
         device->dev.parent = host1x->dev;
 
diff --git a/drivers/gpu/host1x/hw/cdma_hw.c b/drivers/gpu/host1x/hw/cdma_hw.c
index 37e2a63241a9..6b09b71940c2 100644
--- a/drivers/gpu/host1x/hw/cdma_hw.c
+++ b/drivers/gpu/host1x/hw/cdma_hw.c
@@ -54,8 +54,8 @@ static void cdma_timeout_cpu_incr(struct host1x_cdma *cdma, u32 getptr,
                 u32 *p = (u32 *)((u32)pb->mapped + getptr);
                 *(p++) = HOST1X_OPCODE_NOP;
                 *(p++) = HOST1X_OPCODE_NOP;
-                dev_dbg(host1x->dev, "%s: NOP at 0x%x\n", __func__,
-                        pb->phys + getptr);
+                dev_dbg(host1x->dev, "%s: NOP at %#llx\n", __func__,
+                        (u64)pb->phys + getptr);
                 getptr = (getptr + 8) & (pb->size_bytes - 1);
         }
         wmb();
diff --git a/drivers/gpu/host1x/hw/debug_hw.c b/drivers/gpu/host1x/hw/debug_hw.c
index 640c75ca5a8b..f72c873eff81 100644
--- a/drivers/gpu/host1x/hw/debug_hw.c
+++ b/drivers/gpu/host1x/hw/debug_hw.c
@@ -163,8 +163,8 @@ static void show_channel_gathers(struct output *o, struct host1x_cdma *cdma)
                                 continue;
                         }
 
-                        host1x_debug_output(o, "    GATHER at %08x+%04x, %d words\n",
-                                            g->base, g->offset, g->words);
+                        host1x_debug_output(o, "    GATHER at %#llx+%04x, %d words\n",
+                                            (u64)g->base, g->offset, g->words);
 
                         show_gather(o, g->base + g->offset, g->words, cdma,
                                     g->base, mapped);
diff --git a/drivers/hid/hid-kye.c b/drivers/hid/hid-kye.c
index ecb5ca669e97..e77696367591 100644
--- a/drivers/hid/hid-kye.c
+++ b/drivers/hid/hid-kye.c
@@ -341,6 +341,7 @@ static __u8 *kye_report_fixup(struct hid_device *hdev, __u8 *rdesc,
         case USB_DEVICE_ID_GENIUS_GX_IMPERATOR:
                 rdesc = kye_consumer_control_fixup(hdev, rdesc, rsize, 83,
                                         "Genius Gx Imperator Keyboard");
+                break;
         case USB_DEVICE_ID_GENIUS_MANTICORE:
                 rdesc = kye_consumer_control_fixup(hdev, rdesc, rsize, 104,
                                         "Genius Manticore Keyboard");
diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c
index a184e1921c11..8fab82829f8b 100644
--- a/drivers/hid/hid-sensor-hub.c
+++ b/drivers/hid/hid-sensor-hub.c
@@ -112,13 +112,15 @@ static int sensor_hub_get_physical_device_count(
 
 static void sensor_hub_fill_attr_info(
                 struct hid_sensor_hub_attribute_info *info,
-                s32 index, s32 report_id, s32 units, s32 unit_expo, s32 size)
+                s32 index, s32 report_id, struct hid_field *field)
 {
         info->index = index;
         info->report_id = report_id;
-        info->units = units;
-        info->unit_expo = unit_expo;
-        info->size = size/8;
+        info->units = field->unit;
+        info->unit_expo = field->unit_exponent;
+        info->size = (field->report_size * field->report_count)/8;
+        info->logical_minimum = field->logical_minimum;
+        info->logical_maximum = field->logical_maximum;
 }
 
 static struct hid_sensor_hub_callbacks *sensor_hub_get_callback(
@@ -325,9 +327,7 @@ int sensor_hub_input_get_attribute_info(struct hid_sensor_hub_device *hsdev,
                         if (field->physical == usage_id &&
                                 field->logical == attr_usage_id) {
                                 sensor_hub_fill_attr_info(info, i, report->id,
-                                        field->unit, field->unit_exponent,
-                                        field->report_size *
-                                                        field->report_count);
+                                                          field);
                                 ret = 0;
                         } else {
                                 for (j = 0; j < field->maxusage; ++j) {
@@ -336,11 +336,7 @@ int sensor_hub_input_get_attribute_info(struct hid_sensor_hub_device *hsdev,
                                         field->usage[j].collection_index ==
                                         collection_index) {
                                                 sensor_hub_fill_attr_info(info,
-                                                        i, report->id,
-                                                        field->unit,
-                                                        field->unit_exponent,
-                                                        field->report_size *
-                                                        field->report_count);
+                                                          i, report->id, field);
                                                 ret = 0;
                                                 break;
                                         }
@@ -573,6 +569,8 @@ static int sensor_hub_probe(struct hid_device *hdev,
                                         goto err_free_names;
                         }
                         sd->hid_sensor_hub_client_devs[
+                                sd->hid_sensor_client_cnt].id = PLATFORM_DEVID_AUTO;
+                        sd->hid_sensor_hub_client_devs[
                                 sd->hid_sensor_client_cnt].name = name;
                         sd->hid_sensor_hub_client_devs[
                                 sd->hid_sensor_client_cnt].platform_data =
diff --git a/drivers/hwmon/hih6130.c b/drivers/hwmon/hih6130.c
index 2dc37c7c6947..7d68a08baaa8 100644
--- a/drivers/hwmon/hih6130.c
+++ b/drivers/hwmon/hih6130.c
@@ -43,6 +43,7 @@
  * @last_update: time of last update (jiffies)
  * @temperature: cached temperature measurement value
  * @humidity: cached humidity measurement value
+ * @write_length: length for I2C measurement request
  */
 struct hih6130 {
         struct device *hwmon_dev;
@@ -51,6 +52,7 @@ struct hih6130 {
         unsigned long last_update;
         int temperature;
         int humidity;
+        size_t write_length;
 };
 
 /**
@@ -121,8 +123,15 @@ static int hih6130_update_measurements(struct i2c_client *client)
          */
         if (time_after(jiffies, hih6130->last_update + HZ) || !hih6130->valid) {
 
-                /* write to slave address, no data, to request a measurement */
-                ret = i2c_master_send(client, tmp, 0);
+                /*
+                 * Write to slave address to request a measurement.
+                 * According with the datasheet it should be with no data, but
+                 * for systems with I2C bus drivers that do not allow zero
+                 * length packets we write one dummy byte to allow sensor
+                 * measurements on them.
+                 */
+                tmp[0] = 0;
+                ret = i2c_master_send(client, tmp, hih6130->write_length);
                 if (ret < 0)
                         goto out;
 
@@ -252,6 +261,9 @@ static int hih6130_probe(struct i2c_client *client,
                 goto fail_remove_sysfs;
         }
 
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_QUICK))
+                hih6130->write_length = 1;
+
         return 0;
 
 fail_remove_sysfs:
diff --git a/drivers/hwmon/lm78.c b/drivers/hwmon/lm78.c
index 6cf6bff79003..a2f3b4a365e4 100644
--- a/drivers/hwmon/lm78.c
+++ b/drivers/hwmon/lm78.c
@@ -94,6 +94,8 @@ static inline u8 FAN_TO_REG(long rpm, int div)
 {
         if (rpm <= 0)
                 return 255;
+        if (rpm > 1350000)
+                return 1;
         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 }
 
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index 4c4c1421bf28..8b8f3aa49726 100644
--- a/drivers/hwmon/lm90.c
+++ b/drivers/hwmon/lm90.c
@@ -1610,12 +1610,14 @@ static int lm90_probe(struct i2c_client *client,
                                                 "lm90", client);
                 if (err < 0) {
                         dev_err(dev, "cannot request IRQ %d\n", client->irq);
-                        goto exit_remove_files;
+                        goto exit_unregister;
                 }
         }
 
         return 0;
 
+exit_unregister:
+        hwmon_device_unregister(data->hwmon_dev);
 exit_remove_files:
         lm90_remove_files(client, data);
 exit_restore:
diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 1404e6319deb..72a889702f0d 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -141,6 +141,8 @@ static inline u8 FAN_TO_REG(long rpm, int div)
 {
         if (rpm <= 0)
                 return 255;
+        if (rpm > 1350000)
+                return 1;
         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 }
 
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index 0e7017841f7d..aee14e2192f8 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -145,7 +145,7 @@ static const u8 regtempmin[] = { 0x3a, 0x3e, 0x2c, 0x2e, 0x30, 0x32 };
  */
 static inline u8 FAN_TO_REG(long rpm, int div)
 {
-        if (rpm == 0)
+        if (rpm <= 0 || rpm > 1310720)
                 return 0;
         return clamp_val(1310720 / (rpm * div), 1, 255);
 }
diff --git a/drivers/hwmon/w83l786ng.c b/drivers/hwmon/w83l786ng.c
index edb06cda5a68..6ed76ceb9270 100644
--- a/drivers/hwmon/w83l786ng.c
+++ b/drivers/hwmon/w83l786ng.c
@@ -481,9 +481,11 @@ store_pwm(struct device *dev, struct device_attribute *attr,
         if (err)
                 return err;
         val = clamp_val(val, 0, 255);
+        val = DIV_ROUND_CLOSEST(val, 0x11);
 
         mutex_lock(&data->update_lock);
-        data->pwm[nr] = val;
+        data->pwm[nr] = val * 0x11;
+        val |= w83l786ng_read_value(client, W83L786NG_REG_PWM[nr]) & 0xf0;
         w83l786ng_write_value(client, W83L786NG_REG_PWM[nr], val);
         mutex_unlock(&data->update_lock);
         return count;
@@ -510,7 +512,7 @@ store_pwm_enable(struct device *dev, struct device_attribute *attr,
         mutex_lock(&data->update_lock);
         reg = w83l786ng_read_value(client, W83L786NG_REG_FAN_CFG);
         data->pwm_enable[nr] = val;
-        reg &= ~(0x02 << W83L786NG_PWM_ENABLE_SHIFT[nr]);
+        reg &= ~(0x03 << W83L786NG_PWM_ENABLE_SHIFT[nr]);
         reg |= (val - 1) << W83L786NG_PWM_ENABLE_SHIFT[nr];
         w83l786ng_write_value(client, W83L786NG_REG_FAN_CFG, reg);
         mutex_unlock(&data->update_lock);
@@ -776,9 +778,10 @@ static struct w83l786ng_data *w83l786ng_update_device(struct device *dev)
                             ((pwmcfg >> W83L786NG_PWM_MODE_SHIFT[i]) & 1)
                             ? 0 : 1;
                         data->pwm_enable[i] =
-                            ((pwmcfg >> W83L786NG_PWM_ENABLE_SHIFT[i]) & 2) + 1;
-                        data->pwm[i] = w83l786ng_read_value(client,
-                            W83L786NG_REG_PWM[i]);
+                            ((pwmcfg >> W83L786NG_PWM_ENABLE_SHIFT[i]) & 3) + 1;
+                        data->pwm[i] =
+                            (w83l786ng_read_value(client, W83L786NG_REG_PWM[i])
+                             & 0x0f) * 0x11;
                 }
 
 
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 1d7efa3169cd..d0cfbb4cb964 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -312,7 +312,9 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
 
         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 
-        clk_prepare_enable(i2c_imx->clk);
+        result = clk_prepare_enable(i2c_imx->clk);
+        if (result)
+                return result;
         imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR);
         /* Enable I2C controller */
         imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR);
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index e661edee4d0c..9704537aee3c 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -27,7 +27,7 @@
 #include <linux/slab.h>
 #include <linux/of_device.h>
 #include <linux/module.h>
-#include <linux/clk/tegra.h>
+#include <linux/reset.h>
 
 #include <asm/unaligned.h>
 
@@ -160,6 +160,7 @@ struct tegra_i2c_dev {
         struct i2c_adapter adapter;
         struct clk *div_clk;
         struct clk *fast_clk;
+        struct reset_control *rst;
         void __iomem *base;
         int cont_id;
         int irq;
@@ -415,9 +416,9 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
                 return err;
         }
 
-        tegra_periph_reset_assert(i2c_dev->div_clk);
+        reset_control_assert(i2c_dev->rst);
         udelay(2);
-        tegra_periph_reset_deassert(i2c_dev->div_clk);
+        reset_control_deassert(i2c_dev->rst);
 
         if (i2c_dev->is_dvc)
                 tegra_dvc_init(i2c_dev);
@@ -743,6 +744,12 @@ static int tegra_i2c_probe(struct platform_device *pdev)
         i2c_dev->cont_id = pdev->id;
         i2c_dev->dev = &pdev->dev;
 
+        i2c_dev->rst = devm_reset_control_get(&pdev->dev, "i2c");
+        if (IS_ERR(i2c_dev->rst)) {
+                dev_err(&pdev->dev, "missing controller reset");
+                return PTR_ERR(i2c_dev->rst);
+        }
+
         ret = of_property_read_u32(i2c_dev->dev->of_node, "clock-frequency",
                                         &i2c_dev->bus_clk_rate);
         if (ret)
diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
index 797e3117bef7..2d0847b6be62 100644
--- a/drivers/i2c/i2c-mux.c
+++ b/drivers/i2c/i2c-mux.c
@@ -139,6 +139,8 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,
         priv->adap.algo = &priv->algo;
         priv->adap.algo_data = priv;
         priv->adap.dev.parent = &parent->dev;
+        priv->adap.retries = parent->retries;
+        priv->adap.timeout = parent->timeout;
 
         /* Sanity check on class */
         if (i2c_mux_parent_classes(parent) & class)
diff --git a/drivers/iio/common/hid-sensors/Kconfig b/drivers/iio/common/hid-sensors/Kconfig
index 1178121b55b0..39188b72cd3b 100644
--- a/drivers/iio/common/hid-sensors/Kconfig
+++ b/drivers/iio/common/hid-sensors/Kconfig
@@ -25,13 +25,4 @@ config HID_SENSOR_IIO_TRIGGER
           If this driver is compiled as a module, it will be named
           hid-sensor-trigger.
 
-config HID_SENSOR_ENUM_BASE_QUIRKS
-        bool "ENUM base quirks for HID Sensor IIO drivers"
-        depends on HID_SENSOR_IIO_COMMON
-        help
-          Say yes here to build support for sensor hub FW using
-          enumeration, which is using 1 as base instead of 0.
-          Since logical minimum is still set 0 instead of 1,
-          there is no easy way to differentiate.
-
 endmenu
diff --git a/drivers/iio/common/hid-sensors/hid-sensor-trigger.c b/drivers/iio/common/hid-sensors/hid-sensor-trigger.c
index bbd6426c9726..7dcf83998e6f 100644
--- a/drivers/iio/common/hid-sensors/hid-sensor-trigger.c
+++ b/drivers/iio/common/hid-sensors/hid-sensor-trigger.c
@@ -33,24 +33,34 @@ static int hid_sensor_data_rdy_trigger_set_state(struct iio_trigger *trig,
 {
         struct hid_sensor_common *st = iio_trigger_get_drvdata(trig);
         int state_val;
+        int report_val;
 
         if (state) {
                 if (sensor_hub_device_open(st->hsdev))
                         return -EIO;
-        } else
+                state_val =
+                HID_USAGE_SENSOR_PROP_POWER_STATE_D0_FULL_POWER_ENUM;
+                report_val =
+                HID_USAGE_SENSOR_PROP_REPORTING_STATE_ALL_EVENTS_ENUM;
+
+        } else {
                 sensor_hub_device_close(st->hsdev);
+                state_val =
+                HID_USAGE_SENSOR_PROP_POWER_STATE_D4_POWER_OFF_ENUM;
+                report_val =
+                HID_USAGE_SENSOR_PROP_REPORTING_STATE_NO_EVENTS_ENUM;
+        }
 
-        state_val = state ? 1 : 0;
-        if (IS_ENABLED(CONFIG_HID_SENSOR_ENUM_BASE_QUIRKS))
-                ++state_val;
         st->data_ready = state;
+        state_val += st->power_state.logical_minimum;
+        report_val += st->report_state.logical_minimum;
         sensor_hub_set_feature(st->hsdev, st->power_state.report_id,
                                         st->power_state.index,
                                         (s32)state_val);
 
         sensor_hub_set_feature(st->hsdev, st->report_state.report_id,
                                         st->report_state.index,
-                                        (s32)state_val);
+                                        (s32)report_val);
 
         return 0;
 }
diff --git a/drivers/iio/light/Kconfig b/drivers/iio/light/Kconfig
index b0d65df3ede2..a022f27c6690 100644
--- a/drivers/iio/light/Kconfig
+++ b/drivers/iio/light/Kconfig
@@ -43,6 +43,7 @@ config GP2AP020A00F
         depends on I2C
         select IIO_BUFFER
         select IIO_TRIGGERED_BUFFER
+        select IRQ_WORK
         help
           Say Y here if you have a Sharp GP2AP020A00F proximity/ALS combo-chip
           hooked to an I2C bus.
diff --git a/drivers/input/keyboard/adp5588-keys.c b/drivers/input/keyboard/adp5588-keys.c
index dbd2047f1641..3ed23513d881 100644
--- a/drivers/input/keyboard/adp5588-keys.c
+++ b/drivers/input/keyboard/adp5588-keys.c
@@ -536,7 +536,8 @@ static int adp5588_probe(struct i2c_client *client,
                 __set_bit(EV_REP, input->evbit);
 
         for (i = 0; i < input->keycodemax; i++)
-                __set_bit(kpad->keycode[i] & KEY_MAX, input->keybit);
+                if (kpad->keycode[i] <= KEY_MAX)
+                        __set_bit(kpad->keycode[i], input->keybit);
         __clear_bit(KEY_RESERVED, input->keybit);
 
         if (kpad->gpimapsize)
diff --git a/drivers/input/keyboard/adp5589-keys.c b/drivers/input/keyboard/adp5589-keys.c
index 67d12b3427c9..60dafd4fa692 100644
--- a/drivers/input/keyboard/adp5589-keys.c
+++ b/drivers/input/keyboard/adp5589-keys.c
@@ -992,7 +992,8 @@ static int adp5589_probe(struct i2c_client *client,
                 __set_bit(EV_REP, input->evbit);
 
         for (i = 0; i < input->keycodemax; i++)
-                __set_bit(kpad->keycode[i] & KEY_MAX, input->keybit);
+                if (kpad->keycode[i] <= KEY_MAX)
+                        __set_bit(kpad->keycode[i], input->keybit);
         __clear_bit(KEY_RESERVED, input->keybit);
 
         if (kpad->gpimapsize)
diff --git a/drivers/input/keyboard/bf54x-keys.c b/drivers/input/keyboard/bf54x-keys.c
index fc88fb48d70d..09b91d093087 100644
--- a/drivers/input/keyboard/bf54x-keys.c
+++ b/drivers/input/keyboard/bf54x-keys.c
@@ -289,7 +289,8 @@ static int bfin_kpad_probe(struct platform_device *pdev)
                 __set_bit(EV_REP, input->evbit);
 
         for (i = 0; i < input->keycodemax; i++)
-                __set_bit(bf54x_kpad->keycode[i] & KEY_MAX, input->keybit);
+                if (bf54x_kpad->keycode[i] <= KEY_MAX)
+                        __set_bit(bf54x_kpad->keycode[i], input->keybit);
         __clear_bit(KEY_RESERVED, input->keybit);
 
         error = input_register_device(input);
diff --git a/drivers/input/keyboard/tegra-kbc.c b/drivers/input/keyboard/tegra-kbc.c
index 8508879f6faf..9757a58bc897 100644
--- a/drivers/input/keyboard/tegra-kbc.c
+++ b/drivers/input/keyboard/tegra-kbc.c
@@ -31,7 +31,7 @@
 #include <linux/clk.h>
 #include <linux/slab.h>
 #include <linux/input/matrix_keypad.h>
-#include <linux/clk/tegra.h>
+#include <linux/reset.h>
 #include <linux/err.h>
 
 #define KBC_MAX_KPENT   8
@@ -116,6 +116,7 @@ struct tegra_kbc {
         u32 wakeup_key;
         struct timer_list timer;
         struct clk *clk;
+        struct reset_control *rst;
         const struct tegra_kbc_hw_support *hw_support;
         int max_keys;
         int num_rows_and_columns;
@@ -373,9 +374,9 @@ static int tegra_kbc_start(struct tegra_kbc *kbc)
         clk_prepare_enable(kbc->clk);
 
         /* Reset the KBC controller to clear all previous status.*/
-        tegra_periph_reset_assert(kbc->clk);
+        reset_control_assert(kbc->rst);
         udelay(100);
-        tegra_periph_reset_deassert(kbc->clk);
+        reset_control_assert(kbc->rst);
         udelay(100);
 
         tegra_kbc_config_pins(kbc);
@@ -663,6 +664,12 @@ static int tegra_kbc_probe(struct platform_device *pdev)
                 return PTR_ERR(kbc->clk);
         }
 
+        kbc->rst = devm_reset_control_get(&pdev->dev, "kbc");
+        if (IS_ERR(kbc->rst)) {
+                dev_err(&pdev->dev, "failed to get keyboard reset\n");
+                return PTR_ERR(kbc->rst);
+        }
+
         /*
          * The time delay between two consecutive reads of the FIFO is
          * the sum of the repeat time and the time taken for scanning
diff --git a/drivers/input/misc/adxl34x.c b/drivers/input/misc/adxl34x.c
index 0735de3a6468..1cb1da294419 100644
--- a/drivers/input/misc/adxl34x.c
+++ b/drivers/input/misc/adxl34x.c
@@ -158,7 +158,7 @@
 
 /* ORIENT ADXL346 only */
 #define ADXL346_2D_VALID                (1 << 6)
-#define ADXL346_2D_ORIENT(x)            (((x) & 0x3) >> 4)
+#define ADXL346_2D_ORIENT(x)            (((x) & 0x30) >> 4)
 #define ADXL346_3D_VALID                (1 << 3)
 #define ADXL346_3D_ORIENT(x)            ((x) & 0x7)
 #define ADXL346_2D_PORTRAIT_POS         0       /* +X */
diff --git a/drivers/input/misc/pcf8574_keypad.c b/drivers/input/misc/pcf8574_keypad.c
index e37392976fdd..0deca5a3c87f 100644
--- a/drivers/input/misc/pcf8574_keypad.c
+++ b/drivers/input/misc/pcf8574_keypad.c
@@ -113,9 +113,12 @@ static int pcf8574_kp_probe(struct i2c_client *client, const struct i2c_device_i
         idev->keycodemax = ARRAY_SIZE(lp->btncode);
 
         for (i = 0; i < ARRAY_SIZE(pcf8574_kp_btncode); i++) {
-                lp->btncode[i] = pcf8574_kp_btncode[i];
-                __set_bit(lp->btncode[i] & KEY_MAX, idev->keybit);
+                if (lp->btncode[i] <= KEY_MAX) {
+                        lp->btncode[i] = pcf8574_kp_btncode[i];
+                        __set_bit(lp->btncode[i], idev->keybit);
+                }
         }
+        __clear_bit(KEY_RESERVED, idev->keybit);
 
         sprintf(lp->name, DRV_NAME);
         sprintf(lp->phys, "kp_data/input0");
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index ca7a26f1dce8..5cf62e315218 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -70,6 +70,25 @@ static const struct alps_nibble_commands alps_v4_nibble_commands[] = {
         { PSMOUSE_CMD_SETSCALE11,       0x00 }, /* f */
 };
 
+static const struct alps_nibble_commands alps_v6_nibble_commands[] = {
+        { PSMOUSE_CMD_ENABLE,           0x00 }, /* 0 */
+        { PSMOUSE_CMD_SETRATE,          0x0a }, /* 1 */
+        { PSMOUSE_CMD_SETRATE,          0x14 }, /* 2 */
+        { PSMOUSE_CMD_SETRATE,          0x28 }, /* 3 */
+        { PSMOUSE_CMD_SETRATE,          0x3c }, /* 4 */
+        { PSMOUSE_CMD_SETRATE,          0x50 }, /* 5 */
+        { PSMOUSE_CMD_SETRATE,          0x64 }, /* 6 */
+        { PSMOUSE_CMD_SETRATE,          0xc8 }, /* 7 */
+        { PSMOUSE_CMD_GETID,            0x00 }, /* 8 */
+        { PSMOUSE_CMD_GETINFO,          0x00 }, /* 9 */
+        { PSMOUSE_CMD_SETRES,           0x00 }, /* a */
+        { PSMOUSE_CMD_SETRES,           0x01 }, /* b */
+        { PSMOUSE_CMD_SETRES,           0x02 }, /* c */
+        { PSMOUSE_CMD_SETRES,           0x03 }, /* d */
+        { PSMOUSE_CMD_SETSCALE21,       0x00 }, /* e */
+        { PSMOUSE_CMD_SETSCALE11,       0x00 }, /* f */
+};
+
 
 #define ALPS_DUALPOINT          0x02    /* touchpad has trackstick */
 #define ALPS_PASS               0x04    /* device has a pass-through port */
@@ -103,6 +122,7 @@ static const struct alps_model_info alps_model_data[] = {
         /* Dell Latitude E5500, E6400, E6500, Precision M4400 */
         { { 0x62, 0x02, 0x14 }, 0x00, ALPS_PROTO_V2, 0xcf, 0xcf,
                 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED },
+        { { 0x73, 0x00, 0x14 }, 0x00, ALPS_PROTO_V6, 0xff, 0xff, ALPS_DUALPOINT },              /* Dell XT2 */
         { { 0x73, 0x02, 0x50 }, 0x00, ALPS_PROTO_V2, 0xcf, 0xcf, ALPS_FOUR_BUTTONS },           /* Dell Vostro 1400 */
         { { 0x52, 0x01, 0x14 }, 0x00, ALPS_PROTO_V2, 0xff, 0xff,
                 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED },                            /* Toshiba Tecra A11-11L */
@@ -645,6 +665,76 @@ static void alps_process_packet_v3(struct psmouse *psmouse)
         alps_process_touchpad_packet_v3(psmouse);
 }
 
+static void alps_process_packet_v6(struct psmouse *psmouse)
+{
+        struct alps_data *priv = psmouse->private;
+        unsigned char *packet = psmouse->packet;
+        struct input_dev *dev = psmouse->dev;
+        struct input_dev *dev2 = priv->dev2;
+        int x, y, z, left, right, middle;
+
+        /*
+         * We can use Byte5 to distinguish if the packet is from Touchpad
+         * or Trackpoint.
+         * Touchpad:    0 - 0x7E
+         * Trackpoint:  0x7F
+         */
+        if (packet[5] == 0x7F) {
+                /* It should be a DualPoint when received Trackpoint packet */
+                if (!(priv->flags & ALPS_DUALPOINT))
+                        return;
+
+                /* Trackpoint packet */
+                x = packet[1] | ((packet[3] & 0x20) << 2);
+                y = packet[2] | ((packet[3] & 0x40) << 1);
+                z = packet[4];
+                left = packet[3] & 0x01;
+                right = packet[3] & 0x02;
+                middle = packet[3] & 0x04;
+
+                /* To prevent the cursor jump when finger lifted */
+                if (x == 0x7F && y == 0x7F && z == 0x7F)
+                        x = y = z = 0;
+
+                /* Divide 4 since trackpoint's speed is too fast */
+                input_report_rel(dev2, REL_X, (char)x / 4);
+                input_report_rel(dev2, REL_Y, -((char)y / 4));
+
+                input_report_key(dev2, BTN_LEFT, left);
+                input_report_key(dev2, BTN_RIGHT, right);
+                input_report_key(dev2, BTN_MIDDLE, middle);
+
+                input_sync(dev2);
+                return;
+        }
+
+        /* Touchpad packet */
+        x = packet[1] | ((packet[3] & 0x78) << 4);
+        y = packet[2] | ((packet[4] & 0x78) << 4);
+        z = packet[5];
+        left = packet[3] & 0x01;
+        right = packet[3] & 0x02;
+
+        if (z > 30)
+                input_report_key(dev, BTN_TOUCH, 1);
+        if (z < 25)
+                input_report_key(dev, BTN_TOUCH, 0);
+
+        if (z > 0) {
+                input_report_abs(dev, ABS_X, x);
+                input_report_abs(dev, ABS_Y, y);
+        }
+
+        input_report_abs(dev, ABS_PRESSURE, z);
+        input_report_key(dev, BTN_TOOL_FINGER, z > 0);
+
+        /* v6 touchpad does not have middle button */
+        input_report_key(dev, BTN_LEFT, left);
+        input_report_key(dev, BTN_RIGHT, right);
+
+        input_sync(dev);
+}
+
 static void alps_process_packet_v4(struct psmouse *psmouse)
 {
         struct alps_data *priv = psmouse->private;
@@ -897,7 +987,7 @@ static psmouse_ret_t alps_process_byte(struct psmouse *psmouse)
         }
 
         /* Bytes 2 - pktsize should have 0 in the highest bit */
-        if (priv->proto_version != ALPS_PROTO_V5 &&
+        if ((priv->proto_version < ALPS_PROTO_V5) &&
             psmouse->pktcnt >= 2 && psmouse->pktcnt <= psmouse->pktsize &&
             (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) {
                 psmouse_dbg(psmouse, "refusing packet[%i] = %x\n",
@@ -1085,6 +1175,80 @@ static int alps_absolute_mode_v1_v2(struct psmouse *psmouse)
         return ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_SETPOLL);
 }
 
+static int alps_monitor_mode_send_word(struct psmouse *psmouse, u16 word)
+{
+        int i, nibble;
+
+        /*
+         * b0-b11 are valid bits, send sequence is inverse.
+         * e.g. when word = 0x0123, nibble send sequence is 3, 2, 1
+         */
+        for (i = 0; i <= 8; i += 4) {
+                nibble = (word >> i) & 0xf;
+                if (alps_command_mode_send_nibble(psmouse, nibble))
+                        return -1;
+        }
+
+        return 0;
+}
+
+static int alps_monitor_mode_write_reg(struct psmouse *psmouse,
+                                       u16 addr, u16 value)
+{
+        struct ps2dev *ps2dev = &psmouse->ps2dev;
+
+        /* 0x0A0 is the command to write the word */
+        if (ps2_command(ps2dev, NULL, PSMOUSE_CMD_ENABLE) ||
+            alps_monitor_mode_send_word(psmouse, 0x0A0) ||
+            alps_monitor_mode_send_word(psmouse, addr) ||
+            alps_monitor_mode_send_word(psmouse, value) ||
+            ps2_command(ps2dev, NULL, PSMOUSE_CMD_DISABLE))
+                return -1;
+
+        return 0;
+}
+
+static int alps_monitor_mode(struct psmouse *psmouse, bool enable)
+{
+        struct ps2dev *ps2dev = &psmouse->ps2dev;
+
+        if (enable) {
+                /* EC E9 F5 F5 E7 E6 E7 E9 to enter monitor mode */
+                if (ps2_command(ps2dev, NULL, PSMOUSE_CMD_RESET_WRAP) ||
+                    ps2_command(ps2dev, NULL, PSMOUSE_CMD_GETINFO) ||
+                    ps2_command(ps2dev, NULL, PSMOUSE_CMD_DISABLE) ||
+                    ps2_command(ps2dev, NULL, PSMOUSE_CMD_DISABLE) ||
+                    ps2_command(ps2dev, NULL, PSMOUSE_CMD_SETSCALE21) ||
+                    ps2_command(ps2dev, NULL, PSMOUSE_CMD_SETSCALE11) ||
+                    ps2_command(ps2dev, NULL, PSMOUSE_CMD_SETSCALE21) ||
+                    ps2_command(ps2dev, NULL, PSMOUSE_CMD_GETINFO))
+                        return -1;
+        } else {
+                /* EC to exit monitor mode */
+                if (ps2_command(ps2dev, NULL, PSMOUSE_CMD_RESET_WRAP))
+                        return -1;
+        }
+
+        return 0;
+}
+
+static int alps_absolute_mode_v6(struct psmouse *psmouse)
+{
+        u16 reg_val = 0x181;
+        int ret = -1;
+
+        /* enter monitor mode, to write the register */
+        if (alps_monitor_mode(psmouse, true))
+                return -1;
+
+        ret = alps_monitor_mode_write_reg(psmouse, 0x000, reg_val);
+
+        if (alps_monitor_mode(psmouse, false))
+                ret = -1;
+
+        return ret;
+}
+
 static int alps_get_status(struct psmouse *psmouse, char *param)
 {
         /* Get status: 0xF5 0xF5 0xF5 0xE9 */
@@ -1189,6 +1353,32 @@ static int alps_hw_init_v1_v2(struct psmouse *psmouse)
         return 0;
 }
 
+static int alps_hw_init_v6(struct psmouse *psmouse)
+{
+        unsigned char param[2] = {0xC8, 0x14};
+
+        /* Enter passthrough mode to let trackpoint enter 6byte raw mode */
+        if (alps_passthrough_mode_v2(psmouse, true))
+                return -1;
+
+        if (ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_SETSCALE11) ||
+            ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_SETSCALE11) ||
+            ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_SETSCALE11) ||
+            ps2_command(&psmouse->ps2dev, &param[0], PSMOUSE_CMD_SETRATE) ||
+            ps2_command(&psmouse->ps2dev, &param[1], PSMOUSE_CMD_SETRATE))
+                return -1;
+
+        if (alps_passthrough_mode_v2(psmouse, false))
+                return -1;
+
+        if (alps_absolute_mode_v6(psmouse)) {
+                psmouse_err(psmouse, "Failed to enable absolute mode\n");
+                return -1;
+        }
+
+        return 0;
+}
+
 /*
  * Enable or disable passthrough mode to the trackstick.
  */
@@ -1553,6 +1743,8 @@ static void alps_set_defaults(struct alps_data *priv)
                 priv->hw_init = alps_hw_init_v1_v2;
                 priv->process_packet = alps_process_packet_v1_v2;
                 priv->set_abs_params = alps_set_abs_params_st;
+                priv->x_max = 1023;
+                priv->y_max = 767;
                 break;
         case ALPS_PROTO_V3:
                 priv->hw_init = alps_hw_init_v3;
@@ -1584,6 +1776,14 @@ static void alps_set_defaults(struct alps_data *priv)
                 priv->x_bits = 23;
                 priv->y_bits = 12;
                 break;
+        case ALPS_PROTO_V6:
+                priv->hw_init = alps_hw_init_v6;
+                priv->process_packet = alps_process_packet_v6;
+                priv->set_abs_params = alps_set_abs_params_st;
+                priv->nibble_commands = alps_v6_nibble_commands;
+                priv->x_max = 2047;
+                priv->y_max = 1535;
+                break;
         }
 }
 
@@ -1705,8 +1905,8 @@ static void alps_disconnect(struct psmouse *psmouse)
 static void alps_set_abs_params_st(struct alps_data *priv,
                                    struct input_dev *dev1)
 {
-        input_set_abs_params(dev1, ABS_X, 0, 1023, 0, 0);
-        input_set_abs_params(dev1, ABS_Y, 0, 767, 0, 0);
+        input_set_abs_params(dev1, ABS_X, 0, priv->x_max, 0, 0);
+        input_set_abs_params(dev1, ABS_Y, 0, priv->y_max, 0, 0);
 }
 
 static void alps_set_abs_params_mt(struct alps_data *priv,
diff --git a/drivers/input/mouse/alps.h b/drivers/input/mouse/alps.h
index eee59853b9ce..704f0f924307 100644
--- a/drivers/input/mouse/alps.h
+++ b/drivers/input/mouse/alps.h
@@ -17,6 +17,7 @@
 #define ALPS_PROTO_V3   3
 #define ALPS_PROTO_V4   4
 #define ALPS_PROTO_V5   5
+#define ALPS_PROTO_V6   6
 
 /**
  * struct alps_model_info - touchpad ID table
diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c
index 8551dcaf24db..597e9b8fc18d 100644
--- a/drivers/input/mouse/elantech.c
+++ b/drivers/input/mouse/elantech.c
@@ -1313,6 +1313,7 @@ static int elantech_set_properties(struct elantech_data *etd)
                         break;
                 case 6:
                 case 7:
+                case 8:
                         etd->hw_version = 4;
                         break;
                 default:
diff --git a/drivers/input/serio/serio.c b/drivers/input/serio/serio.c
index 98707fb2cb5d..8f4c4ab04bc2 100644
--- a/drivers/input/serio/serio.c
+++ b/drivers/input/serio/serio.c
@@ -455,16 +455,26 @@ static DEVICE_ATTR_RO(type);
 static DEVICE_ATTR_RO(proto);
 static DEVICE_ATTR_RO(id);
 static DEVICE_ATTR_RO(extra);
-static DEVICE_ATTR_RO(modalias);
-static DEVICE_ATTR_WO(drvctl);
-static DEVICE_ATTR(description, S_IRUGO, serio_show_description, NULL);
-static DEVICE_ATTR(bind_mode, S_IWUSR | S_IRUGO, serio_show_bind_mode, serio_set_bind_mode);
 
 static struct attribute *serio_device_id_attrs[] = {
         &dev_attr_type.attr,
         &dev_attr_proto.attr,
         &dev_attr_id.attr,
         &dev_attr_extra.attr,
+        NULL
+};
+
+static struct attribute_group serio_id_attr_group = {
+        .name   = "id",
+        .attrs  = serio_device_id_attrs,
+};
+
+static DEVICE_ATTR_RO(modalias);
+static DEVICE_ATTR_WO(drvctl);
+static DEVICE_ATTR(description, S_IRUGO, serio_show_description, NULL);
+static DEVICE_ATTR(bind_mode, S_IWUSR | S_IRUGO, serio_show_bind_mode, serio_set_bind_mode);
+
+static struct attribute *serio_device_attrs[] = {
         &dev_attr_modalias.attr,
         &dev_attr_description.attr,
         &dev_attr_drvctl.attr,
@@ -472,13 +482,13 @@ static struct attribute *serio_device_id_attrs[] = {
         NULL
 };
 
-static struct attribute_group serio_id_attr_group = {
-        .name   = "id",
-        .attrs  = serio_device_id_attrs,
+static struct attribute_group serio_device_attr_group = {
+        .attrs  = serio_device_attrs,
 };
 
 static const struct attribute_group *serio_device_attr_groups[] = {
         &serio_id_attr_group,
+        &serio_device_attr_group,
         NULL
 };
 
diff --git a/drivers/input/touchscreen/sur40.c b/drivers/input/touchscreen/sur40.c
index cfd1b7e8c001..f1cb05148b46 100644
--- a/drivers/input/touchscreen/sur40.c
+++ b/drivers/input/touchscreen/sur40.c
@@ -251,7 +251,7 @@ static void sur40_poll(struct input_polled_dev *polldev)
         struct sur40_state *sur40 = polldev->private;
         struct input_dev *input = polldev->input;
         int result, bulk_read, need_blobs, packet_blobs, i;
-        u32 packet_id;
+        u32 uninitialized_var(packet_id);
 
         struct sur40_header *header = &sur40->bulk_in_buffer->header;
         struct sur40_blob *inblob = &sur40->bulk_in_buffer->blobs[0];
@@ -286,7 +286,7 @@ static void sur40_poll(struct input_polled_dev *polldev)
                 if (need_blobs == -1) {
                         need_blobs = le16_to_cpu(header->count);
                         dev_dbg(sur40->dev, "need %d blobs\n", need_blobs);
-                        packet_id = header->packet_id;
+                        packet_id = le32_to_cpu(header->packet_id);
                 }
 
                 /*
diff --git a/drivers/input/touchscreen/usbtouchscreen.c b/drivers/input/touchscreen/usbtouchscreen.c
index ae4b6b903629..5f87bed05467 100644
--- a/drivers/input/touchscreen/usbtouchscreen.c
+++ b/drivers/input/touchscreen/usbtouchscreen.c
@@ -106,6 +106,7 @@ struct usbtouch_device_info {
 struct usbtouch_usb {
         unsigned char *data;
         dma_addr_t data_dma;
+        int data_size;
         unsigned char *buffer;
         int buf_len;
         struct urb *irq;
@@ -1521,7 +1522,7 @@ static int usbtouch_reset_resume(struct usb_interface *intf)
 static void usbtouch_free_buffers(struct usb_device *udev,
                                   struct usbtouch_usb *usbtouch)
 {
-        usb_free_coherent(udev, usbtouch->type->rept_size,
+        usb_free_coherent(udev, usbtouch->data_size,
                           usbtouch->data, usbtouch->data_dma);
         kfree(usbtouch->buffer);
 }
@@ -1566,7 +1567,20 @@ static int usbtouch_probe(struct usb_interface *intf,
         if (!type->process_pkt)
                 type->process_pkt = usbtouch_process_pkt;
 
-        usbtouch->data = usb_alloc_coherent(udev, type->rept_size,
+        usbtouch->data_size = type->rept_size;
+        if (type->get_pkt_len) {
+                /*
+                 * When dealing with variable-length packets we should
+                 * not request more than wMaxPacketSize bytes at once
+                 * as we do not know if there is more data coming or
+                 * we filled exactly wMaxPacketSize bytes and there is
+                 * nothing else.
+                 */
+                usbtouch->data_size = min(usbtouch->data_size,
+                                          usb_endpoint_maxp(endpoint));
+        }
+
+        usbtouch->data = usb_alloc_coherent(udev, usbtouch->data_size,
                                             GFP_KERNEL, &usbtouch->data_dma);
         if (!usbtouch->data)
                 goto out_free;
@@ -1626,12 +1640,12 @@ static int usbtouch_probe(struct usb_interface *intf,
         if (usb_endpoint_type(endpoint) == USB_ENDPOINT_XFER_INT)
                 usb_fill_int_urb(usbtouch->irq, udev,
                          usb_rcvintpipe(udev, endpoint->bEndpointAddress),
-                         usbtouch->data, type->rept_size,
+                         usbtouch->data, usbtouch->data_size,
                          usbtouch_irq, usbtouch, endpoint->bInterval);
         else
                 usb_fill_bulk_urb(usbtouch->irq, udev,
                          usb_rcvbulkpipe(udev, endpoint->bEndpointAddress),
-                         usbtouch->data, type->rept_size,
+                         usbtouch->data, usbtouch->data_size,
                          usbtouch_irq, usbtouch);
 
         usbtouch->irq->dev = udev;
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 1abfb5684ab7..e46a88700b68 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -392,7 +392,7 @@ struct arm_smmu_domain {
         struct arm_smmu_cfg             root_cfg;
         phys_addr_t                     output_mask;
 
-        spinlock_t                      lock;
+        struct mutex                    lock;
 };
 
 static DEFINE_SPINLOCK(arm_smmu_devices_lock);
@@ -900,7 +900,7 @@ static int arm_smmu_domain_init(struct iommu_domain *domain)
                 goto out_free_domain;
         smmu_domain->root_cfg.pgd = pgd;
 
-        spin_lock_init(&smmu_domain->lock);
+        mutex_init(&smmu_domain->lock);
         domain->priv = smmu_domain;
         return 0;
 
@@ -1137,7 +1137,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
          * Sanity check the domain. We don't currently support domains
          * that cross between different SMMU chains.
          */
-        spin_lock(&smmu_domain->lock);
+        mutex_lock(&smmu_domain->lock);
         if (!smmu_domain->leaf_smmu) {
                 /* Now that we have a master, we can finalise the domain */
                 ret = arm_smmu_init_domain_context(domain, dev);
@@ -1152,7 +1152,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
                         dev_name(device_smmu->dev));
                 goto err_unlock;
         }
-        spin_unlock(&smmu_domain->lock);
+        mutex_unlock(&smmu_domain->lock);
 
         /* Looks ok, so add the device to the domain */
         master = find_smmu_master(smmu_domain->leaf_smmu, dev->of_node);
@@ -1162,7 +1162,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
         return arm_smmu_domain_add_master(smmu_domain, master);
 
 err_unlock:
-        spin_unlock(&smmu_domain->lock);
+        mutex_unlock(&smmu_domain->lock);
         return ret;
 }
 
@@ -1394,7 +1394,7 @@ static int arm_smmu_handle_mapping(struct arm_smmu_domain *smmu_domain,
         if (paddr & ~output_mask)
                 return -ERANGE;
 
-        spin_lock(&smmu_domain->lock);
+        mutex_lock(&smmu_domain->lock);
         pgd += pgd_index(iova);
         end = iova + size;
         do {
@@ -1410,7 +1410,7 @@ static int arm_smmu_handle_mapping(struct arm_smmu_domain *smmu_domain,
         } while (pgd++, iova != end);
 
 out_unlock:
-        spin_unlock(&smmu_domain->lock);
+        mutex_unlock(&smmu_domain->lock);
 
         /* Ensure new page tables are visible to the hardware walker */
         if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK)
@@ -1423,9 +1423,8 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova,
                         phys_addr_t paddr, size_t size, int flags)
 {
         struct arm_smmu_domain *smmu_domain = domain->priv;
-        struct arm_smmu_device *smmu = smmu_domain->leaf_smmu;
 
-        if (!smmu_domain || !smmu)
+        if (!smmu_domain)
                 return -ENODEV;
 
         /* Check for silent address truncation up the SMMU chain. */
@@ -1449,44 +1448,34 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
 static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
                                          dma_addr_t iova)
 {
-        pgd_t *pgd;
-        pud_t *pud;
-        pmd_t *pmd;
-        pte_t *pte;
+        pgd_t *pgdp, pgd;
+        pud_t pud;
+        pmd_t pmd;
+        pte_t pte;
         struct arm_smmu_domain *smmu_domain = domain->priv;
         struct arm_smmu_cfg *root_cfg = &smmu_domain->root_cfg;
-        struct arm_smmu_device *smmu = root_cfg->smmu;
 
-        spin_lock(&smmu_domain->lock);
-        pgd = root_cfg->pgd;
-        if (!pgd)
-                goto err_unlock;
+        pgdp = root_cfg->pgd;
+        if (!pgdp)
+                return 0;
 
-        pgd += pgd_index(iova);
-        if (pgd_none_or_clear_bad(pgd))
-                goto err_unlock;
+        pgd = *(pgdp + pgd_index(iova));
+        if (pgd_none(pgd))
+                return 0;
 
-        pud = pud_offset(pgd, iova);
-        if (pud_none_or_clear_bad(pud))
-                goto err_unlock;
+        pud = *pud_offset(&pgd, iova);
+        if (pud_none(pud))
+                return 0;
 
-        pmd = pmd_offset(pud, iova);
-        if (pmd_none_or_clear_bad(pmd))
-                goto err_unlock;
+        pmd = *pmd_offset(&pud, iova);
+        if (pmd_none(pmd))
+                return 0;
 
-        pte = pmd_page_vaddr(*pmd) + pte_index(iova);
+        pte = *(pmd_page_vaddr(pmd) + pte_index(iova));
         if (pte_none(pte))
-                goto err_unlock;
-
-        spin_unlock(&smmu_domain->lock);
-        return __pfn_to_phys(pte_pfn(*pte)) | (iova & ~PAGE_MASK);
+                return 0;
 
-err_unlock:
-        spin_unlock(&smmu_domain->lock);
-        dev_warn(smmu->dev,
-                 "invalid (corrupt?) page tables detected for iova 0x%llx\n",
-                 (unsigned long long)iova);
-        return -EINVAL;
+        return __pfn_to_phys(pte_pfn(pte)) | (iova & ~PAGE_MASK);
 }
 
 static int arm_smmu_domain_has_cap(struct iommu_domain *domain,
@@ -1863,6 +1852,7 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
                 dev_err(dev,
                         "found only %d context interrupt(s) but %d required\n",
                         smmu->num_context_irqs, smmu->num_context_banks);
+                err = -ENODEV;
                 goto out_put_parent;
         }
 
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 3792a1aa52b8..940638ddc982 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -30,6 +30,10 @@ config ARM_VIC_NR
           The maximum number of VICs available in the system, for
           power management.
 
+config DW_APB_ICTL
+        bool
+        select IRQ_DOMAIN
+
 config IMGPDC_IRQ
         bool
         select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index c60b9010b152..6427323af4c3 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_MMP)			+= irq-mmp.o
 obj-$(CONFIG_ARCH_MVEBU)                += irq-armada-370-xp.o
 obj-$(CONFIG_ARCH_MXS)                  += irq-mxs.o
 obj-$(CONFIG_ARCH_S3C24XX)              += irq-s3c24xx.o
+obj-$(CONFIG_DW_APB_ICTL)               += irq-dw-apb-ictl.o
 obj-$(CONFIG_METAG)                     += irq-metag-ext.o
 obj-$(CONFIG_METAG_PERFCOUNTER_IRQS)    += irq-metag.o
 obj-$(CONFIG_ARCH_MOXART)               += irq-moxart.o
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
new file mode 100644
index 000000000000..31e231e1f566
--- /dev/null
+++ b/drivers/irqchip/irq-dw-apb-ictl.c
@@ -0,0 +1,150 @@
+/*
+ * Synopsys DW APB ICTL irqchip driver.
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#include "irqchip.h"
+
+#define APB_INT_ENABLE_L        0x00
+#define APB_INT_ENABLE_H        0x04
+#define APB_INT_MASK_L          0x08
+#define APB_INT_MASK_H          0x0c
+#define APB_INT_FINALSTATUS_L   0x30
+#define APB_INT_FINALSTATUS_H   0x34
+
+static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc)
+{
+        struct irq_chip *chip = irq_get_chip(irq);
+        struct irq_chip_generic *gc = irq_get_handler_data(irq);
+        struct irq_domain *d = gc->private;
+        u32 stat;
+        int n;
+
+        chained_irq_enter(chip, desc);
+
+        for (n = 0; n < gc->num_ct; n++) {
+                stat = readl_relaxed(gc->reg_base +
+                                     APB_INT_FINALSTATUS_L + 4 * n);
+                while (stat) {
+                        u32 hwirq = ffs(stat) - 1;
+                        generic_handle_irq(irq_find_mapping(d,
+                                            gc->irq_base + hwirq + 32 * n));
+                        stat &= ~(1 << hwirq);
+                }
+        }
+
+        chained_irq_exit(chip, desc);
+}
+
+static int __init dw_apb_ictl_init(struct device_node *np,
+                                   struct device_node *parent)
+{
+        unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+        struct resource r;
+        struct irq_domain *domain;
+        struct irq_chip_generic *gc;
+        void __iomem *iobase;
+        int ret, nrirqs, irq;
+        u32 reg;
+
+        /* Map the parent interrupt for the chained handler */
+        irq = irq_of_parse_and_map(np, 0);
+        if (irq <= 0) {
+                pr_err("%s: unable to parse irq\n", np->full_name);
+                return -EINVAL;
+        }
+
+        ret = of_address_to_resource(np, 0, &r);
+        if (ret) {
+                pr_err("%s: unable to get resource\n", np->full_name);
+                return ret;
+        }
+
+        if (!request_mem_region(r.start, resource_size(&r), np->full_name)) {
+                pr_err("%s: unable to request mem region\n", np->full_name);
+                return -ENOMEM;
+        }
+
+        iobase = ioremap(r.start, resource_size(&r));
+        if (!iobase) {
+                pr_err("%s: unable to map resource\n", np->full_name);
+                ret = -ENOMEM;
+                goto err_release;
+        }
+
+        /*
+         * DW IP can be configured to allow 2-64 irqs. We can determine
+         * the number of irqs supported by writing into enable register
+         * and look for bits not set, as corresponding flip-flops will
+         * have been removed by sythesis tool.
+         */
+
+        /* mask and enable all interrupts */
+        writel(~0, iobase + APB_INT_MASK_L);
+        writel(~0, iobase + APB_INT_MASK_H);
+        writel(~0, iobase + APB_INT_ENABLE_L);
+        writel(~0, iobase + APB_INT_ENABLE_H);
+
+        reg = readl(iobase + APB_INT_ENABLE_H);
+        if (reg)
+                nrirqs = 32 + fls(reg);
+        else
+                nrirqs = fls(readl(iobase + APB_INT_ENABLE_L));
+
+        domain = irq_domain_add_linear(np, nrirqs,
+                                       &irq_generic_chip_ops, NULL);
+        if (!domain) {
+                pr_err("%s: unable to add irq domain\n", np->full_name);
+                ret = -ENOMEM;
+                goto err_unmap;
+        }
+
+        ret = irq_alloc_domain_generic_chips(domain, 32, (nrirqs > 32) ? 2 : 1,
+                                             np->name, handle_level_irq, clr, 0,
+                                             IRQ_GC_INIT_MASK_CACHE);
+        if (ret) {
+                pr_err("%s: unable to alloc irq domain gc\n", np->full_name);
+                goto err_unmap;
+        }
+
+        gc = irq_get_domain_generic_chip(domain, 0);
+        gc->private = domain;
+        gc->reg_base = iobase;
+
+        gc->chip_types[0].regs.mask = APB_INT_MASK_L;
+        gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
+        gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
+
+        if (nrirqs > 32) {
+                gc->chip_types[1].regs.mask = APB_INT_MASK_H;
+                gc->chip_types[1].chip.irq_mask = irq_gc_mask_set_bit;
+                gc->chip_types[1].chip.irq_unmask = irq_gc_mask_clr_bit;
+        }
+
+        irq_set_handler_data(irq, gc);
+        irq_set_chained_handler(irq, dw_apb_ictl_handler);
+
+        return 0;
+
+err_unmap:
+        iounmap(iobase);
+err_release:
+        release_mem_region(r.start, resource_size(&r));
+        return ret;
+}
+IRQCHIP_DECLARE(dw_apb_ictl,
+                "snps,dw-apb-ictl", dw_apb_ictl_init);
diff --git a/drivers/md/dm-bufio.c b/drivers/md/dm-bufio.c
index 173cbb20d104..54bdd923316f 100644
--- a/drivers/md/dm-bufio.c
+++ b/drivers/md/dm-bufio.c
@@ -1717,6 +1717,11 @@ static int __init dm_bufio_init(void)
 {
         __u64 mem;
 
+        dm_bufio_allocated_kmem_cache = 0;
+        dm_bufio_allocated_get_free_pages = 0;
+        dm_bufio_allocated_vmalloc = 0;
+        dm_bufio_current_allocated = 0;
+
         memset(&dm_bufio_caches, 0, sizeof dm_bufio_caches);
         memset(&dm_bufio_cache_names, 0, sizeof dm_bufio_cache_names);
 
diff --git a/drivers/md/dm-cache-policy-mq.c b/drivers/md/dm-cache-policy-mq.c
index 416b7b752a6e..64780ad73bb0 100644
--- a/drivers/md/dm-cache-policy-mq.c
+++ b/drivers/md/dm-cache-policy-mq.c
@@ -730,15 +730,18 @@ static int pre_cache_entry_found(struct mq_policy *mq, struct entry *e,
         int r = 0;
         bool updated = updated_this_tick(mq, e);
 
-        requeue_and_update_tick(mq, e);
-
         if ((!discarded_oblock && updated) ||
-            !should_promote(mq, e, discarded_oblock, data_dir))
+            !should_promote(mq, e, discarded_oblock, data_dir)) {
+                requeue_and_update_tick(mq, e);
                 result->op = POLICY_MISS;
-        else if (!can_migrate)
+
+        } else if (!can_migrate)
                 r = -EWOULDBLOCK;
-        else
+
+        else {
+                requeue_and_update_tick(mq, e);
                 r = pre_cache_to_cache(mq, e, result);
+        }
 
         return r;
 }
diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c
index 9efcf1059b99..1b1469ebe5cb 100644
--- a/drivers/md/dm-cache-target.c
+++ b/drivers/md/dm-cache-target.c
@@ -2755,7 +2755,7 @@ static int resize_cache_dev(struct cache *cache, dm_cblock_t new_size)
 {
         int r;
 
-        r = dm_cache_resize(cache->cmd, cache->cache_size);
+        r = dm_cache_resize(cache->cmd, new_size);
         if (r) {
                 DMERR("could not resize cache metadata");
                 return r;
diff --git a/drivers/md/dm-delay.c b/drivers/md/dm-delay.c
index 496d5f3646a5..2f91d6d4a2cc 100644
--- a/drivers/md/dm-delay.c
+++ b/drivers/md/dm-delay.c
@@ -20,6 +20,7 @@
 struct delay_c {
         struct timer_list delay_timer;
         struct mutex timer_lock;
+        struct workqueue_struct *kdelayd_wq;
         struct work_struct flush_expired_bios;
         struct list_head delayed_bios;
         atomic_t may_delay;
@@ -45,14 +46,13 @@ struct dm_delay_info {
 
 static DEFINE_MUTEX(delayed_bios_lock);
 
-static struct workqueue_struct *kdelayd_wq;
 static struct kmem_cache *delayed_cache;
 
 static void handle_delayed_timer(unsigned long data)
 {
         struct delay_c *dc = (struct delay_c *)data;
 
-        queue_work(kdelayd_wq, &dc->flush_expired_bios);
+        queue_work(dc->kdelayd_wq, &dc->flush_expired_bios);
 }
 
 static void queue_timeout(struct delay_c *dc, unsigned long expires)
@@ -191,6 +191,12 @@ out:
                 goto bad_dev_write;
         }
 
+        dc->kdelayd_wq = alloc_workqueue("kdelayd", WQ_MEM_RECLAIM, 0);
+        if (!dc->kdelayd_wq) {
+                DMERR("Couldn't start kdelayd");
+                goto bad_queue;
+        }
+
         setup_timer(&dc->delay_timer, handle_delayed_timer, (unsigned long)dc);
 
         INIT_WORK(&dc->flush_expired_bios, flush_expired_bios);
@@ -203,6 +209,8 @@ out:
         ti->private = dc;
         return 0;
 
+bad_queue:
+        mempool_destroy(dc->delayed_pool);
 bad_dev_write:
         if (dc->dev_write)
                 dm_put_device(ti, dc->dev_write);
@@ -217,7 +225,7 @@ static void delay_dtr(struct dm_target *ti)
 {
         struct delay_c *dc = ti->private;
 
-        flush_workqueue(kdelayd_wq);
+        destroy_workqueue(dc->kdelayd_wq);
 
         dm_put_device(ti, dc->dev_read);
 
@@ -350,12 +358,6 @@ static int __init dm_delay_init(void)
 {
         int r = -ENOMEM;
 
-        kdelayd_wq = alloc_workqueue("kdelayd", WQ_MEM_RECLAIM, 0);
-        if (!kdelayd_wq) {
-                DMERR("Couldn't start kdelayd");
-                goto bad_queue;
-        }
-
         delayed_cache = KMEM_CACHE(dm_delay_info, 0);
         if (!delayed_cache) {
                 DMERR("Couldn't create delayed bio cache.");
@@ -373,8 +375,6 @@ static int __init dm_delay_init(void)
 bad_register:
         kmem_cache_destroy(delayed_cache);
 bad_memcache:
-        destroy_workqueue(kdelayd_wq);
-bad_queue:
         return r;
 }
 
@@ -382,7 +382,6 @@ static void __exit dm_delay_exit(void)
 {
         dm_unregister_target(&delay_target);
         kmem_cache_destroy(delayed_cache);
-        destroy_workqueue(kdelayd_wq);
 }
 
 /* Module hooks */
diff --git a/drivers/md/dm-snap.c b/drivers/md/dm-snap.c
index aec57d76db5d..944690bafd93 100644
--- a/drivers/md/dm-snap.c
+++ b/drivers/md/dm-snap.c
@@ -66,6 +66,18 @@ struct dm_snapshot {
 
         atomic_t pending_exceptions_count;
 
+        /* Protected by "lock" */
+        sector_t exception_start_sequence;
+
+        /* Protected by kcopyd single-threaded callback */
+        sector_t exception_complete_sequence;
+
+        /*
+         * A list of pending exceptions that completed out of order.
+         * Protected by kcopyd single-threaded callback.
+         */
+        struct list_head out_of_order_list;
+
         mempool_t *pending_pool;
 
         struct dm_exception_table pending;
@@ -173,6 +185,14 @@ struct dm_snap_pending_exception {
          */
         int started;
 
+        /* There was copying error. */
+        int copy_error;
+
+        /* A sequence number, it is used for in-order completion. */
+        sector_t exception_sequence;
+
+        struct list_head out_of_order_entry;
+
         /*
          * For writing a complete chunk, bypassing the copy.
          */
@@ -1094,6 +1114,9 @@ static int snapshot_ctr(struct dm_target *ti, unsigned int argc, char **argv)
         s->valid = 1;
         s->active = 0;
         atomic_set(&s->pending_exceptions_count, 0);
+        s->exception_start_sequence = 0;
+        s->exception_complete_sequence = 0;
+        INIT_LIST_HEAD(&s->out_of_order_list);
         init_rwsem(&s->lock);
         INIT_LIST_HEAD(&s->list);
         spin_lock_init(&s->pe_lock);
@@ -1443,6 +1466,19 @@ static void commit_callback(void *context, int success)
         pending_complete(pe, success);
 }
 
+static void complete_exception(struct dm_snap_pending_exception *pe)
+{
+        struct dm_snapshot *s = pe->snap;
+
+        if (unlikely(pe->copy_error))
+                pending_complete(pe, 0);
+
+        else
+                /* Update the metadata if we are persistent */
+                s->store->type->commit_exception(s->store, &pe->e,
+                                                 commit_callback, pe);
+}
+
 /*
  * Called when the copy I/O has finished.  kcopyd actually runs
  * this code so don't block.
@@ -1452,13 +1488,32 @@ static void copy_callback(int read_err, unsigned long write_err, void *context)
         struct dm_snap_pending_exception *pe = context;
         struct dm_snapshot *s = pe->snap;
 
-        if (read_err || write_err)
-                pending_complete(pe, 0);
+        pe->copy_error = read_err || write_err;
 
-        else
-                /* Update the metadata if we are persistent */
-                s->store->type->commit_exception(s->store, &pe->e,
-                                                 commit_callback, pe);
+        if (pe->exception_sequence == s->exception_complete_sequence) {
+                s->exception_complete_sequence++;
+                complete_exception(pe);
+
+                while (!list_empty(&s->out_of_order_list)) {
+                        pe = list_entry(s->out_of_order_list.next,
+                                        struct dm_snap_pending_exception, out_of_order_entry);
+                        if (pe->exception_sequence != s->exception_complete_sequence)
+                                break;
+                        s->exception_complete_sequence++;
+                        list_del(&pe->out_of_order_entry);
+                        complete_exception(pe);
+                }
+        } else {
+                struct list_head *lh;
+                struct dm_snap_pending_exception *pe2;
+
+                list_for_each_prev(lh, &s->out_of_order_list) {
+                        pe2 = list_entry(lh, struct dm_snap_pending_exception, out_of_order_entry);
+                        if (pe2->exception_sequence < pe->exception_sequence)
+                                break;
+                }
+                list_add(&pe->out_of_order_entry, lh);
+        }
 }
 
 /*
@@ -1553,6 +1608,8 @@ __find_pending_exception(struct dm_snapshot *s,
                 return NULL;
         }
 
+        pe->exception_sequence = s->exception_start_sequence++;
+
         dm_insert_exception(&s->pending, &pe->e);
 
         return pe;
@@ -2192,7 +2249,7 @@ static struct target_type origin_target = {
 
 static struct target_type snapshot_target = {
         .name    = "snapshot",
-        .version = {1, 11, 1},
+        .version = {1, 12, 0},
         .module  = THIS_MODULE,
         .ctr     = snapshot_ctr,
         .dtr     = snapshot_dtr,
diff --git a/drivers/md/dm-stats.c b/drivers/md/dm-stats.c
index 3d404c1371ed..28a90122a5a8 100644
--- a/drivers/md/dm-stats.c
+++ b/drivers/md/dm-stats.c
@@ -964,6 +964,7 @@ int dm_stats_message(struct mapped_device *md, unsigned argc, char **argv,
 
 int __init dm_statistics_init(void)
 {
+        shared_memory_amount = 0;
         dm_stat_need_rcu_barrier = 0;
         return 0;
 }
diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c
index 465f08ca62b1..3ba6a3859ce3 100644
--- a/drivers/md/dm-table.c
+++ b/drivers/md/dm-table.c
@@ -200,6 +200,11 @@ int dm_table_create(struct dm_table **result, fmode_t mode,
 
         num_targets = dm_round_up(num_targets, KEYS_PER_NODE);
 
+        if (!num_targets) {
+                kfree(t);
+                return -ENOMEM;
+        }
+
         if (alloc_targets(t, num_targets)) {
                 kfree(t);
                 return -ENOMEM;
diff --git a/drivers/md/dm-thin-metadata.c b/drivers/md/dm-thin-metadata.c
index 60bce435f4fa..8a30ad54bd46 100644
--- a/drivers/md/dm-thin-metadata.c
+++ b/drivers/md/dm-thin-metadata.c
@@ -1697,6 +1697,14 @@ void dm_pool_metadata_read_only(struct dm_pool_metadata *pmd)
         up_write(&pmd->root_lock);
 }
 
+void dm_pool_metadata_read_write(struct dm_pool_metadata *pmd)
+{
+        down_write(&pmd->root_lock);
+        pmd->read_only = false;
+        dm_bm_set_read_write(pmd->bm);
+        up_write(&pmd->root_lock);
+}
+
 int dm_pool_register_metadata_threshold(struct dm_pool_metadata *pmd,
                                         dm_block_t threshold,
                                         dm_sm_threshold_fn fn,
diff --git a/drivers/md/dm-thin-metadata.h b/drivers/md/dm-thin-metadata.h
index 845ebbe589a9..7bcc0e1d6238 100644
--- a/drivers/md/dm-thin-metadata.h
+++ b/drivers/md/dm-thin-metadata.h
@@ -193,6 +193,7 @@ int dm_pool_resize_metadata_dev(struct dm_pool_metadata *pmd, dm_block_t new_siz
  * that nothing is changing.
  */
 void dm_pool_metadata_read_only(struct dm_pool_metadata *pmd);
+void dm_pool_metadata_read_write(struct dm_pool_metadata *pmd);
 
 int dm_pool_register_metadata_threshold(struct dm_pool_metadata *pmd,
                                         dm_block_t threshold,
diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c
index 2c0cf511ec23..ee29037ffc2e 100644
--- a/drivers/md/dm-thin.c
+++ b/drivers/md/dm-thin.c
@@ -640,7 +640,9 @@ static void process_prepared_mapping(struct dm_thin_new_mapping *m)
          */
         r = dm_thin_insert_block(tc->td, m->virt_block, m->data_block);
         if (r) {
-                DMERR_LIMIT("dm_thin_insert_block() failed");
+                DMERR_LIMIT("%s: dm_thin_insert_block() failed: error = %d",
+                            dm_device_name(pool->pool_md), r);
+                set_pool_mode(pool, PM_READ_ONLY);
                 cell_error(pool, m->cell);
                 goto out;
         }
@@ -881,32 +883,23 @@ static void schedule_zero(struct thin_c *tc, dm_block_t virt_block,
         }
 }
 
-static int commit(struct pool *pool)
-{
-        int r;
-
-        r = dm_pool_commit_metadata(pool->pmd);
-        if (r)
-                DMERR_LIMIT("%s: commit failed: error = %d",
-                            dm_device_name(pool->pool_md), r);
-
-        return r;
-}
-
 /*
  * A non-zero return indicates read_only or fail_io mode.
  * Many callers don't care about the return value.
  */
-static int commit_or_fallback(struct pool *pool)
+static int commit(struct pool *pool)
 {
         int r;
 
         if (get_pool_mode(pool) != PM_WRITE)
                 return -EINVAL;
 
-        r = commit(pool);
-        if (r)
+        r = dm_pool_commit_metadata(pool->pmd);
+        if (r) {
+                DMERR_LIMIT("%s: dm_pool_commit_metadata failed: error = %d",
+                            dm_device_name(pool->pool_md), r);
                 set_pool_mode(pool, PM_READ_ONLY);
+        }
 
         return r;
 }
@@ -943,7 +936,9 @@ static int alloc_data_block(struct thin_c *tc, dm_block_t *result)
                  * Try to commit to see if that will free up some
                  * more space.
                  */
-                (void) commit_or_fallback(pool);
+                r = commit(pool);
+                if (r)
+                        return r;
 
                 r = dm_pool_get_free_block_count(pool->pmd, &free_blocks);
                 if (r)
@@ -957,7 +952,7 @@ static int alloc_data_block(struct thin_c *tc, dm_block_t *result)
                  * table reload).
                  */
                 if (!free_blocks) {
-                        DMWARN("%s: no free space available.",
+                        DMWARN("%s: no free data space available.",
                                dm_device_name(pool->pool_md));
                         spin_lock_irqsave(&pool->lock, flags);
                         pool->no_free_space = 1;
@@ -967,8 +962,16 @@ static int alloc_data_block(struct thin_c *tc, dm_block_t *result)
         }
 
         r = dm_pool_alloc_data_block(pool->pmd, result);
-        if (r)
+        if (r) {
+                if (r == -ENOSPC &&
+                    !dm_pool_get_free_metadata_block_count(pool->pmd, &free_blocks) &&
+                    !free_blocks) {
+                        DMWARN("%s: no free metadata space available.",
+                               dm_device_name(pool->pool_md));
+                        set_pool_mode(pool, PM_READ_ONLY);
+                }
                 return r;
+        }
 
         return 0;
 }
@@ -1349,7 +1352,7 @@ static void process_deferred_bios(struct pool *pool)
         if (bio_list_empty(&bios) && !need_commit_due_to_time(pool))
                 return;
 
-        if (commit_or_fallback(pool)) {
+        if (commit(pool)) {
                 while ((bio = bio_list_pop(&bios)))
                         bio_io_error(bio);
                 return;
@@ -1397,6 +1400,7 @@ static void set_pool_mode(struct pool *pool, enum pool_mode mode)
         case PM_FAIL:
                 DMERR("%s: switching pool to failure mode",
                       dm_device_name(pool->pool_md));
+                dm_pool_metadata_read_only(pool->pmd);
                 pool->process_bio = process_bio_fail;
                 pool->process_discard = process_bio_fail;
                 pool->process_prepared_mapping = process_prepared_mapping_fail;
@@ -1421,6 +1425,7 @@ static void set_pool_mode(struct pool *pool, enum pool_mode mode)
                 break;
 
         case PM_WRITE:
+                dm_pool_metadata_read_write(pool->pmd);
                 pool->process_bio = process_bio;
                 pool->process_discard = process_discard;
                 pool->process_prepared_mapping = process_prepared_mapping;
@@ -1637,12 +1642,19 @@ static int bind_control_target(struct pool *pool, struct dm_target *ti)
         struct pool_c *pt = ti->private;
 
         /*
-         * We want to make sure that degraded pools are never upgraded.
+         * We want to make sure that a pool in PM_FAIL mode is never upgraded.
          */
         enum pool_mode old_mode = pool->pf.mode;
         enum pool_mode new_mode = pt->adjusted_pf.mode;
 
-        if (old_mode > new_mode)
+        /*
+         * If we were in PM_FAIL mode, rollback of metadata failed.  We're
+         * not going to recover without a thin_repair.  So we never let the
+         * pool move out of the old mode.  On the other hand a PM_READ_ONLY
+         * may have been due to a lack of metadata or data space, and may
+         * now work (ie. if the underlying devices have been resized).
+         */
+        if (old_mode == PM_FAIL)
                 new_mode = old_mode;
 
         pool->ti = ti;
@@ -2266,7 +2278,7 @@ static int pool_preresume(struct dm_target *ti)
                 return r;
 
         if (need_commit1 || need_commit2)
-                (void) commit_or_fallback(pool);
+                (void) commit(pool);
 
         return 0;
 }
@@ -2293,7 +2305,7 @@ static void pool_postsuspend(struct dm_target *ti)
 
         cancel_delayed_work(&pool->waker);
         flush_workqueue(pool->wq);
-        (void) commit_or_fallback(pool);
+        (void) commit(pool);
 }
 
 static int check_arg_count(unsigned argc, unsigned args_required)
@@ -2427,7 +2439,7 @@ static int process_reserve_metadata_snap_mesg(unsigned argc, char **argv, struct
         if (r)
                 return r;
 
-        (void) commit_or_fallback(pool);
+        (void) commit(pool);
 
         r = dm_pool_reserve_metadata_snap(pool->pmd);
         if (r)
@@ -2489,7 +2501,7 @@ static int pool_message(struct dm_target *ti, unsigned argc, char **argv)
                 DMWARN("Unrecognised thin pool target message received: %s", argv[0]);
 
         if (!r)
-                (void) commit_or_fallback(pool);
+                (void) commit(pool);
 
         return r;
 }
@@ -2544,7 +2556,7 @@ static void pool_status(struct dm_target *ti, status_type_t type,
 
                 /* Commit to ensure statistics aren't out-of-date */
                 if (!(status_flags & DM_STATUS_NOFLUSH_FLAG) && !dm_suspended(ti))
-                        (void) commit_or_fallback(pool);
+                        (void) commit(pool);
 
                 r = dm_pool_get_metadata_transaction_id(pool->pmd, &transaction_id);
                 if (r) {
diff --git a/drivers/md/persistent-data/dm-array.c b/drivers/md/persistent-data/dm-array.c
index af96e24ec328..1d75b1dc1e2e 100644
--- a/drivers/md/persistent-data/dm-array.c
+++ b/drivers/md/persistent-data/dm-array.c
@@ -317,8 +317,16 @@ static int shadow_ablock(struct dm_array_info *info, dm_block_t *root,
          * The shadow op will often be a noop.  Only insert if it really
          * copied data.
          */
-        if (dm_block_location(*block) != b)
+        if (dm_block_location(*block) != b) {
+                /*
+                 * dm_tm_shadow_block will have already decremented the old
+                 * block, but it is still referenced by the btree.  We
+                 * increment to stop the insert decrementing it below zero
+                 * when overwriting the old value.
+                 */
+                dm_tm_inc(info->btree_info.tm, b);
                 r = insert_ablock(info, index, *block, root);
+        }
 
         return r;
 }
diff --git a/drivers/md/persistent-data/dm-block-manager.c b/drivers/md/persistent-data/dm-block-manager.c
index a7e8bf296388..064a3c271baa 100644
--- a/drivers/md/persistent-data/dm-block-manager.c
+++ b/drivers/md/persistent-data/dm-block-manager.c
@@ -626,6 +626,12 @@ void dm_bm_set_read_only(struct dm_block_manager *bm)
 }
 EXPORT_SYMBOL_GPL(dm_bm_set_read_only);
 
+void dm_bm_set_read_write(struct dm_block_manager *bm)
+{
+        bm->read_only = false;
+}
+EXPORT_SYMBOL_GPL(dm_bm_set_read_write);
+
 u32 dm_bm_checksum(const void *data, size_t len, u32 init_xor)
 {
         return crc32c(~(u32) 0, data, len) ^ init_xor;
diff --git a/drivers/md/persistent-data/dm-block-manager.h b/drivers/md/persistent-data/dm-block-manager.h
index 9a82083a66b6..13cd58e1fe69 100644
--- a/drivers/md/persistent-data/dm-block-manager.h
+++ b/drivers/md/persistent-data/dm-block-manager.h
@@ -108,9 +108,9 @@ int dm_bm_unlock(struct dm_block *b);
 int dm_bm_flush_and_unlock(struct dm_block_manager *bm,
                            struct dm_block *superblock);
 
- /*
-  * Request data be prefetched into the cache.
-  */
+/*
+ * Request data is prefetched into the cache.
+ */
 void dm_bm_prefetch(struct dm_block_manager *bm, dm_block_t b);
 
 /*
@@ -125,6 +125,7 @@ void dm_bm_prefetch(struct dm_block_manager *bm, dm_block_t b);
  * be returned if you do.
  */
 void dm_bm_set_read_only(struct dm_block_manager *bm);
+void dm_bm_set_read_write(struct dm_block_manager *bm);
 
 u32 dm_bm_checksum(const void *data, size_t len, u32 init_xor);
 
diff --git a/drivers/md/persistent-data/dm-space-map-common.c b/drivers/md/persistent-data/dm-space-map-common.c
index 6058569fe86c..466a60bbd716 100644
--- a/drivers/md/persistent-data/dm-space-map-common.c
+++ b/drivers/md/persistent-data/dm-space-map-common.c
@@ -381,7 +381,7 @@ int sm_ll_find_free_block(struct ll_disk *ll, dm_block_t begin,
 }
 
 static int sm_ll_mutate(struct ll_disk *ll, dm_block_t b,
-                        uint32_t (*mutator)(void *context, uint32_t old),
+                        int (*mutator)(void *context, uint32_t old, uint32_t *new),
                         void *context, enum allocation_event *ev)
 {
         int r;
@@ -410,11 +410,17 @@ static int sm_ll_mutate(struct ll_disk *ll, dm_block_t b,
 
         if (old > 2) {
                 r = sm_ll_lookup_big_ref_count(ll, b, &old);
-                if (r < 0)
+                if (r < 0) {
+                        dm_tm_unlock(ll->tm, nb);
                         return r;
+                }
         }
 
-        ref_count = mutator(context, old);
+        r = mutator(context, old, &ref_count);
+        if (r) {
+                dm_tm_unlock(ll->tm, nb);
+                return r;
+        }
 
         if (ref_count <= 2) {
                 sm_set_bitmap(bm_le, bit, ref_count);
@@ -465,9 +471,10 @@ static int sm_ll_mutate(struct ll_disk *ll, dm_block_t b,
         return ll->save_ie(ll, index, &ie_disk);
 }
 
-static uint32_t set_ref_count(void *context, uint32_t old)
+static int set_ref_count(void *context, uint32_t old, uint32_t *new)
 {
-        return *((uint32_t *) context);
+        *new = *((uint32_t *) context);
+        return 0;
 }
 
 int sm_ll_insert(struct ll_disk *ll, dm_block_t b,
@@ -476,9 +483,10 @@ int sm_ll_insert(struct ll_disk *ll, dm_block_t b,
         return sm_ll_mutate(ll, b, set_ref_count, &ref_count, ev);
 }
 
-static uint32_t inc_ref_count(void *context, uint32_t old)
+static int inc_ref_count(void *context, uint32_t old, uint32_t *new)
 {
-        return old + 1;
+        *new = old + 1;
+        return 0;
 }
 
 int sm_ll_inc(struct ll_disk *ll, dm_block_t b, enum allocation_event *ev)
@@ -486,9 +494,15 @@ int sm_ll_inc(struct ll_disk *ll, dm_block_t b, enum allocation_event *ev)
         return sm_ll_mutate(ll, b, inc_ref_count, NULL, ev);
 }
 
-static uint32_t dec_ref_count(void *context, uint32_t old)
+static int dec_ref_count(void *context, uint32_t old, uint32_t *new)
 {
-        return old - 1;
+        if (!old) {
+                DMERR_LIMIT("unable to decrement a reference count below 0");
+                return -EINVAL;
+        }
+
+        *new = old - 1;
+        return 0;
 }
 
 int sm_ll_dec(struct ll_disk *ll, dm_block_t b, enum allocation_event *ev)
diff --git a/drivers/md/persistent-data/dm-space-map-metadata.c b/drivers/md/persistent-data/dm-space-map-metadata.c
index 1c959684caef..58fc1eef7499 100644
--- a/drivers/md/persistent-data/dm-space-map-metadata.c
+++ b/drivers/md/persistent-data/dm-space-map-metadata.c
@@ -384,12 +384,16 @@ static int sm_metadata_new_block(struct dm_space_map *sm, dm_block_t *b)
         struct sm_metadata *smm = container_of(sm, struct sm_metadata, sm);
 
         int r = sm_metadata_new_block_(sm, b);
-        if (r)
+        if (r) {
                 DMERR("unable to allocate new metadata block");
+                return r;
+        }
 
         r = sm_metadata_get_nr_free(sm, &count);
-        if (r)
+        if (r) {
                 DMERR("couldn't get free block count");
+                return r;
+        }
 
         check_threshold(&smm->threshold, count);
 
diff --git a/drivers/media/common/siano/smscoreapi.h b/drivers/media/common/siano/smscoreapi.h
index d0799e323364..9c9063cd3208 100644
--- a/drivers/media/common/siano/smscoreapi.h
+++ b/drivers/media/common/siano/smscoreapi.h
@@ -955,7 +955,7 @@ struct sms_rx_stats {
         u32 modem_state;                /* from SMSHOSTLIB_DVB_MODEM_STATE_ET */
         s32 SNR;                /* dB */
         u32 ber;                /* Post Viterbi ber [1E-5] */
-        u32 ber_error_count;    /* Number of erronous SYNC bits. */
+        u32 ber_error_count;    /* Number of erroneous SYNC bits. */
         u32 ber_bit_count;      /* Total number of SYNC bits. */
         u32 ts_per;             /* Transport stream PER,
         0xFFFFFFFF indicate N/A */
@@ -981,7 +981,7 @@ struct sms_rx_stats_ex {
         u32 modem_state;                /* from SMSHOSTLIB_DVB_MODEM_STATE_ET */
         s32 SNR;                /* dB */
         u32 ber;                /* Post Viterbi ber [1E-5] */
-        u32 ber_error_count;    /* Number of erronous SYNC bits. */
+        u32 ber_error_count;    /* Number of erroneous SYNC bits. */
         u32 ber_bit_count;      /* Total number of SYNC bits. */
         u32 ts_per;             /* Transport stream PER,
         0xFFFFFFFF indicate N/A */
diff --git a/drivers/media/common/siano/smsdvb.h b/drivers/media/common/siano/smsdvb.h
index 92c413ba0c79..ae36d0ae0fb1 100644
--- a/drivers/media/common/siano/smsdvb.h
+++ b/drivers/media/common/siano/smsdvb.h
@@ -95,7 +95,7 @@ struct RECEPTION_STATISTICS_PER_SLICES_S {
         u32 is_demod_locked;    /* 0 - not locked, 1 - locked */
 
         u32 ber_bit_count;      /* Total number of SYNC bits. */
-        u32 ber_error_count;    /* Number of erronous SYNC bits. */
+        u32 ber_error_count;    /* Number of erroneous SYNC bits. */
 
         s32 MRC_SNR;            /* dB */
         s32 mrc_in_band_pwr;    /* In band power in dBM */
diff --git a/drivers/media/dvb-core/dvb_demux.c b/drivers/media/dvb-core/dvb_demux.c
index 58de4410c525..6c7ff0cdcd32 100644
--- a/drivers/media/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb-core/dvb_demux.c
@@ -435,7 +435,7 @@ static void dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf)
                 dprintk_tscheck("TEI detected. "
                                 "PID=0x%x data1=0x%x\n",
                                 pid, buf[1]);
-                /* data in this packet cant be trusted - drop it unless
+                /* data in this packet can't be trusted - drop it unless
                  * module option dvb_demux_feed_err_pkts is set */
                 if (!dvb_demux_feed_err_pkts)
                         return;
@@ -1032,8 +1032,13 @@ static int dmx_section_feed_release_filter(struct dmx_section_feed *feed,
                 return -EINVAL;
         }
 
-        if (feed->is_filtering)
+        if (feed->is_filtering) {
+                /* release dvbdmx->mutex as far as it is
+                   acquired by stop_filtering() itself */
+                mutex_unlock(&dvbdmx->mutex);
                 feed->stop_filtering(feed);
+                mutex_lock(&dvbdmx->mutex);
+        }
 
         spin_lock_irq(&dvbdmx->lock);
         f = dvbdmxfeed->filter;
diff --git a/drivers/media/dvb-frontends/af9033.c b/drivers/media/dvb-frontends/af9033.c
index 30ee59052157..65728c25ea05 100644
--- a/drivers/media/dvb-frontends/af9033.c
+++ b/drivers/media/dvb-frontends/af9033.c
@@ -170,18 +170,18 @@ static int af9033_rd_reg_mask(struct af9033_state *state, u32 reg, u8 *val,
 static int af9033_wr_reg_val_tab(struct af9033_state *state,
                 const struct reg_val *tab, int tab_len)
 {
+#define MAX_TAB_LEN 212
         int ret, i, j;
-        u8 buf[MAX_XFER_SIZE];
+        u8 buf[1 + MAX_TAB_LEN];
+
+        dev_dbg(&state->i2c->dev, "%s: tab_len=%d\n", __func__, tab_len);
 
         if (tab_len > sizeof(buf)) {
-                dev_warn(&state->i2c->dev,
-                         "%s: i2c wr len=%d is too big!\n",
-                         KBUILD_MODNAME, tab_len);
+                dev_warn(&state->i2c->dev, "%s: tab len %d is too big\n",
+                                KBUILD_MODNAME, tab_len);
                 return -EINVAL;
         }
 
-        dev_dbg(&state->i2c->dev, "%s: tab_len=%d\n", __func__, tab_len);
-
         for (i = 0, j = 0; i < tab_len; i++) {
                 buf[j] = tab[i].val;
 
diff --git a/drivers/media/dvb-frontends/cxd2820r_c.c b/drivers/media/dvb-frontends/cxd2820r_c.c
index 125a44041011..5c6ab4921bf1 100644
--- a/drivers/media/dvb-frontends/cxd2820r_c.c
+++ b/drivers/media/dvb-frontends/cxd2820r_c.c
@@ -78,7 +78,7 @@ int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
 
         num = if_freq / 1000; /* Hz => kHz */
         num *= 0x4000;
-        if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
+        if_ctl = 0x4000 - cxd2820r_div_u64_round_closest(num, 41000);
         buf[0] = (if_ctl >> 8) & 0x3f;
         buf[1] = (if_ctl >> 0) & 0xff;
 
diff --git a/drivers/media/dvb-frontends/dib8000.c b/drivers/media/dvb-frontends/dib8000.c
index 90536147bf04..6dbbee453ee1 100644
--- a/drivers/media/dvb-frontends/dib8000.c
+++ b/drivers/media/dvb-frontends/dib8000.c
@@ -3048,7 +3048,7 @@ static int dib8000_tune(struct dvb_frontend *fe)
                         dib8000_set_diversity_in(state->fe[0], state->diversity_onoff);
 
                         locks = (dib8000_read_word(state, 180) >> 6) & 0x3f; /* P_coff_winlen ? */
-                        /* coff should lock over P_coff_winlen ofdm symbols : give 3 times this lenght to lock */
+                        /* coff should lock over P_coff_winlen ofdm symbols : give 3 times this length to lock */
                         *timeout = dib8000_get_timeout(state, 2 * locks, SYMBOL_DEPENDENT_ON);
                         *tune_state = CT_DEMOD_STEP_5;
                         break;
@@ -3115,7 +3115,7 @@ static int dib8000_tune(struct dvb_frontend *fe)
 
         case CT_DEMOD_STEP_9: /* 39 */
                         if ((state->revision == 0x8090) || ((dib8000_read_word(state, 1291) >> 9) & 0x1)) { /* fe capable of deinterleaving : esram */
-                                /* defines timeout for mpeg lock depending on interleaver lenght of longest layer */
+                                /* defines timeout for mpeg lock depending on interleaver length of longest layer */
                                 for (i = 0; i < 3; i++) {
                                         if (c->layer[i].interleaving >= deeper_interleaver) {
                                                 dprintk("layer%i: time interleaver = %d ", i, c->layer[i].interleaving);
diff --git a/drivers/media/dvb-frontends/drxk_hard.c b/drivers/media/dvb-frontends/drxk_hard.c
index d416c15691da..bf29a3f0e6f0 100644
--- a/drivers/media/dvb-frontends/drxk_hard.c
+++ b/drivers/media/dvb-frontends/drxk_hard.c
@@ -1191,7 +1191,7 @@ static int mpegts_configure_pins(struct drxk_state *state, bool mpeg_enable)
                         goto error;
 
                 if (state->m_enable_parallel == true) {
-                        /* paralel -> enable MD1 to MD7 */
+                        /* parallel -> enable MD1 to MD7 */
                         status = write16(state, SIO_PDR_MD1_CFG__A,
                                          sio_pdr_mdx_cfg);
                         if (status < 0)
@@ -1428,7 +1428,7 @@ static int mpegts_stop(struct drxk_state *state)
 
         dprintk(1, "\n");
 
-        /* Gracefull shutdown (byte boundaries) */
+        /* Graceful shutdown (byte boundaries) */
         status = read16(state, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode);
         if (status < 0)
                 goto error;
@@ -2021,7 +2021,7 @@ static int mpegts_dto_setup(struct drxk_state *state,
                 fec_oc_dto_burst_len = 204;
         }
 
-        /* Check serial or parrallel output */
+        /* Check serial or parallel output */
         fec_oc_reg_ipr_mode &= (~(FEC_OC_IPR_MODE_SERIAL__M));
         if (state->m_enable_parallel == false) {
                 /* MPEG data output is serial -> set ipr_mode[0] */
@@ -2908,7 +2908,7 @@ static int adc_synchronization(struct drxk_state *state)
                 goto error;
 
         if (count == 1) {
-                /* Try sampling on a diffrent edge */
+                /* Try sampling on a different edge */
                 u16 clk_neg = 0;
 
                 status = read16(state, IQM_AF_CLKNEG__A, &clk_neg);
@@ -3306,7 +3306,7 @@ static int dvbt_sc_command(struct drxk_state *state,
         if (status < 0)
                 goto error;
 
-        /* Retreive results parameters from SC */
+        /* Retrieve results parameters from SC */
         switch (cmd) {
                 /* All commands yielding 5 results */
                 /* All commands yielding 4 results */
@@ -3849,7 +3849,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz,
                 break;
         }
 #if 0
-        /* No hierachical channels support in BDA */
+        /* No hierarchical channels support in BDA */
         /* Priority (only for hierarchical channels) */
         switch (channel->priority) {
         case DRX_PRIORITY_LOW:
@@ -4081,7 +4081,7 @@ error:
 /*============================================================================*/
 
 /**
-* \brief Retreive lock status .
+* \brief Retrieve lock status .
 * \param demod    Pointer to demodulator instance.
 * \param lockStat Pointer to lock status structure.
 * \return DRXStatus_t.
@@ -6174,7 +6174,7 @@ static int init_drxk(struct drxk_state *state)
                         goto error;
 
                 /* Stamp driver version number in SCU data RAM in BCD code
-                        Done to enable field application engineers to retreive drxdriver version
+                        Done to enable field application engineers to retrieve drxdriver version
                         via I2C from SCU RAM.
                         Not using SCU command interface for SCU register access since no
                         microcode may be present.
@@ -6399,7 +6399,7 @@ static int drxk_set_parameters(struct dvb_frontend *fe)
         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
         start(state, 0, IF);
 
-        /* After set_frontend, stats aren't avaliable */
+        /* After set_frontend, stats aren't available */
         p->strength.stat[0].scale = FE_SCALE_RELATIVE;
         p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
         p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
diff --git a/drivers/media/dvb-frontends/rtl2830.c b/drivers/media/dvb-frontends/rtl2830.c
index 7efb796c472c..50e8b63e5169 100644
--- a/drivers/media/dvb-frontends/rtl2830.c
+++ b/drivers/media/dvb-frontends/rtl2830.c
@@ -710,6 +710,7 @@ struct dvb_frontend *rtl2830_attach(const struct rtl2830_config *cfg,
                 sizeof(priv->tuner_i2c_adapter.name));
         priv->tuner_i2c_adapter.algo = &rtl2830_tuner_i2c_algo;
         priv->tuner_i2c_adapter.algo_data = NULL;
+        priv->tuner_i2c_adapter.dev.parent = &i2c->dev;
         i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
         if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
                 dev_err(&i2c->dev,
diff --git a/drivers/media/i2c/adv7183_regs.h b/drivers/media/i2c/adv7183_regs.h
index 4a5b7d211d2f..b253d400e817 100644
--- a/drivers/media/i2c/adv7183_regs.h
+++ b/drivers/media/i2c/adv7183_regs.h
@@ -52,9 +52,9 @@
 #define ADV7183_VS_FIELD_CTRL_1    0x31 /* Vsync field control 1 */
 #define ADV7183_VS_FIELD_CTRL_2    0x32 /* Vsync field control 2 */
 #define ADV7183_VS_FIELD_CTRL_3    0x33 /* Vsync field control 3 */
-#define ADV7183_HS_POS_CTRL_1      0x34 /* Hsync positon control 1 */
-#define ADV7183_HS_POS_CTRL_2      0x35 /* Hsync positon control 2 */
-#define ADV7183_HS_POS_CTRL_3      0x36 /* Hsync positon control 3 */
+#define ADV7183_HS_POS_CTRL_1      0x34 /* Hsync position control 1 */
+#define ADV7183_HS_POS_CTRL_2      0x35 /* Hsync position control 2 */
+#define ADV7183_HS_POS_CTRL_3      0x36 /* Hsync position control 3 */
 #define ADV7183_POLARITY           0x37 /* Polarity */
 #define ADV7183_NTSC_COMB_CTRL     0x38 /* NTSC comb control */
 #define ADV7183_PAL_COMB_CTRL      0x39 /* PAL comb control */
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index fbfdd2fc2a36..a324106b9f11 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -877,7 +877,7 @@ static void configure_custom_video_timings(struct v4l2_subdev *sd,
                 break;
         case ADV7604_MODE_HDMI:
                 /* set default prim_mode/vid_std for HDMI
-                   accoring to [REF_03, c. 4.2] */
+                   according to [REF_03, c. 4.2] */
                 io_write(sd, 0x00, 0x02); /* video std */
                 io_write(sd, 0x01, 0x06); /* prim mode */
                 break;
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
index 22f729d66a96..b154f36740b4 100644
--- a/drivers/media/i2c/adv7842.c
+++ b/drivers/media/i2c/adv7842.c
@@ -1013,7 +1013,7 @@ static void configure_custom_video_timings(struct v4l2_subdev *sd,
                 break;
         case ADV7842_MODE_HDMI:
                 /* set default prim_mode/vid_std for HDMI
-                   accoring to [REF_03, c. 4.2] */
+                   according to [REF_03, c. 4.2] */
                 io_write(sd, 0x00, 0x02); /* video std */
                 io_write(sd, 0x01, 0x06); /* prim mode */
                 break;
diff --git a/drivers/media/i2c/ir-kbd-i2c.c b/drivers/media/i2c/ir-kbd-i2c.c
index 82bf5679da30..99ee456700f4 100644
--- a/drivers/media/i2c/ir-kbd-i2c.c
+++ b/drivers/media/i2c/ir-kbd-i2c.c
@@ -394,7 +394,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
 
         if (!rc) {
                 /*
-                 * If platform_data doesn't specify rc_dev, initilize it
+                 * If platform_data doesn't specify rc_dev, initialize it
                  * internally
                  */
                 rc = rc_allocate_device();
diff --git a/drivers/media/i2c/m5mols/m5mols_controls.c b/drivers/media/i2c/m5mols/m5mols_controls.c
index f34429e452ab..a60931e66312 100644
--- a/drivers/media/i2c/m5mols/m5mols_controls.c
+++ b/drivers/media/i2c/m5mols/m5mols_controls.c
@@ -544,7 +544,7 @@ int m5mols_init_controls(struct v4l2_subdev *sd)
         u16 zoom_step;
         int ret;
 
-        /* Determine the firmware dependant control range and step values */
+        /* Determine the firmware dependent control range and step values */
         ret = m5mols_read_u16(sd, AE_MAX_GAIN_MON, &exposure_max);
         if (ret < 0)
                 return ret;
diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c
index 4734836fe5a4..1c2303d18bf4 100644
--- a/drivers/media/i2c/mt9p031.c
+++ b/drivers/media/i2c/mt9p031.c
@@ -19,6 +19,7 @@
 #include <linux/i2c.h>
 #include <linux/log2.h>
 #include <linux/module.h>
+#include <linux/of.h>
 #include <linux/of_gpio.h>
 #include <linux/pm.h>
 #include <linux/regulator/consumer.h>
diff --git a/drivers/media/i2c/s5c73m3/s5c73m3-core.c b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
index 6fec9384d86e..e7f555cc827a 100644
--- a/drivers/media/i2c/s5c73m3/s5c73m3-core.c
+++ b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
@@ -1460,7 +1460,7 @@ static int s5c73m3_oif_registered(struct v4l2_subdev *sd)
         mutex_unlock(&state->lock);
 
         v4l2_dbg(1, s5c73m3_dbg, sd, "%s: Booting %s (%d)\n",
-                 __func__, ret ? "failed" : "succeded", ret);
+                 __func__, ret ? "failed" : "succeeded", ret);
 
         return ret;
 }
diff --git a/drivers/media/i2c/s5c73m3/s5c73m3.h b/drivers/media/i2c/s5c73m3/s5c73m3.h
index 9d2c08652246..9dfa516f6944 100644
--- a/drivers/media/i2c/s5c73m3/s5c73m3.h
+++ b/drivers/media/i2c/s5c73m3/s5c73m3.h
@@ -393,7 +393,7 @@ struct s5c73m3 {
 
         /* External master clock frequency */
         u32 mclk_frequency;
-        /* Video bus type - MIPI-CSI2/paralell */
+        /* Video bus type - MIPI-CSI2/parallel */
         enum v4l2_mbus_type bus_type;
 
         const struct s5c73m3_frame_size *sensor_pix_size[2];
diff --git a/drivers/media/i2c/saa7115.c b/drivers/media/i2c/saa7115.c
index 637d02634527..afdbcb045cee 100644
--- a/drivers/media/i2c/saa7115.c
+++ b/drivers/media/i2c/saa7115.c
@@ -1699,7 +1699,7 @@ static void saa711x_write_platform_data(struct saa711x_state *state,
  * the analog demod.
  * If the tuner is not found, it returns -ENODEV.
  * If auto-detection is disabled and the tuner doesn't match what it was
- *      requred, it returns -EINVAL and fills 'name'.
+ *      required, it returns -EINVAL and fills 'name'.
  * If the chip is found, it returns the chip ID and fills 'name'.
  */
 static int saa711x_detect_chip(struct i2c_client *client,
diff --git a/drivers/media/i2c/soc_camera/ov5642.c b/drivers/media/i2c/soc_camera/ov5642.c
index 0a5c5d4fedd6..d2daa6a8f272 100644
--- a/drivers/media/i2c/soc_camera/ov5642.c
+++ b/drivers/media/i2c/soc_camera/ov5642.c
@@ -642,7 +642,7 @@ static const struct ov5642_datafmt
 static int reg_read(struct i2c_client *client, u16 reg, u8 *val)
 {
         int ret;
-        /* We have 16-bit i2c addresses - care for endianess */
+        /* We have 16-bit i2c addresses - care for endianness */
         unsigned char data[2] = { reg >> 8, reg & 0xff };
 
         ret = i2c_master_send(client, data, 2);
diff --git a/drivers/media/i2c/ths7303.c b/drivers/media/i2c/ths7303.c
index 42276d93624c..ed9ae8875348 100644
--- a/drivers/media/i2c/ths7303.c
+++ b/drivers/media/i2c/ths7303.c
@@ -83,7 +83,8 @@ static int ths7303_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 }
 
 /* following function is used to set ths7303 */
-int ths7303_setval(struct v4l2_subdev *sd, enum ths7303_filter_mode mode)
+static int ths7303_setval(struct v4l2_subdev *sd,
+                          enum ths7303_filter_mode mode)
 {
         struct i2c_client *client = v4l2_get_subdevdata(sd);
         struct ths7303_state *state = to_state(sd);
diff --git a/drivers/media/i2c/wm8775.c b/drivers/media/i2c/wm8775.c
index 3f584a7d0781..bee7946faa7c 100644
--- a/drivers/media/i2c/wm8775.c
+++ b/drivers/media/i2c/wm8775.c
@@ -130,12 +130,10 @@ static int wm8775_s_routing(struct v4l2_subdev *sd,
                 return -EINVAL;
         }
         state->input = input;
-        if (!v4l2_ctrl_g_ctrl(state->mute))
+        if (v4l2_ctrl_g_ctrl(state->mute))
                 return 0;
         if (!v4l2_ctrl_g_ctrl(state->vol))
                 return 0;
-        if (!v4l2_ctrl_g_ctrl(state->bal))
-                return 0;
         wm8775_set_audio(sd, 1);
         return 0;
 }
diff --git a/drivers/media/pci/bt8xx/bttv-driver.c b/drivers/media/pci/bt8xx/bttv-driver.c
index a3b1ee9c00d7..92a06fd85865 100644
--- a/drivers/media/pci/bt8xx/bttv-driver.c
+++ b/drivers/media/pci/bt8xx/bttv-driver.c
@@ -4182,7 +4182,8 @@ static int bttv_probe(struct pci_dev *dev, const struct pci_device_id *pci_id)
         }
         btv->std = V4L2_STD_PAL;
         init_irqreg(btv);
-        v4l2_ctrl_handler_setup(hdl);
+        if (!bttv_tvcards[btv->c.type].no_video)
+                v4l2_ctrl_handler_setup(hdl);
         if (hdl->error) {
                 result = hdl->error;
                 goto fail2;
diff --git a/drivers/media/pci/cx18/cx18-driver.h b/drivers/media/pci/cx18/cx18-driver.h
index 2767c64df0c8..57f4688ea55b 100644
--- a/drivers/media/pci/cx18/cx18-driver.h
+++ b/drivers/media/pci/cx18/cx18-driver.h
@@ -262,7 +262,7 @@ struct cx18_options {
 };
 
 /* per-mdl bit flags */
-#define CX18_F_M_NEED_SWAP  0   /* mdl buffer data must be endianess swapped */
+#define CX18_F_M_NEED_SWAP  0   /* mdl buffer data must be endianness swapped */
 
 /* per-stream, s_flags */
 #define CX18_F_S_CLAIMED        3       /* this stream is claimed */
diff --git a/drivers/media/pci/cx23885/cx23885-417.c b/drivers/media/pci/cx23885/cx23885-417.c
index e3fc2c71808a..95666eee7b27 100644
--- a/drivers/media/pci/cx23885/cx23885-417.c
+++ b/drivers/media/pci/cx23885/cx23885-417.c
@@ -427,7 +427,7 @@ int mc417_register_read(struct cx23885_dev *dev, u16 address, u32 *value)
         cx_write(MC417_RWD, regval);
 
         /* Transition RD to effect read transaction across bus.
-         * Transtion 0x5000 -> 0x9000 correct (RD/RDY -> WR/RDY)?
+         * Transition 0x5000 -> 0x9000 correct (RD/RDY -> WR/RDY)?
          * Should it be 0x9000 -> 0xF000 (also why is RDY being set, its
          * input only...)
          */
diff --git a/drivers/media/pci/pluto2/pluto2.c b/drivers/media/pci/pluto2/pluto2.c
index 8164d74b46a4..655d6854a8d7 100644
--- a/drivers/media/pci/pluto2/pluto2.c
+++ b/drivers/media/pci/pluto2/pluto2.c
@@ -401,7 +401,7 @@ static int pluto_hw_init(struct pluto *pluto)
         /* set automatic LED control by FPGA */
         pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
 
-        /* set data endianess */
+        /* set data endianness */
 #ifdef __LITTLE_ENDIAN
         pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
 #else
diff --git a/drivers/media/pci/saa7164/saa7164-core.c b/drivers/media/pci/saa7164/saa7164-core.c
index 57ef5456f1e8..1bf06970ca3e 100644
--- a/drivers/media/pci/saa7164/saa7164-core.c
+++ b/drivers/media/pci/saa7164/saa7164-core.c
@@ -1354,9 +1354,11 @@ static int saa7164_initdev(struct pci_dev *pci_dev,
                 if (fw_debug) {
                         dev->kthread = kthread_run(saa7164_thread_function, dev,
                                 "saa7164 debug");
-                        if (!dev->kthread)
+                        if (IS_ERR(dev->kthread)) {
+                                dev->kthread = NULL;
                                 printk(KERN_ERR "%s() Failed to create "
                                         "debug kernel thread\n", __func__);
+                        }
                 }
 
         } /* != BOARD_UNKNOWN */
diff --git a/drivers/media/platform/coda.c b/drivers/media/platform/coda.c
index bd72fb97fea5..61f3dbcc259f 100644
--- a/drivers/media/platform/coda.c
+++ b/drivers/media/platform/coda.c
@@ -1434,7 +1434,7 @@ static void coda_buf_queue(struct vb2_buffer *vb)
         if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
             vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
                 /*
-                 * For backwards compatiblity, queuing an empty buffer marks
+                 * For backwards compatibility, queuing an empty buffer marks
                  * the stream end
                  */
                 if (vb2_get_plane_payload(vb, 0) == 0)
diff --git a/drivers/media/platform/exynos4-is/fimc-core.c b/drivers/media/platform/exynos4-is/fimc-core.c
index 3d66d88ea3a1..f7915695c907 100644
--- a/drivers/media/platform/exynos4-is/fimc-core.c
+++ b/drivers/media/platform/exynos4-is/fimc-core.c
@@ -1039,7 +1039,7 @@ static int fimc_runtime_resume(struct device *dev)
 
         dbg("fimc%d: state: 0x%lx", fimc->id, fimc->state);
 
-        /* Enable clocks and perform basic initalization */
+        /* Enable clocks and perform basic initialization */
         clk_enable(fimc->clock[CLK_GATE]);
         fimc_hw_reset(fimc);
 
diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
index 7a4ee4c0449d..c1bce170df6f 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -759,7 +759,7 @@ static int fimc_md_register_platform_entity(struct fimc_md *fmd,
                 goto dev_unlock;
 
         drvdata = dev_get_drvdata(dev);
-        /* Some subdev didn't probe succesfully id drvdata is NULL */
+        /* Some subdev didn't probe successfully id drvdata is NULL */
         if (drvdata) {
                 switch (plat_entity) {
                 case IDX_FIMC:
diff --git a/drivers/media/platform/marvell-ccic/mmp-driver.c b/drivers/media/platform/marvell-ccic/mmp-driver.c
index 3458fa0e2fd5..054507f16734 100644
--- a/drivers/media/platform/marvell-ccic/mmp-driver.c
+++ b/drivers/media/platform/marvell-ccic/mmp-driver.c
@@ -142,12 +142,6 @@ static int mmpcam_power_up(struct mcam_camera *mcam)
         struct mmp_camera *cam = mcam_to_cam(mcam);
         struct mmp_camera_platform_data *pdata;
 
-        if (mcam->bus_type == V4L2_MBUS_CSI2) {
-                cam->mipi_clk = devm_clk_get(mcam->dev, "mipi");
-                if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0))
-                        return PTR_ERR(cam->mipi_clk);
-        }
-
 /*
  * Turn on power and clocks to the controller.
  */
@@ -186,12 +180,6 @@ static void mmpcam_power_down(struct mcam_camera *mcam)
         gpio_set_value(pdata->sensor_power_gpio, 0);
         gpio_set_value(pdata->sensor_reset_gpio, 0);
 
-        if (mcam->bus_type == V4L2_MBUS_CSI2 && !IS_ERR(cam->mipi_clk)) {
-                if (cam->mipi_clk)
-                        devm_clk_put(mcam->dev, cam->mipi_clk);
-                cam->mipi_clk = NULL;
-        }
-
         mcam_clk_disable(mcam);
 }
 
@@ -292,8 +280,9 @@ void mmpcam_calc_dphy(struct mcam_camera *mcam)
                 return;
 
         /* get the escape clk, this is hard coded */
+        clk_prepare_enable(cam->mipi_clk);
         tx_clk_esc = (clk_get_rate(cam->mipi_clk) / 1000000) / 12;
-
+        clk_disable_unprepare(cam->mipi_clk);
         /*
          * dphy[2] - CSI2_DPHY6:
          * bit 0 ~ bit 7: CK Term Enable
@@ -325,19 +314,6 @@ static irqreturn_t mmpcam_irq(int irq, void *data)
         return IRQ_RETVAL(handled);
 }
 
-static void mcam_deinit_clk(struct mcam_camera *mcam)
-{
-        unsigned int i;
-
-        for (i = 0; i < NR_MCAM_CLK; i++) {
-                if (!IS_ERR(mcam->clk[i])) {
-                        if (mcam->clk[i])
-                                devm_clk_put(mcam->dev, mcam->clk[i]);
-                }
-                mcam->clk[i] = NULL;
-        }
-}
-
 static void mcam_init_clk(struct mcam_camera *mcam)
 {
         unsigned int i;
@@ -371,7 +347,6 @@ static int mmpcam_probe(struct platform_device *pdev)
         if (cam == NULL)
                 return -ENOMEM;
         cam->pdev = pdev;
-        cam->mipi_clk = NULL;
         INIT_LIST_HEAD(&cam->devlist);
 
         mcam = &cam->mcam;
@@ -387,6 +362,11 @@ static int mmpcam_probe(struct platform_device *pdev)
         mcam->mclk_div = pdata->mclk_div;
         mcam->bus_type = pdata->bus_type;
         mcam->dphy = pdata->dphy;
+        if (mcam->bus_type == V4L2_MBUS_CSI2) {
+                cam->mipi_clk = devm_clk_get(mcam->dev, "mipi");
+                if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0))
+                        return PTR_ERR(cam->mipi_clk);
+        }
         mcam->mipi_enabled = false;
         mcam->lane = pdata->lane;
         mcam->chip_id = MCAM_ARMADA610;
@@ -444,7 +424,7 @@ static int mmpcam_probe(struct platform_device *pdev)
          */
         ret = mmpcam_power_up(mcam);
         if (ret)
-                goto out_deinit_clk;
+                return ret;
         ret = mccic_register(mcam);
         if (ret)
                 goto out_power_down;
@@ -469,8 +449,6 @@ out_unregister:
         mccic_shutdown(mcam);
 out_power_down:
         mmpcam_power_down(mcam);
-out_deinit_clk:
-        mcam_deinit_clk(mcam);
         return ret;
 }
 
@@ -478,18 +456,10 @@ out_deinit_clk:
 static int mmpcam_remove(struct mmp_camera *cam)
 {
         struct mcam_camera *mcam = &cam->mcam;
-        struct mmp_camera_platform_data *pdata;
 
         mmpcam_remove_device(cam);
         mccic_shutdown(mcam);
         mmpcam_power_down(mcam);
-        pdata = cam->pdev->dev.platform_data;
-        gpio_free(pdata->sensor_reset_gpio);
-        gpio_free(pdata->sensor_power_gpio);
-        mcam_deinit_clk(mcam);
-        iounmap(cam->power_regs);
-        iounmap(mcam->regs);
-        kfree(cam);
         return 0;
 }
 
diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
index 1c3608039663..561bce8ffb1b 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -1673,7 +1673,7 @@ void omap3isp_print_status(struct isp_device *isp)
  * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  * resume(), and the the pipelines are restarted in complete().
  *
- * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
+ * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
  * yet.
  */
 static int isp_pm_prepare(struct device *dev)
diff --git a/drivers/media/platform/omap3isp/ispvideo.c b/drivers/media/platform/omap3isp/ispvideo.c
index a908d006f527..f6304bb074f5 100644
--- a/drivers/media/platform/omap3isp/ispvideo.c
+++ b/drivers/media/platform/omap3isp/ispvideo.c
@@ -339,14 +339,11 @@ __isp_video_get_format(struct isp_video *video, struct v4l2_format *format)
         if (subdev == NULL)
                 return -EINVAL;
 
-        mutex_lock(&video->mutex);
-
         fmt.pad = pad;
         fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
-        ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &fmt);
-        if (ret == -ENOIOCTLCMD)
-                ret = -EINVAL;
 
+        mutex_lock(&video->mutex);
+        ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &fmt);
         mutex_unlock(&video->mutex);
 
         if (ret)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc.h b/drivers/media/platform/s5p-mfc/regs-mfc.h
index 9319e93599ae..6ccc3f8c122a 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc.h
@@ -382,7 +382,7 @@
 #define S5P_FIMV_R2H_CMD_EDFU_INIT_RET          16
 #define S5P_FIMV_R2H_CMD_ERR_RET                32
 
-/* Dummy definition for MFCv6 compatibilty */
+/* Dummy definition for MFCv6 compatibility */
 #define S5P_FIMV_CODEC_H264_MVC_DEC             -1
 #define S5P_FIMV_R2H_CMD_FIELD_DONE_RET         -1
 #define S5P_FIMV_MFC_RESET                      -1
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 5f2c4ad6c2cb..e46067a57853 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -239,7 +239,7 @@ static void s5p_mfc_handle_frame_copy_time(struct s5p_mfc_ctx *ctx)
         frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev);
 
         /* Copy timestamp / timecode from decoded src to dst and set
-           appropraite flags */
+           appropriate flags */
         src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
         list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
                 if (vb2_dma_contig_plane_dma_addr(dst_buf->b, 0) == dec_y_addr) {
@@ -428,7 +428,7 @@ static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev,
                 case MFCINST_FINISHING:
                 case MFCINST_FINISHED:
                 case MFCINST_RUNNING:
-                        /* It is higly probable that an error occured
+                        /* It is highly probable that an error occurred
                          * while decoding a frame */
                         clear_work_bit(ctx);
                         ctx->state = MFCINST_ERROR;
@@ -611,7 +611,7 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
         mfc_debug(1, "Int reason: %d (err: %08x)\n", reason, err);
         switch (reason) {
         case S5P_MFC_R2H_CMD_ERR_RET:
-                /* An error has occured */
+                /* An error has occurred */
                 if (ctx->state == MFCINST_RUNNING &&
                         s5p_mfc_hw_call(dev->mfc_ops, err_dec, err) >=
                                 dev->warn_start)
@@ -840,7 +840,7 @@ static int s5p_mfc_open(struct file *file)
         mutex_unlock(&dev->mfc_mutex);
         mfc_debug_leave();
         return ret;
-        /* Deinit when failure occured */
+        /* Deinit when failure occurred */
 err_queue_init:
         if (dev->num_inst == 1)
                 s5p_mfc_deinit_hw(dev);
@@ -881,14 +881,14 @@ static int s5p_mfc_release(struct file *file)
         /* Mark context as idle */
         clear_work_bit_irqsave(ctx);
         /* If instance was initialised then
-         * return instance and free reosurces */
+         * return instance and free resources */
         if (ctx->inst_no != MFC_NO_INSTANCE_SET) {
                 mfc_debug(2, "Has to free instance\n");
                 ctx->state = MFCINST_RETURN_INST;
                 set_work_bit_irqsave(ctx);
                 s5p_mfc_clean_ctx_int_flags(ctx);
                 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
-                /* Wait until instance is returned or timeout occured */
+                /* Wait until instance is returned or timeout occurred */
                 if (s5p_mfc_wait_for_done_ctx
                     (ctx, S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET, 0)) {
                         s5p_mfc_clock_off();
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 7cab6849fb5b..2475a3c9a0a6 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -69,7 +69,7 @@ int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev)
 
         } else {
                 /* In this case bank2 can point to the same address as bank1.
-                 * Firmware will always occupy the beggining of this area so it is
+                 * Firmware will always occupy the beginning of this area so it is
                  * impossible having a video frame buffer with zero address. */
                 dev->bank2 = dev->bank1;
         }
diff --git a/drivers/media/platform/s5p-tv/mixer.h b/drivers/media/platform/s5p-tv/mixer.h
index 04e6490a45be..fb2acc53112a 100644
--- a/drivers/media/platform/s5p-tv/mixer.h
+++ b/drivers/media/platform/s5p-tv/mixer.h
@@ -65,7 +65,7 @@ struct mxr_format {
         int num_subframes;
         /** specifies to which subframe belong given plane */
         int plane2subframe[MXR_MAX_PLANES];
-        /** internal code, driver dependant */
+        /** internal code, driver dependent */
         unsigned long cookie;
 };
 
diff --git a/drivers/media/platform/s5p-tv/mixer_video.c b/drivers/media/platform/s5p-tv/mixer_video.c
index 641b1f071e06..81b97db111d8 100644
--- a/drivers/media/platform/s5p-tv/mixer_video.c
+++ b/drivers/media/platform/s5p-tv/mixer_video.c
@@ -528,7 +528,7 @@ static int mxr_s_dv_timings(struct file *file, void *fh,
         mutex_lock(&mdev->mutex);
 
         /* timings change cannot be done while there is an entity
-         * dependant on output configuration
+         * dependent on output configuration
          */
         if (mdev->n_output > 0) {
                 mutex_unlock(&mdev->mutex);
@@ -585,7 +585,7 @@ static int mxr_s_std(struct file *file, void *fh, v4l2_std_id norm)
         mutex_lock(&mdev->mutex);
 
         /* standard change cannot be done while there is an entity
-         * dependant on output configuration
+         * dependent on output configuration
          */
         if (mdev->n_output > 0) {
                 mutex_unlock(&mdev->mutex);
diff --git a/drivers/media/platform/soc_camera/omap1_camera.c b/drivers/media/platform/soc_camera/omap1_camera.c
index 6769193c7c7b..74ce8b6b79fa 100644
--- a/drivers/media/platform/soc_camera/omap1_camera.c
+++ b/drivers/media/platform/soc_camera/omap1_camera.c
@@ -1495,7 +1495,7 @@ static int omap1_cam_set_bus_param(struct soc_camera_device *icd)
         if (ctrlclock & LCLK_EN)
                 CAM_WRITE(pcdev, CTRLCLOCK, ctrlclock);
 
-        /* select bus endianess */
+        /* select bus endianness */
         xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
         fmt = xlate->host_fmt;
 
diff --git a/drivers/media/platform/vivi.c b/drivers/media/platform/vivi.c
index 1d3f11965196..2d4e73b45c5e 100644
--- a/drivers/media/platform/vivi.c
+++ b/drivers/media/platform/vivi.c
@@ -1108,7 +1108,7 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
         return 0;
 }
 
-/* timeperframe is arbitrary and continous */
+/* timeperframe is arbitrary and continuous */
 static int vidioc_enum_frameintervals(struct file *file, void *priv,
                                              struct v4l2_frmivalenum *fival)
 {
@@ -1125,7 +1125,7 @@ static int vidioc_enum_frameintervals(struct file *file, void *priv,
 
         fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
 
-        /* fill in stepwise (step=1.0 is requred by V4L2 spec) */
+        /* fill in stepwise (step=1.0 is required by V4L2 spec) */
         fival->stepwise.min  = tpf_min;
         fival->stepwise.max  = tpf_max;
         fival->stepwise.step = (struct v4l2_fract) {1, 1};
diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
index 1c9e771aa15c..d16bf0f41e24 100644
--- a/drivers/media/platform/vsp1/vsp1_drv.c
+++ b/drivers/media/platform/vsp1/vsp1_drv.c
@@ -323,7 +323,7 @@ static void vsp1_clocks_disable(struct vsp1_device *vsp1)
  * Increment the VSP1 reference count and initialize the device if the first
  * reference is taken.
  *
- * Return a pointer to the VSP1 device or NULL if an error occured.
+ * Return a pointer to the VSP1 device or NULL if an error occurred.
  */
 struct vsp1_device *vsp1_device_get(struct vsp1_device *vsp1)
 {
diff --git a/drivers/media/platform/vsp1/vsp1_video.c b/drivers/media/platform/vsp1/vsp1_video.c
index 714c53ef6c11..4b0ac07af662 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -1026,8 +1026,10 @@ int vsp1_video_init(struct vsp1_video *video, struct vsp1_entity *rwpf)
 
         /* ... and the buffers queue... */
         video->alloc_ctx = vb2_dma_contig_init_ctx(video->vsp1->dev);
-        if (IS_ERR(video->alloc_ctx))
+        if (IS_ERR(video->alloc_ctx)) {
+                ret = PTR_ERR(video->alloc_ctx);
                 goto error;
+        }
 
         video->queue.type = video->type;
         video->queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
diff --git a/drivers/media/radio/radio-shark.c b/drivers/media/radio/radio-shark.c
index 3db8a8cfe1a8..050b3bb96fec 100644
--- a/drivers/media/radio/radio-shark.c
+++ b/drivers/media/radio/radio-shark.c
@@ -271,8 +271,7 @@ static void shark_unregister_leds(struct shark_device *shark)
         cancel_work_sync(&shark->led_work);
 }
 
-#ifdef CONFIG_PM
-static void shark_resume_leds(struct shark_device *shark)
+static inline void shark_resume_leds(struct shark_device *shark)
 {
         if (test_bit(BLUE_IS_PULSE, &shark->brightness_new))
                 set_bit(BLUE_PULSE_LED, &shark->brightness_new);
@@ -281,7 +280,6 @@ static void shark_resume_leds(struct shark_device *shark)
         set_bit(RED_LED, &shark->brightness_new);
         schedule_work(&shark->led_work);
 }
-#endif
 #else
 static int shark_register_leds(struct shark_device *shark, struct device *dev)
 {
diff --git a/drivers/media/radio/radio-shark2.c b/drivers/media/radio/radio-shark2.c
index d86d90dab8bf..8654e0dc5c95 100644
--- a/drivers/media/radio/radio-shark2.c
+++ b/drivers/media/radio/radio-shark2.c
@@ -237,8 +237,7 @@ static void shark_unregister_leds(struct shark_device *shark)
         cancel_work_sync(&shark->led_work);
 }
 
-#ifdef CONFIG_PM
-static void shark_resume_leds(struct shark_device *shark)
+static inline void shark_resume_leds(struct shark_device *shark)
 {
         int i;
 
@@ -247,7 +246,6 @@ static void shark_resume_leds(struct shark_device *shark)
 
         schedule_work(&shark->led_work);
 }
-#endif
 #else
 static int shark_register_leds(struct shark_device *shark, struct device *dev)
 {
diff --git a/drivers/media/radio/radio-si476x.c b/drivers/media/radio/radio-si476x.c
index 9c9084cb99f7..2fd9009f8663 100644
--- a/drivers/media/radio/radio-si476x.c
+++ b/drivers/media/radio/radio-si476x.c
@@ -268,8 +268,8 @@ struct si476x_radio;
  *
  * @tune_freq: Tune chip to a specific frequency
  * @seek_start: Star station seeking
- * @rsq_status: Get Recieved Signal Quality(RSQ) status
- * @rds_blckcnt: Get recived RDS blocks count
+ * @rsq_status: Get Received Signal Quality(RSQ) status
+ * @rds_blckcnt: Get received RDS blocks count
  * @phase_diversity: Change phase diversity mode of the tuner
  * @phase_div_status: Get phase diversity mode status
  * @acf_status: Get the status of Automatically Controlled
diff --git a/drivers/media/radio/radio-tea5764.c b/drivers/media/radio/radio-tea5764.c
index 036e2f54f4db..3ed1f5669f79 100644
--- a/drivers/media/radio/radio-tea5764.c
+++ b/drivers/media/radio/radio-tea5764.c
@@ -356,7 +356,7 @@ static int vidioc_s_frequency(struct file *file, void *priv,
                    So we keep it as-is. */
                 return -EINVAL;
         }
-        clamp(freq, FREQ_MIN * FREQ_MUL, FREQ_MAX * FREQ_MUL);
+        freq = clamp(freq, FREQ_MIN * FREQ_MUL, FREQ_MAX * FREQ_MUL);
         tea5764_power_up(radio);
         tea5764_tune(radio, (freq * 125) / 2);
         return 0;
diff --git a/drivers/media/radio/tef6862.c b/drivers/media/radio/tef6862.c
index 69e3245a58a0..a9319a24c7ef 100644
--- a/drivers/media/radio/tef6862.c
+++ b/drivers/media/radio/tef6862.c
@@ -112,7 +112,7 @@ static int tef6862_s_frequency(struct v4l2_subdev *sd, const struct v4l2_frequen
         if (f->tuner != 0)
                 return -EINVAL;
 
-        clamp(freq, TEF6862_LO_FREQ, TEF6862_HI_FREQ);
+        freq = clamp(freq, TEF6862_LO_FREQ, TEF6862_HI_FREQ);
         pll = 1964 + ((freq - TEF6862_LO_FREQ) * 20) / FREQ_MUL;
         i2cmsg[0] = (MSA_MODE_PRESET << MSA_MODE_SHIFT) | WM_SUB_PLLM;
         i2cmsg[1] = (pll >> 8) & 0xff;
diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c
index 72e3fa652481..f329485c6629 100644
--- a/drivers/media/rc/imon.c
+++ b/drivers/media/rc/imon.c
@@ -1370,7 +1370,7 @@ static void imon_pad_to_keys(struct imon_context *ictx, unsigned char *buf)
          * 0x68nnnnB7 to 0x6AnnnnB7, the left mouse button generates
          * 0x688301b7 and the right one 0x688481b7. All other keys generate
          * 0x2nnnnnnn. Position coordinate is encoded in buf[1] and buf[2] with
-         * reversed endianess. Extract direction from buffer, rotate endianess,
+         * reversed endianness. Extract direction from buffer, rotate endianness,
          * adjust sign and feed the values into stabilize(). The resulting codes
          * will be 0x01008000, 0x01007F00, which match the newer devices.
          */
diff --git a/drivers/media/rc/redrat3.c b/drivers/media/rc/redrat3.c
index 094484fac94c..a5d4f883d053 100644
--- a/drivers/media/rc/redrat3.c
+++ b/drivers/media/rc/redrat3.c
@@ -118,7 +118,7 @@ static int debug;
 #define RR3_IR_IO_LENGTH_FUZZ   0x04
 /* Timeout for end of signal detection */
 #define RR3_IR_IO_SIG_TIMEOUT   0x05
-/* Minumum value for pause recognition. */
+/* Minimum value for pause recognition. */
 #define RR3_IR_IO_MIN_PAUSE     0x06
 
 /* Clock freq. of EZ-USB chip */
diff --git a/drivers/media/tuners/mt2063.c b/drivers/media/tuners/mt2063.c
index 2e1a02e360ff..20cca405bf45 100644
--- a/drivers/media/tuners/mt2063.c
+++ b/drivers/media/tuners/mt2063.c
@@ -1195,7 +1195,7 @@ static u32 mt2063_set_dnc_output_enable(struct mt2063_state *state,
  *   DNC Output is selected, the other is always off)
  *
  * @state:      ptr to mt2063_state structure
- * @Mode:       desired reciever delivery system
+ * @Mode:       desired receiver delivery system
  *
  * Note: Register cache must be valid for it to work
  */
@@ -2119,7 +2119,7 @@ static int mt2063_set_analog_params(struct dvb_frontend *fe,
 
 /*
  * As defined on EN 300 429, the DVB-C roll-off factor is 0.15.
- * So, the amount of the needed bandwith is given by:
+ * So, the amount of the needed bandwidth is given by:
  *      Bw = Symbol_rate * (1 + 0.15)
  * As such, the maximum symbol rate supported by 6 MHz is given by:
  *      max_symbol_rate = 6 MHz / 1.15 = 5217391 Bauds
diff --git a/drivers/media/tuners/tuner-xc2028-types.h b/drivers/media/tuners/tuner-xc2028-types.h
index 74dc46a71f64..7e4798783db7 100644
--- a/drivers/media/tuners/tuner-xc2028-types.h
+++ b/drivers/media/tuners/tuner-xc2028-types.h
@@ -119,7 +119,7 @@
 #define V4L2_STD_A2             (V4L2_STD_A2_A    | V4L2_STD_A2_B)
 #define V4L2_STD_NICAM          (V4L2_STD_NICAM_A | V4L2_STD_NICAM_B)
 
-/* To preserve backward compatibilty,
+/* To preserve backward compatibility,
    (std & V4L2_STD_AUDIO) = 0 means that ALL audio stds are supported
  */
 
diff --git a/drivers/media/usb/cx231xx/cx231xx-cards.c b/drivers/media/usb/cx231xx/cx231xx-cards.c
index e9d017bea377..528cce958a82 100644
--- a/drivers/media/usb/cx231xx/cx231xx-cards.c
+++ b/drivers/media/usb/cx231xx/cx231xx-cards.c
@@ -1412,8 +1412,8 @@ err_v4l2:
         usb_set_intfdata(interface, NULL);
 err_if:
         usb_put_dev(udev);
-        kfree(dev);
         clear_bit(dev->devno, &cx231xx_devused);
+        kfree(dev);
         return retval;
 }
 
diff --git a/drivers/media/usb/dvb-usb-v2/af9035.c b/drivers/media/usb/dvb-usb-v2/af9035.c
index c8fcd78425bd..8f9b2cea88f0 100644
--- a/drivers/media/usb/dvb-usb-v2/af9035.c
+++ b/drivers/media/usb/dvb-usb-v2/af9035.c
@@ -131,7 +131,7 @@ static int af9035_wr_regs(struct dvb_usb_device *d, u32 reg, u8 *val, int len)
 {
         u8 wbuf[MAX_XFER_SIZE];
         u8 mbox = (reg >> 16) & 0xff;
-        struct usb_req req = { CMD_MEM_WR, mbox, sizeof(wbuf), wbuf, 0, NULL };
+        struct usb_req req = { CMD_MEM_WR, mbox, 6 + len, wbuf, 0, NULL };
 
         if (6 + len > sizeof(wbuf)) {
                 dev_warn(&d->udev->dev, "%s: i2c wr: len=%d is too big!\n",
@@ -238,14 +238,15 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap,
                 } else {
                         /* I2C */
                         u8 buf[MAX_XFER_SIZE];
-                        struct usb_req req = { CMD_I2C_RD, 0, sizeof(buf),
+                        struct usb_req req = { CMD_I2C_RD, 0, 5 + msg[0].len,
                                         buf, msg[1].len, msg[1].buf };
 
                         if (5 + msg[0].len > sizeof(buf)) {
                                 dev_warn(&d->udev->dev,
                                          "%s: i2c xfer: len=%d is too big!\n",
                                          KBUILD_MODNAME, msg[0].len);
-                                return -EOPNOTSUPP;
+                                ret = -EOPNOTSUPP;
+                                goto unlock;
                         }
                         req.mbox |= ((msg[0].addr & 0x80)  >>  3);
                         buf[0] = msg[1].len;
@@ -274,14 +275,15 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap,
                 } else {
                         /* I2C */
                         u8 buf[MAX_XFER_SIZE];
-                        struct usb_req req = { CMD_I2C_WR, 0, sizeof(buf), buf,
-                                        0, NULL };
+                        struct usb_req req = { CMD_I2C_WR, 0, 5 + msg[0].len,
+                                        buf, 0, NULL };
 
                         if (5 + msg[0].len > sizeof(buf)) {
                                 dev_warn(&d->udev->dev,
                                          "%s: i2c xfer: len=%d is too big!\n",
                                          KBUILD_MODNAME, msg[0].len);
-                                return -EOPNOTSUPP;
+                                ret = -EOPNOTSUPP;
+                                goto unlock;
                         }
                         req.mbox |= ((msg[0].addr & 0x80)  >>  3);
                         buf[0] = msg[0].len;
@@ -319,6 +321,7 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap,
                 ret = -EOPNOTSUPP;
         }
 
+unlock:
         mutex_unlock(&d->i2c_mutex);
 
         if (ret < 0)
@@ -1534,6 +1537,8 @@ static const struct usb_device_id af9035_id_table[] = {
         /* XXX: that same ID [0ccd:0099] is used by af9015 driver too */
         { DVB_USB_DEVICE(USB_VID_TERRATEC, 0x0099,
                 &af9035_props, "TerraTec Cinergy T Stick Dual RC (rev. 2)", NULL) },
+        { DVB_USB_DEVICE(USB_VID_LEADTEK, 0x6a05,
+                &af9035_props, "Leadtek WinFast DTV Dongle Dual", NULL) },
         { }
 };
 MODULE_DEVICE_TABLE(usb, af9035_id_table);
diff --git a/drivers/media/usb/dvb-usb-v2/mxl111sf.c b/drivers/media/usb/dvb-usb-v2/mxl111sf.c
index 2627553f7de1..08240e498451 100644
--- a/drivers/media/usb/dvb-usb-v2/mxl111sf.c
+++ b/drivers/media/usb/dvb-usb-v2/mxl111sf.c
@@ -266,7 +266,7 @@ static int mxl111sf_adap_fe_init(struct dvb_frontend *fe)
         struct mxl111sf_adap_state *adap_state = &state->adap_state[fe->id];
         int err;
 
-        /* exit if we didnt initialize the driver yet */
+        /* exit if we didn't initialize the driver yet */
         if (!state->chip_id) {
                 mxl_debug("driver not yet initialized, exit.");
                 goto fail;
@@ -322,7 +322,7 @@ static int mxl111sf_adap_fe_sleep(struct dvb_frontend *fe)
         struct mxl111sf_adap_state *adap_state = &state->adap_state[fe->id];
         int err;
 
-        /* exit if we didnt initialize the driver yet */
+        /* exit if we didn't initialize the driver yet */
         if (!state->chip_id) {
                 mxl_debug("driver not yet initialized, exit.");
                 goto fail;
diff --git a/drivers/media/usb/dvb-usb/technisat-usb2.c b/drivers/media/usb/dvb-usb/technisat-usb2.c
index 40832a1aef6c..98d24aefb640 100644
--- a/drivers/media/usb/dvb-usb/technisat-usb2.c
+++ b/drivers/media/usb/dvb-usb/technisat-usb2.c
@@ -102,7 +102,7 @@ static int technisat_usb2_i2c_access(struct usb_device *udev,
         if (rxlen > 62) {
                 err("i2c RX buffer can't exceed 62 bytes (dev 0x%02x)",
                                 device_addr);
-                txlen = 62;
+                rxlen = 62;
         }
 
         b[0] = I2C_SPEED_100KHZ_BIT;
diff --git a/drivers/media/usb/em28xx/em28xx-video.c b/drivers/media/usb/em28xx/em28xx-video.c
index fc5d60efd4ab..dd19c9ff76e0 100644
--- a/drivers/media/usb/em28xx/em28xx-video.c
+++ b/drivers/media/usb/em28xx/em28xx-video.c
@@ -1664,8 +1664,8 @@ static int em28xx_v4l2_close(struct file *filp)
 
         em28xx_videodbg("users=%d\n", dev->users);
 
-        mutex_lock(&dev->lock);
         vb2_fop_release(filp);
+        mutex_lock(&dev->lock);
 
         if (dev->users == 1) {
                 /* the device is already disconnect,
diff --git a/drivers/media/usb/gspca/gl860/gl860.c b/drivers/media/usb/gspca/gl860/gl860.c
index cb1e64ca59c9..cea8d7f51c3c 100644
--- a/drivers/media/usb/gspca/gl860/gl860.c
+++ b/drivers/media/usb/gspca/gl860/gl860.c
@@ -438,7 +438,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
         s32 nToSkip =
                 sd->swapRB * (gspca_dev->cam.cam_mode[mode].bytesperline + 1);
 
-        /* Test only against 0202h, so endianess does not matter */
+        /* Test only against 0202h, so endianness does not matter */
         switch (*(s16 *) data) {
         case 0x0202:            /* End of frame, start a new one */
                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
diff --git a/drivers/media/usb/gspca/pac207.c b/drivers/media/usb/gspca/pac207.c
index cd79c180f67b..07529e5a0c56 100644
--- a/drivers/media/usb/gspca/pac207.c
+++ b/drivers/media/usb/gspca/pac207.c
@@ -416,7 +416,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
 #if IS_ENABLED(CONFIG_INPUT)
 static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
                         u8 *data,               /* interrupt packet data */
-                        int len)                /* interrput packet length */
+                        int len)                /* interrupt packet length */
 {
         int ret = -EINVAL;
 
diff --git a/drivers/media/usb/gspca/pac7302.c b/drivers/media/usb/gspca/pac7302.c
index a91509643563..2fd1c5e31a0f 100644
--- a/drivers/media/usb/gspca/pac7302.c
+++ b/drivers/media/usb/gspca/pac7302.c
@@ -874,7 +874,7 @@ static int sd_dbg_s_register(struct gspca_dev *gspca_dev,
 #if IS_ENABLED(CONFIG_INPUT)
 static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
                         u8 *data,               /* interrupt packet data */
-                        int len)                /* interrput packet length */
+                        int len)                /* interrupt packet length */
 {
         int ret = -EINVAL;
         u8 data0, data1;
diff --git a/drivers/media/usb/gspca/stk1135.c b/drivers/media/usb/gspca/stk1135.c
index 1fc80af2a189..48234c9a8b6c 100644
--- a/drivers/media/usb/gspca/stk1135.c
+++ b/drivers/media/usb/gspca/stk1135.c
@@ -361,6 +361,9 @@ static void stk1135_configure_clock(struct gspca_dev *gspca_dev)
 
         /* set serial interface clock divider (30MHz/0x1f*16+2) = 60240 kHz) */
         reg_w(gspca_dev, STK1135_REG_SICTL + 2, 0x1f);
+
+        /* wait a while for sensor to catch up */
+        udelay(1000);
 }
 
 static void stk1135_camera_disable(struct gspca_dev *gspca_dev)
diff --git a/drivers/media/usb/gspca/stv0680.c b/drivers/media/usb/gspca/stv0680.c
index 9c0827631b9c..7f94ec74282e 100644
--- a/drivers/media/usb/gspca/stv0680.c
+++ b/drivers/media/usb/gspca/stv0680.c
@@ -139,7 +139,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
         struct sd *sd = (struct sd *) gspca_dev;
         struct cam *cam = &gspca_dev->cam;
 
-        /* Give the camera some time to settle, otherwise initalization will
+        /* Give the camera some time to settle, otherwise initialization will
            fail on hotplug, and yes it really needs a full second. */
         msleep(1000);
 
diff --git a/drivers/media/usb/gspca/sunplus.c b/drivers/media/usb/gspca/sunplus.c
index a517d185febe..46c9f2229a18 100644
--- a/drivers/media/usb/gspca/sunplus.c
+++ b/drivers/media/usb/gspca/sunplus.c
@@ -1027,6 +1027,7 @@ static const struct usb_device_id device_table[] = {
         {USB_DEVICE(0x055f, 0xc650), BS(SPCA533, 0)},
         {USB_DEVICE(0x05da, 0x1018), BS(SPCA504B, 0)},
         {USB_DEVICE(0x06d6, 0x0031), BS(SPCA533, 0)},
+        {USB_DEVICE(0x06d6, 0x0041), BS(SPCA504B, 0)},
         {USB_DEVICE(0x0733, 0x1311), BS(SPCA533, 0)},
         {USB_DEVICE(0x0733, 0x1314), BS(SPCA533, 0)},
         {USB_DEVICE(0x0733, 0x2211), BS(SPCA533, 0)},
diff --git a/drivers/media/usb/gspca/zc3xx.c b/drivers/media/usb/gspca/zc3xx.c
index 7b95d8e88a20..d3e1b6d8bf49 100644
--- a/drivers/media/usb/gspca/zc3xx.c
+++ b/drivers/media/usb/gspca/zc3xx.c
@@ -6905,7 +6905,7 @@ static int sd_get_jcomp(struct gspca_dev *gspca_dev,
 #if IS_ENABLED(CONFIG_INPUT)
 static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
                         u8 *data,               /* interrupt packet data */
-                        int len)                /* interrput packet length */
+                        int len)                /* interrupt packet length */
 {
         if (len == 8 && data[4] == 1) {
                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
diff --git a/drivers/media/usb/pwc/pwc-if.c b/drivers/media/usb/pwc/pwc-if.c
index 77bbf7889659..78c9bc8e7f56 100644
--- a/drivers/media/usb/pwc/pwc-if.c
+++ b/drivers/media/usb/pwc/pwc-if.c
@@ -1039,7 +1039,7 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
         /* Set the leds off */
         pwc_set_leds(pdev, 0, 0);
 
-        /* Setup intial videomode */
+        /* Setup initial videomode */
         rc = pwc_set_video_mode(pdev, MAX_WIDTH, MAX_HEIGHT,
                                 V4L2_PIX_FMT_YUV420, 30, &compression, 1);
         if (rc)
diff --git a/drivers/media/usb/usbtv/usbtv.c b/drivers/media/usb/usbtv/usbtv.c
index 8a505a90d318..6222a4ab1e00 100644
--- a/drivers/media/usb/usbtv/usbtv.c
+++ b/drivers/media/usb/usbtv/usbtv.c
@@ -50,13 +50,8 @@
 #define USBTV_ISOC_TRANSFERS    16
 #define USBTV_ISOC_PACKETS      8
 
-#define USBTV_WIDTH             720
-#define USBTV_HEIGHT            480
-
 #define USBTV_CHUNK_SIZE        256
 #define USBTV_CHUNK             240
-#define USBTV_CHUNKS            (USBTV_WIDTH * USBTV_HEIGHT \
-                                        / 4 / USBTV_CHUNK)
 
 /* Chunk header. */
 #define USBTV_MAGIC_OK(chunk)   ((be32_to_cpu(chunk[0]) & 0xff000000) \
@@ -65,6 +60,27 @@
 #define USBTV_ODD(chunk)        ((be32_to_cpu(chunk[0]) & 0x0000f000) >> 15)
 #define USBTV_CHUNK_NO(chunk)   (be32_to_cpu(chunk[0]) & 0x00000fff)
 
+#define USBTV_TV_STD  (V4L2_STD_525_60 | V4L2_STD_PAL)
+
+/* parameters for supported TV norms */
+struct usbtv_norm_params {
+        v4l2_std_id norm;
+        int cap_width, cap_height;
+};
+
+static struct usbtv_norm_params norm_params[] = {
+        {
+                .norm = V4L2_STD_525_60,
+                .cap_width = 720,
+                .cap_height = 480,
+        },
+        {
+                .norm = V4L2_STD_PAL,
+                .cap_width = 720,
+                .cap_height = 576,
+        }
+};
+
 /* A single videobuf2 frame buffer. */
 struct usbtv_buf {
         struct vb2_buffer vb;
@@ -94,11 +110,38 @@ struct usbtv {
                 USBTV_COMPOSITE_INPUT,
                 USBTV_SVIDEO_INPUT,
         } input;
+        v4l2_std_id norm;
+        int width, height;
+        int n_chunks;
         int iso_size;
         unsigned int sequence;
         struct urb *isoc_urbs[USBTV_ISOC_TRANSFERS];
 };
 
+static int usbtv_configure_for_norm(struct usbtv *usbtv, v4l2_std_id norm)
+{
+        int i, ret = 0;
+        struct usbtv_norm_params *params = NULL;
+
+        for (i = 0; i < ARRAY_SIZE(norm_params); i++) {
+                if (norm_params[i].norm & norm) {
+                        params = &norm_params[i];
+                        break;
+                }
+        }
+
+        if (params) {
+                usbtv->width = params->cap_width;
+                usbtv->height = params->cap_height;
+                usbtv->n_chunks = usbtv->width * usbtv->height
+                                                / 4 / USBTV_CHUNK;
+                usbtv->norm = params->norm;
+        } else
+                ret = -EINVAL;
+
+        return ret;
+}
+
 static int usbtv_set_regs(struct usbtv *usbtv, const u16 regs[][2], int size)
 {
         int ret;
@@ -158,6 +201,57 @@ static int usbtv_select_input(struct usbtv *usbtv, int input)
         return ret;
 }
 
+static int usbtv_select_norm(struct usbtv *usbtv, v4l2_std_id norm)
+{
+        int ret;
+        static const u16 pal[][2] = {
+                { USBTV_BASE + 0x001a, 0x0068 },
+                { USBTV_BASE + 0x010e, 0x0072 },
+                { USBTV_BASE + 0x010f, 0x00a2 },
+                { USBTV_BASE + 0x0112, 0x00b0 },
+                { USBTV_BASE + 0x0117, 0x0001 },
+                { USBTV_BASE + 0x0118, 0x002c },
+                { USBTV_BASE + 0x012d, 0x0010 },
+                { USBTV_BASE + 0x012f, 0x0020 },
+                { USBTV_BASE + 0x024f, 0x0002 },
+                { USBTV_BASE + 0x0254, 0x0059 },
+                { USBTV_BASE + 0x025a, 0x0016 },
+                { USBTV_BASE + 0x025b, 0x0035 },
+                { USBTV_BASE + 0x0263, 0x0017 },
+                { USBTV_BASE + 0x0266, 0x0016 },
+                { USBTV_BASE + 0x0267, 0x0036 }
+        };
+
+        static const u16 ntsc[][2] = {
+                { USBTV_BASE + 0x001a, 0x0079 },
+                { USBTV_BASE + 0x010e, 0x0068 },
+                { USBTV_BASE + 0x010f, 0x009c },
+                { USBTV_BASE + 0x0112, 0x00f0 },
+                { USBTV_BASE + 0x0117, 0x0000 },
+                { USBTV_BASE + 0x0118, 0x00fc },
+                { USBTV_BASE + 0x012d, 0x0004 },
+                { USBTV_BASE + 0x012f, 0x0008 },
+                { USBTV_BASE + 0x024f, 0x0001 },
+                { USBTV_BASE + 0x0254, 0x005f },
+                { USBTV_BASE + 0x025a, 0x0012 },
+                { USBTV_BASE + 0x025b, 0x0001 },
+                { USBTV_BASE + 0x0263, 0x001c },
+                { USBTV_BASE + 0x0266, 0x0011 },
+                { USBTV_BASE + 0x0267, 0x0005 }
+        };
+
+        ret = usbtv_configure_for_norm(usbtv, norm);
+
+        if (!ret) {
+                if (norm & V4L2_STD_525_60)
+                        ret = usbtv_set_regs(usbtv, ntsc, ARRAY_SIZE(ntsc));
+                else if (norm & V4L2_STD_PAL)
+                        ret = usbtv_set_regs(usbtv, pal, ARRAY_SIZE(pal));
+        }
+
+        return ret;
+}
+
 static int usbtv_setup_capture(struct usbtv *usbtv)
 {
         int ret;
@@ -225,26 +319,11 @@ static int usbtv_setup_capture(struct usbtv *usbtv)
 
                 { USBTV_BASE + 0x0284, 0x0088 },
                 { USBTV_BASE + 0x0003, 0x0004 },
-                { USBTV_BASE + 0x001a, 0x0079 },
                 { USBTV_BASE + 0x0100, 0x00d3 },
-                { USBTV_BASE + 0x010e, 0x0068 },
-                { USBTV_BASE + 0x010f, 0x009c },
-                { USBTV_BASE + 0x0112, 0x00f0 },
                 { USBTV_BASE + 0x0115, 0x0015 },
-                { USBTV_BASE + 0x0117, 0x0000 },
-                { USBTV_BASE + 0x0118, 0x00fc },
-                { USBTV_BASE + 0x012d, 0x0004 },
-                { USBTV_BASE + 0x012f, 0x0008 },
                 { USBTV_BASE + 0x0220, 0x002e },
                 { USBTV_BASE + 0x0225, 0x0008 },
                 { USBTV_BASE + 0x024e, 0x0002 },
-                { USBTV_BASE + 0x024f, 0x0001 },
-                { USBTV_BASE + 0x0254, 0x005f },
-                { USBTV_BASE + 0x025a, 0x0012 },
-                { USBTV_BASE + 0x025b, 0x0001 },
-                { USBTV_BASE + 0x0263, 0x001c },
-                { USBTV_BASE + 0x0266, 0x0011 },
-                { USBTV_BASE + 0x0267, 0x0005 },
                 { USBTV_BASE + 0x024e, 0x0002 },
                 { USBTV_BASE + 0x024f, 0x0002 },
         };
@@ -253,6 +332,10 @@ static int usbtv_setup_capture(struct usbtv *usbtv)
         if (ret)
                 return ret;
 
+        ret = usbtv_select_norm(usbtv, usbtv->norm);
+        if (ret)
+                return ret;
+
         ret = usbtv_select_input(usbtv, usbtv->input);
         if (ret)
                 return ret;
@@ -296,7 +379,7 @@ static void usbtv_image_chunk(struct usbtv *usbtv, u32 *chunk)
         frame_id = USBTV_FRAME_ID(chunk);
         odd = USBTV_ODD(chunk);
         chunk_no = USBTV_CHUNK_NO(chunk);
-        if (chunk_no >= USBTV_CHUNKS)
+        if (chunk_no >= usbtv->n_chunks)
                 return;
 
         /* Beginning of a frame. */
@@ -324,10 +407,10 @@ static void usbtv_image_chunk(struct usbtv *usbtv, u32 *chunk)
         usbtv->chunks_done++;
 
         /* Last chunk in a frame, signalling an end */
-        if (odd && chunk_no == USBTV_CHUNKS-1) {
+        if (odd && chunk_no == usbtv->n_chunks-1) {
                 int size = vb2_plane_size(&buf->vb, 0);
                 enum vb2_buffer_state state = usbtv->chunks_done ==
-                                                USBTV_CHUNKS ?
+                                                usbtv->n_chunks ?
                                                 VB2_BUF_STATE_DONE :
                                                 VB2_BUF_STATE_ERROR;
 
@@ -500,6 +583,8 @@ static int usbtv_querycap(struct file *file, void *priv,
 static int usbtv_enum_input(struct file *file, void *priv,
                                         struct v4l2_input *i)
 {
+        struct usbtv *dev = video_drvdata(file);
+
         switch (i->index) {
         case USBTV_COMPOSITE_INPUT:
                 strlcpy(i->name, "Composite", sizeof(i->name));
@@ -512,7 +597,7 @@ static int usbtv_enum_input(struct file *file, void *priv,
         }
 
         i->type = V4L2_INPUT_TYPE_CAMERA;
-        i->std = V4L2_STD_525_60;
+        i->std = dev->vdev.tvnorms;
         return 0;
 }
 
@@ -531,23 +616,37 @@ static int usbtv_enum_fmt_vid_cap(struct file *file, void  *priv,
 static int usbtv_fmt_vid_cap(struct file *file, void *priv,
                                         struct v4l2_format *f)
 {
-        f->fmt.pix.width = USBTV_WIDTH;
-        f->fmt.pix.height = USBTV_HEIGHT;
+        struct usbtv *usbtv = video_drvdata(file);
+
+        f->fmt.pix.width = usbtv->width;
+        f->fmt.pix.height = usbtv->height;
         f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUYV;
         f->fmt.pix.field = V4L2_FIELD_INTERLACED;
-        f->fmt.pix.bytesperline = USBTV_WIDTH * 2;
+        f->fmt.pix.bytesperline = usbtv->width * 2;
         f->fmt.pix.sizeimage = (f->fmt.pix.bytesperline * f->fmt.pix.height);
         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
-        f->fmt.pix.priv = 0;
+
         return 0;
 }
 
 static int usbtv_g_std(struct file *file, void *priv, v4l2_std_id *norm)
 {
-        *norm = V4L2_STD_525_60;
+        struct usbtv *usbtv = video_drvdata(file);
+        *norm = usbtv->norm;
         return 0;
 }
 
+static int usbtv_s_std(struct file *file, void *priv, v4l2_std_id norm)
+{
+        int ret = -EINVAL;
+        struct usbtv *usbtv = video_drvdata(file);
+
+        if ((norm & V4L2_STD_525_60) || (norm & V4L2_STD_PAL))
+                ret = usbtv_select_norm(usbtv, norm);
+
+        return ret;
+}
+
 static int usbtv_g_input(struct file *file, void *priv, unsigned int *i)
 {
         struct usbtv *usbtv = video_drvdata(file);
@@ -561,13 +660,6 @@ static int usbtv_s_input(struct file *file, void *priv, unsigned int i)
         return usbtv_select_input(usbtv, i);
 }
 
-static int usbtv_s_std(struct file *file, void *priv, v4l2_std_id norm)
-{
-        if (norm & V4L2_STD_525_60)
-                return 0;
-        return -EINVAL;
-}
-
 struct v4l2_ioctl_ops usbtv_ioctl_ops = {
         .vidioc_querycap = usbtv_querycap,
         .vidioc_enum_input = usbtv_enum_input,
@@ -604,10 +696,12 @@ static int usbtv_queue_setup(struct vb2_queue *vq,
         const struct v4l2_format *v4l_fmt, unsigned int *nbuffers,
         unsigned int *nplanes, unsigned int sizes[], void *alloc_ctxs[])
 {
+        struct usbtv *usbtv = vb2_get_drv_priv(vq);
+
         if (*nbuffers < 2)
                 *nbuffers = 2;
         *nplanes = 1;
-        sizes[0] = USBTV_WIDTH * USBTV_HEIGHT / 2 * sizeof(u32);
+        sizes[0] = USBTV_CHUNK * usbtv->n_chunks * 2 * sizeof(u32);
 
         return 0;
 }
@@ -690,7 +784,11 @@ static int usbtv_probe(struct usb_interface *intf,
                 return -ENOMEM;
         usbtv->dev = dev;
         usbtv->udev = usb_get_dev(interface_to_usbdev(intf));
+
         usbtv->iso_size = size;
+
+        (void)usbtv_configure_for_norm(usbtv, V4L2_STD_525_60);
+
         spin_lock_init(&usbtv->buflock);
         mutex_init(&usbtv->v4l2_lock);
         mutex_init(&usbtv->vb2q_lock);
@@ -727,7 +825,7 @@ static int usbtv_probe(struct usb_interface *intf,
         usbtv->vdev.release = video_device_release_empty;
         usbtv->vdev.fops = &usbtv_fops;
         usbtv->vdev.ioctl_ops = &usbtv_ioctl_ops;
-        usbtv->vdev.tvnorms = V4L2_STD_525_60;
+        usbtv->vdev.tvnorms = USBTV_TV_STD;
         usbtv->vdev.queue = &usbtv->vb2q;
         usbtv->vdev.lock = &usbtv->v4l2_lock;
         set_bit(V4L2_FL_USE_FH_PRIO, &usbtv->vdev.flags);
diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index 899cb6d1c4a4..898c208889cd 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -556,7 +556,7 @@ static u16 uvc_video_clock_host_sof(const struct uvc_clock_sample *sample)
  *
  * SOF = ((SOF2 - SOF1) * PTS + SOF1 * STC2 - SOF2 * STC1) / (STC2 - STC1)   (1)
  *
- * to avoid loosing precision in the division. Similarly, the host timestamp is
+ * to avoid losing precision in the division. Similarly, the host timestamp is
  * computed with
  *
  * TS = ((TS2 - TS1) * PTS + TS1 * SOF2 - TS2 * SOF1) / (SOF2 - SOF1)        (2)
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index 60dcc0f3b32e..fb46790d0eca 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -420,7 +420,7 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
                 "Advanced Simple",
                 "Core",
                 "Simple Scalable",
-                "Advanced Coding Efficency",
+                "Advanced Coding Efficiency",
                 NULL,
         };
 
diff --git a/drivers/media/v4l2-core/videobuf2-core.c b/drivers/media/v4l2-core/videobuf2-core.c
index b19b306c8f7f..0edc165f418d 100644
--- a/drivers/media/v4l2-core/videobuf2-core.c
+++ b/drivers/media/v4l2-core/videobuf2-core.c
@@ -145,6 +145,25 @@ static void __vb2_buf_dmabuf_put(struct vb2_buffer *vb)
 }
 
 /**
+ * __setup_lengths() - setup initial lengths for every plane in
+ * every buffer on the queue
+ */
+static void __setup_lengths(struct vb2_queue *q, unsigned int n)
+{
+        unsigned int buffer, plane;
+        struct vb2_buffer *vb;
+
+        for (buffer = q->num_buffers; buffer < q->num_buffers + n; ++buffer) {
+                vb = q->bufs[buffer];
+                if (!vb)
+                        continue;
+
+                for (plane = 0; plane < vb->num_planes; ++plane)
+                        vb->v4l2_planes[plane].length = q->plane_sizes[plane];
+        }
+}
+
+/**
  * __setup_offsets() - setup unique offsets ("cookies") for every plane in
  * every buffer on the queue
  */
@@ -169,7 +188,6 @@ static void __setup_offsets(struct vb2_queue *q, unsigned int n)
                         continue;
 
                 for (plane = 0; plane < vb->num_planes; ++plane) {
-                        vb->v4l2_planes[plane].length = q->plane_sizes[plane];
                         vb->v4l2_planes[plane].m.mem_offset = off;
 
                         dprintk(3, "Buffer %d, plane %d offset 0x%08lx\n",
@@ -241,6 +259,7 @@ static int __vb2_queue_alloc(struct vb2_queue *q, enum v4l2_memory memory,
                 q->bufs[q->num_buffers + buffer] = vb;
         }
 
+        __setup_lengths(q, buffer);
         if (memory == V4L2_MEMORY_MMAP)
                 __setup_offsets(q, buffer);
 
@@ -1824,8 +1843,8 @@ int vb2_expbuf(struct vb2_queue *q, struct v4l2_exportbuffer *eb)
                 return -EINVAL;
         }
 
-        if (eb->flags & ~O_CLOEXEC) {
-                dprintk(1, "Queue does support only O_CLOEXEC flag\n");
+        if (eb->flags & ~(O_CLOEXEC | O_ACCMODE)) {
+                dprintk(1, "Queue does support only O_CLOEXEC and access mode flags\n");
                 return -EINVAL;
         }
 
@@ -1848,14 +1867,14 @@ int vb2_expbuf(struct vb2_queue *q, struct v4l2_exportbuffer *eb)
 
         vb_plane = &vb->planes[eb->plane];
 
-        dbuf = call_memop(q, get_dmabuf, vb_plane->mem_priv);
+        dbuf = call_memop(q, get_dmabuf, vb_plane->mem_priv, eb->flags & O_ACCMODE);
         if (IS_ERR_OR_NULL(dbuf)) {
                 dprintk(1, "Failed to export buffer %d, plane %d\n",
                         eb->index, eb->plane);
                 return -EINVAL;
         }
 
-        ret = dma_buf_fd(dbuf, eb->flags);
+        ret = dma_buf_fd(dbuf, eb->flags & ~O_ACCMODE);
         if (ret < 0) {
                 dprintk(3, "buffer %d, plane %d failed to export (%d)\n",
                         eb->index, eb->plane, ret);
diff --git a/drivers/media/v4l2-core/videobuf2-dma-contig.c b/drivers/media/v4l2-core/videobuf2-dma-contig.c
index 646f08f4f504..33d3871d1e13 100644
--- a/drivers/media/v4l2-core/videobuf2-dma-contig.c
+++ b/drivers/media/v4l2-core/videobuf2-dma-contig.c
@@ -393,7 +393,7 @@ static struct sg_table *vb2_dc_get_base_sgt(struct vb2_dc_buf *buf)
         return sgt;
 }
 
-static struct dma_buf *vb2_dc_get_dmabuf(void *buf_priv)
+static struct dma_buf *vb2_dc_get_dmabuf(void *buf_priv, unsigned long flags)
 {
         struct vb2_dc_buf *buf = buf_priv;
         struct dma_buf *dbuf;
@@ -404,7 +404,7 @@ static struct dma_buf *vb2_dc_get_dmabuf(void *buf_priv)
         if (WARN_ON(!buf->sgt_base))
                 return NULL;
 
-        dbuf = dma_buf_export(buf, &vb2_dc_dmabuf_ops, buf->size, 0);
+        dbuf = dma_buf_export(buf, &vb2_dc_dmabuf_ops, buf->size, flags);
         if (IS_ERR(dbuf))
                 return NULL;
 
diff --git a/drivers/media/v4l2-core/videobuf2-dma-sg.c b/drivers/media/v4l2-core/videobuf2-dma-sg.c
index 2f860543912c..0d3a8ffe47a3 100644
--- a/drivers/media/v4l2-core/videobuf2-dma-sg.c
+++ b/drivers/media/v4l2-core/videobuf2-dma-sg.c
@@ -178,7 +178,7 @@ static void *vb2_dma_sg_get_userptr(void *alloc_ctx, unsigned long vaddr,
         buf->pages = kzalloc(buf->num_pages * sizeof(struct page *),
                              GFP_KERNEL);
         if (!buf->pages)
-                return NULL;
+                goto userptr_fail_alloc_pages;
 
         num_pages_from_user = get_user_pages(current, current->mm,
                                              vaddr & PAGE_MASK,
@@ -204,6 +204,7 @@ userptr_fail_get_user_pages:
         while (--num_pages_from_user >= 0)
                 put_page(buf->pages[num_pages_from_user]);
         kfree(buf->pages);
+userptr_fail_alloc_pages:
         kfree(buf);
         return NULL;
 }
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 62a60caa5d1f..dd671582c9a1 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -32,7 +32,7 @@ config MFD_AS3722
         select MFD_CORE
         select REGMAP_I2C
         select REGMAP_IRQ
-        depends on I2C && OF
+        depends on I2C=y && OF
         help
           The ams AS3722 is a compact system PMU suitable for mobile phones,
           tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index da1c6566d93d..37edf9e989b0 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -506,7 +506,7 @@ static struct lpc_ich_info lpc_chipset_info[] = {
                 .iTCO_version = 2,
         },
         [LPC_WPT_LP] = {
-                .name = "Lynx Point_LP",
+                .name = "Wildcat Point_LP",
                 .iTCO_version = 2,
         },
 };
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index 34c18fb8c089..54cc25546592 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -81,31 +81,31 @@ static struct of_device_id sec_dt_match[] = {
 
 int sec_reg_read(struct sec_pmic_dev *sec_pmic, u8 reg, void *dest)
 {
-        return regmap_read(sec_pmic->regmap, reg, dest);
+        return regmap_read(sec_pmic->regmap_pmic, reg, dest);
 }
 EXPORT_SYMBOL_GPL(sec_reg_read);
 
 int sec_bulk_read(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf)
 {
-        return regmap_bulk_read(sec_pmic->regmap, reg, buf, count);
+        return regmap_bulk_read(sec_pmic->regmap_pmic, reg, buf, count);
 }
 EXPORT_SYMBOL_GPL(sec_bulk_read);
 
 int sec_reg_write(struct sec_pmic_dev *sec_pmic, u8 reg, u8 value)
 {
-        return regmap_write(sec_pmic->regmap, reg, value);
+        return regmap_write(sec_pmic->regmap_pmic, reg, value);
 }
 EXPORT_SYMBOL_GPL(sec_reg_write);
 
 int sec_bulk_write(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf)
 {
-        return regmap_raw_write(sec_pmic->regmap, reg, buf, count);
+        return regmap_raw_write(sec_pmic->regmap_pmic, reg, buf, count);
 }
 EXPORT_SYMBOL_GPL(sec_bulk_write);
 
 int sec_reg_update(struct sec_pmic_dev *sec_pmic, u8 reg, u8 val, u8 mask)
 {
-        return regmap_update_bits(sec_pmic->regmap, reg, mask, val);
+        return regmap_update_bits(sec_pmic->regmap_pmic, reg, mask, val);
 }
 EXPORT_SYMBOL_GPL(sec_reg_update);
 
@@ -166,6 +166,11 @@ static struct regmap_config s5m8767_regmap_config = {
         .cache_type = REGCACHE_FLAT,
 };
 
+static const struct regmap_config sec_rtc_regmap_config = {
+        .reg_bits = 8,
+        .val_bits = 8,
+};
+
 #ifdef CONFIG_OF
 /*
  * Only the common platform data elements for s5m8767 are parsed here from the
@@ -266,9 +271,9 @@ static int sec_pmic_probe(struct i2c_client *i2c,
                 break;
         }
 
-        sec_pmic->regmap = devm_regmap_init_i2c(i2c, regmap);
-        if (IS_ERR(sec_pmic->regmap)) {
-                ret = PTR_ERR(sec_pmic->regmap);
+        sec_pmic->regmap_pmic = devm_regmap_init_i2c(i2c, regmap);
+        if (IS_ERR(sec_pmic->regmap_pmic)) {
+                ret = PTR_ERR(sec_pmic->regmap_pmic);
                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
                         ret);
                 return ret;
@@ -277,6 +282,15 @@ static int sec_pmic_probe(struct i2c_client *i2c,
         sec_pmic->rtc = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR);
         i2c_set_clientdata(sec_pmic->rtc, sec_pmic);
 
+        sec_pmic->regmap_rtc = devm_regmap_init_i2c(sec_pmic->rtc,
+                        &sec_rtc_regmap_config);
+        if (IS_ERR(sec_pmic->regmap_rtc)) {
+                ret = PTR_ERR(sec_pmic->regmap_rtc);
+                dev_err(&i2c->dev, "Failed to allocate RTC register map: %d\n",
+                        ret);
+                return ret;
+        }
+
         if (pdata && pdata->cfg_pmic_irq)
                 pdata->cfg_pmic_irq();
 
diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
index 0dd84e99081e..b441b1be27cb 100644
--- a/drivers/mfd/sec-irq.c
+++ b/drivers/mfd/sec-irq.c
@@ -280,19 +280,19 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
 
         switch (type) {
         case S5M8763X:
-                ret = regmap_add_irq_chip(sec_pmic->regmap, sec_pmic->irq,
+                ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq,
                                   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
                                   sec_pmic->irq_base, &s5m8763_irq_chip,
                                   &sec_pmic->irq_data);
                 break;
         case S5M8767X:
-                ret = regmap_add_irq_chip(sec_pmic->regmap, sec_pmic->irq,
+                ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq,
                                   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
                                   sec_pmic->irq_base, &s5m8767_irq_chip,
                                   &sec_pmic->irq_data);
                 break;
         case S2MPS11X:
-                ret = regmap_add_irq_chip(sec_pmic->regmap, sec_pmic->irq,
+                ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq,
                                   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
                                   sec_pmic->irq_base, &s2mps11_irq_chip,
                                   &sec_pmic->irq_data);
diff --git a/drivers/mfd/ti-ssp.c b/drivers/mfd/ti-ssp.c
index 71e3e0c5bf73..a5424579679c 100644
--- a/drivers/mfd/ti-ssp.c
+++ b/drivers/mfd/ti-ssp.c
@@ -32,6 +32,7 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/io.h>
+#include <linux/sched.h>
 #include <linux/mfd/core.h>
 #include <linux/mfd/ti_ssp.h>
 
@@ -409,7 +410,6 @@ static int ti_ssp_probe(struct platform_device *pdev)
                 cells[id].id            = id;
                 cells[id].name          = data->dev_name;
                 cells[id].platform_data = data->pdata;
-                cells[id].data_size     = data->pdata_size;
         }
 
         error = mfd_add_devices(dev, 0, cells, 2, NULL, 0, NULL);
diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
index 6c0fde55270d..66f411a6e8ea 100644
--- a/drivers/misc/mei/hw-me-regs.h
+++ b/drivers/misc/mei/hw-me-regs.h
@@ -109,9 +109,12 @@
 #define MEI_DEV_ID_PPT_2      0x1CBA  /* Panther Point */
 #define MEI_DEV_ID_PPT_3      0x1DBA  /* Panther Point */
 
-#define MEI_DEV_ID_LPT        0x8C3A  /* Lynx Point */
+#define MEI_DEV_ID_LPT_H      0x8C3A  /* Lynx Point H */
 #define MEI_DEV_ID_LPT_W      0x8D3A  /* Lynx Point - Wellsburg */
 #define MEI_DEV_ID_LPT_LP     0x9C3A  /* Lynx Point LP */
+#define MEI_DEV_ID_LPT_HR     0x8CBA  /* Lynx Point H Refresh */
+
+#define MEI_DEV_ID_WPT_LP     0x9CBA  /* Wildcat Point LP */
 /*
  * MEI HW Section
  */
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index b96205aece0c..2cab3c0a6805 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -76,9 +76,11 @@ static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = {
         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
-        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT)},
+        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_H)},
         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_W)},
         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
+        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_HR)},
+        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_WPT_LP)},
 
         /* required last entry */
         {0, }
diff --git a/drivers/misc/mic/card/mic_virtio.c b/drivers/misc/mic/card/mic_virtio.c
index 8aa42e738acc..653799b96bfa 100644
--- a/drivers/misc/mic/card/mic_virtio.c
+++ b/drivers/misc/mic/card/mic_virtio.c
@@ -154,14 +154,14 @@ static void mic_reset_inform_host(struct virtio_device *vdev)
 {
         struct mic_vdev *mvdev = to_micvdev(vdev);
         struct mic_device_ctrl __iomem *dc = mvdev->dc;
-        int retry = 100, i;
+        int retry;
 
         iowrite8(0, &dc->host_ack);
         iowrite8(1, &dc->vdev_reset);
         mic_send_intr(mvdev->mdev, mvdev->c2h_vdev_db);
 
         /* Wait till host completes all card accesses and acks the reset */
-        for (i = retry; i--;) {
+        for (retry = 100; retry--;) {
                 if (ioread8(&dc->host_ack))
                         break;
                 msleep(100);
@@ -187,11 +187,12 @@ static void mic_reset(struct virtio_device *vdev)
 /*
  * The virtio_ring code calls this API when it wants to notify the Host.
  */
-static void mic_notify(struct virtqueue *vq)
+static bool mic_notify(struct virtqueue *vq)
 {
         struct mic_vdev *mvdev = vq->priv;
 
         mic_send_intr(mvdev->mdev, mvdev->c2h_vdev_db);
+        return true;
 }
 
 static void mic_del_vq(struct virtqueue *vq, int n)
@@ -247,17 +248,17 @@ static struct virtqueue *mic_find_vq(struct virtio_device *vdev,
         /* First assign the vring's allocated in host memory */
         vqconfig = mic_vq_config(mvdev->desc) + index;
         memcpy_fromio(&config, vqconfig, sizeof(config));
-        _vr_size = vring_size(config.num, MIC_VIRTIO_RING_ALIGN);
+        _vr_size = vring_size(le16_to_cpu(config.num), MIC_VIRTIO_RING_ALIGN);
         vr_size = PAGE_ALIGN(_vr_size + sizeof(struct _mic_vring_info));
-        va = mic_card_map(mvdev->mdev, config.address, vr_size);
+        va = mic_card_map(mvdev->mdev, le64_to_cpu(config.address), vr_size);
         if (!va)
                 return ERR_PTR(-ENOMEM);
         mvdev->vr[index] = va;
         memset_io(va, 0x0, _vr_size);
-        vq = vring_new_virtqueue(index,
-                                config.num, MIC_VIRTIO_RING_ALIGN, vdev,
-                                false,
-                                va, mic_notify, callback, name);
+        vq = vring_new_virtqueue(index, le16_to_cpu(config.num),
+                                 MIC_VIRTIO_RING_ALIGN, vdev, false,
+                                 (void __force *)va, mic_notify, callback,
+                                 name);
         if (!vq) {
                 err = -ENOMEM;
                 goto unmap;
@@ -272,7 +273,8 @@ static struct virtqueue *mic_find_vq(struct virtio_device *vdev,
 
         /* Allocate and reassign used ring now */
         mvdev->used_size[index] = PAGE_ALIGN(sizeof(__u16) * 3 +
-                        sizeof(struct vring_used_elem) * config.num);
+                                             sizeof(struct vring_used_elem) *
+                                             le16_to_cpu(config.num));
         used = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
                                         get_order(mvdev->used_size[index]));
         if (!used) {
@@ -309,7 +311,7 @@ static int mic_find_vqs(struct virtio_device *vdev, unsigned nvqs,
 {
         struct mic_vdev *mvdev = to_micvdev(vdev);
         struct mic_device_ctrl __iomem *dc = mvdev->dc;
-        int i, err, retry = 100;
+        int i, err, retry;
 
         /* We must have this many virtqueues. */
         if (nvqs > ioread8(&mvdev->desc->num_vq))
@@ -331,7 +333,7 @@ static int mic_find_vqs(struct virtio_device *vdev, unsigned nvqs,
          * rings have been re-assigned.
          */
         mic_send_intr(mvdev->mdev, mvdev->c2h_vdev_db);
-        for (i = retry; i--;) {
+        for (retry = 100; retry--;) {
                 if (!ioread8(&dc->used_address_updated))
                         break;
                 msleep(100);
@@ -519,8 +521,8 @@ static void mic_scan_devices(struct mic_driver *mdrv, bool remove)
         struct device *dev;
         int ret;
 
-        for (i = mic_aligned_size(struct mic_bootparam);
-                i < MIC_DP_SIZE; i += mic_total_desc_size(d)) {
+        for (i = sizeof(struct mic_bootparam); i < MIC_DP_SIZE;
+                i += mic_total_desc_size(d)) {
                 d = mdrv->dp + i;
                 dc = (void __iomem *)d + mic_aligned_desc_size(d);
                 /*
@@ -539,7 +541,8 @@ static void mic_scan_devices(struct mic_driver *mdrv, bool remove)
                         continue;
 
                 /* device already exists */
-                dev = device_find_child(mdrv->dev, d, mic_match_desc);
+                dev = device_find_child(mdrv->dev, (void __force *)d,
+                                        mic_match_desc);
                 if (dev) {
                         if (remove)
                                 iowrite8(MIC_VIRTIO_PARAM_DEV_REMOVE,
diff --git a/drivers/misc/mic/card/mic_virtio.h b/drivers/misc/mic/card/mic_virtio.h
index 2c5c22c93ba8..d0407ba53bb7 100644
--- a/drivers/misc/mic/card/mic_virtio.h
+++ b/drivers/misc/mic/card/mic_virtio.h
@@ -42,8 +42,8 @@
 
 static inline unsigned mic_desc_size(struct mic_device_desc __iomem *desc)
 {
-        return mic_aligned_size(*desc)
-                + ioread8(&desc->num_vq) * mic_aligned_size(struct mic_vqconfig)
+        return sizeof(*desc)
+                + ioread8(&desc->num_vq) * sizeof(struct mic_vqconfig)
                 + ioread8(&desc->feature_len) * 2
                 + ioread8(&desc->config_len);
 }
@@ -67,8 +67,7 @@ mic_vq_configspace(struct mic_device_desc __iomem *desc)
 }
 static inline unsigned mic_total_desc_size(struct mic_device_desc __iomem *desc)
 {
-        return mic_aligned_desc_size(desc) +
-                mic_aligned_size(struct mic_device_ctrl);
+        return mic_aligned_desc_size(desc) + sizeof(struct mic_device_ctrl);
 }
 
 int mic_devices_init(struct mic_driver *mdrv);
diff --git a/drivers/misc/mic/host/mic_boot.c b/drivers/misc/mic/host/mic_boot.c
index 7558d9186438..b75c6b5cc20f 100644
--- a/drivers/misc/mic/host/mic_boot.c
+++ b/drivers/misc/mic/host/mic_boot.c
@@ -62,7 +62,7 @@ void mic_bootparam_init(struct mic_device *mdev)
 {
         struct mic_bootparam *bootparam = mdev->dp;
 
-        bootparam->magic = MIC_MAGIC;
+        bootparam->magic = cpu_to_le32(MIC_MAGIC);
         bootparam->c2h_shutdown_db = mdev->shutdown_db;
         bootparam->h2c_shutdown_db = -1;
         bootparam->h2c_config_db = -1;
diff --git a/drivers/misc/mic/host/mic_virtio.c b/drivers/misc/mic/host/mic_virtio.c
index 5b8494bd1e00..e04bb4fe6823 100644
--- a/drivers/misc/mic/host/mic_virtio.c
+++ b/drivers/misc/mic/host/mic_virtio.c
@@ -41,7 +41,7 @@ static int mic_virtio_copy_to_user(struct mic_vdev *mvdev,
          * We are copying from IO below an should ideally use something
          * like copy_to_user_fromio(..) if it existed.
          */
-        if (copy_to_user(ubuf, dbuf, len)) {
+        if (copy_to_user(ubuf, (void __force *)dbuf, len)) {
                 err = -EFAULT;
                 dev_err(mic_dev(mvdev), "%s %d err %d\n",
                         __func__, __LINE__, err);
@@ -66,7 +66,7 @@ static int mic_virtio_copy_from_user(struct mic_vdev *mvdev,
          * We are copying to IO below and should ideally use something
          * like copy_from_user_toio(..) if it existed.
          */
-        if (copy_from_user(dbuf, ubuf, len)) {
+        if (copy_from_user((void __force *)dbuf, ubuf, len)) {
                 err = -EFAULT;
                 dev_err(mic_dev(mvdev), "%s %d err %d\n",
                         __func__, __LINE__, err);
@@ -293,7 +293,7 @@ static void mic_virtio_init_post(struct mic_vdev *mvdev)
                         continue;
                 }
                 mvdev->mvr[i].vrh.vring.used =
-                        mvdev->mdev->aper.va +
+                        (void __force *)mvdev->mdev->aper.va +
                         le64_to_cpu(vqconfig[i].used_address);
         }
 
@@ -378,7 +378,7 @@ int mic_virtio_config_change(struct mic_vdev *mvdev,
                         void __user *argp)
 {
         DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake);
-        int ret = 0, retry = 100, i;
+        int ret = 0, retry, i;
         struct mic_bootparam *bootparam = mvdev->mdev->dp;
         s8 db = bootparam->h2c_config_db;
 
@@ -401,7 +401,7 @@ int mic_virtio_config_change(struct mic_vdev *mvdev,
         mvdev->dc->config_change = MIC_VIRTIO_PARAM_CONFIG_CHANGED;
         mvdev->mdev->ops->send_intr(mvdev->mdev, db);
 
-        for (i = retry; i--;) {
+        for (retry = 100; retry--;) {
                 ret = wait_event_timeout(wake,
                         mvdev->dc->guest_ack, msecs_to_jiffies(100));
                 if (ret)
@@ -467,7 +467,7 @@ static int mic_copy_dp_entry(struct mic_vdev *mvdev,
         }
 
         /* Find the first free device page entry */
-        for (i = mic_aligned_size(struct mic_bootparam);
+        for (i = sizeof(struct mic_bootparam);
                 i < MIC_DP_SIZE - mic_total_desc_size(dd_config);
                 i += mic_total_desc_size(devp)) {
                 devp = mdev->dp + i;
@@ -525,6 +525,7 @@ int mic_virtio_add_device(struct mic_vdev *mvdev,
         char irqname[10];
         struct mic_bootparam *bootparam = mdev->dp;
         u16 num;
+        dma_addr_t vr_addr;
 
         mutex_lock(&mdev->mic_mutex);
 
@@ -559,17 +560,16 @@ int mic_virtio_add_device(struct mic_vdev *mvdev,
                 }
                 vr->len = vr_size;
                 vr->info = vr->va + vring_size(num, MIC_VIRTIO_RING_ALIGN);
-                vr->info->magic = MIC_MAGIC + mvdev->virtio_id + i;
-                vqconfig[i].address = mic_map_single(mdev,
-                        vr->va, vr_size);
-                if (mic_map_error(vqconfig[i].address)) {
+                vr->info->magic = cpu_to_le32(MIC_MAGIC + mvdev->virtio_id + i);
+                vr_addr = mic_map_single(mdev, vr->va, vr_size);
+                if (mic_map_error(vr_addr)) {
                         free_pages((unsigned long)vr->va, get_order(vr_size));
                         ret = -ENOMEM;
                         dev_err(mic_dev(mvdev), "%s %d err %d\n",
                                 __func__, __LINE__, ret);
                         goto err;
                 }
-                vqconfig[i].address = cpu_to_le64(vqconfig[i].address);
+                vqconfig[i].address = cpu_to_le64(vr_addr);
 
                 vring_init(&vr->vr, num, vr->va, MIC_VIRTIO_RING_ALIGN);
                 ret = vringh_init_kern(&mvr->vrh,
@@ -639,7 +639,7 @@ void mic_virtio_del_device(struct mic_vdev *mvdev)
         struct mic_vdev *tmp_mvdev;
         struct mic_device *mdev = mvdev->mdev;
         DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake);
-        int i, ret, retry = 100;
+        int i, ret, retry;
         struct mic_vqconfig *vqconfig;
         struct mic_bootparam *bootparam = mdev->dp;
         s8 db;
@@ -652,16 +652,16 @@ void mic_virtio_del_device(struct mic_vdev *mvdev)
                 "Requesting hot remove id %d\n", mvdev->virtio_id);
         mvdev->dc->config_change = MIC_VIRTIO_PARAM_DEV_REMOVE;
         mdev->ops->send_intr(mdev, db);
-        for (i = retry; i--;) {
+        for (retry = 100; retry--;) {
                 ret = wait_event_timeout(wake,
                         mvdev->dc->guest_ack, msecs_to_jiffies(100));
                 if (ret)
                         break;
         }
         dev_dbg(mdev->sdev->parent,
-                "Device id %d config_change %d guest_ack %d\n",
+                "Device id %d config_change %d guest_ack %d retry %d\n",
                 mvdev->virtio_id, mvdev->dc->config_change,
-                mvdev->dc->guest_ack);
+                mvdev->dc->guest_ack, retry);
         mvdev->dc->config_change = 0;
         mvdev->dc->guest_ack = 0;
 skip_hot_remove:
diff --git a/drivers/misc/mic/host/mic_x100.c b/drivers/misc/mic/host/mic_x100.c
index 81e9541b784c..0dfa8a81436e 100644
--- a/drivers/misc/mic/host/mic_x100.c
+++ b/drivers/misc/mic/host/mic_x100.c
@@ -397,8 +397,8 @@ mic_x100_load_ramdisk(struct mic_device *mdev)
          * so copy over the ramdisk @ 128M.
          */
         memcpy_toio(mdev->aper.va + (mdev->bootaddr << 1), fw->data, fw->size);
-        iowrite32(cpu_to_le32(mdev->bootaddr << 1), &bp->hdr.ramdisk_image);
-        iowrite32(cpu_to_le32(fw->size), &bp->hdr.ramdisk_size);
+        iowrite32(mdev->bootaddr << 1, &bp->hdr.ramdisk_image);
+        iowrite32(fw->size, &bp->hdr.ramdisk_size);
         release_firmware(fw);
 error:
         return rc;
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 4cabdc9fda90..4b3aaa898a8b 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -962,7 +962,7 @@ static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
 static void pxa3xx_nand_free_buff(struct pxa3xx_nand_info *info)
 {
         struct platform_device *pdev = info->pdev;
-        if (use_dma) {
+        if (info->use_dma) {
                 pxa_free_dma(info->data_dma_ch);
                 dma_free_coherent(&pdev->dev, info->buf_size,
                                   info->data_buff, info->data_buff_phys);
@@ -1259,10 +1259,6 @@ static struct of_device_id pxa3xx_nand_dt_ids[] = {
                 .compatible = "marvell,pxa3xx-nand",
                 .data       = (void *)PXA3XX_NAND_VARIANT_PXA,
         },
-        {
-                .compatible = "marvell,armada370-nand",
-                .data       = (void *)PXA3XX_NAND_VARIANT_ARMADA370,
-        },
         {}
 };
 MODULE_DEVICE_TABLE(of, pxa3xx_nand_dt_ids);
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 36eab0c4fb33..398e299ee1bd 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -4199,9 +4199,9 @@ static int bond_check_params(struct bond_params *params)
              (arp_ip_count < BOND_MAX_ARP_TARGETS) && arp_ip_target[i]; i++) {
                 /* not complete check, but should be good enough to
                    catch mistakes */
-                __be32 ip = in_aton(arp_ip_target[i]);
-                if (!isdigit(arp_ip_target[i][0]) || ip == 0 ||
-                    ip == htonl(INADDR_BROADCAST)) {
+                __be32 ip;
+                if (!in4_pton(arp_ip_target[i], -1, (u8 *)&ip, -1, NULL) ||
+                    IS_IP_TARGET_UNUSABLE_ADDRESS(ip)) {
                         pr_warning("Warning: bad arp_ip_target module parameter (%s), ARP monitoring will not be performed\n",
                                    arp_ip_target[i]);
                         arp_interval = 0;
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index abf5e106edc5..0ae580bbc5db 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -1635,12 +1635,12 @@ static ssize_t bonding_show_packets_per_slave(struct device *d,
                                               char *buf)
 {
         struct bonding *bond = to_bond(d);
-        int packets_per_slave = bond->params.packets_per_slave;
+        unsigned int packets_per_slave = bond->params.packets_per_slave;
 
         if (packets_per_slave > 1)
                 packets_per_slave = reciprocal_value(packets_per_slave);
 
-        return sprintf(buf, "%d\n", packets_per_slave);
+        return sprintf(buf, "%u\n", packets_per_slave);
 }
 
 static ssize_t bonding_store_packets_per_slave(struct device *d,
diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c
index 50b853a79d77..46dfb1378c17 100644
--- a/drivers/net/ethernet/allwinner/sun4i-emac.c
+++ b/drivers/net/ethernet/allwinner/sun4i-emac.c
@@ -717,8 +717,7 @@ static int emac_open(struct net_device *dev)
         if (netif_msg_ifup(db))
                 dev_dbg(db->dev, "enabling %s\n", dev->name);
 
-        if (devm_request_irq(db->dev, dev->irq, &emac_interrupt,
-                             0, dev->name, dev))
+        if (request_irq(dev->irq, &emac_interrupt, 0, dev->name, dev))
                 return -EAGAIN;
 
         /* Initialize EMAC board */
@@ -774,6 +773,8 @@ static int emac_stop(struct net_device *ndev)
 
         emac_shutdown(ndev);
 
+        free_irq(ndev->irq, ndev);
+
         return 0;
 }
 
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c
index 0216d592d0ce..2e46c28fc601 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c
@@ -3114,6 +3114,11 @@ int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
 {
         struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
 
+        if (!IS_SRIOV(bp)) {
+                BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
+                return -EINVAL;
+        }
+
         DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
            num_vfs_param, BNX2X_NR_VIRTFN(bp));
 
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 369b736dde05..f3dd93b4aeaa 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -8932,6 +8932,9 @@ static int tg3_chip_reset(struct tg3 *tp)
         void (*write_op)(struct tg3 *, u32, u32);
         int i, err;
 
+        if (!pci_device_is_present(tp->pdev))
+                return -ENODEV;
+
         tg3_nvram_lock(tp);
 
         tg3_ape_lock(tp, TG3_APE_LOCK_GRC);
@@ -11581,10 +11584,11 @@ static int tg3_close(struct net_device *dev)
         memset(&tp->net_stats_prev, 0, sizeof(tp->net_stats_prev));
         memset(&tp->estats_prev, 0, sizeof(tp->estats_prev));
 
-        tg3_power_down_prepare(tp);
-
-        tg3_carrier_off(tp);
+        if (pci_device_is_present(tp->pdev)) {
+                tg3_power_down_prepare(tp);
 
+                tg3_carrier_off(tp);
+        }
         return 0;
 }
 
@@ -16499,6 +16503,9 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
         /* Clear this out for sanity. */
         tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
 
+        /* Clear TG3PCI_REG_BASE_ADDR to prevent hangs. */
+        tw32(TG3PCI_REG_BASE_ADDR, 0);
+
         pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
                               &pci_state_reg);
         if ((pci_state_reg & PCISTATE_CONV_PCI_MODE) == 0 &&
@@ -17726,10 +17733,12 @@ static int tg3_suspend(struct device *device)
         struct pci_dev *pdev = to_pci_dev(device);
         struct net_device *dev = pci_get_drvdata(pdev);
         struct tg3 *tp = netdev_priv(dev);
-        int err;
+        int err = 0;
+
+        rtnl_lock();
 
         if (!netif_running(dev))
-                return 0;
+                goto unlock;
 
         tg3_reset_task_cancel(tp);
         tg3_phy_stop(tp);
@@ -17771,6 +17780,8 @@ out:
                         tg3_phy_start(tp);
         }
 
+unlock:
+        rtnl_unlock();
         return err;
 }
 
@@ -17779,10 +17790,12 @@ static int tg3_resume(struct device *device)
         struct pci_dev *pdev = to_pci_dev(device);
         struct net_device *dev = pci_get_drvdata(pdev);
         struct tg3 *tp = netdev_priv(dev);
-        int err;
+        int err = 0;
+
+        rtnl_lock();
 
         if (!netif_running(dev))
-                return 0;
+                goto unlock;
 
         netif_device_attach(dev);
 
@@ -17806,6 +17819,8 @@ out:
         if (!err)
                 tg3_phy_start(tp);
 
+unlock:
+        rtnl_unlock();
         return err;
 }
 #endif /* CONFIG_PM_SLEEP */
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
index ecd2fb3ef695..6c9308850453 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
@@ -49,13 +49,15 @@
 #include <asm/io.h>
 #include "cxgb4_uld.h"
 
-#define FW_VERSION_MAJOR 1
-#define FW_VERSION_MINOR 4
-#define FW_VERSION_MICRO 0
+#define T4FW_VERSION_MAJOR 0x01
+#define T4FW_VERSION_MINOR 0x06
+#define T4FW_VERSION_MICRO 0x18
+#define T4FW_VERSION_BUILD 0x00
 
-#define FW_VERSION_MAJOR_T5 0
-#define FW_VERSION_MINOR_T5 0
-#define FW_VERSION_MICRO_T5 0
+#define T5FW_VERSION_MAJOR 0x01
+#define T5FW_VERSION_MINOR 0x08
+#define T5FW_VERSION_MICRO 0x1C
+#define T5FW_VERSION_BUILD 0x00
 
 #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
 
@@ -240,6 +242,26 @@ struct pci_params {
         unsigned char width;
 };
 
+#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
+#define CHELSIO_CHIP_FPGA          0x100
+#define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
+#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
+
+#define CHELSIO_T4              0x4
+#define CHELSIO_T5              0x5
+
+enum chip_type {
+        T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
+        T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
+        T4_FIRST_REV    = T4_A1,
+        T4_LAST_REV     = T4_A2,
+
+        T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
+        T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
+        T5_FIRST_REV    = T5_A0,
+        T5_LAST_REV     = T5_A1,
+};
+
 struct adapter_params {
         struct tp_params  tp;
         struct vpd_params vpd;
@@ -259,7 +281,7 @@ struct adapter_params {
 
         unsigned char nports;             /* # of ethernet ports */
         unsigned char portvec;
-        unsigned char rev;                /* chip revision */
+        enum chip_type chip;               /* chip code */
         unsigned char offload;
 
         unsigned char bypass;
@@ -267,6 +289,23 @@ struct adapter_params {
         unsigned int ofldq_wr_cred;
 };
 
+#include "t4fw_api.h"
+
+#define FW_VERSION(chip) ( \
+                FW_HDR_FW_VER_MAJOR_GET(chip##FW_VERSION_MAJOR) | \
+                FW_HDR_FW_VER_MINOR_GET(chip##FW_VERSION_MINOR) | \
+                FW_HDR_FW_VER_MICRO_GET(chip##FW_VERSION_MICRO) | \
+                FW_HDR_FW_VER_BUILD_GET(chip##FW_VERSION_BUILD))
+#define FW_INTFVER(chip, intf) (FW_HDR_INTFVER_##intf)
+
+struct fw_info {
+        u8 chip;
+        char *fs_name;
+        char *fw_mod_name;
+        struct fw_hdr fw_hdr;
+};
+
+
 struct trace_params {
         u32 data[TRACE_LEN / 4];
         u32 mask[TRACE_LEN / 4];
@@ -512,25 +551,6 @@ struct sge {
 
 struct l2t_data;
 
-#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
-#define CHELSIO_CHIP_VERSION(code) ((code) >> 4)
-#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
-
-#define CHELSIO_T4              0x4
-#define CHELSIO_T5              0x5
-
-enum chip_type {
-        T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 0),
-        T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
-        T4_A3 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
-        T4_FIRST_REV    = T4_A1,
-        T4_LAST_REV     = T4_A3,
-
-        T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
-        T5_FIRST_REV    = T5_A1,
-        T5_LAST_REV     = T5_A1,
-};
-
 #ifdef CONFIG_PCI_IOV
 
 /* T4 supports SRIOV on PF0-3 and T5 on PF0-7.  However, the Serial
@@ -715,12 +735,12 @@ enum {
 
 static inline int is_t5(enum chip_type chip)
 {
-        return (chip >= T5_FIRST_REV && chip <= T5_LAST_REV);
+        return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5;
 }
 
 static inline int is_t4(enum chip_type chip)
 {
-        return (chip >= T4_FIRST_REV && chip <= T4_LAST_REV);
+        return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4;
 }
 
 static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr)
@@ -900,7 +920,11 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p);
 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
 unsigned int t4_flash_cfg_addr(struct adapter *adapter);
 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
-int t4_check_fw_version(struct adapter *adapter);
+int t4_get_fw_version(struct adapter *adapter, u32 *vers);
+int t4_get_tp_version(struct adapter *adapter, u32 *vers);
+int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info,
+               const u8 *fw_data, unsigned int fw_size,
+               struct fw_hdr *card_fw, enum dev_state state, int *reset);
 int t4_prep_adapter(struct adapter *adapter);
 int t4_port_init(struct adapter *adap, int mbox, int pf, int vf);
 void t4_fatal_err(struct adapter *adapter);
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 8b929eeecd2d..d6b12e035a7d 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -276,9 +276,9 @@ static DEFINE_PCI_DEVICE_TABLE(cxgb4_pci_tbl) = {
         { 0, }
 };
 
-#define FW_FNAME "cxgb4/t4fw.bin"
+#define FW4_FNAME "cxgb4/t4fw.bin"
 #define FW5_FNAME "cxgb4/t5fw.bin"
-#define FW_CFNAME "cxgb4/t4-config.txt"
+#define FW4_CFNAME "cxgb4/t4-config.txt"
 #define FW5_CFNAME "cxgb4/t5-config.txt"
 
 MODULE_DESCRIPTION(DRV_DESC);
@@ -286,7 +286,7 @@ MODULE_AUTHOR("Chelsio Communications");
 MODULE_LICENSE("Dual BSD/GPL");
 MODULE_VERSION(DRV_VERSION);
 MODULE_DEVICE_TABLE(pci, cxgb4_pci_tbl);
-MODULE_FIRMWARE(FW_FNAME);
+MODULE_FIRMWARE(FW4_FNAME);
 MODULE_FIRMWARE(FW5_FNAME);
 
 /*
@@ -1071,72 +1071,6 @@ freeout:	t4_free_sge_resources(adap);
 }
 
 /*
- * Returns 0 if new FW was successfully loaded, a positive errno if a load was
- * started but failed, and a negative errno if flash load couldn't start.
- */
-static int upgrade_fw(struct adapter *adap)
-{
-        int ret;
-        u32 vers, exp_major;
-        const struct fw_hdr *hdr;
-        const struct firmware *fw;
-        struct device *dev = adap->pdev_dev;
-        char *fw_file_name;
-
-        switch (CHELSIO_CHIP_VERSION(adap->chip)) {
-        case CHELSIO_T4:
-                fw_file_name = FW_FNAME;
-                exp_major = FW_VERSION_MAJOR;
-                break;
-        case CHELSIO_T5:
-                fw_file_name = FW5_FNAME;
-                exp_major = FW_VERSION_MAJOR_T5;
-                break;
-        default:
-                dev_err(dev, "Unsupported chip type, %x\n", adap->chip);
-                return -EINVAL;
-        }
-
-        ret = request_firmware(&fw, fw_file_name, dev);
-        if (ret < 0) {
-                dev_err(dev, "unable to load firmware image %s, error %d\n",
-                        fw_file_name, ret);
-                return ret;
-        }
-
-        hdr = (const struct fw_hdr *)fw->data;
-        vers = ntohl(hdr->fw_ver);
-        if (FW_HDR_FW_VER_MAJOR_GET(vers) != exp_major) {
-                ret = -EINVAL;              /* wrong major version, won't do */
-                goto out;
-        }
-
-        /*
-         * If the flash FW is unusable or we found something newer, load it.
-         */
-        if (FW_HDR_FW_VER_MAJOR_GET(adap->params.fw_vers) != exp_major ||
-            vers > adap->params.fw_vers) {
-                dev_info(dev, "upgrading firmware ...\n");
-                ret = t4_fw_upgrade(adap, adap->mbox, fw->data, fw->size,
-                                    /*force=*/false);
-                if (!ret)
-                        dev_info(dev,
-                                 "firmware upgraded to version %pI4 from %s\n",
-                                 &hdr->fw_ver, fw_file_name);
-                else
-                        dev_err(dev, "firmware upgrade failed! err=%d\n", -ret);
-        } else {
-                /*
-                 * Tell our caller that we didn't upgrade the firmware.
-                 */
-                ret = -EINVAL;
-        }
-
-out:    release_firmware(fw);
-        return ret;
-}
-
-/*
  * Allocate a chunk of memory using kmalloc or, if that fails, vmalloc.
  * The allocated memory is cleared.
  */
@@ -1415,7 +1349,7 @@ static int get_sset_count(struct net_device *dev, int sset)
 static int get_regs_len(struct net_device *dev)
 {
         struct adapter *adap = netdev2adap(dev);
-        if (is_t4(adap->chip))
+        if (is_t4(adap->params.chip))
                 return T4_REGMAP_SIZE;
         else
                 return T5_REGMAP_SIZE;
@@ -1499,7 +1433,7 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
         data += sizeof(struct port_stats) / sizeof(u64);
         collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
         data += sizeof(struct queue_port_stats) / sizeof(u64);
-        if (!is_t4(adapter->chip)) {
+        if (!is_t4(adapter->params.chip)) {
                 t4_write_reg(adapter, SGE_STAT_CFG, STATSOURCE_T5(7));
                 val1 = t4_read_reg(adapter, SGE_STAT_TOTAL);
                 val2 = t4_read_reg(adapter, SGE_STAT_MATCH);
@@ -1521,8 +1455,8 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
  */
 static inline unsigned int mk_adap_vers(const struct adapter *ap)
 {
-        return CHELSIO_CHIP_VERSION(ap->chip) |
-                (CHELSIO_CHIP_RELEASE(ap->chip) << 10) | (1 << 16);
+        return CHELSIO_CHIP_VERSION(ap->params.chip) |
+                (CHELSIO_CHIP_RELEASE(ap->params.chip) << 10) | (1 << 16);
 }
 
 static void reg_block_dump(struct adapter *ap, void *buf, unsigned int start,
@@ -2189,7 +2123,7 @@ static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
         static const unsigned int *reg_ranges;
         int arr_size = 0, buf_size = 0;
 
-        if (is_t4(ap->chip)) {
+        if (is_t4(ap->params.chip)) {
                 reg_ranges = &t4_reg_ranges[0];
                 arr_size = ARRAY_SIZE(t4_reg_ranges);
                 buf_size = T4_REGMAP_SIZE;
@@ -2967,7 +2901,7 @@ static int setup_debugfs(struct adapter *adap)
                 size = t4_read_reg(adap, MA_EDRAM1_BAR);
                 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM_SIZE_GET(size));
         }
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR);
                 if (i & EXT_MEM_ENABLE)
                         add_debugfs_mem(adap, "mc", MEM_MC,
@@ -3419,7 +3353,7 @@ unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo)
 
         v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);
         v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2);
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 lp_count = G_LP_COUNT(v1);
                 hp_count = G_HP_COUNT(v1);
         } else {
@@ -3588,7 +3522,7 @@ static void drain_db_fifo(struct adapter *adap, int usecs)
         do {
                 v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);
                 v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2);
-                if (is_t4(adap->chip)) {
+                if (is_t4(adap->params.chip)) {
                         lp_count = G_LP_COUNT(v1);
                         hp_count = G_HP_COUNT(v1);
                 } else {
@@ -3708,7 +3642,7 @@ static void process_db_drop(struct work_struct *work)
 
         adap = container_of(work, struct adapter, db_drop_task);
 
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 disable_dbs(adap);
                 notify_rdma_uld(adap, CXGB4_CONTROL_DB_DROP);
                 drain_db_fifo(adap, 1);
@@ -3753,7 +3687,7 @@ static void process_db_drop(struct work_struct *work)
 
 void t4_db_full(struct adapter *adap)
 {
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 t4_set_reg_field(adap, SGE_INT_ENABLE3,
                                  DBFIFO_HP_INT | DBFIFO_LP_INT, 0);
                 queue_work(workq, &adap->db_full_task);
@@ -3762,7 +3696,7 @@ void t4_db_full(struct adapter *adap)
 
 void t4_db_dropped(struct adapter *adap)
 {
-        if (is_t4(adap->chip))
+        if (is_t4(adap->params.chip))
                 queue_work(workq, &adap->db_drop_task);
 }
 
@@ -3789,7 +3723,7 @@ static void uld_attach(struct adapter *adap, unsigned int uld)
         lli.nchan = adap->params.nports;
         lli.nports = adap->params.nports;
         lli.wr_cred = adap->params.ofldq_wr_cred;
-        lli.adapter_type = adap->params.rev;
+        lli.adapter_type = adap->params.chip;
         lli.iscsi_iolen = MAXRXDATA_GET(t4_read_reg(adap, TP_PARA_REG2));
         lli.udb_density = 1 << QUEUESPERPAGEPF0_GET(
                         t4_read_reg(adap, SGE_EGRESS_QUEUES_PER_PAGE_PF) >>
@@ -4483,7 +4417,7 @@ static void setup_memwin(struct adapter *adap)
         u32 bar0, mem_win0_base, mem_win1_base, mem_win2_base;
 
         bar0 = pci_resource_start(adap->pdev, 0);  /* truncation intentional */
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 mem_win0_base = bar0 + MEMWIN0_BASE;
                 mem_win1_base = bar0 + MEMWIN1_BASE;
                 mem_win2_base = bar0 + MEMWIN2_BASE;
@@ -4668,8 +4602,10 @@ static int adap_init0_config(struct adapter *adapter, int reset)
         const struct firmware *cf;
         unsigned long mtype = 0, maddr = 0;
         u32 finiver, finicsum, cfcsum;
-        int ret, using_flash;
+        int ret;
+        int config_issued = 0;
         char *fw_config_file, fw_config_file_path[256];
+        char *config_name = NULL;
 
         /*
          * Reset device if necessary.
@@ -4686,9 +4622,9 @@ static int adap_init0_config(struct adapter *adapter, int reset)
          * then use that.  Otherwise, use the configuration file stored
          * in the adapter flash ...
          */
-        switch (CHELSIO_CHIP_VERSION(adapter->chip)) {
+        switch (CHELSIO_CHIP_VERSION(adapter->params.chip)) {
         case CHELSIO_T4:
-                fw_config_file = FW_CFNAME;
+                fw_config_file = FW4_CFNAME;
                 break;
         case CHELSIO_T5:
                 fw_config_file = FW5_CFNAME;
@@ -4702,13 +4638,16 @@ static int adap_init0_config(struct adapter *adapter, int reset)
 
         ret = request_firmware(&cf, fw_config_file, adapter->pdev_dev);
         if (ret < 0) {
-                using_flash = 1;
+                config_name = "On FLASH";
                 mtype = FW_MEMTYPE_CF_FLASH;
                 maddr = t4_flash_cfg_addr(adapter);
         } else {
                 u32 params[7], val[7];
 
-                using_flash = 0;
+                sprintf(fw_config_file_path,
+                        "/lib/firmware/%s", fw_config_file);
+                config_name = fw_config_file_path;
+
                 if (cf->size >= FLASH_CFG_MAX_SIZE)
                         ret = -ENOMEM;
                 else {
@@ -4776,6 +4715,26 @@ static int adap_init0_config(struct adapter *adapter, int reset)
                       FW_LEN16(caps_cmd));
         ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd),
                          &caps_cmd);
+
+        /* If the CAPS_CONFIG failed with an ENOENT (for a Firmware
+         * Configuration File in FLASH), our last gasp effort is to use the
+         * Firmware Configuration File which is embedded in the firmware.  A
+         * very few early versions of the firmware didn't have one embedded
+         * but we can ignore those.
+         */
+        if (ret == -ENOENT) {
+                memset(&caps_cmd, 0, sizeof(caps_cmd));
+                caps_cmd.op_to_write =
+                        htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) |
+                                        FW_CMD_REQUEST |
+                                        FW_CMD_READ);
+                caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd));
+                ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd,
+                                sizeof(caps_cmd), &caps_cmd);
+                config_name = "Firmware Default";
+        }
+
+        config_issued = 1;
         if (ret < 0)
                 goto bye;
 
@@ -4816,7 +4775,6 @@ static int adap_init0_config(struct adapter *adapter, int reset)
         if (ret < 0)
                 goto bye;
 
-        sprintf(fw_config_file_path, "/lib/firmware/%s", fw_config_file);
         /*
          * Return successfully and note that we're operating with parameters
          * not supplied by the driver, rather than from hard-wired
@@ -4824,11 +4782,8 @@ static int adap_init0_config(struct adapter *adapter, int reset)
          */
         adapter->flags |= USING_SOFT_PARAMS;
         dev_info(adapter->pdev_dev, "Successfully configured using Firmware "\
-                 "Configuration File %s, version %#x, computed checksum %#x\n",
-                 (using_flash
-                  ? "in device FLASH"
-                  : fw_config_file_path),
-                 finiver, cfcsum);
+                 "Configuration File \"%s\", version %#x, computed checksum %#x\n",
+                 config_name, finiver, cfcsum);
         return 0;
 
         /*
@@ -4837,9 +4792,9 @@ static int adap_init0_config(struct adapter *adapter, int reset)
          * want to issue a warning since this is fairly common.)
          */
 bye:
-        if (ret != -ENOENT)
-                dev_warn(adapter->pdev_dev, "Configuration file error %d\n",
-                         -ret);
+        if (config_issued && ret != -ENOENT)
+                dev_warn(adapter->pdev_dev, "\"%s\" configuration file error %d\n",
+                         config_name, -ret);
         return ret;
 }
 
@@ -5086,6 +5041,47 @@ bye:
         return ret;
 }
 
+static struct fw_info fw_info_array[] = {
+        {
+                .chip = CHELSIO_T4,
+                .fs_name = FW4_CFNAME,
+                .fw_mod_name = FW4_FNAME,
+                .fw_hdr = {
+                        .chip = FW_HDR_CHIP_T4,
+                        .fw_ver = __cpu_to_be32(FW_VERSION(T4)),
+                        .intfver_nic = FW_INTFVER(T4, NIC),
+                        .intfver_vnic = FW_INTFVER(T4, VNIC),
+                        .intfver_ri = FW_INTFVER(T4, RI),
+                        .intfver_iscsi = FW_INTFVER(T4, ISCSI),
+                        .intfver_fcoe = FW_INTFVER(T4, FCOE),
+                },
+        }, {
+                .chip = CHELSIO_T5,
+                .fs_name = FW5_CFNAME,
+                .fw_mod_name = FW5_FNAME,
+                .fw_hdr = {
+                        .chip = FW_HDR_CHIP_T5,
+                        .fw_ver = __cpu_to_be32(FW_VERSION(T5)),
+                        .intfver_nic = FW_INTFVER(T5, NIC),
+                        .intfver_vnic = FW_INTFVER(T5, VNIC),
+                        .intfver_ri = FW_INTFVER(T5, RI),
+                        .intfver_iscsi = FW_INTFVER(T5, ISCSI),
+                        .intfver_fcoe = FW_INTFVER(T5, FCOE),
+                },
+        }
+};
+
+static struct fw_info *find_fw_info(int chip)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(fw_info_array); i++) {
+                if (fw_info_array[i].chip == chip)
+                        return &fw_info_array[i];
+        }
+        return NULL;
+}
+
 /*
  * Phase 0 of initialization: contact FW, obtain config, perform basic init.
  */
@@ -5123,44 +5119,54 @@ static int adap_init0(struct adapter *adap)
          * later reporting and B. to warn if the currently loaded firmware
          * is excessively mismatched relative to the driver.)
          */
-        ret = t4_check_fw_version(adap);
-
-        /* The error code -EFAULT is returned by t4_check_fw_version() if
-         * firmware on adapter < supported firmware. If firmware on adapter
-         * is too old (not supported by driver) and we're the MASTER_PF set
-         * adapter state to DEV_STATE_UNINIT to force firmware upgrade
-         * and reinitialization.
-         */
-        if ((adap->flags & MASTER_PF) && ret == -EFAULT)
-                state = DEV_STATE_UNINIT;
+        t4_get_fw_version(adap, &adap->params.fw_vers);
+        t4_get_tp_version(adap, &adap->params.tp_vers);
         if ((adap->flags & MASTER_PF) && state != DEV_STATE_INIT) {
-                if (ret == -EINVAL || ret == -EFAULT || ret > 0) {
-                        if (upgrade_fw(adap) >= 0) {
-                                /*
-                                 * Note that the chip was reset as part of the
-                                 * firmware upgrade so we don't reset it again
-                                 * below and grab the new firmware version.
-                                 */
-                                reset = 0;
-                                ret = t4_check_fw_version(adap);
-                        } else
-                                if (ret == -EFAULT) {
-                                        /*
-                                         * Firmware is old but still might
-                                         * work if we force reinitialization
-                                         * of the adapter. Ignoring FW upgrade
-                                         * failure.
-                                         */
-                                        dev_warn(adap->pdev_dev,
-                                                 "Ignoring firmware upgrade "
-                                                 "failure, and forcing driver "
-                                                 "to reinitialize the "
-                                                 "adapter.\n");
-                                        ret = 0;
-                                }
+                struct fw_info *fw_info;
+                struct fw_hdr *card_fw;
+                const struct firmware *fw;
+                const u8 *fw_data = NULL;
+                unsigned int fw_size = 0;
+
+                /* This is the firmware whose headers the driver was compiled
+                 * against
+                 */
+                fw_info = find_fw_info(CHELSIO_CHIP_VERSION(adap->params.chip));
+                if (fw_info == NULL) {
+                        dev_err(adap->pdev_dev,
+                                "unable to get firmware info for chip %d.\n",
+                                CHELSIO_CHIP_VERSION(adap->params.chip));
+                        return -EINVAL;
                 }
+
+                /* allocate memory to read the header of the firmware on the
+                 * card
+                 */
+                card_fw = t4_alloc_mem(sizeof(*card_fw));
+
+                /* Get FW from from /lib/firmware/ */
+                ret = request_firmware(&fw, fw_info->fw_mod_name,
+                                       adap->pdev_dev);
+                if (ret < 0) {
+                        dev_err(adap->pdev_dev,
+                                "unable to load firmware image %s, error %d\n",
+                                fw_info->fw_mod_name, ret);
+                } else {
+                        fw_data = fw->data;
+                        fw_size = fw->size;
+                }
+
+                /* upgrade FW logic */
+                ret = t4_prep_fw(adap, fw_info, fw_data, fw_size, card_fw,
+                                 state, &reset);
+
+                /* Cleaning up */
+                if (fw != NULL)
+                        release_firmware(fw);
+                t4_free_mem(card_fw);
+
                 if (ret < 0)
-                        return ret;
+                        goto bye;
         }
 
         /*
@@ -5245,7 +5251,7 @@ static int adap_init0(struct adapter *adap)
                                 if (ret == -ENOENT) {
                                         dev_info(adap->pdev_dev,
                                             "No Configuration File present "
-                                            "on adapter.  Using hard-wired "
+                                            "on adapter. Using hard-wired "
                                             "configuration parameters.\n");
                                         ret = adap_init0_no_config(adap, reset);
                                 }
@@ -5787,7 +5793,7 @@ static void print_port_info(const struct net_device *dev)
 
         netdev_info(dev, "Chelsio %s rev %d %s %sNIC PCIe x%d%s%s\n",
                     adap->params.vpd.id,
-                    CHELSIO_CHIP_RELEASE(adap->params.rev), buf,
+                    CHELSIO_CHIP_RELEASE(adap->params.chip), buf,
                     is_offload(adap) ? "R" : "", adap->params.pci.width, spd,
                     (adap->flags & USING_MSIX) ? " MSI-X" :
                     (adap->flags & USING_MSI) ? " MSI" : "");
@@ -5910,7 +5916,7 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
         if (err)
                 goto out_unmap_bar0;
 
-        if (!is_t4(adapter->chip)) {
+        if (!is_t4(adapter->params.chip)) {
                 s_qpp = QUEUESPERPAGEPF1 * adapter->fn;
                 qpp = 1 << QUEUESPERPAGEPF0_GET(t4_read_reg(adapter,
                       SGE_EGRESS_QUEUES_PER_PAGE_PF) >> s_qpp);
@@ -6064,7 +6070,7 @@ sriov:
  out_free_dev:
         free_some_resources(adapter);
  out_unmap_bar:
-        if (!is_t4(adapter->chip))
+        if (!is_t4(adapter->params.chip))
                 iounmap(adapter->bar2);
  out_unmap_bar0:
         iounmap(adapter->regs);
@@ -6116,7 +6122,7 @@ static void remove_one(struct pci_dev *pdev)
 
                 free_some_resources(adapter);
                 iounmap(adapter->regs);
-                if (!is_t4(adapter->chip))
+                if (!is_t4(adapter->params.chip))
                         iounmap(adapter->bar2);
                 kfree(adapter);
                 pci_disable_pcie_error_reporting(pdev);
diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c
index ac311f5f3eb9..cc380c36e1a8 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/sge.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c
@@ -509,7 +509,7 @@ static inline void ring_fl_db(struct adapter *adap, struct sge_fl *q)
         u32 val;
         if (q->pend_cred >= 8) {
                 val = PIDX(q->pend_cred / 8);
-                if (!is_t4(adap->chip))
+                if (!is_t4(adap->params.chip))
                         val |= DBTYPE(1);
                 wmb();
                 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), DBPRIO(1) |
@@ -847,7 +847,7 @@ static inline void ring_tx_db(struct adapter *adap, struct sge_txq *q, int n)
         wmb();            /* write descriptors before telling HW */
         spin_lock(&q->db_lock);
         if (!q->db_disabled) {
-                if (is_t4(adap->chip)) {
+                if (is_t4(adap->params.chip)) {
                         t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL),
                                      QID(q->cntxt_id) | PIDX(n));
                 } else {
@@ -1596,7 +1596,7 @@ static noinline int handle_trace_pkt(struct adapter *adap,
                 return 0;
         }
 
-        if (is_t4(adap->chip))
+        if (is_t4(adap->params.chip))
                 __skb_pull(skb, sizeof(struct cpl_trace_pkt));
         else
                 __skb_pull(skb, sizeof(struct cpl_t5_trace_pkt));
@@ -1661,7 +1661,7 @@ int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
         const struct cpl_rx_pkt *pkt;
         struct sge_eth_rxq *rxq = container_of(q, struct sge_eth_rxq, rspq);
         struct sge *s = &q->adap->sge;
-        int cpl_trace_pkt = is_t4(q->adap->chip) ?
+        int cpl_trace_pkt = is_t4(q->adap->params.chip) ?
                             CPL_TRACE_PKT : CPL_TRACE_PKT_T5;
 
         if (unlikely(*(u8 *)rsp == cpl_trace_pkt))
@@ -2182,7 +2182,7 @@ err:
 static void init_txq(struct adapter *adap, struct sge_txq *q, unsigned int id)
 {
         q->cntxt_id = id;
-        if (!is_t4(adap->chip)) {
+        if (!is_t4(adap->params.chip)) {
                 unsigned int s_qpp;
                 unsigned short udb_density;
                 unsigned long qpshift;
@@ -2641,7 +2641,7 @@ static int t4_sge_init_hard(struct adapter *adap)
          * Set up to drop DOORBELL writes when the DOORBELL FIFO overflows
          * and generate an interrupt when this occurs so we can recover.
          */
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 t4_set_reg_field(adap, A_SGE_DBFIFO_STATUS,
                                  V_HP_INT_THRESH(M_HP_INT_THRESH) |
                                  V_LP_INT_THRESH(M_LP_INT_THRESH),
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 4cbb2f9850be..74a6fce5a15a 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -296,7 +296,7 @@ int t4_mc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
         u32 mc_bist_cmd, mc_bist_cmd_addr, mc_bist_cmd_len;
         u32 mc_bist_status_rdata, mc_bist_data_pattern;
 
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 mc_bist_cmd = MC_BIST_CMD;
                 mc_bist_cmd_addr = MC_BIST_CMD_ADDR;
                 mc_bist_cmd_len = MC_BIST_CMD_LEN;
@@ -349,7 +349,7 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
         u32 edc_bist_cmd, edc_bist_cmd_addr, edc_bist_cmd_len;
         u32 edc_bist_cmd_data_pattern, edc_bist_status_rdata;
 
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 edc_bist_cmd = EDC_REG(EDC_BIST_CMD, idx);
                 edc_bist_cmd_addr = EDC_REG(EDC_BIST_CMD_ADDR, idx);
                 edc_bist_cmd_len = EDC_REG(EDC_BIST_CMD_LEN, idx);
@@ -402,7 +402,7 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
 static int t4_mem_win_rw(struct adapter *adap, u32 addr, __be32 *data, int dir)
 {
         int i;
-        u32 win_pf = is_t4(adap->chip) ? 0 : V_PFNUM(adap->fn);
+        u32 win_pf = is_t4(adap->params.chip) ? 0 : V_PFNUM(adap->fn);
 
         /*
          * Setup offset into PCIE memory window.  Address must be a
@@ -863,104 +863,169 @@ unlock:
 }
 
 /**
- *      get_fw_version - read the firmware version
+ *      t4_get_fw_version - read the firmware version
  *      @adapter: the adapter
  *      @vers: where to place the version
  *
  *      Reads the FW version from flash.
  */
-static int get_fw_version(struct adapter *adapter, u32 *vers)
+int t4_get_fw_version(struct adapter *adapter, u32 *vers)
 {
-        return t4_read_flash(adapter, adapter->params.sf_fw_start +
-                             offsetof(struct fw_hdr, fw_ver), 1, vers, 0);
+        return t4_read_flash(adapter, FLASH_FW_START +
+                             offsetof(struct fw_hdr, fw_ver), 1,
+                             vers, 0);
 }
 
 /**
- *      get_tp_version - read the TP microcode version
+ *      t4_get_tp_version - read the TP microcode version
  *      @adapter: the adapter
  *      @vers: where to place the version
  *
  *      Reads the TP microcode version from flash.
  */
-static int get_tp_version(struct adapter *adapter, u32 *vers)
+int t4_get_tp_version(struct adapter *adapter, u32 *vers)
 {
-        return t4_read_flash(adapter, adapter->params.sf_fw_start +
+        return t4_read_flash(adapter, FLASH_FW_START +
                              offsetof(struct fw_hdr, tp_microcode_ver),
                              1, vers, 0);
 }
 
-/**
- *      t4_check_fw_version - check if the FW is compatible with this driver
- *      @adapter: the adapter
- *
- *      Checks if an adapter's FW is compatible with the driver.  Returns 0
- *      if there's exact match, a negative error if the version could not be
- *      read or there's a major version mismatch, and a positive value if the
- *      expected major version is found but there's a minor version mismatch.
+/* Is the given firmware API compatible with the one the driver was compiled
+ * with?
  */
-int t4_check_fw_version(struct adapter *adapter)
+static int fw_compatible(const struct fw_hdr *hdr1, const struct fw_hdr *hdr2)
 {
-        u32 api_vers[2];
-        int ret, major, minor, micro;
-        int exp_major, exp_minor, exp_micro;
 
-        ret = get_fw_version(adapter, &adapter->params.fw_vers);
-        if (!ret)
-                ret = get_tp_version(adapter, &adapter->params.tp_vers);
-        if (!ret)
-                ret = t4_read_flash(adapter, adapter->params.sf_fw_start +
-                                    offsetof(struct fw_hdr, intfver_nic),
-                                    2, api_vers, 1);
-        if (ret)
-                return ret;
+        /* short circuit if it's the exact same firmware version */
+        if (hdr1->chip == hdr2->chip && hdr1->fw_ver == hdr2->fw_ver)
+                return 1;
 
-        major = FW_HDR_FW_VER_MAJOR_GET(adapter->params.fw_vers);
-        minor = FW_HDR_FW_VER_MINOR_GET(adapter->params.fw_vers);
-        micro = FW_HDR_FW_VER_MICRO_GET(adapter->params.fw_vers);
+#define SAME_INTF(x) (hdr1->intfver_##x == hdr2->intfver_##x)
+        if (hdr1->chip == hdr2->chip && SAME_INTF(nic) && SAME_INTF(vnic) &&
+            SAME_INTF(ri) && SAME_INTF(iscsi) && SAME_INTF(fcoe))
+                return 1;
+#undef SAME_INTF
 
-        switch (CHELSIO_CHIP_VERSION(adapter->chip)) {
-        case CHELSIO_T4:
-                exp_major = FW_VERSION_MAJOR;
-                exp_minor = FW_VERSION_MINOR;
-                exp_micro = FW_VERSION_MICRO;
-                break;
-        case CHELSIO_T5:
-                exp_major = FW_VERSION_MAJOR_T5;
-                exp_minor = FW_VERSION_MINOR_T5;
-                exp_micro = FW_VERSION_MICRO_T5;
-                break;
-        default:
-                dev_err(adapter->pdev_dev, "Unsupported chip type, %x\n",
-                        adapter->chip);
-                return -EINVAL;
-        }
+        return 0;
+}
 
-        memcpy(adapter->params.api_vers, api_vers,
-               sizeof(adapter->params.api_vers));
+/* The firmware in the filesystem is usable, but should it be installed?
+ * This routine explains itself in detail if it indicates the filesystem
+ * firmware should be installed.
+ */
+static int should_install_fs_fw(struct adapter *adap, int card_fw_usable,
+                                int k, int c)
+{
+        const char *reason;
 
-        if (major < exp_major || (major == exp_major && minor < exp_minor) ||
-            (major == exp_major && minor == exp_minor && micro < exp_micro)) {
-                dev_err(adapter->pdev_dev,
-                        "Card has firmware version %u.%u.%u, minimum "
-                        "supported firmware is %u.%u.%u.\n", major, minor,
-                        micro, exp_major, exp_minor, exp_micro);
-                return -EFAULT;
+        if (!card_fw_usable) {
+                reason = "incompatible or unusable";
+                goto install;
         }
 
-        if (major != exp_major) {            /* major mismatch - fail */
-                dev_err(adapter->pdev_dev,
-                        "card FW has major version %u, driver wants %u\n",
-                        major, exp_major);
-                return -EINVAL;
+        if (k > c) {
+                reason = "older than the version supported with this driver";
+                goto install;
         }
 
-        if (minor == exp_minor && micro == exp_micro)
-                return 0;                                   /* perfect match */
+        return 0;
+
+install:
+        dev_err(adap->pdev_dev, "firmware on card (%u.%u.%u.%u) is %s, "
+                "installing firmware %u.%u.%u.%u on card.\n",
+                FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c),
+                FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c), reason,
+                FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k),
+                FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k));
 
-        /* Minor/micro version mismatch.  Report it but often it's OK. */
         return 1;
 }
 
+int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info,
+               const u8 *fw_data, unsigned int fw_size,
+               struct fw_hdr *card_fw, enum dev_state state,
+               int *reset)
+{
+        int ret, card_fw_usable, fs_fw_usable;
+        const struct fw_hdr *fs_fw;
+        const struct fw_hdr *drv_fw;
+
+        drv_fw = &fw_info->fw_hdr;
+
+        /* Read the header of the firmware on the card */
+        ret = -t4_read_flash(adap, FLASH_FW_START,
+                            sizeof(*card_fw) / sizeof(uint32_t),
+                            (uint32_t *)card_fw, 1);
+        if (ret == 0) {
+                card_fw_usable = fw_compatible(drv_fw, (const void *)card_fw);
+        } else {
+                dev_err(adap->pdev_dev,
+                        "Unable to read card's firmware header: %d\n", ret);
+                card_fw_usable = 0;
+        }
+
+        if (fw_data != NULL) {
+                fs_fw = (const void *)fw_data;
+                fs_fw_usable = fw_compatible(drv_fw, fs_fw);
+        } else {
+                fs_fw = NULL;
+                fs_fw_usable = 0;
+        }
+
+        if (card_fw_usable && card_fw->fw_ver == drv_fw->fw_ver &&
+            (!fs_fw_usable || fs_fw->fw_ver == drv_fw->fw_ver)) {
+                /* Common case: the firmware on the card is an exact match and
+                 * the filesystem one is an exact match too, or the filesystem
+                 * one is absent/incompatible.
+                 */
+        } else if (fs_fw_usable && state == DEV_STATE_UNINIT &&
+                   should_install_fs_fw(adap, card_fw_usable,
+                                        be32_to_cpu(fs_fw->fw_ver),
+                                        be32_to_cpu(card_fw->fw_ver))) {
+                ret = -t4_fw_upgrade(adap, adap->mbox, fw_data,
+                                     fw_size, 0);
+                if (ret != 0) {
+                        dev_err(adap->pdev_dev,
+                                "failed to install firmware: %d\n", ret);
+                        goto bye;
+                }
+
+                /* Installed successfully, update the cached header too. */
+                memcpy(card_fw, fs_fw, sizeof(*card_fw));
+                card_fw_usable = 1;
+                *reset = 0;     /* already reset as part of load_fw */
+        }
+
+        if (!card_fw_usable) {
+                uint32_t d, c, k;
+
+                d = be32_to_cpu(drv_fw->fw_ver);
+                c = be32_to_cpu(card_fw->fw_ver);
+                k = fs_fw ? be32_to_cpu(fs_fw->fw_ver) : 0;
+
+                dev_err(adap->pdev_dev, "Cannot find a usable firmware: "
+                        "chip state %d, "
+                        "driver compiled with %d.%d.%d.%d, "
+                        "card has %d.%d.%d.%d, filesystem has %d.%d.%d.%d\n",
+                        state,
+                        FW_HDR_FW_VER_MAJOR_GET(d), FW_HDR_FW_VER_MINOR_GET(d),
+                        FW_HDR_FW_VER_MICRO_GET(d), FW_HDR_FW_VER_BUILD_GET(d),
+                        FW_HDR_FW_VER_MAJOR_GET(c), FW_HDR_FW_VER_MINOR_GET(c),
+                        FW_HDR_FW_VER_MICRO_GET(c), FW_HDR_FW_VER_BUILD_GET(c),
+                        FW_HDR_FW_VER_MAJOR_GET(k), FW_HDR_FW_VER_MINOR_GET(k),
+                        FW_HDR_FW_VER_MICRO_GET(k), FW_HDR_FW_VER_BUILD_GET(k));
+                ret = EINVAL;
+                goto bye;
+        }
+
+        /* We're using whatever's on the card and it's known to be good. */
+        adap->params.fw_vers = be32_to_cpu(card_fw->fw_ver);
+        adap->params.tp_vers = be32_to_cpu(card_fw->tp_microcode_ver);
+
+bye:
+        return ret;
+}
+
 /**
  *      t4_flash_erase_sectors - erase a range of flash sectors
  *      @adapter: the adapter
@@ -1368,7 +1433,7 @@ static void pcie_intr_handler(struct adapter *adapter)
                                     PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS,
                                     pcie_port_intr_info) +
               t4_handle_intr_status(adapter, PCIE_INT_CAUSE,
-                                    is_t4(adapter->chip) ?
+                                    is_t4(adapter->params.chip) ?
                                     pcie_intr_info : t5_pcie_intr_info);
 
         if (fat)
@@ -1782,7 +1847,7 @@ static void xgmac_intr_handler(struct adapter *adap, int port)
 {
         u32 v, int_cause_reg;
 
-        if (is_t4(adap->chip))
+        if (is_t4(adap->params.chip))
                 int_cause_reg = PORT_REG(port, XGMAC_PORT_INT_CAUSE);
         else
                 int_cause_reg = T5_PORT_REG(port, MAC_PORT_INT_CAUSE);
@@ -2250,7 +2315,7 @@ void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p)
 
 #define GET_STAT(name) \
         t4_read_reg64(adap, \
-        (is_t4(adap->chip) ? PORT_REG(idx, MPS_PORT_STAT_##name##_L) : \
+        (is_t4(adap->params.chip) ? PORT_REG(idx, MPS_PORT_STAT_##name##_L) : \
         T5_PORT_REG(idx, MPS_PORT_STAT_##name##_L)))
 #define GET_STAT_COM(name) t4_read_reg64(adap, MPS_STAT_##name##_L)
 
@@ -2332,7 +2397,7 @@ void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
 {
         u32 mag_id_reg_l, mag_id_reg_h, port_cfg_reg;
 
-        if (is_t4(adap->chip)) {
+        if (is_t4(adap->params.chip)) {
                 mag_id_reg_l = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_LO);
                 mag_id_reg_h = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_HI);
                 port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2);
@@ -2374,7 +2439,7 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
         int i;
         u32 port_cfg_reg;
 
-        if (is_t4(adap->chip))
+        if (is_t4(adap->params.chip))
                 port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2);
         else
                 port_cfg_reg = T5_PORT_REG(port, MAC_PORT_CFG2);
@@ -2387,7 +2452,7 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
                 return -EINVAL;
 
 #define EPIO_REG(name) \
-        (is_t4(adap->chip) ? PORT_REG(port, XGMAC_PORT_EPIO_##name) : \
+        (is_t4(adap->params.chip) ? PORT_REG(port, XGMAC_PORT_EPIO_##name) : \
         T5_PORT_REG(port, MAC_PORT_EPIO_##name))
 
         t4_write_reg(adap, EPIO_REG(DATA1), mask0 >> 32);
@@ -2474,7 +2539,7 @@ int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,
 int t4_mem_win_read_len(struct adapter *adap, u32 addr, __be32 *data, int len)
 {
         int i, off;
-        u32 win_pf = is_t4(adap->chip) ? 0 : V_PFNUM(adap->fn);
+        u32 win_pf = is_t4(adap->params.chip) ? 0 : V_PFNUM(adap->fn);
 
         /* Align on a 2KB boundary.
          */
@@ -3306,7 +3371,7 @@ int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
         int i, ret;
         struct fw_vi_mac_cmd c;
         struct fw_vi_mac_exact *p;
-        unsigned int max_naddr = is_t4(adap->chip) ?
+        unsigned int max_naddr = is_t4(adap->params.chip) ?
                                        NUM_MPS_CLS_SRAM_L_INSTANCES :
                                        NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
 
@@ -3368,7 +3433,7 @@ int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
         int ret, mode;
         struct fw_vi_mac_cmd c;
         struct fw_vi_mac_exact *p = c.u.exact;
-        unsigned int max_mac_addr = is_t4(adap->chip) ?
+        unsigned int max_mac_addr = is_t4(adap->params.chip) ?
                                     NUM_MPS_CLS_SRAM_L_INSTANCES :
                                     NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
 
@@ -3699,13 +3764,14 @@ int t4_prep_adapter(struct adapter *adapter)
 {
         int ret, ver;
         uint16_t device_id;
+        u32 pl_rev;
 
         ret = t4_wait_dev_ready(adapter);
         if (ret < 0)
                 return ret;
 
         get_pci_mode(adapter, &adapter->params.pci);
-        adapter->params.rev = t4_read_reg(adapter, PL_REV);
+        pl_rev = G_REV(t4_read_reg(adapter, PL_REV));
 
         ret = get_flash_params(adapter);
         if (ret < 0) {
@@ -3717,14 +3783,13 @@ int t4_prep_adapter(struct adapter *adapter)
          */
         pci_read_config_word(adapter->pdev, PCI_DEVICE_ID, &device_id);
         ver = device_id >> 12;
+        adapter->params.chip = 0;
         switch (ver) {
         case CHELSIO_T4:
-                adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T4,
-                                                  adapter->params.rev);
+                adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, pl_rev);
                 break;
         case CHELSIO_T5:
-                adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T5,
-                                                  adapter->params.rev);
+                adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, pl_rev);
                 break;
         default:
                 dev_err(adapter->pdev_dev, "Device %d is not supported\n",
@@ -3732,9 +3797,6 @@ int t4_prep_adapter(struct adapter *adapter)
                 return -EINVAL;
         }
 
-        /* Reassign the updated revision field */
-        adapter->params.rev = adapter->chip;
-
         init_cong_ctrl(adapter->params.a_wnd, adapter->params.b_wnd);
 
         /*
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
index ef146c0ba481..0a8205d69d2c 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
@@ -1092,6 +1092,11 @@
 
 #define PL_REV 0x1943c
 
+#define S_REV    0
+#define M_REV    0xfU
+#define V_REV(x) ((x) << S_REV)
+#define G_REV(x) (((x) >> S_REV) & M_REV)
+
 #define LE_DB_CONFIG 0x19c04
 #define  HASHEN 0x00100000U
 
@@ -1199,4 +1204,13 @@
 #define EDC_STRIDE_T5 (EDC_T51_BASE_ADDR - EDC_T50_BASE_ADDR)
 #define EDC_REG_T5(reg, idx) (reg + EDC_STRIDE_T5 * idx)
 
+#define A_PL_VF_REV 0x4
+#define A_PL_VF_WHOAMI 0x0
+#define A_PL_VF_REVISION 0x8
+
+#define S_CHIPID    4
+#define M_CHIPID    0xfU
+#define V_CHIPID(x) ((x) << S_CHIPID)
+#define G_CHIPID(x) (((x) >> S_CHIPID) & M_CHIPID)
+
 #endif /* __T4_REGS_H */
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
index 6f77ac487743..74fea74ce0aa 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
@@ -2157,7 +2157,7 @@ struct fw_debug_cmd {
 
 struct fw_hdr {
         u8 ver;
-        u8 reserved1;
+        u8 chip;                        /* terminator chip type */
         __be16  len512;                 /* bin length in units of 512-bytes */
         __be32  fw_ver;                 /* firmware version */
         __be32  tp_microcode_ver;
@@ -2176,6 +2176,11 @@ struct fw_hdr {
         __be32  reserved6[23];
 };
 
+enum fw_hdr_chip {
+        FW_HDR_CHIP_T4,
+        FW_HDR_CHIP_T5
+};
+
 #define FW_HDR_FW_VER_MAJOR_GET(x) (((x) >> 24) & 0xff)
 #define FW_HDR_FW_VER_MINOR_GET(x) (((x) >> 16) & 0xff)
 #define FW_HDR_FW_VER_MICRO_GET(x) (((x) >> 8) & 0xff)
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/adapter.h b/drivers/net/ethernet/chelsio/cxgb4vf/adapter.h
index be5c7ef6ca93..68eaa9c88c7d 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/adapter.h
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/adapter.h
@@ -344,7 +344,6 @@ struct adapter {
         unsigned long registered_device_map;
         unsigned long open_device_map;
         unsigned long flags;
-        enum chip_type chip;
         struct adapter_params params;
 
         /* queue and interrupt resources */
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
index 5f90ec5f7519..0899c0983594 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
@@ -1064,7 +1064,7 @@ static inline unsigned int mk_adap_vers(const struct adapter *adapter)
         /*
          * Chip version 4, revision 0x3f (cxgb4vf).
          */
-        return CHELSIO_CHIP_VERSION(adapter->chip) | (0x3f << 10);
+        return CHELSIO_CHIP_VERSION(adapter->params.chip) | (0x3f << 10);
 }
 
 /*
@@ -1551,9 +1551,13 @@ static void cxgb4vf_get_regs(struct net_device *dev,
         reg_block_dump(adapter, regbuf,
                        T4VF_MPS_BASE_ADDR + T4VF_MOD_MAP_MPS_FIRST,
                        T4VF_MPS_BASE_ADDR + T4VF_MOD_MAP_MPS_LAST);
+
+        /* T5 adds new registers in the PL Register map.
+         */
         reg_block_dump(adapter, regbuf,
                        T4VF_PL_BASE_ADDR + T4VF_MOD_MAP_PL_FIRST,
-                       T4VF_PL_BASE_ADDR + T4VF_MOD_MAP_PL_LAST);
+                       T4VF_PL_BASE_ADDR + (is_t4(adapter->params.chip)
+                       ? A_PL_VF_WHOAMI : A_PL_VF_REVISION));
         reg_block_dump(adapter, regbuf,
                        T4VF_CIM_BASE_ADDR + T4VF_MOD_MAP_CIM_FIRST,
                        T4VF_CIM_BASE_ADDR + T4VF_MOD_MAP_CIM_LAST);
@@ -2087,6 +2091,7 @@ static int adap_init0(struct adapter *adapter)
         unsigned int ethqsets;
         int err;
         u32 param, val = 0;
+        unsigned int chipid;
 
         /*
          * Wait for the device to become ready before proceeding ...
@@ -2114,12 +2119,14 @@ static int adap_init0(struct adapter *adapter)
                 return err;
         }
 
+        adapter->params.chip = 0;
         switch (adapter->pdev->device >> 12) {
         case CHELSIO_T4:
-                adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T4, 0);
+                adapter->params.chip = CHELSIO_CHIP_CODE(CHELSIO_T4, 0);
                 break;
         case CHELSIO_T5:
-                adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T5, 0);
+                chipid = G_REV(t4_read_reg(adapter, A_PL_VF_REV));
+                adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid);
                 break;
         }
 
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c
index 8475c4cda9e4..0a89963c48ce 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c
@@ -537,7 +537,7 @@ static inline void ring_fl_db(struct adapter *adapter, struct sge_fl *fl)
          */
         if (fl->pend_cred >= FL_PER_EQ_UNIT) {
                 val = PIDX(fl->pend_cred / FL_PER_EQ_UNIT);
-                if (!is_t4(adapter->chip))
+                if (!is_t4(adapter->params.chip))
                         val |= DBTYPE(1);
                 wmb();
                 t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_KDOORBELL,
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h
index 53cbfed21d0b..61362450d05b 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h
@@ -39,21 +39,28 @@
 #include "../cxgb4/t4fw_api.h"
 
 #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
-#define CHELSIO_CHIP_VERSION(code) ((code) >> 4)
+#define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
 #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
 
+/* All T4 and later chips have their PCI-E Device IDs encoded as 0xVFPP where:
+ *
+ *   V  = "4" for T4; "5" for T5, etc. or
+ *      = "a" for T4 FPGA; "b" for T4 FPGA, etc.
+ *   F  = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
+ *   PP = adapter product designation
+ */
 #define CHELSIO_T4              0x4
 #define CHELSIO_T5              0x5
 
 enum chip_type {
-        T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 0),
-        T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
-        T4_A3 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
+        T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
+        T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
         T4_FIRST_REV    = T4_A1,
-        T4_LAST_REV     = T4_A3,
+        T4_LAST_REV     = T4_A2,
 
-        T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
-        T5_FIRST_REV    = T5_A1,
+        T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
+        T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
+        T5_FIRST_REV    = T5_A0,
         T5_LAST_REV     = T5_A1,
 };
 
@@ -203,6 +210,7 @@ struct adapter_params {
         struct vpd_params vpd;          /* Vital Product Data */
         struct rss_params rss;          /* Receive Side Scaling */
         struct vf_resources vfres;      /* Virtual Function Resource limits */
+        enum chip_type chip;            /* chip code */
         u8 nports;                      /* # of Ethernet "ports" */
 };
 
@@ -253,7 +261,7 @@ static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd,
 
 static inline int is_t4(enum chip_type chip)
 {
-        return (chip >= T4_FIRST_REV && chip <= T4_LAST_REV);
+        return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4;
 }
 
 int t4vf_wait_dev_ready(struct adapter *);
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
index 9f96dc3bb112..d958c44341b5 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
@@ -1027,7 +1027,7 @@ int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free,
         unsigned nfilters = 0;
         unsigned int rem = naddr;
         struct fw_vi_mac_cmd cmd, rpl;
-        unsigned int max_naddr = is_t4(adapter->chip) ?
+        unsigned int max_naddr = is_t4(adapter->params.chip) ?
                                  NUM_MPS_CLS_SRAM_L_INSTANCES :
                                  NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
 
@@ -1121,7 +1121,7 @@ int t4vf_change_mac(struct adapter *adapter, unsigned int viid,
         struct fw_vi_mac_exact *p = &cmd.u.exact[0];
         size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd,
                                              u.exact[1]), 16);
-        unsigned int max_naddr = is_t4(adapter->chip) ?
+        unsigned int max_naddr = is_t4(adapter->params.chip) ?
                                  NUM_MPS_CLS_SRAM_L_INSTANCES :
                                  NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
 
diff --git a/drivers/net/ethernet/emulex/benet/be_hw.h b/drivers/net/ethernet/emulex/benet/be_hw.h
index 3e2162121601..dc88782185f2 100644
--- a/drivers/net/ethernet/emulex/benet/be_hw.h
+++ b/drivers/net/ethernet/emulex/benet/be_hw.h
@@ -64,6 +64,9 @@
 #define SLIPORT_ERROR_NO_RESOURCE1      0x2
 #define SLIPORT_ERROR_NO_RESOURCE2      0x9
 
+#define SLIPORT_ERROR_FW_RESET1         0x2
+#define SLIPORT_ERROR_FW_RESET2         0x0
+
 /********* Memory BAR register ************/
 #define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET      0xfc
 /* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c
index fee64bf10446..0fde69d5cb6a 100644
--- a/drivers/net/ethernet/emulex/benet/be_main.c
+++ b/drivers/net/ethernet/emulex/benet/be_main.c
@@ -2464,8 +2464,16 @@ void be_detect_error(struct be_adapter *adapter)
          */
         if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
                 adapter->hw_error = true;
-                dev_err(&adapter->pdev->dev,
-                        "Error detected in the card\n");
+                /* Do not log error messages if its a FW reset */
+                if (sliport_err1 == SLIPORT_ERROR_FW_RESET1 &&
+                    sliport_err2 == SLIPORT_ERROR_FW_RESET2) {
+                        dev_info(&adapter->pdev->dev,
+                                 "Firmware update in progress\n");
+                        return;
+                } else {
+                        dev_err(&adapter->pdev->dev,
+                                "Error detected in the card\n");
+                }
         }
 
         if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
@@ -2932,28 +2940,35 @@ static void be_cancel_worker(struct be_adapter *adapter)
         }
 }
 
-static int be_clear(struct be_adapter *adapter)
+static void be_mac_clear(struct be_adapter *adapter)
 {
         int i;
 
+        if (adapter->pmac_id) {
+                for (i = 0; i < (adapter->uc_macs + 1); i++)
+                        be_cmd_pmac_del(adapter, adapter->if_handle,
+                                        adapter->pmac_id[i], 0);
+                adapter->uc_macs = 0;
+
+                kfree(adapter->pmac_id);
+                adapter->pmac_id = NULL;
+        }
+}
+
+static int be_clear(struct be_adapter *adapter)
+{
         be_cancel_worker(adapter);
 
         if (sriov_enabled(adapter))
                 be_vf_clear(adapter);
 
         /* delete the primary mac along with the uc-mac list */
-        for (i = 0; i < (adapter->uc_macs + 1); i++)
-                be_cmd_pmac_del(adapter, adapter->if_handle,
-                                adapter->pmac_id[i], 0);
-        adapter->uc_macs = 0;
+        be_mac_clear(adapter);
 
         be_cmd_if_destroy(adapter, adapter->if_handle,  0);
 
         be_clear_queues(adapter);
 
-        kfree(adapter->pmac_id);
-        adapter->pmac_id = NULL;
-
         be_msix_disable(adapter);
         return 0;
 }
@@ -3812,6 +3827,8 @@ static int lancer_fw_download(struct be_adapter *adapter,
         }
 
         if (change_status == LANCER_FW_RESET_NEEDED) {
+                dev_info(&adapter->pdev->dev,
+                         "Resetting adapter to activate new FW\n");
                 status = lancer_physdev_ctrl(adapter,
                                              PHYSDEV_CONTROL_FW_RESET_MASK);
                 if (status) {
@@ -4363,13 +4380,13 @@ static int lancer_recover_func(struct be_adapter *adapter)
                         goto err;
         }
 
-        dev_err(dev, "Error recovery successful\n");
+        dev_err(dev, "Adapter recovery successful\n");
         return 0;
 err:
         if (status == -EAGAIN)
                 dev_err(dev, "Waiting for resource provisioning\n");
         else
-                dev_err(dev, "Error recovery failed\n");
+                dev_err(dev, "Adapter recovery failed\n");
 
         return status;
 }
diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
index 4cbebf3d80eb..e7c8b749c5a5 100644
--- a/drivers/net/ethernet/freescale/fec_main.c
+++ b/drivers/net/ethernet/freescale/fec_main.c
@@ -98,10 +98,6 @@ static void set_multicast_list(struct net_device *ndev);
  * detected as not set during a prior frame transmission, then the
  * ENET_TDAR[TDAR] bit is cleared at a later time, even if additional TxBDs
  * were added to the ring and the ENET_TDAR[TDAR] bit is set. This results in
- * If the ready bit in the transmit buffer descriptor (TxBD[R]) is previously
- * detected as not set during a prior frame transmission, then the
- * ENET_TDAR[TDAR] bit is cleared at a later time, even if additional TxBDs
- * were added to the ring and the ENET_TDAR[TDAR] bit is set. This results in
  * frames not being transmitted until there is a 0-to-1 transition on
  * ENET_TDAR[TDAR].
  */
@@ -385,7 +381,7 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
          * data.
          */
         bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, bufaddr,
-                        FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
+                        skb->len, DMA_TO_DEVICE);
         if (dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr)) {
                 bdp->cbd_bufaddr = 0;
                 fep->tx_skbuff[index] = NULL;
@@ -779,11 +775,10 @@ fec_enet_tx(struct net_device *ndev)
                 else
                         index = bdp - fep->tx_bd_base;
 
-                dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
-                                FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
-                bdp->cbd_bufaddr = 0;
-
                 skb = fep->tx_skbuff[index];
+                dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr, skb->len,
+                                DMA_TO_DEVICE);
+                bdp->cbd_bufaddr = 0;
 
                 /* Check for errors. */
                 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
diff --git a/drivers/net/ethernet/ibm/ehea/ehea_main.c b/drivers/net/ethernet/ibm/ehea/ehea_main.c
index 2d1c6bdd3618..7628e0fd8455 100644
--- a/drivers/net/ethernet/ibm/ehea/ehea_main.c
+++ b/drivers/net/ethernet/ibm/ehea/ehea_main.c
@@ -3033,7 +3033,7 @@ static struct ehea_port *ehea_setup_single_port(struct ehea_adapter *adapter,
 
         dev->hw_features = NETIF_F_SG | NETIF_F_TSO |
                       NETIF_F_IP_CSUM | NETIF_F_HW_VLAN_CTAG_TX;
-        dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | NETIF_F_TSO |
+        dev->features = NETIF_F_SG | NETIF_F_TSO |
                       NETIF_F_HIGHDMA | NETIF_F_IP_CSUM |
                       NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
                       NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_RXCSUM;
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index be15938ba213..12b0932204ba 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -354,6 +354,9 @@ static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
         struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
         int i;
 
+        if (!vsi->tx_rings)
+                return stats;
+
         rcu_read_lock();
         for (i = 0; i < vsi->num_queue_pairs; i++) {
                 struct i40e_ring *tx_ring, *rx_ring;
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
index c4c4fe332c7e..ad2b74d95138 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -1728,7 +1728,10 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations,
                          * ownership of the resources, wait and try again to
                          * see if they have relinquished the resources yet.
                          */
-                        udelay(usec_interval);
+                        if (usec_interval >= 1000)
+                                mdelay(usec_interval/1000);
+                        else
+                                udelay(usec_interval);
                 }
                 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
                 if (ret_val)
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index b8e232b4ea2d..d5f0d72e5e33 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -1378,7 +1378,7 @@ static void mvneta_rxq_drop_pkts(struct mvneta_port *pp,
 
                 dev_kfree_skb_any(skb);
                 dma_unmap_single(pp->dev->dev.parent, rx_desc->buf_phys_addr,
-                                 rx_desc->data_size, DMA_FROM_DEVICE);
+                                 MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE);
         }
 
         if (rx_done)
@@ -1424,7 +1424,7 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo,
                 }
 
                 dma_unmap_single(pp->dev->dev.parent, rx_desc->buf_phys_addr,
-                                 rx_desc->data_size, DMA_FROM_DEVICE);
+                                 MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE);
 
                 rx_bytes = rx_desc->data_size -
                         (ETH_FCS_LEN + MVNETA_MH_SIZE);
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index 5789ea2c934d..01fc6515384d 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -2635,6 +2635,8 @@ static int __init mlx4_init(void)
                 return -ENOMEM;
 
         ret = pci_register_driver(&mlx4_driver);
+        if (ret < 0)
+                destroy_workqueue(mlx4_wq);
         return ret < 0 ? ret : 0;
 }
 
diff --git a/drivers/net/ethernet/nvidia/forcedeth.c b/drivers/net/ethernet/nvidia/forcedeth.c
index 2d045be4b5cf..1e8b9514718b 100644
--- a/drivers/net/ethernet/nvidia/forcedeth.c
+++ b/drivers/net/ethernet/nvidia/forcedeth.c
@@ -5150,8 +5150,10 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64
 {
         struct fe_priv *np = netdev_priv(dev);
         u8 __iomem *base = get_hwbase(dev);
-        int result;
-        memset(buffer, 0, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(u64));
+        int result, count;
+
+        count = nv_get_sset_count(dev, ETH_SS_TEST);
+        memset(buffer, 0, count * sizeof(u64));
 
         if (!nv_link_test(dev)) {
                 test->flags |= ETH_TEST_FL_FAILED;
@@ -5195,7 +5197,7 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64
                         return;
                 }
 
-                if (!nv_loopback_test(dev)) {
+                if (count > NV_TEST_COUNT_BASE && !nv_loopback_test(dev)) {
                         test->flags |= ETH_TEST_FL_FAILED;
                         buffer[3] = 1;
                 }
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge.h b/drivers/net/ethernet/qlogic/qlge/qlge.h
index 0c9c4e895595..03517478e589 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge.h
+++ b/drivers/net/ethernet/qlogic/qlge/qlge.h
@@ -18,7 +18,7 @@
  */
 #define DRV_NAME        "qlge"
 #define DRV_STRING      "QLogic 10 Gigabit PCI-E Ethernet Driver "
-#define DRV_VERSION     "1.00.00.33"
+#define DRV_VERSION     "1.00.00.34"
 
 #define WQ_ADDR_ALIGN   0x3     /* 4 byte alignment */
 
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c b/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c
index 0780e039b271..8dee1beb9854 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c
+++ b/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c
@@ -181,6 +181,7 @@ static const char ql_gstrings_test[][ETH_GSTRING_LEN] = {
 };
 #define QLGE_TEST_LEN (sizeof(ql_gstrings_test) / ETH_GSTRING_LEN)
 #define QLGE_STATS_LEN ARRAY_SIZE(ql_gstrings_stats)
+#define QLGE_RCV_MAC_ERR_STATS  7
 
 static int ql_update_ring_coalescing(struct ql_adapter *qdev)
 {
@@ -280,6 +281,9 @@ static void ql_update_stats(struct ql_adapter *qdev)
                 iter++;
         }
 
+        /* Update receive mac error statistics */
+        iter += QLGE_RCV_MAC_ERR_STATS;
+
         /*
          * Get Per-priority TX pause frame counter statistics.
          */
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_main.c b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
index a245dc18d769..449f506d2e8f 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge_main.c
+++ b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
@@ -2376,14 +2376,6 @@ static netdev_features_t qlge_fix_features(struct net_device *ndev,
         netdev_features_t features)
 {
         int err;
-        /*
-         * Since there is no support for separate rx/tx vlan accel
-         * enable/disable make sure tx flag is always in same state as rx.
-         */
-        if (features & NETIF_F_HW_VLAN_CTAG_RX)
-                features |= NETIF_F_HW_VLAN_CTAG_TX;
-        else
-                features &= ~NETIF_F_HW_VLAN_CTAG_TX;
 
         /* Update the behavior of vlan accel in the adapter */
         err = qlge_update_hw_vlan_features(ndev, features);
diff --git a/drivers/net/ethernet/sfc/efx.c b/drivers/net/ethernet/sfc/efx.c
index 2e27837ce6a2..fd844b53e385 100644
--- a/drivers/net/ethernet/sfc/efx.c
+++ b/drivers/net/ethernet/sfc/efx.c
@@ -585,7 +585,7 @@ static void efx_start_datapath(struct efx_nic *efx)
                            EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
                            efx->type->rx_buffer_padding);
         rx_buf_len = (sizeof(struct efx_rx_page_state) +
-                      NET_IP_ALIGN + efx->rx_dma_len);
+                      efx->rx_ip_align + efx->rx_dma_len);
         if (rx_buf_len <= PAGE_SIZE) {
                 efx->rx_scatter = efx->type->always_rx_scatter;
                 efx->rx_buffer_order = 0;
@@ -645,6 +645,8 @@ static void efx_start_datapath(struct efx_nic *efx)
                 WARN_ON(channel->rx_pkt_n_frags);
         }
 
+        efx_ptp_start_datapath(efx);
+
         if (netif_device_present(efx->net_dev))
                 netif_tx_wake_all_queues(efx->net_dev);
 }
@@ -659,6 +661,8 @@ static void efx_stop_datapath(struct efx_nic *efx)
         EFX_ASSERT_RESET_SERIALISED(efx);
         BUG_ON(efx->port_enabled);
 
+        efx_ptp_stop_datapath(efx);
+
         /* Stop RX refill */
         efx_for_each_channel(channel, efx) {
                 efx_for_each_channel_rx_queue(rx_queue, channel)
@@ -2540,6 +2544,8 @@ static int efx_init_struct(struct efx_nic *efx,
 
         efx->net_dev = net_dev;
         efx->rx_prefix_size = efx->type->rx_prefix_size;
+        efx->rx_ip_align =
+                NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
         efx->rx_packet_hash_offset =
                 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
         spin_lock_init(&efx->stats_lock);
diff --git a/drivers/net/ethernet/sfc/mcdi.c b/drivers/net/ethernet/sfc/mcdi.c
index 366c8e3e3784..4b0bd8a1514d 100644
--- a/drivers/net/ethernet/sfc/mcdi.c
+++ b/drivers/net/ethernet/sfc/mcdi.c
@@ -50,6 +50,7 @@ struct efx_mcdi_async_param {
 static void efx_mcdi_timeout_async(unsigned long context);
 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
                                bool *was_attached_out);
+static bool efx_mcdi_poll_once(struct efx_nic *efx);
 
 static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
 {
@@ -237,6 +238,21 @@ static void efx_mcdi_read_response_header(struct efx_nic *efx)
         }
 }
 
+static bool efx_mcdi_poll_once(struct efx_nic *efx)
+{
+        struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+
+        rmb();
+        if (!efx->type->mcdi_poll_response(efx))
+                return false;
+
+        spin_lock_bh(&mcdi->iface_lock);
+        efx_mcdi_read_response_header(efx);
+        spin_unlock_bh(&mcdi->iface_lock);
+
+        return true;
+}
+
 static int efx_mcdi_poll(struct efx_nic *efx)
 {
         struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
@@ -272,18 +288,13 @@ static int efx_mcdi_poll(struct efx_nic *efx)
 
                 time = jiffies;
 
-                rmb();
-                if (efx->type->mcdi_poll_response(efx))
+                if (efx_mcdi_poll_once(efx))
                         break;
 
                 if (time_after(time, finish))
                         return -ETIMEDOUT;
         }
 
-        spin_lock_bh(&mcdi->iface_lock);
-        efx_mcdi_read_response_header(efx);
-        spin_unlock_bh(&mcdi->iface_lock);
-
         /* Return rc=0 like wait_event_timeout() */
         return 0;
 }
@@ -619,6 +630,16 @@ int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
                 rc = efx_mcdi_await_completion(efx);
 
         if (rc != 0) {
+                netif_err(efx, hw, efx->net_dev,
+                          "MC command 0x%x inlen %d mode %d timed out\n",
+                          cmd, (int)inlen, mcdi->mode);
+
+                if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
+                        netif_err(efx, hw, efx->net_dev,
+                                  "MCDI request was completed without an event\n");
+                        rc = 0;
+                }
+
                 /* Close the race with efx_mcdi_ev_cpl() executing just too late
                  * and completing a request we've just cancelled, by ensuring
                  * that the seqno check therein fails.
@@ -627,11 +648,9 @@ int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
                 ++mcdi->seqno;
                 ++mcdi->credits;
                 spin_unlock_bh(&mcdi->iface_lock);
+        }
 
-                netif_err(efx, hw, efx->net_dev,
-                          "MC command 0x%x inlen %d mode %d timed out\n",
-                          cmd, (int)inlen, mcdi->mode);
-        } else {
+        if (rc == 0) {
                 size_t hdr_len, data_len;
 
                 /* At the very least we need a memory barrier here to ensure
diff --git a/drivers/net/ethernet/sfc/net_driver.h b/drivers/net/ethernet/sfc/net_driver.h
index b14a717ac3e8..542a0d252ae0 100644
--- a/drivers/net/ethernet/sfc/net_driver.h
+++ b/drivers/net/ethernet/sfc/net_driver.h
@@ -683,6 +683,8 @@ struct vfdi_status;
  * @n_channels: Number of channels in use
  * @n_rx_channels: Number of channels used for RX (= number of RX queues)
  * @n_tx_channels: Number of channels used for TX
+ * @rx_ip_align: RX DMA address offset to have IP header aligned in
+ *      in accordance with NET_IP_ALIGN
  * @rx_dma_len: Current maximum RX DMA length
  * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
  * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
@@ -816,6 +818,7 @@ struct efx_nic {
         unsigned rss_spread;
         unsigned tx_channel_offset;
         unsigned n_tx_channels;
+        unsigned int rx_ip_align;
         unsigned int rx_dma_len;
         unsigned int rx_buffer_order;
         unsigned int rx_buffer_truesize;
diff --git a/drivers/net/ethernet/sfc/nic.h b/drivers/net/ethernet/sfc/nic.h
index 11b6112d9249..91c63ec79c5f 100644
--- a/drivers/net/ethernet/sfc/nic.h
+++ b/drivers/net/ethernet/sfc/nic.h
@@ -560,6 +560,8 @@ void efx_ptp_get_ts_info(struct efx_nic *efx, struct ethtool_ts_info *ts_info);
 bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
 int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
 void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev);
+void efx_ptp_start_datapath(struct efx_nic *efx);
+void efx_ptp_stop_datapath(struct efx_nic *efx);
 
 extern const struct efx_nic_type falcon_a1_nic_type;
 extern const struct efx_nic_type falcon_b0_nic_type;
diff --git a/drivers/net/ethernet/sfc/ptp.c b/drivers/net/ethernet/sfc/ptp.c
index 03acf57df045..3dd39dcfe36b 100644
--- a/drivers/net/ethernet/sfc/ptp.c
+++ b/drivers/net/ethernet/sfc/ptp.c
@@ -220,6 +220,7 @@ struct efx_ptp_timeset {
  * @evt_list: List of MC receive events awaiting packets
  * @evt_free_list: List of free events
  * @evt_lock: Lock for manipulating evt_list and evt_free_list
+ * @evt_overflow: Boolean indicating that event list has overflowed
  * @rx_evts: Instantiated events (on evt_list and evt_free_list)
  * @workwq: Work queue for processing pending PTP operations
  * @work: Work task
@@ -270,6 +271,7 @@ struct efx_ptp_data {
         struct list_head evt_list;
         struct list_head evt_free_list;
         spinlock_t evt_lock;
+        bool evt_overflow;
         struct efx_ptp_event_rx rx_evts[MAX_RECEIVE_EVENTS];
         struct workqueue_struct *workwq;
         struct work_struct work;
@@ -635,6 +637,11 @@ static void efx_ptp_drop_time_expired_events(struct efx_nic *efx)
                         }
                 }
         }
+        /* If the event overflow flag is set and the event list is now empty
+         * clear the flag to re-enable the overflow warning message.
+         */
+        if (ptp->evt_overflow && list_empty(&ptp->evt_list))
+                ptp->evt_overflow = false;
         spin_unlock_bh(&ptp->evt_lock);
 }
 
@@ -676,6 +683,11 @@ static enum ptp_packet_state efx_ptp_match_rx(struct efx_nic *efx,
                         break;
                 }
         }
+        /* If the event overflow flag is set and the event list is now empty
+         * clear the flag to re-enable the overflow warning message.
+         */
+        if (ptp->evt_overflow && list_empty(&ptp->evt_list))
+                ptp->evt_overflow = false;
         spin_unlock_bh(&ptp->evt_lock);
 
         return rc;
@@ -705,8 +717,9 @@ static bool efx_ptp_process_events(struct efx_nic *efx, struct sk_buff_head *q)
                         __skb_queue_tail(q, skb);
                 } else if (time_after(jiffies, match->expiry)) {
                         match->state = PTP_PACKET_STATE_TIMED_OUT;
-                        netif_warn(efx, rx_err, efx->net_dev,
-                                   "PTP packet - no timestamp seen\n");
+                        if (net_ratelimit())
+                                netif_warn(efx, rx_err, efx->net_dev,
+                                           "PTP packet - no timestamp seen\n");
                         __skb_queue_tail(q, skb);
                 } else {
                         /* Replace unprocessed entry and stop */
@@ -788,9 +801,14 @@ fail:
 static int efx_ptp_stop(struct efx_nic *efx)
 {
         struct efx_ptp_data *ptp = efx->ptp_data;
-        int rc = efx_ptp_disable(efx);
         struct list_head *cursor;
         struct list_head *next;
+        int rc;
+
+        if (ptp == NULL)
+                return 0;
+
+        rc = efx_ptp_disable(efx);
 
         if (ptp->rxfilter_installed) {
                 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
@@ -809,11 +827,19 @@ static int efx_ptp_stop(struct efx_nic *efx)
         list_for_each_safe(cursor, next, &efx->ptp_data->evt_list) {
                 list_move(cursor, &efx->ptp_data->evt_free_list);
         }
+        ptp->evt_overflow = false;
         spin_unlock_bh(&efx->ptp_data->evt_lock);
 
         return rc;
 }
 
+static int efx_ptp_restart(struct efx_nic *efx)
+{
+        if (efx->ptp_data && efx->ptp_data->enabled)
+                return efx_ptp_start(efx);
+        return 0;
+}
+
 static void efx_ptp_pps_worker(struct work_struct *work)
 {
         struct efx_ptp_data *ptp =
@@ -901,6 +927,7 @@ static int efx_ptp_probe_channel(struct efx_channel *channel)
         spin_lock_init(&ptp->evt_lock);
         for (pos = 0; pos < MAX_RECEIVE_EVENTS; pos++)
                 list_add(&ptp->rx_evts[pos].link, &ptp->evt_free_list);
+        ptp->evt_overflow = false;
 
         ptp->phc_clock_info.owner = THIS_MODULE;
         snprintf(ptp->phc_clock_info.name,
@@ -989,7 +1016,11 @@ bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)
                 skb->len >= PTP_MIN_LENGTH &&
                 skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM &&
                 likely(skb->protocol == htons(ETH_P_IP)) &&
+                skb_transport_header_was_set(skb) &&
+                skb_network_header_len(skb) >= sizeof(struct iphdr) &&
                 ip_hdr(skb)->protocol == IPPROTO_UDP &&
+                skb_headlen(skb) >=
+                skb_transport_offset(skb) + sizeof(struct udphdr) &&
                 udp_hdr(skb)->dest == htons(PTP_EVENT_PORT);
 }
 
@@ -1106,7 +1137,7 @@ static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,
 {
         if ((enable_wanted != efx->ptp_data->enabled) ||
             (enable_wanted && (efx->ptp_data->mode != new_mode))) {
-                int rc;
+                int rc = 0;
 
                 if (enable_wanted) {
                         /* Change of mode requires disable */
@@ -1123,7 +1154,8 @@ static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,
                          * succeed.
                          */
                         efx->ptp_data->mode = new_mode;
-                        rc = efx_ptp_start(efx);
+                        if (netif_running(efx->net_dev))
+                                rc = efx_ptp_start(efx);
                         if (rc == 0) {
                                 rc = efx_ptp_synchronize(efx,
                                                          PTP_SYNC_ATTEMPTS * 2);
@@ -1295,8 +1327,13 @@ static void ptp_event_rx(struct efx_nic *efx, struct efx_ptp_data *ptp)
                 list_add_tail(&evt->link, &ptp->evt_list);
 
                 queue_work(ptp->workwq, &ptp->work);
-        } else {
-                netif_err(efx, rx_err, efx->net_dev, "No free PTP event");
+        } else if (!ptp->evt_overflow) {
+                /* Log a warning message and set the event overflow flag.
+                 * The message won't be logged again until the event queue
+                 * becomes empty.
+                 */
+                netif_err(efx, rx_err, efx->net_dev, "PTP event queue overflow\n");
+                ptp->evt_overflow = true;
         }
         spin_unlock_bh(&ptp->evt_lock);
 }
@@ -1389,7 +1426,7 @@ static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
         if (rc != 0)
                 return rc;
 
-        ptp_data->current_adjfreq = delta;
+        ptp_data->current_adjfreq = adjustment_ns;
         return 0;
 }
 
@@ -1404,7 +1441,7 @@ static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
 
         MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
         MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0);
-        MCDI_SET_QWORD(inbuf, PTP_IN_ADJUST_FREQ, 0);
+        MCDI_SET_QWORD(inbuf, PTP_IN_ADJUST_FREQ, ptp_data->current_adjfreq);
         MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec);
         MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec);
         return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
@@ -1491,3 +1528,14 @@ void efx_ptp_probe(struct efx_nic *efx)
                 efx->extra_channel_type[EFX_EXTRA_CHANNEL_PTP] =
                         &efx_ptp_channel_type;
 }
+
+void efx_ptp_start_datapath(struct efx_nic *efx)
+{
+        if (efx_ptp_restart(efx))
+                netif_err(efx, drv, efx->net_dev, "Failed to restart PTP.\n");
+}
+
+void efx_ptp_stop_datapath(struct efx_nic *efx)
+{
+        efx_ptp_stop(efx);
+}
diff --git a/drivers/net/ethernet/sfc/rx.c b/drivers/net/ethernet/sfc/rx.c
index 8f09e686fc23..42488df1f4ec 100644
--- a/drivers/net/ethernet/sfc/rx.c
+++ b/drivers/net/ethernet/sfc/rx.c
@@ -94,7 +94,7 @@ static inline void efx_sync_rx_buffer(struct efx_nic *efx,
 
 void efx_rx_config_page_split(struct efx_nic *efx)
 {
-        efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + NET_IP_ALIGN,
+        efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
                                       EFX_RX_BUF_ALIGNMENT);
         efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
                 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
@@ -189,9 +189,9 @@ static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue)
                 do {
                         index = rx_queue->added_count & rx_queue->ptr_mask;
                         rx_buf = efx_rx_buffer(rx_queue, index);
-                        rx_buf->dma_addr = dma_addr + NET_IP_ALIGN;
+                        rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
                         rx_buf->page = page;
-                        rx_buf->page_offset = page_offset + NET_IP_ALIGN;
+                        rx_buf->page_offset = page_offset + efx->rx_ip_align;
                         rx_buf->len = efx->rx_dma_len;
                         rx_buf->flags = 0;
                         ++rx_queue->added_count;
diff --git a/drivers/net/ethernet/smsc/smc91x.c b/drivers/net/ethernet/smsc/smc91x.c
index 0c9b5d94154f..8bf29eb4a5a0 100644
--- a/drivers/net/ethernet/smsc/smc91x.c
+++ b/drivers/net/ethernet/smsc/smc91x.c
@@ -82,6 +82,7 @@ static const char version[] =
 #include <linux/mii.h>
 #include <linux/workqueue.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
@@ -2184,6 +2185,15 @@ static void smc_release_datacs(struct platform_device *pdev, struct net_device *
         }
 }
 
+#if IS_BUILTIN(CONFIG_OF)
+static const struct of_device_id smc91x_match[] = {
+        { .compatible = "smsc,lan91c94", },
+        { .compatible = "smsc,lan91c111", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, smc91x_match);
+#endif
+
 /*
  * smc_init(void)
  *   Input parameters:
@@ -2198,6 +2208,7 @@ static void smc_release_datacs(struct platform_device *pdev, struct net_device *
 static int smc_drv_probe(struct platform_device *pdev)
 {
         struct smc91x_platdata *pd = dev_get_platdata(&pdev->dev);
+        const struct of_device_id *match = NULL;
         struct smc_local *lp;
         struct net_device *ndev;
         struct resource *res, *ires;
@@ -2217,11 +2228,34 @@ static int smc_drv_probe(struct platform_device *pdev)
          */
 
         lp = netdev_priv(ndev);
+        lp->cfg.flags = 0;
 
         if (pd) {
                 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
                 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
-        } else {
+        }
+
+#if IS_BUILTIN(CONFIG_OF)
+        match = of_match_device(of_match_ptr(smc91x_match), &pdev->dev);
+        if (match) {
+                struct device_node *np = pdev->dev.of_node;
+                u32 val;
+
+                /* Combination of IO widths supported, default to 16-bit */
+                if (!of_property_read_u32(np, "reg-io-width", &val)) {
+                        if (val & 1)
+                                lp->cfg.flags |= SMC91X_USE_8BIT;
+                        if ((val == 0) || (val & 2))
+                                lp->cfg.flags |= SMC91X_USE_16BIT;
+                        if (val & 4)
+                                lp->cfg.flags |= SMC91X_USE_32BIT;
+                } else {
+                        lp->cfg.flags |= SMC91X_USE_16BIT;
+                }
+        }
+#endif
+
+        if (!pd && !match) {
                 lp->cfg.flags |= (SMC_CAN_USE_8BIT)  ? SMC91X_USE_8BIT  : 0;
                 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
                 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
@@ -2370,15 +2404,6 @@ static int smc_drv_resume(struct device *dev)
         return 0;
 }
 
-#ifdef CONFIG_OF
-static const struct of_device_id smc91x_match[] = {
-        { .compatible = "smsc,lan91c94", },
-        { .compatible = "smsc,lan91c111", },
-        {},
-};
-MODULE_DEVICE_TABLE(of, smc91x_match);
-#endif
-
 static struct dev_pm_ops smc_drv_pm_ops = {
         .suspend        = smc_drv_suspend,
         .resume         = smc_drv_resume,
diff --git a/drivers/net/ethernet/tehuti/tehuti.c b/drivers/net/ethernet/tehuti/tehuti.c
index dd0dd6279b4e..4f1d2549130e 100644
--- a/drivers/net/ethernet/tehuti/tehuti.c
+++ b/drivers/net/ethernet/tehuti/tehuti.c
@@ -2019,7 +2019,6 @@ bdx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 ndev->features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO
                     | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
                     NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_RXCSUM
-                    /*| NETIF_F_FRAGLIST */
                     ;
                 ndev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG |
                         NETIF_F_TSO | NETIF_F_HW_VLAN_CTAG_TX;
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 7536a4c01293..5120d9ce1dd4 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -1151,6 +1151,12 @@ static int cpsw_ndo_open(struct net_device *ndev)
                  * receive descs
                  */
                 cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i);
+
+                if (cpts_register(&priv->pdev->dev, priv->cpts,
+                                  priv->data.cpts_clock_mult,
+                                  priv->data.cpts_clock_shift))
+                        dev_err(priv->dev, "error registering cpts device\n");
+
         }
 
         /* Enable Interrupt pacing if configured */
@@ -1197,6 +1203,7 @@ static int cpsw_ndo_stop(struct net_device *ndev)
         netif_carrier_off(priv->ndev);
 
         if (cpsw_common_res_usage_state(priv) <= 1) {
+                cpts_unregister(priv->cpts);
                 cpsw_intr_disable(priv);
                 cpdma_ctlr_int_ctrl(priv->dma, false);
                 cpdma_ctlr_stop(priv->dma);
@@ -1816,6 +1823,8 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
                 }
 
                 i++;
+                if (i == data->slaves)
+                        break;
         }
 
         return 0;
@@ -1983,9 +1992,15 @@ static int cpsw_probe(struct platform_device *pdev)
                 goto clean_runtime_disable_ret;
         }
         priv->regs = ss_regs;
-        priv->version = __raw_readl(&priv->regs->id_ver);
         priv->host_port = HOST_PORT_NUM;
 
+        /* Need to enable clocks with runtime PM api to access module
+         * registers
+         */
+        pm_runtime_get_sync(&pdev->dev);
+        priv->version = readl(&priv->regs->id_ver);
+        pm_runtime_put_sync(&pdev->dev);
+
         res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
         priv->wr_regs = devm_ioremap_resource(&pdev->dev, res);
         if (IS_ERR(priv->wr_regs)) {
@@ -2155,8 +2170,6 @@ static int cpsw_remove(struct platform_device *pdev)
                 unregister_netdev(cpsw_get_slave_ndev(priv, 1));
         unregister_netdev(ndev);
 
-        cpts_unregister(priv->cpts);
-
         cpsw_ale_destroy(priv->ale);
         cpdma_chan_destroy(priv->txch);
         cpdma_chan_destroy(priv->rxch);
diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
index 41ba974bf37c..cd9b164a0434 100644
--- a/drivers/net/ethernet/ti/davinci_emac.c
+++ b/drivers/net/ethernet/ti/davinci_emac.c
@@ -61,6 +61,7 @@
 #include <linux/davinci_emac.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/of_device.h>
 #include <linux/of_irq.h>
 #include <linux/of_net.h>
 
@@ -1752,10 +1753,14 @@ static const struct net_device_ops emac_netdev_ops = {
 #endif
 };
 
+static const struct of_device_id davinci_emac_of_match[];
+
 static struct emac_platform_data *
 davinci_emac_of_get_pdata(struct platform_device *pdev, struct emac_priv *priv)
 {
         struct device_node *np;
+        const struct of_device_id *match;
+        const struct emac_platform_data *auxdata;
         struct emac_platform_data *pdata = NULL;
         const u8 *mac_addr;
 
@@ -1793,7 +1798,20 @@ davinci_emac_of_get_pdata(struct platform_device *pdev, struct emac_priv *priv)
 
         priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
         if (!priv->phy_node)
-                pdata->phy_id = "";
+                pdata->phy_id = NULL;
+
+        auxdata = pdev->dev.platform_data;
+        if (auxdata) {
+                pdata->interrupt_enable = auxdata->interrupt_enable;
+                pdata->interrupt_disable = auxdata->interrupt_disable;
+        }
+
+        match = of_match_device(davinci_emac_of_match, &pdev->dev);
+        if (match && match->data) {
+                auxdata = match->data;
+                pdata->version = auxdata->version;
+                pdata->hw_ram_addr = auxdata->hw_ram_addr;
+        }
 
         pdev->dev.platform_data = pdata;
 
@@ -2020,8 +2038,14 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
 };
 
 #if IS_ENABLED(CONFIG_OF)
+static const struct emac_platform_data am3517_emac_data = {
+        .version                = EMAC_VERSION_2,
+        .hw_ram_addr            = 0x01e20000,
+};
+
 static const struct of_device_id davinci_emac_of_match[] = {
         {.compatible = "ti,davinci-dm6467-emac", },
+        {.compatible = "ti,am3517-emac", .data = &am3517_emac_data, },
         {},
 };
 MODULE_DEVICE_TABLE(of, davinci_emac_of_match);
diff --git a/drivers/net/ethernet/xilinx/ll_temac_main.c b/drivers/net/ethernet/xilinx/ll_temac_main.c
index 1f2364126323..2166e879a096 100644
--- a/drivers/net/ethernet/xilinx/ll_temac_main.c
+++ b/drivers/net/ethernet/xilinx/ll_temac_main.c
@@ -1017,7 +1017,7 @@ static int temac_of_probe(struct platform_device *op)
         platform_set_drvdata(op, ndev);
         SET_NETDEV_DEV(ndev, &op->dev);
         ndev->flags &= ~IFF_MULTICAST;  /* clear multicast */
-        ndev->features = NETIF_F_SG | NETIF_F_FRAGLIST;
+        ndev->features = NETIF_F_SG;
         ndev->netdev_ops = &temac_netdev_ops;
         ndev->ethtool_ops = &temac_ethtool_ops;
 #if 0
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index b2ff038d6d20..f9293da19e26 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -1486,7 +1486,7 @@ static int axienet_of_probe(struct platform_device *op)
 
         SET_NETDEV_DEV(ndev, &op->dev);
         ndev->flags &= ~IFF_MULTICAST;  /* clear multicast */
-        ndev->features = NETIF_F_SG | NETIF_F_FRAGLIST;
+        ndev->features = NETIF_F_SG;
         ndev->netdev_ops = &axienet_netdev_ops;
         ndev->ethtool_ops = &axienet_ethtool_ops;
 
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 74234a51c851..fefb8cd5eb65 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -163,26 +163,9 @@ static void xemaclite_enable_interrupts(struct net_local *drvdata)
         __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
                      drvdata->base_addr + XEL_TSR_OFFSET);
 
-        /* Enable the Tx interrupts for the second Buffer if
-         * configured in HW */
-        if (drvdata->tx_ping_pong != 0) {
-                reg_data = __raw_readl(drvdata->base_addr +
-                                   XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
-                __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
-                             drvdata->base_addr + XEL_BUFFER_OFFSET +
-                             XEL_TSR_OFFSET);
-        }
-
         /* Enable the Rx interrupts for the first buffer */
         __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
 
-        /* Enable the Rx interrupts for the second Buffer if
-         * configured in HW */
-        if (drvdata->rx_ping_pong != 0) {
-                __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr +
-                             XEL_BUFFER_OFFSET + XEL_RSR_OFFSET);
-        }
-
         /* Enable the Global Interrupt Enable */
         __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
 }
@@ -206,31 +189,10 @@ static void xemaclite_disable_interrupts(struct net_local *drvdata)
         __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
                      drvdata->base_addr + XEL_TSR_OFFSET);
 
-        /* Disable the Tx interrupts for the second Buffer
-         * if configured in HW */
-        if (drvdata->tx_ping_pong != 0) {
-                reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
-                                   XEL_TSR_OFFSET);
-                __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
-                             drvdata->base_addr + XEL_BUFFER_OFFSET +
-                             XEL_TSR_OFFSET);
-        }
-
         /* Disable the Rx interrupts for the first buffer */
         reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);
         __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
                      drvdata->base_addr + XEL_RSR_OFFSET);
-
-        /* Disable the Rx interrupts for the second buffer
-         * if configured in HW */
-        if (drvdata->rx_ping_pong != 0) {
-
-                reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
-                                   XEL_RSR_OFFSET);
-                __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
-                             drvdata->base_addr + XEL_BUFFER_OFFSET +
-                             XEL_RSR_OFFSET);
-        }
 }
 
 /**
@@ -258,6 +220,13 @@ static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
                 *to_u16_ptr++ = *from_u16_ptr++;
                 *to_u16_ptr++ = *from_u16_ptr++;
 
+                /* This barrier resolves occasional issues seen around
+                 * cases where the data is not properly flushed out
+                 * from the processor store buffers to the destination
+                 * memory locations.
+                 */
+                wmb();
+
                 /* Output a word */
                 *to_u32_ptr++ = align_buffer;
         }
@@ -273,6 +242,12 @@ static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
                 for (; length > 0; length--)
                         *to_u8_ptr++ = *from_u8_ptr++;
 
+                /* This barrier resolves occasional issues seen around
+                 * cases where the data is not properly flushed out
+                 * from the processor store buffers to the destination
+                 * memory locations.
+                 */
+                wmb();
                 *to_u32_ptr = align_buffer;
         }
 }
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index 9093004f9b63..2a89da080317 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -770,7 +770,7 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,
         int ret;
         int vnet_hdr_len = 0;
         int vlan_offset = 0;
-        int copied;
+        int copied, total;
 
         if (q->flags & IFF_VNET_HDR) {
                 struct virtio_net_hdr vnet_hdr;
@@ -785,7 +785,8 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,
                 if (memcpy_toiovecend(iv, (void *)&vnet_hdr, 0, sizeof(vnet_hdr)))
                         return -EFAULT;
         }
-        copied = vnet_hdr_len;
+        total = copied = vnet_hdr_len;
+        total += skb->len;
 
         if (!vlan_tx_tag_present(skb))
                 len = min_t(int, skb->len, len);
@@ -800,6 +801,7 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,
 
                 vlan_offset = offsetof(struct vlan_ethhdr, h_vlan_proto);
                 len = min_t(int, skb->len + VLAN_HLEN, len);
+                total += VLAN_HLEN;
 
                 copy = min_t(int, vlan_offset, len);
                 ret = skb_copy_datagram_const_iovec(skb, 0, iv, copied, copy);
@@ -817,10 +819,9 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,
         }
 
         ret = skb_copy_datagram_const_iovec(skb, vlan_offset, iv, copied, len);
-        copied += len;
 
 done:
-        return ret ? ret : copied;
+        return ret ? ret : total;
 }
 
 static ssize_t macvtap_do_read(struct macvtap_queue *q, struct kiocb *iocb,
@@ -875,7 +876,9 @@ static ssize_t macvtap_aio_read(struct kiocb *iocb, const struct iovec *iv,
         }
 
         ret = macvtap_do_read(q, iocb, iv, len, file->f_flags & O_NONBLOCK);
-        ret = min_t(ssize_t, ret, len); /* XXX copied from tun.c. Why? */
+        ret = min_t(ssize_t, ret, len);
+        if (ret > 0)
+                iocb->ki_pos = ret;
 out:
         return ret;
 }
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 3ae28f420868..26fa05a472b4 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -336,6 +336,21 @@ static struct phy_driver ksphy_driver[] = {
         .resume         = genphy_resume,
         .driver         = { .owner = THIS_MODULE,},
 }, {
+        .phy_id         = PHY_ID_KSZ8041RNLI,
+        .phy_id_mask    = 0x00fffff0,
+        .name           = "Micrel KSZ8041RNLI",
+        .features       = PHY_BASIC_FEATURES |
+                          SUPPORTED_Pause | SUPPORTED_Asym_Pause,
+        .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+        .config_init    = kszphy_config_init,
+        .config_aneg    = genphy_config_aneg,
+        .read_status    = genphy_read_status,
+        .ack_interrupt  = kszphy_ack_interrupt,
+        .config_intr    = kszphy_config_intr,
+        .suspend        = genphy_suspend,
+        .resume         = genphy_resume,
+        .driver         = { .owner = THIS_MODULE,},
+}, {
         .phy_id         = PHY_ID_KSZ8051,
         .phy_id_mask    = 0x00fffff0,
         .name           = "Micrel KSZ8051",
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 782e38bfc1ee..7c8343a4f918 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1184,7 +1184,7 @@ static ssize_t tun_put_user(struct tun_struct *tun,
 {
         struct tun_pi pi = { 0, skb->protocol };
         ssize_t total = 0;
-        int vlan_offset = 0;
+        int vlan_offset = 0, copied;
 
         if (!(tun->flags & TUN_NO_PI)) {
                 if ((len -= sizeof(pi)) < 0)
@@ -1248,6 +1248,8 @@ static ssize_t tun_put_user(struct tun_struct *tun,
                 total += tun->vnet_hdr_sz;
         }
 
+        copied = total;
+        total += skb->len;
         if (!vlan_tx_tag_present(skb)) {
                 len = min_t(int, skb->len, len);
         } else {
@@ -1262,24 +1264,24 @@ static ssize_t tun_put_user(struct tun_struct *tun,
 
                 vlan_offset = offsetof(struct vlan_ethhdr, h_vlan_proto);
                 len = min_t(int, skb->len + VLAN_HLEN, len);
+                total += VLAN_HLEN;
 
                 copy = min_t(int, vlan_offset, len);
-                ret = skb_copy_datagram_const_iovec(skb, 0, iv, total, copy);
+                ret = skb_copy_datagram_const_iovec(skb, 0, iv, copied, copy);
                 len -= copy;
-                total += copy;
+                copied += copy;
                 if (ret || !len)
                         goto done;
 
                 copy = min_t(int, sizeof(veth), len);
-                ret = memcpy_toiovecend(iv, (void *)&veth, total, copy);
+                ret = memcpy_toiovecend(iv, (void *)&veth, copied, copy);
                 len -= copy;
-                total += copy;
+                copied += copy;
                 if (ret || !len)
                         goto done;
         }
 
-        skb_copy_datagram_const_iovec(skb, vlan_offset, iv, total, len);
-        total += len;
+        skb_copy_datagram_const_iovec(skb, vlan_offset, iv, copied, len);
 
 done:
         tun->dev->stats.tx_packets++;
@@ -1356,6 +1358,8 @@ static ssize_t tun_chr_aio_read(struct kiocb *iocb, const struct iovec *iv,
         ret = tun_do_read(tun, tfile, iocb, iv, len,
                           file->f_flags & O_NONBLOCK);
         ret = min_t(ssize_t, ret, len);
+        if (ret > 0)
+                iocb->ki_pos = ret;
 out:
         tun_put(tun);
         return ret;
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 916241d16c67..d208f8604981 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -426,10 +426,10 @@ static void receive_buf(struct receive_queue *rq, void *buf, unsigned int len)
         if (unlikely(len < sizeof(struct virtio_net_hdr) + ETH_HLEN)) {
                 pr_debug("%s: short packet %i\n", dev->name, len);
                 dev->stats.rx_length_errors++;
-                if (vi->big_packets)
-                        give_pages(rq, buf);
-                else if (vi->mergeable_rx_bufs)
+                if (vi->mergeable_rx_bufs)
                         put_page(virt_to_head_page(buf));
+                else if (vi->big_packets)
+                        give_pages(rq, buf);
                 else
                         dev_kfree_skb(buf);
                 return;
@@ -1367,6 +1367,11 @@ static void virtnet_config_changed(struct virtio_device *vdev)
 
 static void virtnet_free_queues(struct virtnet_info *vi)
 {
+        int i;
+
+        for (i = 0; i < vi->max_queue_pairs; i++)
+                netif_napi_del(&vi->rq[i].napi);
+
         kfree(vi->rq);
         kfree(vi->sq);
 }
@@ -1396,10 +1401,10 @@ static void free_unused_bufs(struct virtnet_info *vi)
                 struct virtqueue *vq = vi->rq[i].vq;
 
                 while ((buf = virtqueue_detach_unused_buf(vq)) != NULL) {
-                        if (vi->big_packets)
-                                give_pages(&vi->rq[i], buf);
-                        else if (vi->mergeable_rx_bufs)
+                        if (vi->mergeable_rx_bufs)
                                 put_page(virt_to_head_page(buf));
+                        else if (vi->big_packets)
+                                give_pages(&vi->rq[i], buf);
                         else
                                 dev_kfree_skb(buf);
                         --vi->rq[i].num;
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c
index 0358c07f7669..249e01c5600c 100644
--- a/drivers/net/vxlan.c
+++ b/drivers/net/vxlan.c
@@ -1668,7 +1668,7 @@ static void vxlan_xmit_one(struct sk_buff *skb, struct net_device *dev,
                         netdev_dbg(dev, "circular route to %pI4\n",
                                    &dst->sin.sin_addr.s_addr);
                         dev->stats.collisions++;
-                        goto tx_error;
+                        goto rt_tx_error;
                 }
 
                 /* Bypass encapsulation if the destination is local */
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 1ec52356b5a1..130657db5c43 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3984,18 +3984,20 @@ static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
         int quick_drop;
         s32 t[3], f[3] = {5180, 5500, 5785};
 
-        if (!(pBase->miscConfiguration & BIT(1)))
+        if (!(pBase->miscConfiguration & BIT(4)))
                 return;
 
-        if (freq < 4000)
-                quick_drop = eep->modalHeader2G.quick_drop;
-        else {
-                t[0] = eep->base_ext1.quick_drop_low;
-                t[1] = eep->modalHeader5G.quick_drop;
-                t[2] = eep->base_ext1.quick_drop_high;
-                quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
+        if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9340(ah)) {
+                if (freq < 4000) {
+                        quick_drop = eep->modalHeader2G.quick_drop;
+                } else {
+                        t[0] = eep->base_ext1.quick_drop_low;
+                        t[1] = eep->modalHeader5G.quick_drop;
+                        t[2] = eep->base_ext1.quick_drop_high;
+                        quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
+                }
+                REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
         }
-        REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
 }
 
 static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
@@ -4035,7 +4037,7 @@ static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz)
         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
         u8 bias;
 
-        if (!(eep->baseEepHeader.featureEnable & 0x40))
+        if (!(eep->baseEepHeader.miscConfiguration & 0x40))
                 return;
 
         if (!AR_SREV_9300(ah))
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 54b04155e43b..8918035da3a3 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -146,10 +146,9 @@ static void ath9k_hw_set_clockrate(struct ath_hw *ah)
         else
                 clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM;
 
-        if (IS_CHAN_HT40(chan))
-                clockrate *= 2;
-
-        if (ah->curchan) {
+        if (chan) {
+                if (IS_CHAN_HT40(chan))
+                        clockrate *= 2;
                 if (IS_CHAN_HALF_RATE(chan))
                         clockrate /= 2;
                 if (IS_CHAN_QUARTER_RATE(chan))
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 09cdbcd09739..b5a19e098f2d 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -1276,6 +1276,10 @@ static void ath_tx_fill_desc(struct ath_softc *sc, struct ath_buf *bf,
                                 if (!rts_thresh || (len > rts_thresh))
                                         rts = true;
                         }
+
+                        if (!aggr)
+                                len = fi->framelen;
+
                         ath_buf_set_rate(sc, bf, &info, len, rts);
                 }
 
diff --git a/drivers/net/wireless/ath/wcn36xx/smd.c b/drivers/net/wireless/ath/wcn36xx/smd.c
index de9eb2cfbf4b..366339421d4f 100644
--- a/drivers/net/wireless/ath/wcn36xx/smd.c
+++ b/drivers/net/wireless/ath/wcn36xx/smd.c
@@ -2041,13 +2041,20 @@ static void wcn36xx_smd_rsp_process(struct wcn36xx *wcn, void *buf, size_t len)
         case WCN36XX_HAL_DELETE_STA_CONTEXT_IND:
                 mutex_lock(&wcn->hal_ind_mutex);
                 msg_ind = kmalloc(sizeof(*msg_ind), GFP_KERNEL);
-                msg_ind->msg_len = len;
-                msg_ind->msg = kmalloc(len, GFP_KERNEL);
-                memcpy(msg_ind->msg, buf, len);
-                list_add_tail(&msg_ind->list, &wcn->hal_ind_queue);
-                queue_work(wcn->hal_ind_wq, &wcn->hal_ind_work);
-                wcn36xx_dbg(WCN36XX_DBG_HAL, "indication arrived\n");
+                if (msg_ind) {
+                        msg_ind->msg_len = len;
+                        msg_ind->msg = kmalloc(len, GFP_KERNEL);
+                        memcpy(msg_ind->msg, buf, len);
+                        list_add_tail(&msg_ind->list, &wcn->hal_ind_queue);
+                        queue_work(wcn->hal_ind_wq, &wcn->hal_ind_work);
+                        wcn36xx_dbg(WCN36XX_DBG_HAL, "indication arrived\n");
+                }
                 mutex_unlock(&wcn->hal_ind_mutex);
+                if (msg_ind)
+                        break;
+                /* FIXME: Do something smarter then just printing an error. */
+                wcn36xx_err("Run out of memory while handling SMD_EVENT (%d)\n",
+                            msg_header->msg_type);
                 break;
         default:
                 wcn36xx_err("SMD_EVENT (%d) not supported\n",
diff --git a/drivers/net/wireless/brcm80211/Kconfig b/drivers/net/wireless/brcm80211/Kconfig
index b00a7e92225f..54e36fcb3954 100644
--- a/drivers/net/wireless/brcm80211/Kconfig
+++ b/drivers/net/wireless/brcm80211/Kconfig
@@ -5,6 +5,8 @@ config BRCMSMAC
         tristate "Broadcom IEEE802.11n PCIe SoftMAC WLAN driver"
         depends on MAC80211
         depends on BCMA
+        select NEW_LEDS if BCMA_DRIVER_GPIO
+        select LEDS_CLASS if BCMA_DRIVER_GPIO
         select BRCMUTIL
         select FW_LOADER
         select CRC_CCITT
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c
index 905704e335d7..abc9ceca70f3 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c
@@ -109,6 +109,8 @@ static inline int brcmf_sdioh_f0_write_byte(struct brcmf_sdio_dev *sdiodev,
                                         brcmf_err("Disable F2 failed:%d\n",
                                                   err_ret);
                         }
+                } else {
+                        err_ret = -ENOENT;
                 }
         } else if ((regaddr == SDIO_CCCR_ABORT) ||
                    (regaddr == SDIO_CCCR_IENx)) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-7000.c b/drivers/net/wireless/iwlwifi/iwl-7000.c
index 85879dbaa402..3c34a72a5d64 100644
--- a/drivers/net/wireless/iwlwifi/iwl-7000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-7000.c
@@ -67,8 +67,8 @@
 #include "iwl-agn-hw.h"
 
 /* Highest firmware API version supported */
-#define IWL7260_UCODE_API_MAX   7
-#define IWL3160_UCODE_API_MAX   7
+#define IWL7260_UCODE_API_MAX   8
+#define IWL3160_UCODE_API_MAX   8
 
 /* Oldest version we won't warn about */
 #define IWL7260_UCODE_API_OK    7
@@ -130,6 +130,7 @@ const struct iwl_cfg iwl7260_2ac_cfg = {
         .ht_params = &iwl7000_ht_params,
         .nvm_ver = IWL7260_NVM_VERSION,
         .nvm_calib_ver = IWL7260_TX_POWER_VERSION,
+        .host_interrupt_operation_mode = true,
 };
 
 const struct iwl_cfg iwl7260_2ac_cfg_high_temp = {
@@ -140,6 +141,7 @@ const struct iwl_cfg iwl7260_2ac_cfg_high_temp = {
         .nvm_ver = IWL7260_NVM_VERSION,
         .nvm_calib_ver = IWL7260_TX_POWER_VERSION,
         .high_temp = true,
+        .host_interrupt_operation_mode = true,
 };
 
 const struct iwl_cfg iwl7260_2n_cfg = {
@@ -149,6 +151,7 @@ const struct iwl_cfg iwl7260_2n_cfg = {
         .ht_params = &iwl7000_ht_params,
         .nvm_ver = IWL7260_NVM_VERSION,
         .nvm_calib_ver = IWL7260_TX_POWER_VERSION,
+        .host_interrupt_operation_mode = true,
 };
 
 const struct iwl_cfg iwl7260_n_cfg = {
@@ -158,6 +161,7 @@ const struct iwl_cfg iwl7260_n_cfg = {
         .ht_params = &iwl7000_ht_params,
         .nvm_ver = IWL7260_NVM_VERSION,
         .nvm_calib_ver = IWL7260_TX_POWER_VERSION,
+        .host_interrupt_operation_mode = true,
 };
 
 const struct iwl_cfg iwl3160_2ac_cfg = {
@@ -167,6 +171,7 @@ const struct iwl_cfg iwl3160_2ac_cfg = {
         .ht_params = &iwl7000_ht_params,
         .nvm_ver = IWL3160_NVM_VERSION,
         .nvm_calib_ver = IWL3160_TX_POWER_VERSION,
+        .host_interrupt_operation_mode = true,
 };
 
 const struct iwl_cfg iwl3160_2n_cfg = {
@@ -176,6 +181,7 @@ const struct iwl_cfg iwl3160_2n_cfg = {
         .ht_params = &iwl7000_ht_params,
         .nvm_ver = IWL3160_NVM_VERSION,
         .nvm_calib_ver = IWL3160_TX_POWER_VERSION,
+        .host_interrupt_operation_mode = true,
 };
 
 const struct iwl_cfg iwl3160_n_cfg = {
@@ -185,6 +191,7 @@ const struct iwl_cfg iwl3160_n_cfg = {
         .ht_params = &iwl7000_ht_params,
         .nvm_ver = IWL3160_NVM_VERSION,
         .nvm_calib_ver = IWL3160_TX_POWER_VERSION,
+        .host_interrupt_operation_mode = true,
 };
 
 const struct iwl_cfg iwl7265_2ac_cfg = {
@@ -196,5 +203,23 @@ const struct iwl_cfg iwl7265_2ac_cfg = {
         .nvm_calib_ver = IWL7265_TX_POWER_VERSION,
 };
 
+const struct iwl_cfg iwl7265_2n_cfg = {
+        .name = "Intel(R) Dual Band Wireless N 7265",
+        .fw_name_pre = IWL7265_FW_PRE,
+        IWL_DEVICE_7000,
+        .ht_params = &iwl7000_ht_params,
+        .nvm_ver = IWL7265_NVM_VERSION,
+        .nvm_calib_ver = IWL7265_TX_POWER_VERSION,
+};
+
+const struct iwl_cfg iwl7265_n_cfg = {
+        .name = "Intel(R) Wireless N 7265",
+        .fw_name_pre = IWL7265_FW_PRE,
+        IWL_DEVICE_7000,
+        .ht_params = &iwl7000_ht_params,
+        .nvm_ver = IWL7265_NVM_VERSION,
+        .nvm_calib_ver = IWL7265_TX_POWER_VERSION,
+};
+
 MODULE_FIRMWARE(IWL7260_MODULE_FIRMWARE(IWL7260_UCODE_API_OK));
 MODULE_FIRMWARE(IWL3160_MODULE_FIRMWARE(IWL3160_UCODE_API_OK));
diff --git a/drivers/net/wireless/iwlwifi/iwl-config.h b/drivers/net/wireless/iwlwifi/iwl-config.h
index 18f232e8e812..03fd9aa8bfda 100644
--- a/drivers/net/wireless/iwlwifi/iwl-config.h
+++ b/drivers/net/wireless/iwlwifi/iwl-config.h
@@ -207,6 +207,8 @@ struct iwl_eeprom_params {
  * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
  * @internal_wimax_coex: internal wifi/wimax combo device
  * @high_temp: Is this NIC is designated to be in high temperature.
+ * @host_interrupt_operation_mode: device needs host interrupt operation
+ *      mode set
  *
  * We enable the driver to be backward compatible wrt. hardware features.
  * API differences in uCode shouldn't be handled here but through TLVs
@@ -235,6 +237,7 @@ struct iwl_cfg {
         enum iwl_led_mode led_mode;
         const bool rx_with_siso_diversity;
         const bool internal_wimax_coex;
+        const bool host_interrupt_operation_mode;
         bool high_temp;
 };
 
@@ -294,6 +297,8 @@ extern const struct iwl_cfg iwl3160_2ac_cfg;
 extern const struct iwl_cfg iwl3160_2n_cfg;
 extern const struct iwl_cfg iwl3160_n_cfg;
 extern const struct iwl_cfg iwl7265_2ac_cfg;
+extern const struct iwl_cfg iwl7265_2n_cfg;
+extern const struct iwl_cfg iwl7265_n_cfg;
 #endif /* CONFIG_IWLMVM */
 
 #endif /* __IWL_CONFIG_H__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index 54a4fdc631b7..da4eca8b3007 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -495,14 +495,11 @@ enum secure_load_status_reg {
  * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
  *
  * default interrupt coalescing timer is 64 x 32 = 2048 usecs
- * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
  */
 #define IWL_HOST_INT_TIMEOUT_MAX        (0xFF)
 #define IWL_HOST_INT_TIMEOUT_DEF        (0x40)
 #define IWL_HOST_INT_TIMEOUT_MIN        (0x0)
-#define IWL_HOST_INT_CALIB_TIMEOUT_MAX  (0xFF)
-#define IWL_HOST_INT_CALIB_TIMEOUT_DEF  (0x10)
-#define IWL_HOST_INT_CALIB_TIMEOUT_MIN  (0x0)
+#define IWL_HOST_INT_OPER_MODE          BIT(31)
 
 /*****************************************************************************
  *                        7000/3000 series SHR DTS addresses                 *
diff --git a/drivers/net/wireless/iwlwifi/mvm/bt-coex.c b/drivers/net/wireless/iwlwifi/mvm/bt-coex.c
index 5d066cbc5ac7..75b72a956552 100644
--- a/drivers/net/wireless/iwlwifi/mvm/bt-coex.c
+++ b/drivers/net/wireless/iwlwifi/mvm/bt-coex.c
@@ -391,7 +391,6 @@ int iwl_send_bt_init_conf(struct iwl_mvm *mvm)
                                             BT_VALID_LUT |
                                             BT_VALID_WIFI_RX_SW_PRIO_BOOST |
                                             BT_VALID_WIFI_TX_SW_PRIO_BOOST |
-                                            BT_VALID_MULTI_PRIO_LUT |
                                             BT_VALID_CORUN_LUT_20 |
                                             BT_VALID_CORUN_LUT_40 |
                                             BT_VALID_ANT_ISOLATION |
@@ -842,6 +841,11 @@ static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac,
 
         sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id],
                                         lockdep_is_held(&mvm->mutex));
+
+        /* This can happen if the station has been removed right now */
+        if (IS_ERR_OR_NULL(sta))
+                return;
+
         mvmsta = (void *)sta->drv_priv;
 
         data->num_bss_ifaces++;
diff --git a/drivers/net/wireless/iwlwifi/mvm/d3.c b/drivers/net/wireless/iwlwifi/mvm/d3.c
index 6f45966817bb..b9b81e881dd0 100644
--- a/drivers/net/wireless/iwlwifi/mvm/d3.c
+++ b/drivers/net/wireless/iwlwifi/mvm/d3.c
@@ -895,7 +895,7 @@ static int iwl_mvm_get_last_nonqos_seq(struct iwl_mvm *mvm,
                 /* new API returns next, not last-used seqno */
                 if (mvm->fw->ucode_capa.flags &
                                 IWL_UCODE_TLV_FLAGS_D3_CONTINUITY_API)
-                        err -= 0x10;
+                        err = (u16) (err - 0x10);
         }
 
         iwl_free_resp(&cmd);
@@ -1549,7 +1549,7 @@ static bool iwl_mvm_setup_connection_keep(struct iwl_mvm *mvm,
         if (gtkdata.unhandled_cipher)
                 return false;
         if (!gtkdata.num_keys)
-                return true;
+                goto out;
         if (!gtkdata.last_gtk)
                 return false;
 
@@ -1600,6 +1600,7 @@ static bool iwl_mvm_setup_connection_keep(struct iwl_mvm *mvm,
                                            (void *)&replay_ctr, GFP_KERNEL);
         }
 
+out:
         mvmvif->seqno_valid = true;
         /* +0x10 because the set API expects next-to-use, not last-used */
         mvmvif->seqno = le16_to_cpu(status->non_qos_seq_ctr) + 0x10;
diff --git a/drivers/net/wireless/iwlwifi/mvm/debugfs.c b/drivers/net/wireless/iwlwifi/mvm/debugfs.c
index 9864d713eb2c..a8fe6b41f9a3 100644
--- a/drivers/net/wireless/iwlwifi/mvm/debugfs.c
+++ b/drivers/net/wireless/iwlwifi/mvm/debugfs.c
@@ -119,6 +119,10 @@ static ssize_t iwl_dbgfs_sta_drain_write(struct file *file,
 
         if (sscanf(buf, "%d %d", &sta_id, &drain) != 2)
                 return -EINVAL;
+        if (sta_id < 0 || sta_id >= IWL_MVM_STATION_COUNT)
+                return -EINVAL;
+        if (drain < 0 || drain > 1)
+                return -EINVAL;
 
         mutex_lock(&mvm->mutex);
 
diff --git a/drivers/net/wireless/iwlwifi/mvm/time-event.c b/drivers/net/wireless/iwlwifi/mvm/time-event.c
index 33cf56fdfc41..95ce4b601fef 100644
--- a/drivers/net/wireless/iwlwifi/mvm/time-event.c
+++ b/drivers/net/wireless/iwlwifi/mvm/time-event.c
@@ -176,8 +176,11 @@ static void iwl_mvm_te_handle_notif(struct iwl_mvm *mvm,
          * P2P Device discoveribility, while there are other higher priority
          * events in the system).
          */
-        if (WARN_ONCE(!le32_to_cpu(notif->status),
-                      "Failed to schedule time event\n")) {
+        if (!le32_to_cpu(notif->status)) {
+                bool start = le32_to_cpu(notif->action) &
+                                TE_V2_NOTIF_HOST_EVENT_START;
+                IWL_WARN(mvm, "Time Event %s notification failure\n",
+                         start ? "start" : "end");
                 if (iwl_mvm_te_check_disconnect(mvm, te_data->vif, NULL)) {
                         iwl_mvm_te_clear_data(mvm, te_data);
                         return;
diff --git a/drivers/net/wireless/iwlwifi/pcie/drv.c b/drivers/net/wireless/iwlwifi/pcie/drv.c
index 941c0c88f982..86605027c41d 100644
--- a/drivers/net/wireless/iwlwifi/pcie/drv.c
+++ b/drivers/net/wireless/iwlwifi/pcie/drv.c
@@ -353,6 +353,27 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
 
 /* 7265 Series */
         {IWL_PCI_DEVICE(0x095A, 0x5010, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5110, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x5310, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x5302, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x5210, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x5012, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x500A, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5410, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x1010, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5000, iwl7265_2n_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x5200, iwl7265_2n_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5002, iwl7265_n_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x5202, iwl7265_n_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x9010, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x9210, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x9410, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5020, iwl7265_2n_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x502A, iwl7265_2n_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5420, iwl7265_2n_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5090, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095B, 0x5290, iwl7265_2ac_cfg)},
+        {IWL_PCI_DEVICE(0x095A, 0x5490, iwl7265_2ac_cfg)},
 #endif /* CONFIG_IWLMVM */
 
         {0}
diff --git a/drivers/net/wireless/iwlwifi/pcie/internal.h b/drivers/net/wireless/iwlwifi/pcie/internal.h
index fa22639b63c9..051268c037b1 100644
--- a/drivers/net/wireless/iwlwifi/pcie/internal.h
+++ b/drivers/net/wireless/iwlwifi/pcie/internal.h
@@ -477,4 +477,12 @@ static inline bool iwl_is_rfkill_set(struct iwl_trans *trans)
                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
 }
 
+static inline void iwl_nic_error(struct iwl_trans *trans)
+{
+        struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
+
+        set_bit(STATUS_FW_ERROR, &trans_pcie->status);
+        iwl_op_mode_nic_error(trans->op_mode);
+}
+
 #endif /* __iwl_trans_int_pcie_h__ */
diff --git a/drivers/net/wireless/iwlwifi/pcie/rx.c b/drivers/net/wireless/iwlwifi/pcie/rx.c
index 3f237b42eb36..be3995afa9d0 100644
--- a/drivers/net/wireless/iwlwifi/pcie/rx.c
+++ b/drivers/net/wireless/iwlwifi/pcie/rx.c
@@ -489,6 +489,10 @@ static void iwl_pcie_rx_hw_init(struct iwl_trans *trans, struct iwl_rxq *rxq)
 
         /* Set interrupt coalescing timer to default (2048 usecs) */
         iwl_write8(trans, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
+
+        /* W/A for interrupt coalescing bug in 7260 and 3160 */
+        if (trans->cfg->host_interrupt_operation_mode)
+                iwl_set_bit(trans, CSR_INT_COALESCING, IWL_HOST_INT_OPER_MODE);
 }
 
 static void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq)
@@ -796,12 +800,13 @@ static void iwl_pcie_irq_handle_error(struct iwl_trans *trans)
         iwl_pcie_dump_csr(trans);
         iwl_dump_fh(trans, NULL);
 
+        /* set the ERROR bit before we wake up the caller */
         set_bit(STATUS_FW_ERROR, &trans_pcie->status);
         clear_bit(STATUS_HCMD_ACTIVE, &trans_pcie->status);
         wake_up(&trans_pcie->wait_command_queue);
 
         local_bh_disable();
-        iwl_op_mode_nic_error(trans->op_mode);
+        iwl_nic_error(trans);
         local_bh_enable();
 }
 
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c
index 5d9337bec67a..cde9c16f6e4f 100644
--- a/drivers/net/wireless/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/iwlwifi/pcie/trans.c
@@ -279,9 +279,6 @@ static int iwl_pcie_nic_init(struct iwl_trans *trans)
         spin_lock_irqsave(&trans_pcie->irq_lock, flags);
         iwl_pcie_apm_init(trans);
 
-        /* Set interrupt coalescing calibration timer to default (512 usecs) */
-        iwl_write8(trans, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
-
         spin_unlock_irqrestore(&trans_pcie->irq_lock, flags);
 
         iwl_pcie_set_pwr(trans, false);
diff --git a/drivers/net/wireless/iwlwifi/pcie/tx.c b/drivers/net/wireless/iwlwifi/pcie/tx.c
index 059c5acad3a0..0adde919a258 100644
--- a/drivers/net/wireless/iwlwifi/pcie/tx.c
+++ b/drivers/net/wireless/iwlwifi/pcie/tx.c
@@ -207,7 +207,7 @@ static void iwl_pcie_txq_stuck_timer(unsigned long data)
                 IWL_ERR(trans, "scratch %d = 0x%08x\n", i,
                         le32_to_cpu(txq->scratchbufs[i].scratch));
 
-        iwl_op_mode_nic_error(trans->op_mode);
+        iwl_nic_error(trans);
 }
 
 /*
@@ -1023,7 +1023,7 @@ static void iwl_pcie_cmdq_reclaim(struct iwl_trans *trans, int txq_id, int idx)
                 if (nfreed++ > 0) {
                         IWL_ERR(trans, "HCMD skipped: index (%d) %d %d\n",
                                 idx, q->write_ptr, q->read_ptr);
-                        iwl_op_mode_nic_error(trans->op_mode);
+                        iwl_nic_error(trans);
                 }
         }
 
@@ -1562,7 +1562,7 @@ static int iwl_pcie_send_hcmd_sync(struct iwl_trans *trans,
                                        get_cmd_string(trans_pcie, cmd->id));
                         ret = -ETIMEDOUT;
 
-                        iwl_op_mode_nic_error(trans->op_mode);
+                        iwl_nic_error(trans);
 
                         goto cancel;
                 }
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index 9df7bc91a26f..c72438bb2faf 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -383,6 +383,14 @@ struct hwsim_radiotap_hdr {
         __le16 rt_chbitmask;
 } __packed;
 
+struct hwsim_radiotap_ack_hdr {
+        struct ieee80211_radiotap_header hdr;
+        u8 rt_flags;
+        u8 pad;
+        __le16 rt_channel;
+        __le16 rt_chbitmask;
+} __packed;
+
 /* MAC80211_HWSIM netlinf family */
 static struct genl_family hwsim_genl_family = {
         .id = GENL_ID_GENERATE,
@@ -500,7 +508,7 @@ static void mac80211_hwsim_monitor_ack(struct ieee80211_channel *chan,
                                        const u8 *addr)
 {
         struct sk_buff *skb;
-        struct hwsim_radiotap_hdr *hdr;
+        struct hwsim_radiotap_ack_hdr *hdr;
         u16 flags;
         struct ieee80211_hdr *hdr11;
 
@@ -511,14 +519,14 @@ static void mac80211_hwsim_monitor_ack(struct ieee80211_channel *chan,
         if (skb == NULL)
                 return;
 
-        hdr = (struct hwsim_radiotap_hdr *) skb_put(skb, sizeof(*hdr));
+        hdr = (struct hwsim_radiotap_ack_hdr *) skb_put(skb, sizeof(*hdr));
         hdr->hdr.it_version = PKTHDR_RADIOTAP_VERSION;
         hdr->hdr.it_pad = 0;
         hdr->hdr.it_len = cpu_to_le16(sizeof(*hdr));
         hdr->hdr.it_present = cpu_to_le32((1 << IEEE80211_RADIOTAP_FLAGS) |
                                           (1 << IEEE80211_RADIOTAP_CHANNEL));
         hdr->rt_flags = 0;
-        hdr->rt_rate = 0;
+        hdr->pad = 0;
         hdr->rt_channel = cpu_to_le16(chan->center_freq);
         flags = IEEE80211_CHAN_2GHZ;
         hdr->rt_chbitmask = cpu_to_le16(flags);
@@ -1230,7 +1238,7 @@ static void mac80211_hwsim_bss_info_changed(struct ieee80211_hw *hw,
                                               HRTIMER_MODE_REL);
                 } else if (!info->enable_beacon) {
                         unsigned int count = 0;
-                        ieee80211_iterate_active_interfaces(
+                        ieee80211_iterate_active_interfaces_atomic(
                                 data->hw, IEEE80211_IFACE_ITER_NORMAL,
                                 mac80211_hwsim_bcn_en_iter, &count);
                         wiphy_debug(hw->wiphy, "  beaconing vifs remaining: %u",
diff --git a/drivers/net/wireless/mwifiex/sta_ioctl.c b/drivers/net/wireless/mwifiex/sta_ioctl.c
index c8e029df770e..a09398fe9e2a 100644
--- a/drivers/net/wireless/mwifiex/sta_ioctl.c
+++ b/drivers/net/wireless/mwifiex/sta_ioctl.c
@@ -319,8 +319,8 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,
                 if (bss_desc && bss_desc->ssid.ssid_len &&
                     (!mwifiex_ssid_cmp(&priv->curr_bss_params.bss_descriptor.
                                        ssid, &bss_desc->ssid))) {
-                        kfree(bss_desc);
-                        return 0;
+                        ret = 0;
+                        goto done;
                 }
 
                 /* Exit Adhoc mode first */
diff --git a/drivers/net/xen-netback/interface.c b/drivers/net/xen-netback/interface.c
index 2329cccf1fa6..870f1fa58370 100644
--- a/drivers/net/xen-netback/interface.c
+++ b/drivers/net/xen-netback/interface.c
@@ -368,11 +368,11 @@ int xenvif_connect(struct xenvif *vif, unsigned long tx_ring_ref,
                    unsigned long rx_ring_ref, unsigned int tx_evtchn,
                    unsigned int rx_evtchn)
 {
+        struct task_struct *task;
         int err = -ENOMEM;
 
-        /* Already connected through? */
-        if (vif->tx_irq)
-                return 0;
+        BUG_ON(vif->tx_irq);
+        BUG_ON(vif->task);
 
         err = xenvif_map_frontend_rings(vif, tx_ring_ref, rx_ring_ref);
         if (err < 0)
@@ -411,14 +411,16 @@ int xenvif_connect(struct xenvif *vif, unsigned long tx_ring_ref,
         }
 
         init_waitqueue_head(&vif->wq);
-        vif->task = kthread_create(xenvif_kthread,
-                                   (void *)vif, "%s", vif->dev->name);
-        if (IS_ERR(vif->task)) {
+        task = kthread_create(xenvif_kthread,
+                              (void *)vif, "%s", vif->dev->name);
+        if (IS_ERR(task)) {
                 pr_warn("Could not allocate kthread for %s\n", vif->dev->name);
-                err = PTR_ERR(vif->task);
+                err = PTR_ERR(task);
                 goto err_rx_unbind;
         }
 
+        vif->task = task;
+
         rtnl_lock();
         if (!vif->can_sg && vif->dev->mtu > ETH_DATA_LEN)
                 dev_set_mtu(vif->dev, ETH_DATA_LEN);
@@ -461,8 +463,10 @@ void xenvif_disconnect(struct xenvif *vif)
         if (netif_carrier_ok(vif->dev))
                 xenvif_carrier_off(vif);
 
-        if (vif->task)
+        if (vif->task) {
                 kthread_stop(vif->task);
+                vif->task = NULL;
+        }
 
         if (vif->tx_irq) {
                 if (vif->tx_irq == vif->rx_irq)
diff --git a/drivers/net/xen-netback/netback.c b/drivers/net/xen-netback/netback.c
index 64f0e0d18b81..e884ee1fe7ed 100644
--- a/drivers/net/xen-netback/netback.c
+++ b/drivers/net/xen-netback/netback.c
@@ -452,7 +452,7 @@ static int xenvif_gop_skb(struct sk_buff *skb,
         }
 
         /* Set up a GSO prefix descriptor, if necessary */
-        if ((1 << skb_shinfo(skb)->gso_type) & vif->gso_prefix_mask) {
+        if ((1 << gso_type) & vif->gso_prefix_mask) {
                 req = RING_GET_REQUEST(&vif->rx, vif->rx.req_cons++);
                 meta = npo->meta + npo->meta_prod++;
                 meta->gso_type = gso_type;
@@ -1149,75 +1149,92 @@ static int xenvif_set_skb_gso(struct xenvif *vif,
         return 0;
 }
 
-static inline void maybe_pull_tail(struct sk_buff *skb, unsigned int len)
+static inline int maybe_pull_tail(struct sk_buff *skb, unsigned int len,
+                                  unsigned int max)
 {
-        if (skb_is_nonlinear(skb) && skb_headlen(skb) < len) {
-                /* If we need to pullup then pullup to the max, so we
-                 * won't need to do it again.
-                 */
-                int target = min_t(int, skb->len, MAX_TCP_HEADER);
-                __pskb_pull_tail(skb, target - skb_headlen(skb));
-        }
+        if (skb_headlen(skb) >= len)
+                return 0;
+
+        /* If we need to pullup then pullup to the max, so we
+         * won't need to do it again.
+         */
+        if (max > skb->len)
+                max = skb->len;
+
+        if (__pskb_pull_tail(skb, max - skb_headlen(skb)) == NULL)
+                return -ENOMEM;
+
+        if (skb_headlen(skb) < len)
+                return -EPROTO;
+
+        return 0;
 }
 
+/* This value should be large enough to cover a tagged ethernet header plus
+ * maximally sized IP and TCP or UDP headers.
+ */
+#define MAX_IP_HDR_LEN 128
+
 static int checksum_setup_ip(struct xenvif *vif, struct sk_buff *skb,
                              int recalculate_partial_csum)
 {
-        struct iphdr *iph = (void *)skb->data;
-        unsigned int header_size;
         unsigned int off;
-        int err = -EPROTO;
+        bool fragment;
+        int err;
 
-        off = sizeof(struct iphdr);
+        fragment = false;
 
-        header_size = skb->network_header + off + MAX_IPOPTLEN;
-        maybe_pull_tail(skb, header_size);
+        err = maybe_pull_tail(skb,
+                              sizeof(struct iphdr),
+                              MAX_IP_HDR_LEN);
+        if (err < 0)
+                goto out;
 
-        off = iph->ihl * 4;
+        if (ip_hdr(skb)->frag_off & htons(IP_OFFSET | IP_MF))
+                fragment = true;
 
-        switch (iph->protocol) {
+        off = ip_hdrlen(skb);
+
+        err = -EPROTO;
+
+        switch (ip_hdr(skb)->protocol) {
         case IPPROTO_TCP:
+                err = maybe_pull_tail(skb,
+                                      off + sizeof(struct tcphdr),
+                                      MAX_IP_HDR_LEN);
+                if (err < 0)
+                        goto out;
+
                 if (!skb_partial_csum_set(skb, off,
                                           offsetof(struct tcphdr, check)))
                         goto out;
 
-                if (recalculate_partial_csum) {
-                        struct tcphdr *tcph = tcp_hdr(skb);
-
-                        header_size = skb->network_header +
-                                off +
-                                sizeof(struct tcphdr);
-                        maybe_pull_tail(skb, header_size);
-
-                        tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
-                                                         skb->len - off,
-                                                         IPPROTO_TCP, 0);
-                }
+                if (recalculate_partial_csum)
+                        tcp_hdr(skb)->check =
+                                ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
+                                                   ip_hdr(skb)->daddr,
+                                                   skb->len - off,
+                                                   IPPROTO_TCP, 0);
                 break;
         case IPPROTO_UDP:
+                err = maybe_pull_tail(skb,
+                                      off + sizeof(struct udphdr),
+                                      MAX_IP_HDR_LEN);
+                if (err < 0)
+                        goto out;
+
                 if (!skb_partial_csum_set(skb, off,
                                           offsetof(struct udphdr, check)))
                         goto out;
 
-                if (recalculate_partial_csum) {
-                        struct udphdr *udph = udp_hdr(skb);
-
-                        header_size = skb->network_header +
-                                off +
-                                sizeof(struct udphdr);
-                        maybe_pull_tail(skb, header_size);
-
-                        udph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
-                                                         skb->len - off,
-                                                         IPPROTO_UDP, 0);
-                }
+                if (recalculate_partial_csum)
+                        udp_hdr(skb)->check =
+                                ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
+                                                   ip_hdr(skb)->daddr,
+                                                   skb->len - off,
+                                                   IPPROTO_UDP, 0);
                 break;
         default:
-                if (net_ratelimit())
-                        netdev_err(vif->dev,
-                                   "Attempting to checksum a non-TCP/UDP packet, "
-                                   "dropping a protocol %d packet\n",
-                                   iph->protocol);
                 goto out;
         }
 
@@ -1227,121 +1244,138 @@ out:
         return err;
 }
 
+/* This value should be large enough to cover a tagged ethernet header plus
+ * an IPv6 header, all options, and a maximal TCP or UDP header.
+ */
+#define MAX_IPV6_HDR_LEN 256
+
+#define OPT_HDR(type, skb, off) \
+        (type *)(skb_network_header(skb) + (off))
+
 static int checksum_setup_ipv6(struct xenvif *vif, struct sk_buff *skb,
                                int recalculate_partial_csum)
 {
-        int err = -EPROTO;
-        struct ipv6hdr *ipv6h = (void *)skb->data;
+        int err;
         u8 nexthdr;
-        unsigned int header_size;
         unsigned int off;
+        unsigned int len;
         bool fragment;
         bool done;
 
+        fragment = false;
         done = false;
 
         off = sizeof(struct ipv6hdr);
 
-        header_size = skb->network_header + off;
-        maybe_pull_tail(skb, header_size);
+        err = maybe_pull_tail(skb, off, MAX_IPV6_HDR_LEN);
+        if (err < 0)
+                goto out;
 
-        nexthdr = ipv6h->nexthdr;
+        nexthdr = ipv6_hdr(skb)->nexthdr;
 
-        while ((off <= sizeof(struct ipv6hdr) + ntohs(ipv6h->payload_len)) &&
-               !done) {
+        len = sizeof(struct ipv6hdr) + ntohs(ipv6_hdr(skb)->payload_len);
+        while (off <= len && !done) {
                 switch (nexthdr) {
                 case IPPROTO_DSTOPTS:
                 case IPPROTO_HOPOPTS:
                 case IPPROTO_ROUTING: {
-                        struct ipv6_opt_hdr *hp = (void *)(skb->data + off);
+                        struct ipv6_opt_hdr *hp;
 
-                        header_size = skb->network_header +
-                                off +
-                                sizeof(struct ipv6_opt_hdr);
-                        maybe_pull_tail(skb, header_size);
+                        err = maybe_pull_tail(skb,
+                                              off +
+                                              sizeof(struct ipv6_opt_hdr),
+                                              MAX_IPV6_HDR_LEN);
+                        if (err < 0)
+                                goto out;
 
+                        hp = OPT_HDR(struct ipv6_opt_hdr, skb, off);
                         nexthdr = hp->nexthdr;
                         off += ipv6_optlen(hp);
                         break;
                 }
                 case IPPROTO_AH: {
-                        struct ip_auth_hdr *hp = (void *)(skb->data + off);
+                        struct ip_auth_hdr *hp;
 
-                        header_size = skb->network_header +
-                                off +
-                                sizeof(struct ip_auth_hdr);
-                        maybe_pull_tail(skb, header_size);
+                        err = maybe_pull_tail(skb,
+                                              off +
+                                              sizeof(struct ip_auth_hdr),
+                                              MAX_IPV6_HDR_LEN);
+                        if (err < 0)
+                                goto out;
 
+                        hp = OPT_HDR(struct ip_auth_hdr, skb, off);
                         nexthdr = hp->nexthdr;
-                        off += (hp->hdrlen+2)<<2;
+                        off += ipv6_authlen(hp);
+                        break;
+                }
+                case IPPROTO_FRAGMENT: {
+                        struct frag_hdr *hp;
+
+                        err = maybe_pull_tail(skb,
+                                              off +
+                                              sizeof(struct frag_hdr),
+                                              MAX_IPV6_HDR_LEN);
+                        if (err < 0)
+                                goto out;
+
+                        hp = OPT_HDR(struct frag_hdr, skb, off);
+
+                        if (hp->frag_off & htons(IP6_OFFSET | IP6_MF))
+                                fragment = true;
+
+                        nexthdr = hp->nexthdr;
+                        off += sizeof(struct frag_hdr);
                         break;
                 }
-                case IPPROTO_FRAGMENT:
-                        fragment = true;
-                        /* fall through */
                 default:
                         done = true;
                         break;
                 }
         }
 
-        if (!done) {
-                if (net_ratelimit())
-                        netdev_err(vif->dev, "Failed to parse packet header\n");
-                goto out;
-        }
+        err = -EPROTO;
 
-        if (fragment) {
-                if (net_ratelimit())
-                        netdev_err(vif->dev, "Packet is a fragment!\n");
+        if (!done || fragment)
                 goto out;
-        }
 
         switch (nexthdr) {
         case IPPROTO_TCP:
+                err = maybe_pull_tail(skb,
+                                      off + sizeof(struct tcphdr),
+                                      MAX_IPV6_HDR_LEN);
+                if (err < 0)
+                        goto out;
+
                 if (!skb_partial_csum_set(skb, off,
                                           offsetof(struct tcphdr, check)))
                         goto out;
 
-                if (recalculate_partial_csum) {
-                        struct tcphdr *tcph = tcp_hdr(skb);
-
-                        header_size = skb->network_header +
-                                off +
-                                sizeof(struct tcphdr);
-                        maybe_pull_tail(skb, header_size);
-
-                        tcph->check = ~csum_ipv6_magic(&ipv6h->saddr,
-                                                       &ipv6h->daddr,
-                                                       skb->len - off,
-                                                       IPPROTO_TCP, 0);
-                }
+                if (recalculate_partial_csum)
+                        tcp_hdr(skb)->check =
+                                ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
+                                                 &ipv6_hdr(skb)->daddr,
+                                                 skb->len - off,
+                                                 IPPROTO_TCP, 0);
                 break;
         case IPPROTO_UDP:
+                err = maybe_pull_tail(skb,
+                                      off + sizeof(struct udphdr),
+                                      MAX_IPV6_HDR_LEN);
+                if (err < 0)
+                        goto out;
+
                 if (!skb_partial_csum_set(skb, off,
                                           offsetof(struct udphdr, check)))
                         goto out;
 
-                if (recalculate_partial_csum) {
-                        struct udphdr *udph = udp_hdr(skb);
-
-                        header_size = skb->network_header +
-                                off +
-                                sizeof(struct udphdr);
-                        maybe_pull_tail(skb, header_size);
-
-                        udph->check = ~csum_ipv6_magic(&ipv6h->saddr,
-                                                       &ipv6h->daddr,
-                                                       skb->len - off,
-                                                       IPPROTO_UDP, 0);
-                }
+                if (recalculate_partial_csum)
+                        udp_hdr(skb)->check =
+                                ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
+                                                 &ipv6_hdr(skb)->daddr,
+                                                 skb->len - off,
+                                                 IPPROTO_UDP, 0);
                 break;
         default:
-                if (net_ratelimit())
-                        netdev_err(vif->dev,
-                                   "Attempting to checksum a non-TCP/UDP packet, "
-                                   "dropping a protocol %d packet\n",
-                                   nexthdr);
                 goto out;
         }
 
@@ -1411,14 +1445,15 @@ static bool tx_credit_exceeded(struct xenvif *vif, unsigned size)
         return false;
 }
 
-static unsigned xenvif_tx_build_gops(struct xenvif *vif)
+static unsigned xenvif_tx_build_gops(struct xenvif *vif, int budget)
 {
         struct gnttab_copy *gop = vif->tx_copy_ops, *request_gop;
         struct sk_buff *skb;
         int ret;
 
         while ((nr_pending_reqs(vif) + XEN_NETBK_LEGACY_SLOTS_MAX
-                < MAX_PENDING_REQS)) {
+                < MAX_PENDING_REQS) &&
+               (skb_queue_len(&vif->tx_queue) < budget)) {
                 struct xen_netif_tx_request txreq;
                 struct xen_netif_tx_request txfrags[XEN_NETBK_LEGACY_SLOTS_MAX];
                 struct page *page;
@@ -1440,7 +1475,7 @@ static unsigned xenvif_tx_build_gops(struct xenvif *vif)
                         continue;
                 }
 
-                RING_FINAL_CHECK_FOR_REQUESTS(&vif->tx, work_to_do);
+                work_to_do = RING_HAS_UNCONSUMED_REQUESTS(&vif->tx);
                 if (!work_to_do)
                         break;
 
@@ -1580,14 +1615,13 @@ static unsigned xenvif_tx_build_gops(struct xenvif *vif)
 }
 
 
-static int xenvif_tx_submit(struct xenvif *vif, int budget)
+static int xenvif_tx_submit(struct xenvif *vif)
 {
         struct gnttab_copy *gop = vif->tx_copy_ops;
         struct sk_buff *skb;
         int work_done = 0;
 
-        while (work_done < budget &&
-               (skb = __skb_dequeue(&vif->tx_queue)) != NULL) {
+        while ((skb = __skb_dequeue(&vif->tx_queue)) != NULL) {
                 struct xen_netif_tx_request *txp;
                 u16 pending_idx;
                 unsigned data_len;
@@ -1662,14 +1696,14 @@ int xenvif_tx_action(struct xenvif *vif, int budget)
         if (unlikely(!tx_work_todo(vif)))
                 return 0;
 
-        nr_gops = xenvif_tx_build_gops(vif);
+        nr_gops = xenvif_tx_build_gops(vif, budget);
 
         if (nr_gops == 0)
                 return 0;
 
         gnttab_batch_copy(vif->tx_copy_ops, nr_gops);
 
-        work_done = xenvif_tx_submit(vif, nr_gops);
+        work_done = xenvif_tx_submit(vif);
 
         return work_done;
 }
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index c269e430c760..2aa7b77c7c88 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -447,6 +447,11 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port,
                 *value = 0;
                 break;
 
+        case PCI_INTERRUPT_LINE:
+                /* LINE PIN MIN_GNT MAX_LAT */
+                *value = 0;
+                break;
+
         default:
                 *value = 0xffffffff;
                 return PCIBIOS_BAD_REGISTER_NUMBER;
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 0afbbbc55c81..0175041ab728 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -25,7 +25,6 @@
  */
 
 #include <linux/clk.h>
-#include <linux/clk/tegra.h>
 #include <linux/delay.h>
 #include <linux/export.h>
 #include <linux/interrupt.h>
@@ -39,6 +38,7 @@
 #include <linux/of_platform.h>
 #include <linux/pci.h>
 #include <linux/platform_device.h>
+#include <linux/reset.h>
 #include <linux/sizes.h>
 #include <linux/slab.h>
 #include <linux/tegra-cpuidle.h>
@@ -259,10 +259,13 @@ struct tegra_pcie {
 
         struct clk *pex_clk;
         struct clk *afi_clk;
-        struct clk *pcie_xclk;
         struct clk *pll_e;
         struct clk *cml_clk;
 
+        struct reset_control *pex_rst;
+        struct reset_control *afi_rst;
+        struct reset_control *pcie_xrst;
+
         struct tegra_msi msi;
 
         struct list_head ports;
@@ -858,7 +861,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
         pads_writel(pcie, value, PADS_CTL);
 
         /* take the PCIe interface module out of reset */
-        tegra_periph_reset_deassert(pcie->pcie_xclk);
+        reset_control_deassert(pcie->pcie_xrst);
 
         /* finally enable PCIe */
         value = afi_readl(pcie, AFI_CONFIGURATION);
@@ -891,9 +894,9 @@ static void tegra_pcie_power_off(struct tegra_pcie *pcie)
 
         /* TODO: disable and unprepare clocks? */
 
-        tegra_periph_reset_assert(pcie->pcie_xclk);
-        tegra_periph_reset_assert(pcie->afi_clk);
-        tegra_periph_reset_assert(pcie->pex_clk);
+        reset_control_assert(pcie->pcie_xrst);
+        reset_control_assert(pcie->afi_rst);
+        reset_control_assert(pcie->pex_rst);
 
         tegra_powergate_power_off(TEGRA_POWERGATE_PCIE);
 
@@ -921,9 +924,9 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
         const struct tegra_pcie_soc_data *soc = pcie->soc_data;
         int err;
 
-        tegra_periph_reset_assert(pcie->pcie_xclk);
-        tegra_periph_reset_assert(pcie->afi_clk);
-        tegra_periph_reset_assert(pcie->pex_clk);
+        reset_control_assert(pcie->pcie_xrst);
+        reset_control_assert(pcie->afi_rst);
+        reset_control_assert(pcie->pex_rst);
 
         tegra_powergate_power_off(TEGRA_POWERGATE_PCIE);
 
@@ -952,13 +955,14 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
         }
 
         err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE,
-                                                pcie->pex_clk);
+                                                pcie->pex_clk,
+                                                pcie->pex_rst);
         if (err) {
                 dev_err(pcie->dev, "powerup sequence failed: %d\n", err);
                 return err;
         }
 
-        tegra_periph_reset_deassert(pcie->afi_clk);
+        reset_control_deassert(pcie->afi_rst);
 
         err = clk_prepare_enable(pcie->afi_clk);
         if (err < 0) {
@@ -996,10 +1000,6 @@ static int tegra_pcie_clocks_get(struct tegra_pcie *pcie)
         if (IS_ERR(pcie->afi_clk))
                 return PTR_ERR(pcie->afi_clk);
 
-        pcie->pcie_xclk = devm_clk_get(pcie->dev, "pcie_xclk");
-        if (IS_ERR(pcie->pcie_xclk))
-                return PTR_ERR(pcie->pcie_xclk);
-
         pcie->pll_e = devm_clk_get(pcie->dev, "pll_e");
         if (IS_ERR(pcie->pll_e))
                 return PTR_ERR(pcie->pll_e);
@@ -1013,6 +1013,23 @@ static int tegra_pcie_clocks_get(struct tegra_pcie *pcie)
         return 0;
 }
 
+static int tegra_pcie_resets_get(struct tegra_pcie *pcie)
+{
+        pcie->pex_rst = devm_reset_control_get(pcie->dev, "pex");
+        if (IS_ERR(pcie->pex_rst))
+                return PTR_ERR(pcie->pex_rst);
+
+        pcie->afi_rst = devm_reset_control_get(pcie->dev, "afi");
+        if (IS_ERR(pcie->afi_rst))
+                return PTR_ERR(pcie->afi_rst);
+
+        pcie->pcie_xrst = devm_reset_control_get(pcie->dev, "pcie_x");
+        if (IS_ERR(pcie->pcie_xrst))
+                return PTR_ERR(pcie->pcie_xrst);
+
+        return 0;
+}
+
 static int tegra_pcie_get_resources(struct tegra_pcie *pcie)
 {
         struct platform_device *pdev = to_platform_device(pcie->dev);
@@ -1025,6 +1042,12 @@ static int tegra_pcie_get_resources(struct tegra_pcie *pcie)
                 return err;
         }
 
+        err = tegra_pcie_resets_get(pcie);
+        if (err) {
+                dev_err(&pdev->dev, "failed to get resets: %d\n", err);
+                return err;
+        }
+
         err = tegra_pcie_power_on(pcie);
         if (err) {
                 dev_err(&pdev->dev, "failed to power up: %d\n", err);
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 9042fdbd7244..25f0bc659164 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -19,6 +19,7 @@
 #include <linux/cpu.h>
 #include <linux/pm_runtime.h>
 #include <linux/suspend.h>
+#include <linux/kexec.h>
 #include "pci.h"
 
 struct pci_dynid {
@@ -288,12 +289,27 @@ static int pci_call_probe(struct pci_driver *drv, struct pci_dev *dev,
         int error, node;
         struct drv_dev_and_id ddi = { drv, dev, id };
 
-        /* Execute driver initialization on node where the device's
-           bus is attached to.  This way the driver likely allocates
-           its local memory on the right node without any need to
-           change it. */
+        /*
+         * Execute driver initialization on node where the device is
+         * attached.  This way the driver likely allocates its local memory
+         * on the right node.
+         */
         node = dev_to_node(&dev->dev);
-        if (node >= 0) {
+
+        /*
+         * On NUMA systems, we are likely to call a PF probe function using
+         * work_on_cpu().  If that probe calls pci_enable_sriov() (which
+         * adds the VF devices via pci_bus_add_device()), we may re-enter
+         * this function to call the VF probe function.  Calling
+         * work_on_cpu() again will cause a lockdep warning.  Since VFs are
+         * always on the same node as the PF, we can work around this by
+         * avoiding work_on_cpu() when we're already on the correct node.
+         *
+         * Preemption is enabled, so it's theoretically unsafe to use
+         * numa_node_id(), but even if we run the probe function on the
+         * wrong node, it should be functionally correct.
+         */
+        if (node >= 0 && node != numa_node_id()) {
                 int cpu;
 
                 get_online_cpus();
@@ -305,6 +321,7 @@ static int pci_call_probe(struct pci_driver *drv, struct pci_dev *dev,
                 put_online_cpus();
         } else
                 error = local_pci_probe(&ddi);
+
         return error;
 }
 
@@ -399,12 +416,17 @@ static void pci_device_shutdown(struct device *dev)
         pci_msi_shutdown(pci_dev);
         pci_msix_shutdown(pci_dev);
 
+#ifdef CONFIG_KEXEC
         /*
-         * Turn off Bus Master bit on the device to tell it to not
-         * continue to do DMA. Don't touch devices in D3cold or unknown states.
+         * If this is a kexec reboot, turn off Bus Master bit on the
+         * device to tell it to not continue to do DMA. Don't touch
+         * devices in D3cold or unknown states.
+         * If it is not a kexec reboot, firmware will hit the PCI
+         * devices with big hammer and stop their DMA any way.
          */
-        if (pci_dev->current_state <= PCI_D3hot)
+        if (kexec_in_progress && (pci_dev->current_state <= PCI_D3hot))
                 pci_clear_master(pci_dev);
+#endif
 }
 
 #ifdef CONFIG_PM
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 33120d156668..07369f32e8bb 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4165,6 +4165,14 @@ int pci_set_vga_state(struct pci_dev *dev, bool decode,
         return 0;
 }
 
+bool pci_device_is_present(struct pci_dev *pdev)
+{
+        u32 v;
+
+        return pci_bus_read_dev_vendor_id(pdev->bus, pdev->devfn, &v, 0);
+}
+EXPORT_SYMBOL_GPL(pci_device_is_present);
+
 #define RESOURCE_ALIGNMENT_PARAM_SIZE COMMAND_LINE_SIZE
 static char resource_alignment_param[RESOURCE_ALIGNMENT_PARAM_SIZE] = {0};
 static DEFINE_SPINLOCK(resource_alignment_lock);
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 1576851028db..cc9337a71529 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -24,7 +24,7 @@ static void pci_stop_dev(struct pci_dev *dev)
         if (dev->is_added) {
                 pci_proc_detach_device(dev);
                 pci_remove_sysfs_dev_files(dev);
-                device_del(&dev->dev);
+                device_release_driver(&dev->dev);
                 dev->is_added = 0;
         }
 
@@ -34,6 +34,8 @@ static void pci_stop_dev(struct pci_dev *dev)
 
 static void pci_destroy_dev(struct pci_dev *dev)
 {
+        device_del(&dev->dev);
+
         down_write(&pci_bus_sem);
         list_del(&dev->bus_list);
         up_write(&pci_bus_sem);
diff --git a/drivers/regulator/as3722-regulator.c b/drivers/regulator/as3722-regulator.c
index 5917fe3dc983..b9f1d24c6812 100644
--- a/drivers/regulator/as3722-regulator.c
+++ b/drivers/regulator/as3722-regulator.c
@@ -590,8 +590,8 @@ static int as3722_sd016_set_current_limit(struct regulator_dev *rdev,
         default:
                 return -EINVAL;
         }
+        ret <<= ffs(mask) - 1;
         val = ret & mask;
-        val <<= ffs(mask) - 1;
         return as3722_update_bits(as3722, reg, mask, val);
 }
 
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 3fe13130baec..d85f31385b24 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -119,6 +119,11 @@ static const char *rdev_get_name(struct regulator_dev *rdev)
                 return "";
 }
 
+static bool have_full_constraints(void)
+{
+        return has_full_constraints || of_have_populated_dt();
+}
+
 /**
  * of_get_regulator - get a regulator device node based on supply name
  * @dev: Device pointer for the consumer (of regulator) device
@@ -1340,7 +1345,7 @@ static struct regulator *_regulator_get(struct device *dev, const char *id,
          * Assume that a regulator is physically present and enabled
          * even if it isn't hooked up and just provide a dummy.
          */
-        if (has_full_constraints && allow_dummy) {
+        if (have_full_constraints() && allow_dummy) {
                 pr_warn("%s supply %s not found, using dummy regulator\n",
                         devname, id);
 
@@ -3627,7 +3632,7 @@ int regulator_suspend_finish(void)
                         if (error)
                                 ret = error;
                 } else {
-                        if (!has_full_constraints)
+                        if (!have_full_constraints())
                                 goto unlock;
                         if (!ops->disable)
                                 goto unlock;
@@ -3825,7 +3830,7 @@ static int __init regulator_init_complete(void)
                 if (!enabled)
                         goto unlock;
 
-                if (has_full_constraints) {
+                if (have_full_constraints()) {
                         /* We log since this may kill the system if it
                          * goes wrong. */
                         rdev_info(rdev, "disabling\n");
diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
index 032df3799efb..8b5e4c712a01 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -38,7 +38,7 @@
 
 #define PFUZE100_DEVICEID       0x0
 #define PFUZE100_REVID          0x3
-#define PFUZE100_FABID          0x3
+#define PFUZE100_FABID          0x4
 
 #define PFUZE100_SW1ABVOL       0x20
 #define PFUZE100_SW1CVOL        0x2e
diff --git a/drivers/regulator/s5m8767.c b/drivers/regulator/s5m8767.c
index cbf91e25cf7f..aeb40aad0ae7 100644
--- a/drivers/regulator/s5m8767.c
+++ b/drivers/regulator/s5m8767.c
@@ -925,7 +925,7 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
                 config.dev = s5m8767->dev;
                 config.init_data = pdata->regulators[i].initdata;
                 config.driver_data = s5m8767;
-                config.regmap = iodev->regmap;
+                config.regmap = iodev->regmap_pmic;
                 config.of_node = pdata->regulators[i].reg_node;
 
                 rdev[i] = devm_regulator_register(&pdev->dev, &regulators[id],
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index c0da95e95702..3281c90691c3 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -220,6 +220,8 @@ static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
 
         at91_alarm_year = tm.tm_year;
 
+        tm.tm_mon = alrm->time.tm_mon;
+        tm.tm_mday = alrm->time.tm_mday;
         tm.tm_hour = alrm->time.tm_hour;
         tm.tm_min = alrm->time.tm_min;
         tm.tm_sec = alrm->time.tm_sec;
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
index b7fd02bc0a14..ae8119dc2846 100644
--- a/drivers/rtc/rtc-s5m.c
+++ b/drivers/rtc/rtc-s5m.c
@@ -28,10 +28,20 @@
 #include <linux/mfd/samsung/irq.h>
 #include <linux/mfd/samsung/rtc.h>
 
+/*
+ * Maximum number of retries for checking changes in UDR field
+ * of SEC_RTC_UDR_CON register (to limit possible endless loop).
+ *
+ * After writing to RTC registers (setting time or alarm) read the UDR field
+ * in SEC_RTC_UDR_CON register. UDR is auto-cleared when data have
+ * been transferred.
+ */
+#define UDR_READ_RETRY_CNT      5
+
 struct s5m_rtc_info {
         struct device *dev;
         struct sec_pmic_dev *s5m87xx;
-        struct regmap *rtc;
+        struct regmap *regmap;
         struct rtc_device *rtc_dev;
         int irq;
         int device_type;
@@ -84,12 +94,31 @@ static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
         }
 }
 
+/*
+ * Read RTC_UDR_CON register and wait till UDR field is cleared.
+ * This indicates that time/alarm update ended.
+ */
+static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
+{
+        int ret, retry = UDR_READ_RETRY_CNT;
+        unsigned int data;
+
+        do {
+                ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
+        } while (--retry && (data & RTC_UDR_MASK) && !ret);
+
+        if (!retry)
+                dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
+
+        return ret;
+}
+
 static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
 {
         int ret;
         unsigned int data;
 
-        ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data);
+        ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
         if (ret < 0) {
                 dev_err(info->dev, "failed to read update reg(%d)\n", ret);
                 return ret;
@@ -98,15 +127,13 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
         data |= RTC_TIME_EN_MASK;
         data |= RTC_UDR_MASK;
 
-        ret = regmap_write(info->rtc, SEC_RTC_UDR_CON, data);
+        ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data);
         if (ret < 0) {
                 dev_err(info->dev, "failed to write update reg(%d)\n", ret);
                 return ret;
         }
 
-        do {
-                ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data);
-        } while ((data & RTC_UDR_MASK) && !ret);
+        ret = s5m8767_wait_for_udr_update(info);
 
         return ret;
 }
@@ -116,7 +143,7 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
         int ret;
         unsigned int data;
 
-        ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data);
+        ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
         if (ret < 0) {
                 dev_err(info->dev, "%s: fail to read update reg(%d)\n",
                         __func__, ret);
@@ -126,16 +153,14 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
         data &= ~RTC_TIME_EN_MASK;
         data |= RTC_UDR_MASK;
 
-        ret = regmap_write(info->rtc, SEC_RTC_UDR_CON, data);
+        ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data);
         if (ret < 0) {
                 dev_err(info->dev, "%s: fail to write update reg(%d)\n",
                         __func__, ret);
                 return ret;
         }
 
-        do {
-                ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data);
-        } while ((data & RTC_UDR_MASK) && !ret);
+        ret = s5m8767_wait_for_udr_update(info);
 
         return ret;
 }
@@ -178,7 +203,7 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
         u8 data[8];
         int ret;
 
-        ret = regmap_bulk_read(info->rtc, SEC_RTC_SEC, data, 8);
+        ret = regmap_bulk_read(info->regmap, SEC_RTC_SEC, data, 8);
         if (ret < 0)
                 return ret;
 
@@ -226,7 +251,7 @@ static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
                 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
                 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
 
-        ret = regmap_raw_write(info->rtc, SEC_RTC_SEC, data, 8);
+        ret = regmap_raw_write(info->regmap, SEC_RTC_SEC, data, 8);
         if (ret < 0)
                 return ret;
 
@@ -242,20 +267,20 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
         unsigned int val;
         int ret, i;
 
-        ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8);
+        ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
         if (ret < 0)
                 return ret;
 
         switch (info->device_type) {
         case S5M8763X:
                 s5m8763_data_to_tm(data, &alrm->time);
-                ret = regmap_read(info->rtc, SEC_ALARM0_CONF, &val);
+                ret = regmap_read(info->regmap, SEC_ALARM0_CONF, &val);
                 if (ret < 0)
                         return ret;
 
                 alrm->enabled = !!val;
 
-                ret = regmap_read(info->rtc, SEC_RTC_STATUS, &val);
+                ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val);
                 if (ret < 0)
                         return ret;
 
@@ -278,7 +303,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
                 }
 
                 alrm->pending = 0;
-                ret = regmap_read(info->rtc, SEC_RTC_STATUS, &val);
+                ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val);
                 if (ret < 0)
                         return ret;
                 break;
@@ -301,7 +326,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
         int ret, i;
         struct rtc_time tm;
 
-        ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8);
+        ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
         if (ret < 0)
                 return ret;
 
@@ -312,14 +337,14 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
 
         switch (info->device_type) {
         case S5M8763X:
-                ret = regmap_write(info->rtc, SEC_ALARM0_CONF, 0);
+                ret = regmap_write(info->regmap, SEC_ALARM0_CONF, 0);
                 break;
 
         case S5M8767X:
                 for (i = 0; i < 7; i++)
                         data[i] &= ~ALARM_ENABLE_MASK;
 
-                ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8);
+                ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
                 if (ret < 0)
                         return ret;
 
@@ -341,7 +366,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
         u8 alarm0_conf;
         struct rtc_time tm;
 
-        ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8);
+        ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
         if (ret < 0)
                 return ret;
 
@@ -353,7 +378,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
         switch (info->device_type) {
         case S5M8763X:
                 alarm0_conf = 0x77;
-                ret = regmap_write(info->rtc, SEC_ALARM0_CONF, alarm0_conf);
+                ret = regmap_write(info->regmap, SEC_ALARM0_CONF, alarm0_conf);
                 break;
 
         case S5M8767X:
@@ -368,7 +393,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
                 if (data[RTC_YEAR1] & 0x7f)
                         data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
 
-                ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8);
+                ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
                 if (ret < 0)
                         return ret;
                 ret = s5m8767_rtc_set_alarm_reg(info);
@@ -410,7 +435,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
         if (ret < 0)
                 return ret;
 
-        ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8);
+        ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
         if (ret < 0)
                 return ret;
 
@@ -455,7 +480,7 @@ static const struct rtc_class_ops s5m_rtc_ops = {
 static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
 {
         int ret;
-        ret = regmap_update_bits(info->rtc, SEC_WTSR_SMPL_CNTL,
+        ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL,
                                  WTSR_ENABLE_MASK,
                                  enable ? WTSR_ENABLE_MASK : 0);
         if (ret < 0)
@@ -466,7 +491,7 @@ static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
 static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable)
 {
         int ret;
-        ret = regmap_update_bits(info->rtc, SEC_WTSR_SMPL_CNTL,
+        ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL,
                                  SMPL_ENABLE_MASK,
                                  enable ? SMPL_ENABLE_MASK : 0);
         if (ret < 0)
@@ -481,7 +506,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
         int ret;
         struct rtc_time tm;
 
-        ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &tp_read);
+        ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &tp_read);
         if (ret < 0) {
                 dev_err(info->dev, "%s: fail to read control reg(%d)\n",
                         __func__, ret);
@@ -493,7 +518,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
         data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
 
         info->rtc_24hr_mode = 1;
-        ret = regmap_raw_write(info->rtc, SEC_ALARM0_CONF, data, 2);
+        ret = regmap_raw_write(info->regmap, SEC_ALARM0_CONF, data, 2);
         if (ret < 0) {
                 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
                         __func__, ret);
@@ -515,7 +540,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
                 ret = s5m_rtc_set_time(info->dev, &tm);
         }
 
-        ret = regmap_update_bits(info->rtc, SEC_RTC_UDR_CON,
+        ret = regmap_update_bits(info->regmap, SEC_RTC_UDR_CON,
                                  RTC_TCON_MASK, tp_read | RTC_TCON_MASK);
         if (ret < 0)
                 dev_err(info->dev, "%s: fail to update TCON reg(%d)\n",
@@ -542,17 +567,19 @@ static int s5m_rtc_probe(struct platform_device *pdev)
 
         info->dev = &pdev->dev;
         info->s5m87xx = s5m87xx;
-        info->rtc = s5m87xx->rtc;
+        info->regmap = s5m87xx->regmap_rtc;
         info->device_type = s5m87xx->device_type;
         info->wtsr_smpl = s5m87xx->wtsr_smpl;
 
         switch (pdata->device_type) {
         case S5M8763X:
-                info->irq = s5m87xx->irq_base + S5M8763_IRQ_ALARM0;
+                info->irq = regmap_irq_get_virq(s5m87xx->irq_data,
+                                S5M8763_IRQ_ALARM0);
                 break;
 
         case S5M8767X:
-                info->irq = s5m87xx->irq_base + S5M8767_IRQ_RTCA1;
+                info->irq = regmap_irq_get_virq(s5m87xx->irq_data,
+                                S5M8767_IRQ_RTCA1);
                 break;
 
         default:
@@ -596,7 +623,7 @@ static void s5m_rtc_shutdown(struct platform_device *pdev)
         if (info->wtsr_smpl) {
                 for (i = 0; i < 3; i++) {
                         s5m_rtc_enable_wtsr(info, false);
-                        regmap_read(info->rtc, SEC_WTSR_SMPL_CNTL, &val);
+                        regmap_read(info->regmap, SEC_WTSR_SMPL_CNTL, &val);
                         pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val);
                         if (val & WTSR_ENABLE_MASK)
                                 pr_emerg("%s: fail to disable WTSR\n",
@@ -612,6 +639,30 @@ static void s5m_rtc_shutdown(struct platform_device *pdev)
         s5m_rtc_enable_smpl(info, false);
 }
 
+static int s5m_rtc_resume(struct device *dev)
+{
+        struct s5m_rtc_info *info = dev_get_drvdata(dev);
+        int ret = 0;
+
+        if (device_may_wakeup(dev))
+                ret = disable_irq_wake(info->irq);
+
+        return ret;
+}
+
+static int s5m_rtc_suspend(struct device *dev)
+{
+        struct s5m_rtc_info *info = dev_get_drvdata(dev);
+        int ret = 0;
+
+        if (device_may_wakeup(dev))
+                ret = enable_irq_wake(info->irq);
+
+        return ret;
+}
+
+static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
+
 static const struct platform_device_id s5m_rtc_id[] = {
         { "s5m-rtc", 0 },
 };
@@ -620,6 +671,7 @@ static struct platform_driver s5m_rtc_driver = {
         .driver         = {
                 .name   = "s5m-rtc",
                 .owner  = THIS_MODULE,
+                .pm     = &s5m_rtc_pm_ops,
         },
         .probe          = s5m_rtc_probe,
         .shutdown       = s5m_rtc_shutdown,
diff --git a/drivers/s390/block/dasd_genhd.c b/drivers/s390/block/dasd_genhd.c
index f64921756ad6..f224d59c4b6b 100644
--- a/drivers/s390/block/dasd_genhd.c
+++ b/drivers/s390/block/dasd_genhd.c
@@ -87,7 +87,6 @@ void dasd_gendisk_free(struct dasd_block *block)
 {
         if (block->gdp) {
                 del_gendisk(block->gdp);
-                block->gdp->queue = NULL;
                 block->gdp->private_data = NULL;
                 put_disk(block->gdp);
                 block->gdp = NULL;
diff --git a/drivers/s390/char/sclp_early.c b/drivers/s390/char/sclp_early.c
index f7aa080e9b28..1465e9563101 100644
--- a/drivers/s390/char/sclp_early.c
+++ b/drivers/s390/char/sclp_early.c
@@ -35,7 +35,6 @@ struct read_info_sccb {
         u8      _reserved5[4096 - 112]; /* 112-4095 */
 } __packed __aligned(PAGE_SIZE);
 
-static __initdata struct init_sccb early_event_mask_sccb __aligned(PAGE_SIZE);
 static __initdata struct read_info_sccb early_read_info_sccb;
 static __initdata char sccb_early[PAGE_SIZE] __aligned(PAGE_SIZE);
 static unsigned long sclp_hsa_size;
@@ -113,7 +112,7 @@ static void __init sclp_facilities_detect(void)
 
 bool __init sclp_has_linemode(void)
 {
-        struct init_sccb *sccb = &early_event_mask_sccb;
+        struct init_sccb *sccb = (void *) &sccb_early;
 
         if (sccb->header.response_code != 0x20)
                 return 0;
@@ -126,7 +125,7 @@ bool __init sclp_has_linemode(void)
 
 bool __init sclp_has_vt220(void)
 {
-        struct init_sccb *sccb = &early_event_mask_sccb;
+        struct init_sccb *sccb = (void *) &sccb_early;
 
         if (sccb->header.response_code != 0x20)
                 return 0;
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index eb1f1ef5fa2e..9fc66e83c1a7 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -448,6 +448,7 @@ config SPI_MXS
 config SPI_TEGRA114
         tristate "NVIDIA Tegra114 SPI Controller"
         depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
+        depends on RESET_CONTROLLER
         help
           SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller
           is different than the older SoCs SPI controller and also register interface
@@ -456,6 +457,7 @@ config SPI_TEGRA114
 config SPI_TEGRA20_SFLASH
         tristate "Nvidia Tegra20 Serial flash Controller"
         depends on ARCH_TEGRA || COMPILE_TEST
+        depends on RESET_CONTROLLER
         help
           SPI driver for Nvidia Tegra20 Serial flash Controller interface.
           The main usecase of this controller is to use spi flash as boot
@@ -464,6 +466,7 @@ config SPI_TEGRA20_SFLASH
 config SPI_TEGRA20_SLINK
         tristate "Nvidia Tegra20/Tegra30 SLINK Controller"
         depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
+        depends on RESET_CONTROLLER
         help
           SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface.
 
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index aaecfb3ebf58..c8604981a058 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -17,7 +17,6 @@
  */
 
 #include <linux/clk.h>
-#include <linux/clk/tegra.h>
 #include <linux/completion.h>
 #include <linux/delay.h>
 #include <linux/dmaengine.h>
@@ -34,6 +33,7 @@
 #include <linux/pm_runtime.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/reset.h>
 #include <linux/spi/spi.h>
 
 #define SPI_COMMAND1                            0x000
@@ -174,10 +174,10 @@ struct tegra_spi_data {
         spinlock_t                              lock;
 
         struct clk                              *clk;
+        struct reset_control                    *rst;
         void __iomem                            *base;
         phys_addr_t                             phys;
         unsigned                                irq;
-        int                                     dma_req_sel;
         u32                                     spi_max_frequency;
         u32                                     cur_speed;
 
@@ -600,15 +600,15 @@ static int tegra_spi_init_dma_param(struct tegra_spi_data *tspi,
         dma_addr_t dma_phys;
         int ret;
         struct dma_slave_config dma_sconfig;
-        dma_cap_mask_t mask;
 
-        dma_cap_zero(mask);
-        dma_cap_set(DMA_SLAVE, mask);
-        dma_chan = dma_request_channel(mask, NULL, NULL);
-        if (!dma_chan) {
-                dev_err(tspi->dev,
-                        "Dma channel is not available, will try later\n");
-                return -EPROBE_DEFER;
+        dma_chan = dma_request_slave_channel_reason(tspi->dev,
+                                        dma_to_memory ? "rx" : "tx");
+        if (IS_ERR(dma_chan)) {
+                ret = PTR_ERR(dma_chan);
+                if (ret != -EPROBE_DEFER)
+                        dev_err(tspi->dev,
+                                "Dma channel is not available: %d\n", ret);
+                return ret;
         }
 
         dma_buf = dma_alloc_coherent(tspi->dev, tspi->dma_buf_size,
@@ -619,7 +619,6 @@ static int tegra_spi_init_dma_param(struct tegra_spi_data *tspi,
                 return -ENOMEM;
         }
 
-        dma_sconfig.slave_id = tspi->dma_req_sel;
         if (dma_to_memory) {
                 dma_sconfig.src_addr = tspi->phys + SPI_RX_FIFO;
                 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
@@ -918,9 +917,9 @@ static irqreturn_t handle_cpu_based_xfer(struct tegra_spi_data *tspi)
                         tspi->status_reg);
                 dev_err(tspi->dev, "CpuXfer 0x%08x:0x%08x\n",
                         tspi->command1_reg, tspi->dma_control_reg);
-                tegra_periph_reset_assert(tspi->clk);
+                reset_control_assert(tspi->rst);
                 udelay(2);
-                tegra_periph_reset_deassert(tspi->clk);
+                reset_control_deassert(tspi->rst);
                 complete(&tspi->xfer_completion);
                 goto exit;
         }
@@ -990,9 +989,9 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_spi_data *tspi)
                         tspi->status_reg);
                 dev_err(tspi->dev, "DmaXfer 0x%08x:0x%08x\n",
                         tspi->command1_reg, tspi->dma_control_reg);
-                tegra_periph_reset_assert(tspi->clk);
+                reset_control_assert(tspi->rst);
                 udelay(2);
-                tegra_periph_reset_deassert(tspi->clk);
+                reset_control_deassert(tspi->rst);
                 complete(&tspi->xfer_completion);
                 spin_unlock_irqrestore(&tspi->lock, flags);
                 return IRQ_HANDLED;
@@ -1054,11 +1053,6 @@ static void tegra_spi_parse_dt(struct platform_device *pdev,
         struct tegra_spi_data *tspi)
 {
         struct device_node *np = pdev->dev.of_node;
-        u32 of_dma[2];
-
-        if (of_property_read_u32_array(np, "nvidia,dma-request-selector",
-                                of_dma, 2) >= 0)
-                tspi->dma_req_sel = of_dma[1];
 
         if (of_property_read_u32(np, "spi-max-frequency",
                                 &tspi->spi_max_frequency))
@@ -1127,25 +1121,25 @@ static int tegra_spi_probe(struct platform_device *pdev)
                 goto exit_free_irq;
         }
 
+        tspi->rst = devm_reset_control_get(&pdev->dev, "spi");
+        if (IS_ERR(tspi->rst)) {
+                dev_err(&pdev->dev, "can not get reset\n");
+                ret = PTR_ERR(tspi->rst);
+                goto exit_free_irq;
+        }
+
         tspi->max_buf_size = SPI_FIFO_DEPTH << 2;
         tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN;
 
-        if (tspi->dma_req_sel) {
-                ret = tegra_spi_init_dma_param(tspi, true);
-                if (ret < 0) {
-                        dev_err(&pdev->dev, "RxDma Init failed, err %d\n", ret);
-                        goto exit_free_irq;
-                }
-
-                ret = tegra_spi_init_dma_param(tspi, false);
-                if (ret < 0) {
-                        dev_err(&pdev->dev, "TxDma Init failed, err %d\n", ret);
-                        goto exit_rx_dma_free;
-                }
-                tspi->max_buf_size = tspi->dma_buf_size;
-                init_completion(&tspi->tx_dma_complete);
-                init_completion(&tspi->rx_dma_complete);
-        }
+        ret = tegra_spi_init_dma_param(tspi, true);
+        if (ret < 0)
+                goto exit_free_irq;
+        ret = tegra_spi_init_dma_param(tspi, false);
+        if (ret < 0)
+                goto exit_rx_dma_free;
+        tspi->max_buf_size = tspi->dma_buf_size;
+        init_completion(&tspi->tx_dma_complete);
+        init_completion(&tspi->rx_dma_complete);
 
         init_completion(&tspi->xfer_completion);
 
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c
index 4dc8e8129459..e6f382b33818 100644
--- a/drivers/spi/spi-tegra20-sflash.c
+++ b/drivers/spi/spi-tegra20-sflash.c
@@ -32,8 +32,8 @@
 #include <linux/pm_runtime.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/reset.h>
 #include <linux/spi/spi.h>
-#include <linux/clk/tegra.h>
 
 #define SPI_COMMAND                             0x000
 #define SPI_GO                                  BIT(30)
@@ -118,6 +118,7 @@ struct tegra_sflash_data {
         spinlock_t                              lock;
 
         struct clk                              *clk;
+        struct reset_control                    *rst;
         void __iomem                            *base;
         unsigned                                irq;
         u32                                     spi_max_frequency;
@@ -389,9 +390,9 @@ static irqreturn_t handle_cpu_based_xfer(struct tegra_sflash_data *tsd)
                 dev_err(tsd->dev,
                         "CpuXfer 0x%08x:0x%08x\n", tsd->command_reg,
                                 tsd->dma_control_reg);
-                tegra_periph_reset_assert(tsd->clk);
+                reset_control_assert(tsd->rst);
                 udelay(2);
-                tegra_periph_reset_deassert(tsd->clk);
+                reset_control_deassert(tsd->rst);
                 complete(&tsd->xfer_completion);
                 goto exit;
         }
@@ -505,6 +506,13 @@ static int tegra_sflash_probe(struct platform_device *pdev)
                 goto exit_free_irq;
         }
 
+        tsd->rst = devm_reset_control_get(&pdev->dev, "spi");
+        if (IS_ERR(tsd->rst)) {
+                dev_err(&pdev->dev, "can not get reset\n");
+                ret = PTR_ERR(tsd->rst);
+                goto exit_free_irq;
+        }
+
         init_completion(&tsd->xfer_completion);
         pm_runtime_enable(&pdev->dev);
         if (!pm_runtime_enabled(&pdev->dev)) {
@@ -520,9 +528,9 @@ static int tegra_sflash_probe(struct platform_device *pdev)
         }
 
         /* Reset controller */
-        tegra_periph_reset_assert(tsd->clk);
+        reset_control_assert(tsd->rst);
         udelay(2);
-        tegra_periph_reset_deassert(tsd->clk);
+        reset_control_deassert(tsd->rst);
 
         tsd->def_command_reg  = SPI_M_S | SPI_CS_SW;
         tegra_sflash_writel(tsd, tsd->def_command_reg, SPI_COMMAND);
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
index e66715ba37ed..a728bb82090f 100644
--- a/drivers/spi/spi-tegra20-slink.c
+++ b/drivers/spi/spi-tegra20-slink.c
@@ -33,8 +33,8 @@
 #include <linux/pm_runtime.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/reset.h>
 #include <linux/spi/spi.h>
-#include <linux/clk/tegra.h>
 
 #define SLINK_COMMAND                   0x000
 #define SLINK_BIT_LENGTH(x)             (((x) & 0x1f) << 0)
@@ -167,10 +167,10 @@ struct tegra_slink_data {
         spinlock_t                              lock;
 
         struct clk                              *clk;
+        struct reset_control                    *rst;
         void __iomem                            *base;
         phys_addr_t                             phys;
         unsigned                                irq;
-        int                                     dma_req_sel;
         u32                                     spi_max_frequency;
         u32                                     cur_speed;
 
@@ -629,15 +629,15 @@ static int tegra_slink_init_dma_param(struct tegra_slink_data *tspi,
         dma_addr_t dma_phys;
         int ret;
         struct dma_slave_config dma_sconfig;
-        dma_cap_mask_t mask;
 
-        dma_cap_zero(mask);
-        dma_cap_set(DMA_SLAVE, mask);
-        dma_chan = dma_request_channel(mask, NULL, NULL);
-        if (!dma_chan) {
-                dev_err(tspi->dev,
-                        "Dma channel is not available, will try later\n");
-                return -EPROBE_DEFER;
+        dma_chan = dma_request_slave_channel_reason(tspi->dev,
+                                                dma_to_memory ? "rx" : "tx");
+        if (IS_ERR(dma_chan)) {
+                ret = PTR_ERR(dma_chan);
+                if (ret != -EPROBE_DEFER)
+                        dev_err(tspi->dev,
+                                "Dma channel is not available: %d\n", ret);
+                return ret;
         }
 
         dma_buf = dma_alloc_coherent(tspi->dev, tspi->dma_buf_size,
@@ -648,7 +648,6 @@ static int tegra_slink_init_dma_param(struct tegra_slink_data *tspi,
                 return -ENOMEM;
         }
 
-        dma_sconfig.slave_id = tspi->dma_req_sel;
         if (dma_to_memory) {
                 dma_sconfig.src_addr = tspi->phys + SLINK_RX_FIFO;
                 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
@@ -884,9 +883,9 @@ static irqreturn_t handle_cpu_based_xfer(struct tegra_slink_data *tspi)
                 dev_err(tspi->dev,
                         "CpuXfer 0x%08x:0x%08x:0x%08x\n", tspi->command_reg,
                                 tspi->command2_reg, tspi->dma_control_reg);
-                tegra_periph_reset_assert(tspi->clk);
+                reset_control_assert(tspi->rst);
                 udelay(2);
-                tegra_periph_reset_deassert(tspi->clk);
+                reset_control_deassert(tspi->rst);
                 complete(&tspi->xfer_completion);
                 goto exit;
         }
@@ -957,9 +956,9 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_slink_data *tspi)
                 dev_err(tspi->dev,
                         "DmaXfer 0x%08x:0x%08x:0x%08x\n", tspi->command_reg,
                                 tspi->command2_reg, tspi->dma_control_reg);
-                tegra_periph_reset_assert(tspi->clk);
+                reset_control_assert(tspi->rst);
                 udelay(2);
-                tegra_periph_reset_deassert(tspi->clk);
+                reset_control_assert(tspi->rst);
                 complete(&tspi->xfer_completion);
                 spin_unlock_irqrestore(&tspi->lock, flags);
                 return IRQ_HANDLED;
@@ -1020,11 +1019,6 @@ static irqreturn_t tegra_slink_isr(int irq, void *context_data)
 static void tegra_slink_parse_dt(struct tegra_slink_data *tspi)
 {
         struct device_node *np = tspi->dev->of_node;
-        u32 of_dma[2];
-
-        if (of_property_read_u32_array(np, "nvidia,dma-request-selector",
-                                of_dma, 2) >= 0)
-                tspi->dma_req_sel = of_dma[1];
 
         if (of_property_read_u32(np, "spi-max-frequency",
                                         &tspi->spi_max_frequency))
@@ -1118,25 +1112,25 @@ static int tegra_slink_probe(struct platform_device *pdev)
                 goto exit_free_irq;
         }
 
+        tspi->rst = devm_reset_control_get(&pdev->dev, "spi");
+        if (IS_ERR(tspi->rst)) {
+                dev_err(&pdev->dev, "can not get reset\n");
+                ret = PTR_ERR(tspi->rst);
+                goto exit_free_irq;
+        }
+
         tspi->max_buf_size = SLINK_FIFO_DEPTH << 2;
         tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN;
 
-        if (tspi->dma_req_sel) {
-                ret = tegra_slink_init_dma_param(tspi, true);
-                if (ret < 0) {
-                        dev_err(&pdev->dev, "RxDma Init failed, err %d\n", ret);
-                        goto exit_free_irq;
-                }
-
-                ret = tegra_slink_init_dma_param(tspi, false);
-                if (ret < 0) {
-                        dev_err(&pdev->dev, "TxDma Init failed, err %d\n", ret);
-                        goto exit_rx_dma_free;
-                }
-                tspi->max_buf_size = tspi->dma_buf_size;
-                init_completion(&tspi->tx_dma_complete);
-                init_completion(&tspi->rx_dma_complete);
-        }
+        ret = tegra_slink_init_dma_param(tspi, true);
+        if (ret < 0)
+                goto exit_free_irq;
+        ret = tegra_slink_init_dma_param(tspi, false);
+        if (ret < 0)
+                goto exit_rx_dma_free;
+        tspi->max_buf_size = tspi->dma_buf_size;
+        init_completion(&tspi->tx_dma_complete);
+        init_completion(&tspi->rx_dma_complete);
 
         init_completion(&tspi->xfer_completion);
 
diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
index 49ea76b3435d..986870593b0c 100644
--- a/drivers/staging/nvec/nvec.c
+++ b/drivers/staging/nvec/nvec.c
@@ -36,7 +36,6 @@
 #include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/workqueue.h>
-#include <linux/clk/tegra.h>
 
 #include "nvec.h"
 
@@ -734,9 +733,9 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec)
 
         clk_prepare_enable(nvec->i2c_clk);
 
-        tegra_periph_reset_assert(nvec->i2c_clk);
+        reset_control_assert(nvec->rst);
         udelay(2);
-        tegra_periph_reset_deassert(nvec->i2c_clk);
+        reset_control_deassert(nvec->rst);
 
         val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN |
             (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT);
@@ -837,6 +836,12 @@ static int tegra_nvec_probe(struct platform_device *pdev)
                 return -ENODEV;
         }
 
+        nvec->rst = devm_reset_control_get(&pdev->dev, "i2c");
+        if (IS_ERR(nvec->rst)) {
+                dev_err(nvec->dev, "failed to get controller reset\n");
+                return PTR_ERR(nvec->rst);
+        }
+
         nvec->base = base;
         nvec->irq = res->start;
         nvec->i2c_clk = i2c_clk;
diff --git a/drivers/staging/nvec/nvec.h b/drivers/staging/nvec/nvec.h
index e880518935fb..e271375053fa 100644
--- a/drivers/staging/nvec/nvec.h
+++ b/drivers/staging/nvec/nvec.h
@@ -23,6 +23,7 @@
 #include <linux/list.h>
 #include <linux/mutex.h>
 #include <linux/notifier.h>
+#include <linux/reset.h>
 #include <linux/spinlock.h>
 #include <linux/workqueue.h>
 
@@ -109,7 +110,8 @@ struct nvec_msg {
  * @irq: The IRQ of the I2C device
  * @i2c_addr: The address of the I2C slave
  * @base: The base of the memory mapped region of the I2C device
- * @clk: The clock of the I2C device
+ * @i2c_clk: The clock of the I2C device
+ * @rst: The reset of the I2C device
  * @notifier_list: Notifiers to be called on received messages, see
  *                 nvec_register_notifier()
  * @rx_data: Received messages that have to be processed
@@ -139,6 +141,7 @@ struct nvec_chip {
         int i2c_addr;
         void __iomem *base;
         struct clk *i2c_clk;
+        struct reset_control *rst;
         struct atomic_notifier_head notifier_list;
         struct list_head rx_data, tx_data;
         struct notifier_block nvec_status_notifier;
diff --git a/drivers/staging/tidspbridge/rmgr/drv_interface.c b/drivers/staging/tidspbridge/rmgr/drv_interface.c
index 1aa4a3fd0f1b..56e355b3e7fa 100644
--- a/drivers/staging/tidspbridge/rmgr/drv_interface.c
+++ b/drivers/staging/tidspbridge/rmgr/drv_interface.c
@@ -258,7 +258,8 @@ err:
 /* This function maps kernel space memory to user space memory. */
 static int bridge_mmap(struct file *filp, struct vm_area_struct *vma)
 {
-        u32 status;
+        struct omap_dsp_platform_data *pdata =
+                                        omap_dspbridge_dev->dev.platform_data;
 
         /* VM_IO | VM_DONTEXPAND | VM_DONTDUMP are set by remap_pfn_range() */
         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
@@ -268,13 +269,9 @@ static int bridge_mmap(struct file *filp, struct vm_area_struct *vma)
                 vma->vm_start, vma->vm_end, vma->vm_page_prot,
                 vma->vm_flags);
 
-        status = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
-                                 vma->vm_end - vma->vm_start,
-                                 vma->vm_page_prot);
-        if (status != 0)
-                status = -EAGAIN;
-
-        return status;
+        return vm_iomap_memory(vma,
+                               pdata->phys_mempool_base,
+                               pdata->phys_mempool_size);
 }
 
 static const struct file_operations bridge_fops = {
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 0f74945af624..268b62768f2b 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -810,7 +810,8 @@ static void process_echoes(struct tty_struct *tty)
         struct n_tty_data *ldata = tty->disc_data;
         size_t echoed;
 
-        if (!L_ECHO(tty) || ldata->echo_commit == ldata->echo_tail)
+        if ((!L_ECHO(tty) && !L_ECHONL(tty)) ||
+            ldata->echo_commit == ldata->echo_tail)
                 return;
 
         mutex_lock(&ldata->output_lock);
@@ -825,7 +826,8 @@ static void flush_echoes(struct tty_struct *tty)
 {
         struct n_tty_data *ldata = tty->disc_data;
 
-        if (!L_ECHO(tty) || ldata->echo_commit == ldata->echo_head)
+        if ((!L_ECHO(tty) && !L_ECHONL(tty)) ||
+            ldata->echo_commit == ldata->echo_head)
                 return;
 
         mutex_lock(&ldata->output_lock);
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index dfe79ccc4fb3..d5c2a287b7e7 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -34,6 +34,7 @@
 #include <linux/of_device.h>
 #include <linux/pagemap.h>
 #include <linux/platform_device.h>
+#include <linux/reset.h>
 #include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_core.h>
@@ -44,8 +45,6 @@
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
 
-#include <linux/clk/tegra.h>
-
 #define TEGRA_UART_TYPE                         "TEGRA_UART"
 #define TX_EMPTY_STATUS                         (UART_LSR_TEMT | UART_LSR_THRE)
 #define BYTES_TO_ALIGN(x)                       ((unsigned long)(x) & 0x3)
@@ -103,6 +102,7 @@ struct tegra_uart_port {
         const struct tegra_uart_chip_data       *cdata;
 
         struct clk                              *uart_clk;
+        struct reset_control                    *rst;
         unsigned int                            current_baud;
 
         /* Register shadow */
@@ -120,7 +120,6 @@ struct tegra_uart_port {
         bool                                    rx_timeout;
         int                                     rx_in_progress;
         int                                     symb_bit;
-        int                                     dma_req_sel;
 
         struct dma_chan                         *rx_dma_chan;
         struct dma_chan                         *tx_dma_chan;
@@ -832,9 +831,9 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup)
         clk_prepare_enable(tup->uart_clk);
 
         /* Reset the UART controller to clear all previous status.*/
-        tegra_periph_reset_assert(tup->uart_clk);
+        reset_control_assert(tup->rst);
         udelay(10);
-        tegra_periph_reset_deassert(tup->uart_clk);
+        reset_control_deassert(tup->rst);
 
         tup->rx_in_progress = 0;
         tup->tx_in_progress = 0;
@@ -910,15 +909,14 @@ static int tegra_uart_dma_channel_allocate(struct tegra_uart_port *tup,
         dma_addr_t dma_phys;
         int ret;
         struct dma_slave_config dma_sconfig;
-        dma_cap_mask_t mask;
 
-        dma_cap_zero(mask);
-        dma_cap_set(DMA_SLAVE, mask);
-        dma_chan = dma_request_channel(mask, NULL, NULL);
-        if (!dma_chan) {
+        dma_chan = dma_request_slave_channel_reason(tup->uport.dev,
+                                                dma_to_memory ? "rx" : "tx");
+        if (IS_ERR(dma_chan)) {
+                ret = PTR_ERR(dma_chan);
                 dev_err(tup->uport.dev,
-                        "Dma channel is not available, will try later\n");
-                return -EPROBE_DEFER;
+                        "DMA channel alloc failed: %d\n", ret);
+                return ret;
         }
 
         if (dma_to_memory) {
@@ -938,7 +936,6 @@ static int tegra_uart_dma_channel_allocate(struct tegra_uart_port *tup,
                 dma_buf = tup->uport.state->xmit.buf;
         }
 
-        dma_sconfig.slave_id = tup->dma_req_sel;
         if (dma_to_memory) {
                 dma_sconfig.src_addr = tup->uport.mapbase;
                 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
@@ -1222,17 +1219,8 @@ static int tegra_uart_parse_dt(struct platform_device *pdev,
         struct tegra_uart_port *tup)
 {
         struct device_node *np = pdev->dev.of_node;
-        u32 of_dma[2];
         int port;
 
-        if (of_property_read_u32_array(np, "nvidia,dma-request-selector",
-                                of_dma, 2) >= 0) {
-                tup->dma_req_sel = of_dma[1];
-        } else {
-                dev_err(&pdev->dev, "missing dma requestor in device tree\n");
-                return -EINVAL;
-        }
-
         port = of_alias_get_id(np, "serial");
         if (port < 0) {
                 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", port);
@@ -1320,6 +1308,12 @@ static int tegra_uart_probe(struct platform_device *pdev)
                 return PTR_ERR(tup->uart_clk);
         }
 
+        tup->rst = devm_reset_control_get(&pdev->dev, "serial");
+        if (IS_ERR(tup->rst)) {
+                dev_err(&pdev->dev, "Couldn't get the reset\n");
+                return PTR_ERR(tup->rst);
+        }
+
         u->iotype = UPIO_MEM32;
         u->irq = platform_get_irq(pdev, 0);
         u->regshift = 2;
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 7d8103cd3e2e..e4bf0e435af6 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -23,35 +23,34 @@
 
 #undef DEBUG
 
-#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/ctype.h>
+#include <linux/cpufreq.h>
+#include <linux/delay.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/err.h>
 #include <linux/errno.h>
-#include <linux/sh_dma.h>
-#include <linux/timer.h>
+#include <linux/init.h>
 #include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/serial.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/sysrq.h>
 #include <linux/ioport.h>
+#include <linux/major.h>
+#include <linux/module.h>
 #include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/console.h>
-#include <linux/platform_device.h>
-#include <linux/serial_sci.h>
 #include <linux/notifier.h>
+#include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
-#include <linux/cpufreq.h>
-#include <linux/clk.h>
-#include <linux/ctype.h>
-#include <linux/err.h>
-#include <linux/dmaengine.h>
-#include <linux/dma-mapping.h>
 #include <linux/scatterlist.h>
+#include <linux/serial.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_dma.h>
 #include <linux/slab.h>
-#include <linux/gpio.h>
+#include <linux/string.h>
+#include <linux/sysrq.h>
+#include <linux/timer.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
 
 #ifdef CONFIG_SUPERH
 #include <asm/sh_bios.h>
@@ -64,6 +63,10 @@ struct sci_port {
 
         /* Platform configuration */
         struct plat_sci_port    *cfg;
+        int                     overrun_bit;
+        unsigned int            error_mask;
+        unsigned int            sampling_rate;
+
 
         /* Break timer */
         struct timer_list       break_timer;
@@ -74,8 +77,8 @@ struct sci_port {
         /* Function clock */
         struct clk              *fclk;
 
+        int                     irqs[SCIx_NR_IRQS];
         char                    *irqstr[SCIx_NR_IRQS];
-        char                    *gpiostr[SCIx_NR_FNS];
 
         struct dma_chan                 *chan_tx;
         struct dma_chan                 *chan_rx;
@@ -421,9 +424,9 @@ static void sci_port_enable(struct sci_port *sci_port)
 
         pm_runtime_get_sync(sci_port->port.dev);
 
-        clk_enable(sci_port->iclk);
+        clk_prepare_enable(sci_port->iclk);
         sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
-        clk_enable(sci_port->fclk);
+        clk_prepare_enable(sci_port->fclk);
 }
 
 static void sci_port_disable(struct sci_port *sci_port)
@@ -431,8 +434,16 @@ static void sci_port_disable(struct sci_port *sci_port)
         if (!sci_port->port.dev)
                 return;
 
-        clk_disable(sci_port->fclk);
-        clk_disable(sci_port->iclk);
+        /* Cancel the break timer to ensure that the timer handler will not try
+         * to access the hardware with clocks and power disabled. Reset the
+         * break flag to make the break debouncing state machine ready for the
+         * next break.
+         */
+        del_timer_sync(&sci_port->break_timer);
+        sci_port->break_flag = 0;
+
+        clk_disable_unprepare(sci_port->fclk);
+        clk_disable_unprepare(sci_port->iclk);
 
         pm_runtime_put_sync(sci_port->port.dev);
 }
@@ -557,7 +568,7 @@ static inline int sci_rxd_in(struct uart_port *port)
                 return 1;
 
         /* Cast for ARM damage */
-        return !!__raw_readb((void __iomem *)s->cfg->port_reg);
+        return !!__raw_readb((void __iomem *)(uintptr_t)s->cfg->port_reg);
 }
 
 /* ********************************************************************** *
@@ -733,8 +744,6 @@ static void sci_break_timer(unsigned long data)
 {
         struct sci_port *port = (struct sci_port *)data;
 
-        sci_port_enable(port);
-
         if (sci_rxd_in(&port->port) == 0) {
                 port->break_flag = 1;
                 sci_schedule_break_timer(port);
@@ -744,8 +753,6 @@ static void sci_break_timer(unsigned long data)
                 sci_schedule_break_timer(port);
         } else
                 port->break_flag = 0;
-
-        sci_port_disable(port);
 }
 
 static int sci_handle_errors(struct uart_port *port)
@@ -755,19 +762,15 @@ static int sci_handle_errors(struct uart_port *port)
         struct tty_port *tport = &port->state->port;
         struct sci_port *s = to_sci_port(port);
 
-        /*
-         * Handle overruns, if supported.
-         */
-        if (s->cfg->overrun_bit != SCIx_NOT_SUPPORTED) {
-                if (status & (1 << s->cfg->overrun_bit)) {
-                        port->icount.overrun++;
+        /* Handle overruns */
+        if (status & (1 << s->overrun_bit)) {
+                port->icount.overrun++;
 
-                        /* overrun error */
-                        if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
-                                copied++;
+                /* overrun error */
+                if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
+                        copied++;
 
-                        dev_notice(port->dev, "overrun error");
-                }
+                dev_notice(port->dev, "overrun error");
         }
 
         if (status & SCxSR_FER(port)) {
@@ -829,7 +832,7 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
         if (!reg->size)
                 return 0;
 
-        if ((serial_port_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
+        if ((serial_port_in(port, SCLSR) & (1 << s->overrun_bit))) {
                 serial_port_out(port, SCLSR, 0);
 
                 port->icount.overrun++;
@@ -1075,19 +1078,19 @@ static int sci_request_irq(struct sci_port *port)
 
         for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) {
                 struct sci_irq_desc *desc;
-                unsigned int irq;
+                int irq;
 
                 if (SCIx_IRQ_IS_MUXED(port)) {
                         i = SCIx_MUX_IRQ;
                         irq = up->irq;
                 } else {
-                        irq = port->cfg->irqs[i];
+                        irq = port->irqs[i];
 
                         /*
                          * Certain port types won't support all of the
                          * available interrupt sources.
                          */
-                        if (unlikely(!irq))
+                        if (unlikely(irq < 0))
                                 continue;
                 }
 
@@ -1112,7 +1115,7 @@ static int sci_request_irq(struct sci_port *port)
 
 out_noirq:
         while (--i >= 0)
-                free_irq(port->cfg->irqs[i], port);
+                free_irq(port->irqs[i], port);
 
 out_nomem:
         while (--j >= 0)
@@ -1130,16 +1133,16 @@ static void sci_free_irq(struct sci_port *port)
          * IRQ first.
          */
         for (i = 0; i < SCIx_NR_IRQS; i++) {
-                unsigned int irq = port->cfg->irqs[i];
+                int irq = port->irqs[i];
 
                 /*
                  * Certain port types won't support all of the available
                  * interrupt sources.
                  */
-                if (unlikely(!irq))
+                if (unlikely(irq < 0))
                         continue;
 
-                free_irq(port->cfg->irqs[i], port);
+                free_irq(port->irqs[i], port);
                 kfree(port->irqstr[i]);
 
                 if (SCIx_IRQ_IS_MUXED(port)) {
@@ -1149,67 +1152,6 @@ static void sci_free_irq(struct sci_port *port)
         }
 }
 
-static const char *sci_gpio_names[SCIx_NR_FNS] = {
-        "sck", "rxd", "txd", "cts", "rts",
-};
-
-static const char *sci_gpio_str(unsigned int index)
-{
-        return sci_gpio_names[index];
-}
-
-static void sci_init_gpios(struct sci_port *port)
-{
-        struct uart_port *up = &port->port;
-        int i;
-
-        if (!port->cfg)
-                return;
-
-        for (i = 0; i < SCIx_NR_FNS; i++) {
-                const char *desc;
-                int ret;
-
-                if (!port->cfg->gpios[i])
-                        continue;
-
-                desc = sci_gpio_str(i);
-
-                port->gpiostr[i] = kasprintf(GFP_KERNEL, "%s:%s",
-                                             dev_name(up->dev), desc);
-
-                /*
-                 * If we've failed the allocation, we can still continue
-                 * on with a NULL string.
-                 */
-                if (!port->gpiostr[i])
-                        dev_notice(up->dev, "%s string allocation failure\n",
-                                   desc);
-
-                ret = gpio_request(port->cfg->gpios[i], port->gpiostr[i]);
-                if (unlikely(ret != 0)) {
-                        dev_notice(up->dev, "failed %s gpio request\n", desc);
-
-                        /*
-                         * If we can't get the GPIO for whatever reason,
-                         * no point in keeping the verbose string around.
-                         */
-                        kfree(port->gpiostr[i]);
-                }
-        }
-}
-
-static void sci_free_gpios(struct sci_port *port)
-{
-        int i;
-
-        for (i = 0; i < SCIx_NR_FNS; i++)
-                if (port->cfg->gpios[i]) {
-                        gpio_free(port->cfg->gpios[i]);
-                        kfree(port->gpiostr[i]);
-                }
-}
-
 static unsigned int sci_tx_empty(struct uart_port *port)
 {
         unsigned short status = serial_port_in(port, SCxSR);
@@ -1309,7 +1251,7 @@ static int sci_dma_rx_push(struct sci_port *s, size_t count)
         }
 
         if (room < count)
-                dev_warn(port->dev, "Rx overrun: dropping %u bytes\n",
+                dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n",
                          count - room);
         if (!room)
                 return room;
@@ -1442,7 +1384,7 @@ static void work_fn_rx(struct work_struct *work)
                 int count;
 
                 chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
-                dev_dbg(port->dev, "Read %u bytes with cookie %d\n",
+                dev_dbg(port->dev, "Read %zu bytes with cookie %d\n",
                         sh_desc->partial, sh_desc->cookie);
 
                 spin_lock_irqsave(&port->lock, flags);
@@ -1655,7 +1597,7 @@ static void rx_timer_fn(unsigned long arg)
 
         if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
                 scr &= ~0x4000;
-                enable_irq(s->cfg->irqs[1]);
+                enable_irq(s->irqs[SCIx_RXI_IRQ]);
         }
         serial_port_out(port, SCSCR, scr | SCSCR_RIE);
         dev_dbg(port->dev, "DMA Rx timed out\n");
@@ -1691,16 +1633,17 @@ static void sci_request_dma(struct uart_port *port)
                 s->chan_tx = chan;
                 sg_init_table(&s->sg_tx, 1);
                 /* UART circular tx buffer is an aligned page. */
-                BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
+                BUG_ON((uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
                 sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf),
-                            UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK);
+                            UART_XMIT_SIZE,
+                            (uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
                 nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE);
                 if (!nent)
                         sci_tx_dma_release(s, false);
                 else
-                        dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
-                                sg_dma_len(&s->sg_tx),
-                                port->state->xmit.buf, sg_dma_address(&s->sg_tx));
+                        dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", __func__,
+                                sg_dma_len(&s->sg_tx), port->state->xmit.buf,
+                                &sg_dma_address(&s->sg_tx));
 
                 s->sg_len_tx = nent;
 
@@ -1740,7 +1683,7 @@ static void sci_request_dma(struct uart_port *port)
 
                         sg_init_table(sg, 1);
                         sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
-                                    (int)buf[i] & ~PAGE_MASK);
+                                    (uintptr_t)buf[i] & ~PAGE_MASK);
                         sg_dma_address(sg) = dma[i];
                 }
 
@@ -1808,20 +1751,21 @@ static void sci_shutdown(struct uart_port *port)
         sci_free_irq(s);
 }
 
-static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
+static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
                                    unsigned long freq)
 {
-        switch (algo_id) {
+        if (s->sampling_rate)
+                return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
+
+        switch (s->cfg->scbrr_algo_id) {
         case SCBRR_ALGO_1:
-                return ((freq + 16 * bps) / (16 * bps) - 1);
+                return freq / (16 * bps);
         case SCBRR_ALGO_2:
-                return ((freq + 16 * bps) / (32 * bps) - 1);
+                return DIV_ROUND_CLOSEST(freq, 32 * bps) - 1;
         case SCBRR_ALGO_3:
-                return (((freq * 2) + 16 * bps) / (16 * bps) - 1);
+                return freq / (8 * bps);
         case SCBRR_ALGO_4:
-                return (((freq * 2) + 16 * bps) / (32 * bps) - 1);
-        case SCBRR_ALGO_5:
-                return (((freq * 1000 / 32) / bps) - 1);
+                return DIV_ROUND_CLOSEST(freq, 16 * bps) - 1;
         }
 
         /* Warn, but use a safe default */
@@ -1903,12 +1847,11 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
 
         baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
         if (likely(baud && port->uartclk)) {
-                if (s->cfg->scbrr_algo_id == SCBRR_ALGO_6) {
+                if (s->cfg->type == PORT_HSCIF) {
                         sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
                                             &cks);
                 } else {
-                        t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud,
-                                           port->uartclk);
+                        t = sci_scbrr_calc(s, baud, port->uartclk);
                         for (cks = 0; t >= 256 && cks <= 3; cks++)
                                 t >>= 2;
                 }
@@ -2115,10 +2058,6 @@ static void sci_config_port(struct uart_port *port, int flags)
 
 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
 {
-        struct sci_port *s = to_sci_port(port);
-
-        if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
-                return -EINVAL;
         if (ser->baud_base < 2400)
                 /* No paper tape reader for Mitch.. */
                 return -EINVAL;
@@ -2151,11 +2090,13 @@ static struct uart_ops sci_uart_ops = {
 };
 
 static int sci_init_single(struct platform_device *dev,
-                                     struct sci_port *sci_port,
-                                     unsigned int index,
-                                     struct plat_sci_port *p)
+                           struct sci_port *sci_port, unsigned int index,
+                           struct plat_sci_port *p, bool early)
 {
         struct uart_port *port = &sci_port->port;
+        const struct resource *res;
+        unsigned int sampling_rate;
+        unsigned int i;
         int ret;
 
         sci_port->cfg   = p;
@@ -2164,31 +2105,90 @@ static int sci_init_single(struct platform_device *dev,
         port->iotype    = UPIO_MEM;
         port->line      = index;
 
+        if (dev->num_resources) {
+                /* Device has resources, use them. */
+                res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+                if (res == NULL)
+                        return -ENOMEM;
+
+                port->mapbase = res->start;
+
+                for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
+                        sci_port->irqs[i] = platform_get_irq(dev, i);
+
+                /* The SCI generates several interrupts. They can be muxed
+                 * together or connected to different interrupt lines. In the
+                 * muxed case only one interrupt resource is specified. In the
+                 * non-muxed case three or four interrupt resources are
+                 * specified, as the BRI interrupt is optional.
+                 */
+                if (sci_port->irqs[0] < 0)
+                        return -ENXIO;
+
+                if (sci_port->irqs[1] < 0) {
+                        sci_port->irqs[1] = sci_port->irqs[0];
+                        sci_port->irqs[2] = sci_port->irqs[0];
+                        sci_port->irqs[3] = sci_port->irqs[0];
+                }
+        } else {
+                /* No resources, use old-style platform data. */
+                port->mapbase = p->mapbase;
+                for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
+                        sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
+        }
+
+        if (p->regtype == SCIx_PROBE_REGTYPE) {
+                ret = sci_probe_regmap(p);
+                if (unlikely(ret))
+                        return ret;
+        }
+
         switch (p->type) {
         case PORT_SCIFB:
                 port->fifosize = 256;
+                sci_port->overrun_bit = 9;
+                sampling_rate = 16;
                 break;
         case PORT_HSCIF:
                 port->fifosize = 128;
+                sampling_rate = 0;
+                sci_port->overrun_bit = 0;
                 break;
         case PORT_SCIFA:
                 port->fifosize = 64;
+                sci_port->overrun_bit = 9;
+                sampling_rate = 16;
                 break;
         case PORT_SCIF:
                 port->fifosize = 16;
+                if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) {
+                        sci_port->overrun_bit = 9;
+                        sampling_rate = 16;
+                } else {
+                        sci_port->overrun_bit = 0;
+                        sampling_rate = 32;
+                }
                 break;
         default:
                 port->fifosize = 1;
+                sci_port->overrun_bit = 5;
+                sampling_rate = 32;
                 break;
         }
 
-        if (p->regtype == SCIx_PROBE_REGTYPE) {
-                ret = sci_probe_regmap(p);
-                if (unlikely(ret))
-                        return ret;
+        /* Set the sampling rate if the baud rate calculation algorithm isn't
+         * specified.
+         */
+        if (p->scbrr_algo_id == SCBRR_ALGO_NONE) {
+                /* SCIFA on sh7723 and sh7724 need a custom sampling rate that
+                 * doesn't match the SoC datasheet, this should be investigated.
+                 * Let platform data override the sampling rate for now.
+                 */
+                sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
+                                        : sampling_rate;
         }
 
-        if (dev) {
+        if (!early) {
                 sci_port->iclk = clk_get(&dev->dev, "sci_ick");
                 if (IS_ERR(sci_port->iclk)) {
                         sci_port->iclk = clk_get(&dev->dev, "peripheral_clk");
@@ -2208,8 +2208,6 @@ static int sci_init_single(struct platform_device *dev,
 
                 port->dev = &dev->dev;
 
-                sci_init_gpios(sci_port);
-
                 pm_runtime_enable(&dev->dev);
         }
 
@@ -2220,32 +2218,22 @@ static int sci_init_single(struct platform_device *dev,
         /*
          * Establish some sensible defaults for the error detection.
          */
-        if (!p->error_mask)
-                p->error_mask = (p->type == PORT_SCI) ?
+        sci_port->error_mask = (p->type == PORT_SCI) ?
                         SCI_DEFAULT_ERROR_MASK : SCIF_DEFAULT_ERROR_MASK;
 
         /*
          * Establish sensible defaults for the overrun detection, unless
          * the part has explicitly disabled support for it.
          */
-        if (p->overrun_bit != SCIx_NOT_SUPPORTED) {
-                if (p->type == PORT_SCI)
-                        p->overrun_bit = 5;
-                else if (p->scbrr_algo_id == SCBRR_ALGO_4)
-                        p->overrun_bit = 9;
-                else
-                        p->overrun_bit = 0;
 
-                /*
-                 * Make the error mask inclusive of overrun detection, if
-                 * supported.
-                 */
-                p->error_mask |= (1 << p->overrun_bit);
-        }
+        /*
+         * Make the error mask inclusive of overrun detection, if
+         * supported.
+         */
+        sci_port->error_mask |= 1 << sci_port->overrun_bit;
 
-        port->mapbase           = p->mapbase;
         port->type              = p->type;
-        port->flags             = p->flags;
+        port->flags             = UPF_FIXED_PORT | p->flags;
         port->regshift          = p->regshift;
 
         /*
@@ -2255,7 +2243,7 @@ static int sci_init_single(struct platform_device *dev,
          *
          * For the muxed case there's nothing more to do.
          */
-        port->irq               = p->irqs[SCIx_RXI_IRQ];
+        port->irq               = sci_port->irqs[SCIx_RXI_IRQ];
         port->irqflags          = 0;
 
         port->serial_in         = sci_serial_in;
@@ -2270,8 +2258,6 @@ static int sci_init_single(struct platform_device *dev,
 
 static void sci_cleanup_single(struct sci_port *port)
 {
-        sci_free_gpios(port);
-
         clk_put(port->iclk);
         clk_put(port->fclk);
 
@@ -2387,7 +2373,7 @@ static int sci_probe_earlyprintk(struct platform_device *pdev)
 
         early_serial_console.index = pdev->id;
 
-        sci_init_single(NULL, &sci_ports[pdev->id], pdev->id, cfg);
+        sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true);
 
         serial_console_setup(&early_serial_console, early_serial_buf);
 
@@ -2454,7 +2440,7 @@ static int sci_probe_single(struct platform_device *dev,
                 return -EINVAL;
         }
 
-        ret = sci_init_single(dev, sciport, index, p);
+        ret = sci_init_single(dev, sciport, index, p, false);
         if (ret)
                 return ret;
 
diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
index 5aca7364634c..d5db81a0a430 100644
--- a/drivers/tty/serial/sh-sci.h
+++ b/drivers/tty/serial/sh-sci.h
@@ -9,7 +9,7 @@
 #define SCxSR_PER(port)         (((port)->type == PORT_SCI) ? SCI_PER    : SCIF_PER)
 #define SCxSR_BRK(port)         (((port)->type == PORT_SCI) ? 0x00       : SCIF_BRK)
 
-#define SCxSR_ERRORS(port)      (to_sci_port(port)->cfg->error_mask)
+#define SCxSR_ERRORS(port)      (to_sci_port(port)->error_mask)
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
     defined(CONFIG_CPU_SUBTYPE_SH7720) || \
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 3e7560f004f8..e8404319ca68 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -1515,6 +1515,8 @@ static int acm_reset_resume(struct usb_interface *intf)
 
 static const struct usb_device_id acm_ids[] = {
         /* quirky and broken devices */
+        { USB_DEVICE(0x17ef, 0x7000), /* Lenovo USB modem */
+        .driver_info = NO_UNION_NORMAL, },/* has no union descriptor */
         { USB_DEVICE(0x0870, 0x0001), /* Metricom GS Modem */
         .driver_info = NO_UNION_NORMAL, /* has no union descriptor */
         },
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index a7c04e24ca48..bd9dc3504b51 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -4832,8 +4832,9 @@ static void hub_events(void)
                                         hub->ports[i - 1]->child;
 
                                 dev_dbg(hub_dev, "warm reset port %d\n", i);
-                                if (!udev || !(portstatus &
-                                                USB_PORT_STAT_CONNECTION)) {
+                                if (!udev ||
+                                    !(portstatus & USB_PORT_STAT_CONNECTION) ||
+                                    udev->state == USB_STATE_NOTATTACHED) {
                                         status = hub_port_reset(hub, i,
                                                         NULL, HUB_BH_RESET_TIME,
                                                         true);
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 95f7649c71a7..21a352079bc2 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -459,6 +459,8 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
                         dep = dwc3_wIndex_to_dep(dwc, wIndex);
                         if (!dep)
                                 return -EINVAL;
+                        if (set == 0 && (dep->flags & DWC3_EP_WEDGE))
+                                break;
                         ret = __dwc3_gadget_ep_set_halt(dep, set);
                         if (ret)
                                 return -EINVAL;
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 5452c0fce360..02e44fcaf205 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1200,9 +1200,6 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value)
                 else
                         dep->flags |= DWC3_EP_STALL;
         } else {
-                if (dep->flags & DWC3_EP_WEDGE)
-                        return 0;
-
                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
                         DWC3_DEPCMD_CLEARSTALL, &params);
                 if (ret)
@@ -1210,7 +1207,7 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value)
                                         value ? "set" : "clear",
                                         dep->name);
                 else
-                        dep->flags &= ~DWC3_EP_STALL;
+                        dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE);
         }
 
         return ret;
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index a91e6422f930..f66d96ad1f51 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -682,6 +682,7 @@ config USB_CONFIGFS_PHONET
 config USB_CONFIGFS_MASS_STORAGE
         boolean "Mass storage"
         depends on USB_CONFIGFS
+        depends on BLOCK
         select USB_F_MASS_STORAGE
         help
           The Mass Storage Gadget acts as a USB Mass Storage disk drive.
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 3e7ae707f691..2018ba1a2172 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -593,6 +593,7 @@ static void reset_config(struct usb_composite_dev *cdev)
                 bitmap_zero(f->endpoints, 32);
         }
         cdev->config = NULL;
+        cdev->delayed_status = 0;
 }
 
 static int set_config(struct usb_composite_dev *cdev,
diff --git a/drivers/usb/gadget/f_fs.c b/drivers/usb/gadget/f_fs.c
index 774e8b89cdb5..241fc873ffa4 100644
--- a/drivers/usb/gadget/f_fs.c
+++ b/drivers/usb/gadget/f_fs.c
@@ -1304,7 +1304,7 @@ static struct ffs_data *ffs_data_new(void)
 {
         struct ffs_data *ffs = kzalloc(sizeof *ffs, GFP_KERNEL);
         if (unlikely(!ffs))
-                return 0;
+                return NULL;
 
         ENTER();
 
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index a03ba2c83589..b96393908860 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -523,7 +523,7 @@ static int fsg_setup(struct usb_function *f,
                  */
                 DBG(fsg, "bulk reset request\n");
                 raise_exception(fsg->common, FSG_STATE_RESET);
-                return DELAYED_STATUS;
+                return USB_GADGET_DELAYED_STATUS;
 
         case US_BULK_GET_MAX_LUN:
                 if (ctrl->bRequestType !=
@@ -602,13 +602,14 @@ static bool start_out_transfer(struct fsg_common *common, struct fsg_buffhd *bh)
         return true;
 }
 
-static int sleep_thread(struct fsg_common *common)
+static int sleep_thread(struct fsg_common *common, bool can_freeze)
 {
         int     rc = 0;
 
         /* Wait until a signal arrives or we are woken up */
         for (;;) {
-                try_to_freeze();
+                if (can_freeze)
+                        try_to_freeze();
                 set_current_state(TASK_INTERRUPTIBLE);
                 if (signal_pending(current)) {
                         rc = -EINTR;
@@ -682,7 +683,7 @@ static int do_read(struct fsg_common *common)
                 /* Wait for the next buffer to become available */
                 bh = common->next_buffhd_to_fill;
                 while (bh->state != BUF_STATE_EMPTY) {
-                        rc = sleep_thread(common);
+                        rc = sleep_thread(common, false);
                         if (rc)
                                 return rc;
                 }
@@ -937,7 +938,7 @@ static int do_write(struct fsg_common *common)
                 }
 
                 /* Wait for something to happen */
-                rc = sleep_thread(common);
+                rc = sleep_thread(common, false);
                 if (rc)
                         return rc;
         }
@@ -1504,7 +1505,7 @@ static int throw_away_data(struct fsg_common *common)
                 }
 
                 /* Otherwise wait for something to happen */
-                rc = sleep_thread(common);
+                rc = sleep_thread(common, true);
                 if (rc)
                         return rc;
         }
@@ -1625,7 +1626,7 @@ static int send_status(struct fsg_common *common)
         /* Wait for the next buffer to become available */
         bh = common->next_buffhd_to_fill;
         while (bh->state != BUF_STATE_EMPTY) {
-                rc = sleep_thread(common);
+                rc = sleep_thread(common, true);
                 if (rc)
                         return rc;
         }
@@ -1828,7 +1829,7 @@ static int do_scsi_command(struct fsg_common *common)
         bh = common->next_buffhd_to_fill;
         common->next_buffhd_to_drain = bh;
         while (bh->state != BUF_STATE_EMPTY) {
-                rc = sleep_thread(common);
+                rc = sleep_thread(common, true);
                 if (rc)
                         return rc;
         }
@@ -2174,7 +2175,7 @@ static int get_next_command(struct fsg_common *common)
         /* Wait for the next buffer to become available */
         bh = common->next_buffhd_to_fill;
         while (bh->state != BUF_STATE_EMPTY) {
-                rc = sleep_thread(common);
+                rc = sleep_thread(common, true);
                 if (rc)
                         return rc;
         }
@@ -2193,7 +2194,7 @@ static int get_next_command(struct fsg_common *common)
 
         /* Wait for the CBW to arrive */
         while (bh->state != BUF_STATE_FULL) {
-                rc = sleep_thread(common);
+                rc = sleep_thread(common, true);
                 if (rc)
                         return rc;
         }
@@ -2379,7 +2380,7 @@ static void handle_exception(struct fsg_common *common)
                         }
                         if (num_active == 0)
                                 break;
-                        if (sleep_thread(common))
+                        if (sleep_thread(common, true))
                                 return;
                 }
 
@@ -2516,7 +2517,7 @@ static int fsg_main_thread(void *common_)
                 }
 
                 if (!common->running) {
-                        sleep_thread(common);
+                        sleep_thread(common, true);
                         continue;
                 }
 
@@ -3111,7 +3112,7 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
                                           fsg->common->can_stall);
                 if (ret)
                         return ret;
-                fsg_common_set_inquiry_string(fsg->common, 0, 0);
+                fsg_common_set_inquiry_string(fsg->common, NULL, NULL);
                 ret = fsg_common_run_thread(fsg->common);
                 if (ret)
                         return ret;
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 0ac6064aa3b8..409a3c45a36a 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -54,6 +54,7 @@
  */
 #ifdef CONFIG_ARCH_PXA
 #include <mach/pxa25x-udc.h>
+#include <mach/hardware.h>
 #endif
 
 #ifdef CONFIG_ARCH_LUBBOCK
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 9875d9c0823f..e20bc109fdd7 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -1180,6 +1180,7 @@ static int s3c_hsotg_process_req_feature(struct s3c_hsotg *hsotg,
 }
 
 static void s3c_hsotg_enqueue_setup(struct s3c_hsotg *hsotg);
+static void s3c_hsotg_disconnect(struct s3c_hsotg *hsotg);
 
 /**
  * s3c_hsotg_process_control - process a control request
@@ -1221,6 +1222,7 @@ static void s3c_hsotg_process_control(struct s3c_hsotg *hsotg,
         if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
                 switch (ctrl->bRequest) {
                 case USB_REQ_SET_ADDRESS:
+                        s3c_hsotg_disconnect(hsotg);
                         dcfg = readl(hsotg->regs + DCFG);
                         dcfg &= ~DCFG_DevAddr_MASK;
                         dcfg |= ctrl->wValue << DCFG_DevAddr_SHIFT;
@@ -1245,7 +1247,9 @@ static void s3c_hsotg_process_control(struct s3c_hsotg *hsotg,
         /* as a fallback, try delivering it to the driver to deal with */
 
         if (ret == 0 && hsotg->driver) {
+                spin_unlock(&hsotg->lock);
                 ret = hsotg->driver->setup(&hsotg->gadget, ctrl);
+                spin_lock(&hsotg->lock);
                 if (ret < 0)
                         dev_dbg(hsotg->dev, "driver->setup() ret %d\n", ret);
         }
@@ -1308,10 +1312,12 @@ static void s3c_hsotg_complete_setup(struct usb_ep *ep,
                 return;
         }
 
+        spin_lock(&hsotg->lock);
         if (req->actual == 0)
                 s3c_hsotg_enqueue_setup(hsotg);
         else
                 s3c_hsotg_process_control(hsotg, req->buf);
+        spin_unlock(&hsotg->lock);
 }
 
 /**
@@ -2533,7 +2539,6 @@ irq_retry:
                 writel(GINTSTS_USBSusp, hsotg->regs + GINTSTS);
 
                 call_gadget(hsotg, suspend);
-                s3c_hsotg_disconnect(hsotg);
         }
 
         if (gintsts & GINTSTS_WkUpInt) {
diff --git a/drivers/usb/gadget/storage_common.h b/drivers/usb/gadget/storage_common.h
index c74c2fdbd56e..70c891469f57 100644
--- a/drivers/usb/gadget/storage_common.h
+++ b/drivers/usb/gadget/storage_common.h
@@ -119,10 +119,6 @@ static inline bool fsg_lun_is_open(struct fsg_lun *curlun)
         return curlun->filp != NULL;
 }
 
-/* Big enough to hold our biggest descriptor */
-#define EP0_BUFSIZE     256
-#define DELAYED_STATUS  (EP0_BUFSIZE + 999)     /* An impossibly large value */
-
 /* Default size of buffer length. */
 #define FSG_BUFLEN      ((u32)16384)
 
diff --git a/drivers/usb/gadget/tcm_usb_gadget.c b/drivers/usb/gadget/tcm_usb_gadget.c
index 6c3d7950d2a9..0f8aad78b54f 100644
--- a/drivers/usb/gadget/tcm_usb_gadget.c
+++ b/drivers/usb/gadget/tcm_usb_gadget.c
@@ -370,7 +370,7 @@ err:
         return -ENOMEM;
 }
 
-void bot_cleanup_old_alt(struct f_uas *fu)
+static void bot_cleanup_old_alt(struct f_uas *fu)
 {
         if (!(fu->flags & USBG_ENABLED))
                 return;
diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c
index 0dd07ae1555d..f49b0b61ecc8 100644
--- a/drivers/usb/gadget/zero.c
+++ b/drivers/usb/gadget/zero.c
@@ -91,17 +91,17 @@ static struct usb_zero_options gzero_options = {
  * functional coverage for the "USBCV" test harness from USB-IF.
  * It's always set if OTG mode is enabled.
  */
-unsigned autoresume = DEFAULT_AUTORESUME;
+static unsigned autoresume = DEFAULT_AUTORESUME;
 module_param(autoresume, uint, S_IRUGO);
 MODULE_PARM_DESC(autoresume, "zero, or seconds before remote wakeup");
 
 /* Maximum Autoresume time */
-unsigned max_autoresume;
+static unsigned max_autoresume;
 module_param(max_autoresume, uint, S_IRUGO);
 MODULE_PARM_DESC(max_autoresume, "maximum seconds before remote wakeup");
 
 /* Interval between two remote wakeups */
-unsigned autoresume_interval_ms;
+static unsigned autoresume_interval_ms;
 module_param(autoresume_interval_ms, uint, S_IRUGO);
 MODULE_PARM_DESC(autoresume_interval_ms,
                 "milliseconds to increase successive wakeup delays");
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index b9fd0396011e..6f7e23dd1417 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -17,7 +17,6 @@
  */
 
 #include <linux/clk.h>
-#include <linux/clk/tegra.h>
 #include <linux/dma-mapping.h>
 #include <linux/err.h>
 #include <linux/gpio.h>
@@ -29,6 +28,7 @@
 #include <linux/of_gpio.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
 #include <linux/usb/ehci_def.h>
 #include <linux/usb/tegra_usb_phy.h>
@@ -62,6 +62,7 @@ static int (*orig_hub_control)(struct usb_hcd *hcd,
 struct tegra_ehci_hcd {
         struct tegra_usb_phy *phy;
         struct clk *clk;
+        struct reset_control *rst;
         int port_resuming;
         bool needs_double_reset;
         enum tegra_usb_phy_port_speed port_speed;
@@ -385,13 +386,20 @@ static int tegra_ehci_probe(struct platform_device *pdev)
                 goto cleanup_hcd_create;
         }
 
+        tegra->rst = devm_reset_control_get(&pdev->dev, "usb");
+        if (IS_ERR(tegra->rst)) {
+                dev_err(&pdev->dev, "Can't get ehci reset\n");
+                err = PTR_ERR(tegra->rst);
+                goto cleanup_hcd_create;
+        }
+
         err = clk_prepare_enable(tegra->clk);
         if (err)
                 goto cleanup_hcd_create;
 
-        tegra_periph_reset_assert(tegra->clk);
+        reset_control_assert(tegra->rst);
         udelay(1);
-        tegra_periph_reset_deassert(tegra->clk);
+        reset_control_deassert(tegra->rst);
 
         u_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
         if (IS_ERR(u_phy)) {
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index e89ac4d4b87e..9b7435f0dcd6 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -21,6 +21,7 @@
 
 #include <linux/clk.h>
 #include <linux/device.h>
+#include <linux/dma-mapping.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 1e2f3f495843..53c2e296467f 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -2973,8 +2973,58 @@ static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
         }
 
         while (1) {
-                if (room_on_ring(xhci, ep_ring, num_trbs))
-                        break;
+                if (room_on_ring(xhci, ep_ring, num_trbs)) {
+                        union xhci_trb *trb = ep_ring->enqueue;
+                        unsigned int usable = ep_ring->enq_seg->trbs +
+                                        TRBS_PER_SEGMENT - 1 - trb;
+                        u32 nop_cmd;
+
+                        /*
+                         * Section 4.11.7.1 TD Fragments states that a link
+                         * TRB must only occur at the boundary between
+                         * data bursts (eg 512 bytes for 480M).
+                         * While it is possible to split a large fragment
+                         * we don't know the size yet.
+                         * Simplest solution is to fill the trb before the
+                         * LINK with nop commands.
+                         */
+                        if (num_trbs == 1 || num_trbs <= usable || usable == 0)
+                                break;
+
+                        if (ep_ring->type != TYPE_BULK)
+                                /*
+                                 * While isoc transfers might have a buffer that
+                                 * crosses a 64k boundary it is unlikely.
+                                 * Since we can't add NOPs without generating
+                                 * gaps in the traffic just hope it never
+                                 * happens at the end of the ring.
+                                 * This could be fixed by writing a LINK TRB
+                                 * instead of the first NOP - however the
+                                 * TRB_TYPE_LINK_LE32() calls would all need
+                                 * changing to check the ring length.
+                                 */
+                                break;
+
+                        if (num_trbs >= TRBS_PER_SEGMENT) {
+                                xhci_err(xhci, "Too many fragments %d, max %d\n",
+                                                num_trbs, TRBS_PER_SEGMENT - 1);
+                                return -ENOMEM;
+                        }
+
+                        nop_cmd = cpu_to_le32(TRB_TYPE(TRB_TR_NOOP) |
+                                        ep_ring->cycle_state);
+                        ep_ring->num_trbs_free -= usable;
+                        do {
+                                trb->generic.field[0] = 0;
+                                trb->generic.field[1] = 0;
+                                trb->generic.field[2] = 0;
+                                trb->generic.field[3] = nop_cmd;
+                                trb++;
+                        } while (--usable);
+                        ep_ring->enqueue = trb;
+                        if (room_on_ring(xhci, ep_ring, num_trbs))
+                                break;
+                }
 
                 if (ep_ring == xhci->cmd_ring) {
                         xhci_err(xhci, "Do not support expand command ring\n");
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 0a43329569d1..4d4499b80449 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1809,7 +1809,6 @@ static void musb_free(struct musb *musb)
                         disable_irq_wake(musb->nIrq);
                 free_irq(musb->nIrq, musb);
         }
-        cancel_work_sync(&musb->irq_work);
 
         musb_host_free(musb);
 }
@@ -1896,6 +1895,9 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
         musb_platform_disable(musb);
         musb_generic_disable(musb);
 
+        /* Init IRQ workqueue before request_irq */
+        INIT_WORK(&musb->irq_work, musb_irq_work);
+
         /* setup musb parts of the core (especially endpoints) */
         status = musb_core_init(plat->config->multipoint
                         ? MUSB_CONTROLLER_MHDRC
@@ -1905,9 +1907,6 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
 
         setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb);
 
-        /* Init IRQ workqueue before request_irq */
-        INIT_WORK(&musb->irq_work, musb_irq_work);
-
         /* attach to the IRQ */
         if (request_irq(nIrq, musb->isr, 0, dev_name(dev), musb)) {
                 dev_err(dev, "request_irq %d failed!\n", nIrq);
@@ -1981,6 +1980,7 @@ fail4:
         musb_host_cleanup(musb);
 
 fail3:
+        cancel_work_sync(&musb->irq_work);
         if (musb->dma_controller)
                 dma_controller_destroy(musb->dma_controller);
 fail2_5:
@@ -2043,6 +2043,7 @@ static int musb_remove(struct platform_device *pdev)
         if (musb->dma_controller)
                 dma_controller_destroy(musb->dma_controller);
 
+        cancel_work_sync(&musb->irq_work);
         musb_free(musb);
         device_init_wakeup(dev, 0);
         return 0;
diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c
index ff9d6de2b746..a12bd30401e0 100644
--- a/drivers/usb/musb/musb_cppi41.c
+++ b/drivers/usb/musb/musb_cppi41.c
@@ -38,6 +38,7 @@ struct cppi41_dma_channel {
         u32 prog_len;
         u32 transferred;
         u32 packet_sz;
+        struct list_head tx_check;
 };
 
 #define MUSB_DMA_NUM_CHANNELS 15
@@ -47,6 +48,8 @@ struct cppi41_dma_controller {
         struct cppi41_dma_channel rx_channel[MUSB_DMA_NUM_CHANNELS];
         struct cppi41_dma_channel tx_channel[MUSB_DMA_NUM_CHANNELS];
         struct musb *musb;
+        struct hrtimer early_tx;
+        struct list_head early_tx_list;
         u32 rx_mode;
         u32 tx_mode;
         u32 auto_req;
@@ -96,31 +99,27 @@ static void update_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
         cppi41_channel->usb_toggle = toggle;
 }
 
-static void cppi41_dma_callback(void *private_data)
+static bool musb_is_tx_fifo_empty(struct musb_hw_ep *hw_ep)
 {
-        struct dma_channel *channel = private_data;
-        struct cppi41_dma_channel *cppi41_channel = channel->private_data;
-        struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
-        struct musb *musb = hw_ep->musb;
-        unsigned long flags;
-        struct dma_tx_state txstate;
-        u32 transferred;
+        u8              epnum = hw_ep->epnum;
+        struct musb     *musb = hw_ep->musb;
+        void __iomem    *epio = musb->endpoints[epnum].regs;
+        u16             csr;
 
-        spin_lock_irqsave(&musb->lock, flags);
+        csr = musb_readw(epio, MUSB_TXCSR);
+        if (csr & MUSB_TXCSR_TXPKTRDY)
+                return false;
+        return true;
+}
 
-        dmaengine_tx_status(cppi41_channel->dc, cppi41_channel->cookie,
-                        &txstate);
-        transferred = cppi41_channel->prog_len - txstate.residue;
-        cppi41_channel->transferred += transferred;
+static void cppi41_dma_callback(void *private_data);
 
-        dev_dbg(musb->controller, "DMA transfer done on hw_ep=%d bytes=%d/%d\n",
-                hw_ep->epnum, cppi41_channel->transferred,
-                cppi41_channel->total_len);
+static void cppi41_trans_done(struct cppi41_dma_channel *cppi41_channel)
+{
+        struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
+        struct musb *musb = hw_ep->musb;
 
-        update_rx_toggle(cppi41_channel);
-
-        if (cppi41_channel->transferred == cppi41_channel->total_len ||
-                        transferred < cppi41_channel->packet_sz) {
+        if (!cppi41_channel->prog_len) {
 
                 /* done, complete */
                 cppi41_channel->channel.actual_len =
@@ -150,13 +149,11 @@ static void cppi41_dma_callback(void *private_data)
                                 remain_bytes,
                                 direction,
                                 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
-                if (WARN_ON(!dma_desc)) {
-                        spin_unlock_irqrestore(&musb->lock, flags);
+                if (WARN_ON(!dma_desc))
                         return;
-                }
 
                 dma_desc->callback = cppi41_dma_callback;
-                dma_desc->callback_param = channel;
+                dma_desc->callback_param = &cppi41_channel->channel;
                 cppi41_channel->cookie = dma_desc->tx_submit(dma_desc);
                 dma_async_issue_pending(dc);
 
@@ -166,6 +163,117 @@ static void cppi41_dma_callback(void *private_data)
                         musb_writew(epio, MUSB_RXCSR, csr);
                 }
         }
+}
+
+static enum hrtimer_restart cppi41_recheck_tx_req(struct hrtimer *timer)
+{
+        struct cppi41_dma_controller *controller;
+        struct cppi41_dma_channel *cppi41_channel, *n;
+        struct musb *musb;
+        unsigned long flags;
+        enum hrtimer_restart ret = HRTIMER_NORESTART;
+
+        controller = container_of(timer, struct cppi41_dma_controller,
+                        early_tx);
+        musb = controller->musb;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        list_for_each_entry_safe(cppi41_channel, n, &controller->early_tx_list,
+                        tx_check) {
+                bool empty;
+                struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
+
+                empty = musb_is_tx_fifo_empty(hw_ep);
+                if (empty) {
+                        list_del_init(&cppi41_channel->tx_check);
+                        cppi41_trans_done(cppi41_channel);
+                }
+        }
+
+        if (!list_empty(&controller->early_tx_list)) {
+                ret = HRTIMER_RESTART;
+                hrtimer_forward_now(&controller->early_tx,
+                                ktime_set(0, 150 * NSEC_PER_USEC));
+        }
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return ret;
+}
+
+static void cppi41_dma_callback(void *private_data)
+{
+        struct dma_channel *channel = private_data;
+        struct cppi41_dma_channel *cppi41_channel = channel->private_data;
+        struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
+        struct musb *musb = hw_ep->musb;
+        unsigned long flags;
+        struct dma_tx_state txstate;
+        u32 transferred;
+        bool empty;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        dmaengine_tx_status(cppi41_channel->dc, cppi41_channel->cookie,
+                        &txstate);
+        transferred = cppi41_channel->prog_len - txstate.residue;
+        cppi41_channel->transferred += transferred;
+
+        dev_dbg(musb->controller, "DMA transfer done on hw_ep=%d bytes=%d/%d\n",
+                hw_ep->epnum, cppi41_channel->transferred,
+                cppi41_channel->total_len);
+
+        update_rx_toggle(cppi41_channel);
+
+        if (cppi41_channel->transferred == cppi41_channel->total_len ||
+                        transferred < cppi41_channel->packet_sz)
+                cppi41_channel->prog_len = 0;
+
+        empty = musb_is_tx_fifo_empty(hw_ep);
+        if (empty) {
+                cppi41_trans_done(cppi41_channel);
+        } else {
+                struct cppi41_dma_controller *controller;
+                /*
+                 * On AM335x it has been observed that the TX interrupt fires
+                 * too early that means the TXFIFO is not yet empty but the DMA
+                 * engine says that it is done with the transfer. We don't
+                 * receive a FIFO empty interrupt so the only thing we can do is
+                 * to poll for the bit. On HS it usually takes 2us, on FS around
+                 * 110us - 150us depending on the transfer size.
+                 * We spin on HS (no longer than than 25us and setup a timer on
+                 * FS to check for the bit and complete the transfer.
+                 */
+                controller = cppi41_channel->controller;
+
+                if (musb->g.speed == USB_SPEED_HIGH) {
+                        unsigned wait = 25;
+
+                        do {
+                                empty = musb_is_tx_fifo_empty(hw_ep);
+                                if (empty)
+                                        break;
+                                wait--;
+                                if (!wait)
+                                        break;
+                                udelay(1);
+                        } while (1);
+
+                        empty = musb_is_tx_fifo_empty(hw_ep);
+                        if (empty) {
+                                cppi41_trans_done(cppi41_channel);
+                                goto out;
+                        }
+                }
+                list_add_tail(&cppi41_channel->tx_check,
+                                &controller->early_tx_list);
+                if (!hrtimer_active(&controller->early_tx)) {
+                        hrtimer_start_range_ns(&controller->early_tx,
+                                ktime_set(0, 140 * NSEC_PER_USEC),
+                                40 * NSEC_PER_USEC,
+                                HRTIMER_MODE_REL);
+                }
+        }
+out:
         spin_unlock_irqrestore(&musb->lock, flags);
 }
 
@@ -364,6 +472,8 @@ static int cppi41_is_compatible(struct dma_channel *channel, u16 maxpacket,
                 WARN_ON(1);
                 return 1;
         }
+        if (cppi41_channel->hw_ep->ep_in.type != USB_ENDPOINT_XFER_BULK)
+                return 0;
         if (cppi41_channel->is_tx)
                 return 1;
         /* AM335x Advisory 1.0.13. No workaround for device RX mode */
@@ -388,6 +498,7 @@ static int cppi41_dma_channel_abort(struct dma_channel *channel)
         if (cppi41_channel->channel.status == MUSB_DMA_STATUS_FREE)
                 return 0;
 
+        list_del_init(&cppi41_channel->tx_check);
         if (is_tx) {
                 csr = musb_readw(epio, MUSB_TXCSR);
                 csr &= ~MUSB_TXCSR_DMAENAB;
@@ -495,6 +606,7 @@ static int cppi41_dma_controller_start(struct cppi41_dma_controller *controller)
                 cppi41_channel->controller = controller;
                 cppi41_channel->port_num = port;
                 cppi41_channel->is_tx = is_tx;
+                INIT_LIST_HEAD(&cppi41_channel->tx_check);
 
                 musb_dma = &cppi41_channel->channel;
                 musb_dma->private_data = cppi41_channel;
@@ -520,6 +632,7 @@ void dma_controller_destroy(struct dma_controller *c)
         struct cppi41_dma_controller *controller = container_of(c,
                         struct cppi41_dma_controller, controller);
 
+        hrtimer_cancel(&controller->early_tx);
         cppi41_dma_controller_stop(controller);
         kfree(controller);
 }
@@ -539,6 +652,9 @@ struct dma_controller *dma_controller_create(struct musb *musb,
         if (!controller)
                 goto kzalloc_fail;
 
+        hrtimer_init(&controller->early_tx, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+        controller->early_tx.function = cppi41_recheck_tx_req;
+        INIT_LIST_HEAD(&controller->early_tx_list);
         controller->musb = musb;
 
         controller->controller.channel_alloc = cppi41_dma_channel_allocate;
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index d2d3a173b315..32fb057c03f5 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -1796,7 +1796,11 @@ int musb_gadget_setup(struct musb *musb)
 
         /* this "gadget" abstracts/virtualizes the controller */
         musb->g.name = musb_driver_name;
+#if IS_ENABLED(CONFIG_USB_MUSB_DUAL_ROLE)
         musb->g.is_otg = 1;
+#elif IS_ENABLED(CONFIG_USB_MUSB_GADGET)
+        musb->g.is_otg = 0;
+#endif
 
         musb_g_init_endpoints(musb);
 
diff --git a/drivers/usb/phy/phy-am335x.c b/drivers/usb/phy/phy-am335x.c
index 6370e50649d7..0e3c60cb669a 100644
--- a/drivers/usb/phy/phy-am335x.c
+++ b/drivers/usb/phy/phy-am335x.c
@@ -52,8 +52,7 @@ static int am335x_phy_probe(struct platform_device *pdev)
                 return am_phy->id;
         }
 
-        ret = usb_phy_gen_create_phy(dev, &am_phy->usb_phy_gen,
-                        USB_PHY_TYPE_USB2, 0, false);
+        ret = usb_phy_gen_create_phy(dev, &am_phy->usb_phy_gen, NULL);
         if (ret)
                 return ret;
 
@@ -66,8 +65,6 @@ static int am335x_phy_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, am_phy);
 
         return 0;
-
-        return ret;
 }
 
 static int am335x_phy_remove(struct platform_device *pdev)
diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
index fce3a9e9bb5d..aa6d37b3378a 100644
--- a/drivers/usb/phy/phy-generic.c
+++ b/drivers/usb/phy/phy-generic.c
@@ -48,8 +48,9 @@ void usb_nop_xceiv_register(void)
         if (pd)
                 return;
         pd = platform_device_register_simple("usb_phy_gen_xceiv", -1, NULL, 0);
-        if (!pd) {
+        if (IS_ERR(pd)) {
                 pr_err("Unable to register generic usb transceiver\n");
+                pd = NULL;
                 return;
         }
 }
@@ -150,10 +151,40 @@ static int nop_set_host(struct usb_otg *otg, struct usb_bus *host)
 }
 
 int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_gen_xceiv *nop,
-                enum usb_phy_type type, u32 clk_rate, bool needs_vcc)
+                struct usb_phy_gen_xceiv_platform_data *pdata)
 {
+        enum usb_phy_type type = USB_PHY_TYPE_USB2;
         int err;
 
+        u32 clk_rate = 0;
+        bool needs_vcc = false;
+
+        nop->reset_active_low = true;   /* default behaviour */
+
+        if (dev->of_node) {
+                struct device_node *node = dev->of_node;
+                enum of_gpio_flags flags = 0;
+
+                if (of_property_read_u32(node, "clock-frequency", &clk_rate))
+                        clk_rate = 0;
+
+                needs_vcc = of_property_read_bool(node, "vcc-supply");
+                nop->gpio_reset = of_get_named_gpio_flags(node, "reset-gpios",
+                                                                0, &flags);
+                if (nop->gpio_reset == -EPROBE_DEFER)
+                        return -EPROBE_DEFER;
+
+                nop->reset_active_low = flags & OF_GPIO_ACTIVE_LOW;
+
+        } else if (pdata) {
+                type = pdata->type;
+                clk_rate = pdata->clk_rate;
+                needs_vcc = pdata->needs_vcc;
+                nop->gpio_reset = pdata->gpio_reset;
+        } else {
+                nop->gpio_reset = -1;
+        }
+
         nop->phy.otg = devm_kzalloc(dev, sizeof(*nop->phy.otg),
                         GFP_KERNEL);
         if (!nop->phy.otg)
@@ -218,43 +249,14 @@ EXPORT_SYMBOL_GPL(usb_phy_gen_create_phy);
 static int usb_phy_gen_xceiv_probe(struct platform_device *pdev)
 {
         struct device *dev = &pdev->dev;
-        struct usb_phy_gen_xceiv_platform_data *pdata =
-                        dev_get_platdata(&pdev->dev);
         struct usb_phy_gen_xceiv        *nop;
-        enum usb_phy_type       type = USB_PHY_TYPE_USB2;
         int err;
-        u32 clk_rate = 0;
-        bool needs_vcc = false;
 
         nop = devm_kzalloc(dev, sizeof(*nop), GFP_KERNEL);
         if (!nop)
                 return -ENOMEM;
 
-        nop->reset_active_low = true;   /* default behaviour */
-
-        if (dev->of_node) {
-                struct device_node *node = dev->of_node;
-                enum of_gpio_flags flags;
-
-                if (of_property_read_u32(node, "clock-frequency", &clk_rate))
-                        clk_rate = 0;
-
-                needs_vcc = of_property_read_bool(node, "vcc-supply");
-                nop->gpio_reset = of_get_named_gpio_flags(node, "reset-gpios",
-                                                                0, &flags);
-                if (nop->gpio_reset == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
-
-                nop->reset_active_low = flags & OF_GPIO_ACTIVE_LOW;
-
-        } else if (pdata) {
-                type = pdata->type;
-                clk_rate = pdata->clk_rate;
-                needs_vcc = pdata->needs_vcc;
-                nop->gpio_reset = pdata->gpio_reset;
-        }
-
-        err = usb_phy_gen_create_phy(dev, nop, type, clk_rate, needs_vcc);
+        err = usb_phy_gen_create_phy(dev, nop, dev_get_platdata(&pdev->dev));
         if (err)
                 return err;
 
@@ -271,8 +273,6 @@ static int usb_phy_gen_xceiv_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, nop);
 
         return 0;
-
-        return err;
 }
 
 static int usb_phy_gen_xceiv_remove(struct platform_device *pdev)
diff --git a/drivers/usb/phy/phy-generic.h b/drivers/usb/phy/phy-generic.h
index d2a220d81734..38a81f307b82 100644
--- a/drivers/usb/phy/phy-generic.h
+++ b/drivers/usb/phy/phy-generic.h
@@ -1,6 +1,8 @@
 #ifndef _PHY_GENERIC_H_
 #define _PHY_GENERIC_H_
 
+#include <linux/usb/usb_phy_gen_xceiv.h>
+
 struct usb_phy_gen_xceiv {
         struct usb_phy phy;
         struct device *dev;
@@ -14,6 +16,6 @@ int usb_gen_phy_init(struct usb_phy *phy);
 void usb_gen_phy_shutdown(struct usb_phy *phy);
 
 int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_gen_xceiv *nop,
-                enum usb_phy_type type, u32 clk_rate, bool needs_vcc);
+                struct usb_phy_gen_xceiv_platform_data *pdata);
 
 #endif
diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index fdd33b44dbd3..545844b7e796 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -164,7 +164,7 @@ static int mxs_phy_probe(struct platform_device *pdev)
 
         mxs_phy->clk = clk;
 
-        platform_set_drvdata(pdev, &mxs_phy->phy);
+        platform_set_drvdata(pdev, mxs_phy);
 
         ret = usb_add_phy_dev(&mxs_phy->phy);
         if (ret)
diff --git a/drivers/usb/phy/phy-rcar-gen2-usb.c b/drivers/usb/phy/phy-rcar-gen2-usb.c
index a99a6953f11c..db3ab34cddb4 100644
--- a/drivers/usb/phy/phy-rcar-gen2-usb.c
+++ b/drivers/usb/phy/phy-rcar-gen2-usb.c
@@ -107,10 +107,10 @@ static void __rcar_gen2_usb_phy_init(struct rcar_gen2_usb_phy_priv *priv)
         clk_prepare_enable(priv->clk);
 
         /* Set USB channels in the USBHS UGCTRL2 register */
-        val = ioread32(priv->base);
+        val = ioread32(priv->base + USBHS_UGCTRL2_REG);
         val &= ~(USBHS_UGCTRL2_USB0_HS | USBHS_UGCTRL2_USB2_SS);
         val |= priv->ugctrl2;
-        iowrite32(val, priv->base);
+        iowrite32(val, priv->base + USBHS_UGCTRL2_REG);
 }
 
 /* Shutdown USB channels */
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 9ced8937a8f3..fb0d537435eb 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -2123,6 +2123,20 @@ static void ftdi_set_termios(struct tty_struct *tty,
                 termios->c_cflag |= CRTSCTS;
         }
 
+        /*
+         * All FTDI UART chips are limited to CS7/8. We won't pretend to
+         * support CS5/6 and revert the CSIZE setting instead.
+         */
+        if ((C_CSIZE(tty) != CS8) && (C_CSIZE(tty) != CS7)) {
+                dev_warn(ddev, "requested CSIZE setting not supported\n");
+
+                termios->c_cflag &= ~CSIZE;
+                if (old_termios)
+                        termios->c_cflag |= old_termios->c_cflag & CSIZE;
+                else
+                        termios->c_cflag |= CS8;
+        }
+
         cflag = termios->c_cflag;
 
         if (!old_termios)
@@ -2159,19 +2173,16 @@ no_skip:
         } else {
                 urb_value |= FTDI_SIO_SET_DATA_PARITY_NONE;
         }
-        if (cflag & CSIZE) {
-                switch (cflag & CSIZE) {
-                case CS7:
-                        urb_value |= 7;
-                        dev_dbg(ddev, "Setting CS7\n");
-                        break;
-                case CS8:
-                        urb_value |= 8;
-                        dev_dbg(ddev, "Setting CS8\n");
-                        break;
-                default:
-                        dev_err(ddev, "CSIZE was set but not CS7-CS8\n");
-                }
+        switch (cflag & CSIZE) {
+        case CS7:
+                urb_value |= 7;
+                dev_dbg(ddev, "Setting CS7\n");
+                break;
+        default:
+        case CS8:
+                urb_value |= 8;
+                dev_dbg(ddev, "Setting CS8\n");
+                break;
         }
 
         /* This is needed by the break command since it uses the same command
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c
index 2b01ec8651c2..b63ce023f96f 100644
--- a/drivers/usb/serial/generic.c
+++ b/drivers/usb/serial/generic.c
@@ -173,16 +173,8 @@ retry:
                 clear_bit_unlock(USB_SERIAL_WRITE_BUSY, &port->flags);
                 return result;
         }
-        /*
-         * Try sending off another urb, unless called from completion handler
-         * (in which case there will be no free urb or no data).
-         */
-        if (mem_flags != GFP_ATOMIC)
-                goto retry;
 
-        clear_bit_unlock(USB_SERIAL_WRITE_BUSY, &port->flags);
-
-        return 0;
+        goto retry;     /* try sending off another urb */
 }
 EXPORT_SYMBOL_GPL(usb_serial_generic_write_start);
 
@@ -208,7 +200,7 @@ int usb_serial_generic_write(struct tty_struct *tty,
                 return 0;
 
         count = kfifo_in_locked(&port->write_fifo, buf, count, &port->lock);
-        result = usb_serial_generic_write_start(port, GFP_KERNEL);
+        result = usb_serial_generic_write_start(port, GFP_ATOMIC);
         if (result)
                 return result;
 
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index e5bdd987b9e8..a69da83604c0 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -1813,25 +1813,25 @@ static void mos7840_change_port_settings(struct tty_struct *tty,
         iflag = tty->termios.c_iflag;
 
         /* Change the number of bits */
-        if (cflag & CSIZE) {
-                switch (cflag & CSIZE) {
-                case CS5:
-                        lData = LCR_BITS_5;
-                        break;
+        switch (cflag & CSIZE) {
+        case CS5:
+                lData = LCR_BITS_5;
+                break;
 
-                case CS6:
-                        lData = LCR_BITS_6;
-                        break;
+        case CS6:
+                lData = LCR_BITS_6;
+                break;
 
-                case CS7:
-                        lData = LCR_BITS_7;
-                        break;
-                default:
-                case CS8:
-                        lData = LCR_BITS_8;
-                        break;
-                }
+        case CS7:
+                lData = LCR_BITS_7;
+                break;
+
+        default:
+        case CS8:
+                lData = LCR_BITS_8;
+                break;
         }
+
         /* Change the Parity bit */
         if (cflag & PARENB) {
                 if (cflag & PARODD) {
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index c3d94853b4ab..496b7e39d5be 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -85,6 +85,7 @@ static void option_instat_callback(struct urb *urb);
 #define HUAWEI_PRODUCT_K4505                    0x1464
 #define HUAWEI_PRODUCT_K3765                    0x1465
 #define HUAWEI_PRODUCT_K4605                    0x14C6
+#define HUAWEI_PRODUCT_E173S6                   0x1C07
 
 #define QUANTA_VENDOR_ID                        0x0408
 #define QUANTA_PRODUCT_Q101                     0xEA02
@@ -572,6 +573,8 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1c23, USB_CLASS_COMM, 0x02, 0xff) },
         { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E173, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t) &net_intf1_blacklist },
+        { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E173S6, 0xff, 0xff, 0xff),
+                .driver_info = (kernel_ulong_t) &net_intf1_blacklist },
         { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1750, 0xff, 0xff, 0xff),
                 .driver_info = (kernel_ulong_t) &net_intf2_blacklist },
         { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1441, USB_CLASS_COMM, 0x02, 0xff) },
@@ -634,6 +637,10 @@ static const struct usb_device_id option_ids[] = {
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6D) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6E) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x6F) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x72) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x73) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x74) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x75) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x78) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x79) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x01, 0x7A) },
@@ -688,6 +695,10 @@ static const struct usb_device_id option_ids[] = {
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6D) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6E) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x6F) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x72) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x73) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x74) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x75) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x78) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x79) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7A) },
@@ -742,6 +753,10 @@ static const struct usb_device_id option_ids[] = {
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6D) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6E) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6F) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x72) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x73) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x74) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x75) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x78) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x79) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x7A) },
@@ -796,6 +811,10 @@ static const struct usb_device_id option_ids[] = {
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6D) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6E) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6F) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x72) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x73) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x74) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x75) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x78) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x79) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x7A) },
@@ -850,6 +869,10 @@ static const struct usb_device_id option_ids[] = {
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6D) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6E) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6F) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x72) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x73) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x74) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x75) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x78) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x79) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x7A) },
@@ -904,6 +927,10 @@ static const struct usb_device_id option_ids[] = {
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6D) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6E) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6F) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x72) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x73) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x74) },
+        { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x75) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x78) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x79) },
         { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x7A) },
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 1e6de4cd079d..1e3318dfa1cb 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -361,23 +361,21 @@ static void pl2303_set_termios(struct tty_struct *tty,
                             0, 0, buf, 7, 100);
         dev_dbg(&port->dev, "0xa1:0x21:0:0  %d - %7ph\n", i, buf);
 
-        if (C_CSIZE(tty)) {
-                switch (C_CSIZE(tty)) {
-                case CS5:
-                        buf[6] = 5;
-                        break;
-                case CS6:
-                        buf[6] = 6;
-                        break;
-                case CS7:
-                        buf[6] = 7;
-                        break;
-                default:
-                case CS8:
-                        buf[6] = 8;
-                }
-                dev_dbg(&port->dev, "data bits = %d\n", buf[6]);
+        switch (C_CSIZE(tty)) {
+        case CS5:
+                buf[6] = 5;
+                break;
+        case CS6:
+                buf[6] = 6;
+                break;
+        case CS7:
+                buf[6] = 7;
+                break;
+        default:
+        case CS8:
+                buf[6] = 8;
         }
+        dev_dbg(&port->dev, "data bits = %d\n", buf[6]);
 
         /* For reference buf[0]:buf[3] baud rate value */
         pl2303_encode_baudrate(tty, port, &buf[0]);
diff --git a/drivers/usb/serial/spcp8x5.c b/drivers/usb/serial/spcp8x5.c
index 4abac28b5992..5b793c352267 100644
--- a/drivers/usb/serial/spcp8x5.c
+++ b/drivers/usb/serial/spcp8x5.c
@@ -348,22 +348,20 @@ static void spcp8x5_set_termios(struct tty_struct *tty,
         }
 
         /* Set Data Length : 00:5bit, 01:6bit, 10:7bit, 11:8bit */
-        if (cflag & CSIZE) {
-                switch (cflag & CSIZE) {
-                case CS5:
-                        buf[1] |= SET_UART_FORMAT_SIZE_5;
-                        break;
-                case CS6:
-                        buf[1] |= SET_UART_FORMAT_SIZE_6;
-                        break;
-                case CS7:
-                        buf[1] |= SET_UART_FORMAT_SIZE_7;
-                        break;
-                default:
-                case CS8:
-                        buf[1] |= SET_UART_FORMAT_SIZE_8;
-                        break;
-                }
+        switch (cflag & CSIZE) {
+        case CS5:
+                buf[1] |= SET_UART_FORMAT_SIZE_5;
+                break;
+        case CS6:
+                buf[1] |= SET_UART_FORMAT_SIZE_6;
+                break;
+        case CS7:
+                buf[1] |= SET_UART_FORMAT_SIZE_7;
+                break;
+        default:
+        case CS8:
+                buf[1] |= SET_UART_FORMAT_SIZE_8;
+                break;
         }
 
         /* Set Stop bit2 : 0:1bit 1:2bit */
diff --git a/drivers/usb/wusbcore/devconnect.c b/drivers/usb/wusbcore/devconnect.c
index e538b72c4e3a..f14e7929ba22 100644
--- a/drivers/usb/wusbcore/devconnect.c
+++ b/drivers/usb/wusbcore/devconnect.c
@@ -97,18 +97,12 @@ static void wusbhc_devconnect_acked_work(struct work_struct *work);
 
 static void wusb_dev_free(struct wusb_dev *wusb_dev)
 {
-        if (wusb_dev) {
-                kfree(wusb_dev->set_gtk_req);
-                usb_free_urb(wusb_dev->set_gtk_urb);
-                kfree(wusb_dev);
-        }
+        kfree(wusb_dev);
 }
 
 static struct wusb_dev *wusb_dev_alloc(struct wusbhc *wusbhc)
 {
         struct wusb_dev *wusb_dev;
-        struct urb *urb;
-        struct usb_ctrlrequest *req;
 
         wusb_dev = kzalloc(sizeof(*wusb_dev), GFP_KERNEL);
         if (wusb_dev == NULL)
@@ -118,22 +112,6 @@ static struct wusb_dev *wusb_dev_alloc(struct wusbhc *wusbhc)
 
         INIT_WORK(&wusb_dev->devconnect_acked_work, wusbhc_devconnect_acked_work);
 
-        urb = usb_alloc_urb(0, GFP_KERNEL);
-        if (urb == NULL)
-                goto err;
-        wusb_dev->set_gtk_urb = urb;
-
-        req = kmalloc(sizeof(*req), GFP_KERNEL);
-        if (req == NULL)
-                goto err;
-        wusb_dev->set_gtk_req = req;
-
-        req->bRequestType = USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE;
-        req->bRequest = USB_REQ_SET_DESCRIPTOR;
-        req->wValue = cpu_to_le16(USB_DT_KEY << 8 | wusbhc->gtk_index);
-        req->wIndex = 0;
-        req->wLength = cpu_to_le16(wusbhc->gtk.descr.bLength);
-
         return wusb_dev;
 err:
         wusb_dev_free(wusb_dev);
@@ -411,9 +389,6 @@ static void __wusbhc_dev_disconnect(struct wusbhc *wusbhc,
 /*
  * Refresh the list of keep alives to emit in the MMC
  *
- * Some devices don't respond to keep alives unless they've been
- * authenticated, so skip unauthenticated devices.
- *
  * We only publish the first four devices that have a coming timeout
  * condition. Then when we are done processing those, we go for the
  * next ones. We ignore the ones that have timed out already (they'll
@@ -448,7 +423,7 @@ static void __wusbhc_keep_alive(struct wusbhc *wusbhc)
 
                 if (wusb_dev == NULL)
                         continue;
-                if (wusb_dev->usb_dev == NULL || !wusb_dev->usb_dev->authenticated)
+                if (wusb_dev->usb_dev == NULL)
                         continue;
 
                 if (time_after(jiffies, wusb_dev->entry_ts + tt)) {
@@ -524,11 +499,19 @@ static struct wusb_dev *wusbhc_find_dev_by_addr(struct wusbhc *wusbhc, u8 addr)
  *
  * @wusbhc shall be referenced and unlocked
  */
-static void wusbhc_handle_dn_alive(struct wusbhc *wusbhc, struct wusb_dev *wusb_dev)
+static void wusbhc_handle_dn_alive(struct wusbhc *wusbhc, u8 srcaddr)
 {
+        struct wusb_dev *wusb_dev;
+
         mutex_lock(&wusbhc->mutex);
-        wusb_dev->entry_ts = jiffies;
-        __wusbhc_keep_alive(wusbhc);
+        wusb_dev = wusbhc_find_dev_by_addr(wusbhc, srcaddr);
+        if (wusb_dev == NULL) {
+                dev_dbg(wusbhc->dev, "ignoring DN_Alive from unconnected device %02x\n",
+                        srcaddr);
+        } else {
+                wusb_dev->entry_ts = jiffies;
+                __wusbhc_keep_alive(wusbhc);
+        }
         mutex_unlock(&wusbhc->mutex);
 }
 
@@ -582,14 +565,22 @@ static void wusbhc_handle_dn_connect(struct wusbhc *wusbhc,
  *
  * @wusbhc shall be referenced and unlocked
  */
-static void wusbhc_handle_dn_disconnect(struct wusbhc *wusbhc, struct wusb_dev *wusb_dev)
+static void wusbhc_handle_dn_disconnect(struct wusbhc *wusbhc, u8 srcaddr)
 {
         struct device *dev = wusbhc->dev;
-
-        dev_info(dev, "DN DISCONNECT: device 0x%02x going down\n", wusb_dev->addr);
+        struct wusb_dev *wusb_dev;
 
         mutex_lock(&wusbhc->mutex);
-        __wusbhc_dev_disconnect(wusbhc, wusb_port_by_idx(wusbhc, wusb_dev->port_idx));
+        wusb_dev = wusbhc_find_dev_by_addr(wusbhc, srcaddr);
+        if (wusb_dev == NULL) {
+                dev_dbg(dev, "ignoring DN DISCONNECT from unconnected device %02x\n",
+                        srcaddr);
+        } else {
+                dev_info(dev, "DN DISCONNECT: device 0x%02x going down\n",
+                        wusb_dev->addr);
+                __wusbhc_dev_disconnect(wusbhc, wusb_port_by_idx(wusbhc,
+                        wusb_dev->port_idx));
+        }
         mutex_unlock(&wusbhc->mutex);
 }
 
@@ -611,30 +602,21 @@ void wusbhc_handle_dn(struct wusbhc *wusbhc, u8 srcaddr,
                       struct wusb_dn_hdr *dn_hdr, size_t size)
 {
         struct device *dev = wusbhc->dev;
-        struct wusb_dev *wusb_dev;
 
         if (size < sizeof(struct wusb_dn_hdr)) {
                 dev_err(dev, "DN data shorter than DN header (%d < %d)\n",
                         (int)size, (int)sizeof(struct wusb_dn_hdr));
                 return;
         }
-
-        wusb_dev = wusbhc_find_dev_by_addr(wusbhc, srcaddr);
-        if (wusb_dev == NULL && dn_hdr->bType != WUSB_DN_CONNECT) {
-                dev_dbg(dev, "ignoring DN %d from unconnected device %02x\n",
-                        dn_hdr->bType, srcaddr);
-                return;
-        }
-
         switch (dn_hdr->bType) {
         case WUSB_DN_CONNECT:
                 wusbhc_handle_dn_connect(wusbhc, dn_hdr, size);
                 break;
         case WUSB_DN_ALIVE:
-                wusbhc_handle_dn_alive(wusbhc, wusb_dev);
+                wusbhc_handle_dn_alive(wusbhc, srcaddr);
                 break;
         case WUSB_DN_DISCONNECT:
-                wusbhc_handle_dn_disconnect(wusbhc, wusb_dev);
+                wusbhc_handle_dn_disconnect(wusbhc, srcaddr);
                 break;
         case WUSB_DN_MASAVAILCHANGED:
         case WUSB_DN_RWAKE:
diff --git a/drivers/usb/wusbcore/security.c b/drivers/usb/wusbcore/security.c
index dd88441c8f78..4c40d0dbf53d 100644
--- a/drivers/usb/wusbcore/security.c
+++ b/drivers/usb/wusbcore/security.c
@@ -29,19 +29,16 @@
 #include <linux/export.h>
 #include "wusbhc.h"
 
-static void wusbhc_set_gtk_callback(struct urb *urb);
-static void wusbhc_gtk_rekey_done_work(struct work_struct *work);
+static void wusbhc_gtk_rekey_work(struct work_struct *work);
 
 int wusbhc_sec_create(struct wusbhc *wusbhc)
 {
         wusbhc->gtk.descr.bLength = sizeof(wusbhc->gtk.descr) + sizeof(wusbhc->gtk.data);
         wusbhc->gtk.descr.bDescriptorType = USB_DT_KEY;
         wusbhc->gtk.descr.bReserved = 0;
+        wusbhc->gtk_index = 0;
 
-        wusbhc->gtk_index = wusb_key_index(0, WUSB_KEY_INDEX_TYPE_GTK,
-                                           WUSB_KEY_INDEX_ORIGINATOR_HOST);
-
-        INIT_WORK(&wusbhc->gtk_rekey_done_work, wusbhc_gtk_rekey_done_work);
+        INIT_WORK(&wusbhc->gtk_rekey_work, wusbhc_gtk_rekey_work);
 
         return 0;
 }
@@ -113,7 +110,7 @@ int wusbhc_sec_start(struct wusbhc *wusbhc)
         wusbhc_generate_gtk(wusbhc);
 
         result = wusbhc->set_gtk(wusbhc, wusbhc->gtk_tkid,
-                                 &wusbhc->gtk.descr.bKeyData, key_size);
+                                &wusbhc->gtk.descr.bKeyData, key_size);
         if (result < 0)
                 dev_err(wusbhc->dev, "cannot set GTK for the host: %d\n",
                         result);
@@ -129,7 +126,7 @@ int wusbhc_sec_start(struct wusbhc *wusbhc)
  */
 void wusbhc_sec_stop(struct wusbhc *wusbhc)
 {
-        cancel_work_sync(&wusbhc->gtk_rekey_done_work);
+        cancel_work_sync(&wusbhc->gtk_rekey_work);
 }
 
 
@@ -185,12 +182,14 @@ static int wusb_dev_set_encryption(struct usb_device *usb_dev, int value)
 static int wusb_dev_set_gtk(struct wusbhc *wusbhc, struct wusb_dev *wusb_dev)
 {
         struct usb_device *usb_dev = wusb_dev->usb_dev;
+        u8 key_index = wusb_key_index(wusbhc->gtk_index,
+                WUSB_KEY_INDEX_TYPE_GTK, WUSB_KEY_INDEX_ORIGINATOR_HOST);
 
         return usb_control_msg(
                 usb_dev, usb_sndctrlpipe(usb_dev, 0),
                 USB_REQ_SET_DESCRIPTOR,
                 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
-                USB_DT_KEY << 8 | wusbhc->gtk_index, 0,
+                USB_DT_KEY << 8 | key_index, 0,
                 &wusbhc->gtk.descr, wusbhc->gtk.descr.bLength,
                 1000);
 }
@@ -520,24 +519,55 @@ error_kzalloc:
  * Once all connected and authenticated devices have received the new
  * GTK, switch the host to using it.
  */
-static void wusbhc_gtk_rekey_done_work(struct work_struct *work)
+static void wusbhc_gtk_rekey_work(struct work_struct *work)
 {
-        struct wusbhc *wusbhc = container_of(work, struct wusbhc, gtk_rekey_done_work);
+        struct wusbhc *wusbhc = container_of(work,
+                                        struct wusbhc, gtk_rekey_work);
         size_t key_size = sizeof(wusbhc->gtk.data);
+        int port_idx;
+        struct wusb_dev *wusb_dev, *wusb_dev_next;
+        LIST_HEAD(rekey_list);
 
         mutex_lock(&wusbhc->mutex);
+        /* generate the new key */
+        wusbhc_generate_gtk(wusbhc);
+        /* roll the gtk index. */
+        wusbhc->gtk_index = (wusbhc->gtk_index + 1) % (WUSB_KEY_INDEX_MAX + 1);
+        /*
+         * Save all connected devices on a list while holding wusbhc->mutex and
+         * take a reference to each one.  Then submit the set key request to
+         * them after releasing the lock in order to avoid a deadlock.
+         */
+        for (port_idx = 0; port_idx < wusbhc->ports_max; port_idx++) {
+                wusb_dev = wusbhc->port[port_idx].wusb_dev;
+                if (!wusb_dev || !wusb_dev->usb_dev
+                        || !wusb_dev->usb_dev->authenticated)
+                        continue;
 
-        if (--wusbhc->pending_set_gtks == 0)
-                wusbhc->set_gtk(wusbhc, wusbhc->gtk_tkid, &wusbhc->gtk.descr.bKeyData, key_size);
-
+                wusb_dev_get(wusb_dev);
+                list_add_tail(&wusb_dev->rekey_node, &rekey_list);
+        }
         mutex_unlock(&wusbhc->mutex);
-}
 
-static void wusbhc_set_gtk_callback(struct urb *urb)
-{
-        struct wusbhc *wusbhc = urb->context;
+        /* Submit the rekey requests without holding wusbhc->mutex. */
+        list_for_each_entry_safe(wusb_dev, wusb_dev_next, &rekey_list,
+                rekey_node) {
+                list_del_init(&wusb_dev->rekey_node);
+                dev_dbg(&wusb_dev->usb_dev->dev, "%s: rekey device at port %d\n",
+                        __func__, wusb_dev->port_idx);
+
+                if (wusb_dev_set_gtk(wusbhc, wusb_dev) < 0) {
+                        dev_err(&wusb_dev->usb_dev->dev, "%s: rekey device at port %d failed\n",
+                                __func__, wusb_dev->port_idx);
+                }
+                wusb_dev_put(wusb_dev);
+        }
 
-        queue_work(wusbd, &wusbhc->gtk_rekey_done_work);
+        /* Switch the host controller to use the new GTK. */
+        mutex_lock(&wusbhc->mutex);
+        wusbhc->set_gtk(wusbhc, wusbhc->gtk_tkid,
+                &wusbhc->gtk.descr.bKeyData, key_size);
+        mutex_unlock(&wusbhc->mutex);
 }
 
 /**
@@ -553,26 +583,12 @@ static void wusbhc_set_gtk_callback(struct urb *urb)
  */
 void wusbhc_gtk_rekey(struct wusbhc *wusbhc)
 {
-        static const size_t key_size = sizeof(wusbhc->gtk.data);
-        int p;
-
-        wusbhc_generate_gtk(wusbhc);
-
-        for (p = 0; p < wusbhc->ports_max; p++) {
-                struct wusb_dev *wusb_dev;
-
-                wusb_dev = wusbhc->port[p].wusb_dev;
-                if (!wusb_dev || !wusb_dev->usb_dev || !wusb_dev->usb_dev->authenticated)
-                        continue;
-
-                usb_fill_control_urb(wusb_dev->set_gtk_urb, wusb_dev->usb_dev,
-                                     usb_sndctrlpipe(wusb_dev->usb_dev, 0),
-                                     (void *)wusb_dev->set_gtk_req,
-                                     &wusbhc->gtk.descr, wusbhc->gtk.descr.bLength,
-                                     wusbhc_set_gtk_callback, wusbhc);
-                if (usb_submit_urb(wusb_dev->set_gtk_urb, GFP_KERNEL) == 0)
-                        wusbhc->pending_set_gtks++;
-        }
-        if (wusbhc->pending_set_gtks == 0)
-                wusbhc->set_gtk(wusbhc, wusbhc->gtk_tkid, &wusbhc->gtk.descr.bKeyData, key_size);
+        /*
+         * We need to submit a URB to the downstream WUSB devices in order to
+         * change the group key.  This can't be done while holding the
+         * wusbhc->mutex since that is also taken in the urb_enqueue routine
+         * and will cause a deadlock.  Instead, queue a work item to do
+         * it when the lock is not held
+         */
+        queue_work(wusbd, &wusbhc->gtk_rekey_work);
 }
diff --git a/drivers/usb/wusbcore/wusbhc.h b/drivers/usb/wusbcore/wusbhc.h
index 711b1952b114..6bd3b819a6b5 100644
--- a/drivers/usb/wusbcore/wusbhc.h
+++ b/drivers/usb/wusbcore/wusbhc.h
@@ -97,6 +97,7 @@ struct wusb_dev {
         struct kref refcnt;
         struct wusbhc *wusbhc;
         struct list_head cack_node;     /* Connect-Ack list */
+        struct list_head rekey_node;    /* GTK rekey list */
         u8 port_idx;
         u8 addr;
         u8 beacon_type:4;
@@ -107,8 +108,6 @@ struct wusb_dev {
         struct usb_wireless_cap_descriptor *wusb_cap_descr;
         struct uwb_mas_bm availability;
         struct work_struct devconnect_acked_work;
-        struct urb *set_gtk_urb;
-        struct usb_ctrlrequest *set_gtk_req;
         struct usb_device *usb_dev;
 };
 
@@ -296,8 +295,7 @@ struct wusbhc {
         } __attribute__((packed)) gtk;
         u8 gtk_index;
         u32 gtk_tkid;
-        struct work_struct gtk_rekey_done_work;
-        int pending_set_gtks;
+        struct work_struct gtk_rekey_work;
 
         struct usb_encryption_descriptor *ccm1_etd;
 };
diff --git a/drivers/video/offb.c b/drivers/video/offb.c
index 9dbea2223401..7d44d669d5b6 100644
--- a/drivers/video/offb.c
+++ b/drivers/video/offb.c
@@ -91,6 +91,15 @@ extern boot_infos_t *boot_infos;
 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN        0x6cd4
 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED          0x6cd8
 
+#define FB_RIGHT_POS(p, bpp)         (fb_be_math(p) ? 0 : (32 - (bpp)))
+
+static inline u32 offb_cmap_byteswap(struct fb_info *info, u32 value)
+{
+        u32 bpp = info->var.bits_per_pixel;
+
+        return cpu_to_be32(value) >> FB_RIGHT_POS(info, bpp);
+}
+
     /*
      *  Set a single color register. The values supplied are already
      *  rounded down to the hardware's capabilities (according to the
@@ -120,7 +129,7 @@ static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
                         mask <<= info->var.transp.offset;
                         value |= mask;
                 }
-                pal[regno] = value;
+                pal[regno] = offb_cmap_byteswap(info, value);
                 return 0;
         }
 
@@ -301,7 +310,7 @@ static struct fb_ops offb_ops = {
 static void __iomem *offb_map_reg(struct device_node *np, int index,
                                   unsigned long offset, unsigned long size)
 {
-        const u32 *addrp;
+        const __be32 *addrp;
         u64 asize, taddr;
         unsigned int flags;
 
@@ -369,7 +378,11 @@ static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp
                 }
                 of_node_put(pciparent);
         } else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
-                const u32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
+#ifdef __BIG_ENDIAN
+                const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
+#else
+                const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
+#endif
                 u64 io_addr = of_translate_address(dp, io_of_addr);
                 if (io_addr != OF_BAD_ADDR) {
                         par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
@@ -535,7 +548,7 @@ static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
         unsigned int flags, rsize, addr_prop = 0;
         unsigned long max_size = 0;
         u64 rstart, address = OF_BAD_ADDR;
-        const u32 *pp, *addrp, *up;
+        const __be32 *pp, *addrp, *up;
         u64 asize;
         int foreign_endian = 0;
 
@@ -551,25 +564,25 @@ static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
         if (pp == NULL)
                 pp = of_get_property(dp, "depth", &len);
         if (pp && len == sizeof(u32))
-                depth = *pp;
+                depth = be32_to_cpup(pp);
 
         pp = of_get_property(dp, "linux,bootx-width", &len);
         if (pp == NULL)
                 pp = of_get_property(dp, "width", &len);
         if (pp && len == sizeof(u32))
-                width = *pp;
+                width = be32_to_cpup(pp);
 
         pp = of_get_property(dp, "linux,bootx-height", &len);
         if (pp == NULL)
                 pp = of_get_property(dp, "height", &len);
         if (pp && len == sizeof(u32))
-                height = *pp;
+                height = be32_to_cpup(pp);
 
         pp = of_get_property(dp, "linux,bootx-linebytes", &len);
         if (pp == NULL)
                 pp = of_get_property(dp, "linebytes", &len);
         if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
-                pitch = *pp;
+                pitch = be32_to_cpup(pp);
         else
                 pitch = width * ((depth + 7) / 8);
 
diff --git a/drivers/watchdog/bcm2835_wdt.c b/drivers/watchdog/bcm2835_wdt.c
index a6a2cebb2587..cafa973c43be 100644
--- a/drivers/watchdog/bcm2835_wdt.c
+++ b/drivers/watchdog/bcm2835_wdt.c
@@ -19,7 +19,6 @@
 #include <linux/watchdog.h>
 #include <linux/platform_device.h>
 #include <linux/of_address.h>
-#include <linux/miscdevice.h>
 
 #define PM_RSTC                         0x1c
 #define PM_WDOG                         0x24
diff --git a/drivers/watchdog/ep93xx_wdt.c b/drivers/watchdog/ep93xx_wdt.c
index 833e81311848..d1d07f2f69df 100644
--- a/drivers/watchdog/ep93xx_wdt.c
+++ b/drivers/watchdog/ep93xx_wdt.c
@@ -28,7 +28,6 @@
 
 #include <linux/platform_device.h>
 #include <linux/module.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/timer.h>
 #include <linux/io.h>
diff --git a/drivers/watchdog/ie6xx_wdt.c b/drivers/watchdog/ie6xx_wdt.c
index 70a240297c6d..07f88f54e5c0 100644
--- a/drivers/watchdog/ie6xx_wdt.c
+++ b/drivers/watchdog/ie6xx_wdt.c
@@ -28,7 +28,6 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/watchdog.h>
-#include <linux/miscdevice.h>
 #include <linux/seq_file.h>
 #include <linux/debugfs.h>
 #include <linux/uaccess.h>
diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c
index 2de486a7eea1..3aa50cfa335f 100644
--- a/drivers/watchdog/jz4740_wdt.c
+++ b/drivers/watchdog/jz4740_wdt.c
@@ -17,7 +17,6 @@
 #include <linux/moduleparam.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
diff --git a/drivers/watchdog/kempld_wdt.c b/drivers/watchdog/kempld_wdt.c
index a1a3638c579c..20dc73844737 100644
--- a/drivers/watchdog/kempld_wdt.c
+++ b/drivers/watchdog/kempld_wdt.c
@@ -26,7 +26,6 @@
 
 #include <linux/module.h>
 #include <linux/moduleparam.h>
-#include <linux/miscdevice.h>
 #include <linux/uaccess.h>
 #include <linux/watchdog.h>
 #include <linux/platform_device.h>
diff --git a/drivers/watchdog/max63xx_wdt.c b/drivers/watchdog/max63xx_wdt.c
index 6d4f3998e1f6..bdb3f4a5b27c 100644
--- a/drivers/watchdog/max63xx_wdt.c
+++ b/drivers/watchdog/max63xx_wdt.c
@@ -19,7 +19,6 @@
 #include <linux/moduleparam.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/init.h>
 #include <linux/bitops.h>
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 44edca66d564..f7722a424676 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -16,7 +16,6 @@
 #include <linux/moduleparam.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/miscdevice.h>
 #include <linux/platform_device.h>
 #include <linux/watchdog.h>
 #include <linux/init.h>
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c
index 1bdcc313e1d9..5bec20f5dc2d 100644
--- a/drivers/watchdog/pnx4008_wdt.c
+++ b/drivers/watchdog/pnx4008_wdt.c
@@ -23,7 +23,6 @@
 #include <linux/moduleparam.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
diff --git a/drivers/watchdog/rt2880_wdt.c b/drivers/watchdog/rt2880_wdt.c
index 53d37fea183e..d92c2d5859ce 100644
--- a/drivers/watchdog/rt2880_wdt.c
+++ b/drivers/watchdog/rt2880_wdt.c
@@ -16,7 +16,6 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/watchdog.h>
-#include <linux/miscdevice.h>
 #include <linux/moduleparam.h>
 #include <linux/platform_device.h>
 
diff --git a/drivers/watchdog/sc1200wdt.c b/drivers/watchdog/sc1200wdt.c
index 3b9fff9dcf65..131193a7acdf 100644
--- a/drivers/watchdog/sc1200wdt.c
+++ b/drivers/watchdog/sc1200wdt.c
@@ -409,8 +409,9 @@ static int __init sc1200wdt_init(void)
 #if defined CONFIG_PNP
         /* now that the user has specified an IO port and we haven't detected
          * any devices, disable pnp support */
+        if (isapnp)
+                pnp_unregister_driver(&scl200wdt_pnp_driver);
         isapnp = 0;
-        pnp_unregister_driver(&scl200wdt_pnp_driver);
 #endif
 
         if (!request_region(io, io_len, SC1200_MODULE_NAME)) {
diff --git a/drivers/watchdog/shwdt.c b/drivers/watchdog/shwdt.c
index f9b8e06f3558..af3528f84d65 100644
--- a/drivers/watchdog/shwdt.c
+++ b/drivers/watchdog/shwdt.c
@@ -26,7 +26,6 @@
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/spinlock.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/pm_runtime.h>
 #include <linux/fs.h>
diff --git a/drivers/watchdog/softdog.c b/drivers/watchdog/softdog.c
index ef2638fee4a8..c04a1aa158e2 100644
--- a/drivers/watchdog/softdog.c
+++ b/drivers/watchdog/softdog.c
@@ -42,7 +42,6 @@
 #include <linux/moduleparam.h>
 #include <linux/types.h>
 #include <linux/timer.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/notifier.h>
 #include <linux/reboot.h>
diff --git a/drivers/watchdog/stmp3xxx_rtc_wdt.c b/drivers/watchdog/stmp3xxx_rtc_wdt.c
index d667f6b51d35..bb64ae3f47da 100644
--- a/drivers/watchdog/stmp3xxx_rtc_wdt.c
+++ b/drivers/watchdog/stmp3xxx_rtc_wdt.c
@@ -12,7 +12,6 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/platform_device.h>
 #include <linux/stmp3xxx_rtc_wdt.h>
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c
index 0fd0e8ae62a8..6a447e321dd0 100644
--- a/drivers/watchdog/txx9wdt.c
+++ b/drivers/watchdog/txx9wdt.c
@@ -13,7 +13,6 @@
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/types.h>
-#include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
diff --git a/drivers/watchdog/ux500_wdt.c b/drivers/watchdog/ux500_wdt.c
index e029b5768f2c..5aed9d7ad47e 100644
--- a/drivers/watchdog/ux500_wdt.c
+++ b/drivers/watchdog/ux500_wdt.c
@@ -12,7 +12,6 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/moduleparam.h>
-#include <linux/miscdevice.h>
 #include <linux/err.h>
 #include <linux/uaccess.h>
 #include <linux/watchdog.h>
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 45d98d01028f..9c01509dd8ab 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -767,20 +767,19 @@ int btrfs_lookup_extent_info(struct btrfs_trans_handle *trans,
         if (!path)
                 return -ENOMEM;
 
-        if (metadata) {
-                key.objectid = bytenr;
-                key.type = BTRFS_METADATA_ITEM_KEY;
-                key.offset = offset;
-        } else {
-                key.objectid = bytenr;
-                key.type = BTRFS_EXTENT_ITEM_KEY;
-                key.offset = offset;
-        }
-
         if (!trans) {
                 path->skip_locking = 1;
                 path->search_commit_root = 1;
         }
+
+search_again:
+        key.objectid = bytenr;
+        key.offset = offset;
+        if (metadata)
+                key.type = BTRFS_METADATA_ITEM_KEY;
+        else
+                key.type = BTRFS_EXTENT_ITEM_KEY;
+
 again:
         ret = btrfs_search_slot(trans, root->fs_info->extent_root,
                                 &key, path, 0, 0);
@@ -788,7 +787,6 @@ again:
                 goto out_free;
 
         if (ret > 0 && metadata && key.type == BTRFS_METADATA_ITEM_KEY) {
-                metadata = 0;
                 if (path->slots[0]) {
                         path->slots[0]--;
                         btrfs_item_key_to_cpu(path->nodes[0], &key,
@@ -855,7 +853,7 @@ again:
                         mutex_lock(&head->mutex);
                         mutex_unlock(&head->mutex);
                         btrfs_put_delayed_ref(&head->node);
-                        goto again;
+                        goto search_again;
                 }
                 if (head->extent_op && head->extent_op->update_flags)
                         extent_flags |= head->extent_op->flags_to_set;
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
index a111622598b0..21da5762b0b1 100644
--- a/fs/btrfs/ioctl.c
+++ b/fs/btrfs/ioctl.c
@@ -2121,7 +2121,7 @@ static noinline int btrfs_ioctl_snap_destroy(struct file *file,
 
         err = mutex_lock_killable_nested(&dir->i_mutex, I_MUTEX_PARENT);
         if (err == -EINTR)
-                goto out;
+                goto out_drop_write;
         dentry = lookup_one_len(vol_args->name, parent, namelen);
         if (IS_ERR(dentry)) {
                 err = PTR_ERR(dentry);
@@ -2284,6 +2284,7 @@ out_dput:
         dput(dentry);
 out_unlock_dir:
         mutex_unlock(&dir->i_mutex);
+out_drop_write:
         mnt_drop_write_file(file);
 out:
         kfree(vol_args);
diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c
index ce459a7cb16d..429c73c374b8 100644
--- a/fs/btrfs/relocation.c
+++ b/fs/btrfs/relocation.c
@@ -571,7 +571,9 @@ static int is_cowonly_root(u64 root_objectid)
             root_objectid == BTRFS_CHUNK_TREE_OBJECTID ||
             root_objectid == BTRFS_DEV_TREE_OBJECTID ||
             root_objectid == BTRFS_TREE_LOG_OBJECTID ||
-            root_objectid == BTRFS_CSUM_TREE_OBJECTID)
+            root_objectid == BTRFS_CSUM_TREE_OBJECTID ||
+            root_objectid == BTRFS_UUID_TREE_OBJECTID ||
+            root_objectid == BTRFS_QUOTA_TREE_OBJECTID)
                 return 1;
         return 0;
 }
@@ -1264,10 +1266,10 @@ static int __must_check __add_reloc_root(struct btrfs_root *root)
 }
 
 /*
- * helper to update/delete the 'address of tree root -> reloc tree'
+ * helper to delete the 'address of tree root -> reloc tree'
  * mapping
  */
-static int __update_reloc_root(struct btrfs_root *root, int del)
+static void __del_reloc_root(struct btrfs_root *root)
 {
         struct rb_node *rb_node;
         struct mapping_node *node = NULL;
@@ -1275,7 +1277,7 @@ static int __update_reloc_root(struct btrfs_root *root, int del)
 
         spin_lock(&rc->reloc_root_tree.lock);
         rb_node = tree_search(&rc->reloc_root_tree.rb_root,
-                              root->commit_root->start);
+                              root->node->start);
         if (rb_node) {
                 node = rb_entry(rb_node, struct mapping_node, rb_node);
                 rb_erase(&node->rb_node, &rc->reloc_root_tree.rb_root);
@@ -1283,23 +1285,45 @@ static int __update_reloc_root(struct btrfs_root *root, int del)
         spin_unlock(&rc->reloc_root_tree.lock);
 
         if (!node)
-                return 0;
+                return;
         BUG_ON((struct btrfs_root *)node->data != root);
 
-        if (!del) {
-                spin_lock(&rc->reloc_root_tree.lock);
-                node->bytenr = root->node->start;
-                rb_node = tree_insert(&rc->reloc_root_tree.rb_root,
-                                      node->bytenr, &node->rb_node);
-                spin_unlock(&rc->reloc_root_tree.lock);
-                if (rb_node)
-                        backref_tree_panic(rb_node, -EEXIST, node->bytenr);
-        } else {
-                spin_lock(&root->fs_info->trans_lock);
-                list_del_init(&root->root_list);
-                spin_unlock(&root->fs_info->trans_lock);
-                kfree(node);
+        spin_lock(&root->fs_info->trans_lock);
+        list_del_init(&root->root_list);
+        spin_unlock(&root->fs_info->trans_lock);
+        kfree(node);
+}
+
+/*
+ * helper to update the 'address of tree root -> reloc tree'
+ * mapping
+ */
+static int __update_reloc_root(struct btrfs_root *root, u64 new_bytenr)
+{
+        struct rb_node *rb_node;
+        struct mapping_node *node = NULL;
+        struct reloc_control *rc = root->fs_info->reloc_ctl;
+
+        spin_lock(&rc->reloc_root_tree.lock);
+        rb_node = tree_search(&rc->reloc_root_tree.rb_root,
+                              root->node->start);
+        if (rb_node) {
+                node = rb_entry(rb_node, struct mapping_node, rb_node);
+                rb_erase(&node->rb_node, &rc->reloc_root_tree.rb_root);
         }
+        spin_unlock(&rc->reloc_root_tree.lock);
+
+        if (!node)
+                return 0;
+        BUG_ON((struct btrfs_root *)node->data != root);
+
+        spin_lock(&rc->reloc_root_tree.lock);
+        node->bytenr = new_bytenr;
+        rb_node = tree_insert(&rc->reloc_root_tree.rb_root,
+                              node->bytenr, &node->rb_node);
+        spin_unlock(&rc->reloc_root_tree.lock);
+        if (rb_node)
+                backref_tree_panic(rb_node, -EEXIST, node->bytenr);
         return 0;
 }
 
@@ -1420,7 +1444,6 @@ int btrfs_update_reloc_root(struct btrfs_trans_handle *trans,
 {
         struct btrfs_root *reloc_root;
         struct btrfs_root_item *root_item;
-        int del = 0;
         int ret;
 
         if (!root->reloc_root)
@@ -1432,11 +1455,9 @@ int btrfs_update_reloc_root(struct btrfs_trans_handle *trans,
         if (root->fs_info->reloc_ctl->merge_reloc_tree &&
             btrfs_root_refs(root_item) == 0) {
                 root->reloc_root = NULL;
-                del = 1;
+                __del_reloc_root(reloc_root);
         }
 
-        __update_reloc_root(reloc_root, del);
-
         if (reloc_root->commit_root != reloc_root->node) {
                 btrfs_set_root_node(root_item, reloc_root->node);
                 free_extent_buffer(reloc_root->commit_root);
@@ -2287,7 +2308,7 @@ void free_reloc_roots(struct list_head *list)
         while (!list_empty(list)) {
                 reloc_root = list_entry(list->next, struct btrfs_root,
                                         root_list);
-                __update_reloc_root(reloc_root, 1);
+                __del_reloc_root(reloc_root);
                 free_extent_buffer(reloc_root->node);
                 free_extent_buffer(reloc_root->commit_root);
                 kfree(reloc_root);
@@ -2332,7 +2353,7 @@ again:
 
                         ret = merge_reloc_root(rc, root);
                         if (ret) {
-                                __update_reloc_root(reloc_root, 1);
+                                __del_reloc_root(reloc_root);
                                 free_extent_buffer(reloc_root->node);
                                 free_extent_buffer(reloc_root->commit_root);
                                 kfree(reloc_root);
@@ -2388,6 +2409,13 @@ out:
                 btrfs_std_error(root->fs_info, ret);
                 if (!list_empty(&reloc_roots))
                         free_reloc_roots(&reloc_roots);
+
+                /* new reloc root may be added */
+                mutex_lock(&root->fs_info->reloc_mutex);
+                list_splice_init(&rc->reloc_roots, &reloc_roots);
+                mutex_unlock(&root->fs_info->reloc_mutex);
+                if (!list_empty(&reloc_roots))
+                        free_reloc_roots(&reloc_roots);
         }
 
         BUG_ON(!RB_EMPTY_ROOT(&rc->reloc_root_tree.rb_root));
@@ -4522,6 +4550,11 @@ int btrfs_reloc_cow_block(struct btrfs_trans_handle *trans,
         BUG_ON(rc->stage == UPDATE_DATA_PTRS &&
                root->root_key.objectid == BTRFS_DATA_RELOC_TREE_OBJECTID);
 
+        if (root->root_key.objectid == BTRFS_TREE_RELOC_OBJECTID) {
+                if (buf == root->node)
+                        __update_reloc_root(root, cow->start);
+        }
+
         level = btrfs_header_level(buf);
         if (btrfs_header_generation(buf) <=
             btrfs_root_last_snapshot(&root->root_item))
diff --git a/fs/btrfs/send.c b/fs/btrfs/send.c
index 6837fe87f3a6..945d1db98f26 100644
--- a/fs/btrfs/send.c
+++ b/fs/btrfs/send.c
@@ -4723,8 +4723,8 @@ long btrfs_ioctl_send(struct file *mnt_file, void __user *arg_)
         }
 
         if (!access_ok(VERIFY_READ, arg->clone_sources,
-                        sizeof(*arg->clone_sources *
-                        arg->clone_sources_count))) {
+                        sizeof(*arg->clone_sources) *
+                        arg->clone_sources_count)) {
                 ret = -EFAULT;
                 goto out;
         }
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 2d8ac1bf0cf9..d71a11d13dfa 100644
--- a/fs/btrfs/super.c
+++ b/fs/btrfs/super.c
@@ -432,7 +432,6 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
                         } else {
                                 printk(KERN_INFO "btrfs: setting nodatacow\n");
                         }
-                        info->compress_type = BTRFS_COMPRESS_NONE;
                         btrfs_clear_opt(info->mount_opt, COMPRESS);
                         btrfs_clear_opt(info->mount_opt, FORCE_COMPRESS);
                         btrfs_set_opt(info->mount_opt, NODATACOW);
@@ -461,7 +460,6 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
                                 btrfs_set_fs_incompat(info, COMPRESS_LZO);
                         } else if (strncmp(args[0].from, "no", 2) == 0) {
                                 compress_type = "no";
-                                info->compress_type = BTRFS_COMPRESS_NONE;
                                 btrfs_clear_opt(info->mount_opt, COMPRESS);
                                 btrfs_clear_opt(info->mount_opt, FORCE_COMPRESS);
                                 compress_force = false;
@@ -474,9 +472,10 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
                                 btrfs_set_opt(info->mount_opt, FORCE_COMPRESS);
                                 pr_info("btrfs: force %s compression\n",
                                         compress_type);
-                        } else
+                        } else if (btrfs_test_opt(root, COMPRESS)) {
                                 pr_info("btrfs: use %s compression\n",
                                         compress_type);
+                        }
                         break;
                 case Opt_ssd:
                         printk(KERN_INFO "btrfs: use ssd allocation scheme\n");
diff --git a/fs/dcache.c b/fs/dcache.c
index 4bdb300b16e2..6055d61811d3 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -192,7 +192,7 @@ static inline int dentry_string_cmp(const unsigned char *cs, const unsigned char
                 if (!tcount)
                         return 0;
         }
-        mask = ~(~0ul << tcount*8);
+        mask = bytemask_from_count(tcount);
         return unlikely(!!((a ^ b) & mask));
 }
 
diff --git a/fs/namei.c b/fs/namei.c
index c53d3a9547f9..3531deebad30 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -1598,11 +1598,6 @@ static inline int nested_symlink(struct path *path, struct nameidata *nd)
  *   do a "get_unaligned()" if this helps and is sufficiently
  *   fast.
  *
- * - Little-endian machines (so that we can generate the mask
- *   of low bytes efficiently). Again, we *could* do a byte
- *   swapping load on big-endian architectures if that is not
- *   expensive enough to make the optimization worthless.
- *
  * - non-CONFIG_DEBUG_PAGEALLOC configurations (so that we
  *   do not trap on the (extremely unlikely) case of a page
  *   crossing operation.
@@ -1646,7 +1641,7 @@ unsigned int full_name_hash(const unsigned char *name, unsigned int len)
                 if (!len)
                         goto done;
         }
-        mask = ~(~0ul << len*8);
+        mask = bytemask_from_count(len);
         hash += mask & a;
 done:
         return fold_hash(hash);
diff --git a/fs/nfsd/nfscache.c b/fs/nfsd/nfscache.c
index 9186c7ce0b14..b6af150c96b8 100644
--- a/fs/nfsd/nfscache.c
+++ b/fs/nfsd/nfscache.c
@@ -132,6 +132,13 @@ nfsd_reply_cache_alloc(void)
 }
 
 static void
+nfsd_reply_cache_unhash(struct svc_cacherep *rp)
+{
+        hlist_del_init(&rp->c_hash);
+        list_del_init(&rp->c_lru);
+}
+
+static void
 nfsd_reply_cache_free_locked(struct svc_cacherep *rp)
 {
         if (rp->c_type == RC_REPLBUFF && rp->c_replvec.iov_base) {
@@ -417,7 +424,7 @@ nfsd_cache_lookup(struct svc_rqst *rqstp)
                 rp = list_first_entry(&lru_head, struct svc_cacherep, c_lru);
                 if (nfsd_cache_entry_expired(rp) ||
                     num_drc_entries >= max_drc_entries) {
-                        lru_put_end(rp);
+                        nfsd_reply_cache_unhash(rp);
                         prune_cache_entries();
                         goto search_cache;
                 }
diff --git a/fs/proc/inode.c b/fs/proc/inode.c
index 28955d4b7218..124fc43c7090 100644
--- a/fs/proc/inode.c
+++ b/fs/proc/inode.c
@@ -292,16 +292,20 @@ proc_reg_get_unmapped_area(struct file *file, unsigned long orig_addr,
 {
         struct proc_dir_entry *pde = PDE(file_inode(file));
         unsigned long rv = -EIO;
-        unsigned long (*get_area)(struct file *, unsigned long, unsigned long,
-                                  unsigned long, unsigned long) = NULL;
+
         if (use_pde(pde)) {
+                typeof(proc_reg_get_unmapped_area) *get_area;
+
+                get_area = pde->proc_fops->get_unmapped_area;
 #ifdef CONFIG_MMU
-                get_area = current->mm->get_unmapped_area;
+                if (!get_area)
+                        get_area = current->mm->get_unmapped_area;
 #endif
-                if (pde->proc_fops->get_unmapped_area)
-                        get_area = pde->proc_fops->get_unmapped_area;
+
                 if (get_area)
                         rv = get_area(file, orig_addr, len, pgoff, flags);
+                else
+                        rv = orig_addr;
                 unuse_pde(pde);
         }
         return rv;
diff --git a/fs/xfs/xfs_discard.c b/fs/xfs/xfs_discard.c
index 8367d6dc18c9..4f11ef011139 100644
--- a/fs/xfs/xfs_discard.c
+++ b/fs/xfs/xfs_discard.c
@@ -157,7 +157,7 @@ xfs_ioc_trim(
         struct xfs_mount                *mp,
         struct fstrim_range __user      *urange)
 {
-        struct request_queue    *q = mp->m_ddev_targp->bt_bdev->bd_disk->queue;
+        struct request_queue    *q = bdev_get_queue(mp->m_ddev_targp->bt_bdev);
         unsigned int            granularity = q->limits.discard_granularity;
         struct fstrim_range     range;
         xfs_daddr_t             start, end, minlen;
@@ -180,7 +180,8 @@ xfs_ioc_trim(
          * matter as trimming blocks is an advisory interface.
          */
         if (range.start >= XFS_FSB_TO_B(mp, mp->m_sb.sb_dblocks) ||
-            range.minlen > XFS_FSB_TO_B(mp, XFS_ALLOC_AG_MAX_USABLE(mp)))
+            range.minlen > XFS_FSB_TO_B(mp, XFS_ALLOC_AG_MAX_USABLE(mp)) ||
+            range.len < mp->m_sb.sb_blocksize)
                 return -XFS_ERROR(EINVAL);
 
         start = BTOBB(range.start);
diff --git a/fs/xfs/xfs_fsops.c b/fs/xfs/xfs_fsops.c
index a6e54b3319bd..02fb943cbf22 100644
--- a/fs/xfs/xfs_fsops.c
+++ b/fs/xfs/xfs_fsops.c
@@ -220,6 +220,8 @@ xfs_growfs_data_private(
          */
         nfree = 0;
         for (agno = nagcount - 1; agno >= oagcount; agno--, new -= agsize) {
+                __be32  *agfl_bno;
+
                 /*
                  * AG freespace header block
                  */
@@ -279,8 +281,10 @@ xfs_growfs_data_private(
                         agfl->agfl_seqno = cpu_to_be32(agno);
                         uuid_copy(&agfl->agfl_uuid, &mp->m_sb.sb_uuid);
                 }
+
+                agfl_bno = XFS_BUF_TO_AGFL_BNO(mp, bp);
                 for (bucket = 0; bucket < XFS_AGFL_SIZE(mp); bucket++)
-                        agfl->agfl_bno[bucket] = cpu_to_be32(NULLAGBLOCK);
+                        agfl_bno[bucket] = cpu_to_be32(NULLAGBLOCK);
 
                 error = xfs_bwrite(bp);
                 xfs_buf_relse(bp);
diff --git a/fs/xfs/xfs_ioctl.c b/fs/xfs/xfs_ioctl.c
index 4d613401a5e0..33ad9a77791f 100644
--- a/fs/xfs/xfs_ioctl.c
+++ b/fs/xfs/xfs_ioctl.c
@@ -442,7 +442,8 @@ xfs_attrlist_by_handle(
                 return -XFS_ERROR(EPERM);
         if (copy_from_user(&al_hreq, arg, sizeof(xfs_fsop_attrlist_handlereq_t)))
                 return -XFS_ERROR(EFAULT);
-        if (al_hreq.buflen > XATTR_LIST_MAX)
+        if (al_hreq.buflen < sizeof(struct attrlist) ||
+            al_hreq.buflen > XATTR_LIST_MAX)
                 return -XFS_ERROR(EINVAL);
 
         /*
diff --git a/fs/xfs/xfs_ioctl32.c b/fs/xfs/xfs_ioctl32.c
index e8fb1231db81..a7992f8de9d3 100644
--- a/fs/xfs/xfs_ioctl32.c
+++ b/fs/xfs/xfs_ioctl32.c
@@ -356,7 +356,8 @@ xfs_compat_attrlist_by_handle(
         if (copy_from_user(&al_hreq, arg,
                            sizeof(compat_xfs_fsop_attrlist_handlereq_t)))
                 return -XFS_ERROR(EFAULT);
-        if (al_hreq.buflen > XATTR_LIST_MAX)
+        if (al_hreq.buflen < sizeof(struct attrlist) ||
+            al_hreq.buflen > XATTR_LIST_MAX)
                 return -XFS_ERROR(EINVAL);
 
         /*
diff --git a/include/asm-generic/word-at-a-time.h b/include/asm-generic/word-at-a-time.h
index 3f21f1b72e45..d3909effd725 100644
--- a/include/asm-generic/word-at-a-time.h
+++ b/include/asm-generic/word-at-a-time.h
@@ -49,4 +49,12 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
         return (val + c->high_bits) & ~rhs;
 }
 
+#ifndef zero_bytemask
+#ifdef CONFIG_64BIT
+#define zero_bytemask(mask)     (~0ul << fls64(mask))
+#else
+#define zero_bytemask(mask)     (~0ul << fls(mask))
+#endif /* CONFIG_64BIT */
+#endif /* zero_bytemask */
+
 #endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/include/crypto/scatterwalk.h b/include/crypto/scatterwalk.h
index 64ebede184f1..6a626a507b8c 100644
--- a/include/crypto/scatterwalk.h
+++ b/include/crypto/scatterwalk.h
@@ -44,7 +44,7 @@ static inline struct scatterlist *scatterwalk_sg_next(struct scatterlist *sg)
         if (sg_is_last(sg))
                 return NULL;
 
-        return (++sg)->length ? sg : (void *)sg_page(sg);
+        return (++sg)->length ? sg : sg_chain_ptr(sg);
 }
 
 static inline void scatterwalk_crypto_chain(struct scatterlist *head,
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
new file mode 100644
index 000000000000..420f0b00ae1e
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
+#define __DT_BINDINGS_CLOCK_R8A7790_H__
+
+/* CPG */
+#define R8A7790_CLK_MAIN                0
+#define R8A7790_CLK_PLL0                1
+#define R8A7790_CLK_PLL1                2
+#define R8A7790_CLK_PLL3                3
+#define R8A7790_CLK_LB                  4
+#define R8A7790_CLK_QSPI                5
+#define R8A7790_CLK_SDH                 6
+#define R8A7790_CLK_SD0                 7
+#define R8A7790_CLK_SD1                 8
+#define R8A7790_CLK_Z                   9
+
+/* MSTP1 */
+#define R8A7790_CLK_TMU1                11
+#define R8A7790_CLK_TMU3                21
+#define R8A7790_CLK_TMU2                22
+#define R8A7790_CLK_CMT0                24
+#define R8A7790_CLK_TMU0                25
+#define R8A7790_CLK_VSP1_DU1            27
+#define R8A7790_CLK_VSP1_DU0            28
+#define R8A7790_CLK_VSP1_RT             30
+#define R8A7790_CLK_VSP1_SY             31
+
+/* MSTP2 */
+#define R8A7790_CLK_SCIFA2              2
+#define R8A7790_CLK_SCIFA1              3
+#define R8A7790_CLK_SCIFA0              4
+#define R8A7790_CLK_SCIFB0              6
+#define R8A7790_CLK_SCIFB1              7
+#define R8A7790_CLK_SCIFB2              16
+#define R8A7790_CLK_SYS_DMAC0           18
+#define R8A7790_CLK_SYS_DMAC1           19
+
+/* MSTP3 */
+#define R8A7790_CLK_TPU0                4
+#define R8A7790_CLK_MMCIF1              5
+#define R8A7790_CLK_SDHI3               11
+#define R8A7790_CLK_SDHI2               12
+#define R8A7790_CLK_SDHI1               13
+#define R8A7790_CLK_SDHI0               14
+#define R8A7790_CLK_MMCIF0              15
+#define R8A7790_CLK_SSUSB               28
+#define R8A7790_CLK_CMT1                29
+#define R8A7790_CLK_USBDMAC0            30
+#define R8A7790_CLK_USBDMAC1            31
+
+/* MSTP5 */
+#define R8A7790_CLK_THERMAL             22
+#define R8A7790_CLK_PWM                 23
+
+/* MSTP7 */
+#define R8A7790_CLK_EHCI                3
+#define R8A7790_CLK_HSUSB               4
+#define R8A7790_CLK_HSCIF1              16
+#define R8A7790_CLK_HSCIF0              17
+#define R8A7790_CLK_SCIF1               20
+#define R8A7790_CLK_SCIF0               21
+#define R8A7790_CLK_DU2                 22
+#define R8A7790_CLK_DU1                 23
+#define R8A7790_CLK_DU0                 24
+#define R8A7790_CLK_LVDS1               25
+#define R8A7790_CLK_LVDS0               26
+
+/* MSTP8 */
+#define R8A7790_CLK_VIN3                8
+#define R8A7790_CLK_VIN2                9
+#define R8A7790_CLK_VIN1                10
+#define R8A7790_CLK_VIN0                11
+#define R8A7790_CLK_ETHER               13
+#define R8A7790_CLK_SATA1               14
+#define R8A7790_CLK_SATA0               15
+
+/* MSTP9 */
+#define R8A7790_CLK_GPIO5               7
+#define R8A7790_CLK_GPIO4               8
+#define R8A7790_CLK_GPIO3               9
+#define R8A7790_CLK_GPIO2               10
+#define R8A7790_CLK_GPIO1               11
+#define R8A7790_CLK_GPIO0               12
+#define R8A7790_CLK_RCAN1               15
+#define R8A7790_CLK_RCAN0               16
+#define R8A7790_CLK_IICDVFS             26
+#define R8A7790_CLK_I2C3                28
+#define R8A7790_CLK_I2C2                29
+#define R8A7790_CLK_I2C1                30
+#define R8A7790_CLK_I2C0                31
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
new file mode 100644
index 000000000000..df1715b77f96
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -0,0 +1,105 @@
+/*
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
+#define __DT_BINDINGS_CLOCK_R8A7791_H__
+
+/* CPG */
+#define R8A7791_CLK_MAIN                0
+#define R8A7791_CLK_PLL0                1
+#define R8A7791_CLK_PLL1                2
+#define R8A7791_CLK_PLL3                3
+#define R8A7791_CLK_LB                  4
+#define R8A7791_CLK_QSPI                5
+#define R8A7791_CLK_SDH                 6
+#define R8A7791_CLK_SD0                 7
+#define R8A7791_CLK_Z                   8
+
+/* MSTP1 */
+#define R8A7791_CLK_TMU1                11
+#define R8A7791_CLK_TMU3                21
+#define R8A7791_CLK_TMU2                22
+#define R8A7791_CLK_CMT0                24
+#define R8A7791_CLK_TMU0                25
+#define R8A7791_CLK_VSP1_DU1            27
+#define R8A7791_CLK_VSP1_DU0            28
+#define R8A7791_CLK_VSP1_SY             31
+
+/* MSTP2 */
+#define R8A7791_CLK_SCIFA2              2
+#define R8A7791_CLK_SCIFA1              3
+#define R8A7791_CLK_SCIFA0              4
+#define R8A7791_CLK_SCIFB0              6
+#define R8A7791_CLK_SCIFB1              7
+#define R8A7791_CLK_SCIFB2              16
+#define R8A7791_CLK_DMAC                18
+
+/* MSTP3 */
+#define R8A7791_CLK_TPU0                4
+#define R8A7791_CLK_SDHI2               11
+#define R8A7791_CLK_SDHI1               12
+#define R8A7791_CLK_SDHI0               14
+#define R8A7791_CLK_MMCIF0              15
+#define R8A7791_CLK_SSUSB               28
+#define R8A7791_CLK_CMT1                29
+#define R8A7791_CLK_USBDMAC0            30
+#define R8A7791_CLK_USBDMAC1            31
+
+/* MSTP5 */
+#define R8A7791_CLK_THERMAL             22
+#define R8A7791_CLK_PWM                 23
+
+/* MSTP7 */
+#define R8A7791_CLK_HSUSB               4
+#define R8A7791_CLK_HSCIF2              13
+#define R8A7791_CLK_SCIF5               14
+#define R8A7791_CLK_SCIF4               15
+#define R8A7791_CLK_HSCIF1              16
+#define R8A7791_CLK_HSCIF0              17
+#define R8A7791_CLK_SCIF3               18
+#define R8A7791_CLK_SCIF2               19
+#define R8A7791_CLK_SCIF1               20
+#define R8A7791_CLK_SCIF0               21
+#define R8A7791_CLK_DU1                 23
+#define R8A7791_CLK_DU0                 24
+#define R8A7791_CLK_LVDS0               26
+
+/* MSTP8 */
+#define R8A7791_CLK_VIN2                9
+#define R8A7791_CLK_VIN1                10
+#define R8A7791_CLK_VIN0                11
+#define R8A7791_CLK_ETHER               13
+#define R8A7791_CLK_SATA1               14
+#define R8A7791_CLK_SATA0               15
+
+/* MSTP9 */
+#define R8A7791_CLK_GPIO7               4
+#define R8A7791_CLK_GPIO6               5
+#define R8A7791_CLK_GPIO5               7
+#define R8A7791_CLK_GPIO4               8
+#define R8A7791_CLK_GPIO3               9
+#define R8A7791_CLK_GPIO2               10
+#define R8A7791_CLK_GPIO1               11
+#define R8A7791_CLK_GPIO0               12
+#define R8A7791_CLK_RCAN1               15
+#define R8A7791_CLK_RCAN0               16
+#define R8A7791_CLK_I2C5                25
+#define R8A7791_CLK_IICDVFS             26
+#define R8A7791_CLK_I2C4                27
+#define R8A7791_CLK_I2C3                28
+#define R8A7791_CLK_I2C2                29
+#define R8A7791_CLK_I2C1                30
+#define R8A7791_CLK_I2C0                31
+
+/* MSTP11 */
+#define R8A7791_CLK_SCIFA3              6
+#define R8A7791_CLK_SCIFA4              7
+#define R8A7791_CLK_SCIFA5              8
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h
index 614aec417902..6d0d8d8ef31e 100644
--- a/include/dt-bindings/clock/tegra114-car.h
+++ b/include/dt-bindings/clock/tegra114-car.h
@@ -37,10 +37,10 @@
 #define TEGRA114_CLK_I2S2 18
 #define TEGRA114_CLK_EPP 19
 /* 20 (register bit affects vi and vi_sensor) */
-#define TEGRA114_CLK_GR_2D 21
+#define TEGRA114_CLK_GR2D 21
 #define TEGRA114_CLK_USBD 22
 #define TEGRA114_CLK_ISP 23
-#define TEGRA114_CLK_GR_3D 24
+#define TEGRA114_CLK_GR3D 24
 /* 25 */
 #define TEGRA114_CLK_DISP2 26
 #define TEGRA114_CLK_DISP1 27
@@ -289,8 +289,8 @@
 #define TEGRA114_CLK_PCLK 261
 #define TEGRA114_CLK_CCLK_G 262
 #define TEGRA114_CLK_CCLK_LP 263
-/* 264 */
-/* 265 */
+#define TEGRA114_CLK_DFLL_REF 264
+#define TEGRA114_CLK_DFLL_SOC 265
 /* 266 */
 /* 267 */
 /* 268 */
diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
new file mode 100644
index 000000000000..a1116a3b54ef
--- /dev/null
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -0,0 +1,341 @@
+/*
+ * This header provides constants for binding nvidia,tegra124-car.
+ *
+ * The first 192 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
+ * registers. These IDs often match those in the CAR's RST_DEVICES registers,
+ * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
+ * this case, those clocks are assigned IDs above 185 in order to highlight
+ * this issue. Implementations that interpret these clock IDs as bit values
+ * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
+ * explicitly handle these special cases.
+ *
+ * The balance of the clocks controlled by the CAR are assigned IDs of 185 and
+ * above.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_TEGRA124_CAR_H
+#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H
+
+/* 0 */
+/* 1 */
+/* 2 */
+#define TEGRA124_CLK_ISPB 3
+#define TEGRA124_CLK_RTC 4
+#define TEGRA124_CLK_TIMER 5
+#define TEGRA124_CLK_UARTA 6
+/* 7 (register bit affects uartb and vfir) */
+/* 8 */
+#define TEGRA124_CLK_SDMMC2 9
+/* 10 (register bit affects spdif_in and spdif_out) */
+#define TEGRA124_CLK_I2S1 11
+#define TEGRA124_CLK_I2C1 12
+#define TEGRA124_CLK_NDFLASH 13
+#define TEGRA124_CLK_SDMMC1 14
+#define TEGRA124_CLK_SDMMC4 15
+/* 16 */
+#define TEGRA124_CLK_PWM 17
+#define TEGRA124_CLK_I2S2 18
+/* 20 (register bit affects vi and vi_sensor) */
+#define TEGRA124_CLK_GR_2D 21
+#define TEGRA124_CLK_USBD 22
+#define TEGRA124_CLK_ISP 23
+#define TEGRA124_CLK_GR_3D 24
+/* 25 */
+#define TEGRA124_CLK_DISP2 26
+#define TEGRA124_CLK_DISP1 27
+#define TEGRA124_CLK_HOST1X 28
+#define TEGRA124_CLK_VCP 29
+#define TEGRA124_CLK_I2S0 30
+/* 31 */
+
+/* 32 */
+/* 33 */
+#define TEGRA124_CLK_APBDMA 34
+/* 35 */
+#define TEGRA124_CLK_KBC 36
+/* 37 */
+/* 38 */
+/* 39 (register bit affects fuse and fuse_burn) */
+#define TEGRA124_CLK_KFUSE 40
+#define TEGRA124_CLK_SBC1 41
+#define TEGRA124_CLK_NOR 42
+/* 43 */
+#define TEGRA124_CLK_SBC2 44
+/* 45 */
+#define TEGRA124_CLK_SBC3 46
+#define TEGRA124_CLK_I2C5 47
+#define TEGRA124_CLK_DSIA 48
+/* 49 */
+#define TEGRA124_CLK_MIPI 50
+#define TEGRA124_CLK_HDMI 51
+#define TEGRA124_CLK_CSI 52
+/* 53 */
+#define TEGRA124_CLK_I2C2 54
+#define TEGRA124_CLK_UARTC 55
+#define TEGRA124_CLK_MIPI_CAL 56
+#define TEGRA124_CLK_EMC 57
+#define TEGRA124_CLK_USB2 58
+#define TEGRA124_CLK_USB3 59
+/* 60 */
+#define TEGRA124_CLK_VDE 61
+#define TEGRA124_CLK_BSEA 62
+#define TEGRA124_CLK_BSEV 63
+
+/* 64 */
+#define TEGRA124_CLK_UARTD 65
+#define TEGRA124_CLK_UARTE 66
+#define TEGRA124_CLK_I2C3 67
+#define TEGRA124_CLK_SBC4 68
+#define TEGRA124_CLK_SDMMC3 69
+#define TEGRA124_CLK_PCIE 70
+#define TEGRA124_CLK_OWR 71
+#define TEGRA124_CLK_AFI 72
+#define TEGRA124_CLK_CSITE 73
+/* 74 */
+/* 75 */
+#define TEGRA124_CLK_LA 76
+#define TEGRA124_CLK_TRACE 77
+#define TEGRA124_CLK_SOC_THERM 78
+#define TEGRA124_CLK_DTV 79
+#define TEGRA124_CLK_NDSPEED 80
+#define TEGRA124_CLK_I2CSLOW 81
+#define TEGRA124_CLK_DSIB 82
+#define TEGRA124_CLK_TSEC 83
+/* 84 */
+/* 85 */
+/* 86 */
+/* 87 */
+/* 88 */
+#define TEGRA124_CLK_XUSB_HOST 89
+/* 90 */
+#define TEGRA124_CLK_MSENC 91
+#define TEGRA124_CLK_CSUS 92
+/* 93 */
+/* 94 */
+/* 95 (bit affects xusb_dev and xusb_dev_src) */
+
+/* 96 */
+/* 97 */
+/* 98 */
+#define TEGRA124_CLK_MSELECT 99
+#define TEGRA124_CLK_TSENSOR 100
+#define TEGRA124_CLK_I2S3 101
+#define TEGRA124_CLK_I2S4 102
+#define TEGRA124_CLK_I2C4 103
+#define TEGRA124_CLK_SBC5 104
+#define TEGRA124_CLK_SBC6 105
+#define TEGRA124_CLK_D_AUDIO 106
+#define TEGRA124_CLK_APBIF 107
+#define TEGRA124_CLK_DAM0 108
+#define TEGRA124_CLK_DAM1 109
+#define TEGRA124_CLK_DAM2 110
+#define TEGRA124_CLK_HDA2CODEC_2X 111
+/* 112 */
+#define TEGRA124_CLK_AUDIO0_2X 113
+#define TEGRA124_CLK_AUDIO1_2X 114
+#define TEGRA124_CLK_AUDIO2_2X 115
+#define TEGRA124_CLK_AUDIO3_2X 116
+#define TEGRA124_CLK_AUDIO4_2X 117
+#define TEGRA124_CLK_SPDIF_2X 118
+#define TEGRA124_CLK_ACTMON 119
+#define TEGRA124_CLK_EXTERN1 120
+#define TEGRA124_CLK_EXTERN2 121
+#define TEGRA124_CLK_EXTERN3 122
+#define TEGRA124_CLK_SATA_OOB 123
+#define TEGRA124_CLK_SATA 124
+#define TEGRA124_CLK_HDA 125
+/* 126 */
+#define TEGRA124_CLK_SE 127
+
+#define TEGRA124_CLK_HDA2HDMI 128
+#define TEGRA124_CLK_SATA_COLD 129
+/* 130 */
+/* 131 */
+/* 132 */
+/* 133 */
+/* 134 */
+/* 135 */
+/* 136 */
+/* 137 */
+/* 138 */
+/* 139 */
+/* 140 */
+/* 141 */
+/* 142 */
+/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */
+/*      xusb_host_src and xusb_ss_src) */
+#define TEGRA124_CLK_CILAB 144
+#define TEGRA124_CLK_CILCD 145
+#define TEGRA124_CLK_CILE 146
+#define TEGRA124_CLK_DSIALP 147
+#define TEGRA124_CLK_DSIBLP 148
+#define TEGRA124_CLK_ENTROPY 149
+#define TEGRA124_CLK_DDS 150
+/* 151 */
+#define TEGRA124_CLK_DP2 152
+#define TEGRA124_CLK_AMX 153
+#define TEGRA124_CLK_ADX 154
+/* 155 (bit affects dfll_ref and dfll_soc) */
+#define TEGRA124_CLK_XUSB_SS 156
+/* 157 */
+/* 158 */
+/* 159 */
+
+/* 160 */
+/* 161 */
+/* 162 */
+/* 163 */
+/* 164 */
+/* 165 */
+#define TEGRA124_CLK_I2C6 166
+/* 167 */
+/* 168 */
+/* 169 */
+/* 170 */
+#define TEGRA124_CLK_VIM2_CLK 171
+/* 172 */
+/* 173 */
+/* 174 */
+/* 175 */
+#define TEGRA124_CLK_HDMI_AUDIO 176
+#define TEGRA124_CLK_CLK72MHZ 177
+#define TEGRA124_CLK_VIC03 178
+/* 179 */
+#define TEGRA124_CLK_ADX1 180
+#define TEGRA124_CLK_DPAUX 181
+#define TEGRA124_CLK_SOR0 182
+/* 183 */
+#define TEGRA124_CLK_GPU 184
+#define TEGRA124_CLK_AMX1 185
+/* 186 */
+/* 187 */
+/* 188 */
+/* 189 */
+/* 190 */
+/* 191 */
+#define TEGRA124_CLK_UARTB 192
+#define TEGRA124_CLK_VFIR 193
+#define TEGRA124_CLK_SPDIF_IN 194
+#define TEGRA124_CLK_SPDIF_OUT 195
+#define TEGRA124_CLK_VI 196
+#define TEGRA124_CLK_VI_SENSOR 197
+#define TEGRA124_CLK_FUSE 198
+#define TEGRA124_CLK_FUSE_BURN 199
+#define TEGRA124_CLK_CLK_32K 200
+#define TEGRA124_CLK_CLK_M 201
+#define TEGRA124_CLK_CLK_M_DIV2 202
+#define TEGRA124_CLK_CLK_M_DIV4 203
+#define TEGRA124_CLK_PLL_REF 204
+#define TEGRA124_CLK_PLL_C 205
+#define TEGRA124_CLK_PLL_C_OUT1 206
+#define TEGRA124_CLK_PLL_C2 207
+#define TEGRA124_CLK_PLL_C3 208
+#define TEGRA124_CLK_PLL_M 209
+#define TEGRA124_CLK_PLL_M_OUT1 210
+#define TEGRA124_CLK_PLL_P 211
+#define TEGRA124_CLK_PLL_P_OUT1 212
+#define TEGRA124_CLK_PLL_P_OUT2 213
+#define TEGRA124_CLK_PLL_P_OUT3 214
+#define TEGRA124_CLK_PLL_P_OUT4 215
+#define TEGRA124_CLK_PLL_A 216
+#define TEGRA124_CLK_PLL_A_OUT0 217
+#define TEGRA124_CLK_PLL_D 218
+#define TEGRA124_CLK_PLL_D_OUT0 219
+#define TEGRA124_CLK_PLL_D2 220
+#define TEGRA124_CLK_PLL_D2_OUT0 221
+#define TEGRA124_CLK_PLL_U 222
+#define TEGRA124_CLK_PLL_U_480M 223
+
+#define TEGRA124_CLK_PLL_U_60M 224
+#define TEGRA124_CLK_PLL_U_48M 225
+#define TEGRA124_CLK_PLL_U_12M 226
+#define TEGRA124_CLK_PLL_X 227
+#define TEGRA124_CLK_PLL_X_OUT0 228
+#define TEGRA124_CLK_PLL_RE_VCO 229
+#define TEGRA124_CLK_PLL_RE_OUT 230
+#define TEGRA124_CLK_PLL_E 231
+#define TEGRA124_CLK_SPDIF_IN_SYNC 232
+#define TEGRA124_CLK_I2S0_SYNC 233
+#define TEGRA124_CLK_I2S1_SYNC 234
+#define TEGRA124_CLK_I2S2_SYNC 235
+#define TEGRA124_CLK_I2S3_SYNC 236
+#define TEGRA124_CLK_I2S4_SYNC 237
+#define TEGRA124_CLK_VIMCLK_SYNC 238
+#define TEGRA124_CLK_AUDIO0 239
+#define TEGRA124_CLK_AUDIO1 240
+#define TEGRA124_CLK_AUDIO2 241
+#define TEGRA124_CLK_AUDIO3 242
+#define TEGRA124_CLK_AUDIO4 243
+#define TEGRA124_CLK_SPDIF 244
+#define TEGRA124_CLK_CLK_OUT_1 245
+#define TEGRA124_CLK_CLK_OUT_2 246
+#define TEGRA124_CLK_CLK_OUT_3 247
+#define TEGRA124_CLK_BLINK 248
+/* 249 */
+/* 250 */
+/* 251 */
+#define TEGRA124_CLK_XUSB_HOST_SRC 252
+#define TEGRA124_CLK_XUSB_FALCON_SRC 253
+#define TEGRA124_CLK_XUSB_FS_SRC 254
+#define TEGRA124_CLK_XUSB_SS_SRC 255
+
+#define TEGRA124_CLK_XUSB_DEV_SRC 256
+#define TEGRA124_CLK_XUSB_DEV 257
+#define TEGRA124_CLK_XUSB_HS_SRC 258
+#define TEGRA124_CLK_SCLK 259
+#define TEGRA124_CLK_HCLK 260
+#define TEGRA124_CLK_PCLK 261
+#define TEGRA124_CLK_CCLK_G 262
+#define TEGRA124_CLK_CCLK_LP 263
+#define TEGRA124_CLK_DFLL_REF 264
+#define TEGRA124_CLK_DFLL_SOC 265
+#define TEGRA124_CLK_VI_SENSOR2 266
+#define TEGRA124_CLK_PLL_P_OUT5 267
+#define TEGRA124_CLK_CML0 268
+#define TEGRA124_CLK_CML1 269
+#define TEGRA124_CLK_PLL_C4 270
+#define TEGRA124_CLK_PLL_DP 271
+#define TEGRA124_CLK_PLL_E_MUX 272
+/* 273 */
+/* 274 */
+/* 275 */
+/* 276 */
+/* 277 */
+/* 278 */
+/* 279 */
+/* 280 */
+/* 281 */
+/* 282 */
+/* 283 */
+/* 284 */
+/* 285 */
+/* 286 */
+/* 287 */
+
+/* 288 */
+/* 289 */
+/* 290 */
+/* 291 */
+/* 292 */
+/* 293 */
+/* 294 */
+/* 295 */
+/* 296 */
+/* 297 */
+/* 298 */
+/* 299 */
+#define TEGRA124_CLK_AUDIO0_MUX 300
+#define TEGRA124_CLK_AUDIO1_MUX 301
+#define TEGRA124_CLK_AUDIO2_MUX 302
+#define TEGRA124_CLK_AUDIO3_MUX 303
+#define TEGRA124_CLK_AUDIO4_MUX 304
+#define TEGRA124_CLK_SPDIF_MUX 305
+#define TEGRA124_CLK_CLK_OUT_1_MUX 306
+#define TEGRA124_CLK_CLK_OUT_2_MUX 307
+#define TEGRA124_CLK_CLK_OUT_3_MUX 308
+#define TEGRA124_CLK_DSIA_MUX 309
+#define TEGRA124_CLK_DSIB_MUX 310
+#define TEGRA124_CLK_SOR0_LVDS 311
+#define TEGRA124_CLK_CLK_MAX 312
+
+#endif  /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
diff --git a/include/dt-bindings/clock/tegra20-car.h b/include/dt-bindings/clock/tegra20-car.h
index a1ae9a8fdd6c..9406207cfac8 100644
--- a/include/dt-bindings/clock/tegra20-car.h
+++ b/include/dt-bindings/clock/tegra20-car.h
@@ -92,7 +92,7 @@
 #define TEGRA20_CLK_OWR 71
 #define TEGRA20_CLK_AFI 72
 #define TEGRA20_CLK_CSITE 73
-#define TEGRA20_CLK_PCIE_XCLK 74
+/* 74 */
 #define TEGRA20_CLK_AVPUCQ 75
 #define TEGRA20_CLK_LA 76
 /* 77 */
diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h
index e40fae8f9a8d..889e49ba0aa3 100644
--- a/include/dt-bindings/clock/tegra30-car.h
+++ b/include/dt-bindings/clock/tegra30-car.h
@@ -92,7 +92,7 @@
 #define TEGRA30_CLK_OWR 71
 #define TEGRA30_CLK_AFI 72
 #define TEGRA30_CLK_CSITE 73
-#define TEGRA30_CLK_PCIEX 74
+/* 74 */
 #define TEGRA30_CLK_AVPUCQ 75
 #define TEGRA30_CLK_LA 76
 /* 77 */
@@ -260,6 +260,14 @@
 /* 298 */
 /* 299 */
 #define TEGRA30_CLK_CLK_OUT_1_MUX 300
-#define TEGRA30_CLK_CLK_MAX 301
+#define TEGRA30_CLK_CLK_OUT_2_MUX 301
+#define TEGRA30_CLK_CLK_OUT_3_MUX 302
+#define TEGRA30_CLK_AUDIO0_MUX 303
+#define TEGRA30_CLK_AUDIO1_MUX 304
+#define TEGRA30_CLK_AUDIO2_MUX 305
+#define TEGRA30_CLK_AUDIO3_MUX 306
+#define TEGRA30_CLK_AUDIO4_MUX 307
+#define TEGRA30_CLK_SPDIF_MUX 308
+#define TEGRA30_CLK_CLK_MAX 309
 
 #endif  /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */
diff --git a/include/linux/assoc_array.h b/include/linux/assoc_array.h
index 9a193b84238a..a89df3be1686 100644
--- a/include/linux/assoc_array.h
+++ b/include/linux/assoc_array.h
@@ -41,10 +41,10 @@ struct assoc_array_ops {
         /* Is this the object we're looking for? */
         bool (*compare_object)(const void *object, const void *index_key);
 
-        /* How different are two objects, to a bit position in their keys? (or
-         * -1 if they're the same)
+        /* How different is an object from an index key, to a bit position in
+         * their keys? (or -1 if they're the same)
          */
-        int (*diff_objects)(const void *a, const void *b);
+        int (*diff_objects)(const void *object, const void *index_key);
 
         /* Method to free an object. */
         void (*free_object)(void *object);
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 23a0ceee831f..3ca9fca827a2 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -120,13 +120,6 @@ static inline void tegra_cpu_clock_resume(void)
 }
 #endif
 
-#ifdef CONFIG_ARCH_TEGRA
-void tegra_periph_reset_deassert(struct clk *c);
-void tegra_periph_reset_assert(struct clk *c);
-#else
-static inline void tegra_periph_reset_deassert(struct clk *c) {}
-static inline void tegra_periph_reset_assert(struct clk *c) {}
-#endif
 void tegra_clocks_apply_init_table(void);
 
 #endif /* __LINUX_CLK_TEGRA_H_ */
diff --git a/include/linux/compiler-intel.h b/include/linux/compiler-intel.h
index 973ce10c40b6..dc1bd3dcf11f 100644
--- a/include/linux/compiler-intel.h
+++ b/include/linux/compiler-intel.h
@@ -28,8 +28,6 @@
 
 #endif
 
-#define uninitialized_var(x) x
-
 #ifndef __HAVE_BUILTIN_BSWAP16__
 /* icc has this, but it's called _bswap16 */
 #define __HAVE_BUILTIN_BSWAP16__
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index ee5fe9d77ae8..dc196bbcf227 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -280,14 +280,6 @@ cpufreq_verify_within_cpu_limits(struct cpufreq_policy *policy)
                         policy->cpuinfo.max_freq);
 }
 
-#ifdef CONFIG_CPU_FREQ
-void cpufreq_suspend(void);
-void cpufreq_resume(void);
-#else
-static inline void cpufreq_suspend(void) {}
-static inline void cpufreq_resume(void) {}
-#endif
-
 /*********************************************************************
  *                     CPUFREQ NOTIFIER INTERFACE                    *
  *********************************************************************/
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 57e87e749a48..bf72e9ac6de0 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -29,8 +29,10 @@ struct vfsmount;
 /* The hash is always the low bits of hash_len */
 #ifdef __LITTLE_ENDIAN
  #define HASH_LEN_DECLARE u32 hash; u32 len;
+ #define bytemask_from_count(cnt)       (~(~0ul << (cnt)*8))
 #else
  #define HASH_LEN_DECLARE u32 len; u32 hash;
+ #define bytemask_from_count(cnt)       (~(~0ul >> (cnt)*8))
 #endif
 
 /*
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 41cf0c399288..bae1568416f8 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -22,6 +22,7 @@
 #define LINUX_DMAENGINE_H
 
 #include <linux/device.h>
+#include <linux/err.h>
 #include <linux/uio.h>
 #include <linux/bug.h>
 #include <linux/scatterlist.h>
@@ -1040,6 +1041,8 @@ enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
 void dma_issue_pending_all(void);
 struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
                                         dma_filter_fn fn, void *fn_param);
+struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
+                                                  const char *name);
 struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name);
 void dma_release_channel(struct dma_chan *chan);
 #else
@@ -1063,6 +1066,11 @@ static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
 {
         return NULL;
 }
+static inline struct dma_chan *dma_request_slave_channel_reason(
+                                        struct device *dev, const char *name)
+{
+        return ERR_PTR(-ENODEV);
+}
 static inline struct dma_chan *dma_request_slave_channel(struct device *dev,
                                                          const char *name)
 {
@@ -1079,6 +1087,7 @@ int dma_async_device_register(struct dma_device *device);
 void dma_async_device_unregister(struct dma_device *device);
 void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
 struct dma_chan *dma_get_slave_channel(struct dma_chan *chan);
+struct dma_chan *dma_get_any_slave_channel(struct dma_device *device);
 struct dma_chan *net_dma_find_channel(void);
 #define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
 #define dma_request_slave_channel_compat(mask, x, y, dev, name) \
diff --git a/include/linux/hid-sensor-hub.h b/include/linux/hid-sensor-hub.h
index 206a2af6b62b..b914ca3f57ba 100644
--- a/include/linux/hid-sensor-hub.h
+++ b/include/linux/hid-sensor-hub.h
@@ -42,6 +42,8 @@ struct hid_sensor_hub_attribute_info {
         s32 units;
         s32 unit_expo;
         s32 size;
+        s32 logical_minimum;
+        s32 logical_maximum;
 };
 
 /**
diff --git a/include/linux/hid-sensor-ids.h b/include/linux/hid-sensor-ids.h
index 4f945d3ed49f..8323775ac21d 100644
--- a/include/linux/hid-sensor-ids.h
+++ b/include/linux/hid-sensor-ids.h
@@ -117,4 +117,16 @@
 #define HID_USAGE_SENSOR_PROP_REPORT_STATE                      0x200316
 #define HID_USAGE_SENSOR_PROY_POWER_STATE                       0x200319
 
+/* Power state enumerations */
+#define HID_USAGE_SENSOR_PROP_POWER_STATE_UNDEFINED_ENUM                0x00
+#define HID_USAGE_SENSOR_PROP_POWER_STATE_D0_FULL_POWER_ENUM            0x01
+#define HID_USAGE_SENSOR_PROP_POWER_STATE_D1_LOW_POWER_ENUM             0x02
+#define HID_USAGE_SENSOR_PROP_POWER_STATE_D2_STANDBY_WITH_WAKE_ENUM     0x03
+#define HID_USAGE_SENSOR_PROP_POWER_STATE_D3_SLEEP_WITH_WAKE_ENUM       0x04
+#define HID_USAGE_SENSOR_PROP_POWER_STATE_D4_POWER_OFF_ENUM             0x05
+
+/* Report State enumerations */
+#define HID_USAGE_SENSOR_PROP_REPORTING_STATE_NO_EVENTS_ENUM            0x00
+#define HID_USAGE_SENSOR_PROP_REPORTING_STATE_ALL_EVENTS_ENUM           0x01
+
 #endif
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 9649ff0c63f8..bd7e98752222 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -142,7 +142,10 @@ static inline int dequeue_hwpoisoned_huge_page(struct page *page)
         return 0;
 }
 
-#define isolate_huge_page(p, l) false
+static inline bool isolate_huge_page(struct page *page, struct list_head *list)
+{
+        return false;
+}
 #define putback_active_hugepage(p)      do {} while (0)
 #define is_hugepage_active(x)   false
 
diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h
index 5d89d1b808a6..c56c350324e4 100644
--- a/include/linux/ipv6.h
+++ b/include/linux/ipv6.h
@@ -4,6 +4,7 @@
 #include <uapi/linux/ipv6.h>
 
 #define ipv6_optlen(p)  (((p)->hdrlen+1) << 3)
+#define ipv6_authlen(p) (((p)->hdrlen+2) << 2)
 /*
  * This structure contains configuration options per IPv6 link.
  */
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index d4e98d13eff4..ecb87544cc5d 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -193,7 +193,8 @@ extern int _cond_resched(void);
                 (__x < 0) ? -__x : __x;         \
         })
 
-#if defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP)
+#if defined(CONFIG_MMU) && \
+        (defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP))
 void might_fault(void);
 #else
 static inline void might_fault(void) { }
diff --git a/include/linux/kexec.h b/include/linux/kexec.h
index d78d28a733b1..5fd33dc1fe3a 100644
--- a/include/linux/kexec.h
+++ b/include/linux/kexec.h
@@ -198,6 +198,9 @@ extern u32 vmcoreinfo_note[VMCOREINFO_NOTE_SIZE/4];
 extern size_t vmcoreinfo_size;
 extern size_t vmcoreinfo_max_size;
 
+/* flag to track if kexec reboot is in progress */
+extern bool kexec_in_progress;
+
 int __init parse_crashkernel(char *cmdline, unsigned long long system_ram,
                 unsigned long long *crash_size, unsigned long long *crash_base);
 int parse_crashkernel_high(char *cmdline, unsigned long long system_ram,
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 2d0c9071bcfb..cab2dd279076 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -39,7 +39,8 @@ enum sec_device_type {
 struct sec_pmic_dev {
         struct device *dev;
         struct sec_platform_data *pdata;
-        struct regmap *regmap;
+        struct regmap *regmap_pmic;
+        struct regmap *regmap_rtc;
         struct i2c_client *i2c;
         struct i2c_client *rtc;
 
diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h
index ad05ce60c1c9..2e5b194b9b19 100644
--- a/include/linux/micrel_phy.h
+++ b/include/linux/micrel_phy.h
@@ -22,6 +22,8 @@
 #define PHY_ID_KSZ8021          0x00221555
 #define PHY_ID_KSZ8031          0x00221556
 #define PHY_ID_KSZ8041          0x00221510
+/* undocumented */
+#define PHY_ID_KSZ8041RNLI      0x00221537
 #define PHY_ID_KSZ8051          0x00221550
 /* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */
 #define PHY_ID_KSZ8001          0x0022161A
diff --git a/include/linux/net.h b/include/linux/net.h
index 4bcee94cef93..69be3e6079c8 100644
--- a/include/linux/net.h
+++ b/include/linux/net.h
@@ -181,7 +181,7 @@ struct proto_ops {
                                       int offset, size_t size, int flags);
         ssize_t         (*splice_read)(struct socket *sock,  loff_t *ppos,
                                        struct pipe_inode_info *pipe, size_t len, unsigned int flags);
-        void            (*set_peek_off)(struct sock *sk, int val);
+        int             (*set_peek_off)(struct sock *sk, int val);
 };
 
 #define DECLARE_SOCKADDR(type, dst, src)        \
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 7f0ed423a360..d9a550bf3e8e 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1255,7 +1255,7 @@ struct net_device {
         unsigned char           perm_addr[MAX_ADDR_LEN]; /* permanent hw address */
         unsigned char           addr_assign_type; /* hw address assignment type */
         unsigned char           addr_len;       /* hardware address length      */
-        unsigned char           neigh_priv_len;
+        unsigned short          neigh_priv_len;
         unsigned short          dev_id;         /* Used to differentiate devices
                                                  * that share the same link
                                                  * layer address
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 1084a15175e0..a13d6825e586 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -960,6 +960,7 @@ void pci_update_resource(struct pci_dev *dev, int resno);
 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
+bool pci_device_is_present(struct pci_dev *pdev);
 
 /* ROM control related routines */
 int pci_enable_rom(struct pci_dev *pdev);
@@ -1567,65 +1568,65 @@ enum pci_fixup_pass {
 /* Anonymous variables would be nice... */
 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \
                                   class_shift, hook)                    \
-        static const struct pci_fixup __pci_fixup_##name __used         \
+        static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used       \
         __attribute__((__section__(#section), aligned((sizeof(void *)))))    \
                 = { vendor, device, class, class_shift, hook };
 
 #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class,            \
                                          class_shift, hook)             \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,                     \
-                vendor##device##hook, vendor, device, class, class_shift, hook)
+                hook, vendor, device, class, class_shift, hook)
 #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class,           \
                                          class_shift, hook)             \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,                    \
-                vendor##device##hook, vendor, device, class, class_shift, hook)
+                hook, vendor, device, class, class_shift, hook)
 #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class,            \
                                          class_shift, hook)             \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,                     \
-                vendor##device##hook, vendor, device, class, class_shift, hook)
+                hook, vendor, device, class, class_shift, hook)
 #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class,           \
                                          class_shift, hook)             \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,                    \
-                vendor##device##hook, vendor, device, class, class_shift, hook)
+                hook, vendor, device, class, class_shift, hook)
 #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class,           \
                                          class_shift, hook)             \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume,                    \
-                resume##vendor##device##hook, vendor, device, class,    \
+                resume##hook, vendor, device, class,    \
                 class_shift, hook)
 #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class,     \
                                          class_shift, hook)             \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early,              \
-                resume_early##vendor##device##hook, vendor, device,     \
+                resume_early##hook, vendor, device,     \
                 class, class_shift, hook)
 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class,          \
                                          class_shift, hook)             \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend,                   \
-                suspend##vendor##device##hook, vendor, device, class,   \
+                suspend##hook, vendor, device, class,   \
                 class_shift, hook)
 
 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook)                   \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,                     \
-                vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
+                hook, vendor, device, PCI_ANY_ID, 0, hook)
 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook)                  \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,                    \
-                vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
+                hook, vendor, device, PCI_ANY_ID, 0, hook)
 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook)                   \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,                     \
-                vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
+                hook, vendor, device, PCI_ANY_ID, 0, hook)
 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook)                  \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,                    \
-                vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
+                hook, vendor, device, PCI_ANY_ID, 0, hook)
 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook)                  \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume,                    \
-                resume##vendor##device##hook, vendor, device,           \
+                resume##hook, vendor, device,           \
                 PCI_ANY_ID, 0, hook)
 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook)            \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early,              \
-                resume_early##vendor##device##hook, vendor, device,     \
+                resume_early##hook, vendor, device,     \
                 PCI_ANY_ID, 0, hook)
 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook)                 \
         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend,                   \
-                suspend##vendor##device##hook, vendor, device,          \
+                suspend##hook, vendor, device,          \
                 PCI_ANY_ID, 0, hook)
 
 #ifdef CONFIG_PCI_QUIRKS
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index 50fe651da965..af414e1895a5 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -11,11 +11,11 @@
 #define SCIx_NOT_SUPPORTED      (-1)
 
 enum {
-        SCBRR_ALGO_1,           /* ((clk + 16 * bps) / (16 * bps) - 1) */
-        SCBRR_ALGO_2,           /* ((clk + 16 * bps) / (32 * bps) - 1) */
-        SCBRR_ALGO_3,           /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
-        SCBRR_ALGO_4,           /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
-        SCBRR_ALGO_5,           /* (((clk * 1000 / 32) / bps) - 1) */
+        SCBRR_ALGO_NONE,        /* Compute sampling rate in the driver */
+        SCBRR_ALGO_1,           /* clk / (16 * bps) */
+        SCBRR_ALGO_2,           /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
+        SCBRR_ALGO_3,           /* clk / (8 * bps) */
+        SCBRR_ALGO_4,           /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */
         SCBRR_ALGO_6,           /* HSCIF variable sample rate algorithm */
 };
 
@@ -70,17 +70,6 @@ enum {
         SCIx_MUX_IRQ = SCIx_NR_IRQS,    /* special case */
 };
 
-/* Offsets into the sci_port->gpios array */
-enum {
-        SCIx_SCK,
-        SCIx_RXD,
-        SCIx_TXD,
-        SCIx_CTS,
-        SCIx_RTS,
-
-        SCIx_NR_FNS,
-};
-
 enum {
         SCIx_PROBE_REGTYPE,
 
@@ -108,10 +97,10 @@ enum {
 }
 
 #define SCIx_IRQ_IS_MUXED(port)                 \
-        ((port)->cfg->irqs[SCIx_ERI_IRQ] ==     \
-         (port)->cfg->irqs[SCIx_RXI_IRQ]) ||    \
-        ((port)->cfg->irqs[SCIx_ERI_IRQ] &&     \
-         !(port)->cfg->irqs[SCIx_RXI_IRQ])
+        ((port)->irqs[SCIx_ERI_IRQ] ==  \
+         (port)->irqs[SCIx_RXI_IRQ]) || \
+        ((port)->irqs[SCIx_ERI_IRQ] &&  \
+         ((port)->irqs[SCIx_RXI_IRQ] < 0))
 /*
  * SCI register subset common for all port types.
  * Not all registers will exist on all parts.
@@ -142,20 +131,17 @@ struct plat_sci_port_ops {
 struct plat_sci_port {
         unsigned long   mapbase;                /* resource base */
         unsigned int    irqs[SCIx_NR_IRQS];     /* ERI, RXI, TXI, BRI */
-        unsigned int    gpios[SCIx_NR_FNS];     /* SCK, RXD, TXD, CTS, RTS */
         unsigned int    type;                   /* SCI / SCIF / IRDA / HSCIF */
         upf_t           flags;                  /* UPF_* flags */
         unsigned long   capabilities;           /* Port features/capabilities */
 
+        unsigned int    sampling_rate;
         unsigned int    scbrr_algo_id;          /* SCBRR calculation algo */
         unsigned int    scscr;                  /* SCSCR initialization */
 
         /*
          * Platform overrides if necessary, defaults otherwise.
          */
-        int             overrun_bit;
-        unsigned int    error_mask;
-
         int             port_reg;
         unsigned char   regshift;
         unsigned char   regtype;
diff --git a/include/linux/shmem_fs.h b/include/linux/shmem_fs.h
index 30aa0dc60d75..9d55438bc4ad 100644
--- a/include/linux/shmem_fs.h
+++ b/include/linux/shmem_fs.h
@@ -47,6 +47,8 @@ extern int shmem_init(void);
 extern int shmem_fill_super(struct super_block *sb, void *data, int silent);
 extern struct file *shmem_file_setup(const char *name,
                                         loff_t size, unsigned long flags);
+extern struct file *shmem_kernel_file_setup(const char *name, loff_t size,
+                                            unsigned long flags);
 extern int shmem_zero_setup(struct vm_area_struct *);
 extern int shmem_lock(struct file *file, int lock, struct user_struct *user);
 extern void shmem_unlock_mapping(struct address_space *mapping);
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index bec1cc7d5e3c..215b5ea1cb30 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -2263,6 +2263,24 @@ static inline void skb_postpull_rcsum(struct sk_buff *skb,
 
 unsigned char *skb_pull_rcsum(struct sk_buff *skb, unsigned int len);
 
+/**
+ *      pskb_trim_rcsum - trim received skb and update checksum
+ *      @skb: buffer to trim
+ *      @len: new length
+ *
+ *      This is exactly the same as pskb_trim except that it ensures the
+ *      checksum of received packets are still valid after the operation.
+ */
+
+static inline int pskb_trim_rcsum(struct sk_buff *skb, unsigned int len)
+{
+        if (likely(len >= skb->len))
+                return 0;
+        if (skb->ip_summed == CHECKSUM_COMPLETE)
+                skb->ip_summed = CHECKSUM_NONE;
+        return __pskb_trim(skb, len);
+}
+
 #define skb_queue_walk(queue, skb) \
                 for (skb = (queue)->next;                                       \
                      skb != (struct sk_buff *)(queue);                          \
@@ -2360,27 +2378,6 @@ __wsum __skb_checksum(const struct sk_buff *skb, int offset, int len,
 __wsum skb_checksum(const struct sk_buff *skb, int offset, int len,
                     __wsum csum);
 
-/**
- *      pskb_trim_rcsum - trim received skb and update checksum
- *      @skb: buffer to trim
- *      @len: new length
- *
- *      This is exactly the same as pskb_trim except that it ensures the
- *      checksum of received packets are still valid after the operation.
- */
-
-static inline int pskb_trim_rcsum(struct sk_buff *skb, unsigned int len)
-{
-        if (likely(len >= skb->len))
-                return 0;
-        if (skb->ip_summed == CHECKSUM_COMPLETE) {
-                __wsum adj = skb_checksum(skb, len, skb->len - len, 0);
-
-                skb->csum = csum_sub(skb->csum, adj);
-        }
-        return __pskb_trim(skb, len);
-}
-
 static inline void *skb_header_pointer(const struct sk_buff *skb, int offset,
                                        int len, void *buffer)
 {
diff --git a/include/linux/tegra-powergate.h b/include/linux/tegra-powergate.h
index fd4498329c7c..e6f2ab3014a7 100644
--- a/include/linux/tegra-powergate.h
+++ b/include/linux/tegra-powergate.h
@@ -19,6 +19,7 @@
 #define _MACH_TEGRA_POWERGATE_H_
 
 struct clk;
+struct reset_control;
 
 #define TEGRA_POWERGATE_CPU     0
 #define TEGRA_POWERGATE_3D      1
@@ -37,14 +38,49 @@ struct clk;
 #define TEGRA_POWERGATE_CPU0    14
 #define TEGRA_POWERGATE_C0NC    15
 #define TEGRA_POWERGATE_C1NC    16
+#define TEGRA_POWERGATE_SOR     17
 #define TEGRA_POWERGATE_DIS     18
 #define TEGRA_POWERGATE_DISB    19
 #define TEGRA_POWERGATE_XUSBA   20
 #define TEGRA_POWERGATE_XUSBB   21
 #define TEGRA_POWERGATE_XUSBC   22
+#define TEGRA_POWERGATE_VIC     23
+#define TEGRA_POWERGATE_IRAM    24
 
 #define TEGRA_POWERGATE_3D0     TEGRA_POWERGATE_3D
 
+#define TEGRA_IO_RAIL_CSIA      0
+#define TEGRA_IO_RAIL_CSIB      1
+#define TEGRA_IO_RAIL_DSI       2
+#define TEGRA_IO_RAIL_MIPI_BIAS 3
+#define TEGRA_IO_RAIL_PEX_BIAS  4
+#define TEGRA_IO_RAIL_PEX_CLK1  5
+#define TEGRA_IO_RAIL_PEX_CLK2  6
+#define TEGRA_IO_RAIL_USB0      9
+#define TEGRA_IO_RAIL_USB1      10
+#define TEGRA_IO_RAIL_USB2      11
+#define TEGRA_IO_RAIL_USB_BIAS  12
+#define TEGRA_IO_RAIL_NAND      13
+#define TEGRA_IO_RAIL_UART      14
+#define TEGRA_IO_RAIL_BB        15
+#define TEGRA_IO_RAIL_AUDIO     17
+#define TEGRA_IO_RAIL_HSIC      19
+#define TEGRA_IO_RAIL_COMP      22
+#define TEGRA_IO_RAIL_HDMI      28
+#define TEGRA_IO_RAIL_PEX_CNTRL 32
+#define TEGRA_IO_RAIL_SDMMC1    33
+#define TEGRA_IO_RAIL_SDMMC3    34
+#define TEGRA_IO_RAIL_SDMMC4    35
+#define TEGRA_IO_RAIL_CAM       36
+#define TEGRA_IO_RAIL_RES       37
+#define TEGRA_IO_RAIL_HV        38
+#define TEGRA_IO_RAIL_DSIB      39
+#define TEGRA_IO_RAIL_DSIC      40
+#define TEGRA_IO_RAIL_DSID      41
+#define TEGRA_IO_RAIL_CSIE      44
+#define TEGRA_IO_RAIL_LVDS      57
+#define TEGRA_IO_RAIL_SYS_DDC   58
+
 #ifdef CONFIG_ARCH_TEGRA
 int tegra_powergate_is_powered(int id);
 int tegra_powergate_power_on(int id);
@@ -52,7 +88,11 @@ int tegra_powergate_power_off(int id);
 int tegra_powergate_remove_clamping(int id);
 
 /* Must be called with clk disabled, and returns with clk enabled */
-int tegra_powergate_sequence_power_up(int id, struct clk *clk);
+int tegra_powergate_sequence_power_up(int id, struct clk *clk,
+                                      struct reset_control *rst);
+
+int tegra_io_rail_power_on(int id);
+int tegra_io_rail_power_off(int id);
 #else
 static inline int tegra_powergate_is_powered(int id)
 {
@@ -74,7 +114,18 @@ static inline int tegra_powergate_remove_clamping(int id)
         return -ENOSYS;
 }
 
-static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk)
+static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk,
+                                                    struct reset_control *rst);
+{
+        return -ENOSYS;
+}
+
+static inline int tegra_io_rail_power_on(int id)
+{
+        return -ENOSYS;
+}
+
+static inline int tegra_io_rail_power_off(int id)
 {
         return -ENOSYS;
 }
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 7454865ad148..512ab162832c 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -1264,6 +1264,8 @@ typedef void (*usb_complete_t)(struct urb *);
  * @sg: scatter gather buffer list, the buffer size of each element in
  *      the list (except the last) must be divisible by the endpoint's
  *      max packet size if no_sg_constraint isn't set in 'struct usb_bus'
+ *      (FIXME: scatter-gather under xHCI is broken for periodic transfers.
+ *      Do not use urb->sg for interrupt endpoints for now, only bulk.)
  * @num_mapped_sgs: (internal) number of mapped sg entries
  * @num_sgs: number of entries in the sg list
  * @transfer_buffer_length: How big is transfer_buffer.  The transfer may
diff --git a/include/linux/usb/wusb.h b/include/linux/usb/wusb.h
index 0c4d4ca370ec..eeb28329fa3c 100644
--- a/include/linux/usb/wusb.h
+++ b/include/linux/usb/wusb.h
@@ -271,6 +271,8 @@ static inline u8 wusb_key_index(int index, int type, int originator)
 #define WUSB_KEY_INDEX_TYPE_GTK                 2
 #define WUSB_KEY_INDEX_ORIGINATOR_HOST          0
 #define WUSB_KEY_INDEX_ORIGINATOR_DEVICE        1
+/* bits 0-3 used for the key index. */
+#define WUSB_KEY_INDEX_MAX                      15
 
 /* A CCM Nonce, defined in WUSB1.0[6.4.1] */
 struct aes_ccm_nonce {
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h
index bd8218b15009..941055e9d125 100644
--- a/include/media/videobuf2-core.h
+++ b/include/media/videobuf2-core.h
@@ -83,7 +83,7 @@ struct vb2_fileio_data;
 struct vb2_mem_ops {
         void            *(*alloc)(void *alloc_ctx, unsigned long size, gfp_t gfp_flags);
         void            (*put)(void *buf_priv);
-        struct dma_buf *(*get_dmabuf)(void *buf_priv);
+        struct dma_buf *(*get_dmabuf)(void *buf_priv, unsigned long flags);
 
         void            *(*get_userptr)(void *alloc_ctx, unsigned long vaddr,
                                         unsigned long size, int write);
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index eb198acaac1d..488316e339a1 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -110,7 +110,8 @@ struct frag_hdr {
         __be32  identification;
 };
 
-#define IP6_MF  0x0001
+#define IP6_MF          0x0001
+#define IP6_OFFSET      0xFFF8
 
 #include <net/sock.h>
 
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index ea0ca5f6e629..67b5d0068273 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -1726,12 +1726,6 @@ struct sctp_association {
         /* How many duplicated TSNs have we seen?  */
         int numduptsns;
 
-        /* Number of seconds of idle time before an association is closed.
-         * In the association context, this is really used as a boolean
-         * since the real timeout is stored in the timeouts array
-         */
-        __u32 autoclose;
-
         /* These are to support
          * "SCTP Extensions for Dynamic Reconfiguration of IP Addresses
          *  and Enforcement of Flow and Message Limits"
diff --git a/include/net/sock.h b/include/net/sock.h
index e3a18ff0c38b..2ef3c3eca47a 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -1035,7 +1035,6 @@ enum cg_proto_flags {
 };
 
 struct cg_proto {
-        void                    (*enter_memory_pressure)(struct sock *sk);
         struct res_counter      memory_allocated;       /* Current allocated memory. */
         struct percpu_counter   sockets_allocated;      /* Current number of sockets. */
         int                     memory_pressure;
@@ -1155,8 +1154,7 @@ static inline void sk_leave_memory_pressure(struct sock *sk)
                 struct proto *prot = sk->sk_prot;
 
                 for (; cg_proto; cg_proto = parent_cg_proto(prot, cg_proto))
-                        if (cg_proto->memory_pressure)
-                                cg_proto->memory_pressure = 0;
+                        cg_proto->memory_pressure = 0;
         }
 
 }
@@ -1171,7 +1169,7 @@ static inline void sk_enter_memory_pressure(struct sock *sk)
                 struct proto *prot = sk->sk_prot;
 
                 for (; cg_proto; cg_proto = parent_cg_proto(prot, cg_proto))
-                        cg_proto->enter_memory_pressure(sk);
+                        cg_proto->memory_pressure = 1;
         }
 
         sk->sk_prot->enter_memory_pressure(sk);
diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h
index 15017311f2e9..eb73a3a39ec2 100644
--- a/include/sound/dmaengine_pcm.h
+++ b/include/sound/dmaengine_pcm.h
@@ -114,6 +114,10 @@ void snd_dmaengine_pcm_set_config_from_dai_data(
  * @compat_filter_fn: Will be used as the filter function when requesting a
  *  channel for platforms which do not use devicetree. The filter parameter
  *  will be the DAI's DMA data.
+ * @dma_dev: If set, request DMA channel on this device rather than the DAI
+ *  device.
+ * @chan_names: If set, these custom DMA channel names will be requested at
+ *  registration time.
  * @pcm_hardware: snd_pcm_hardware struct to be used for the PCM.
  * @prealloc_buffer_size: Size of the preallocated audio buffer.
  *
@@ -130,6 +134,8 @@ struct snd_dmaengine_pcm_config {
                         struct snd_soc_pcm_runtime *rtd,
                         struct snd_pcm_substream *substream);
         dma_filter_fn compat_filter_fn;
+        struct device *dma_dev;
+        const char *chan_names[SNDRV_PCM_STREAM_LAST + 1];
 
         const struct snd_pcm_hardware *pcm_hardware;
         unsigned int prealloc_buffer_size;
@@ -140,6 +146,10 @@ int snd_dmaengine_pcm_register(struct device *dev,
         unsigned int flags);
 void snd_dmaengine_pcm_unregister(struct device *dev);
 
+int devm_snd_dmaengine_pcm_register(struct device *dev,
+        const struct snd_dmaengine_pcm_config *config,
+        unsigned int flags);
+
 int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
         struct snd_pcm_hw_params *params,
         struct dma_slave_config *slave_config);
diff --git a/include/sound/memalloc.h b/include/sound/memalloc.h
index af9983970417..5f73785f5977 100644
--- a/include/sound/memalloc.h
+++ b/include/sound/memalloc.h
@@ -108,7 +108,7 @@ static inline dma_addr_t snd_sgbuf_get_addr(struct snd_dma_buffer *dmab,
 {
         struct snd_sg_buf *sgbuf = dmab->private_data;
         dma_addr_t addr = sgbuf->table[offset >> PAGE_SHIFT].addr;
-        addr &= PAGE_MASK;
+        addr &= ~((dma_addr_t)PAGE_SIZE - 1);
         return addr + offset % PAGE_SIZE;
 }
 
diff --git a/include/uapi/linux/input.h b/include/uapi/linux/input.h
index a3726275876d..ecc88592ecbe 100644
--- a/include/uapi/linux/input.h
+++ b/include/uapi/linux/input.h
@@ -719,6 +719,8 @@ struct input_keymap_entry {
 #define BTN_DPAD_LEFT           0x222
 #define BTN_DPAD_RIGHT          0x223
 
+#define KEY_ALS_TOGGLE          0x230   /* Ambient light sensor */
+
 #define BTN_TRIGGER_HAPPY               0x2c0
 #define BTN_TRIGGER_HAPPY1              0x2c0
 #define BTN_TRIGGER_HAPPY2              0x2c1
@@ -856,6 +858,7 @@ struct input_keymap_entry {
 #define SW_FRONT_PROXIMITY      0x0b  /* set = front proximity sensor active */
 #define SW_ROTATE_LOCK          0x0c  /* set = rotate locked/disabled */
 #define SW_LINEIN_INSERT        0x0d  /* set = inserted */
+#define SW_MUTE_DEVICE          0x0e  /* set = device disabled */
 #define SW_MAX                  0x0f
 #define SW_CNT                  (SW_MAX+1)
 
diff --git a/include/uapi/linux/mic_common.h b/include/uapi/linux/mic_common.h
index 17e7d95e4f53..6eb40244e019 100644
--- a/include/uapi/linux/mic_common.h
+++ b/include/uapi/linux/mic_common.h
@@ -23,12 +23,7 @@
 
 #include <linux/virtio_ring.h>
 
-#ifndef __KERNEL__
-#define ALIGN(a, x)     (((a) + (x) - 1) & ~((x) - 1))
-#define __aligned(x)    __attribute__ ((aligned(x)))
-#endif
-
-#define mic_aligned_size(x) ALIGN(sizeof(x), 8)
+#define __mic_align(a, x) (((a) + (x) - 1) & ~((x) - 1))
 
 /**
  * struct mic_device_desc: Virtio device information shared between the
@@ -48,8 +43,8 @@ struct mic_device_desc {
         __u8 feature_len;
         __u8 config_len;
         __u8 status;
-        __u64 config[0];
-} __aligned(8);
+        __le64 config[0];
+} __attribute__ ((aligned(8)));
 
 /**
  * struct mic_device_ctrl: Per virtio device information in the device page
@@ -66,7 +61,7 @@ struct mic_device_desc {
  * @h2c_vdev_db: The doorbell number to be used by host. Set by guest.
  */
 struct mic_device_ctrl {
-        __u64 vdev;
+        __le64 vdev;
         __u8 config_change;
         __u8 vdev_reset;
         __u8 guest_ack;
@@ -74,7 +69,7 @@ struct mic_device_ctrl {
         __u8 used_address_updated;
         __s8 c2h_vdev_db;
         __s8 h2c_vdev_db;
-} __aligned(8);
+} __attribute__ ((aligned(8)));
 
 /**
  * struct mic_bootparam: Virtio device independent information in device page
@@ -87,13 +82,13 @@ struct mic_device_ctrl {
  * @shutdown_card: Set to 1 by the host when a card shutdown is initiated
  */
 struct mic_bootparam {
-        __u32 magic;
+        __le32 magic;
         __s8 c2h_shutdown_db;
         __s8 h2c_shutdown_db;
         __s8 h2c_config_db;
         __u8 shutdown_status;
         __u8 shutdown_card;
-} __aligned(8);
+} __attribute__ ((aligned(8)));
 
 /**
  * struct mic_device_page: High level representation of the device page
@@ -116,10 +111,10 @@ struct mic_device_page {
  * @num: The number of entries in the virtio_ring
  */
 struct mic_vqconfig {
-        __u64 address;
-        __u64 used_address;
-        __u16 num;
-} __aligned(8);
+        __le64 address;
+        __le64 used_address;
+        __le16 num;
+} __attribute__ ((aligned(8)));
 
 /*
  * The alignment to use between consumer and producer parts of vring.
@@ -154,7 +149,7 @@ struct mic_vqconfig {
  */
 struct _mic_vring_info {
         __u16 avail_idx;
-        int magic;
+        __le32 magic;
 };
 
 /**
@@ -173,15 +168,13 @@ struct mic_vring {
         int len;
 };
 
-#define mic_aligned_desc_size(d) ALIGN(mic_desc_size(d), 8)
+#define mic_aligned_desc_size(d) __mic_align(mic_desc_size(d), 8)
 
 #ifndef INTEL_MIC_CARD
 static inline unsigned mic_desc_size(const struct mic_device_desc *desc)
 {
-        return mic_aligned_size(*desc)
-                + desc->num_vq * mic_aligned_size(struct mic_vqconfig)
-                + desc->feature_len * 2
-                + desc->config_len;
+        return sizeof(*desc) + desc->num_vq * sizeof(struct mic_vqconfig)
+                + desc->feature_len * 2 + desc->config_len;
 }
 
 static inline struct mic_vqconfig *
@@ -201,8 +194,7 @@ static inline __u8 *mic_vq_configspace(const struct mic_device_desc *desc)
 }
 static inline unsigned mic_total_desc_size(struct mic_device_desc *desc)
 {
-        return mic_aligned_desc_size(desc) +
-                mic_aligned_size(struct mic_device_ctrl);
+        return mic_aligned_desc_size(desc) + sizeof(struct mic_device_ctrl);
 }
 #endif
 
diff --git a/include/uapi/sound/compress_offload.h b/include/uapi/sound/compress_offload.h
index d630163b9a2e..5759810e1c1b 100644
--- a/include/uapi/sound/compress_offload.h
+++ b/include/uapi/sound/compress_offload.h
@@ -30,7 +30,7 @@
 #include <sound/compress_params.h>
 
 
-#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 1)
+#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 2)
 /**
  * struct snd_compressed_buffer: compressed buffer
  * @fragment_size: size of buffer fragment in bytes
@@ -67,8 +67,8 @@ struct snd_compr_params {
 struct snd_compr_tstamp {
         __u32 byte_offset;
         __u32 copied_total;
-        snd_pcm_uframes_t pcm_frames;
-        snd_pcm_uframes_t pcm_io_frames;
+        __u32 pcm_frames;
+        __u32 pcm_io_frames;
         __u32 sampling_rate;
 };
 
diff --git a/kernel/.gitignore b/kernel/.gitignore
index b3097bde4e9c..790d83c7d160 100644
--- a/kernel/.gitignore
+++ b/kernel/.gitignore
@@ -5,3 +5,4 @@ config_data.h
 config_data.gz
 timeconst.h
 hz.bc
+x509_certificate_list
diff --git a/kernel/futex.c b/kernel/futex.c
index 80ba086f021d..f6ff0191ecf7 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -251,6 +251,9 @@ get_futex_key(u32 __user *uaddr, int fshared, union futex_key *key, int rw)
                 return -EINVAL;
         address -= key->both.offset;
 
+        if (unlikely(!access_ok(rw, uaddr, sizeof(u32))))
+                return -EFAULT;
+
         /*
          * PROCESS_PRIVATE futexes are fast.
          * As the mm cannot disappear under us and the 'key' only needs
@@ -259,8 +262,6 @@ get_futex_key(u32 __user *uaddr, int fshared, union futex_key *key, int rw)
          *        but access_ok() should be faster than find_vma()
          */
         if (!fshared) {
-                if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))))
-                        return -EFAULT;
                 key->private.mm = mm;
                 key->private.address = address;
                 get_futex_key_refs(key);
@@ -288,7 +289,7 @@ again:
                 put_page(page);
                 /* serialize against __split_huge_page_splitting() */
                 local_irq_disable();
-                if (likely(__get_user_pages_fast(address, 1, 1, &page) == 1)) {
+                if (likely(__get_user_pages_fast(address, 1, !ro, &page) == 1)) {
                         page_head = compound_head(page);
                         /*
                          * page_head is valid pointer but we must pin
diff --git a/kernel/kexec.c b/kernel/kexec.c
index 490afc03627e..d0d8fca54065 100644
--- a/kernel/kexec.c
+++ b/kernel/kexec.c
@@ -47,6 +47,9 @@ u32 vmcoreinfo_note[VMCOREINFO_NOTE_SIZE/4];
 size_t vmcoreinfo_size;
 size_t vmcoreinfo_max_size = sizeof(vmcoreinfo_data);
 
+/* Flag to indicate we are going to kexec a new kernel */
+bool kexec_in_progress = false;
+
 /* Location of the reserved area for the crash kernel */
 struct resource crashk_res = {
         .name  = "Crash kernel",
@@ -1675,6 +1678,7 @@ int kernel_kexec(void)
         } else
 #endif
         {
+                kexec_in_progress = true;
                 kernel_restart_prepare(NULL);
                 printk(KERN_EMERG "Starting new kernel\n");
                 machine_shutdown();
diff --git a/kernel/system_certificates.S b/kernel/system_certificates.S
index 4aef390671cb..3e9868d47535 100644
--- a/kernel/system_certificates.S
+++ b/kernel/system_certificates.S
@@ -3,8 +3,18 @@
 
         __INITRODATA
 
+        .align 8
         .globl VMLINUX_SYMBOL(system_certificate_list)
 VMLINUX_SYMBOL(system_certificate_list):
+__cert_list_start:
         .incbin "kernel/x509_certificate_list"
-        .globl VMLINUX_SYMBOL(system_certificate_list_end)
-VMLINUX_SYMBOL(system_certificate_list_end):
+__cert_list_end:
+
+        .align 8
+        .globl VMLINUX_SYMBOL(system_certificate_list_size)
+VMLINUX_SYMBOL(system_certificate_list_size):
+#ifdef CONFIG_64BIT
+        .quad __cert_list_end - __cert_list_start
+#else
+        .long __cert_list_end - __cert_list_start
+#endif
diff --git a/kernel/system_keyring.c b/kernel/system_keyring.c
index 564dd93430a2..52ebc70263f4 100644
--- a/kernel/system_keyring.c
+++ b/kernel/system_keyring.c
@@ -22,7 +22,7 @@ struct key *system_trusted_keyring;
 EXPORT_SYMBOL_GPL(system_trusted_keyring);
 
 extern __initconst const u8 system_certificate_list[];
-extern __initconst const u8 system_certificate_list_end[];
+extern __initconst const unsigned long system_certificate_list_size;
 
 /*
  * Load the compiled-in keys
@@ -60,8 +60,8 @@ static __init int load_system_certificate_list(void)
 
         pr_notice("Loading compiled-in X.509 certificates\n");
 
-        end = system_certificate_list_end;
         p = system_certificate_list;
+        end = p + system_certificate_list_size;
         while (p < end) {
                 /* Each cert begins with an ASN.1 SEQUENCE tag and must be more
                  * than 256 bytes in size.
diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index c66912be990f..b010eac595d2 100644
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -2851,19 +2851,6 @@ already_gone:
         return false;
 }
 
-static bool __flush_work(struct work_struct *work)
-{
-        struct wq_barrier barr;
-
-        if (start_flush_work(work, &barr)) {
-                wait_for_completion(&barr.done);
-                destroy_work_on_stack(&barr.work);
-                return true;
-        } else {
-                return false;
-        }
-}
-
 /**
  * flush_work - wait for a work to finish executing the last queueing instance
  * @work: the work to flush
@@ -2877,10 +2864,18 @@ static bool __flush_work(struct work_struct *work)
  */
 bool flush_work(struct work_struct *work)
 {
+        struct wq_barrier barr;
+
         lock_map_acquire(&work->lockdep_map);
         lock_map_release(&work->lockdep_map);
 
-        return __flush_work(work);
+        if (start_flush_work(work, &barr)) {
+                wait_for_completion(&barr.done);
+                destroy_work_on_stack(&barr.work);
+                return true;
+        } else {
+                return false;
+        }
 }
 EXPORT_SYMBOL_GPL(flush_work);
 
@@ -4832,14 +4827,7 @@ long work_on_cpu(int cpu, long (*fn)(void *), void *arg)
 
         INIT_WORK_ONSTACK(&wfc.work, work_for_cpu_fn);
         schedule_work_on(cpu, &wfc.work);
-
-        /*
-         * The work item is on-stack and can't lead to deadlock through
-         * flushing.  Use __flush_work() to avoid spurious lockdep warnings
-         * when work_on_cpu()s are nested.
-         */
-        __flush_work(&wfc.work);
-
+        flush_work(&wfc.work);
         return wfc.ret;
 }
 EXPORT_SYMBOL_GPL(work_on_cpu);
diff --git a/lib/assoc_array.c b/lib/assoc_array.c
index 17edeaf19180..1b6a44f1ec3e 100644
--- a/lib/assoc_array.c
+++ b/lib/assoc_array.c
@@ -759,8 +759,8 @@ all_leaves_cluster_together:
         pr_devel("all leaves cluster together\n");
         diff = INT_MAX;
         for (i = 0; i < ASSOC_ARRAY_FAN_OUT; i++) {
-                int x = ops->diff_objects(assoc_array_ptr_to_leaf(edit->leaf),
-                                          assoc_array_ptr_to_leaf(node->slots[i]));
+                int x = ops->diff_objects(assoc_array_ptr_to_leaf(node->slots[i]),
+                                          index_key);
                 if (x < diff) {
                         BUG_ON(x < 0);
                         diff = x;
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index bccd5a628ea6..33a5dc492810 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1481,8 +1481,18 @@ int move_huge_pmd(struct vm_area_struct *vma, struct vm_area_struct *new_vma,
                 pmd = pmdp_get_and_clear(mm, old_addr, old_pmd);
                 VM_BUG_ON(!pmd_none(*new_pmd));
                 set_pmd_at(mm, new_addr, new_pmd, pmd_mksoft_dirty(pmd));
-                if (new_ptl != old_ptl)
+                if (new_ptl != old_ptl) {
+                        pgtable_t pgtable;
+
+                        /*
+                         * Move preallocated PTE page table if new_pmd is on
+                         * different PMD page table.
+                         */
+                        pgtable = pgtable_trans_huge_withdraw(mm, old_pmd);
+                        pgtable_trans_huge_deposit(mm, new_pmd, pgtable);
+
                         spin_unlock(new_ptl);
+                }
                 spin_unlock(old_ptl);
         }
 out:
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index f1a0ae6e11b8..bf5e89457149 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -2694,7 +2694,10 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
                 goto bypass;
 
         if (unlikely(task_in_memcg_oom(current)))
-                goto bypass;
+                goto nomem;
+
+        if (gfp_mask & __GFP_NOFAIL)
+                oom = false;
 
         /*
          * We always charge the cgroup the mm_struct belongs to.
@@ -6352,6 +6355,42 @@ static void mem_cgroup_css_offline(struct cgroup_subsys_state *css)
 static void mem_cgroup_css_free(struct cgroup_subsys_state *css)
 {
         struct mem_cgroup *memcg = mem_cgroup_from_css(css);
+        /*
+         * XXX: css_offline() would be where we should reparent all
+         * memory to prepare the cgroup for destruction.  However,
+         * memcg does not do css_tryget() and res_counter charging
+         * under the same RCU lock region, which means that charging
+         * could race with offlining.  Offlining only happens to
+         * cgroups with no tasks in them but charges can show up
+         * without any tasks from the swapin path when the target
+         * memcg is looked up from the swapout record and not from the
+         * current task as it usually is.  A race like this can leak
+         * charges and put pages with stale cgroup pointers into
+         * circulation:
+         *
+         * #0                        #1
+         *                           lookup_swap_cgroup_id()
+         *                           rcu_read_lock()
+         *                           mem_cgroup_lookup()
+         *                           css_tryget()
+         *                           rcu_read_unlock()
+         * disable css_tryget()
+         * call_rcu()
+         *   offline_css()
+         *     reparent_charges()
+         *                           res_counter_charge()
+         *                           css_put()
+         *                             css_free()
+         *                           pc->mem_cgroup = dead memcg
+         *                           add page to lru
+         *
+         * The bulk of the charges are still moved in offline_css() to
+         * avoid pinning a lot of pages in case a long-term reference
+         * like a swapout record is deferring the css_free() to long
+         * after offlining.  But this makes sure we catch any charges
+         * made after offlining:
+         */
+        mem_cgroup_reparent_charges(memcg);
 
         memcg_destroy_kmem(memcg);
         __mem_cgroup_free(memcg);
diff --git a/mm/shmem.c b/mm/shmem.c
index 8297623fcaed..902a14842b74 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -2918,13 +2918,8 @@ static struct dentry_operations anon_ops = {
         .d_dname = simple_dname
 };
 
-/**
- * shmem_file_setup - get an unlinked file living in tmpfs
- * @name: name for dentry (to be seen in /proc/<pid>/maps
- * @size: size to be set for the file
- * @flags: VM_NORESERVE suppresses pre-accounting of the entire object size
- */
-struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags)
+static struct file *__shmem_file_setup(const char *name, loff_t size,
+                                       unsigned long flags, unsigned int i_flags)
 {
         struct file *res;
         struct inode *inode;
@@ -2957,6 +2952,7 @@ struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags
         if (!inode)
                 goto put_dentry;
 
+        inode->i_flags |= i_flags;
         d_instantiate(path.dentry, inode);
         inode->i_size = size;
         clear_nlink(inode);     /* It is unlinked */
@@ -2977,6 +2973,32 @@ put_memory:
         shmem_unacct_size(flags, size);
         return res;
 }
+
+/**
+ * shmem_kernel_file_setup - get an unlinked file living in tmpfs which must be
+ *      kernel internal.  There will be NO LSM permission checks against the
+ *      underlying inode.  So users of this interface must do LSM checks at a
+ *      higher layer.  The one user is the big_key implementation.  LSM checks
+ *      are provided at the key level rather than the inode level.
+ * @name: name for dentry (to be seen in /proc/<pid>/maps
+ * @size: size to be set for the file
+ * @flags: VM_NORESERVE suppresses pre-accounting of the entire object size
+ */
+struct file *shmem_kernel_file_setup(const char *name, loff_t size, unsigned long flags)
+{
+        return __shmem_file_setup(name, size, flags, S_PRIVATE);
+}
+
+/**
+ * shmem_file_setup - get an unlinked file living in tmpfs
+ * @name: name for dentry (to be seen in /proc/<pid>/maps
+ * @size: size to be set for the file
+ * @flags: VM_NORESERVE suppresses pre-accounting of the entire object size
+ */
+struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags)
+{
+        return __shmem_file_setup(name, size, flags, 0);
+}
 EXPORT_SYMBOL_GPL(shmem_file_setup);
 
 /**
diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h
index 229d820bdf0b..045d56eaeca2 100644
--- a/net/bridge/br_private.h
+++ b/net/bridge/br_private.h
@@ -426,6 +426,16 @@ netdev_features_t br_features_recompute(struct net_bridge *br,
 int br_handle_frame_finish(struct sk_buff *skb);
 rx_handler_result_t br_handle_frame(struct sk_buff **pskb);
 
+static inline bool br_rx_handler_check_rcu(const struct net_device *dev)
+{
+        return rcu_dereference(dev->rx_handler) == br_handle_frame;
+}
+
+static inline struct net_bridge_port *br_port_get_check_rcu(const struct net_device *dev)
+{
+        return br_rx_handler_check_rcu(dev) ? br_port_get_rcu(dev) : NULL;
+}
+
 /* br_ioctl.c */
 int br_dev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 int br_ioctl_deviceless_stub(struct net *net, unsigned int cmd,
diff --git a/net/bridge/br_stp_bpdu.c b/net/bridge/br_stp_bpdu.c
index 8660ea3be705..bdb459d21ad8 100644
--- a/net/bridge/br_stp_bpdu.c
+++ b/net/bridge/br_stp_bpdu.c
@@ -153,7 +153,7 @@ void br_stp_rcv(const struct stp_proto *proto, struct sk_buff *skb,
         if (buf[0] != 0 || buf[1] != 0 || buf[2] != 0)
                 goto err;
 
-        p = br_port_get_rcu(dev);
+        p = br_port_get_check_rcu(dev);
         if (!p)
                 goto err;
 
diff --git a/net/core/drop_monitor.c b/net/core/drop_monitor.c
index 95897183226e..e70301eb7a4a 100644
--- a/net/core/drop_monitor.c
+++ b/net/core/drop_monitor.c
@@ -64,7 +64,6 @@ static struct genl_family net_drop_monitor_family = {
         .hdrsize        = 0,
         .name           = "NET_DM",
         .version        = 2,
-        .maxattr        = NET_DM_CMD_MAX,
 };
 
 static DEFINE_PER_CPU(struct per_cpu_dm_data, dm_cpu_data);
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 2718fed53d8c..06e72d3cdf60 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -3584,6 +3584,7 @@ void skb_scrub_packet(struct sk_buff *skb, bool xnet)
         skb->tstamp.tv64 = 0;
         skb->pkt_type = PACKET_HOST;
         skb->skb_iif = 0;
+        skb->local_df = 0;
         skb_dst_drop(skb);
         skb->mark = 0;
         secpath_reset(skb);
diff --git a/net/core/sock.c b/net/core/sock.c
index ab20ed9b0f31..5393b4b719d7 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -882,7 +882,7 @@ set_rcvbuf:
 
         case SO_PEEK_OFF:
                 if (sock->ops->set_peek_off)
-                        sock->ops->set_peek_off(sk, val);
+                        ret = sock->ops->set_peek_off(sk, val);
                 else
                         ret = -EOPNOTSUPP;
                 break;
diff --git a/net/dccp/ipv6.c b/net/dccp/ipv6.c
index 4ac71ff7c2e4..2b90a786e475 100644
--- a/net/dccp/ipv6.c
+++ b/net/dccp/ipv6.c
@@ -851,7 +851,6 @@ static int dccp_v6_connect(struct sock *sk, struct sockaddr *uaddr,
                         flowlabel = fl6_sock_lookup(sk, fl6.flowlabel);
                         if (flowlabel == NULL)
                                 return -EINVAL;
-                        usin->sin6_addr = flowlabel->dst;
                         fl6_sock_release(flowlabel);
                 }
         }
diff --git a/net/ipv4/fib_rules.c b/net/ipv4/fib_rules.c
index 523be38e37de..f2e15738534d 100644
--- a/net/ipv4/fib_rules.c
+++ b/net/ipv4/fib_rules.c
@@ -104,7 +104,10 @@ errout:
 static bool fib4_rule_suppress(struct fib_rule *rule, struct fib_lookup_arg *arg)
 {
         struct fib_result *result = (struct fib_result *) arg->result;
-        struct net_device *dev = result->fi->fib_dev;
+        struct net_device *dev = NULL;
+
+        if (result->fi)
+                dev = result->fi->fib_dev;
 
         /* do not accept result if the route does
          * not meet the required prefix length
diff --git a/net/ipv4/tcp_memcontrol.c b/net/ipv4/tcp_memcontrol.c
index 269a89ecd2f4..f7e522c558ba 100644
--- a/net/ipv4/tcp_memcontrol.c
+++ b/net/ipv4/tcp_memcontrol.c
@@ -6,13 +6,6 @@
 #include <linux/memcontrol.h>
 #include <linux/module.h>
 
-static void memcg_tcp_enter_memory_pressure(struct sock *sk)
-{
-        if (sk->sk_cgrp->memory_pressure)
-                sk->sk_cgrp->memory_pressure = 1;
-}
-EXPORT_SYMBOL(memcg_tcp_enter_memory_pressure);
-
 int tcp_init_cgroup(struct mem_cgroup *memcg, struct cgroup_subsys *ss)
 {
         /*
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index 44f6a20fa29d..62c19fdd102d 100644
--- a/net/ipv4/udp.c
+++ b/net/ipv4/udp.c
@@ -560,15 +560,11 @@ static inline struct sock *__udp4_lib_lookup_skb(struct sk_buff *skb,
                                                  __be16 sport, __be16 dport,
                                                  struct udp_table *udptable)
 {
-        struct sock *sk;
         const struct iphdr *iph = ip_hdr(skb);
 
-        if (unlikely(sk = skb_steal_sock(skb)))
-                return sk;
-        else
-                return __udp4_lib_lookup(dev_net(skb_dst(skb)->dev), iph->saddr, sport,
-                                         iph->daddr, dport, inet_iif(skb),
-                                         udptable);
+        return __udp4_lib_lookup(dev_net(skb_dst(skb)->dev), iph->saddr, sport,
+                                 iph->daddr, dport, inet_iif(skb),
+                                 udptable);
 }
 
 struct sock *udp4_lib_lookup(struct net *net, __be32 saddr, __be16 sport,
@@ -1603,12 +1599,21 @@ static void flush_stack(struct sock **stack, unsigned int count,
                 kfree_skb(skb1);
 }
 
-static void udp_sk_rx_dst_set(struct sock *sk, const struct sk_buff *skb)
+/* For TCP sockets, sk_rx_dst is protected by socket lock
+ * For UDP, we use sk_dst_lock to guard against concurrent changes.
+ */
+static void udp_sk_rx_dst_set(struct sock *sk, struct dst_entry *dst)
 {
-        struct dst_entry *dst = skb_dst(skb);
+        struct dst_entry *old;
 
-        dst_hold(dst);
-        sk->sk_rx_dst = dst;
+        spin_lock(&sk->sk_dst_lock);
+        old = sk->sk_rx_dst;
+        if (likely(old != dst)) {
+                dst_hold(dst);
+                sk->sk_rx_dst = dst;
+                dst_release(old);
+        }
+        spin_unlock(&sk->sk_dst_lock);
 }
 
 /*
@@ -1739,15 +1744,16 @@ int __udp4_lib_rcv(struct sk_buff *skb, struct udp_table *udptable,
         if (udp4_csum_init(skb, uh, proto))
                 goto csum_error;
 
-        if (skb->sk) {
+        sk = skb_steal_sock(skb);
+        if (sk) {
+                struct dst_entry *dst = skb_dst(skb);
                 int ret;
-                sk = skb->sk;
 
-                if (unlikely(sk->sk_rx_dst == NULL))
-                        udp_sk_rx_dst_set(sk, skb);
+                if (unlikely(sk->sk_rx_dst != dst))
+                        udp_sk_rx_dst_set(sk, dst);
 
                 ret = udp_queue_rcv_skb(sk, skb);
-
+                sock_put(sk);
                 /* a return value > 0 means to resubmit the input, but
                  * it wants the return to be -protocol, or 0
                  */
@@ -1913,17 +1919,20 @@ static struct sock *__udp4_lib_demux_lookup(struct net *net,
 
 void udp_v4_early_demux(struct sk_buff *skb)
 {
-        const struct iphdr *iph = ip_hdr(skb);
-        const struct udphdr *uh = udp_hdr(skb);
+        struct net *net = dev_net(skb->dev);
+        const struct iphdr *iph;
+        const struct udphdr *uh;
         struct sock *sk;
         struct dst_entry *dst;
-        struct net *net = dev_net(skb->dev);
         int dif = skb->dev->ifindex;
 
         /* validate the packet */
         if (!pskb_may_pull(skb, skb_transport_offset(skb) + sizeof(struct udphdr)))
                 return;
 
+        iph = ip_hdr(skb);
+        uh = udp_hdr(skb);
+
         if (skb->pkt_type == PACKET_BROADCAST ||
             skb->pkt_type == PACKET_MULTICAST)
                 sk = __udp4_lib_mcast_demux_lookup(net, uh->dest, iph->daddr,
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index 12c97d8aa6bb..d5fa5b8c443e 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -2613,7 +2613,7 @@ static void init_loopback(struct net_device *dev)
                         if (sp_ifa->rt)
                                 continue;
 
-                        sp_rt = addrconf_dst_alloc(idev, &sp_ifa->addr, 0);
+                        sp_rt = addrconf_dst_alloc(idev, &sp_ifa->addr, false);
 
                         /* Failure cases are ignored */
                         if (!IS_ERR(sp_rt)) {
diff --git a/net/ipv6/datagram.c b/net/ipv6/datagram.c
index 8dfe1f4d3c1a..93b1aa34c432 100644
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
@@ -73,7 +73,6 @@ int ip6_datagram_connect(struct sock *sk, struct sockaddr *uaddr, int addr_len)
                         flowlabel = fl6_sock_lookup(sk, fl6.flowlabel);
                         if (flowlabel == NULL)
                                 return -EINVAL;
-                        usin->sin6_addr = flowlabel->dst;
                 }
         }
 
diff --git a/net/ipv6/fib6_rules.c b/net/ipv6/fib6_rules.c
index e27591635f92..3fd0a578329e 100644
--- a/net/ipv6/fib6_rules.c
+++ b/net/ipv6/fib6_rules.c
@@ -122,7 +122,11 @@ out:
 static bool fib6_rule_suppress(struct fib_rule *rule, struct fib_lookup_arg *arg)
 {
         struct rt6_info *rt = (struct rt6_info *) arg->result;
-        struct net_device *dev = rt->rt6i_idev->dev;
+        struct net_device *dev = NULL;
+
+        if (rt->rt6i_idev)
+                dev = rt->rt6i_idev->dev;
+
         /* do not accept result if the route does
          * not meet the required prefix length
          */
diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c
index 3512177deb4d..300865171394 100644
--- a/net/ipv6/ndisc.c
+++ b/net/ipv6/ndisc.c
@@ -1277,6 +1277,9 @@ skip_linkparms:
                             ri->prefix_len == 0)
                                 continue;
 #endif
+                        if (ri->prefix_len == 0 &&
+                            !in6_dev->cnf.accept_ra_defrtr)
+                                continue;
                         if (ri->prefix_len > in6_dev->cnf.accept_ra_rt_info_max_plen)
                                 continue;
                         rt6_route_rcv(skb->dev, (u8*)p, (p->nd_opt_len) << 3,
diff --git a/net/ipv6/raw.c b/net/ipv6/raw.c
index 7fb4e14c467f..b6bb87e55805 100644
--- a/net/ipv6/raw.c
+++ b/net/ipv6/raw.c
@@ -792,7 +792,6 @@ static int rawv6_sendmsg(struct kiocb *iocb, struct sock *sk,
                                 flowlabel = fl6_sock_lookup(sk, fl6.flowlabel);
                                 if (flowlabel == NULL)
                                         return -EINVAL;
-                                daddr = &flowlabel->dst;
                         }
                 }
 
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 7faa9d5e1503..a0a48ac3403f 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -84,6 +84,8 @@ static int		 ip6_dst_gc(struct dst_ops *ops);
 
 static int              ip6_pkt_discard(struct sk_buff *skb);
 static int              ip6_pkt_discard_out(struct sk_buff *skb);
+static int              ip6_pkt_prohibit(struct sk_buff *skb);
+static int              ip6_pkt_prohibit_out(struct sk_buff *skb);
 static void             ip6_link_failure(struct sk_buff *skb);
 static void             ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
                                            struct sk_buff *skb, u32 mtu);
@@ -234,9 +236,6 @@ static const struct rt6_info ip6_null_entry_template = {
 
 #ifdef CONFIG_IPV6_MULTIPLE_TABLES
 
-static int ip6_pkt_prohibit(struct sk_buff *skb);
-static int ip6_pkt_prohibit_out(struct sk_buff *skb);
-
 static const struct rt6_info ip6_prohibit_entry_template = {
         .dst = {
                 .__refcnt       = ATOMIC_INIT(1),
@@ -1565,21 +1564,24 @@ int ip6_route_add(struct fib6_config *cfg)
                                 goto out;
                         }
                 }
-                rt->dst.output = ip6_pkt_discard_out;
-                rt->dst.input = ip6_pkt_discard;
                 rt->rt6i_flags = RTF_REJECT|RTF_NONEXTHOP;
                 switch (cfg->fc_type) {
                 case RTN_BLACKHOLE:
                         rt->dst.error = -EINVAL;
+                        rt->dst.output = dst_discard;
+                        rt->dst.input = dst_discard;
                         break;
                 case RTN_PROHIBIT:
                         rt->dst.error = -EACCES;
+                        rt->dst.output = ip6_pkt_prohibit_out;
+                        rt->dst.input = ip6_pkt_prohibit;
                         break;
                 case RTN_THROW:
-                        rt->dst.error = -EAGAIN;
-                        break;
                 default:
-                        rt->dst.error = -ENETUNREACH;
+                        rt->dst.error = (cfg->fc_type == RTN_THROW) ? -EAGAIN
+                                        : -ENETUNREACH;
+                        rt->dst.output = ip6_pkt_discard_out;
+                        rt->dst.input = ip6_pkt_discard;
                         break;
                 }
                 goto install_route;
@@ -2144,8 +2146,6 @@ static int ip6_pkt_discard_out(struct sk_buff *skb)
         return ip6_pkt_drop(skb, ICMPV6_NOROUTE, IPSTATS_MIB_OUTNOROUTES);
 }
 
-#ifdef CONFIG_IPV6_MULTIPLE_TABLES
-
 static int ip6_pkt_prohibit(struct sk_buff *skb)
 {
         return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_INNOROUTES);
@@ -2157,8 +2157,6 @@ static int ip6_pkt_prohibit_out(struct sk_buff *skb)
         return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
 }
 
-#endif
-
 /*
  *      Allocate a dst for local (unicast / anycast) address.
  */
@@ -2168,12 +2166,10 @@ struct rt6_info *addrconf_dst_alloc(struct inet6_dev *idev,
                                     bool anycast)
 {
         struct net *net = dev_net(idev->dev);
-        struct rt6_info *rt = ip6_dst_alloc(net, net->loopback_dev, 0, NULL);
-
-        if (!rt) {
-                net_warn_ratelimited("Maximum number of routes reached, consider increasing route/max_size\n");
+        struct rt6_info *rt = ip6_dst_alloc(net, net->loopback_dev,
+                                            DST_NOCOUNT, NULL);
+        if (!rt)
                 return ERR_PTR(-ENOMEM);
-        }
 
         in6_dev_hold(idev);
 
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index 0740f93a114a..f67033b4bb66 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -156,7 +156,6 @@ static int tcp_v6_connect(struct sock *sk, struct sockaddr *uaddr,
                         flowlabel = fl6_sock_lookup(sk, fl6.flowlabel);
                         if (flowlabel == NULL)
                                 return -EINVAL;
-                        usin->sin6_addr = flowlabel->dst;
                         fl6_sock_release(flowlabel);
                 }
         }
diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c
index bcd5699313c3..089c741a3992 100644
--- a/net/ipv6/udp.c
+++ b/net/ipv6/udp.c
@@ -1140,7 +1140,6 @@ do_udp_sendmsg:
                                 flowlabel = fl6_sock_lookup(sk, fl6.flowlabel);
                                 if (flowlabel == NULL)
                                         return -EINVAL;
-                                daddr = &flowlabel->dst;
                         }
                 }
 
diff --git a/net/l2tp/l2tp_ip6.c b/net/l2tp/l2tp_ip6.c
index d9b437e55007..bb6e206ea70b 100644
--- a/net/l2tp/l2tp_ip6.c
+++ b/net/l2tp/l2tp_ip6.c
@@ -528,7 +528,6 @@ static int l2tp_ip6_sendmsg(struct kiocb *iocb, struct sock *sk,
                                 flowlabel = fl6_sock_lookup(sk, fl6.flowlabel);
                                 if (flowlabel == NULL)
                                         return -EINVAL;
-                                daddr = &flowlabel->dst;
                         }
                 }
 
diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c
index 95667b088c5b..364ce0c5962f 100644
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
@@ -1368,7 +1368,7 @@ static int sta_apply_parameters(struct ieee80211_local *local,
                         changed |=
                               ieee80211_mps_set_sta_local_pm(sta,
                                                              params->local_pm);
-                ieee80211_bss_info_change_notify(sdata, changed);
+                ieee80211_mbss_info_change_notify(sdata, changed);
 #endif
         }
 
@@ -2488,8 +2488,7 @@ static int ieee80211_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev,
         struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
         struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
 
-        if (sdata->vif.type != NL80211_IFTYPE_STATION &&
-            sdata->vif.type != NL80211_IFTYPE_MESH_POINT)
+        if (sdata->vif.type != NL80211_IFTYPE_STATION)
                 return -EOPNOTSUPP;
 
         if (!(local->hw.flags & IEEE80211_HW_SUPPORTS_PS))
@@ -3120,9 +3119,17 @@ static int ieee80211_channel_switch(struct wiphy *wiphy, struct net_device *dev,
                     params->chandef.chan->band)
                         return -EINVAL;
 
+                ifmsh->chsw_init = true;
+                if (!ifmsh->pre_value)
+                        ifmsh->pre_value = 1;
+                else
+                        ifmsh->pre_value++;
+
                 err = ieee80211_mesh_csa_beacon(sdata, params, true);
-                if (err < 0)
+                if (err < 0) {
+                        ifmsh->chsw_init = false;
                         return err;
+                }
                 break;
 #endif
         default:
diff --git a/net/mac80211/ibss.c b/net/mac80211/ibss.c
index 531be040b9ae..27a39de89679 100644
--- a/net/mac80211/ibss.c
+++ b/net/mac80211/ibss.c
@@ -823,6 +823,10 @@ ieee80211_ibss_process_chanswitch(struct ieee80211_sub_if_data *sdata,
         if (err)
                 return false;
 
+        /* channel switch is not supported, disconnect */
+        if (!(sdata->local->hw.wiphy->flags & WIPHY_FLAG_HAS_CHANNEL_SWITCH))
+                goto disconnect;
+
         params.count = csa_ie.count;
         params.chandef = csa_ie.chandef;
 
diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h
index 29dc505be125..4aea4e791113 100644
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
@@ -1228,6 +1228,7 @@ struct ieee80211_csa_ie {
         u8 mode;
         u8 count;
         u8 ttl;
+        u16 pre_value;
 };
 
 /* Parsed Information Elements */
diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c
index ff101ea1d9ae..36c3a4cbcabf 100644
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
@@ -1325,7 +1325,6 @@ static void ieee80211_setup_sdata(struct ieee80211_sub_if_data *sdata,
                 sdata->vif.bss_conf.bssid = NULL;
                 break;
         case NL80211_IFTYPE_AP_VLAN:
-                break;
         case NL80211_IFTYPE_P2P_DEVICE:
                 sdata->vif.bss_conf.bssid = sdata->vif.addr;
                 break;
diff --git a/net/mac80211/main.c b/net/mac80211/main.c
index 21d5d44444d0..7d1c3ac48ed9 100644
--- a/net/mac80211/main.c
+++ b/net/mac80211/main.c
@@ -940,6 +940,8 @@ int ieee80211_register_hw(struct ieee80211_hw *hw)
                 wiphy_debug(local->hw.wiphy, "Failed to initialize wep: %d\n",
                             result);
 
+        local->hw.conf.flags = IEEE80211_CONF_IDLE;
+
         ieee80211_led_init(local);
 
         rtnl_lock();
@@ -1047,6 +1049,7 @@ void ieee80211_unregister_hw(struct ieee80211_hw *hw)
 
         cancel_work_sync(&local->restart_work);
         cancel_work_sync(&local->reconfig_filter);
+        flush_work(&local->sched_scan_stopped_work);
 
         ieee80211_clear_tx_pending(local);
         rate_control_deinitialize(local);
diff --git a/net/mac80211/mesh.c b/net/mac80211/mesh.c
index 896fe3bd599e..ba105257d03f 100644
--- a/net/mac80211/mesh.c
+++ b/net/mac80211/mesh.c
@@ -943,14 +943,19 @@ ieee80211_mesh_process_chnswitch(struct ieee80211_sub_if_data *sdata,
                  params.chandef.chan->center_freq);
 
         params.block_tx = csa_ie.mode & WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT;
-        if (beacon)
+        if (beacon) {
                 ifmsh->chsw_ttl = csa_ie.ttl - 1;
-        else
-                ifmsh->chsw_ttl = 0;
+                if (ifmsh->pre_value >= csa_ie.pre_value)
+                        return false;
+                ifmsh->pre_value = csa_ie.pre_value;
+        }
 
-        if (ifmsh->chsw_ttl > 0)
+        if (ifmsh->chsw_ttl < ifmsh->mshcfg.dot11MeshTTL) {
                 if (ieee80211_mesh_csa_beacon(sdata, &params, false) < 0)
                         return false;
+        } else {
+                return false;
+        }
 
         sdata->csa_radar_required = params.radar_required;
 
@@ -1163,7 +1168,6 @@ static int mesh_fwd_csa_frame(struct ieee80211_sub_if_data *sdata,
         offset_ttl = (len < 42) ? 7 : 10;
         *(pos + offset_ttl) -= 1;
         *(pos + offset_ttl + 1) &= ~WLAN_EID_CHAN_SWITCH_PARAM_INITIATOR;
-        sdata->u.mesh.chsw_ttl = *(pos + offset_ttl);
 
         memcpy(mgmt_fwd, mgmt, len);
         eth_broadcast_addr(mgmt_fwd->da);
@@ -1182,7 +1186,7 @@ static void mesh_rx_csa_frame(struct ieee80211_sub_if_data *sdata,
         u16 pre_value;
         bool fwd_csa = true;
         size_t baselen;
-        u8 *pos, ttl;
+        u8 *pos;
 
         if (mgmt->u.action.u.measurement.action_code !=
             WLAN_ACTION_SPCT_CHL_SWITCH)
@@ -1193,8 +1197,8 @@ static void mesh_rx_csa_frame(struct ieee80211_sub_if_data *sdata,
                            u.action.u.chan_switch.variable);
         ieee802_11_parse_elems(pos, len - baselen, false, &elems);
 
-        ttl = elems.mesh_chansw_params_ie->mesh_ttl;
-        if (!--ttl)
+        ifmsh->chsw_ttl = elems.mesh_chansw_params_ie->mesh_ttl;
+        if (!--ifmsh->chsw_ttl)
                 fwd_csa = false;
 
         pre_value = le16_to_cpu(elems.mesh_chansw_params_ie->mesh_pre_value);
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c
index d7504ab61a34..b3a3ce316656 100644
--- a/net/mac80211/mlme.c
+++ b/net/mac80211/mlme.c
@@ -1910,6 +1910,8 @@ static void ieee80211_mgd_probe_ap(struct ieee80211_sub_if_data *sdata,
         if (ifmgd->flags & IEEE80211_STA_CONNECTION_POLL)
                 already = true;
 
+        ifmgd->flags |= IEEE80211_STA_CONNECTION_POLL;
+
         mutex_unlock(&sdata->local->mtx);
 
         if (already)
diff --git a/net/mac80211/rc80211_minstrel_ht.c b/net/mac80211/rc80211_minstrel_ht.c
index 5d60779a0c1b..4096ff6cc24f 100644
--- a/net/mac80211/rc80211_minstrel_ht.c
+++ b/net/mac80211/rc80211_minstrel_ht.c
@@ -226,7 +226,7 @@ minstrel_ht_calc_tp(struct minstrel_ht_sta *mi, int group, int rate)
                 nsecs = 1000 * mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
 
         nsecs += minstrel_mcs_groups[group].duration[rate];
-        tp = 1000000 * ((mr->probability * 1000) / nsecs);
+        tp = 1000000 * ((prob * 1000) / nsecs);
 
         mr->cur_tp = MINSTREL_TRUNC(tp);
 }
@@ -277,13 +277,15 @@ minstrel_ht_update_stats(struct minstrel_priv *mp, struct minstrel_ht_sta *mi)
                         if (!(mg->supported & BIT(i)))
                                 continue;
 
+                        index = MCS_GROUP_RATES * group + i;
+
                         /* initialize rates selections starting indexes */
                         if (!mg_rates_valid) {
                                 mg->max_tp_rate = mg->max_tp_rate2 =
                                         mg->max_prob_rate = i;
                                 if (!mi_rates_valid) {
                                         mi->max_tp_rate = mi->max_tp_rate2 =
-                                                mi->max_prob_rate = i;
+                                                mi->max_prob_rate = index;
                                         mi_rates_valid = true;
                                 }
                                 mg_rates_valid = true;
@@ -291,7 +293,6 @@ minstrel_ht_update_stats(struct minstrel_priv *mp, struct minstrel_ht_sta *mi)
 
                         mr = &mg->rates[i];
                         mr->retry_updated = false;
-                        index = MCS_GROUP_RATES * group + i;
                         minstrel_calc_rate_ewma(mr);
                         minstrel_ht_calc_tp(mi, group, i);
 
diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c
index caecef870c0e..2b0debb0422b 100644
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
@@ -911,7 +911,8 @@ static void ieee80211_rx_reorder_ampdu(struct ieee80211_rx_data *rx,
         u16 sc;
         u8 tid, ack_policy;
 
-        if (!ieee80211_is_data_qos(hdr->frame_control))
+        if (!ieee80211_is_data_qos(hdr->frame_control) ||
+            is_multicast_ether_addr(hdr->addr1))
                 goto dont_reorder;
 
         /*
diff --git a/net/mac80211/scan.c b/net/mac80211/scan.c
index 5ad66a83ef7f..bcc4833d7542 100644
--- a/net/mac80211/scan.c
+++ b/net/mac80211/scan.c
@@ -1088,6 +1088,6 @@ void ieee80211_sched_scan_stopped(struct ieee80211_hw *hw)
 
         trace_api_sched_scan_stopped(local);
 
-        ieee80211_queue_work(&local->hw, &local->sched_scan_stopped_work);
+        schedule_work(&local->sched_scan_stopped_work);
 }
 EXPORT_SYMBOL(ieee80211_sched_scan_stopped);
diff --git a/net/mac80211/spectmgmt.c b/net/mac80211/spectmgmt.c
index a40da20b32e0..6ab009070084 100644
--- a/net/mac80211/spectmgmt.c
+++ b/net/mac80211/spectmgmt.c
@@ -78,6 +78,8 @@ int ieee80211_parse_ch_switch_ie(struct ieee80211_sub_if_data *sdata,
         if (elems->mesh_chansw_params_ie) {
                 csa_ie->ttl = elems->mesh_chansw_params_ie->mesh_ttl;
                 csa_ie->mode = elems->mesh_chansw_params_ie->mesh_flags;
+                csa_ie->pre_value = le16_to_cpu(
+                                elems->mesh_chansw_params_ie->mesh_pre_value);
         }
 
         new_freq = ieee80211_channel_to_frequency(new_chan_no, new_band);
diff --git a/net/mac80211/util.c b/net/mac80211/util.c
index 592a18171f95..9f9b9bd3fd44 100644
--- a/net/mac80211/util.c
+++ b/net/mac80211/util.c
@@ -2278,17 +2278,15 @@ void ieee80211_dfs_radar_detected_work(struct work_struct *work)
 {
         struct ieee80211_local *local =
                 container_of(work, struct ieee80211_local, radar_detected_work);
-        struct cfg80211_chan_def chandef;
+        struct cfg80211_chan_def chandef = local->hw.conf.chandef;
 
         ieee80211_dfs_cac_cancel(local);
 
         if (local->use_chanctx)
                 /* currently not handled */
                 WARN_ON(1);
-        else {
-                chandef = local->hw.conf.chandef;
+        else
                 cfg80211_radar_event(local->hw.wiphy, &chandef, GFP_KERNEL);
-        }
 }
 
 void ieee80211_radar_detected(struct ieee80211_hw *hw)
@@ -2459,14 +2457,9 @@ int ieee80211_send_action_csa(struct ieee80211_sub_if_data *sdata,
                           WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT : 0x00;
                 put_unaligned_le16(WLAN_REASON_MESH_CHAN, pos); /* Reason Cd */
                 pos += 2;
-                if (!ifmsh->pre_value)
-                        ifmsh->pre_value = 1;
-                else
-                        ifmsh->pre_value++;
                 pre_value = cpu_to_le16(ifmsh->pre_value);
                 memcpy(pos, &pre_value, 2);             /* Precedence Value */
                 pos += 2;
-                ifmsh->chsw_init = true;
         }
 
         ieee80211_tx_skb(sdata, skb);
diff --git a/net/netfilter/ipset/ip_set_hash_netnet.c b/net/netfilter/ipset/ip_set_hash_netnet.c
index 2bc2dec20b00..6226803fc490 100644
--- a/net/netfilter/ipset/ip_set_hash_netnet.c
+++ b/net/netfilter/ipset/ip_set_hash_netnet.c
@@ -59,7 +59,7 @@ hash_netnet4_data_equal(const struct hash_netnet4_elem *ip1,
                      u32 *multi)
 {
         return ip1->ipcmp == ip2->ipcmp &&
-               ip2->ccmp == ip2->ccmp;
+               ip1->ccmp == ip2->ccmp;
 }
 
 static inline int
diff --git a/net/netfilter/nf_tables_api.c b/net/netfilter/nf_tables_api.c
index dcddc49c0e08..f93b7d06f4be 100644
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -1717,6 +1717,19 @@ nf_tables_delrule_one(struct nft_ctx *ctx, struct nft_rule *rule)
         return -ENOENT;
 }
 
+static int nf_table_delrule_by_chain(struct nft_ctx *ctx)
+{
+        struct nft_rule *rule;
+        int err;
+
+        list_for_each_entry(rule, &ctx->chain->rules, list) {
+                err = nf_tables_delrule_one(ctx, rule);
+                if (err < 0)
+                        return err;
+        }
+        return 0;
+}
+
 static int nf_tables_delrule(struct sock *nlsk, struct sk_buff *skb,
                              const struct nlmsghdr *nlh,
                              const struct nlattr * const nla[])
@@ -1725,8 +1738,8 @@ static int nf_tables_delrule(struct sock *nlsk, struct sk_buff *skb,
         const struct nft_af_info *afi;
         struct net *net = sock_net(skb->sk);
         const struct nft_table *table;
-        struct nft_chain *chain;
-        struct nft_rule *rule, *tmp;
+        struct nft_chain *chain = NULL;
+        struct nft_rule *rule;
         int family = nfmsg->nfgen_family, err = 0;
         struct nft_ctx ctx;
 
@@ -1738,22 +1751,29 @@ static int nf_tables_delrule(struct sock *nlsk, struct sk_buff *skb,
         if (IS_ERR(table))
                 return PTR_ERR(table);
 
-        chain = nf_tables_chain_lookup(table, nla[NFTA_RULE_CHAIN]);
-        if (IS_ERR(chain))
-                return PTR_ERR(chain);
+        if (nla[NFTA_RULE_CHAIN]) {
+                chain = nf_tables_chain_lookup(table, nla[NFTA_RULE_CHAIN]);
+                if (IS_ERR(chain))
+                        return PTR_ERR(chain);
+        }
 
         nft_ctx_init(&ctx, skb, nlh, afi, table, chain, nla);
 
-        if (nla[NFTA_RULE_HANDLE]) {
-                rule = nf_tables_rule_lookup(chain, nla[NFTA_RULE_HANDLE]);
-                if (IS_ERR(rule))
-                        return PTR_ERR(rule);
+        if (chain) {
+                if (nla[NFTA_RULE_HANDLE]) {
+                        rule = nf_tables_rule_lookup(chain,
+                                                     nla[NFTA_RULE_HANDLE]);
+                        if (IS_ERR(rule))
+                                return PTR_ERR(rule);
 
-                err = nf_tables_delrule_one(&ctx, rule);
-        } else {
-                /* Remove all rules in this chain */
-                list_for_each_entry_safe(rule, tmp, &chain->rules, list) {
                         err = nf_tables_delrule_one(&ctx, rule);
+                } else {
+                        err = nf_table_delrule_by_chain(&ctx);
+                }
+        } else {
+                list_for_each_entry(chain, &table->chains, list) {
+                        ctx.chain = chain;
+                        err = nf_table_delrule_by_chain(&ctx);
                         if (err < 0)
                                 break;
                 }
diff --git a/net/netfilter/xt_hashlimit.c b/net/netfilter/xt_hashlimit.c
index 9ff035c71403..a3910fc2122b 100644
--- a/net/netfilter/xt_hashlimit.c
+++ b/net/netfilter/xt_hashlimit.c
@@ -325,21 +325,24 @@ static void htable_gc(unsigned long htlong)
         add_timer(&ht->timer);
 }
 
-static void htable_destroy(struct xt_hashlimit_htable *hinfo)
+static void htable_remove_proc_entry(struct xt_hashlimit_htable *hinfo)
 {
         struct hashlimit_net *hashlimit_net = hashlimit_pernet(hinfo->net);
         struct proc_dir_entry *parent;
 
-        del_timer_sync(&hinfo->timer);
-
         if (hinfo->family == NFPROTO_IPV4)
                 parent = hashlimit_net->ipt_hashlimit;
         else
                 parent = hashlimit_net->ip6t_hashlimit;
 
-        if(parent != NULL)
+        if (parent != NULL)
                 remove_proc_entry(hinfo->name, parent);
+}
 
+static void htable_destroy(struct xt_hashlimit_htable *hinfo)
+{
+        del_timer_sync(&hinfo->timer);
+        htable_remove_proc_entry(hinfo);
         htable_selective_cleanup(hinfo, select_all);
         kfree(hinfo->name);
         vfree(hinfo);
@@ -883,21 +886,15 @@ static int __net_init hashlimit_proc_net_init(struct net *net)
 static void __net_exit hashlimit_proc_net_exit(struct net *net)
 {
         struct xt_hashlimit_htable *hinfo;
-        struct proc_dir_entry *pde;
         struct hashlimit_net *hashlimit_net = hashlimit_pernet(net);
 
-        /* recent_net_exit() is called before recent_mt_destroy(). Make sure
-         * that the parent xt_recent proc entry is is empty before trying to
-         * remove it.
+        /* hashlimit_net_exit() is called before hashlimit_mt_destroy().
+         * Make sure that the parent ipt_hashlimit and ip6t_hashlimit proc
+         * entries is empty before trying to remove it.
          */
         mutex_lock(&hashlimit_mutex);
-        pde = hashlimit_net->ipt_hashlimit;
-        if (pde == NULL)
-                pde = hashlimit_net->ip6t_hashlimit;
-
         hlist_for_each_entry(hinfo, &hashlimit_net->htables, node)
-                remove_proc_entry(hinfo->name, pde);
-
+                htable_remove_proc_entry(hinfo);
         hashlimit_net->ipt_hashlimit = NULL;
         hashlimit_net->ip6t_hashlimit = NULL;
         mutex_unlock(&hashlimit_mutex);
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index ba2548bd85bf..88cfbc189558 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -237,6 +237,30 @@ struct packet_skb_cb {
 static void __fanout_unlink(struct sock *sk, struct packet_sock *po);
 static void __fanout_link(struct sock *sk, struct packet_sock *po);
 
+static struct net_device *packet_cached_dev_get(struct packet_sock *po)
+{
+        struct net_device *dev;
+
+        rcu_read_lock();
+        dev = rcu_dereference(po->cached_dev);
+        if (likely(dev))
+                dev_hold(dev);
+        rcu_read_unlock();
+
+        return dev;
+}
+
+static void packet_cached_dev_assign(struct packet_sock *po,
+                                     struct net_device *dev)
+{
+        rcu_assign_pointer(po->cached_dev, dev);
+}
+
+static void packet_cached_dev_reset(struct packet_sock *po)
+{
+        RCU_INIT_POINTER(po->cached_dev, NULL);
+}
+
 /* register_prot_hook must be invoked with the po->bind_lock held,
  * or from a context in which asynchronous accesses to the packet
  * socket is not possible (packet_create()).
@@ -246,12 +270,10 @@ static void register_prot_hook(struct sock *sk)
         struct packet_sock *po = pkt_sk(sk);
 
         if (!po->running) {
-                if (po->fanout) {
+                if (po->fanout)
                         __fanout_link(sk, po);
-                } else {
+                else
                         dev_add_pack(&po->prot_hook);
-                        rcu_assign_pointer(po->cached_dev, po->prot_hook.dev);
-                }
 
                 sock_hold(sk);
                 po->running = 1;
@@ -270,12 +292,11 @@ static void __unregister_prot_hook(struct sock *sk, bool sync)
         struct packet_sock *po = pkt_sk(sk);
 
         po->running = 0;
-        if (po->fanout) {
+
+        if (po->fanout)
                 __fanout_unlink(sk, po);
-        } else {
+        else
                 __dev_remove_pack(&po->prot_hook);
-                RCU_INIT_POINTER(po->cached_dev, NULL);
-        }
 
         __sock_put(sk);
 
@@ -2059,19 +2080,6 @@ static int tpacket_fill_skb(struct packet_sock *po, struct sk_buff *skb,
         return tp_len;
 }
 
-static struct net_device *packet_cached_dev_get(struct packet_sock *po)
-{
-        struct net_device *dev;
-
-        rcu_read_lock();
-        dev = rcu_dereference(po->cached_dev);
-        if (dev)
-                dev_hold(dev);
-        rcu_read_unlock();
-
-        return dev;
-}
-
 static int tpacket_snd(struct packet_sock *po, struct msghdr *msg)
 {
         struct sk_buff *skb;
@@ -2088,7 +2096,7 @@ static int tpacket_snd(struct packet_sock *po, struct msghdr *msg)
 
         mutex_lock(&po->pg_vec_lock);
 
-        if (saddr == NULL) {
+        if (likely(saddr == NULL)) {
                 dev     = packet_cached_dev_get(po);
                 proto   = po->num;
                 addr    = NULL;
@@ -2242,7 +2250,7 @@ static int packet_snd(struct socket *sock,
          *      Get and verify the address.
          */
 
-        if (saddr == NULL) {
+        if (likely(saddr == NULL)) {
                 dev     = packet_cached_dev_get(po);
                 proto   = po->num;
                 addr    = NULL;
@@ -2451,6 +2459,8 @@ static int packet_release(struct socket *sock)
 
         spin_lock(&po->bind_lock);
         unregister_prot_hook(sk, false);
+        packet_cached_dev_reset(po);
+
         if (po->prot_hook.dev) {
                 dev_put(po->prot_hook.dev);
                 po->prot_hook.dev = NULL;
@@ -2506,14 +2516,17 @@ static int packet_do_bind(struct sock *sk, struct net_device *dev, __be16 protoc
 
         spin_lock(&po->bind_lock);
         unregister_prot_hook(sk, true);
+
         po->num = protocol;
         po->prot_hook.type = protocol;
         if (po->prot_hook.dev)
                 dev_put(po->prot_hook.dev);
-        po->prot_hook.dev = dev;
 
+        po->prot_hook.dev = dev;
         po->ifindex = dev ? dev->ifindex : 0;
 
+        packet_cached_dev_assign(po, dev);
+
         if (protocol == 0)
                 goto out_unlock;
 
@@ -2626,7 +2639,8 @@ static int packet_create(struct net *net, struct socket *sock, int protocol,
         po = pkt_sk(sk);
         sk->sk_family = PF_PACKET;
         po->num = proto;
-        RCU_INIT_POINTER(po->cached_dev, NULL);
+
+        packet_cached_dev_reset(po);
 
         sk->sk_destruct = packet_sock_destruct;
         sk_refcnt_debug_inc(sk);
@@ -3337,6 +3351,7 @@ static int packet_notifier(struct notifier_block *this,
                                                 sk->sk_error_report(sk);
                                 }
                                 if (msg == NETDEV_UNREGISTER) {
+                                        packet_cached_dev_reset(po);
                                         po->ifindex = -1;
                                         if (po->prot_hook.dev)
                                                 dev_put(po->prot_hook.dev);
diff --git a/net/rds/ib_send.c b/net/rds/ib_send.c
index e59094981175..37be6e226d1b 100644
--- a/net/rds/ib_send.c
+++ b/net/rds/ib_send.c
@@ -552,9 +552,8 @@ int rds_ib_xmit(struct rds_connection *conn, struct rds_message *rm,
             && rm->m_inc.i_hdr.h_flags & RDS_FLAG_CONG_BITMAP) {
                 rds_cong_map_updated(conn->c_fcong, ~(u64) 0);
                 scat = &rm->data.op_sg[sg];
-                ret = sizeof(struct rds_header) + RDS_CONG_MAP_BYTES;
-                ret = min_t(int, ret, scat->length - conn->c_xmit_data_off);
-                return ret;
+                ret = max_t(int, RDS_CONG_MAP_BYTES, scat->length);
+                return sizeof(struct rds_header) + ret;
         }
 
         /* FIXME we may overallocate here */
diff --git a/net/sched/act_api.c b/net/sched/act_api.c
index fd7072827a40..69cb848e8345 100644
--- a/net/sched/act_api.c
+++ b/net/sched/act_api.c
@@ -270,6 +270,16 @@ int tcf_register_action(struct tc_action_ops *act)
 {
         struct tc_action_ops *a, **ap;
 
+        /* Must supply act, dump, cleanup and init */
+        if (!act->act || !act->dump || !act->cleanup || !act->init)
+                return -EINVAL;
+
+        /* Supply defaults */
+        if (!act->lookup)
+                act->lookup = tcf_hash_search;
+        if (!act->walk)
+                act->walk = tcf_generic_walker;
+
         write_lock(&act_mod_lock);
         for (ap = &act_base; (a = *ap) != NULL; ap = &a->next) {
                 if (act->type == a->type || (strcmp(act->kind, a->kind) == 0)) {
@@ -381,7 +391,7 @@ int tcf_action_exec(struct sk_buff *skb, const struct tc_action *act,
         }
         while ((a = act) != NULL) {
 repeat:
-                if (a->ops && a->ops->act) {
+                if (a->ops) {
                         ret = a->ops->act(skb, a, res);
                         if (TC_MUNGED & skb->tc_verd) {
                                 /* copied already, allow trampling */
@@ -405,7 +415,7 @@ void tcf_action_destroy(struct tc_action *act, int bind)
         struct tc_action *a;
 
         for (a = act; a; a = act) {
-                if (a->ops && a->ops->cleanup) {
+                if (a->ops) {
                         if (a->ops->cleanup(a, bind) == ACT_P_DELETED)
                                 module_put(a->ops->owner);
                         act = act->next;
@@ -424,7 +434,7 @@ tcf_action_dump_old(struct sk_buff *skb, struct tc_action *a, int bind, int ref)
 {
         int err = -EINVAL;
 
-        if (a->ops == NULL || a->ops->dump == NULL)
+        if (a->ops == NULL)
                 return err;
         return a->ops->dump(skb, a, bind, ref);
 }
@@ -436,7 +446,7 @@ tcf_action_dump_1(struct sk_buff *skb, struct tc_action *a, int bind, int ref)
         unsigned char *b = skb_tail_pointer(skb);
         struct nlattr *nest;
 
-        if (a->ops == NULL || a->ops->dump == NULL)
+        if (a->ops == NULL)
                 return err;
 
         if (nla_put_string(skb, TCA_KIND, a->ops->kind))
@@ -723,8 +733,6 @@ tcf_action_get_1(struct nlattr *nla, struct nlmsghdr *n, u32 portid)
         a->ops = tc_lookup_action(tb[TCA_ACT_KIND]);
         if (a->ops == NULL)
                 goto err_free;
-        if (a->ops->lookup == NULL)
-                goto err_mod;
         err = -ENOENT;
         if (a->ops->lookup(a, index) == 0)
                 goto err_mod;
@@ -1084,12 +1092,6 @@ tc_dump_action(struct sk_buff *skb, struct netlink_callback *cb)
         memset(&a, 0, sizeof(struct tc_action));
         a.ops = a_o;
 
-        if (a_o->walk == NULL) {
-                WARN(1, "tc_dump_action: %s !capable of dumping table\n",
-                     a_o->kind);
-                goto out_module_put;
-        }
-
         nlh = nlmsg_put(skb, NETLINK_CB(cb->skb).portid, cb->nlh->nlmsg_seq,
                         cb->nlh->nlmsg_type, sizeof(*t), 0);
         if (!nlh)
diff --git a/net/sched/act_csum.c b/net/sched/act_csum.c
index 3a4c0caa1f7d..5c5edf56adbd 100644
--- a/net/sched/act_csum.c
+++ b/net/sched/act_csum.c
@@ -585,9 +585,7 @@ static struct tc_action_ops act_csum_ops = {
         .act            = tcf_csum,
         .dump           = tcf_csum_dump,
         .cleanup        = tcf_csum_cleanup,
-        .lookup         = tcf_hash_search,
         .init           = tcf_csum_init,
-        .walk           = tcf_generic_walker
 };
 
 MODULE_DESCRIPTION("Checksum updating actions");
diff --git a/net/sched/act_gact.c b/net/sched/act_gact.c
index fd2b3cff5fa2..5645a4d32abd 100644
--- a/net/sched/act_gact.c
+++ b/net/sched/act_gact.c
@@ -206,9 +206,7 @@ static struct tc_action_ops act_gact_ops = {
         .act            =       tcf_gact,
         .dump           =       tcf_gact_dump,
         .cleanup        =       tcf_gact_cleanup,
-        .lookup         =       tcf_hash_search,
         .init           =       tcf_gact_init,
-        .walk           =       tcf_generic_walker
 };
 
 MODULE_AUTHOR("Jamal Hadi Salim(2002-4)");
diff --git a/net/sched/act_ipt.c b/net/sched/act_ipt.c
index 60d88b6b9560..882a89762f77 100644
--- a/net/sched/act_ipt.c
+++ b/net/sched/act_ipt.c
@@ -298,9 +298,7 @@ static struct tc_action_ops act_ipt_ops = {
         .act            =       tcf_ipt,
         .dump           =       tcf_ipt_dump,
         .cleanup        =       tcf_ipt_cleanup,
-        .lookup         =       tcf_hash_search,
         .init           =       tcf_ipt_init,
-        .walk           =       tcf_generic_walker
 };
 
 static struct tc_action_ops act_xt_ops = {
@@ -312,9 +310,7 @@ static struct tc_action_ops act_xt_ops = {
         .act            =       tcf_ipt,
         .dump           =       tcf_ipt_dump,
         .cleanup        =       tcf_ipt_cleanup,
-        .lookup         =       tcf_hash_search,
         .init           =       tcf_ipt_init,
-        .walk           =       tcf_generic_walker
 };
 
 MODULE_AUTHOR("Jamal Hadi Salim(2002-13)");
diff --git a/net/sched/act_mirred.c b/net/sched/act_mirred.c
index 977c10e0631b..252378121ce7 100644
--- a/net/sched/act_mirred.c
+++ b/net/sched/act_mirred.c
@@ -271,9 +271,7 @@ static struct tc_action_ops act_mirred_ops = {
         .act            =       tcf_mirred,
         .dump           =       tcf_mirred_dump,
         .cleanup        =       tcf_mirred_cleanup,
-        .lookup         =       tcf_hash_search,
         .init           =       tcf_mirred_init,
-        .walk           =       tcf_generic_walker
 };
 
 MODULE_AUTHOR("Jamal Hadi Salim(2002)");
diff --git a/net/sched/act_nat.c b/net/sched/act_nat.c
index 876f0ef29694..6a15ace00241 100644
--- a/net/sched/act_nat.c
+++ b/net/sched/act_nat.c
@@ -308,9 +308,7 @@ static struct tc_action_ops act_nat_ops = {
         .act            =       tcf_nat,
         .dump           =       tcf_nat_dump,
         .cleanup        =       tcf_nat_cleanup,
-        .lookup         =       tcf_hash_search,
         .init           =       tcf_nat_init,
-        .walk           =       tcf_generic_walker
 };
 
 MODULE_DESCRIPTION("Stateless NAT actions");
diff --git a/net/sched/act_pedit.c b/net/sched/act_pedit.c
index 7ed78c9e505c..03b67674169c 100644
--- a/net/sched/act_pedit.c
+++ b/net/sched/act_pedit.c
@@ -243,9 +243,7 @@ static struct tc_action_ops act_pedit_ops = {
         .act            =       tcf_pedit,
         .dump           =       tcf_pedit_dump,
         .cleanup        =       tcf_pedit_cleanup,
-        .lookup         =       tcf_hash_search,
         .init           =       tcf_pedit_init,
-        .walk           =       tcf_generic_walker
 };
 
 MODULE_AUTHOR("Jamal Hadi Salim(2002-4)");
diff --git a/net/sched/act_police.c b/net/sched/act_police.c
index 272d8e924cf6..16a62c36928a 100644
--- a/net/sched/act_police.c
+++ b/net/sched/act_police.c
@@ -407,7 +407,6 @@ static struct tc_action_ops act_police_ops = {
         .act            =       tcf_act_police,
         .dump           =       tcf_act_police_dump,
         .cleanup        =       tcf_act_police_cleanup,
-        .lookup         =       tcf_hash_search,
         .init           =       tcf_act_police_locate,
         .walk           =       tcf_act_police_walker
 };
diff --git a/net/sched/act_simple.c b/net/sched/act_simple.c
index 7725eb4ab756..31157d3e729c 100644
--- a/net/sched/act_simple.c
+++ b/net/sched/act_simple.c
@@ -201,7 +201,6 @@ static struct tc_action_ops act_simp_ops = {
         .dump           =       tcf_simp_dump,
         .cleanup        =       tcf_simp_cleanup,
         .init           =       tcf_simp_init,
-        .walk           =       tcf_generic_walker,
 };
 
 MODULE_AUTHOR("Jamal Hadi Salim(2005)");
diff --git a/net/sched/act_skbedit.c b/net/sched/act_skbedit.c
index cb4221171f93..35ea643b4325 100644
--- a/net/sched/act_skbedit.c
+++ b/net/sched/act_skbedit.c
@@ -203,7 +203,6 @@ static struct tc_action_ops act_skbedit_ops = {
         .dump           =       tcf_skbedit_dump,
         .cleanup        =       tcf_skbedit_cleanup,
         .init           =       tcf_skbedit_init,
-        .walk           =       tcf_generic_walker,
 };
 
 MODULE_AUTHOR("Alexander Duyck, <alexander.h.duyck@intel.com>");
diff --git a/net/sched/sch_htb.c b/net/sched/sch_htb.c
index 0e1e38b40025..717b2108f852 100644
--- a/net/sched/sch_htb.c
+++ b/net/sched/sch_htb.c
@@ -1477,11 +1477,22 @@ static int htb_change_class(struct Qdisc *sch, u32 classid,
                 sch_tree_lock(sch);
         }
 
+        rate64 = tb[TCA_HTB_RATE64] ? nla_get_u64(tb[TCA_HTB_RATE64]) : 0;
+
+        ceil64 = tb[TCA_HTB_CEIL64] ? nla_get_u64(tb[TCA_HTB_CEIL64]) : 0;
+
+        psched_ratecfg_precompute(&cl->rate, &hopt->rate, rate64);
+        psched_ratecfg_precompute(&cl->ceil, &hopt->ceil, ceil64);
+
         /* it used to be a nasty bug here, we have to check that node
          * is really leaf before changing cl->un.leaf !
          */
         if (!cl->level) {
-                cl->quantum = hopt->rate.rate / q->rate2quantum;
+                u64 quantum = cl->rate.rate_bytes_ps;
+
+                do_div(quantum, q->rate2quantum);
+                cl->quantum = min_t(u64, quantum, INT_MAX);
+
                 if (!hopt->quantum && cl->quantum < 1000) {
                         pr_warning(
                                "HTB: quantum of class %X is small. Consider r2q change.\n",
@@ -1500,13 +1511,6 @@ static int htb_change_class(struct Qdisc *sch, u32 classid,
                         cl->prio = TC_HTB_NUMPRIO - 1;
         }
 
-        rate64 = tb[TCA_HTB_RATE64] ? nla_get_u64(tb[TCA_HTB_RATE64]) : 0;
-
-        ceil64 = tb[TCA_HTB_CEIL64] ? nla_get_u64(tb[TCA_HTB_CEIL64]) : 0;
-
-        psched_ratecfg_precompute(&cl->rate, &hopt->rate, rate64);
-        psched_ratecfg_precompute(&cl->ceil, &hopt->ceil, ceil64);
-
         cl->buffer = PSCHED_TICKS2NS(hopt->buffer);
         cl->cbuffer = PSCHED_TICKS2NS(hopt->cbuffer);
 
diff --git a/net/sched/sch_tbf.c b/net/sched/sch_tbf.c
index a6090051c5db..887e672f9d7d 100644
--- a/net/sched/sch_tbf.c
+++ b/net/sched/sch_tbf.c
@@ -118,6 +118,32 @@ struct tbf_sched_data {
 };
 
 
+/* Time to Length, convert time in ns to length in bytes
+ * to determinate how many bytes can be sent in given time.
+ */
+static u64 psched_ns_t2l(const struct psched_ratecfg *r,
+                         u64 time_in_ns)
+{
+        /* The formula is :
+         * len = (time_in_ns * r->rate_bytes_ps) / NSEC_PER_SEC
+         */
+        u64 len = time_in_ns * r->rate_bytes_ps;
+
+        do_div(len, NSEC_PER_SEC);
+
+        if (unlikely(r->linklayer == TC_LINKLAYER_ATM)) {
+                do_div(len, 53);
+                len = len * 48;
+        }
+
+        if (len > r->overhead)
+                len -= r->overhead;
+        else
+                len = 0;
+
+        return len;
+}
+
 /*
  * Return length of individual segments of a gso packet,
  * including all headers (MAC, IP, TCP/UDP)
@@ -289,10 +315,11 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt)
         struct tbf_sched_data *q = qdisc_priv(sch);
         struct nlattr *tb[TCA_TBF_MAX + 1];
         struct tc_tbf_qopt *qopt;
-        struct qdisc_rate_table *rtab = NULL;
-        struct qdisc_rate_table *ptab = NULL;
         struct Qdisc *child = NULL;
-        int max_size, n;
+        struct psched_ratecfg rate;
+        struct psched_ratecfg peak;
+        u64 max_size;
+        s64 buffer, mtu;
         u64 rate64 = 0, prate64 = 0;
 
         err = nla_parse_nested(tb, TCA_TBF_MAX, opt, tbf_policy);
@@ -304,38 +331,13 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt)
                 goto done;
 
         qopt = nla_data(tb[TCA_TBF_PARMS]);
-        rtab = qdisc_get_rtab(&qopt->rate, tb[TCA_TBF_RTAB]);
-        if (rtab == NULL)
-                goto done;
-
-        if (qopt->peakrate.rate) {
-                if (qopt->peakrate.rate > qopt->rate.rate)
-                        ptab = qdisc_get_rtab(&qopt->peakrate, tb[TCA_TBF_PTAB]);
-                if (ptab == NULL)
-                        goto done;
-        }
-
-        for (n = 0; n < 256; n++)
-                if (rtab->data[n] > qopt->buffer)
-                        break;
-        max_size = (n << qopt->rate.cell_log) - 1;
-        if (ptab) {
-                int size;
-
-                for (n = 0; n < 256; n++)
-                        if (ptab->data[n] > qopt->mtu)
-                                break;
-                size = (n << qopt->peakrate.cell_log) - 1;
-                if (size < max_size)
-                        max_size = size;
-        }
-        if (max_size < 0)
-                goto done;
+        if (qopt->rate.linklayer == TC_LINKLAYER_UNAWARE)
+                qdisc_put_rtab(qdisc_get_rtab(&qopt->rate,
+                                              tb[TCA_TBF_RTAB]));
 
-        if (max_size < psched_mtu(qdisc_dev(sch)))
-                pr_warn_ratelimited("sch_tbf: burst %u is lower than device %s mtu (%u) !\n",
-                                    max_size, qdisc_dev(sch)->name,
-                                    psched_mtu(qdisc_dev(sch)));
+        if (qopt->peakrate.linklayer == TC_LINKLAYER_UNAWARE)
+                        qdisc_put_rtab(qdisc_get_rtab(&qopt->peakrate,
+                                                      tb[TCA_TBF_PTAB]));
 
         if (q->qdisc != &noop_qdisc) {
                 err = fifo_set_limit(q->qdisc, qopt->limit);
@@ -349,6 +351,39 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt)
                 }
         }
 
+        buffer = min_t(u64, PSCHED_TICKS2NS(qopt->buffer), ~0U);
+        mtu = min_t(u64, PSCHED_TICKS2NS(qopt->mtu), ~0U);
+
+        if (tb[TCA_TBF_RATE64])
+                rate64 = nla_get_u64(tb[TCA_TBF_RATE64]);
+        psched_ratecfg_precompute(&rate, &qopt->rate, rate64);
+
+        max_size = min_t(u64, psched_ns_t2l(&rate, buffer), ~0U);
+
+        if (qopt->peakrate.rate) {
+                if (tb[TCA_TBF_PRATE64])
+                        prate64 = nla_get_u64(tb[TCA_TBF_PRATE64]);
+                psched_ratecfg_precompute(&peak, &qopt->peakrate, prate64);
+                if (peak.rate_bytes_ps <= rate.rate_bytes_ps) {
+                        pr_warn_ratelimited("sch_tbf: peakrate %llu is lower than or equals to rate %llu !\n",
+                                            peak.rate_bytes_ps, rate.rate_bytes_ps);
+                        err = -EINVAL;
+                        goto done;
+                }
+
+                max_size = min_t(u64, max_size, psched_ns_t2l(&peak, mtu));
+        }
+
+        if (max_size < psched_mtu(qdisc_dev(sch)))
+                pr_warn_ratelimited("sch_tbf: burst %llu is lower than device %s mtu (%u) !\n",
+                                    max_size, qdisc_dev(sch)->name,
+                                    psched_mtu(qdisc_dev(sch)));
+
+        if (!max_size) {
+                err = -EINVAL;
+                goto done;
+        }
+
         sch_tree_lock(sch);
         if (child) {
                 qdisc_tree_decrease_qlen(q->qdisc, q->qdisc->q.qlen);
@@ -362,13 +397,9 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt)
         q->tokens = q->buffer;
         q->ptokens = q->mtu;
 
-        if (tb[TCA_TBF_RATE64])
-                rate64 = nla_get_u64(tb[TCA_TBF_RATE64]);
-        psched_ratecfg_precompute(&q->rate, &rtab->rate, rate64);
-        if (ptab) {
-                if (tb[TCA_TBF_PRATE64])
-                        prate64 = nla_get_u64(tb[TCA_TBF_PRATE64]);
-                psched_ratecfg_precompute(&q->peak, &ptab->rate, prate64);
+        memcpy(&q->rate, &rate, sizeof(struct psched_ratecfg));
+        if (qopt->peakrate.rate) {
+                memcpy(&q->peak, &peak, sizeof(struct psched_ratecfg));
                 q->peak_present = true;
         } else {
                 q->peak_present = false;
@@ -377,10 +408,6 @@ static int tbf_change(struct Qdisc *sch, struct nlattr *opt)
         sch_tree_unlock(sch);
         err = 0;
 done:
-        if (rtab)
-                qdisc_put_rtab(rtab);
-        if (ptab)
-                qdisc_put_rtab(ptab);
         return err;
 }
 
diff --git a/net/sctp/associola.c b/net/sctp/associola.c
index 68a27f9796d2..31ed008c8e13 100644
--- a/net/sctp/associola.c
+++ b/net/sctp/associola.c
@@ -154,8 +154,7 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a
 
         asoc->timeouts[SCTP_EVENT_TIMEOUT_HEARTBEAT] = 0;
         asoc->timeouts[SCTP_EVENT_TIMEOUT_SACK] = asoc->sackdelay;
-        asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE] =
-                min_t(unsigned long, sp->autoclose, net->sctp.max_autoclose) * HZ;
+        asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE] = sp->autoclose * HZ;
 
         /* Initializes the timers */
         for (i = SCTP_EVENT_TIMEOUT_NONE; i < SCTP_NUM_TIMEOUT_TYPES; ++i)
@@ -291,8 +290,6 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a
                 asoc->peer.ipv6_address = 1;
         INIT_LIST_HEAD(&asoc->asocs);
 
-        asoc->autoclose = sp->autoclose;
-
         asoc->default_stream = sp->default_stream;
         asoc->default_ppid = sp->default_ppid;
         asoc->default_flags = sp->default_flags;
diff --git a/net/sctp/output.c b/net/sctp/output.c
index 0e2644d0a773..0fb140f8f088 100644
--- a/net/sctp/output.c
+++ b/net/sctp/output.c
@@ -581,7 +581,8 @@ int sctp_packet_transmit(struct sctp_packet *packet)
                 unsigned long timeout;
 
                 /* Restart the AUTOCLOSE timer when sending data. */
-                if (sctp_state(asoc, ESTABLISHED) && asoc->autoclose) {
+                if (sctp_state(asoc, ESTABLISHED) &&
+                    asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE]) {
                         timer = &asoc->timers[SCTP_EVENT_TIMEOUT_AUTOCLOSE];
                         timeout = asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE];
 
diff --git a/net/sctp/sm_statefuns.c b/net/sctp/sm_statefuns.c
index dfe3f36ff2aa..a26065be7289 100644
--- a/net/sctp/sm_statefuns.c
+++ b/net/sctp/sm_statefuns.c
@@ -820,7 +820,7 @@ sctp_disposition_t sctp_sf_do_5_1D_ce(struct net *net,
         SCTP_INC_STATS(net, SCTP_MIB_PASSIVEESTABS);
         sctp_add_cmd_sf(commands, SCTP_CMD_HB_TIMERS_START, SCTP_NULL());
 
-        if (new_asoc->autoclose)
+        if (new_asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE])
                 sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_START,
                                 SCTP_TO(SCTP_EVENT_TIMEOUT_AUTOCLOSE));
 
@@ -908,7 +908,7 @@ sctp_disposition_t sctp_sf_do_5_1E_ca(struct net *net,
         SCTP_INC_STATS(net, SCTP_MIB_CURRESTAB);
         SCTP_INC_STATS(net, SCTP_MIB_ACTIVEESTABS);
         sctp_add_cmd_sf(commands, SCTP_CMD_HB_TIMERS_START, SCTP_NULL());
-        if (asoc->autoclose)
+        if (asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE])
                 sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_START,
                                 SCTP_TO(SCTP_EVENT_TIMEOUT_AUTOCLOSE));
 
@@ -2970,7 +2970,7 @@ sctp_disposition_t sctp_sf_eat_data_6_2(struct net *net,
         if (chunk->chunk_hdr->flags & SCTP_DATA_SACK_IMM)
                 force = SCTP_FORCE();
 
-        if (asoc->autoclose) {
+        if (asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE]) {
                 sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_RESTART,
                                 SCTP_TO(SCTP_EVENT_TIMEOUT_AUTOCLOSE));
         }
@@ -3878,7 +3878,7 @@ sctp_disposition_t sctp_sf_eat_fwd_tsn(struct net *net,
                                 SCTP_CHUNK(chunk));
 
         /* Count this as receiving DATA. */
-        if (asoc->autoclose) {
+        if (asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE]) {
                 sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_RESTART,
                                 SCTP_TO(SCTP_EVENT_TIMEOUT_AUTOCLOSE));
         }
@@ -5267,7 +5267,7 @@ sctp_disposition_t sctp_sf_do_9_2_start_shutdown(
         sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_RESTART,
                         SCTP_TO(SCTP_EVENT_TIMEOUT_T5_SHUTDOWN_GUARD));
 
-        if (asoc->autoclose)
+        if (asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE])
                 sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_STOP,
                                 SCTP_TO(SCTP_EVENT_TIMEOUT_AUTOCLOSE));
 
@@ -5346,7 +5346,7 @@ sctp_disposition_t sctp_sf_do_9_2_shutdown_ack(
         sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_RESTART,
                         SCTP_TO(SCTP_EVENT_TIMEOUT_T2_SHUTDOWN));
 
-        if (asoc->autoclose)
+        if (asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE])
                 sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_STOP,
                                 SCTP_TO(SCTP_EVENT_TIMEOUT_AUTOCLOSE));
 
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index 72046b9729a8..42b709c95cf3 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -2196,6 +2196,7 @@ static int sctp_setsockopt_autoclose(struct sock *sk, char __user *optval,
                                      unsigned int optlen)
 {
         struct sctp_sock *sp = sctp_sk(sk);
+        struct net *net = sock_net(sk);
 
         /* Applicable to UDP-style socket only */
         if (sctp_style(sk, TCP))
@@ -2205,6 +2206,9 @@ static int sctp_setsockopt_autoclose(struct sock *sk, char __user *optval,
         if (copy_from_user(&sp->autoclose, optval, optlen))
                 return -EFAULT;
 
+        if (sp->autoclose > net->sctp.max_autoclose)
+                sp->autoclose = net->sctp.max_autoclose;
+
         return 0;
 }
 
@@ -2811,6 +2815,8 @@ static int sctp_setsockopt_rtoinfo(struct sock *sk, char __user *optval, unsigne
 {
         struct sctp_rtoinfo rtoinfo;
         struct sctp_association *asoc;
+        unsigned long rto_min, rto_max;
+        struct sctp_sock *sp = sctp_sk(sk);
 
         if (optlen != sizeof (struct sctp_rtoinfo))
                 return -EINVAL;
@@ -2824,26 +2830,36 @@ static int sctp_setsockopt_rtoinfo(struct sock *sk, char __user *optval, unsigne
         if (!asoc && rtoinfo.srto_assoc_id && sctp_style(sk, UDP))
                 return -EINVAL;
 
+        rto_max = rtoinfo.srto_max;
+        rto_min = rtoinfo.srto_min;
+
+        if (rto_max)
+                rto_max = asoc ? msecs_to_jiffies(rto_max) : rto_max;
+        else
+                rto_max = asoc ? asoc->rto_max : sp->rtoinfo.srto_max;
+
+        if (rto_min)
+                rto_min = asoc ? msecs_to_jiffies(rto_min) : rto_min;
+        else
+                rto_min = asoc ? asoc->rto_min : sp->rtoinfo.srto_min;
+
+        if (rto_min > rto_max)
+                return -EINVAL;
+
         if (asoc) {
                 if (rtoinfo.srto_initial != 0)
                         asoc->rto_initial =
                                 msecs_to_jiffies(rtoinfo.srto_initial);
-                if (rtoinfo.srto_max != 0)
-                        asoc->rto_max = msecs_to_jiffies(rtoinfo.srto_max);
-                if (rtoinfo.srto_min != 0)
-                        asoc->rto_min = msecs_to_jiffies(rtoinfo.srto_min);
+                asoc->rto_max = rto_max;
+                asoc->rto_min = rto_min;
         } else {
                 /* If there is no association or the association-id = 0
                  * set the values to the endpoint.
                  */
-                struct sctp_sock *sp = sctp_sk(sk);
-
                 if (rtoinfo.srto_initial != 0)
                         sp->rtoinfo.srto_initial = rtoinfo.srto_initial;
-                if (rtoinfo.srto_max != 0)
-                        sp->rtoinfo.srto_max = rtoinfo.srto_max;
-                if (rtoinfo.srto_min != 0)
-                        sp->rtoinfo.srto_min = rtoinfo.srto_min;
+                sp->rtoinfo.srto_max = rto_max;
+                sp->rtoinfo.srto_min = rto_min;
         }
 
         return 0;
diff --git a/net/sctp/sysctl.c b/net/sctp/sysctl.c
index 6b36561a1b3b..b0565afb61c7 100644
--- a/net/sctp/sysctl.c
+++ b/net/sctp/sysctl.c
@@ -56,11 +56,16 @@ extern long sysctl_sctp_mem[3];
 extern int sysctl_sctp_rmem[3];
 extern int sysctl_sctp_wmem[3];
 
-static int proc_sctp_do_hmac_alg(struct ctl_table *ctl,
-                                int write,
+static int proc_sctp_do_hmac_alg(struct ctl_table *ctl, int write,
+                                void __user *buffer, size_t *lenp,
+                                loff_t *ppos);
+static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write,
+                                void __user *buffer, size_t *lenp,
+                                loff_t *ppos);
+static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write,
                                 void __user *buffer, size_t *lenp,
-
                                 loff_t *ppos);
+
 static struct ctl_table sctp_table[] = {
         {
                 .procname       = "sctp_mem",
@@ -102,17 +107,17 @@ static struct ctl_table sctp_net_table[] = {
                 .data           = &init_net.sctp.rto_min,
                 .maxlen         = sizeof(unsigned int),
                 .mode           = 0644,
-                .proc_handler   = proc_dointvec_minmax,
+                .proc_handler   = proc_sctp_do_rto_min,
                 .extra1         = &one,
-                .extra2         = &timer_max
+                .extra2         = &init_net.sctp.rto_max
         },
         {
                 .procname       = "rto_max",
                 .data           = &init_net.sctp.rto_max,
                 .maxlen         = sizeof(unsigned int),
                 .mode           = 0644,
-                .proc_handler   = proc_dointvec_minmax,
-                .extra1         = &one,
+                .proc_handler   = proc_sctp_do_rto_max,
+                .extra1         = &init_net.sctp.rto_min,
                 .extra2         = &timer_max
         },
         {
@@ -294,8 +299,7 @@ static struct ctl_table sctp_net_table[] = {
         { /* sentinel */ }
 };
 
-static int proc_sctp_do_hmac_alg(struct ctl_table *ctl,
-                                int write,
+static int proc_sctp_do_hmac_alg(struct ctl_table *ctl, int write,
                                 void __user *buffer, size_t *lenp,
                                 loff_t *ppos)
 {
@@ -342,6 +346,60 @@ static int proc_sctp_do_hmac_alg(struct ctl_table *ctl,
         return ret;
 }
 
+static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write,
+                                void __user *buffer, size_t *lenp,
+                                loff_t *ppos)
+{
+        struct net *net = current->nsproxy->net_ns;
+        int new_value;
+        struct ctl_table tbl;
+        unsigned int min = *(unsigned int *) ctl->extra1;
+        unsigned int max = *(unsigned int *) ctl->extra2;
+        int ret;
+
+        memset(&tbl, 0, sizeof(struct ctl_table));
+        tbl.maxlen = sizeof(unsigned int);
+
+        if (write)
+                tbl.data = &new_value;
+        else
+                tbl.data = &net->sctp.rto_min;
+        ret = proc_dointvec(&tbl, write, buffer, lenp, ppos);
+        if (write) {
+                if (ret || new_value > max || new_value < min)
+                        return -EINVAL;
+                net->sctp.rto_min = new_value;
+        }
+        return ret;
+}
+
+static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write,
+                                void __user *buffer, size_t *lenp,
+                                loff_t *ppos)
+{
+        struct net *net = current->nsproxy->net_ns;
+        int new_value;
+        struct ctl_table tbl;
+        unsigned int min = *(unsigned int *) ctl->extra1;
+        unsigned int max = *(unsigned int *) ctl->extra2;
+        int ret;
+
+        memset(&tbl, 0, sizeof(struct ctl_table));
+        tbl.maxlen = sizeof(unsigned int);
+
+        if (write)
+                tbl.data = &new_value;
+        else
+                tbl.data = &net->sctp.rto_max;
+        ret = proc_dointvec(&tbl, write, buffer, lenp, ppos);
+        if (write) {
+                if (ret || new_value > max || new_value < min)
+                        return -EINVAL;
+                net->sctp.rto_max = new_value;
+        }
+        return ret;
+}
+
 int sctp_sysctl_net_register(struct net *net)
 {
         struct ctl_table *table;
diff --git a/net/sctp/transport.c b/net/sctp/transport.c
index e332efb124cc..efc46ffed1fd 100644
--- a/net/sctp/transport.c
+++ b/net/sctp/transport.c
@@ -573,7 +573,7 @@ void sctp_transport_burst_limited(struct sctp_transport *t)
         u32 old_cwnd = t->cwnd;
         u32 max_burst_bytes;
 
-        if (t->burst_limited)
+        if (t->burst_limited || asoc->max_burst == 0)
                 return;
 
         max_burst_bytes = t->flight_size + (asoc->max_burst * asoc->pathmtu);
diff --git a/net/tipc/core.c b/net/tipc/core.c
index fd4eeeaa972a..c6d3f75a9e1b 100644
--- a/net/tipc/core.c
+++ b/net/tipc/core.c
@@ -113,7 +113,6 @@ err:
 static void tipc_core_stop(void)
 {
         tipc_netlink_stop();
-        tipc_handler_stop();
         tipc_cfg_stop();
         tipc_subscr_stop();
         tipc_nametbl_stop();
@@ -146,9 +145,10 @@ static int tipc_core_start(void)
                 res = tipc_subscr_start();
         if (!res)
                 res = tipc_cfg_init();
-        if (res)
+        if (res) {
+                tipc_handler_stop();
                 tipc_core_stop();
-
+        }
         return res;
 }
 
@@ -178,6 +178,7 @@ static int __init tipc_init(void)
 
 static void __exit tipc_exit(void)
 {
+        tipc_handler_stop();
         tipc_core_stop_net();
         tipc_core_stop();
         pr_info("Deactivated\n");
diff --git a/net/tipc/handler.c b/net/tipc/handler.c
index b36f0fcd9bdf..e4bc8a296744 100644
--- a/net/tipc/handler.c
+++ b/net/tipc/handler.c
@@ -56,12 +56,13 @@ unsigned int tipc_k_signal(Handler routine, unsigned long argument)
 {
         struct queue_item *item;
 
+        spin_lock_bh(&qitem_lock);
         if (!handler_enabled) {
                 pr_err("Signal request ignored by handler\n");
+                spin_unlock_bh(&qitem_lock);
                 return -ENOPROTOOPT;
         }
 
-        spin_lock_bh(&qitem_lock);
         item = kmem_cache_alloc(tipc_queue_item_cache, GFP_ATOMIC);
         if (!item) {
                 pr_err("Signal queue out of memory\n");
@@ -112,10 +113,14 @@ void tipc_handler_stop(void)
         struct list_head *l, *n;
         struct queue_item *item;
 
-        if (!handler_enabled)
+        spin_lock_bh(&qitem_lock);
+        if (!handler_enabled) {
+                spin_unlock_bh(&qitem_lock);
                 return;
-
+        }
         handler_enabled = 0;
+        spin_unlock_bh(&qitem_lock);
+
         tasklet_kill(&tipc_tasklet);
 
         spin_lock_bh(&qitem_lock);
diff --git a/net/unix/af_unix.c b/net/unix/af_unix.c
index 01625ccc3ae6..a0ca162e5bd5 100644
--- a/net/unix/af_unix.c
+++ b/net/unix/af_unix.c
@@ -530,13 +530,17 @@ static int unix_seqpacket_sendmsg(struct kiocb *, struct socket *,
 static int unix_seqpacket_recvmsg(struct kiocb *, struct socket *,
                                   struct msghdr *, size_t, int);
 
-static void unix_set_peek_off(struct sock *sk, int val)
+static int unix_set_peek_off(struct sock *sk, int val)
 {
         struct unix_sock *u = unix_sk(sk);
 
-        mutex_lock(&u->readlock);
+        if (mutex_lock_interruptible(&u->readlock))
+                return -EINTR;
+
         sk->sk_peek_off = val;
         mutex_unlock(&u->readlock);
+
+        return 0;
 }
 
 
diff --git a/net/wireless/core.c b/net/wireless/core.c
index aff959e5a1b3..52b865fb7351 100644
--- a/net/wireless/core.c
+++ b/net/wireless/core.c
@@ -451,6 +451,15 @@ int wiphy_register(struct wiphy *wiphy)
         int i;
         u16 ifmodes = wiphy->interface_modes;
 
+        /* support for 5/10 MHz is broken due to nl80211 API mess - disable */
+        wiphy->flags &= ~WIPHY_FLAG_SUPPORTS_5_10_MHZ;
+
+        /*
+         * There are major locking problems in nl80211/mac80211 for CSA,
+         * disable for all drivers until this has been reworked.
+         */
+        wiphy->flags &= ~WIPHY_FLAG_HAS_CHANNEL_SWITCH;
+
 #ifdef CONFIG_PM
         if (WARN_ON(wiphy->wowlan &&
                     (wiphy->wowlan->flags & WIPHY_WOWLAN_GTK_REKEY_FAILURE) &&
diff --git a/net/wireless/ibss.c b/net/wireless/ibss.c
index 9d797df56649..89737ee2669a 100644
--- a/net/wireless/ibss.c
+++ b/net/wireless/ibss.c
@@ -262,7 +262,7 @@ int cfg80211_ibss_wext_join(struct cfg80211_registered_device *rdev,
 
         /* try to find an IBSS channel if none requested ... */
         if (!wdev->wext.ibss.chandef.chan) {
-                wdev->wext.ibss.chandef.width = NL80211_CHAN_WIDTH_20_NOHT;
+                struct ieee80211_channel *new_chan = NULL;
 
                 for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
                         struct ieee80211_supported_band *sband;
@@ -278,18 +278,19 @@ int cfg80211_ibss_wext_join(struct cfg80211_registered_device *rdev,
                                         continue;
                                 if (chan->flags & IEEE80211_CHAN_DISABLED)
                                         continue;
-                                wdev->wext.ibss.chandef.chan = chan;
-                                wdev->wext.ibss.chandef.center_freq1 =
-                                        chan->center_freq;
+                                new_chan = chan;
                                 break;
                         }
 
-                        if (wdev->wext.ibss.chandef.chan)
+                        if (new_chan)
                                 break;
                 }
 
-                if (!wdev->wext.ibss.chandef.chan)
+                if (!new_chan)
                         return -EINVAL;
+
+                cfg80211_chandef_create(&wdev->wext.ibss.chandef, new_chan,
+                                        NL80211_CHAN_NO_HT);
         }
 
         /* don't join -- SSID is not there */
@@ -363,9 +364,8 @@ int cfg80211_ibss_wext_siwfreq(struct net_device *dev,
                 return err;
 
         if (chan) {
-                wdev->wext.ibss.chandef.chan = chan;
-                wdev->wext.ibss.chandef.width = NL80211_CHAN_WIDTH_20_NOHT;
-                wdev->wext.ibss.chandef.center_freq1 = freq;
+                cfg80211_chandef_create(&wdev->wext.ibss.chandef, chan,
+                                        NL80211_CHAN_NO_HT);
                 wdev->wext.ibss.channel_fixed = true;
         } else {
                 /* cfg80211_ibss_wext_join will pick one if needed */
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index a1eb21073176..138dc3bb8b67 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -2687,7 +2687,7 @@ static int nl80211_get_key(struct sk_buff *skb, struct genl_info *info)
         hdr = nl80211hdr_put(msg, info->snd_portid, info->snd_seq, 0,
                              NL80211_CMD_NEW_KEY);
         if (!hdr)
-                return -ENOBUFS;
+                goto nla_put_failure;
 
         cookie.msg = msg;
         cookie.idx = key_idx;
@@ -5349,6 +5349,10 @@ static int nl80211_trigger_scan(struct sk_buff *skb, struct genl_info *info)
                                 err = -EINVAL;
                                 goto out_free;
                         }
+
+                        if (!wiphy->bands[band])
+                                continue;
+
                         err = ieee80211_get_ratemask(wiphy->bands[band],
                                                      nla_data(attr),
                                                      nla_len(attr),
@@ -9633,8 +9637,9 @@ static int nl80211_add_scan_req(struct sk_buff *msg,
             nla_put(msg, NL80211_ATTR_IE, req->ie_len, req->ie))
                 goto nla_put_failure;
 
-        if (req->flags)
-                nla_put_u32(msg, NL80211_ATTR_SCAN_FLAGS, req->flags);
+        if (req->flags &&
+            nla_put_u32(msg, NL80211_ATTR_SCAN_FLAGS, req->flags))
+                goto nla_put_failure;
 
         return 0;
  nla_put_failure:
@@ -11093,6 +11098,8 @@ void cfg80211_report_wowlan_wakeup(struct wireless_dev *wdev,
                 struct nlattr *reasons;
 
                 reasons = nla_nest_start(msg, NL80211_ATTR_WOWLAN_TRIGGERS);
+                if (!reasons)
+                        goto free_msg;
 
                 if (wakeup->disconnect &&
                     nla_put_flag(msg, NL80211_WOWLAN_TRIG_DISCONNECT))
@@ -11118,16 +11125,18 @@ void cfg80211_report_wowlan_wakeup(struct wireless_dev *wdev,
                                 wakeup->pattern_idx))
                         goto free_msg;
 
-                if (wakeup->tcp_match)
-                        nla_put_flag(msg, NL80211_WOWLAN_TRIG_WAKEUP_TCP_MATCH);
+                if (wakeup->tcp_match &&
+                    nla_put_flag(msg, NL80211_WOWLAN_TRIG_WAKEUP_TCP_MATCH))
+                        goto free_msg;
 
-                if (wakeup->tcp_connlost)
-                        nla_put_flag(msg,
-                                     NL80211_WOWLAN_TRIG_WAKEUP_TCP_CONNLOST);
+                if (wakeup->tcp_connlost &&
+                    nla_put_flag(msg, NL80211_WOWLAN_TRIG_WAKEUP_TCP_CONNLOST))
+                        goto free_msg;
 
-                if (wakeup->tcp_nomoretokens)
-                        nla_put_flag(msg,
-                                NL80211_WOWLAN_TRIG_WAKEUP_TCP_NOMORETOKENS);
+                if (wakeup->tcp_nomoretokens &&
+                    nla_put_flag(msg,
+                                 NL80211_WOWLAN_TRIG_WAKEUP_TCP_NOMORETOKENS))
+                        goto free_msg;
 
                 if (wakeup->packet) {
                         u32 pkt_attr = NL80211_WOWLAN_TRIG_WAKEUP_PKT_80211;
@@ -11263,24 +11272,29 @@ void cfg80211_ft_event(struct net_device *netdev,
                 return;
 
         hdr = nl80211hdr_put(msg, 0, 0, 0, NL80211_CMD_FT_EVENT);
-        if (!hdr) {
-                nlmsg_free(msg);
-                return;
-        }
+        if (!hdr)
+                goto out;
 
-        nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx);
-        nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex);
-        nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, ft_event->target_ap);
-        if (ft_event->ies)
-                nla_put(msg, NL80211_ATTR_IE, ft_event->ies_len, ft_event->ies);
-        if (ft_event->ric_ies)
-                nla_put(msg, NL80211_ATTR_IE_RIC, ft_event->ric_ies_len,
-                        ft_event->ric_ies);
+        if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) ||
+            nla_put_u32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex) ||
+            nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, ft_event->target_ap))
+                goto out;
+
+        if (ft_event->ies &&
+            nla_put(msg, NL80211_ATTR_IE, ft_event->ies_len, ft_event->ies))
+                goto out;
+        if (ft_event->ric_ies &&
+            nla_put(msg, NL80211_ATTR_IE_RIC, ft_event->ric_ies_len,
+                    ft_event->ric_ies))
+                goto out;
 
         genlmsg_end(msg, hdr);
 
         genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0,
                                 NL80211_MCGRP_MLME, GFP_KERNEL);
+        return;
+ out:
+        nlmsg_free(msg);
 }
 EXPORT_SYMBOL(cfg80211_ft_event);
 
diff --git a/scripts/sortextable.c b/scripts/sortextable.c
index 5f7a8b663cb9..7941fbdfb050 100644
--- a/scripts/sortextable.c
+++ b/scripts/sortextable.c
@@ -31,6 +31,10 @@
 #include <tools/be_byteshift.h>
 #include <tools/le_byteshift.h>
 
+#ifndef EM_ARCOMPACT
+#define EM_ARCOMPACT    93
+#endif
+
 #ifndef EM_AARCH64
 #define EM_AARCH64      183
 #endif
@@ -268,6 +272,7 @@ do_file(char const *const fname)
         case EM_S390:
                 custom_sort = sort_relative_table;
                 break;
+        case EM_ARCOMPACT:
         case EM_ARM:
         case EM_AARCH64:
         case EM_MIPS:
diff --git a/security/keys/big_key.c b/security/keys/big_key.c
index 7f44c3207a9b..8137b27d641d 100644
--- a/security/keys/big_key.c
+++ b/security/keys/big_key.c
@@ -70,7 +70,7 @@ int big_key_instantiate(struct key *key, struct key_preparsed_payload *prep)
                  *
                  * TODO: Encrypt the stored data with a temporary key.
                  */
-                file = shmem_file_setup("", datalen, 0);
+                file = shmem_kernel_file_setup("", datalen, 0);
                 if (IS_ERR(file)) {
                         ret = PTR_ERR(file);
                         goto err_quota;
diff --git a/security/keys/key.c b/security/keys/key.c
index 55d110f0aced..6e21c11e48bc 100644
--- a/security/keys/key.c
+++ b/security/keys/key.c
@@ -272,7 +272,7 @@ struct key *key_alloc(struct key_type *type, const char *desc,
         }
 
         /* allocate and initialise the key and its description */
-        key = kmem_cache_alloc(key_jar, GFP_KERNEL);
+        key = kmem_cache_zalloc(key_jar, GFP_KERNEL);
         if (!key)
                 goto no_memory_2;
 
@@ -293,18 +293,12 @@ struct key *key_alloc(struct key_type *type, const char *desc,
         key->uid = uid;
         key->gid = gid;
         key->perm = perm;
-        key->flags = 0;
-        key->expiry = 0;
-        key->payload.data = NULL;
-        key->security = NULL;
 
         if (!(flags & KEY_ALLOC_NOT_IN_QUOTA))
                 key->flags |= 1 << KEY_FLAG_IN_QUOTA;
         if (flags & KEY_ALLOC_TRUSTED)
                 key->flags |= 1 << KEY_FLAG_TRUSTED;
 
-        memset(&key->type_data, 0, sizeof(key->type_data));
-
 #ifdef KEY_DEBUGGING
         key->magic = KEY_DEBUG_MAGIC;
 #endif
diff --git a/security/keys/keyring.c b/security/keys/keyring.c
index 69f0cb7bab7e..d46cbc5e335e 100644
--- a/security/keys/keyring.c
+++ b/security/keys/keyring.c
@@ -160,7 +160,7 @@ static u64 mult_64x32_and_fold(u64 x, u32 y)
 static unsigned long hash_key_type_and_desc(const struct keyring_index_key *index_key)
 {
         const unsigned level_shift = ASSOC_ARRAY_LEVEL_STEP;
-        const unsigned long level_mask = ASSOC_ARRAY_LEVEL_STEP_MASK;
+        const unsigned long fan_mask = ASSOC_ARRAY_FAN_MASK;
         const char *description = index_key->description;
         unsigned long hash, type;
         u32 piece;
@@ -194,10 +194,10 @@ static unsigned long hash_key_type_and_desc(const struct keyring_index_key *inde
          * ordinary keys by making sure the lowest level segment in the hash is
          * zero for keyrings and non-zero otherwise.
          */
-        if (index_key->type != &key_type_keyring && (hash & level_mask) == 0)
+        if (index_key->type != &key_type_keyring && (hash & fan_mask) == 0)
                 return hash | (hash >> (ASSOC_ARRAY_KEY_CHUNK_SIZE - level_shift)) | 1;
-        if (index_key->type == &key_type_keyring && (hash & level_mask) != 0)
-                return (hash + (hash << level_shift)) & ~level_mask;
+        if (index_key->type == &key_type_keyring && (hash & fan_mask) != 0)
+                return (hash + (hash << level_shift)) & ~fan_mask;
         return hash;
 }
 
@@ -279,12 +279,11 @@ static bool keyring_compare_object(const void *object, const void *data)
  * Compare the index keys of a pair of objects and determine the bit position
  * at which they differ - if they differ.
  */
-static int keyring_diff_objects(const void *_a, const void *_b)
+static int keyring_diff_objects(const void *object, const void *data)
 {
-        const struct key *key_a = keyring_ptr_to_key(_a);
-        const struct key *key_b = keyring_ptr_to_key(_b);
+        const struct key *key_a = keyring_ptr_to_key(object);
         const struct keyring_index_key *a = &key_a->index_key;
-        const struct keyring_index_key *b = &key_b->index_key;
+        const struct keyring_index_key *b = data;
         unsigned long seg_a, seg_b;
         int level, i;
 
@@ -691,8 +690,8 @@ descend_to_node:
                 smp_read_barrier_depends();
                 ptr = ACCESS_ONCE(shortcut->next_node);
                 BUG_ON(!assoc_array_ptr_is_node(ptr));
-                node = assoc_array_ptr_to_node(ptr);
         }
+        node = assoc_array_ptr_to_node(ptr);
 
 begin_node:
         kdebug("begin_node");
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index 794c3ca49eac..419491d8e7d2 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -53,6 +53,7 @@
 #include <net/ip.h>             /* for local_port_range[] */
 #include <net/sock.h>
 #include <net/tcp.h>            /* struct or_callable used in sock_rcv_skb */
+#include <net/inet_connection_sock.h>
 #include <net/net_namespace.h>
 #include <net/netlabel.h>
 #include <linux/uaccess.h>
@@ -95,10 +96,6 @@
 #include "audit.h"
 #include "avc_ss.h"
 
-#define SB_TYPE_FMT "%s%s%s"
-#define SB_SUBTYPE(sb) (sb->s_subtype && sb->s_subtype[0])
-#define SB_TYPE_ARGS(sb) sb->s_type->name, SB_SUBTYPE(sb) ? "." : "", SB_SUBTYPE(sb) ? sb->s_subtype : ""
-
 extern struct security_operations *security_ops;
 
 /* SECMARK reference count */
@@ -413,8 +410,8 @@ static int sb_finish_set_opts(struct super_block *sb)
                    the first boot of the SELinux kernel before we have
                    assigned xattr values to the filesystem. */
                 if (!root_inode->i_op->getxattr) {
-                        printk(KERN_WARNING "SELinux: (dev %s, type "SB_TYPE_FMT") has no "
-                               "xattr support\n", sb->s_id, SB_TYPE_ARGS(sb));
+                        printk(KERN_WARNING "SELinux: (dev %s, type %s) has no "
+                               "xattr support\n", sb->s_id, sb->s_type->name);
                         rc = -EOPNOTSUPP;
                         goto out;
                 }
@@ -422,22 +419,22 @@ static int sb_finish_set_opts(struct super_block *sb)
                 if (rc < 0 && rc != -ENODATA) {
                         if (rc == -EOPNOTSUPP)
                                 printk(KERN_WARNING "SELinux: (dev %s, type "
-                                       SB_TYPE_FMT") has no security xattr handler\n",
-                                       sb->s_id, SB_TYPE_ARGS(sb));
+                                       "%s) has no security xattr handler\n",
+                                       sb->s_id, sb->s_type->name);
                         else
                                 printk(KERN_WARNING "SELinux: (dev %s, type "
-                                       SB_TYPE_FMT") getxattr errno %d\n", sb->s_id,
-                                       SB_TYPE_ARGS(sb), -rc);
+                                       "%s) getxattr errno %d\n", sb->s_id,
+                                       sb->s_type->name, -rc);
                         goto out;
                 }
         }
 
         if (sbsec->behavior > ARRAY_SIZE(labeling_behaviors))
-                printk(KERN_ERR "SELinux: initialized (dev %s, type "SB_TYPE_FMT"), unknown behavior\n",
-                       sb->s_id, SB_TYPE_ARGS(sb));
+                printk(KERN_ERR "SELinux: initialized (dev %s, type %s), unknown behavior\n",
+                       sb->s_id, sb->s_type->name);
         else
-                printk(KERN_DEBUG "SELinux: initialized (dev %s, type "SB_TYPE_FMT"), %s\n",
-                       sb->s_id, SB_TYPE_ARGS(sb),
+                printk(KERN_DEBUG "SELinux: initialized (dev %s, type %s), %s\n",
+                       sb->s_id, sb->s_type->name,
                        labeling_behaviors[sbsec->behavior-1]);
 
         sbsec->flags |= SE_SBINITIALIZED;
@@ -600,6 +597,7 @@ static int selinux_set_mnt_opts(struct super_block *sb,
         const struct cred *cred = current_cred();
         int rc = 0, i;
         struct superblock_security_struct *sbsec = sb->s_security;
+        const char *name = sb->s_type->name;
         struct inode *inode = sbsec->sb->s_root->d_inode;
         struct inode_security_struct *root_isec = inode->i_security;
         u32 fscontext_sid = 0, context_sid = 0, rootcontext_sid = 0;
@@ -658,8 +656,8 @@ static int selinux_set_mnt_opts(struct super_block *sb,
                                              strlen(mount_options[i]), &sid);
                 if (rc) {
                         printk(KERN_WARNING "SELinux: security_context_to_sid"
-                               "(%s) failed for (dev %s, type "SB_TYPE_FMT") errno=%d\n",
-                               mount_options[i], sb->s_id, SB_TYPE_ARGS(sb), rc);
+                               "(%s) failed for (dev %s, type %s) errno=%d\n",
+                               mount_options[i], sb->s_id, name, rc);
                         goto out;
                 }
                 switch (flags[i]) {
@@ -806,8 +804,7 @@ out:
 out_double_mount:
         rc = -EINVAL;
         printk(KERN_WARNING "SELinux: mount invalid.  Same superblock, different "
-               "security settings for (dev %s, type "SB_TYPE_FMT")\n", sb->s_id,
-               SB_TYPE_ARGS(sb));
+               "security settings for (dev %s, type %s)\n", sb->s_id, name);
         goto out;
 }
 
@@ -2480,8 +2477,8 @@ static int selinux_sb_remount(struct super_block *sb, void *data)
                 rc = security_context_to_sid(mount_options[i], len, &sid);
                 if (rc) {
                         printk(KERN_WARNING "SELinux: security_context_to_sid"
-                               "(%s) failed for (dev %s, type "SB_TYPE_FMT") errno=%d\n",
-                               mount_options[i], sb->s_id, SB_TYPE_ARGS(sb), rc);
+                               "(%s) failed for (dev %s, type %s) errno=%d\n",
+                               mount_options[i], sb->s_id, sb->s_type->name, rc);
                         goto out_free_opts;
                 }
                 rc = -EINVAL;
@@ -2519,8 +2516,8 @@ out_free_secdata:
         return rc;
 out_bad_option:
         printk(KERN_WARNING "SELinux: unable to change security options "
-               "during remount (dev %s, type "SB_TYPE_FMT")\n", sb->s_id,
-               SB_TYPE_ARGS(sb));
+               "during remount (dev %s, type=%s)\n", sb->s_id,
+               sb->s_type->name);
         goto out_free_opts;
 }
 
@@ -3828,7 +3825,7 @@ static int selinux_skb_peerlbl_sid(struct sk_buff *skb, u16 family, u32 *sid)
         u32 nlbl_sid;
         u32 nlbl_type;
 
-        err = selinux_skb_xfrm_sid(skb, &xfrm_sid);
+        err = selinux_xfrm_skb_sid(skb, &xfrm_sid);
         if (unlikely(err))
                 return -EACCES;
         err = selinux_netlbl_skbuff_getsid(skb, family, &nlbl_type, &nlbl_sid);
@@ -3846,6 +3843,30 @@ static int selinux_skb_peerlbl_sid(struct sk_buff *skb, u16 family, u32 *sid)
         return 0;
 }
 
+/**
+ * selinux_conn_sid - Determine the child socket label for a connection
+ * @sk_sid: the parent socket's SID
+ * @skb_sid: the packet's SID
+ * @conn_sid: the resulting connection SID
+ *
+ * If @skb_sid is valid then the user:role:type information from @sk_sid is
+ * combined with the MLS information from @skb_sid in order to create
+ * @conn_sid.  If @skb_sid is not valid then then @conn_sid is simply a copy
+ * of @sk_sid.  Returns zero on success, negative values on failure.
+ *
+ */
+static int selinux_conn_sid(u32 sk_sid, u32 skb_sid, u32 *conn_sid)
+{
+        int err = 0;
+
+        if (skb_sid != SECSID_NULL)
+                err = security_sid_mls_copy(sk_sid, skb_sid, conn_sid);
+        else
+                *conn_sid = sk_sid;
+
+        return err;
+}
+
 /* socket security operations */
 
 static int socket_sockcreate_sid(const struct task_security_struct *tsec,
@@ -4452,7 +4473,7 @@ static int selinux_inet_conn_request(struct sock *sk, struct sk_buff *skb,
         struct sk_security_struct *sksec = sk->sk_security;
         int err;
         u16 family = sk->sk_family;
-        u32 newsid;
+        u32 connsid;
         u32 peersid;
 
         /* handle mapped IPv4 packets arriving via IPv6 sockets */
@@ -4462,16 +4483,11 @@ static int selinux_inet_conn_request(struct sock *sk, struct sk_buff *skb,
         err = selinux_skb_peerlbl_sid(skb, family, &peersid);
         if (err)
                 return err;
-        if (peersid == SECSID_NULL) {
-                req->secid = sksec->sid;
-                req->peer_secid = SECSID_NULL;
-        } else {
-                err = security_sid_mls_copy(sksec->sid, peersid, &newsid);
-                if (err)
-                        return err;
-                req->secid = newsid;
-                req->peer_secid = peersid;
-        }
+        err = selinux_conn_sid(sksec->sid, peersid, &connsid);
+        if (err)
+                return err;
+        req->secid = connsid;
+        req->peer_secid = peersid;
 
         return selinux_netlbl_inet_conn_request(req, family);
 }
@@ -4731,6 +4747,7 @@ static unsigned int selinux_ipv6_forward(const struct nf_hook_ops *ops,
 static unsigned int selinux_ip_output(struct sk_buff *skb,
                                       u16 family)
 {
+        struct sock *sk;
         u32 sid;
 
         if (!netlbl_enabled())
@@ -4739,8 +4756,27 @@ static unsigned int selinux_ip_output(struct sk_buff *skb,
         /* we do this in the LOCAL_OUT path and not the POST_ROUTING path
          * because we want to make sure we apply the necessary labeling
          * before IPsec is applied so we can leverage AH protection */
-        if (skb->sk) {
-                struct sk_security_struct *sksec = skb->sk->sk_security;
+        sk = skb->sk;
+        if (sk) {
+                struct sk_security_struct *sksec;
+
+                if (sk->sk_state == TCP_LISTEN)
+                        /* if the socket is the listening state then this
+                         * packet is a SYN-ACK packet which means it needs to
+                         * be labeled based on the connection/request_sock and
+                         * not the parent socket.  unfortunately, we can't
+                         * lookup the request_sock yet as it isn't queued on
+                         * the parent socket until after the SYN-ACK is sent.
+                         * the "solution" is to simply pass the packet as-is
+                         * as any IP option based labeling should be copied
+                         * from the initial connection request (in the IP
+                         * layer).  it is far from ideal, but until we get a
+                         * security label in the packet itself this is the
+                         * best we can do. */
+                        return NF_ACCEPT;
+
+                /* standard practice, label using the parent socket */
+                sksec = sk->sk_security;
                 sid = sksec->sid;
         } else
                 sid = SECINITSID_KERNEL;
@@ -4810,27 +4846,36 @@ static unsigned int selinux_ip_postroute(struct sk_buff *skb, int ifindex,
          * as fast and as clean as possible. */
         if (!selinux_policycap_netpeer)
                 return selinux_ip_postroute_compat(skb, ifindex, family);
+
+        secmark_active = selinux_secmark_enabled();
+        peerlbl_active = selinux_peerlbl_enabled();
+        if (!secmark_active && !peerlbl_active)
+                return NF_ACCEPT;
+
+        sk = skb->sk;
+
 #ifdef CONFIG_XFRM
         /* If skb->dst->xfrm is non-NULL then the packet is undergoing an IPsec
          * packet transformation so allow the packet to pass without any checks
          * since we'll have another chance to perform access control checks
          * when the packet is on it's final way out.
          * NOTE: there appear to be some IPv6 multicast cases where skb->dst
-         *       is NULL, in this case go ahead and apply access control. */
-        if (skb_dst(skb) != NULL && skb_dst(skb)->xfrm != NULL)
+         *       is NULL, in this case go ahead and apply access control.
+         * NOTE: if this is a local socket (skb->sk != NULL) that is in the
+         *       TCP listening state we cannot wait until the XFRM processing
+         *       is done as we will miss out on the SA label if we do;
+         *       unfortunately, this means more work, but it is only once per
+         *       connection. */
+        if (skb_dst(skb) != NULL && skb_dst(skb)->xfrm != NULL &&
+            !(sk != NULL && sk->sk_state == TCP_LISTEN))
                 return NF_ACCEPT;
 #endif
-        secmark_active = selinux_secmark_enabled();
-        peerlbl_active = selinux_peerlbl_enabled();
-        if (!secmark_active && !peerlbl_active)
-                return NF_ACCEPT;
 
-        /* if the packet is being forwarded then get the peer label from the
-         * packet itself; otherwise check to see if it is from a local
-         * application or the kernel, if from an application get the peer label
-         * from the sending socket, otherwise use the kernel's sid */
-        sk = skb->sk;
         if (sk == NULL) {
+                /* Without an associated socket the packet is either coming
+                 * from the kernel or it is being forwarded; check the packet
+                 * to determine which and if the packet is being forwarded
+                 * query the packet directly to determine the security label. */
                 if (skb->skb_iif) {
                         secmark_perm = PACKET__FORWARD_OUT;
                         if (selinux_skb_peerlbl_sid(skb, family, &peer_sid))
@@ -4839,7 +4884,45 @@ static unsigned int selinux_ip_postroute(struct sk_buff *skb, int ifindex,
                         secmark_perm = PACKET__SEND;
                         peer_sid = SECINITSID_KERNEL;
                 }
+        } else if (sk->sk_state == TCP_LISTEN) {
+                /* Locally generated packet but the associated socket is in the
+                 * listening state which means this is a SYN-ACK packet.  In
+                 * this particular case the correct security label is assigned
+                 * to the connection/request_sock but unfortunately we can't
+                 * query the request_sock as it isn't queued on the parent
+                 * socket until after the SYN-ACK packet is sent; the only
+                 * viable choice is to regenerate the label like we do in
+                 * selinux_inet_conn_request().  See also selinux_ip_output()
+                 * for similar problems. */
+                u32 skb_sid;
+                struct sk_security_struct *sksec = sk->sk_security;
+                if (selinux_skb_peerlbl_sid(skb, family, &skb_sid))
+                        return NF_DROP;
+                /* At this point, if the returned skb peerlbl is SECSID_NULL
+                 * and the packet has been through at least one XFRM
+                 * transformation then we must be dealing with the "final"
+                 * form of labeled IPsec packet; since we've already applied
+                 * all of our access controls on this packet we can safely
+                 * pass the packet. */
+                if (skb_sid == SECSID_NULL) {
+                        switch (family) {
+                        case PF_INET:
+                                if (IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED)
+                                        return NF_ACCEPT;
+                                break;
+                        case PF_INET6:
+                                if (IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED)
+                                        return NF_ACCEPT;
+                        default:
+                                return NF_DROP_ERR(-ECONNREFUSED);
+                        }
+                }
+                if (selinux_conn_sid(sksec->sid, skb_sid, &peer_sid))
+                        return NF_DROP;
+                secmark_perm = PACKET__SEND;
         } else {
+                /* Locally generated packet, fetch the security label from the
+                 * associated socket. */
                 struct sk_security_struct *sksec = sk->sk_security;
                 peer_sid = sksec->sid;
                 secmark_perm = PACKET__SEND;
diff --git a/security/selinux/include/xfrm.h b/security/selinux/include/xfrm.h
index 0dec76c64cf5..48c3cc94c168 100644
--- a/security/selinux/include/xfrm.h
+++ b/security/selinux/include/xfrm.h
@@ -39,6 +39,7 @@ int selinux_xfrm_sock_rcv_skb(u32 sk_sid, struct sk_buff *skb,
 int selinux_xfrm_postroute_last(u32 sk_sid, struct sk_buff *skb,
                                 struct common_audit_data *ad, u8 proto);
 int selinux_xfrm_decode_session(struct sk_buff *skb, u32 *sid, int ckall);
+int selinux_xfrm_skb_sid(struct sk_buff *skb, u32 *sid);
 
 static inline void selinux_xfrm_notify_policyload(void)
 {
@@ -79,11 +80,12 @@ static inline int selinux_xfrm_decode_session(struct sk_buff *skb, u32 *sid,
 static inline void selinux_xfrm_notify_policyload(void)
 {
 }
-#endif
 
-static inline int selinux_skb_xfrm_sid(struct sk_buff *skb, u32 *sid)
+static inline int selinux_xfrm_skb_sid(struct sk_buff *skb, u32 *sid)
 {
-        return selinux_xfrm_decode_session(skb, sid, 0);
+        *sid = SECSID_NULL;
+        return 0;
 }
+#endif
 
 #endif /* _SELINUX_XFRM_H_ */
diff --git a/security/selinux/ss/services.c b/security/selinux/ss/services.c
index ee470a0b5c27..d106733ad987 100644
--- a/security/selinux/ss/services.c
+++ b/security/selinux/ss/services.c
@@ -2334,50 +2334,16 @@ int security_fs_use(struct super_block *sb)
         struct ocontext *c;
         struct superblock_security_struct *sbsec = sb->s_security;
         const char *fstype = sb->s_type->name;
-        const char *subtype = (sb->s_subtype && sb->s_subtype[0]) ? sb->s_subtype : NULL;
-        struct ocontext *base = NULL;
 
         read_lock(&policy_rwlock);
 
-        for (c = policydb.ocontexts[OCON_FSUSE]; c; c = c->next) {
-                char *sub;
-                int baselen;
-
-                baselen = strlen(fstype);
-
-                /* if base does not match, this is not the one */
-                if (strncmp(fstype, c->u.name, baselen))
-                        continue;
-
-                /* if there is no subtype, this is the one! */
-                if (!subtype)
-                        break;
-
-                /* skip past the base in this entry */
-                sub = c->u.name + baselen;
-
-                /* entry is only a base. save it. keep looking for subtype */
-                if (sub[0] == '\0') {
-                        base = c;
-                        continue;
-                }
-
-                /* entry is not followed by a subtype, so it is not a match */
-                if (sub[0] != '.')
-                        continue;
-
-                /* whew, we found a subtype of this fstype */
-                sub++; /* move past '.' */
-
-                /* exact match of fstype AND subtype */
-                if (!strcmp(subtype, sub))
+        c = policydb.ocontexts[OCON_FSUSE];
+        while (c) {
+                if (strcmp(fstype, c->u.name) == 0)
                         break;
+                c = c->next;
         }
 
-        /* in case we had found an fstype match but no subtype match */
-        if (!c)
-                c = base;
-
         if (c) {
                 sbsec->behavior = c->v.behavior;
                 if (!c->sid[0]) {
diff --git a/security/selinux/xfrm.c b/security/selinux/xfrm.c
index a91d205ec0c6..0462cb3ff0a7 100644
--- a/security/selinux/xfrm.c
+++ b/security/selinux/xfrm.c
@@ -209,19 +209,26 @@ int selinux_xfrm_state_pol_flow_match(struct xfrm_state *x,
                             NULL) ? 0 : 1);
 }
 
-/*
- * LSM hook implementation that checks and/or returns the xfrm sid for the
- * incoming packet.
- */
-int selinux_xfrm_decode_session(struct sk_buff *skb, u32 *sid, int ckall)
+static u32 selinux_xfrm_skb_sid_egress(struct sk_buff *skb)
 {
-        u32 sid_session = SECSID_NULL;
-        struct sec_path *sp;
+        struct dst_entry *dst = skb_dst(skb);
+        struct xfrm_state *x;
 
-        if (skb == NULL)
-                goto out;
+        if (dst == NULL)
+                return SECSID_NULL;
+        x = dst->xfrm;
+        if (x == NULL || !selinux_authorizable_xfrm(x))
+                return SECSID_NULL;
+
+        return x->security->ctx_sid;
+}
+
+static int selinux_xfrm_skb_sid_ingress(struct sk_buff *skb,
+                                        u32 *sid, int ckall)
+{
+        u32 sid_session = SECSID_NULL;
+        struct sec_path *sp = skb->sp;
 
-        sp = skb->sp;
         if (sp) {
                 int i;
 
@@ -248,6 +255,30 @@ out:
 }
 
 /*
+ * LSM hook implementation that checks and/or returns the xfrm sid for the
+ * incoming packet.
+ */
+int selinux_xfrm_decode_session(struct sk_buff *skb, u32 *sid, int ckall)
+{
+        if (skb == NULL) {
+                *sid = SECSID_NULL;
+                return 0;
+        }
+        return selinux_xfrm_skb_sid_ingress(skb, sid, ckall);
+}
+
+int selinux_xfrm_skb_sid(struct sk_buff *skb, u32 *sid)
+{
+        int rc;
+
+        rc = selinux_xfrm_skb_sid_ingress(skb, sid, 0);
+        if (rc == 0 && *sid == SECSID_NULL)
+                *sid = selinux_xfrm_skb_sid_egress(skb);
+
+        return rc;
+}
+
+/*
  * LSM hook implementation that allocs and transfers uctx spec to xfrm_policy.
  */
 int selinux_xfrm_policy_alloc(struct xfrm_sec_ctx **ctxp,
@@ -327,19 +358,22 @@ int selinux_xfrm_state_alloc_acquire(struct xfrm_state *x,
                 return rc;
 
         ctx = kmalloc(sizeof(*ctx) + str_len, GFP_ATOMIC);
-        if (!ctx)
-                return -ENOMEM;
+        if (!ctx) {
+                rc = -ENOMEM;
+                goto out;
+        }
 
         ctx->ctx_doi = XFRM_SC_DOI_LSM;
         ctx->ctx_alg = XFRM_SC_ALG_SELINUX;
         ctx->ctx_sid = secid;
         ctx->ctx_len = str_len;
         memcpy(ctx->ctx_str, ctx_str, str_len);
-        kfree(ctx_str);
 
         x->security = ctx;
         atomic_inc(&selinux_xfrm_refcount);
-        return 0;
+out:
+        kfree(ctx_str);
+        return rc;
 }
 
 /*
diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c
index c4671d00babd..c7f6d1cab606 100644
--- a/sound/pci/hda/hda_generic.c
+++ b/sound/pci/hda/hda_generic.c
@@ -474,6 +474,20 @@ static void invalidate_nid_path(struct hda_codec *codec, int idx)
         memset(path, 0, sizeof(*path));
 }
 
+/* return a DAC if paired to the given pin by codec driver */
+static hda_nid_t get_preferred_dac(struct hda_codec *codec, hda_nid_t pin)
+{
+        struct hda_gen_spec *spec = codec->spec;
+        const hda_nid_t *list = spec->preferred_dacs;
+
+        if (!list)
+                return 0;
+        for (; *list; list += 2)
+                if (*list == pin)
+                        return list[1];
+        return 0;
+}
+
 /* look for an empty DAC slot */
 static hda_nid_t look_for_dac(struct hda_codec *codec, hda_nid_t pin,
                               bool is_digital)
@@ -1192,7 +1206,14 @@ static int try_assign_dacs(struct hda_codec *codec, int num_outs,
                         continue;
                 }
 
-                dacs[i] = look_for_dac(codec, pin, false);
+                dacs[i] = get_preferred_dac(codec, pin);
+                if (dacs[i]) {
+                        if (is_dac_already_used(codec, dacs[i]))
+                                badness += bad->shared_primary;
+                }
+
+                if (!dacs[i])
+                        dacs[i] = look_for_dac(codec, pin, false);
                 if (!dacs[i] && !i) {
                         /* try to steal the DAC of surrounds for the front */
                         for (j = 1; j < num_outs; j++) {
@@ -4297,6 +4318,26 @@ static unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec,
         return AC_PWRST_D3;
 }
 
+/* mute all aamix inputs initially; parse up to the first leaves */
+static void mute_all_mixer_nid(struct hda_codec *codec, hda_nid_t mix)
+{
+        int i, nums;
+        const hda_nid_t *conn;
+        bool has_amp;
+
+        nums = snd_hda_get_conn_list(codec, mix, &conn);
+        has_amp = nid_has_mute(codec, mix, HDA_INPUT);
+        for (i = 0; i < nums; i++) {
+                if (has_amp)
+                        snd_hda_codec_amp_stereo(codec, mix,
+                                                 HDA_INPUT, i,
+                                                 0xff, HDA_AMP_MUTE);
+                else if (nid_has_volume(codec, conn[i], HDA_OUTPUT))
+                        snd_hda_codec_amp_stereo(codec, conn[i],
+                                                 HDA_OUTPUT, 0,
+                                                 0xff, HDA_AMP_MUTE);
+        }
+}
 
 /*
  * Parse the given BIOS configuration and set up the hda_gen_spec
@@ -4435,6 +4476,10 @@ int snd_hda_gen_parse_auto_config(struct hda_codec *codec,
                 }
         }
 
+        /* mute all aamix input initially */
+        if (spec->mixer_nid)
+                mute_all_mixer_nid(codec, spec->mixer_nid);
+
  dig_only:
         parse_digital(codec);
 
diff --git a/sound/pci/hda/hda_generic.h b/sound/pci/hda/hda_generic.h
index 7e45cb44d151..0929a06df812 100644
--- a/sound/pci/hda/hda_generic.h
+++ b/sound/pci/hda/hda_generic.h
@@ -249,6 +249,9 @@ struct hda_gen_spec {
         const struct badness_table *main_out_badness;
         const struct badness_table *extra_out_badness;
 
+        /* preferred pin/DAC pairs; an array of paired NIDs */
+        const hda_nid_t *preferred_dacs;
+
         /* loopback mixing mode */
         bool aamix_mode;
 
diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c
index cac015be3325..699262a3e07a 100644
--- a/sound/pci/hda/patch_analog.c
+++ b/sound/pci/hda/patch_analog.c
@@ -340,6 +340,14 @@ static int patch_ad1986a(struct hda_codec *codec)
 {
         int err;
         struct ad198x_spec *spec;
+        static hda_nid_t preferred_pairs[] = {
+                0x1a, 0x03,
+                0x1b, 0x03,
+                0x1c, 0x04,
+                0x1d, 0x05,
+                0x1e, 0x03,
+                0
+        };
 
         err = alloc_ad_spec(codec);
         if (err < 0)
@@ -360,6 +368,8 @@ static int patch_ad1986a(struct hda_codec *codec)
          * So, let's disable the shared stream.
          */
         spec->gen.multiout.no_share_stream = 1;
+        /* give fixed DAC/pin pairs */
+        spec->gen.preferred_dacs = preferred_pairs;
 
         /* AD1986A can't manage the dynamic pin on/off smoothly */
         spec->gen.auto_mute_via_amp = 1;
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index 1f2717f817a0..3fbf2883e06e 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -2936,7 +2936,6 @@ static const struct snd_pci_quirk cxt5066_cfg_tbl[] = {
         SND_PCI_QUIRK(0x1028, 0x0401, "Dell Vostro 1014", CXT5066_DELL_VOSTRO),
         SND_PCI_QUIRK(0x1028, 0x0408, "Dell Inspiron One 19T", CXT5066_IDEAPAD),
         SND_PCI_QUIRK(0x1028, 0x050f, "Dell Inspiron", CXT5066_IDEAPAD),
-        SND_PCI_QUIRK(0x1028, 0x0510, "Dell Vostro", CXT5066_IDEAPAD),
         SND_PCI_QUIRK(0x103c, 0x360b, "HP G60", CXT5066_HP_LAPTOP),
         SND_PCI_QUIRK(0x1043, 0x13f3, "Asus A52J", CXT5066_ASUS),
         SND_PCI_QUIRK(0x1043, 0x1643, "Asus K52JU", CXT5066_ASUS),
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index c4a66ef6cf6f..f281c8068557 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -2337,8 +2337,9 @@ static int simple_playback_build_controls(struct hda_codec *codec)
         int err;
 
         per_cvt = get_cvt(spec, 0);
-        err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
-                                            per_cvt->cvt_nid);
+        err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
+                                          per_cvt->cvt_nid,
+                                          HDA_PCM_TYPE_HDMI);
         if (err < 0)
                 return err;
         return simple_hdmi_build_jack(codec, 0);
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index c5ea483d7559..34de5dc2fe9b 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -3849,6 +3849,7 @@ enum {
         ALC269_FIXUP_ASUS_X101,
         ALC271_FIXUP_AMIC_MIC2,
         ALC271_FIXUP_HP_GATE_MIC_JACK,
+        ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572,
         ALC269_FIXUP_ACER_AC700,
         ALC269_FIXUP_LIMIT_INT_MIC_BOOST,
         ALC269VB_FIXUP_ASUS_ZENBOOK,
@@ -4111,6 +4112,12 @@ static const struct hda_fixup alc269_fixups[] = {
                 .chained = true,
                 .chain_id = ALC271_FIXUP_AMIC_MIC2,
         },
+        [ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572] = {
+                .type = HDA_FIXUP_FUNC,
+                .v.func = alc269_fixup_limit_int_mic_boost,
+                .chained = true,
+                .chain_id = ALC271_FIXUP_HP_GATE_MIC_JACK,
+        },
         [ALC269_FIXUP_ACER_AC700] = {
                 .type = HDA_FIXUP_PINS,
                 .v.pins = (const struct hda_pintbl[]) {
@@ -4208,6 +4215,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
         SND_PCI_QUIRK(0x1025, 0x0740, "Acer AO725", ALC271_FIXUP_HP_GATE_MIC_JACK),
         SND_PCI_QUIRK(0x1025, 0x0742, "Acer AO756", ALC271_FIXUP_HP_GATE_MIC_JACK),
         SND_PCI_QUIRK_VENDOR(0x1025, "Acer Aspire", ALC271_FIXUP_DMIC),
+        SND_PCI_QUIRK(0x1025, 0x0775, "Acer Aspire E1-572", ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572),
         SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z),
         SND_PCI_QUIRK(0x1028, 0x05bd, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x1028, 0x05be, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
@@ -5034,8 +5042,11 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = {
         SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE),
         SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
+        SND_PCI_QUIRK(0x1028, 0x0623, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
+        SND_PCI_QUIRK(0x1028, 0x0624, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x1028, 0x0625, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
+        SND_PCI_QUIRK(0x1028, 0x0628, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800),
         SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_BASS_1A_CHMAP),
         SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_CHMAP),
diff --git a/sound/soc/soc-devres.c b/sound/soc/soc-devres.c
index 3449c1e909ae..7ac745df1412 100644
--- a/sound/soc/soc-devres.c
+++ b/sound/soc/soc-devres.c
@@ -12,6 +12,7 @@
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <sound/soc.h>
+#include <sound/dmaengine_pcm.h>
 
 static void devm_component_release(struct device *dev, void *res)
 {
@@ -84,3 +85,43 @@ int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card)
         return ret;
 }
 EXPORT_SYMBOL_GPL(devm_snd_soc_register_card);
+
+#ifdef CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM
+
+static void devm_dmaengine_pcm_release(struct device *dev, void *res)
+{
+        snd_dmaengine_pcm_unregister(*(struct device **)res);
+}
+
+/**
+ * devm_snd_dmaengine_pcm_register - resource managed dmaengine PCM registration
+ * @dev: The parent device for the PCM device
+ * @config: Platform specific PCM configuration
+ * @flags: Platform specific quirks
+ *
+ * Register a dmaengine based PCM device with automatic unregistration when the
+ * device is unregistered.
+ */
+int devm_snd_dmaengine_pcm_register(struct device *dev,
+        const struct snd_dmaengine_pcm_config *config, unsigned int flags)
+{
+        struct device **ptr;
+        int ret;
+
+        ptr = devres_alloc(devm_dmaengine_pcm_release, sizeof(*ptr), GFP_KERNEL);
+        if (!ptr)
+                return -ENOMEM;
+
+        ret = snd_dmaengine_pcm_register(dev, config, flags);
+        if (ret == 0) {
+                *ptr = dev;
+                devres_add(dev, ptr);
+        } else {
+                devres_free(ptr);
+        }
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(devm_snd_dmaengine_pcm_register);
+
+#endif
diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c
index cbc9c96ce1f4..7483922f6ee3 100644
--- a/sound/soc/soc-generic-dmaengine-pcm.c
+++ b/sound/soc/soc-generic-dmaengine-pcm.c
@@ -137,6 +137,9 @@ static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substrea
         hw.buffer_bytes_max = SIZE_MAX;
         hw.fifo_size = dma_data->fifo_size;
 
+        if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
+                hw.info |= SNDRV_PCM_INFO_BATCH;
+
         ret = dma_get_slave_caps(chan, &dma_caps);
         if (ret == 0) {
                 if (dma_caps.cmd_pause)
@@ -284,24 +287,67 @@ static const char * const dmaengine_pcm_dma_channel_names[] = {
         [SNDRV_PCM_STREAM_CAPTURE] = "rx",
 };
 
-static void dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm,
-        struct device *dev)
+static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm,
+        struct device *dev, const struct snd_dmaengine_pcm_config *config)
 {
         unsigned int i;
+        const char *name;
+        struct dma_chan *chan;
 
         if ((pcm->flags & (SND_DMAENGINE_PCM_FLAG_NO_DT |
                            SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) ||
             !dev->of_node)
-                return;
+                return 0;
+
+        if (config->dma_dev) {
+                /*
+                 * If this warning is seen, it probably means that your Linux
+                 * device structure does not match your HW device structure.
+                 * It would be best to refactor the Linux device structure to
+                 * correctly match the HW structure.
+                 */
+                dev_warn(dev, "DMA channels sourced from device %s",
+                         dev_name(config->dma_dev));
+                dev = config->dma_dev;
+        }
 
-        if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) {
-                pcm->chan[0] = dma_request_slave_channel(dev, "rx-tx");
-                pcm->chan[1] = pcm->chan[0];
-        } else {
-                for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; i++) {
-                        pcm->chan[i] = dma_request_slave_channel(dev,
-                                        dmaengine_pcm_dma_channel_names[i]);
+        for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE;
+             i++) {
+                if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
+                        name = "rx-tx";
+                else
+                        name = dmaengine_pcm_dma_channel_names[i];
+                if (config->chan_names[i])
+                        name = config->chan_names[i];
+                chan = dma_request_slave_channel_reason(dev, name);
+                if (IS_ERR(chan)) {
+                        if (PTR_ERR(chan) == -EPROBE_DEFER)
+                                return -EPROBE_DEFER;
+                        pcm->chan[i] = NULL;
+                } else {
+                        pcm->chan[i] = chan;
                 }
+                if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
+                        break;
+        }
+
+        if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
+                pcm->chan[1] = pcm->chan[0];
+
+        return 0;
+}
+
+static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm)
+{
+        unsigned int i;
+
+        for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE;
+             i++) {
+                if (!pcm->chan[i])
+                        continue;
+                dma_release_channel(pcm->chan[i]);
+                if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
+                        break;
         }
 }
 
@@ -315,6 +361,7 @@ int snd_dmaengine_pcm_register(struct device *dev,
         const struct snd_dmaengine_pcm_config *config, unsigned int flags)
 {
         struct dmaengine_pcm *pcm;
+        int ret;
 
         pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
         if (!pcm)
@@ -323,14 +370,25 @@ int snd_dmaengine_pcm_register(struct device *dev,
         pcm->config = config;
         pcm->flags = flags;
 
-        dmaengine_pcm_request_chan_of(pcm, dev);
+        ret = dmaengine_pcm_request_chan_of(pcm, dev, config);
+        if (ret)
+                goto err_free_dma;
 
         if (flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
-                return snd_soc_add_platform(dev, &pcm->platform,
+                ret = snd_soc_add_platform(dev, &pcm->platform,
                                 &dmaengine_no_residue_pcm_platform);
         else
-                return snd_soc_add_platform(dev, &pcm->platform,
+                ret = snd_soc_add_platform(dev, &pcm->platform,
                                 &dmaengine_pcm_platform);
+        if (ret)
+                goto err_free_dma;
+
+        return 0;
+
+err_free_dma:
+        dmaengine_pcm_release_chan(pcm);
+        kfree(pcm);
+        return ret;
 }
 EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register);
 
@@ -345,7 +403,6 @@ void snd_dmaengine_pcm_unregister(struct device *dev)
 {
         struct snd_soc_platform *platform;
         struct dmaengine_pcm *pcm;
-        unsigned int i;
 
         platform = snd_soc_lookup_platform(dev);
         if (!platform)
@@ -353,15 +410,8 @@ void snd_dmaengine_pcm_unregister(struct device *dev)
 
         pcm = soc_platform_to_pcm(platform);
 
-        for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; i++) {
-                if (pcm->chan[i]) {
-                        dma_release_channel(pcm->chan[i]);
-                        if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
-                                break;
-                }
-        }
-
         snd_soc_remove_platform(platform);
+        dmaengine_pcm_release_chan(pcm);
         kfree(pcm);
 }
 EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister);
diff --git a/sound/soc/tegra/Kconfig b/sound/soc/tegra/Kconfig
index 8fc653ca3ab4..896292bb853f 100644
--- a/sound/soc/tegra/Kconfig
+++ b/sound/soc/tegra/Kconfig
@@ -1,6 +1,8 @@
 config SND_SOC_TEGRA
         tristate "SoC Audio for the Tegra System-on-Chip"
         depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
+        depends on COMMON_CLK
+        depends on RESET_CONTROLLER
         select REGMAP_MMIO
         select SND_SOC_GENERIC_DMAENGINE_PCM
         help
diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c
index ae27bcd586d2..d8b98d70ff41 100644
--- a/sound/soc/tegra/tegra20_ac97.c
+++ b/sound/soc/tegra/tegra20_ac97.c
@@ -313,7 +313,6 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev)
 {
         struct tegra20_ac97 *ac97;
         struct resource *mem;
-        u32 of_dma[2];
         void __iomem *regs;
         int ret = 0;
 
@@ -348,14 +347,6 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev)
                 goto err_clk_put;
         }
 
-        if (of_property_read_u32_array(pdev->dev.of_node,
-                                       "nvidia,dma-request-selector",
-                                       of_dma, 2) < 0) {
-                dev_err(&pdev->dev, "No DMA resource\n");
-                ret = -ENODEV;
-                goto err_clk_put;
-        }
-
         ac97->reset_gpio = of_get_named_gpio(pdev->dev.of_node,
                                              "nvidia,codec-reset-gpio", 0);
         if (gpio_is_valid(ac97->reset_gpio)) {
@@ -380,12 +371,10 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev)
         ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;
         ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
         ac97->capture_dma_data.maxburst = 4;
-        ac97->capture_dma_data.slave_id = of_dma[1];
 
         ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;
         ac97->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
         ac97->playback_dma_data.maxburst = 4;
-        ac97->playback_dma_data.slave_id = of_dma[1];
 
         ret = tegra_asoc_utils_init(&ac97->util_data, &pdev->dev);
         if (ret)
diff --git a/sound/soc/tegra/tegra20_i2s.c b/sound/soc/tegra/tegra20_i2s.c
index 364bf6a907e1..1dc869c475e7 100644
--- a/sound/soc/tegra/tegra20_i2s.c
+++ b/sound/soc/tegra/tegra20_i2s.c
@@ -339,9 +339,7 @@ static const struct regmap_config tegra20_i2s_regmap_config = {
 static int tegra20_i2s_platform_probe(struct platform_device *pdev)
 {
         struct tegra20_i2s *i2s;
-        struct resource *mem, *memregion, *dmareq;
-        u32 of_dma[2];
-        u32 dma_ch;
+        struct resource *mem, *memregion;
         void __iomem *regs;
         int ret;
 
@@ -370,20 +368,6 @@ static int tegra20_i2s_platform_probe(struct platform_device *pdev)
                 goto err_clk_put;
         }
 
-        dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0);
-        if (!dmareq) {
-                if (of_property_read_u32_array(pdev->dev.of_node,
-                                        "nvidia,dma-request-selector",
-                                        of_dma, 2) < 0) {
-                        dev_err(&pdev->dev, "No DMA resource\n");
-                        ret = -ENODEV;
-                        goto err_clk_put;
-                }
-                dma_ch = of_dma[1];
-        } else {
-                dma_ch = dmareq->start;
-        }
-
         memregion = devm_request_mem_region(&pdev->dev, mem->start,
                                             resource_size(mem), DRV_NAME);
         if (!memregion) {
@@ -410,12 +394,10 @@ static int tegra20_i2s_platform_probe(struct platform_device *pdev)
         i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
         i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
         i2s->capture_dma_data.maxburst = 4;
-        i2s->capture_dma_data.slave_id = dma_ch;
 
         i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
         i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
         i2s->playback_dma_data.maxburst = 4;
-        i2s->playback_dma_data.slave_id = dma_ch;
 
         pm_runtime_enable(&pdev->dev);
         if (!pm_runtime_enabled(&pdev->dev)) {
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index 31154338c1eb..d6f4c9940e0c 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -24,8 +24,8 @@
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
-#include <linux/clk/tegra.h>
 #include <sound/soc.h>
 #include "tegra30_ahub.h"
 
@@ -95,8 +95,8 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
 }
 
 int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
-                                  dma_addr_t *fiforeg,
-                                  unsigned int *reqsel)
+                                  char *dmachan, int dmachan_len,
+                                  dma_addr_t *fiforeg)
 {
         int channel;
         u32 reg, val;
@@ -110,9 +110,11 @@ int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
         __set_bit(channel, ahub->rx_usage);
 
         *rxcif = TEGRA30_AHUB_RXCIF_APBIF_RX0 + channel;
+        snprintf(dmachan, dmachan_len, "rx%d", channel);
         *fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_RXFIFO +
                    (channel * TEGRA30_AHUB_CHANNEL_RXFIFO_STRIDE);
-        *reqsel = ahub->dma_sel + channel;
+
+        pm_runtime_get_sync(ahub->dev);
 
         reg = TEGRA30_AHUB_CHANNEL_CTRL +
               (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
@@ -140,6 +142,8 @@ int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
               (channel * TEGRA30_AHUB_CIF_RX_CTRL_STRIDE);
         ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, &cif_conf);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_allocate_rx_fifo);
@@ -149,12 +153,16 @@ int tegra30_ahub_enable_rx_fifo(enum tegra30_ahub_rxcif rxcif)
         int channel = rxcif - TEGRA30_AHUB_RXCIF_APBIF_RX0;
         int reg, val;
 
+        pm_runtime_get_sync(ahub->dev);
+
         reg = TEGRA30_AHUB_CHANNEL_CTRL +
               (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
         val = tegra30_apbif_read(reg);
         val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_EN;
         tegra30_apbif_write(reg, val);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_enable_rx_fifo);
@@ -164,12 +172,16 @@ int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif)
         int channel = rxcif - TEGRA30_AHUB_RXCIF_APBIF_RX0;
         int reg, val;
 
+        pm_runtime_get_sync(ahub->dev);
+
         reg = TEGRA30_AHUB_CHANNEL_CTRL +
               (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
         val = tegra30_apbif_read(reg);
         val &= ~TEGRA30_AHUB_CHANNEL_CTRL_RX_EN;
         tegra30_apbif_write(reg, val);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_disable_rx_fifo);
@@ -185,8 +197,8 @@ int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif)
 EXPORT_SYMBOL_GPL(tegra30_ahub_free_rx_fifo);
 
 int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
-                                  dma_addr_t *fiforeg,
-                                  unsigned int *reqsel)
+                                  char *dmachan, int dmachan_len,
+                                  dma_addr_t *fiforeg)
 {
         int channel;
         u32 reg, val;
@@ -200,9 +212,11 @@ int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
         __set_bit(channel, ahub->tx_usage);
 
         *txcif = TEGRA30_AHUB_TXCIF_APBIF_TX0 + channel;
+        snprintf(dmachan, dmachan_len, "tx%d", channel);
         *fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_TXFIFO +
                    (channel * TEGRA30_AHUB_CHANNEL_TXFIFO_STRIDE);
-        *reqsel = ahub->dma_sel + channel;
+
+        pm_runtime_get_sync(ahub->dev);
 
         reg = TEGRA30_AHUB_CHANNEL_CTRL +
               (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
@@ -230,6 +244,8 @@ int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
               (channel * TEGRA30_AHUB_CIF_TX_CTRL_STRIDE);
         ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, &cif_conf);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_allocate_tx_fifo);
@@ -239,12 +255,16 @@ int tegra30_ahub_enable_tx_fifo(enum tegra30_ahub_txcif txcif)
         int channel = txcif - TEGRA30_AHUB_TXCIF_APBIF_TX0;
         int reg, val;
 
+        pm_runtime_get_sync(ahub->dev);
+
         reg = TEGRA30_AHUB_CHANNEL_CTRL +
               (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
         val = tegra30_apbif_read(reg);
         val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_EN;
         tegra30_apbif_write(reg, val);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_enable_tx_fifo);
@@ -254,12 +274,16 @@ int tegra30_ahub_disable_tx_fifo(enum tegra30_ahub_txcif txcif)
         int channel = txcif - TEGRA30_AHUB_TXCIF_APBIF_TX0;
         int reg, val;
 
+        pm_runtime_get_sync(ahub->dev);
+
         reg = TEGRA30_AHUB_CHANNEL_CTRL +
               (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
         val = tegra30_apbif_read(reg);
         val &= ~TEGRA30_AHUB_CHANNEL_CTRL_TX_EN;
         tegra30_apbif_write(reg, val);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_disable_tx_fifo);
@@ -280,10 +304,14 @@ int tegra30_ahub_set_rx_cif_source(enum tegra30_ahub_rxcif rxcif,
         int channel = rxcif - TEGRA30_AHUB_RXCIF_APBIF_RX0;
         int reg;
 
+        pm_runtime_get_sync(ahub->dev);
+
         reg = TEGRA30_AHUB_AUDIO_RX +
               (channel * TEGRA30_AHUB_AUDIO_RX_STRIDE);
         tegra30_audio_write(reg, 1 << txcif);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_set_rx_cif_source);
@@ -293,35 +321,51 @@ int tegra30_ahub_unset_rx_cif_source(enum tegra30_ahub_rxcif rxcif)
         int channel = rxcif - TEGRA30_AHUB_RXCIF_APBIF_RX0;
         int reg;
 
+        pm_runtime_get_sync(ahub->dev);
+
         reg = TEGRA30_AHUB_AUDIO_RX +
               (channel * TEGRA30_AHUB_AUDIO_RX_STRIDE);
         tegra30_audio_write(reg, 0);
 
+        pm_runtime_put(ahub->dev);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_unset_rx_cif_source);
 
-#define CLK_LIST_MASK_TEGRA30   BIT(0)
-#define CLK_LIST_MASK_TEGRA114  BIT(1)
+#define MOD_LIST_MASK_TEGRA30   BIT(0)
+#define MOD_LIST_MASK_TEGRA114  BIT(1)
+#define MOD_LIST_MASK_TEGRA124  BIT(2)
 
-#define CLK_LIST_MASK_TEGRA30_OR_LATER \
-                (CLK_LIST_MASK_TEGRA30 | CLK_LIST_MASK_TEGRA114)
+#define MOD_LIST_MASK_TEGRA30_OR_LATER \
+                (MOD_LIST_MASK_TEGRA30 | MOD_LIST_MASK_TEGRA114 | \
+                        MOD_LIST_MASK_TEGRA124)
+#define MOD_LIST_MASK_TEGRA114_OR_LATER \
+                (MOD_LIST_MASK_TEGRA114 | MOD_LIST_MASK_TEGRA124)
 
 static const struct {
-        const char *clk_name;
-        u32 clk_list_mask;
-} configlink_clocks[] = {
-        { "i2s0", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "i2s1", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "i2s2", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "i2s3", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "i2s4", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "dam0", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "dam1", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "dam2", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "spdif_in", CLK_LIST_MASK_TEGRA30_OR_LATER },
-        { "amx", CLK_LIST_MASK_TEGRA114 },
-        { "adx", CLK_LIST_MASK_TEGRA114 },
+        const char *rst_name;
+        u32 mod_list_mask;
+} configlink_mods[] = {
+        { "i2s0", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "i2s1", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "i2s2", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "i2s3", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "i2s4", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "dam0", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "dam1", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "dam2", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "spdif", MOD_LIST_MASK_TEGRA30_OR_LATER },
+        { "amx", MOD_LIST_MASK_TEGRA114_OR_LATER },
+        { "adx", MOD_LIST_MASK_TEGRA114_OR_LATER },
+        { "amx1", MOD_LIST_MASK_TEGRA124 },
+        { "adx1", MOD_LIST_MASK_TEGRA124 },
+        { "afc0", MOD_LIST_MASK_TEGRA124 },
+        { "afc1", MOD_LIST_MASK_TEGRA124 },
+        { "afc2", MOD_LIST_MASK_TEGRA124 },
+        { "afc3", MOD_LIST_MASK_TEGRA124 },
+        { "afc4", MOD_LIST_MASK_TEGRA124 },
+        { "afc5", MOD_LIST_MASK_TEGRA124 },
 };
 
 #define LAST_REG(name) \
@@ -450,17 +494,17 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = {
 };
 
 static struct tegra30_ahub_soc_data soc_data_tegra30 = {
-        .clk_list_mask = CLK_LIST_MASK_TEGRA30,
+        .mod_list_mask = MOD_LIST_MASK_TEGRA30,
         .set_audio_cif = tegra30_ahub_set_cif,
 };
 
 static struct tegra30_ahub_soc_data soc_data_tegra114 = {
-        .clk_list_mask = CLK_LIST_MASK_TEGRA114,
+        .mod_list_mask = MOD_LIST_MASK_TEGRA114,
         .set_audio_cif = tegra30_ahub_set_cif,
 };
 
 static struct tegra30_ahub_soc_data soc_data_tegra124 = {
-        .clk_list_mask = CLK_LIST_MASK_TEGRA114,
+        .mod_list_mask = MOD_LIST_MASK_TEGRA124,
         .set_audio_cif = tegra124_ahub_set_cif,
 };
 
@@ -475,10 +519,9 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
 {
         const struct of_device_id *match;
         const struct tegra30_ahub_soc_data *soc_data;
-        struct clk *clk;
+        struct reset_control *rst;
         int i;
         struct resource *res0, *res1, *region;
-        u32 of_dma[2];
         void __iomem *regs_apbif, *regs_ahub;
         int ret = 0;
 
@@ -495,19 +538,24 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
          * operate correctly, all devices on this bus must be out of reset.
          * Ensure that here.
          */
-        for (i = 0; i < ARRAY_SIZE(configlink_clocks); i++) {
-                if (!(configlink_clocks[i].clk_list_mask &
-                                        soc_data->clk_list_mask))
+        for (i = 0; i < ARRAY_SIZE(configlink_mods); i++) {
+                if (!(configlink_mods[i].mod_list_mask &
+                                        soc_data->mod_list_mask))
                         continue;
-                clk = clk_get(&pdev->dev, configlink_clocks[i].clk_name);
-                if (IS_ERR(clk)) {
-                        dev_err(&pdev->dev, "Can't get clock %s\n",
-                                configlink_clocks[i].clk_name);
-                        ret = PTR_ERR(clk);
+
+                rst = reset_control_get(&pdev->dev,
+                                        configlink_mods[i].rst_name);
+                if (IS_ERR(rst)) {
+                        dev_err(&pdev->dev, "Can't get reset %s\n",
+                                configlink_mods[i].rst_name);
+                        ret = PTR_ERR(rst);
                         goto err;
                 }
-                tegra_periph_reset_deassert(clk);
-                clk_put(clk);
+
+                ret = reset_control_deassert(rst);
+                reset_control_put(rst);
+                if (ret)
+                        goto err;
         }
 
         ahub = devm_kzalloc(&pdev->dev, sizeof(struct tegra30_ahub),
@@ -536,16 +584,6 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
                 goto err_clk_put_d_audio;
         }
 
-        if (of_property_read_u32_array(pdev->dev.of_node,
-                                "nvidia,dma-request-selector",
-                                of_dma, 2) < 0) {
-                dev_err(&pdev->dev,
-                        "Missing property nvidia,dma-request-selector\n");
-                ret = -ENODEV;
-                goto err_clk_put_d_audio;
-        }
-        ahub->dma_sel = of_dma[1];
-
         res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (!res0) {
                 dev_err(&pdev->dev, "No apbif memory resource\n");
diff --git a/sound/soc/tegra/tegra30_ahub.h b/sound/soc/tegra/tegra30_ahub.h
index d67321d90faa..fd7ba75ed814 100644
--- a/sound/soc/tegra/tegra30_ahub.h
+++ b/sound/soc/tegra/tegra30_ahub.h
@@ -465,15 +465,15 @@ enum tegra30_ahub_rxcif {
 };
 
 extern int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
-                                         dma_addr_t *fiforeg,
-                                         unsigned int *reqsel);
+                                         char *dmachan, int dmachan_len,
+                                         dma_addr_t *fiforeg);
 extern int tegra30_ahub_enable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
 extern int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
 extern int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif);
 
 extern int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
-                                         dma_addr_t *fiforeg,
-                                         unsigned int *reqsel);
+                                         char *dmachan, int dmachan_len,
+                                         dma_addr_t *fiforeg);
 extern int tegra30_ahub_enable_tx_fifo(enum tegra30_ahub_txcif txcif);
 extern int tegra30_ahub_disable_tx_fifo(enum tegra30_ahub_txcif txcif);
 extern int tegra30_ahub_free_tx_fifo(enum tegra30_ahub_txcif txcif);
@@ -502,7 +502,7 @@ void tegra124_ahub_set_cif(struct regmap *regmap, unsigned int reg,
                            struct tegra30_ahub_cif_conf *conf);
 
 struct tegra30_ahub_soc_data {
-        u32 clk_list_mask;
+        u32 mod_list_mask;
         void (*set_audio_cif)(struct regmap *regmap,
                               unsigned int reg,
                               struct tegra30_ahub_cif_conf *conf);
@@ -524,7 +524,6 @@ struct tegra30_ahub {
         struct device *dev;
         struct clk *clk_d_audio;
         struct clk *clk_apbif;
-        int dma_sel;
         resource_size_t apbif_addr;
         struct regmap *regmap_apbif;
         struct regmap *regmap_ahub;
diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c
index 231a785b3921..362e8f728ddf 100644
--- a/sound/soc/tegra/tegra30_i2s.c
+++ b/sound/soc/tegra/tegra30_i2s.c
@@ -73,47 +73,6 @@ static int tegra30_i2s_runtime_resume(struct device *dev)
         return 0;
 }
 
-static int tegra30_i2s_startup(struct snd_pcm_substream *substream,
-                        struct snd_soc_dai *dai)
-{
-        struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
-        int ret;
-
-        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-                ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
-                                        &i2s->playback_dma_data.addr,
-                                        &i2s->playback_dma_data.slave_id);
-                i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-                i2s->playback_dma_data.maxburst = 4;
-                tegra30_ahub_set_rx_cif_source(i2s->playback_i2s_cif,
-                                               i2s->playback_fifo_cif);
-        } else {
-                ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
-                                        &i2s->capture_dma_data.addr,
-                                        &i2s->capture_dma_data.slave_id);
-                i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-                i2s->capture_dma_data.maxburst = 4;
-                tegra30_ahub_set_rx_cif_source(i2s->capture_fifo_cif,
-                                               i2s->capture_i2s_cif);
-        }
-
-        return ret;
-}
-
-static void tegra30_i2s_shutdown(struct snd_pcm_substream *substream,
-                        struct snd_soc_dai *dai)
-{
-        struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
-
-        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-                tegra30_ahub_unset_rx_cif_source(i2s->playback_i2s_cif);
-                tegra30_ahub_free_tx_fifo(i2s->playback_fifo_cif);
-        } else {
-                tegra30_ahub_unset_rx_cif_source(i2s->capture_fifo_cif);
-                tegra30_ahub_free_rx_fifo(i2s->capture_fifo_cif);
-        }
-}
-
 static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
                                 unsigned int fmt)
 {
@@ -317,8 +276,6 @@ static int tegra30_i2s_probe(struct snd_soc_dai *dai)
 }
 
 static struct snd_soc_dai_ops tegra30_i2s_dai_ops = {
-        .startup        = tegra30_i2s_startup,
-        .shutdown       = tegra30_i2s_shutdown,
         .set_fmt        = tegra30_i2s_set_fmt,
         .hw_params      = tegra30_i2s_hw_params,
         .trigger        = tegra30_i2s_trigger,
@@ -499,15 +456,51 @@ static int tegra30_i2s_platform_probe(struct platform_device *pdev)
                         goto err_pm_disable;
         }
 
+        i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+        i2s->playback_dma_data.maxburst = 4;
+        ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
+                                            i2s->playback_dma_chan,
+                                            sizeof(i2s->playback_dma_chan),
+                                            &i2s->playback_dma_data.addr);
+        if (ret) {
+                dev_err(&pdev->dev, "Could not alloc TX FIFO: %d\n", ret);
+                goto err_suspend;
+        }
+        ret = tegra30_ahub_set_rx_cif_source(i2s->playback_i2s_cif,
+                                             i2s->playback_fifo_cif);
+        if (ret) {
+                dev_err(&pdev->dev, "Could not route TX FIFO: %d\n", ret);
+                goto err_free_tx_fifo;
+        }
+
+        i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+        i2s->capture_dma_data.maxburst = 4;
+        ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
+                                            i2s->capture_dma_chan,
+                                            sizeof(i2s->capture_dma_chan),
+                                            &i2s->capture_dma_data.addr);
+        if (ret) {
+                dev_err(&pdev->dev, "Could not alloc RX FIFO: %d\n", ret);
+                goto err_unroute_tx_fifo;
+        }
+        ret = tegra30_ahub_set_rx_cif_source(i2s->capture_fifo_cif,
+                                             i2s->capture_i2s_cif);
+        if (ret) {
+                dev_err(&pdev->dev, "Could not route TX FIFO: %d\n", ret);
+                goto err_free_rx_fifo;
+        }
+
         ret = snd_soc_register_component(&pdev->dev, &tegra30_i2s_component,
                                    &i2s->dai, 1);
         if (ret) {
                 dev_err(&pdev->dev, "Could not register DAI: %d\n", ret);
                 ret = -ENOMEM;
-                goto err_suspend;
+                goto err_unroute_rx_fifo;
         }
 
-        ret = tegra_pcm_platform_register(&pdev->dev);
+        ret = tegra_pcm_platform_register_with_chan_names(&pdev->dev,
+                                &i2s->dma_config, i2s->playback_dma_chan,
+                                i2s->capture_dma_chan);
         if (ret) {
                 dev_err(&pdev->dev, "Could not register PCM: %d\n", ret);
                 goto err_unregister_component;
@@ -517,6 +510,14 @@ static int tegra30_i2s_platform_probe(struct platform_device *pdev)
 
 err_unregister_component:
         snd_soc_unregister_component(&pdev->dev);
+err_unroute_rx_fifo:
+        tegra30_ahub_unset_rx_cif_source(i2s->capture_fifo_cif);
+err_free_rx_fifo:
+        tegra30_ahub_free_rx_fifo(i2s->capture_fifo_cif);
+err_unroute_tx_fifo:
+        tegra30_ahub_unset_rx_cif_source(i2s->playback_i2s_cif);
+err_free_tx_fifo:
+        tegra30_ahub_free_tx_fifo(i2s->playback_fifo_cif);
 err_suspend:
         if (!pm_runtime_status_suspended(&pdev->dev))
                 tegra30_i2s_runtime_suspend(&pdev->dev);
@@ -539,6 +540,12 @@ static int tegra30_i2s_platform_remove(struct platform_device *pdev)
         tegra_pcm_platform_unregister(&pdev->dev);
         snd_soc_unregister_component(&pdev->dev);
 
+        tegra30_ahub_unset_rx_cif_source(i2s->capture_fifo_cif);
+        tegra30_ahub_free_rx_fifo(i2s->capture_fifo_cif);
+
+        tegra30_ahub_unset_rx_cif_source(i2s->playback_i2s_cif);
+        tegra30_ahub_free_tx_fifo(i2s->playback_fifo_cif);
+
         clk_put(i2s->clk_i2s);
 
         return 0;
diff --git a/sound/soc/tegra/tegra30_i2s.h b/sound/soc/tegra/tegra30_i2s.h
index 4d0b0a30dbfb..774fc6ad2026 100644
--- a/sound/soc/tegra/tegra30_i2s.h
+++ b/sound/soc/tegra/tegra30_i2s.h
@@ -238,11 +238,14 @@ struct tegra30_i2s {
         struct clk *clk_i2s;
         enum tegra30_ahub_txcif capture_i2s_cif;
         enum tegra30_ahub_rxcif capture_fifo_cif;
+        char capture_dma_chan[8];
         struct snd_dmaengine_dai_dma_data capture_dma_data;
         enum tegra30_ahub_rxcif playback_i2s_cif;
         enum tegra30_ahub_txcif playback_fifo_cif;
+        char playback_dma_chan[8];
         struct snd_dmaengine_dai_dma_data playback_dma_data;
         struct regmap *regmap;
+        struct snd_dmaengine_pcm_config dma_config;
 };
 
 #endif
diff --git a/sound/soc/tegra/tegra_pcm.c b/sound/soc/tegra/tegra_pcm.c
index 7b2d23ba69b3..7ce5c334a660 100644
--- a/sound/soc/tegra/tegra_pcm.c
+++ b/sound/soc/tegra/tegra_pcm.c
@@ -61,12 +61,23 @@ static const struct snd_dmaengine_pcm_config tegra_dmaengine_pcm_config = {
 
 int tegra_pcm_platform_register(struct device *dev)
 {
-        return snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config,
-                        SND_DMAENGINE_PCM_FLAG_NO_DT |
-                        SND_DMAENGINE_PCM_FLAG_COMPAT);
+        return snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config, 0);
 }
 EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
 
+int tegra_pcm_platform_register_with_chan_names(struct device *dev,
+                                struct snd_dmaengine_pcm_config *config,
+                                char *txdmachan, char *rxdmachan)
+{
+        *config = tegra_dmaengine_pcm_config;
+        config->dma_dev = dev->parent;
+        config->chan_names[0] = txdmachan;
+        config->chan_names[1] = rxdmachan;
+
+        return snd_dmaengine_pcm_register(dev, config, 0);
+}
+EXPORT_SYMBOL_GPL(tegra_pcm_platform_register_with_chan_names);
+
 void tegra_pcm_platform_unregister(struct device *dev)
 {
         return snd_dmaengine_pcm_unregister(dev);
diff --git a/sound/soc/tegra/tegra_pcm.h b/sound/soc/tegra/tegra_pcm.h
index 68ad901714a9..7883dec748a3 100644
--- a/sound/soc/tegra/tegra_pcm.h
+++ b/sound/soc/tegra/tegra_pcm.h
@@ -31,7 +31,12 @@
 #ifndef __TEGRA_PCM_H__
 #define __TEGRA_PCM_H__
 
+struct snd_dmaengine_pcm_config;
+
 int tegra_pcm_platform_register(struct device *dev);
+int tegra_pcm_platform_register_with_chan_names(struct device *dev,
+                                struct snd_dmaengine_pcm_config *config,
+                                char *txdmachan, char *rxdmachan);
 void tegra_pcm_platform_unregister(struct device *dev);
 
 #endif
diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c
index 3454262358b3..f4b12c216f1c 100644
--- a/sound/usb/mixer_quirks.c
+++ b/sound/usb/mixer_quirks.c
@@ -1603,7 +1603,7 @@ static int snd_microii_controls_create(struct usb_mixer_interface *mixer)
                         return err;
         }
 
-        return err;
+        return 0;
 }
 
 int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer)
diff --git a/tools/usb/Makefile b/tools/usb/Makefile
index 396d6c44e9d7..acf2165c04e6 100644
--- a/tools/usb/Makefile
+++ b/tools/usb/Makefile
@@ -3,11 +3,12 @@
 CC = $(CROSS_COMPILE)gcc
 PTHREAD_LIBS = -lpthread
 WARNINGS = -Wall -Wextra
-CFLAGS = $(WARNINGS) -g $(PTHREAD_LIBS) -I../include
+CFLAGS = $(WARNINGS) -g -I../include
+LDFLAGS = $(PTHREAD_LIBS)
 
 all: testusb ffs-test
 %: %.c
-        $(CC) $(CFLAGS) -o $@ $^
+        $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
 
 clean:
         $(RM) testusb ffs-test
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index a0aa84b5941a..4f588bc94186 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -1898,6 +1898,9 @@ static int kvm_vm_ioctl_create_vcpu(struct kvm *kvm, u32 id)
         int r;
         struct kvm_vcpu *vcpu, *v;
 
+        if (id >= KVM_MAX_VCPUS)
+                return -EINVAL;
+
         vcpu = kvm_arch_vcpu_create(kvm, id);
         if (IS_ERR(vcpu))
                 return PTR_ERR(vcpu);