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-rw-r--r--drivers/gpu/drm/meson/meson_crtc.c23
-rw-r--r--drivers/gpu/drm/meson/meson_drv.c14
-rw-r--r--drivers/gpu/drm/qxl/qxl_drv.c4
-rw-r--r--drivers/gpu/drm/qxl/qxl_prime.c14
-rw-r--r--drivers/gpu/drm/rockchip/rockchip_rgb.c4
-rw-r--r--drivers/gpu/drm/sun4i/sun4i_backend.c5
-rw-r--r--drivers/gpu/drm/virtio/virtgpu_drv.c4
-rw-r--r--drivers/gpu/drm/virtio/virtgpu_drv.h4
-rw-r--r--drivers/gpu/drm/virtio/virtgpu_prime.c14
9 files changed, 20 insertions, 66 deletions
diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
index 75d97f1b2e8f..4f5c67f70c4d 100644
--- a/drivers/gpu/drm/meson/meson_crtc.c
+++ b/drivers/gpu/drm/meson/meson_crtc.c
@@ -46,7 +46,6 @@ struct meson_crtc {
46 struct drm_crtc base; 46 struct drm_crtc base;
47 struct drm_pending_vblank_event *event; 47 struct drm_pending_vblank_event *event;
48 struct meson_drm *priv; 48 struct meson_drm *priv;
49 bool enabled;
50}; 49};
51#define to_meson_crtc(x) container_of(x, struct meson_crtc, base) 50#define to_meson_crtc(x) container_of(x, struct meson_crtc, base)
52 51
@@ -82,7 +81,8 @@ static const struct drm_crtc_funcs meson_crtc_funcs = {
82 81
83}; 82};
84 83
85static void meson_crtc_enable(struct drm_crtc *crtc) 84static void meson_crtc_atomic_enable(struct drm_crtc *crtc,
85 struct drm_crtc_state *old_state)
86{ 86{
87 struct meson_crtc *meson_crtc = to_meson_crtc(crtc); 87 struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
88 struct drm_crtc_state *crtc_state = crtc->state; 88 struct drm_crtc_state *crtc_state = crtc->state;
@@ -108,20 +108,6 @@ static void meson_crtc_enable(struct drm_crtc *crtc)
108 108
109 drm_crtc_vblank_on(crtc); 109 drm_crtc_vblank_on(crtc);
110 110
111 meson_crtc->enabled = true;
112}
113
114static void meson_crtc_atomic_enable(struct drm_crtc *crtc,
115 struct drm_crtc_state *old_state)
116{
117 struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
118 struct meson_drm *priv = meson_crtc->priv;
119
120 DRM_DEBUG_DRIVER("\n");
121
122 if (!meson_crtc->enabled)
123 meson_crtc_enable(crtc);
124
125 priv->viu.osd1_enabled = true; 111 priv->viu.osd1_enabled = true;
126} 112}
127 113
@@ -153,8 +139,6 @@ static void meson_crtc_atomic_disable(struct drm_crtc *crtc,
153 139
154 crtc->state->event = NULL; 140 crtc->state->event = NULL;
155 } 141 }
156
157 meson_crtc->enabled = false;
158} 142}
159 143
160static void meson_crtc_atomic_begin(struct drm_crtc *crtc, 144static void meson_crtc_atomic_begin(struct drm_crtc *crtc,
@@ -163,9 +147,6 @@ static void meson_crtc_atomic_begin(struct drm_crtc *crtc,
163 struct meson_crtc *meson_crtc = to_meson_crtc(crtc); 147 struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
164 unsigned long flags; 148 unsigned long flags;
165 149
166 if (crtc->state->enable && !meson_crtc->enabled)
167 meson_crtc_enable(crtc);
168
169 if (crtc->state->event) { 150 if (crtc->state->event) {
170 WARN_ON(drm_crtc_vblank_get(crtc) != 0); 151 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
171 152
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
index 3ee4d4a4ecba..12ff47b13668 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
+++ b/drivers/gpu/drm/meson/meson_drv.c
@@ -75,6 +75,10 @@ static const struct drm_mode_config_funcs meson_mode_config_funcs = {
75 .fb_create = drm_gem_fb_create, 75 .fb_create = drm_gem_fb_create,
76}; 76};
77 77
78static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
79 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
80};
81
78static irqreturn_t meson_irq(int irq, void *arg) 82static irqreturn_t meson_irq(int irq, void *arg)
79{ 83{
80 struct drm_device *dev = arg; 84 struct drm_device *dev = arg;
@@ -266,6 +270,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
266 drm->mode_config.max_width = 3840; 270 drm->mode_config.max_width = 3840;
267 drm->mode_config.max_height = 2160; 271 drm->mode_config.max_height = 2160;
268 drm->mode_config.funcs = &meson_mode_config_funcs; 272 drm->mode_config.funcs = &meson_mode_config_funcs;
273 drm->mode_config.helper_private = &meson_mode_config_helpers;
269 274
270 /* Hardware Initialization */ 275 /* Hardware Initialization */
271 276
@@ -388,8 +393,10 @@ static int meson_probe_remote(struct platform_device *pdev,
388 remote_node = of_graph_get_remote_port_parent(ep); 393 remote_node = of_graph_get_remote_port_parent(ep);
389 if (!remote_node || 394 if (!remote_node ||
390 remote_node == parent || /* Ignore parent endpoint */ 395 remote_node == parent || /* Ignore parent endpoint */
391 !of_device_is_available(remote_node)) 396 !of_device_is_available(remote_node)) {
397 of_node_put(remote_node);
392 continue; 398 continue;
399 }
393 400
394 count += meson_probe_remote(pdev, match, remote, remote_node); 401 count += meson_probe_remote(pdev, match, remote, remote_node);
395 402
@@ -408,10 +415,13 @@ static int meson_drv_probe(struct platform_device *pdev)
408 415
409 for_each_endpoint_of_node(np, ep) { 416 for_each_endpoint_of_node(np, ep) {
410 remote = of_graph_get_remote_port_parent(ep); 417 remote = of_graph_get_remote_port_parent(ep);
411 if (!remote || !of_device_is_available(remote)) 418 if (!remote || !of_device_is_available(remote)) {
419 of_node_put(remote);
412 continue; 420 continue;
421 }
413 422
414 count += meson_probe_remote(pdev, &match, np, remote); 423 count += meson_probe_remote(pdev, &match, np, remote);
424 of_node_put(remote);
415 } 425 }
416 426
417 if (count && !match) 427 if (count && !match)
diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c
index 13c8a662f9b4..ccb090f3ab30 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.c
+++ b/drivers/gpu/drm/qxl/qxl_drv.c
@@ -250,14 +250,10 @@ static struct drm_driver qxl_driver = {
250#if defined(CONFIG_DEBUG_FS) 250#if defined(CONFIG_DEBUG_FS)
251 .debugfs_init = qxl_debugfs_init, 251 .debugfs_init = qxl_debugfs_init,
252#endif 252#endif
253 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
254 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
255 .gem_prime_export = drm_gem_prime_export, 253 .gem_prime_export = drm_gem_prime_export,
256 .gem_prime_import = drm_gem_prime_import, 254 .gem_prime_import = drm_gem_prime_import,
257 .gem_prime_pin = qxl_gem_prime_pin, 255 .gem_prime_pin = qxl_gem_prime_pin,
258 .gem_prime_unpin = qxl_gem_prime_unpin, 256 .gem_prime_unpin = qxl_gem_prime_unpin,
259 .gem_prime_get_sg_table = qxl_gem_prime_get_sg_table,
260 .gem_prime_import_sg_table = qxl_gem_prime_import_sg_table,
261 .gem_prime_vmap = qxl_gem_prime_vmap, 257 .gem_prime_vmap = qxl_gem_prime_vmap,
262 .gem_prime_vunmap = qxl_gem_prime_vunmap, 258 .gem_prime_vunmap = qxl_gem_prime_vunmap,
263 .gem_prime_mmap = qxl_gem_prime_mmap, 259 .gem_prime_mmap = qxl_gem_prime_mmap,
diff --git a/drivers/gpu/drm/qxl/qxl_prime.c b/drivers/gpu/drm/qxl/qxl_prime.c
index a55dece118b2..df65d3c1a7b8 100644
--- a/drivers/gpu/drm/qxl/qxl_prime.c
+++ b/drivers/gpu/drm/qxl/qxl_prime.c
@@ -38,20 +38,6 @@ void qxl_gem_prime_unpin(struct drm_gem_object *obj)
38 WARN_ONCE(1, "not implemented"); 38 WARN_ONCE(1, "not implemented");
39} 39}
40 40
41struct sg_table *qxl_gem_prime_get_sg_table(struct drm_gem_object *obj)
42{
43 WARN_ONCE(1, "not implemented");
44 return ERR_PTR(-ENOSYS);
45}
46
47struct drm_gem_object *qxl_gem_prime_import_sg_table(
48 struct drm_device *dev, struct dma_buf_attachment *attach,
49 struct sg_table *table)
50{
51 WARN_ONCE(1, "not implemented");
52 return ERR_PTR(-ENOSYS);
53}
54
55void *qxl_gem_prime_vmap(struct drm_gem_object *obj) 41void *qxl_gem_prime_vmap(struct drm_gem_object *obj)
56{ 42{
57 WARN_ONCE(1, "not implemented"); 43 WARN_ONCE(1, "not implemented");
diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c
index 96ac1458a59c..37f93022a106 100644
--- a/drivers/gpu/drm/rockchip/rockchip_rgb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c
@@ -113,8 +113,10 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev,
113 child_count++; 113 child_count++;
114 ret = drm_of_find_panel_or_bridge(dev->of_node, 0, endpoint_id, 114 ret = drm_of_find_panel_or_bridge(dev->of_node, 0, endpoint_id,
115 &panel, &bridge); 115 &panel, &bridge);
116 if (!ret) 116 if (!ret) {
117 of_node_put(endpoint);
117 break; 118 break;
119 }
118 } 120 }
119 121
120 of_node_put(port); 122 of_node_put(port);
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 9e9255ee59cd..a021bab11a4f 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -786,17 +786,18 @@ static struct sun4i_frontend *sun4i_backend_find_frontend(struct sun4i_drv *drv,
786 remote = of_graph_get_remote_port_parent(ep); 786 remote = of_graph_get_remote_port_parent(ep);
787 if (!remote) 787 if (!remote)
788 continue; 788 continue;
789 of_node_put(remote);
789 790
790 /* does this node match any registered engines? */ 791 /* does this node match any registered engines? */
791 list_for_each_entry(frontend, &drv->frontend_list, list) { 792 list_for_each_entry(frontend, &drv->frontend_list, list) {
792 if (remote == frontend->node) { 793 if (remote == frontend->node) {
793 of_node_put(remote);
794 of_node_put(port); 794 of_node_put(port);
795 of_node_put(ep);
795 return frontend; 796 return frontend;
796 } 797 }
797 } 798 }
798 } 799 }
799 800 of_node_put(port);
800 return ERR_PTR(-EINVAL); 801 return ERR_PTR(-EINVAL);
801} 802}
802 803
diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.c b/drivers/gpu/drm/virtio/virtgpu_drv.c
index f7f32a885af7..2d1aaca49105 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.c
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.c
@@ -127,14 +127,10 @@ static struct drm_driver driver = {
127#if defined(CONFIG_DEBUG_FS) 127#if defined(CONFIG_DEBUG_FS)
128 .debugfs_init = virtio_gpu_debugfs_init, 128 .debugfs_init = virtio_gpu_debugfs_init,
129#endif 129#endif
130 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
131 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
132 .gem_prime_export = drm_gem_prime_export, 130 .gem_prime_export = drm_gem_prime_export,
133 .gem_prime_import = drm_gem_prime_import, 131 .gem_prime_import = drm_gem_prime_import,
134 .gem_prime_pin = virtgpu_gem_prime_pin, 132 .gem_prime_pin = virtgpu_gem_prime_pin,
135 .gem_prime_unpin = virtgpu_gem_prime_unpin, 133 .gem_prime_unpin = virtgpu_gem_prime_unpin,
136 .gem_prime_get_sg_table = virtgpu_gem_prime_get_sg_table,
137 .gem_prime_import_sg_table = virtgpu_gem_prime_import_sg_table,
138 .gem_prime_vmap = virtgpu_gem_prime_vmap, 134 .gem_prime_vmap = virtgpu_gem_prime_vmap,
139 .gem_prime_vunmap = virtgpu_gem_prime_vunmap, 135 .gem_prime_vunmap = virtgpu_gem_prime_vunmap,
140 .gem_prime_mmap = virtgpu_gem_prime_mmap, 136 .gem_prime_mmap = virtgpu_gem_prime_mmap,
diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h b/drivers/gpu/drm/virtio/virtgpu_drv.h
index 1deb41d42ea4..0c15000f926e 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.h
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.h
@@ -372,10 +372,6 @@ int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
372/* virtgpu_prime.c */ 372/* virtgpu_prime.c */
373int virtgpu_gem_prime_pin(struct drm_gem_object *obj); 373int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
374void virtgpu_gem_prime_unpin(struct drm_gem_object *obj); 374void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
375struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
376struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
377 struct drm_device *dev, struct dma_buf_attachment *attach,
378 struct sg_table *sgt);
379void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj); 375void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
380void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 376void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
381int virtgpu_gem_prime_mmap(struct drm_gem_object *obj, 377int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
diff --git a/drivers/gpu/drm/virtio/virtgpu_prime.c b/drivers/gpu/drm/virtio/virtgpu_prime.c
index 86ce0ae93f59..c59ec34c80a5 100644
--- a/drivers/gpu/drm/virtio/virtgpu_prime.c
+++ b/drivers/gpu/drm/virtio/virtgpu_prime.c
@@ -39,20 +39,6 @@ void virtgpu_gem_prime_unpin(struct drm_gem_object *obj)
39 WARN_ONCE(1, "not implemented"); 39 WARN_ONCE(1, "not implemented");
40} 40}
41 41
42struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
43{
44 WARN_ONCE(1, "not implemented");
45 return ERR_PTR(-ENODEV);
46}
47
48struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
49 struct drm_device *dev, struct dma_buf_attachment *attach,
50 struct sg_table *table)
51{
52 WARN_ONCE(1, "not implemented");
53 return ERR_PTR(-ENODEV);
54}
55
56void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj) 42void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj)
57{ 43{
58 struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj); 44 struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj);