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-rw-r--r--arch/x86/include/asm/tlbflush.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index b519da4fc03c..f9b48ce152eb 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -345,15 +345,17 @@ static inline void invalidate_user_asid(u16 asid)
345 */ 345 */
346static inline void __native_flush_tlb(void) 346static inline void __native_flush_tlb(void)
347{ 347{
348 invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
349 /* 348 /*
350 * If current->mm == NULL then we borrow a mm which may change 349 * Preemption or interrupts must be disabled to protect the access
351 * during a task switch and therefore we must not be preempted 350 * to the per CPU variable and to prevent being preempted between
352 * while we write CR3 back: 351 * read_cr3() and write_cr3().
353 */ 352 */
354 preempt_disable(); 353 WARN_ON_ONCE(preemptible());
354
355 invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
356
357 /* If current->mm == NULL then the read_cr3() "borrows" an mm */
355 native_write_cr3(__native_read_cr3()); 358 native_write_cr3(__native_read_cr3());
356 preempt_enable();
357} 359}
358 360
359/* 361/*