diff options
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 2e8ddfcba40c..63188285d7f9 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
| @@ -72,14 +72,16 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds) | |||
| 72 | { | 72 | { |
| 73 | struct drm_device *dev = intel_lvds->base.base.dev; | 73 | struct drm_device *dev = intel_lvds->base.base.dev; |
| 74 | struct drm_i915_private *dev_priv = dev->dev_private; | 74 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 75 | u32 ctl_reg, lvds_reg; | 75 | u32 ctl_reg, lvds_reg, stat_reg; |
| 76 | 76 | ||
| 77 | if (HAS_PCH_SPLIT(dev)) { | 77 | if (HAS_PCH_SPLIT(dev)) { |
| 78 | ctl_reg = PCH_PP_CONTROL; | 78 | ctl_reg = PCH_PP_CONTROL; |
| 79 | lvds_reg = PCH_LVDS; | 79 | lvds_reg = PCH_LVDS; |
| 80 | stat_reg = PCH_PP_STATUS; | ||
| 80 | } else { | 81 | } else { |
| 81 | ctl_reg = PP_CONTROL; | 82 | ctl_reg = PP_CONTROL; |
| 82 | lvds_reg = LVDS; | 83 | lvds_reg = LVDS; |
| 84 | stat_reg = PP_STATUS; | ||
| 83 | } | 85 | } |
| 84 | 86 | ||
| 85 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); | 87 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); |
| @@ -94,17 +96,16 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds) | |||
| 94 | DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", | 96 | DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", |
| 95 | intel_lvds->pfit_control, | 97 | intel_lvds->pfit_control, |
| 96 | intel_lvds->pfit_pgm_ratios); | 98 | intel_lvds->pfit_pgm_ratios); |
| 97 | if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) { | 99 | |
| 98 | DRM_ERROR("timed out waiting for panel to power off\n"); | 100 | I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); |
| 99 | } else { | 101 | I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); |
| 100 | I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); | 102 | intel_lvds->pfit_dirty = false; |
| 101 | I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); | ||
| 102 | intel_lvds->pfit_dirty = false; | ||
| 103 | } | ||
| 104 | } | 103 | } |
| 105 | 104 | ||
| 106 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); | 105 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); |
| 107 | POSTING_READ(lvds_reg); | 106 | POSTING_READ(lvds_reg); |
| 107 | if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) | ||
| 108 | DRM_ERROR("timed out waiting for panel to power on\n"); | ||
| 108 | 109 | ||
| 109 | intel_panel_enable_backlight(dev); | 110 | intel_panel_enable_backlight(dev); |
| 110 | } | 111 | } |
| @@ -113,24 +114,25 @@ static void intel_lvds_disable(struct intel_lvds *intel_lvds) | |||
| 113 | { | 114 | { |
| 114 | struct drm_device *dev = intel_lvds->base.base.dev; | 115 | struct drm_device *dev = intel_lvds->base.base.dev; |
| 115 | struct drm_i915_private *dev_priv = dev->dev_private; | 116 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 116 | u32 ctl_reg, lvds_reg; | 117 | u32 ctl_reg, lvds_reg, stat_reg; |
| 117 | 118 | ||
| 118 | if (HAS_PCH_SPLIT(dev)) { | 119 | if (HAS_PCH_SPLIT(dev)) { |
| 119 | ctl_reg = PCH_PP_CONTROL; | 120 | ctl_reg = PCH_PP_CONTROL; |
| 120 | lvds_reg = PCH_LVDS; | 121 | lvds_reg = PCH_LVDS; |
| 122 | stat_reg = PCH_PP_STATUS; | ||
| 121 | } else { | 123 | } else { |
| 122 | ctl_reg = PP_CONTROL; | 124 | ctl_reg = PP_CONTROL; |
| 123 | lvds_reg = LVDS; | 125 | lvds_reg = LVDS; |
| 126 | stat_reg = PP_STATUS; | ||
| 124 | } | 127 | } |
| 125 | 128 | ||
| 126 | intel_panel_disable_backlight(dev); | 129 | intel_panel_disable_backlight(dev); |
| 127 | 130 | ||
| 128 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); | 131 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); |
| 132 | if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) | ||
| 133 | DRM_ERROR("timed out waiting for panel to power off\n"); | ||
| 129 | 134 | ||
| 130 | if (intel_lvds->pfit_control) { | 135 | if (intel_lvds->pfit_control) { |
| 131 | if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) | ||
| 132 | DRM_ERROR("timed out waiting for panel to power off\n"); | ||
| 133 | |||
| 134 | I915_WRITE(PFIT_CONTROL, 0); | 136 | I915_WRITE(PFIT_CONTROL, 0); |
| 135 | intel_lvds->pfit_dirty = true; | 137 | intel_lvds->pfit_dirty = true; |
| 136 | } | 138 | } |
