aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c69
1 files changed, 1 insertions, 68 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index a1ef7f6307b9..aa5a50f5eac8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4636,56 +4636,6 @@ static int gfx_v8_0_kiq_kcq_enable(struct amdgpu_device *adev)
4636 return r; 4636 return r;
4637} 4637}
4638 4638
4639static int gfx_v8_0_kiq_kcq_disable(struct amdgpu_device *adev)
4640{
4641 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring;
4642 uint32_t scratch, tmp = 0;
4643 int r, i;
4644
4645 r = amdgpu_gfx_scratch_get(adev, &scratch);
4646 if (r) {
4647 DRM_ERROR("Failed to get scratch reg (%d).\n", r);
4648 return r;
4649 }
4650 WREG32(scratch, 0xCAFEDEAD);
4651
4652 r = amdgpu_ring_alloc(kiq_ring, 6 + 3);
4653 if (r) {
4654 DRM_ERROR("Failed to lock KIQ (%d).\n", r);
4655 amdgpu_gfx_scratch_free(adev, scratch);
4656 return r;
4657 }
4658 /* unmap queues */
4659 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));
4660 amdgpu_ring_write(kiq_ring,
4661 PACKET3_UNMAP_QUEUES_ACTION(1)| /* RESET_QUEUES */
4662 PACKET3_UNMAP_QUEUES_QUEUE_SEL(2)); /* select all queues */
4663 amdgpu_ring_write(kiq_ring, 0);
4664 amdgpu_ring_write(kiq_ring, 0);
4665 amdgpu_ring_write(kiq_ring, 0);
4666 amdgpu_ring_write(kiq_ring, 0);
4667 /* write to scratch for completion */
4668 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
4669 amdgpu_ring_write(kiq_ring, (scratch - PACKET3_SET_UCONFIG_REG_START));
4670 amdgpu_ring_write(kiq_ring, 0xDEADBEEF);
4671 amdgpu_ring_commit(kiq_ring);
4672
4673 for (i = 0; i < adev->usec_timeout; i++) {
4674 tmp = RREG32(scratch);
4675 if (tmp == 0xDEADBEEF)
4676 break;
4677 DRM_UDELAY(1);
4678 }
4679 if (i >= adev->usec_timeout) {
4680 DRM_ERROR("KCQ disabled failed (scratch(0x%04X)=0x%08X)\n",
4681 scratch, tmp);
4682 r = -EINVAL;
4683 }
4684 amdgpu_gfx_scratch_free(adev, scratch);
4685
4686 return r;
4687}
4688
4689static int gfx_v8_0_deactivate_hqd(struct amdgpu_device *adev, u32 req) 4639static int gfx_v8_0_deactivate_hqd(struct amdgpu_device *adev, u32 req)
4690{ 4640{
4691 int i, r = 0; 4641 int i, r = 0;
@@ -4891,7 +4841,6 @@ int gfx_v8_0_mqd_commit(struct amdgpu_device *adev,
4891 4841
4892static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring) 4842static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring)
4893{ 4843{
4894 int r = 0;
4895 struct amdgpu_device *adev = ring->adev; 4844 struct amdgpu_device *adev = ring->adev;
4896 struct vi_mqd *mqd = ring->mqd_ptr; 4845 struct vi_mqd *mqd = ring->mqd_ptr;
4897 int mqd_idx = AMDGPU_MAX_COMPUTE_RINGS; 4846 int mqd_idx = AMDGPU_MAX_COMPUTE_RINGS;
@@ -4908,11 +4857,6 @@ static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring)
4908 amdgpu_ring_clear_ring(ring); 4857 amdgpu_ring_clear_ring(ring);
4909 mutex_lock(&adev->srbm_mutex); 4858 mutex_lock(&adev->srbm_mutex);
4910 vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); 4859 vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
4911 r = gfx_v8_0_deactivate_hqd(adev, 1);
4912 if (r) {
4913 dev_err(adev->dev, "failed to deactivate ring %s\n", ring->name);
4914 goto out_unlock;
4915 }
4916 gfx_v8_0_mqd_commit(adev, mqd); 4860 gfx_v8_0_mqd_commit(adev, mqd);
4917 vi_srbm_select(adev, 0, 0, 0, 0); 4861 vi_srbm_select(adev, 0, 0, 0, 0);
4918 mutex_unlock(&adev->srbm_mutex); 4862 mutex_unlock(&adev->srbm_mutex);
@@ -4923,11 +4867,6 @@ static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring)
4923 mutex_lock(&adev->srbm_mutex); 4867 mutex_lock(&adev->srbm_mutex);
4924 vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); 4868 vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
4925 gfx_v8_0_mqd_init(ring); 4869 gfx_v8_0_mqd_init(ring);
4926 r = gfx_v8_0_deactivate_hqd(adev, 1);
4927 if (r) {
4928 dev_err(adev->dev, "failed to deactivate ring %s\n", ring->name);
4929 goto out_unlock;
4930 }
4931 gfx_v8_0_mqd_commit(adev, mqd); 4870 gfx_v8_0_mqd_commit(adev, mqd);
4932 vi_srbm_select(adev, 0, 0, 0, 0); 4871 vi_srbm_select(adev, 0, 0, 0, 0);
4933 mutex_unlock(&adev->srbm_mutex); 4872 mutex_unlock(&adev->srbm_mutex);
@@ -4936,12 +4875,7 @@ static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring)
4936 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct vi_mqd_allocation)); 4875 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct vi_mqd_allocation));
4937 } 4876 }
4938 4877
4939 return r; 4878 return 0;
4940
4941out_unlock:
4942 vi_srbm_select(adev, 0, 0, 0, 0);
4943 mutex_unlock(&adev->srbm_mutex);
4944 return r;
4945} 4879}
4946 4880
4947static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring) 4881static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring)
@@ -5145,7 +5079,6 @@ static int gfx_v8_0_hw_fini(void *handle)
5145 pr_debug("For SRIOV client, shouldn't do anything.\n"); 5079 pr_debug("For SRIOV client, shouldn't do anything.\n");
5146 return 0; 5080 return 0;
5147 } 5081 }
5148 gfx_v8_0_kiq_kcq_disable(adev);
5149 gfx_v8_0_cp_enable(adev, false); 5082 gfx_v8_0_cp_enable(adev, false);
5150 gfx_v8_0_rlc_stop(adev); 5083 gfx_v8_0_rlc_stop(adev);
5151 5084