135 files changed, 4721 insertions, 682 deletions
diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt b/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
index fb7b5cd2652f..0ff6560e6094 100644
--- a/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
@@ -6,4 +6,5 @@ bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties:
 Required root node property:
-compatible = "bcm,bcm11351";
+compatible = "brcm,bcm11351";
+DEPRECATED: compatible = "bcm,bcm11351";
diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt b/Documentation/devicetree/bindings/arm/bcm/kona-timer.txt
index 59fa6e68d4f6..17d88b233d1b 100644
--- a/Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/kona-timer.txt
@@ -4,14 +4,15 @@ This timer is used in the following Broadcom SoCs:
 BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
 Required properties:
- compatible : "bcm,kona-timer"
+- compatible : "brcm,kona-timer"
+- DEPRECATED: compatible : "bcm,kona-timer"
 - reg : Register range for the timer
 - interrupts : interrupt for the timer
 - clock-frequency: frequency that the clock operates
 Example:
        timer@35006000 {
-                compatible = "bcm,kona-timer";
+                compatible = "brcm,kona-timer";
                reg = <0x35006000 0x1000>;
                interrupts = <0x0 7 0x4>;
                clock-frequency = <32768>;
diff --git a/Documentation/devicetree/bindings/arm/bcm/kona-wdt.txt b/Documentation/devicetree/bindings/arm/bcm/kona-wdt.txt
new file mode 100644
index 000000000000..2b86a00e351d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/kona-wdt.txt
@@ -0,0 +1,15 @@
+Broadcom Kona Family Watchdog Timer
+-----------------------------------
+This watchdog timer is used in the following Broadcom SoCs:
+  BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
+Required properties:
+  - compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
+  - reg: memory address & range
+Example:
+        watchdog@35002f40 {
+                compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
+                reg = <0x35002f40 0x6c>;
+        };
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index 36bd2d6725c8..f4181680831b 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -16,9 +16,9 @@ Required properties:
          mapped region.
  - interrupts : MFC interrupt number to the CPU.
-  - clocks : from common clock binding: handle to mfc clocks.
+  - clocks : from common clock binding: handle to mfc clock.
-  - clock-names : from common clock binding: must contain "sclk_mfc" and "mfc",
+  - clock-names : from common clock binding: must contain "mfc",
-                  corresponding to entries in the clocks property.
+                  corresponding to entry in the clocks property.
  - samsung,mfc-r : Base address of the first memory bank used by MFC
                    for DMA contiguous memory allocation and its size.
@@ -38,8 +38,8 @@ mfc: codec@13400000 {
        reg = <0x13400000 0x10000>;
        interrupts = <0 94 0>;
        samsung,power-domain = <&pd_mfc>;
-        clocks = <&clock 170>, <&clock 273>;
+        clocks = <&clock 273>;
-        clock-names = "sclk_mfc", "mfc";
+        clock-names = "mfc";
 };
 Board specific DT entry:
diff --git a/Documentation/devicetree/bindings/misc/smc.txt b/Documentation/devicetree/bindings/misc/smc.txt
index 02b428136177..6c9f176f3571 100644
--- a/Documentation/devicetree/bindings/misc/smc.txt
+++ b/Documentation/devicetree/bindings/misc/smc.txt
@@ -4,11 +4,12 @@ This binding defines the location of the bounce buffer
 used for non-secure to secure communications.
 Required properties:
- compatible : "bcm,kona-smc"
+- compatible : "brcm,kona-smc"
+- DEPRECATED: compatible : "bcm,kona-smc"
 - reg : Location and size of bounce buffer
 Example:
        smc@0x3404c000 {
-                compatible = "bcm,bcm11351-smc", "bcm,kona-smc";
+                compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
                reg = <0x3404c000 0x400>; //1 KiB in SRAM
        };
diff --git a/Documentation/devicetree/bindings/mmc/bcm,kona-sdhci.txt b/Documentation/devicetree/bindings/mmc/kona-sdhci.txt
index 094ae010f2fb..789fb07a426d 100644
--- a/Documentation/devicetree/bindings/mmc/bcm,kona-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/kona-sdhci.txt
@@ -4,12 +4,13 @@ This file documents differences between the core properties in mmc.txt
 and the properties present in the bcm281xx SDHCI
 Required properties:
- compatible : Should be "bcm,kona-sdhci"
+- compatible : Should be "brcm,kona-sdhci"
+- DEPRECATED: compatible : Should be "bcm,kona-sdhci"
 Example:
 sdio2: sdio@0x3f1a0000 {
-        compatible = "bcm,kona-sdhci";
+        compatible = "brcm,kona-sdhci";
        reg = <0x3f1a0000 0x10000>;
        interrupts = <0x0 74 0x4>;
 };
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
index e204d009f16c..fb70856c5b51 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
@@ -80,6 +80,17 @@ Valid values for pin and group names are:
    dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg,
    gmh, owr, uda.
+Valid values for nvidia,functions are:
+  blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3, displaya,
+  displaya_alt, displayb, dtv, emc_dll, extperiph1, extperiph2,
+  extperiph3, gmi, gmi_alt, hda, hsi, i2c1, i2c2, i2c3, i2c4, i2cpwr,
+  i2s0, i2s1, i2s2, i2s3, i2s4, irda, kbc, nand, nand_alt, owr, pmi,
+  pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1, rsvd2, rsvd3,
+  rsvd4, sdmmc1, sdmmc2, sdmmc3, sdmmc4, soc, spdif, spi1, spi2, spi3,
+  spi4, spi5, spi6, sysclk, trace, uarta, uartb, uartc, uartd, ulpi,
+  usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vi, vi_alt1, vi_alt3
 Example:
        pinmux: pinmux {
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
index 683fde93c4fb..61e73cde9ae9 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
@@ -103,6 +103,17 @@ Valid values for pin and group names are:
    drive_gma, drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_owr,
    drive_uda.
+Valid values for nvidia,functions are:
+  ahb_clk, apb_clk, audio_sync, crt, dap1, dap2, dap3, dap4, dap5,
+  displaya, displayb, emc_test0_dll, emc_test1_dll, gmi, gmi_int,
+  hdmi, i2cp, i2c1, i2c2, i2c3, ide, irda, kbc, mio, mipi_hs, nand,
+  osc, owr, pcie, plla_out, pllc_out1, pllm_out1, pllp_out2, pllp_out3,
+  pllp_out4, pwm, pwr_intr, pwr_on, rsvd1, rsvd2, rsvd3, rsvd4, rtck,
+  sdio1, sdio2, sdio3, sdio4, sflash, spdif, spi1, spi2, spi2_alt,
+  spi3, spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,
+  vi, vi_sensor_clk, xio
 Example:
        pinctrl@70000000 {
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
index 6f426ed7009e..0e6354c11e6d 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
@@ -91,6 +91,18 @@ Valid values for pin and group names are:
    gmh, gpv, lcd1, lcd2, owr, sdio1, sdio2, sdio3, spi, uaa, uab, uart2,
    uart3, uda, vi1.
+Valid values for nvidia,functions are:
+  blink, cec, clk_12m_out, clk_32k_in, core_pwr_req, cpu_pwr_req, crt,
+  dap, ddr, dev3, displaya, displayb, dtv, extperiph1, extperiph2,
+  extperiph3, gmi, gmi_alt, hda, hdcp, hdmi, hsi, i2c1, i2c2, i2c3,
+  i2c4, i2cpwr, i2s0, i2s1, i2s2, i2s3, i2s4, invalid, kbc, mio, nand,
+  nand_alt, owr, pcie, pwm0, pwm1, pwm2, pwm3, pwr_int_n, rsvd1, rsvd2,
+  rsvd3, rsvd4, rtck, sata, sdmmc1, sdmmc2, sdmmc3, sdmmc4, spdif, spi1,
+  spi2, spi2_alt, spi3, spi4, spi5, spi6, sysclk, test, trace, uarta,
+  uartb, uartc, uartd, uarte, ulpi, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6,
+  vi, vi_alt1, vi_alt2, vi_alt3
 Example:
        pinctrl@70000000 {
diff --git a/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt b/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt
index 9a2f3f420526..6b33b9f18e88 100644
--- a/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt
+++ b/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt
@@ -1,8 +1,8 @@
 ST Ericsson Nomadik pinmux controller
 Required properties:
- compatible: "stericsson,nmk-pinctrl", "stericsson,nmk-pinctrl-db8540",
+- compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
-              "stericsson,nmk-pinctrl-stn8815"
+              "stericsson,stn8815-pinctrl"
 - reg: Should contain the register physical address and length of the PRCMU.
 Please refer to pinctrl-bindings.txt in this directory for details of the
@@ -68,7 +68,7 @@ Optional subnode-properties:
 Example board file extract:
        pinctrl@80157000 {
-                compatible = "stericsson,nmk-pinctrl";
+                compatible = "stericsson,db8500-pinctrl";
                reg = <0x80157000 0x2000>;
                pinctrl-names = "default";
diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt
index eb2327b2bdb3..c703d51abb6c 100644
--- a/Documentation/devicetree/bindings/rtc/dw-apb.txt
+++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
@@ -1,7 +1,10 @@
 * Designware APB timer
 Required properties:
- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
+- compatible: One of:
+        "snps,dw-apb-timer"
+        "snps,dw-apb-timer-sp" <DEPRECATED>
+        "snps,dw-apb-timer-osc" <DEPRECATED>
 - reg: physical base address of the controller and length of memory mapped
  region.
 - interrupts: IRQ line for the timer.
@@ -20,25 +23,10 @@ systems may use one.
 Example:
+        timer@ffe00000 {
-                timer1: timer@ffc09000 {
+                compatible = "snps,dw-apb-timer";
-                                compatible = "snps,dw-apb-timer-sp";
+                interrupts = <0 170 4>;
-                                interrupts = <0 168 4>;
+                reg = <0xffe00000 0x1000>;
-                                clock-frequency = <200000000>;
+                clocks = <&timer_clk>, <&timer_pclk>;
-                                reg = <0xffc09000 0x1000>;
+                clock-names = "timer", "pclk";
-                        };
+        };
-                timer2: timer@ffd00000 {
-                                compatible = "snps,dw-apb-timer-osc";
-                                interrupts = <0 169 4>;
-                                clock-frequency = <200000000>;
-                                reg = <0xffd00000 0x1000>;
-                        };
-                timer3: timer@ffe00000 {
-                                compatible = "snps,dw-apb-timer-osc";
-                                interrupts = <0 170 4>;
-                                reg = <0xffe00000 0x1000>;
-                                clocks = <&timer_clk>, <&timer_pclk>;
-                                clock-names = "timer", "pclk";
-                        };
diff --git a/Documentation/devicetree/bindings/serial/altera_jtaguart.txt b/Documentation/devicetree/bindings/serial/altera_jtaguart.txt
index c152f65f9a28..55a901051e8f 100644
--- a/Documentation/devicetree/bindings/serial/altera_jtaguart.txt
+++ b/Documentation/devicetree/bindings/serial/altera_jtaguart.txt
@@ -1,4 +1,5 @@
 Altera JTAG UART
 Required properties:
- compatible : should be "ALTR,juart-1.0"
+- compatible : should be "ALTR,juart-1.0" <DEPRECATED>
+- compatible : should be "altr,juart-1.0"
diff --git a/Documentation/devicetree/bindings/serial/altera_uart.txt b/Documentation/devicetree/bindings/serial/altera_uart.txt
index 71cae3f70100..81bf7ffb1a81 100644
--- a/Documentation/devicetree/bindings/serial/altera_uart.txt
+++ b/Documentation/devicetree/bindings/serial/altera_uart.txt
@@ -1,7 +1,8 @@
 Altera UART
 Required properties:
- compatible : should be "ALTR,uart-1.0"
+- compatible : should be "ALTR,uart-1.0" <DEPRECATED>
+- compatible : should be "altr,uart-1.0"
 Optional properties:
 - clock-frequency : frequency of the clock input to the UART
diff --git a/Documentation/devicetree/bindings/serio/altera_ps2.txt b/Documentation/devicetree/bindings/serio/altera_ps2.txt
index 4d9eecc2ef7d..520199e2e347 100644
--- a/Documentation/devicetree/bindings/serio/altera_ps2.txt
+++ b/Documentation/devicetree/bindings/serio/altera_ps2.txt
@@ -1,4 +1,5 @@
 Altera UP PS/2 controller
 Required properties:
- compatible : should be "ALTR,ps2-1.0".
+- compatible : should be "ALTR,ps2-1.0". <DEPRECATED>
+- compatible : should be "altr,ps2-1.0".
diff --git a/Documentation/devicetree/bindings/spi/spi_altera.txt b/Documentation/devicetree/bindings/spi/spi_altera.txt
index dda375943506..31319dcf30ab 100644
--- a/Documentation/devicetree/bindings/spi/spi_altera.txt
+++ b/Documentation/devicetree/bindings/spi/spi_altera.txt
@@ -1,4 +1,5 @@
 Altera SPI
 Required properties:
- compatible : should be "ALTR,spi-1.0".
+- compatible : should be "ALTR,spi-1.0". <DEPRECATED>
+- compatible : should be "altr,spi-1.0".
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index ec4d713674fa..b571560ed5f9 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -7,6 +7,7 @@ ad	Avionic Design GmbH
 adi     Analog Devices, Inc.
 aeroflexgaisler Aeroflex Gaisler AB
 ak      Asahi Kasei Corp.
+altr    Altera Corp.
 amcc    Applied Micro Circuits Corporation (APM, formally AMCC)
 apm     Applied Micro Circuits Corporation (APM)
 arm     ARM Ltd.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6fd2ceae305a..a37a50f575a2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -190,6 +190,7 @@ machine-$(CONFIG_ARCH_S5PV210)		+= s5pv210
 machine-$(CONFIG_ARCH_SA1100)           += sa1100
 machine-$(CONFIG_ARCH_SHARK)            += shark
 machine-$(CONFIG_ARCH_SHMOBILE)         += shmobile
+machine-$(CONFIG_ARCH_SHMOBILE_MULTI)   += shmobile
 machine-$(CONFIG_ARCH_SIRF)             += prima2
 machine-$(CONFIG_ARCH_SOCFPGA)          += socfpga
 machine-$(CONFIG_ARCH_STI)              += sti
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 641b3c9a7028..454288db3180 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -42,7 +42,8 @@ dtb-$(CONFIG_ARCH_AT91)	+= sama5d34ek.dtb
 dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
-dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
+dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
+        bcm28155-ap.dtb
 dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
        da850-evm.dtb
 dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
@@ -53,13 +54,14 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
        exynos4210-trats.dtb \
        exynos4210-universal_c210.dtb \
        exynos4412-odroidx.dtb \
-        exynos4412-smdk4412.dtb \
        exynos4412-origen.dtb \
+        exynos4412-smdk4412.dtb \
+        exynos4412-trats2.dtb \
        exynos5250-arndale.dtb \
-        exynos5440-sd5v1.dtb \
        exynos5250-smdk5250.dtb \
        exynos5250-snow.dtb \
        exynos5420-smdk5420.dtb \
+        exynos5440-sd5v1.dtb \
        exynos5440-ssdk5440.dtb
 dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
        ecx-2000.dtb
@@ -143,7 +145,9 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
        imx28-cfa10037.dtb \
        imx28-cfa10049.dtb \
        imx28-cfa10055.dtb \
+        imx28-cfa10056.dtb \
        imx28-cfa10057.dtb \
+        imx28-cfa10058.dtb \
        imx28-evk.dtb \
        imx28-m28evk.dtb \
        imx28-sps1.dtb \
@@ -176,13 +180,14 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
        am43x-epos-evm.dtb
 dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
-dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
+dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
-        hrefprev60.dtb \
+        ste-hrefprev60.dtb \
-        hrefv60plus.dtb \
+        ste-hrefv60plus.dtb \
-        ccu8540.dtb \
+        ste-ccu8540.dtb \
-        ccu9540.dtb
+        ste-ccu9540.dtb
 dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
+        emev2-kzm9d-reference.dtb \
        r8a7740-armadillo800eva.dtb \
        r8a7778-bockw.dtb \
        r8a7740-armadillo800eva-reference.dtb \
@@ -192,6 +197,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
        sh73a0-kzm9g-reference.dtb \
        r8a73a4-ape6evm.dtb \
        sh7372-mackerel.dtb
+dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
        socfpga_vt.dtb
 dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
@@ -206,11 +212,14 @@ dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \
        stih415-b2020.dtb \
        stih416-b2020.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += \
+        sun4i-a10-a1000.dtb \
        sun4i-a10-cubieboard.dtb \
        sun4i-a10-mini-xplus.dtb \
        sun4i-a10-hackberry.dtb \
        sun5i-a10s-olinuxino-micro.dtb \
-        sun5i-a13-olinuxino.dtb
+        sun5i-a13-olinuxino.dtb \
+        sun6i-a31-colombus.dtb \
+        sun7i-a20-olinuxino-micro.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra20-iris-512.dtb \
        tegra20-medcom-wide.dtb \
@@ -224,8 +233,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra30-beaver.dtb \
        tegra30-cardhu-a02.dtb \
        tegra30-cardhu-a04.dtb \
-        tegra114-dalmore.dtb \
+        tegra114-dalmore.dtb
-        tegra114-pluto.dtb
 dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
        versatile-pb.dtb
 dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 92b9e21389db..f77065506f1e 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -120,6 +120,7 @@
                                interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
+                                pinctrl-names = "default";
                                status = "disabled";
                        };
diff --git a/arch/arm/boot/dts/at91rm9200_pqfp.dtsi b/arch/arm/boot/dts/at91rm9200_pqfp.dtsi
new file mode 100644
index 000000000000..93ca66f80360
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200_pqfp.dtsi
@@ -0,0 +1,17 @@
+/*
+ * at91rm9200_pqfp.dtsi - Device Tree Include file for AT91RM9200 PQFP family SoC
+ *
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+#include "at91rm9200.dtsi"
+/ {
+        compatible = "atmel,at91rm9200-pqfp", "atmel,at91rm9200";
+};
+&pioD {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index c7ccbcbffb3e..56ee8282a7a8 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -572,6 +572,7 @@
                                interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
+                                pinctrl-names = "default";
                                status = "disabled";
                        };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index bb7f564b3a55..9fb7ffd32af2 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -291,6 +291,22 @@
                                        };
                                };
+                                i2c0 {
+                                        pinctrl_i2c0: i2c0-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
+                                                         AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                        };
+                                };
+                                i2c1 {
+                                        pinctrl_i2c1: i2c1-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
+                                                         AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+                                        };
+                                };
                                tcb0 {
                                        pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
                                                atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
@@ -471,6 +487,8 @@
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c0>;
                                status = "disabled";
                        };
@@ -483,6 +501,8 @@
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c1>;
                                status = "disabled";
                        };
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index 3d77dbe406f4..27a9352b9d7a 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -40,6 +40,15 @@
                        i2c0: i2c@f8010000 {
                                status = "okay";
+                                qt1070: keyboard@1b {
+                                        compatible = "qt1070";
+                                        reg = <0x1b>;
+                                        interrupt-parent = <&pioA>;
+                                        interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+                                        pinctrl-names = "default";
+                                        pinctrl-0 = <&pinctrl_qt1070_irq>;
+                                };
                        };
                        i2c1: i2c@f8014000 {
@@ -66,6 +75,13 @@
                                                        <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;   /* PA7 gpio CD pin pull up and deglitch */
                                        };
                                };
+                                qt1070 {
+                                        pinctrl_qt1070_irq: qt1070_irq {
+                                                atmel,pins =
+                                                        <AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+                                        };
+                                };
                        };
                        spi0: spi@f0000000 {
@@ -121,7 +137,7 @@
                enter {
                        label = "Enter";
-                        gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
+                        gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
                        linux,code = <28>;
                        gpio-key,wakeup;
                };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 57d45f5bea09..cf78ac0b04b1 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -542,6 +542,9 @@
                                compatible = "atmel,at91sam9g45-ssc";
                                reg = <0xf0010000 0x4000>;
                                interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
+                                dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
+                                       <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
+                                dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
                                status = "disabled";
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 49e3c45818c2..3a9f6fa4a36a 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -59,6 +59,11 @@
                        i2c0: i2c@f8010000 {
                                status = "okay";
+                                wm8731: wm8731@1a {
+                                        compatible = "wm8731";
+                                        reg = <0x1a>;
+                                };
                        };
                        pinctrl@fffff400 {
@@ -90,6 +95,10 @@
                        watchdog@fffffe40 {
                                status = "okay";
                        };
+                        ssc0: ssc@f0010000 {
+                                status = "okay";
+                        };
                };
                usb0: ohci@00600000 {
@@ -105,4 +114,19 @@
                        status = "okay";
                };
        };
+        sound {
+                compatible = "atmel,sam9x5-wm8731-audio";
+                atmel,model = "wm8731 @ AT91SAM9X5EK";
+                atmel,audio-routing =
+                        "Headphone Jack", "RHPOUT",
+                        "Headphone Jack", "LHPOUT",
+                        "LLINEIN", "Line In Jack",
+                        "RLINEIN", "Line In Jack";
+                atmel,ssc-controller = <&ssc0>;
+                atmel,audio-codec = <&wm8731>;
+        };
 };
diff --git a/arch/arm/boot/dts/bcm11351-brt.dts b/arch/arm/boot/dts/bcm11351-brt.dts
index 67ec524098b5..9d36eb4e3c41 100644
--- a/arch/arm/boot/dts/bcm11351-brt.dts
+++ b/arch/arm/boot/dts/bcm11351-brt.dts
@@ -17,7 +17,7 @@
 / {
        model = "BCM11351 BRT board";
-        compatible = "bcm,bcm11351-brt", "bcm,bcm11351";
+        compatible = "brcm,bcm11351-brt", "brcm,bcm11351";
        memory {
                reg = <0x80000000 0x40000000>; /* 1 GB */
@@ -27,18 +27,18 @@
                status = "okay";
        };
-        sdio0: sdio@0x3f180000 {
+        sdio1: sdio@3f180000 {
                max-frequency = <48000000>;
                status = "okay";
        };
-        sdio1: sdio@0x3f190000 {
+        sdio2: sdio@3f190000 {
                non-removable;
                max-frequency = <48000000>;
                status = "okay";
        };
-        sdio3: sdio@0x3f1b0000 {
+        sdio4: sdio@3f1b0000 {
                max-frequency = <48000000>;
                status = "okay";
        };
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index c0cdf66f8964..05a5aabe3b2c 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2012 Broadcom Corporation
+ * Copyright (C) 2012-2013 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
@@ -18,7 +18,7 @@
 / {
        model = "BCM11351 SoC";
-        compatible = "bcm,bcm11351";
+        compatible = "brcm,bcm11351";
        interrupt-parent = <&gic>;
        chosen {
@@ -35,12 +35,12 @@
        };
        smc@0x3404c000 {
-                compatible = "bcm,bcm11351-smc", "bcm,kona-smc";
+                compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
                reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
        };
        uart@3e000000 {
-                compatible = "bcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
+                compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
                status = "disabled";
                reg = <0x3e000000 0x1000>;
                clock-frequency = <13000000>;
@@ -50,42 +50,47 @@
        };
        L2: l2-cache {
-                compatible = "bcm,bcm11351-a2-pl310-cache";
+                compatible = "brcm,bcm11351-a2-pl310-cache";
                reg = <0x3ff20000 0x1000>;
                cache-unified;
                cache-level = <2>;
        };
+        watchdog@35002f40 {
+                compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
+                reg = <0x35002f40 0x6c>;
+        };
        timer@35006000 {
-                compatible = "bcm,kona-timer";
+                compatible = "brcm,kona-timer";
                reg = <0x35006000 0x1000>;
                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
                clock-frequency = <32768>;
        };
-        sdio0: sdio@0x3f180000 {
+        sdio1: sdio@3f180000 {
-                compatible = "bcm,kona-sdhci";
+                compatible = "brcm,kona-sdhci";
                reg = <0x3f180000 0x10000>;
                interrupts = <0x0 77 0x4>;
                status = "disabled";
        };
-        sdio1: sdio@0x3f190000 {
+        sdio2: sdio@3f190000 {
-                compatible = "bcm,kona-sdhci";
+                compatible = "brcm,kona-sdhci";
                reg = <0x3f190000 0x10000>;
                interrupts = <0x0 76 0x4>;
                status = "disabled";
        };
-        sdio2: sdio@0x3f1a0000 {
+        sdio3: sdio@3f1a0000 {
-                compatible = "bcm,kona-sdhci";
+                compatible = "brcm,kona-sdhci";
                reg = <0x3f1a0000 0x10000>;
                interrupts = <0x0 74 0x4>;
                status = "disabled";
        };
-        sdio3: sdio@0x3f1b0000 {
+        sdio4: sdio@3f1b0000 {
-                compatible = "bcm,kona-sdhci";
+                compatible = "brcm,kona-sdhci";
                reg = <0x3f1b0000 0x10000>;
                interrupts = <0x0 73 0x4>;
                status = "disabled";
diff --git a/arch/arm/boot/dts/bcm28155-ap.dts b/arch/arm/boot/dts/bcm28155-ap.dts
new file mode 100644
index 000000000000..96ae67a2f0d3
--- /dev/null
+++ b/arch/arm/boot/dts/bcm28155-ap.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+#include "bcm11351.dtsi"
+/ {
+        model = "BCM28155 AP board";
+        compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
+        memory {
+                reg = <0x80000000 0x40000000>; /* 1 GB */
+        };
+        uart@3e000000 {
+                status = "okay";
+        };
+        sdio1: sdio@3f180000 {
+                max-frequency = <48000000>;
+                status = "okay";
+        };
+        sdio2: sdio@3f190000 {
+                non-removable;
+                max-frequency = <48000000>;
+                status = "okay";
+        };
+        sdio4: sdio@3f1b0000 {
+                max-frequency = <48000000>;
+                status = "okay";
+        };
+};
diff --git a/arch/arm/boot/dts/ccu8540.dts b/arch/arm/boot/dts/ccu8540.dts
deleted file mode 100644
index 48ff03441f5a..000000000000
--- a/arch/arm/boot/dts/ccu8540.dts
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright 2013 ST-Ericsson AB
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-/dts-v1/;
-#include "dbx5x0.dtsi"
-/ {
-        model = "ST-Ericsson U8540 platform with Device Tree";
-        compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";
-        memory@0 {
-                reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>;
-        };
-        soc {
-                prcmu@80157000 {
-                        reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x3000>;
-                        reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
-                };
-                uart@80120000 {
-                        status = "okay";
-                };
-                uart@80121000 {
-                        status = "okay";
-                };
-                uart@80007000 {
-                        status = "okay";
-                };
-        };
-};
diff --git a/arch/arm/boot/dts/emev2-kzm9d-reference.dts b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
new file mode 100644
index 000000000000..bed676b95c27
--- /dev/null
+++ b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
@@ -0,0 +1,57 @@
+/*
+ * Device Tree Source for the KZM9D board
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+/dts-v1/;
+/include/ "emev2.dtsi"
+/ {
+        model = "EMEV2 KZM9D Board";
+        compatible = "renesas,kzm9d-reference", "renesas,emev2";
+        memory {
+                device_type = "memory";
+                reg = <0x40000000 0x8000000>;
+        };
+        chosen {
+                bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
+        };
+        reg_1p8v: regulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "fixed-1.8V";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <1800000>;
+                regulator-always-on;
+                regulator-boot-on;
+        };
+        reg_3p3v: regulator@1 {
+                compatible = "regulator-fixed";
+                regulator-name = "fixed-3.3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+                regulator-boot-on;
+        };
+        lan9220@20000000 {
+                compatible = "smsc,lan9220", "smsc,lan9115";
+                reg = <0x20000000 0x10000>;
+                phy-mode = "mii";
+                interrupt-parent = <&gpio0>;
+                interrupts = <1 1>;     /* active high */
+                reg-io-width = <4>;
+                smsc,irq-active-high;
+                smsc,irq-push-pull;
+                vddvario-supply = <&reg_1p8v>;
+                vdd33a-supply = <&reg_3p3v>;
+        };
+};
diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
index b9b3241f173b..dda13bc02f9f 100644
--- a/arch/arm/boot/dts/emev2-kzm9d.dts
+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
@@ -21,6 +21,6 @@
        };
        chosen {
-                bootargs = "console=tty0 console=ttyS1,115200n81 earlyprintk=serial8250-em.1,115200n81 mem=128M@0x40000000 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
+                bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
        };
 };
diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
index c8a8c08b48dd..99ad2b2e8e14 100644
--- a/arch/arm/boot/dts/emev2.dtsi
+++ b/arch/arm/boot/dts/emev2.dtsi
@@ -14,6 +14,14 @@
        compatible = "renesas,emev2";
        interrupt-parent = <&gic>;
+        aliases {
+                gpio0 = &gpio0;
+                gpio1 = &gpio1;
+                gpio2 = &gpio2;
+                gpio3 = &gpio3;
+                gpio4 = &gpio4;
+        };
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -67,4 +75,55 @@
                reg = <0xe1050000 0x38>;
                interrupts = <0 11 0>;
        };
+        gpio0: gpio@e0050000 {
+                compatible = "renesas,em-gio";
+                reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
+                interrupts = <0 67 0>, <0 68 0>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                ngpios = <32>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+        gpio1: gpio@e0050080 {
+                compatible = "renesas,em-gio";
+                reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
+                interrupts = <0 69 0>, <0 70 0>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                ngpios = <32>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+        gpio2: gpio@e0050100 {
+                compatible = "renesas,em-gio";
+                reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
+                interrupts = <0 71 0>, <0 72 0>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                ngpios = <32>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+        gpio3: gpio@e0050180 {
+                compatible = "renesas,em-gio";
+                reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
+                interrupts = <0 73 0>, <0 74 0>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                ngpios = <32>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+        gpio4: gpio@e0050200 {
+                compatible = "renesas,em-gio";
+                reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
+                interrupts = <0 75 0>, <0 76 0>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                ngpios = <31>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 3f94fe8e3706..93c250139159 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -36,6 +36,12 @@
                i2c5 = &i2c_5;
                i2c6 = &i2c_6;
                i2c7 = &i2c_7;
+                csis0 = &csis_0;
+                csis1 = &csis_1;
+                fimc0 = &fimc_0;
+                fimc1 = &fimc_1;
+                fimc2 = &fimc_2;
+                fimc3 = &fimc_3;
        };
        chipid@10000000 {
@@ -92,6 +98,88 @@
                reg = <0x10010000 0x400>;
        };
+        camera {
+                compatible = "samsung,fimc", "simple-bus";
+                status = "disabled";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                clock_cam: clock-controller {
+                         #clock-cells = <1>;
+                };
+                fimc_0: fimc@11800000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11800000 0x1000>;
+                        interrupts = <0 84 0>;
+                        clocks = <&clock 256>, <&clock 128>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+                fimc_1: fimc@11810000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11810000 0x1000>;
+                        interrupts = <0 85 0>;
+                        clocks = <&clock 257>, <&clock 129>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+                fimc_2: fimc@11820000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11820000 0x1000>;
+                        interrupts = <0 86 0>;
+                        clocks = <&clock 258>, <&clock 130>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+                fimc_3: fimc@11830000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11830000 0x1000>;
+                        interrupts = <0 87 0>;
+                        clocks = <&clock 259>, <&clock 131>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+                csis_0: csis@11880000 {
+                        compatible = "samsung,exynos4210-csis";
+                        reg = <0x11880000 0x4000>;
+                        interrupts = <0 78 0>;
+                        clocks = <&clock 260>, <&clock 134>;
+                        clock-names = "csis", "sclk_csis";
+                        bus-width = <4>;
+                        samsung,power-domain = <&pd_cam>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+                csis_1: csis@11890000 {
+                        compatible = "samsung,exynos4210-csis";
+                        reg = <0x11890000 0x4000>;
+                        interrupts = <0 80 0>;
+                        clocks = <&clock 261>, <&clock 135>;
+                        clock-names = "csis", "sclk_csis";
+                        bus-width = <2>;
+                        samsung,power-domain = <&pd_cam>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+        };
        watchdog@10060000 {
                compatible = "samsung,s3c2410-wdt";
                reg = <0x10060000 0x100>;
@@ -155,13 +243,31 @@
                status = "disabled";
        };
+        ehci@12580000 {
+                compatible = "samsung,exynos4210-ehci";
+                reg = <0x12580000 0x100>;
+                interrupts = <0 70 0>;
+                clocks = <&clock 304>;
+                clock-names = "usbhost";
+                status = "disabled";
+        };
+        ohci@12590000 {
+                compatible = "samsung,exynos4210-ohci";
+                reg = <0x12590000 0x100>;
+                interrupts = <0 70 0>;
+                clocks = <&clock 304>;
+                clock-names = "usbhost";
+                status = "disabled";
+        };
        mfc: codec@13400000 {
                compatible = "samsung,mfc-v5";
                reg = <0x13400000 0x10000>;
                interrupts = <0 94 0>;
                samsung,power-domain = <&pd_mfc>;
-                clocks = <&clock 170>, <&clock 273>;
+                clocks = <&clock 273>;
-                clock-names = "sclk_mfc", "mfc";
+                clock-names = "mfc";
                status = "disabled";
        };
@@ -297,8 +403,8 @@
                compatible = "samsung,exynos4210-spi";
                reg = <0x13920000 0x100>;
                interrupts = <0 66 0>;
-                tx-dma-channel = <&pdma0 7>; /* preliminary */
+                dmas = <&pdma0 7>, <&pdma0 6>;
-                rx-dma-channel = <&pdma0 6>; /* preliminary */
+                dma-names = "tx", "rx";
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&clock 327>, <&clock 159>;
@@ -312,8 +418,8 @@
                compatible = "samsung,exynos4210-spi";
                reg = <0x13930000 0x100>;
                interrupts = <0 67 0>;
-                tx-dma-channel = <&pdma1 7>; /* preliminary */
+                dmas = <&pdma1 7>, <&pdma1 6>;
-                rx-dma-channel = <&pdma1 6>; /* preliminary */
+                dma-names = "tx", "rx";
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&clock 328>, <&clock 160>;
@@ -327,8 +433,8 @@
                compatible = "samsung,exynos4210-spi";
                reg = <0x13940000 0x100>;
                interrupts = <0 68 0>;
-                tx-dma-channel = <&pdma0 9>; /* preliminary */
+                dmas = <&pdma0 9>, <&pdma0 8>;
-                rx-dma-channel = <&pdma0 8>; /* preliminary */
+                dma-names = "tx", "rx";
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&clock 329>, <&clock 161>;
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index 553bceae8967..a7c212891674 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -797,6 +797,29 @@
                        samsung,pin-pud = <0>;
                        samsung,pin-drv = <0>;
                };
+                cam_port_a_io: cam-port-a-io {
+                        samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
+                                        "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
+                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+                cam_port_a_clk_active: cam-port-a-clk-active {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+                cam_port_a_clk_idle: cam-port-a-clk-idle {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <0>;
+                        samsung,pin-pud = <1>;
+                        samsung,pin-drv = <0>;
+                };
        };
        pinctrl@03860000 {
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 94eebffe3044..1c164f234bcc 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -30,13 +30,62 @@
                bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
        };
-        vemmc_reg: voltage-regulator@0 {
+        regulators {
-                compatible = "regulator-fixed";
+                compatible = "simple-bus";
-                regulator-name = "VMEM_VDD_2.8V";
-                regulator-min-microvolt = <2800000>;
+                vemmc_reg: regulator-0 {
-                regulator-max-microvolt = <2800000>;
+                        compatible = "regulator-fixed";
-                gpio = <&gpk0 2 0>;
+                        regulator-name = "VMEM_VDD_2.8V";
-                enable-active-high;
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpk0 2 0>;
+                        enable-active-high;
+                };
+                tsp_reg: regulator-1 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "TSP_FIXED_VOLTAGES";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpl0 3 0>;
+                        enable-active-high;
+                };
+                cam_af_28v_reg: regulator-2 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "8M_AF_2.8V_EN";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpk1 1 0>;
+                        enable-active-high;
+                };
+                cam_io_en_reg: regulator-3 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "CAM_IO_EN";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpe2 1 0>;
+                        enable-active-high;
+                };
+                cam_io_12v_reg: regulator-4 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "8M_1.2V_EN";
+                        regulator-min-microvolt = <1200000>;
+                        regulator-max-microvolt = <1200000>;
+                        gpio = <&gpe2 5 0>;
+                        enable-active-high;
+                };
+                vt_core_15v_reg: regulator-5 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "VT_CORE_1.5V";
+                        regulator-min-microvolt = <1500000>;
+                        regulator-max-microvolt = <1500000>;
+                        gpio = <&gpe2 2 0>;
+                        enable-active-high;
+                };
        };
        sdhci_emmc: sdhci@12510000 {
@@ -97,15 +146,6 @@
                };
        };
-        tsp_reg: voltage-regulator {
-                compatible = "regulator-fixed";
-                regulator-name = "TSP_FIXED_VOLTAGES";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpl0 3 0>;
-                enable-active-high;
-        };
        i2c@13890000 {
                samsung,i2c-sda-delay = <100>;
                samsung,i2c-slave-addr = <0x10>;
@@ -218,6 +258,12 @@
                                     regulator-always-on;
                                };
+                                vtcam_reg: LDO12 {
+                                     regulator-name = "VT_CAM_1.8V";
+                                     regulator-min-microvolt = <1800000>;
+                                     regulator-max-microvolt = <1800000>;
+                                };
                                vcclcd_reg: LDO13 {
                                     regulator-name = "VCC_3.3V_LCD";
                                     regulator-min-microvolt = <3300000>;
@@ -301,4 +347,26 @@
                        clock-frequency = <24000000>;
                };
        };
+        camera {
+                pinctrl-names = "default";
+                pinctrl-0 = <>;
+                status = "okay";
+                fimc_0: fimc@11800000 {
+                        status = "okay";
+                };
+                fimc_1: fimc@11810000 {
+                        status = "okay";
+                };
+                fimc_2: fimc@11820000 {
+                        status = "okay";
+                };
+                fimc_3: fimc@11830000 {
+                        status = "okay";
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 53e25273ca74..057d6829d319 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -125,4 +125,34 @@
                clock-names = "sclk_fimg2d", "fimg2d";
                status = "disabled";
        };
+        camera {
+                clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
+                clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
+                fimc_0: fimc@11800000 {
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,cam-if;
+                };
+                fimc_1: fimc@11810000 {
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,cam-if;
+                };
+                fimc_2: fimc@11820000 {
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,lcd-wb;
+                };
+                fimc_3: fimc@11830000 {
+                        samsung,pix-limits = <1920 8192 1366 1920>;
+                        samsung,rotators = <0>;
+                        samsung,mainscaler-ext;
+                        samsung,lcd-wb;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 7993641cb32a..8768b03702e5 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -27,6 +27,11 @@
                bootargs ="console=ttySAC2,115200";
        };
+        firmware@0203F000 {
+                compatible = "samsung,secure-firmware";
+                reg = <0x0203F000 0x1000>;
+        };
        mmc_reg: voltage-regulator {
                compatible = "regulator-fixed";
                regulator-name = "VMEM_VDD_2.8V";
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
new file mode 100644
index 000000000000..fb7b9ae5f399
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -0,0 +1,579 @@
+/*
+ * Samsung's Exynos4412 based Trats 2 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Device tree source file for Samsung's Trats 2 board which is based on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+/dts-v1/;
+#include "exynos4412.dtsi"
+/ {
+        model = "Samsung Trats 2 based on Exynos4412";
+        compatible = "samsung,trats2", "samsung,exynos4412";
+        aliases {
+                i2c8 = &i2c_ak8975;
+        };
+        memory {
+                reg =  <0x40000000 0x40000000>;
+        };
+        chosen {
+                bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
+        };
+        firmware@0204F000 {
+                compatible = "samsung,secure-firmware";
+                reg = <0x0204F000 0x1000>;
+        };
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti", "fixed-clock";
+                        clock-frequency = <0>;
+                };
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti", "fixed-clock";
+                        clock-frequency = <24000000>;
+                };
+        };
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                vemmc_reg: regulator-0 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "VMEM_VDD_2.8V";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpk0 2 0>;
+                        enable-active-high;
+                };
+                cam_io_reg: voltage-regulator-1 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "CAM_SENSOR_A";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpm0 2 0>;
+                        enable-active-high;
+                };
+                /* More to come */
+        };
+        gpio-keys {
+                compatible = "gpio-keys";
+                key-down {
+                        interrupt-parent = <&gpj1>;
+                        interrupts = <2 0>;
+                        gpios = <&gpj1 2 1>;
+                        linux,code = <114>;
+                        label = "volume down";
+                        debounce-interval = <10>;
+                };
+                key-up {
+                        interrupt-parent = <&gpj1>;
+                        interrupts = <1 0>;
+                        gpios = <&gpj1 1 1>;
+                        linux,code = <115>;
+                        label = "volume up";
+                        debounce-interval = <10>;
+                };
+                key-power {
+                        interrupt-parent = <&gpx2>;
+                        interrupts = <7 0>;
+                        gpios = <&gpx2 7 1>;
+                        linux,code = <116>;
+                        label = "power";
+                        debounce-interval = <10>;
+                        gpio-key,wakeup;
+                };
+        };
+        i2c@13890000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-slave-addr = <0x10>;
+                samsung,i2c-max-bus-freq = <400000>;
+                pinctrl-0 = <&i2c3_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+                mms114-touchscreen@48 {
+                        compatible = "melfas,mms114";
+                        reg = <0x48>;
+                        interrupt-parent = <&gpm2>;
+                        interrupts = <3 2>;
+                        x-size = <720>;
+                        y-size = <1280>;
+                        avdd-supply = <&ldo23_reg>;
+                        vdd-supply = <&ldo24_reg>;
+                };
+        };
+        i2c@138D0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-slave-addr = <0x10>;
+                samsung,i2c-max-bus-freq = <100000>;
+                pinctrl-0 = <&i2c7_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+                max77686_pmic@09 {
+                        compatible = "maxim,max77686";
+                        interrupt-parent = <&gpx0>;
+                        interrupts = <7 0>;
+                        reg = <0x09>;
+                        voltage-regulators {
+                                ldo1_reg: ldo1 {
+                                        regulator-compatible = "LDO1";
+                                        regulator-name = "VALIVE_1.0V_AP";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+                                ldo2_reg: ldo2 {
+                                        regulator-compatible = "LDO2";
+                                        regulator-name = "VM1M2_1.2V_AP";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+                                ldo3_reg: ldo3 {
+                                        regulator-compatible = "LDO3";
+                                        regulator-name = "VCC_1.8V_AP";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+                                ldo4_reg: ldo4 {
+                                        regulator-compatible = "LDO4";
+                                        regulator-name = "VCC_2.8V_AP";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+                                ldo5_reg: ldo5 {
+                                        regulator-compatible = "LDO5";
+                                        regulator-name = "VCC_1.8V_IO";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+                                ldo6_reg: ldo6 {
+                                        regulator-compatible = "LDO6";
+                                        regulator-name = "VMPLL_1.0V_AP";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+                                ldo7_reg: ldo7 {
+                                        regulator-compatible = "LDO7";
+                                        regulator-name = "VPLL_1.0V_AP";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+                                ldo8_reg: ldo8 {
+                                        regulator-compatible = "LDO8";
+                                        regulator-name = "VMIPI_1.0V";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-mem-off;
+                                };
+                                ldo9_reg: ldo9 {
+                                        regulator-compatible = "LDO9";
+                                        regulator-name = "CAM_ISP_MIPI_1.2V";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo10_reg: ldo10 {
+                                        regulator-compatible = "LDO10";
+                                        regulator-name = "VMIPI_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-off;
+                                };
+                                ldo11_reg: ldo11 {
+                                        regulator-compatible = "LDO11";
+                                        regulator-name = "VABB1_1.95V";
+                                        regulator-min-microvolt = <1950000>;
+                                        regulator-max-microvolt = <1950000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+                                ldo12_reg: ldo12 {
+                                        regulator-compatible = "LDO12";
+                                        regulator-name = "VUOTG_3.0V";
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        regulator-mem-off;
+                                };
+                                ldo13_reg: ldo13 {
+                                        regulator-compatible = "LDO13";
+                                        regulator-name = "NFC_AVDD_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo14_reg: ldo14 {
+                                        regulator-compatible = "LDO14";
+                                        regulator-name = "VABB2_1.95V";
+                                        regulator-min-microvolt = <1950000>;
+                                        regulator-max-microvolt = <1950000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+                                ldo15_reg: ldo15 {
+                                        regulator-compatible = "LDO15";
+                                        regulator-name = "VHSIC_1.0V";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-mem-off;
+                                };
+                                ldo16_reg: ldo16 {
+                                        regulator-compatible = "LDO16";
+                                        regulator-name = "VHSIC_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-off;
+                                };
+                                ldo17_reg: ldo17 {
+                                        regulator-compatible = "LDO17";
+                                        regulator-name = "CAM_SENSOR_CORE_1.2V";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo18_reg: ldo18 {
+                                        regulator-compatible = "LDO18";
+                                        regulator-name = "CAM_ISP_SEN_IO_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo19_reg: ldo19 {
+                                        regulator-compatible = "LDO19";
+                                        regulator-name = "VT_CAM_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo20_reg: ldo20 {
+                                        regulator-compatible = "LDO20";
+                                        regulator-name = "VDDQ_PRE_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo21_reg: ldo21 {
+                                        regulator-compatible = "LDO21";
+                                        regulator-name = "VTF_2.8V";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo22_reg: ldo22 {
+                                        regulator-compatible = "LDO22";
+                                        regulator-name = "VMEM_VDD_2.8V";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+                                ldo23_reg: ldo23 {
+                                        regulator-compatible = "LDO23";
+                                        regulator-name = "TSP_AVDD_3.3V";
+                                        regulator-min-microvolt = <3300000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo24_reg: ldo24 {
+                                        regulator-compatible = "LDO24";
+                                        regulator-name = "TSP_VDD_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo25_reg: ldo25 {
+                                        regulator-compatible = "LDO25";
+                                        regulator-name = "LCD_VCC_3.3V";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-mem-idle;
+                                };
+                                ldo26_reg: ldo26 {
+                                        regulator-compatible = "LDO26";
+                                        regulator-name = "MOTOR_VCC_3.0V";
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        regulator-mem-idle;
+                                };
+                                buck1_reg: buck1 {
+                                        regulator-compatible = "BUCK1";
+                                        regulator-name = "vdd_mif";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1100000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+                                buck2_reg: buck2 {
+                                        regulator-compatible = "BUCK2";
+                                        regulator-name = "vdd_arm";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1500000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+                                buck3_reg: buck3 {
+                                        regulator-compatible = "BUCK3";
+                                        regulator-name = "vdd_int";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1150000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+                                buck4_reg: buck4 {
+                                        regulator-compatible = "BUCK4";
+                                        regulator-name = "vdd_g3d";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1150000>;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+                                buck5_reg: buck5 {
+                                        regulator-compatible = "BUCK5";
+                                        regulator-name = "VMEM_1.2V_AP";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                };
+                                buck6_reg: buck6 {
+                                        regulator-compatible = "BUCK6";
+                                        regulator-name = "VCC_SUB_1.35V";
+                                        regulator-min-microvolt = <1350000>;
+                                        regulator-max-microvolt = <1350000>;
+                                        regulator-always-on;
+                                };
+                                buck7_reg: buck7 {
+                                        regulator-compatible = "BUCK7";
+                                        regulator-name = "VCC_SUB_2.0V";
+                                        regulator-min-microvolt = <2000000>;
+                                        regulator-max-microvolt = <2000000>;
+                                        regulator-always-on;
+                                };
+                                buck8_reg: buck8 {
+                                        regulator-compatible = "BUCK8";
+                                        regulator-name = "VMEM_VDDF_3.0V";
+                                        regulator-min-microvolt = <2850000>;
+                                        regulator-max-microvolt = <2850000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+                                buck9_reg: buck9 {
+                                        regulator-compatible = "BUCK9";
+                                        regulator-name = "CAM_ISP_CORE_1.2V";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-mem-off;
+                                };
+                        };
+                };
+        };
+        sdhci@12510000 {
+                bus-width = <8>;
+                non-removable;
+                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
+                pinctrl-names = "default";
+                vmmc-supply = <&vemmc_reg>;
+                status = "okay";
+        };
+        serial@13800000 {
+                status = "okay";
+        };
+        serial@13810000 {
+                status = "okay";
+        };
+        serial@13820000 {
+                status = "okay";
+        };
+        serial@13830000 {
+                status = "okay";
+        };
+        i2c_ak8975: i2c-gpio-0 {
+                compatible = "i2c-gpio";
+                gpios = <&gpy2 4 0>, <&gpy2 5 0>;
+                i2c-gpio,delay-us = <2>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "okay";
+                ak8975@0c {
+                        compatible = "ak,ak8975";
+                        reg = <0x0c>;
+                        gpios = <&gpj0 7 0>;
+                };
+        };
+        spi_1: spi@13930000 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&spi1_bus>;
+                status = "okay";
+                s5c73m3_spi: s5c73m3 {
+                        compatible = "samsung,s5c73m3";
+                        spi-max-frequency = <50000000>;
+                        reg = <0>;
+                        controller-data {
+                                cs-gpio = <&gpb 5 0>;
+                                samsung,spi-feedback-delay = <2>;
+                        };
+                };
+        };
+        camera {
+                pinctrl-0 = <&cam_port_b_clk_active>;
+                pinctrl-names = "default";
+                status = "okay";
+                fimc_0: fimc@11800000 {
+                        status = "okay";
+                };
+                fimc_1: fimc@11810000 {
+                        status = "okay";
+                };
+                fimc_2: fimc@11820000 {
+                        status = "okay";
+                };
+                fimc_3: fimc@11830000 {
+                        status = "okay";
+                };
+                csis_1: csis@11890000 {
+                        vddcore-supply = <&ldo8_reg>;
+                        vddio-supply = <&ldo10_reg>;
+                        clock-frequency = <160000000>;
+                        status = "okay";
+                        /* Camera D (4) MIPI CSI-2 (CSIS1) */
+                        port@4 {
+                                reg = <4>;
+                                csis1_ep: endpoint {
+                                        remote-endpoint = <&is_s5k6a3_ep>;
+                                        data-lanes = <1>;
+                                        samsung,csis-hs-settle = <18>;
+                                        samsung,csis-wclk;
+                                };
+                        };
+                };
+                fimc_lite_0: fimc-lite@12390000 {
+                        status = "okay";
+                };
+                fimc_lite_1: fimc-lite@123A0000 {
+                        status = "okay";
+                };
+                fimc-is@12000000 {
+                        pinctrl-0 = <&fimc_is_uart>;
+                        pinctrl-names = "default";
+                        status = "okay";
+                        i2c1_isp: i2c-isp@12140000 {
+                                pinctrl-0 = <&fimc_is_i2c1>;
+                                pinctrl-names = "default";
+                                s5k6a3@10 {
+                                        compatible = "samsung,s5k6a3";
+                                        reg = <0x10>;
+                                        svdda-supply = <&cam_io_reg>;
+                                        svddio-supply = <&ldo19_reg>;
+                                        clock-frequency = <24000000>;
+                                        /* CAM_B_CLKOUT */
+                                        clocks = <&clock_cam 1>;
+                                        clock-names = "mclk";
+                                        samsung,camclk-out = <1>;
+                                        gpios = <&gpm1 6 0>;
+                                        port {
+                                                is_s5k6a3_ep: endpoint {
+                                                        remote-endpoint = <&csis1_ep>;
+                                                        data-lanes = <1>;
+                                                };
+                                        };
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
index 704290f7c5c0..99b26df8dbc7 100644
--- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -401,13 +401,26 @@
                        samsung,pin-drv = <0>;
                };
-                cam_port_a: cam-port-a {
+                cam_port_a_io: cam-port-a-io {
                        samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
                                        "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
-                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3",
+                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
-                                        "gpj1-4";
                        samsung,pin-function = <2>;
-                        samsung,pin-pud = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+                cam_port_a_clk_active: cam-port-a-clk-active {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+                cam_port_a_clk_idle: cam-port-a-clk-idle {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <0>;
+                        samsung,pin-pud = <1>;
                        samsung,pin-drv = <0>;
                };
        };
@@ -778,16 +791,29 @@
                        samsung,pin-drv = <3>;
                };
-                cam_port_b: cam-port-b {
+                cam_port_b_io: cam-port-b-io {
                        samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
                                        "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
-                                        "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1",
+                                        "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
-                                        "gpm2-2";
                        samsung,pin-function = <3>;
                        samsung,pin-pud = <3>;
                        samsung,pin-drv = <0>;
                };
+                cam_port_b_clk_active: cam-port-b-clk-active {
+                        samsung,pins = "gpm2-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+                cam_port_b_clk_idle: cam-port-b-clk-idle {
+                        samsung,pins = "gpm2-2";
+                        samsung,pin-function = <0>;
+                        samsung,pin-pud = <1>;
+                        samsung,pin-drv = <0>;
+                };
                eint0: ext-int0 {
                        samsung,pins = "gpx0-0";
                        samsung,pin-function = <0xf>;
@@ -822,6 +848,27 @@
                        samsung,pin-pud = <0>;
                        samsung,pin-drv = <0>;
                };
+                fimc_is_i2c0: fimc-is-i2c0 {
+                        samsung,pins = "gpm4-0", "gpm4-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+                fimc_is_i2c1: fimc-is-i2c1 {
+                        samsung,pins = "gpm4-2", "gpm4-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+                fimc_is_uart: fimc-is-uart {
+                        samsung,pins = "gpm3-5", "gpm3-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
        };
        pinctrl@03860000 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 3aa2f060ba61..ad531fe6ab95 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -26,6 +26,13 @@
                pinctrl1 = &pinctrl_1;
                pinctrl2 = &pinctrl_2;
                pinctrl3 = &pinctrl_3;
+                fimc-lite0 = &fimc_lite_0;
+                fimc-lite1 = &fimc_lite_1;
+        };
+        pd_isp: isp-power-domain@10023CA0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023CA0 0x20>;
        };
        clock: clock-controller@10030000 {
@@ -73,4 +80,100 @@
                clock-names = "sclk_fimg2d", "fimg2d";
                status = "disabled";
        };
+        camera {
+                clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
+                clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
+                fimc_0: fimc@11800000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,cam-if;
+                };
+                fimc_1: fimc@11810000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,cam-if;
+                };
+                fimc_2: fimc@11820000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,lcd-wb;
+                        samsung,cam-if;
+                };
+                fimc_3: fimc@11830000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <1920 8192 1366 1920>;
+                        samsung,rotators = <0>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,lcd-wb;
+                };
+                fimc_lite_0: fimc-lite@12390000 {
+                        compatible = "samsung,exynos4212-fimc-lite";
+                        reg = <0x12390000 0x1000>;
+                        interrupts = <0 105 0>;
+                        samsung,power-domain = <&pd_isp>;
+                        clocks = <&clock 353>;
+                        clock-names = "flite";
+                        status = "disabled";
+                };
+                fimc_lite_1: fimc-lite@123A0000 {
+                        compatible = "samsung,exynos4212-fimc-lite";
+                        reg = <0x123A0000 0x1000>;
+                        interrupts = <0 106 0>;
+                        samsung,power-domain = <&pd_isp>;
+                        clocks = <&clock 354>;
+                        clock-names = "flite";
+                        status = "disabled";
+                };
+                fimc_is: fimc-is@12000000 {
+                        compatible = "samsung,exynos4212-fimc-is", "simple-bus";
+                        reg = <0x12000000 0x260000>;
+                        interrupts = <0 90 0>, <0 95 0>;
+                        samsung,power-domain = <&pd_isp>;
+                        clocks = <&clock 353>, <&clock 354>, <&clock 355>,
+                                <&clock 356>, <&clock 17>, <&clock 357>,
+                                <&clock 358>, <&clock 359>, <&clock 360>,
+                                <&clock 450>,<&clock 451>, <&clock 452>,
+                                <&clock 453>, <&clock 176>, <&clock 13>,
+                                <&clock 454>, <&clock 395>, <&clock 455>;
+                        clock-names = "lite0", "lite1", "ppmuispx",
+                                      "ppmuispmx", "mpll", "isp",
+                                      "drc", "fd", "mcuisp",
+                                      "ispdiv0", "ispdiv1", "mcuispdiv0",
+                                      "mcuispdiv1", "uart", "aclk200",
+                                      "div_aclk200", "aclk400mcuisp",
+                                      "div_aclk400mcuisp";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+                        status = "disabled";
+                        pmu {
+                                reg = <0x10020000 0x3000>;
+                        };
+                        i2c1_isp: i2c-isp@12140000 {
+                                compatible = "samsung,exynos4212-i2c-isp";
+                                reg = <0x12140000 0x100>;
+                                clocks = <&clock 370>;
+                                clock-names = "i2c_isp";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index f65e124c04a6..6afa57d2fecc 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -108,4 +108,23 @@
                interrupts = <0 42 0>;
                status = "disabled";
        };
+        fimd@14400000 {
+                compatible = "samsung,exynos5250-fimd";
+                interrupt-parent = <&combiner>;
+                reg = <0x14400000 0x40000>;
+                interrupt-names = "fifo", "vsync", "lcd_sys";
+                interrupts = <18 4>, <18 5>, <18 6>;
+                status = "disabled";
+        };
+        dp-controller@145B0000 {
+                compatible = "samsung,exynos5-dp";
+                reg = <0x145B0000 0x1000>;
+                interrupts = <10 3>;
+                interrupt-parent = <&combiner>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index abc7272c7afd..452d0b04d273 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -11,6 +11,7 @@
 /dts-v1/;
 #include "exynos5250.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 / {
        model = "Insignal Arndale evaluation board based on EXYNOS5250";
@@ -37,6 +38,28 @@
                s5m8767_pmic@66 {
                        compatible = "samsung,s5m8767-pmic";
                        reg = <0x66>;
+                        interrupt-parent = <&gpx3>;
+                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+                        vinb1-supply = <&main_dc_reg>;
+                        vinb2-supply = <&main_dc_reg>;
+                        vinb3-supply = <&main_dc_reg>;
+                        vinb4-supply = <&main_dc_reg>;
+                        vinb5-supply = <&main_dc_reg>;
+                        vinb6-supply = <&main_dc_reg>;
+                        vinb7-supply = <&main_dc_reg>;
+                        vinb8-supply = <&main_dc_reg>;
+                        vinb9-supply = <&main_dc_reg>;
+                        vinl1-supply = <&buck7_reg>;
+                        vinl2-supply = <&buck7_reg>;
+                        vinl3-supply = <&buck7_reg>;
+                        vinl4-supply = <&main_dc_reg>;
+                        vinl5-supply = <&main_dc_reg>;
+                        vinl6-supply = <&main_dc_reg>;
+                        vinl7-supply = <&main_dc_reg>;
+                        vinl8-supply = <&buck8_reg>;
+                        vinl9-supply = <&buck8_reg>;
                        s5m8767,pmic-buck2-dvs-voltage = <1300000>;
                        s5m8767,pmic-buck3-dvs-voltage = <1100000>;
@@ -276,6 +299,16 @@
                                        op_mode = <1>;
                                };
+                                buck7_reg: BUCK7 {
+                                        regulator-name = "PVDD_BUCK7";
+                                        regulator-always-on;
+                                };
+                                buck8_reg: BUCK8 {
+                                        regulator-name = "PVDD_BUCK8";
+                                        regulator-always-on;
+                                };
                                buck9_reg: BUCK9 {
                                        regulator-name = "VDD_33_OFF_EXT1";
                                        regulator-min-microvolt = <750000>;
@@ -295,7 +328,22 @@
        };
        i2c@12C90000 {
-                status = "disabled";
+                wm1811a@1a {
+                        compatible = "wlf,wm1811";
+                        reg = <0x1a>;
+                        AVDD2-supply = <&main_dc_reg>;
+                        CPVDD-supply = <&main_dc_reg>;
+                        DBVDD1-supply = <&main_dc_reg>;
+                        DBVDD2-supply = <&main_dc_reg>;
+                        DBVDD3-supply = <&main_dc_reg>;
+                        LDO1VDD-supply = <&main_dc_reg>;
+                        SPKVDD1-supply = <&main_dc_reg>;
+                        SPKVDD2-supply = <&main_dc_reg>;
+                        wlf,ldo1ena = <&gpb0 0 0>;
+                        wlf,ldo2ena = <&gpb0 1 0>;
+                };
        };
        i2c@12CA0000 {
@@ -429,18 +477,29 @@
                vdd-supply = <&ldo8_reg>;
        };
-        mmc_reg: voltage-regulator {
+        regulators {
-                compatible = "regulator-fixed";
+                compatible = "simple-bus";
-                regulator-name = "VDD_33ON_2.8V";
+                #address-cells = <1>;
-                regulator-min-microvolt = <2800000>;
+                #size-cells = <0>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpx1 1 1>;
-                enable-active-high;
-        };
-        reg_hdmi_en: fixedregulator@0 {
+                main_dc_reg: fixedregulator@1 {
-                compatible = "regulator-fixed";
+                        compatible = "regulator-fixed";
-                regulator-name = "hdmi-en";
+                        regulator-name = "MAIN_DC";
+                };
+                mmc_reg: voltage-regulator {
+                        compatible = "regulator-fixed";
+                        regulator-name = "VDD_33ON_2.8V";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpx1 1 1>;
+                        enable-active-high;
+                };
+                reg_hdmi_en: fixedregulator@0 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "hdmi-en";
+                };
        };
        fixed-rate-clocks {
@@ -450,16 +509,18 @@
                };
        };
-        dp-controller {
+        dp-controller@145B0000 {
                samsung,color-space = <0>;
                samsung,dynamic-range = <0>;
                samsung,ycbcr-coeff = <0>;
                samsung,color-depth = <1>;
                samsung,link-rate = <0x0a>;
                samsung,lane-count = <4>;
+                status = "okay";
        };
        fimd: fimd@14400000 {
+                status = "okay";
                display-timings {
                        native-mode = <&timing0>;
                        timing0: timing@0 {
@@ -480,4 +541,22 @@
        rtc {
                status = "okay";
        };
+        usb_hub_bus {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                // SMSC USB3503 connected in hardware only mode as a PHY
+                usb_hub: usb_hub {
+                        compatible = "smsc,usb3503a";
+                        reset-gpios = <&gpx3 5 1>;
+                        connect-gpios = <&gpd1 7 1>;
+                };
+        };
+        usb@12110000 {
+                usb-phy = <&usb2_phy>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49f18c24a576..2538b329f2ce 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -250,7 +250,7 @@
                samsung,vbus-gpio = <&gpx2 6 0>;
        };
-        dp-controller {
+        dp-controller@145B0000 {
                samsung,color-space = <0>;
                samsung,dynamic-range = <0>;
                samsung,ycbcr-coeff = <0>;
@@ -260,21 +260,25 @@
                pinctrl-names = "default";
                pinctrl-0 = <&dp_hpd>;
+                status = "okay";
        };
-        display-timings {
+        fimd@14400000 {
-                native-mode = <&timing0>;
+                status = "okay";
-                timing0: timing@0 {
+                display-timings {
-                        /* 1280x800 */
+                        native-mode = <&timing0>;
-                        clock-frequency = <50000>;
+                        timing0: timing@0 {
-                        hactive = <1280>;
+                                /* 1280x800 */
-                        vactive = <800>;
+                                clock-frequency = <50000>;
-                        hfront-porch = <4>;
+                                hactive = <1280>;
-                        hback-porch = <4>;
+                                vactive = <800>;
-                        hsync-len = <4>;
+                                hfront-porch = <4>;
-                        vback-porch = <4>;
+                                hback-porch = <4>;
-                        vfront-porch = <4>;
+                                hsync-len = <4>;
-                        vsync-len = <4>;
+                                vback-porch = <4>;
+                                vfront-porch = <4>;
+                                vsync-len = <4>;
+                        };
                };
        };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index f2dfa6b1f1a1..f7e2d3493f82 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,11 +163,21 @@
                clock-names = "watchdog";
        };
+        g2d@10850000 {
+                compatible = "samsung,exynos5250-g2d";
+                reg = <0x10850000 0x1000>;
+                interrupts = <0 91 0>;
+                clocks = <&clock 345>;
+                clock-names = "fimg2d";
+        };
        codec@11000000 {
                compatible = "samsung,mfc-v6";
                reg = <0x11000000 0x10000>;
                interrupts = <0 96 0>;
                samsung,power-domain = <&pd_mfc>;
+                clocks = <&clock 266>;
+                clock-names = "mfc";
        };
        rtc {
@@ -611,28 +621,20 @@
                interrupts = <0 94 0>;
        };
-        dp-controller {
+        dp_phy: video-phy@10040720 {
-                compatible = "samsung,exynos5-dp";
+                compatible = "samsung,exynos5250-dp-video-phy";
-                reg = <0x145b0000 0x1000>;
+                reg = <0x10040720 4>;
-                interrupts = <10 3>;
+                #phy-cells = <0>;
-                interrupt-parent = <&combiner>;
+        };
+        dp-controller@145B0000 {
                clocks = <&clock 342>;
                clock-names = "dp";
-                #address-cells = <1>;
+                phys = <&dp_phy>;
-                #size-cells = <0>;
+                phy-names = "dp";
-                dptx-phy {
-                        reg = <0x10040720>;
-                        samsung,enable-mask = <1>;
-                };
        };
-        fimd {
+        fimd@14400000 {
-                compatible = "samsung,exynos5250-fimd";
-                interrupt-parent = <&combiner>;
-                reg = <0x14400000 0x40000>;
-                interrupt-names = "fifo", "vsync", "lcd_sys";
-                interrupts = <18 4>, <18 5>, <18 6>;
                clocks = <&clock 133>, <&clock 339>;
                clock-names = "sclk_fimd", "fimd";
        };
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index 5848c425ae4d..e695aba5f73c 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -59,6 +59,13 @@
                        interrupt-controller;
                        #interrupt-cells = <2>;
                };
+                dp_hpd: dp_hpd {
+                        samsung,pins = "gpx0-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samaung,pin-drv = <0>;
+                };
        };
        pinctrl@13410000 {
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 08607df6a180..bafba25ba7c2 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -30,4 +30,35 @@
                        clock-frequency = <24000000>;
                };
        };
+        dp-controller@145B0000 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&dp_hpd>;
+                samsung,color-space = <0>;
+                samsung,dynamic-range = <0>;
+                samsung,ycbcr-coeff = <0>;
+                samsung,color-depth = <1>;
+                samsung,link-rate = <0x0a>;
+                samsung,lane-count = <4>;
+                status = "okay";
+        };
+        fimd@14400000 {
+                status = "okay";
+                display-timings {
+                        native-mode = <&timing0>;
+                        timing0: timing@0 {
+                                clock-frequency = <50000>;
+                                hactive = <2560>;
+                                vactive = <1600>;
+                                hfront-porch = <48>;
+                                hback-porch = <80>;
+                                hsync-len = <32>;
+                                vback-porch = <16>;
+                                vfront-porch = <8>;
+                                vsync-len = <6>;
+                        };
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 9e90d1ec0c28..5353e32897a4 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -14,7 +14,10 @@
 */
 #include "exynos5.dtsi"
-/include/ "exynos5420-pinctrl.dtsi"
+#include "exynos5420-pinctrl.dtsi"
+#include <dt-bindings/clk/exynos-audss-clk.h>
 / {
        compatible = "samsung,exynos5420";
@@ -65,6 +68,22 @@
                #clock-cells = <1>;
        };
+        clock_audss: audss-clock-controller@3810000 {
+                compatible = "samsung,exynos5420-audss-clock";
+                reg = <0x03810000 0x0C>;
+                #clock-cells = <1>;
+                clocks = <&clock 148>;
+                clock-names = "sclk_audio";
+        };
+        codec@11000000 {
+                compatible = "samsung,mfc-v7";
+                reg = <0x11000000 0x10000>;
+                interrupts = <0 96 0>;
+                clocks = <&clock 401>;
+                clock-names = "mfc";
+        };
        mct@101C0000 {
                compatible = "samsung,exynos4210-mct";
                reg = <0x101C0000 0x800>;
@@ -90,6 +109,41 @@
                };
        };
+        gsc_pd: power-domain@10044000 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044000 0x20>;
+        };
+        isp_pd: power-domain@10044020 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044020 0x20>;
+        };
+        mfc_pd: power-domain@10044060 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044060 0x20>;
+        };
+        disp_pd: power-domain@100440C0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x100440C0 0x20>;
+        };
+        mau_pd: power-domain@100440E0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x100440E0 0x20>;
+        };
+        g2d_pd: power-domain@10044100 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044100 0x20>;
+        };
+        msc_pd: power-domain@10044120 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044120 0x20>;
+        };
        pinctrl_0: pinctrl@13400000 {
                compatible = "samsung,exynos5420-pinctrl";
                reg = <0x13400000 0x1000>;
@@ -145,4 +199,23 @@
                clocks = <&clock 260>, <&clock 131>;
                clock-names = "uart", "clk_uart_baud0";
        };
+        dp_phy: video-phy@10040728 {
+                compatible = "samsung,exynos5250-dp-video-phy";
+                reg = <0x10040728 4>;
+                #phy-cells = <0>;
+        };
+        dp-controller@145B0000 {
+                clocks = <&clock 412>;
+                clock-names = "dp";
+                phys = <&dp_phy>;
+                phy-names = "dp";
+        };
+        fimd@14400000 {
+                samsung,power-domain = <&disp_pd>;
+                clocks = <&clock 147>, <&clock 421>;
+                clock-names = "sclk_fimd", "fimd";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 1b81f36896bc..5d6cf4965d6e 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -18,6 +18,9 @@
        aliases {
                spi0 = &spi_0;
+                tmuctrl0 = &tmuctrl_0;
+                tmuctrl1 = &tmuctrl_1;
+                tmuctrl2 = &tmuctrl_2;
        };
        clock: clock-controller@160000 {
@@ -207,6 +210,30 @@
                clock-names = "rtc";
        };
+        tmuctrl_0: tmuctrl@160118 {
+                compatible = "samsung,exynos5440-tmu";
+                reg = <0x160118 0x230>, <0x160368 0x10>;
+                interrupts = <0 58 0>;
+                clocks = <&clock 21>;
+                clock-names = "tmu_apbif";
+        };
+        tmuctrl_1: tmuctrl@16011C {
+                compatible = "samsung,exynos5440-tmu";
+                reg = <0x16011C 0x230>, <0x160368 0x10>;
+                interrupts = <0 58 0>;
+                clocks = <&clock 21>;
+                clock-names = "tmu_apbif";
+        };
+        tmuctrl_2: tmuctrl@160120 {
+                compatible = "samsung,exynos5440-tmu";
+                reg = <0x160120 0x230>, <0x160368 0x10>;
+                interrupts = <0 58 0>;
+                clocks = <&clock 21>;
+                clock-names = "tmu_apbif";
+        };
        sata@210000 {
                compatible = "snps,exynos5440-ahci";
                reg = <0x210000 0x10000>;
diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts
index da0588a04131..185c7c01102a 100644
--- a/arch/arm/boot/dts/imx23-evk.dts
+++ b/arch/arm/boot/dts/imx23-evk.dts
@@ -90,6 +90,11 @@
                };
                apbx@80040000 {
+                        lradc@80050000 {
+                                status = "okay";
+                                fsl,lradc-touchscreen-wires = <4>;
+                        };
                        pwm: pwm@80064000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&pwm2_pins_a>;
@@ -107,6 +112,16 @@
                                pinctrl-0 = <&duart_pins_a>;
                                status = "okay";
                        };
+                        usbphy0: usbphy@8007c000 {
+                                status = "okay";
+                        };
+                };
+        };
+        ahb@80080000 {
+                usb0: usb@80080000 {
+                        status = "okay";
                };
        };
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
index d107c4af321f..fc766ae12e24 100644
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -69,6 +69,10 @@
                };
                apbx@80040000 {
+                        lradc@80050000 {
+                                status = "okay";
+                        };
                        duart: serial@80070000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&duart_pins_a>;
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 587ceef81e45..28b5ce289662 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -20,6 +20,8 @@
                gpio2 = &gpio2;
                serial0 = &auart0;
                serial1 = &auart1;
+                spi0 = &ssp0;
+                spi1 = &ssp1;
        };
        cpus {
@@ -76,23 +78,21 @@
                                #size-cells = <1>;
                                reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
                                reg-names = "gpmi-nand", "bch";
-                                interrupts = <13>, <56>;
+                                interrupts = <56>;
-                                interrupt-names = "gpmi-dma", "bch";
+                                interrupt-names = "bch";
                                clocks = <&clks 34>;
                                clock-names = "gpmi_io";
                                dmas = <&dma_apbh 4>;
                                dma-names = "rx-tx";
-                                fsl,gpmi-dma-channel = <4>;
                                status = "disabled";
                        };
                        ssp0: ssp@80010000 {
                                reg = <0x80010000 0x2000>;
-                                interrupts = <15 14>;
+                                interrupts = <15>;
                                clocks = <&clks 33>;
                                dmas = <&dma_apbh 1>;
                                dma-names = "rx-tx";
-                                fsl,ssp-dma-channel = <1>;
                                status = "disabled";
                        };
@@ -366,11 +366,10 @@
                        ssp1: ssp@80034000 {
                                reg = <0x80034000 0x2000>;
-                                interrupts = <2 20>;
+                                interrupts = <2>;
                                clocks = <&clks 33>;
                                dmas = <&dma_apbh 2>;
                                dma-names = "rx-tx";
-                                fsl,ssp-dma-channel = <2>;
                                status = "disabled";
                        };
@@ -472,7 +471,7 @@
                        auart0: serial@8006c000 {
                                compatible = "fsl,imx23-auart";
                                reg = <0x8006c000 0x2000>;
-                                interrupts = <24 25 23>;
+                                interrupts = <24>;
                                clocks = <&clks 32>;
                                dmas = <&dma_apbx 6>, <&dma_apbx 7>;
                                dma-names = "rx", "tx";
@@ -482,7 +481,7 @@
                        auart1: serial@8006e000 {
                                compatible = "fsl,imx23-auart";
                                reg = <0x8006e000 0x2000>;
-                                interrupts = <59 60 58>;
+                                interrupts = <59>;
                                clocks = <&clks 32>;
                                dmas = <&dma_apbx 8>, <&dma_apbx 9>;
                                dma-names = "rx", "tx";
diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts
index 94c4476972c3..1ec8c94bbac9 100644
--- a/arch/arm/boot/dts/imx28-cfa10036.dts
+++ b/arch/arm/boot/dts/imx28-cfa10036.dts
@@ -23,10 +23,7 @@
        apb@80000000 {
                apbh@80000000 {
                        pinctrl@80018000 {
-                                pinctrl-names = "default";
+                                ssd1306_cfa10036: ssd1306-10036@0 {
-                                pinctrl-0 = <&hog_pins_cfa10036>;
-                                hog_pins_cfa10036: hog-10036@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */
@@ -83,6 +80,8 @@
                                ssd1306: oled@3c {
                                        compatible = "solomon,ssd1306fb-i2c";
+                                        pinctrl-names = "default";
+                                        pinctrl-0 = <&ssd1306_cfa10036>;
                                        reg = <0x3c>;
                                        reset-gpios = <&gpio2 7 0>;
                                        solomon,height = <32>;
diff --git a/arch/arm/boot/dts/imx28-cfa10037.dts b/arch/arm/boot/dts/imx28-cfa10037.dts
index c2ef3a3d655e..182b99fe35f3 100644
--- a/arch/arm/boot/dts/imx28-cfa10037.dts
+++ b/arch/arm/boot/dts/imx28-cfa10037.dts
@@ -22,13 +22,19 @@
        apb@80000000 {
                apbh@80000000 {
                        pinctrl@80018000 {
-                                pinctrl-names = "default", "default";
+                                usb_pins_cfa10037: usb-10037@0 {
-                                pinctrl-1 = <&hog_pins_cfa10037>;
-                                hog_pins_cfa10037: hog-10037@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                                mac0_pins_cfa10037: mac0-10037@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
                                                0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
                                        >;
                                        fsl,drive-strength = <0>;
@@ -56,7 +62,8 @@
                mac0: ethernet@800f0000 {
                        phy-mode = "rmii";
                        pinctrl-names = "default";
-                        pinctrl-0 = <&mac0_pins_a>;
+                        pinctrl-0 = <&mac0_pins_a
+                                &mac0_pins_cfa10037>;
                        phy-reset-gpios = <&gpio2 21 0>;
                        phy-reset-duration = <100>;
                        status = "okay";
@@ -68,6 +75,8 @@
                reg_usb1_vbus: usb1_vbus {
                        compatible = "regulator-fixed";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&usb_pins_cfa10037>;
                        regulator-name = "usb1_vbus";
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
index 04b2f769ffbd..06e4cfaf7dd2 100644
--- a/arch/arm/boot/dts/imx28-cfa10049.dts
+++ b/arch/arm/boot/dts/imx28-cfa10049.dts
@@ -22,32 +22,62 @@
        apb@80000000 {
                apbh@80000000 {
                        pinctrl@80018000 {
-                                pinctrl-names = "default", "default";
+                                usb_pins_cfa10049: usb-10049@0 {
-                                pinctrl-1 = <&hog_pins_cfa10049
-                                        &hog_pins_cfa10049_pullup>;
-                                hog_pins_cfa10049: hog-10049@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                                i2cmux_pins_cfa10049: i2cmux-10049@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
                                                0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
                                                0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                                mac0_pins_cfa10049: mac0-10049@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
                                                0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
-                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
                                        >;
                                        fsl,drive-strength = <0>;
                                        fsl,voltage = <1>;
                                        fsl,pull-up = <0>;
                                };
-                                hog_pins_cfa10049_pullup: hog-10049-pullup@0 {
+                                pca_pins_cfa10049: pca-10049@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+                                rotary_pins_cfa10049: rotary-10049@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
                                                0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */
                                                0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+                                rotary_btn_pins_cfa10049: rotary-btn-10049@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
                                                0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */
-                                                0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
                                        >;
                                        fsl,drive-strength = <0>;
                                        fsl,voltage = <1>;
@@ -60,6 +90,7 @@
                                                0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
                                                0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
                                                0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
+                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
                                        >;
                                        fsl,drive-strength = <1>;
                                        fsl,voltage = <1>;
@@ -120,6 +151,16 @@
                                        fsl,pull-up = <0>;
                                };
+                                lcdif_pins_cfa10049_pullup: lcdif-10049-pullup@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
                                w1_gpio_pins: w1-gpio@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
@@ -134,7 +175,8 @@
                        lcdif@80030000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&lcdif_18bit_pins_cfa10049
-                                             &lcdif_pins_cfa10049>;
+                                             &lcdif_pins_cfa10049
+                                             &lcdif_pins_cfa10049_pullup>;
                                display = <&display>;
                                status = "okay";
@@ -181,6 +223,8 @@
                                compatible = "i2c-mux-gpio";
                                #address-cells = <1>;
                                #size-cells = <0>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2cmux_pins_cfa10049>;
                                mux-gpios = <&gpio1 22 0 &gpio1 23 0>;
                                i2c-parent = <&i2c1>;
@@ -203,6 +247,8 @@
                                        pca9555: pca9555@20 {
                                                compatible = "nxp,pca9555";
+                                                pinctrl-names = "default";
+                                                pinctrl-0 = <&pca_pins_cfa10049>;
                                                interrupt-parent = <&gpio2>;
                                                interrupts = <19 0x2>;
                                                gpio-controller;
@@ -239,6 +285,8 @@
                reg_usb1_vbus: usb1_vbus {
                        compatible = "regulator-fixed";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&usb_pins_cfa10049>;
                        regulator-name = "usb1_vbus";
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
@@ -250,7 +298,8 @@
                mac0: ethernet@800f0000 {
                        phy-mode = "rmii";
                        pinctrl-names = "default";
-                        pinctrl-0 = <&mac0_pins_a>;
+                        pinctrl-0 = <&mac0_pins_a
+                                &mac0_pins_cfa10049>;
                        phy-reset-gpios = <&gpio2 21 0>;
                        phy-reset-duration = <100>;
                        status = "okay";
@@ -320,6 +369,8 @@
        gpio_keys {
                compatible = "gpio-keys";
+                pinctrl-names = "default";
+                pinctrl-0 = <&rotary_btn_pins_cfa10049>;
                #address-cells = <1>;
                #size-cells = <0>;
@@ -333,6 +384,8 @@
        rotary {
                compatible = "rotary-encoder";
+                pinctrl-names = "default";
+                pinctrl-0 = <&rotary_pins_cfa10049>;
                gpios = <&gpio3 24 1>, <&gpio3 25 1>;
                linux,axis = <1>; /* REL_Y */
                rotary-encoder,relative-axis;
diff --git a/arch/arm/boot/dts/imx28-cfa10055.dts b/arch/arm/boot/dts/imx28-cfa10055.dts
index 158111244122..171bcbe1ec4b 100644
--- a/arch/arm/boot/dts/imx28-cfa10055.dts
+++ b/arch/arm/boot/dts/imx28-cfa10055.dts
@@ -23,36 +23,13 @@
        apb@80000000 {
                apbh@80000000 {
                        pinctrl@80018000 {
-                                pinctrl-names = "default", "default";
-                                pinctrl-1 = <&hog_pins_cfa10055
-                                        &hog_pins_cfa10055_pullup>;
-                                hog_pins_cfa10055: hog-10055@0 {
-                                        reg = <0>;
-                                        fsl,pinmux-ids = <
-                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
-                                        >;
-                                        fsl,drive-strength = <0>;
-                                        fsl,voltage = <1>;
-                                        fsl,pull-up = <0>;
-                                };
-                                hog_pins_cfa10055_pullup: hog-10055-pullup@0 {
-                                        reg = <0>;
-                                        fsl,pinmux-ids = <
-                                                0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
-                                        >;
-                                        fsl,drive-strength = <0>;
-                                        fsl,voltage = <1>;
-                                        fsl,pull-up = <1>;
-                                };
                                spi2_pins_cfa10055: spi2-cfa10055@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
                                                0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
                                                0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
+                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
                                        >;
                                        fsl,drive-strength = <1>;
                                        fsl,voltage = <1>;
@@ -98,12 +75,23 @@
                                        fsl,voltage = <1>;
                                        fsl,pull-up = <0>;
                                };
+                                lcdif_pins_cfa10055_pullup: lcdif-10055-pullup@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
                        };
                        lcdif@80030000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&lcdif_18bit_pins_cfa10055
-                                             &lcdif_pins_cfa10055>;
+                                             &lcdif_pins_cfa10055
+                                             &lcdif_pins_cfa10055_pullup>;
                                display = <&display>;
                                status = "okay";
diff --git a/arch/arm/boot/dts/imx28-cfa10056.dts b/arch/arm/boot/dts/imx28-cfa10056.dts
new file mode 100644
index 000000000000..b45dd0e4ee57
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-cfa10056.dts
@@ -0,0 +1,119 @@
+/*
+ * Copyright 2013 Free Electrons
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/*
+ * The CFA-10055 is an expansion board for the CFA-10036 module and
+ * CFA-10037, thus we need to include the CFA-10037 DTS.
+ */
+/include/ "imx28-cfa10037.dts"
+/ {
+        model = "Crystalfontz CFA-10056 Board";
+        compatible = "crystalfontz,cfa10056", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28";
+        apb@80000000 {
+                apbh@80000000 {
+                        pinctrl@80018000 {
+                                spi2_pins_cfa10056: spi2-cfa10056@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
+                                                0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
+                                                0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
+                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
+                                        >;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+                                lcdif_pins_cfa10056: lcdif-10056@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
+                                                0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
+                                                0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
+                                                0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                                lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+                        };
+                        lcdif@80030000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&lcdif_24bit_pins_a
+                                                &lcdif_pins_cfa10056
+                                                &lcdif_pins_cfa10056_pullup >;
+                                display = <&display>;
+                                status = "okay";
+                                display: display {
+                                        bits-per-pixel = <32>;
+                                        bus-width = <24>;
+                                        display-timings {
+                                                native-mode = <&timing0>;
+                                                timing0: timing0 {
+                                                        clock-frequency = <32000000>;
+                                                        hactive = <480>;
+                                                        vactive = <800>;
+                                                        hback-porch = <2>;
+                                                        hfront-porch = <2>;
+                                                        vback-porch = <2>;
+                                                        vfront-porch = <2>;
+                                                        hsync-len = <5>;
+                                                        vsync-len = <5>;
+                                                        hsync-active = <0>;
+                                                        vsync-active = <0>;
+                                                        de-active = <1>;
+                                                        pixelclk-active = <1>;
+                                                };
+                                        };
+                                };
+                        };
+                };
+        };
+        spi2 {
+                compatible = "spi-gpio";
+                pinctrl-names = "default";
+                pinctrl-0 = <&spi2_pins_cfa10056>;
+                status = "okay";
+                gpio-sck = <&gpio2 16 0>;
+                gpio-mosi = <&gpio2 17 0>;
+                gpio-miso = <&gpio2 18 0>;
+                cs-gpios = <&gpio3 5 0>;
+                num-chipselects = <1>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                hx8369: hx8369@0 {
+                        compatible = "himax,hx8369a", "himax,hx8369";
+                        reg = <0>;
+                        spi-max-frequency = <100000>;
+                        spi-cpol;
+                        spi-cpha;
+                        gpios-reset = <&gpio3 30 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx28-cfa10057.dts b/arch/arm/boot/dts/imx28-cfa10057.dts
index 2da713cdb42a..0333c0532f28 100644
--- a/arch/arm/boot/dts/imx28-cfa10057.dts
+++ b/arch/arm/boot/dts/imx28-cfa10057.dts
@@ -23,35 +23,16 @@
        apb@80000000 {
                apbh@80000000 {
                        pinctrl@80018000 {
-                                pinctrl-names = "default", "default";
+                                usb_pins_cfa10057: usb-10057@0 {
-                                pinctrl-1 = <&hog_pins_cfa10057
-                                        &hog_pins_cfa10057_pullup>;
-                                hog_pins_cfa10057: hog-10057@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
-                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
                                        >;
                                        fsl,drive-strength = <0>;
                                        fsl,voltage = <1>;
                                        fsl,pull-up = <0>;
                                };
-                                hog_pins_cfa10057_pullup: hog-10057-pullup@0 {
-                                        reg = <0>;
-                                        fsl,pinmux-ids = <
-                                                0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */
-                                                0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */
-                                                0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */
-                                                0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */
-                                                0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
-                                        >;
-                                        fsl,drive-strength = <0>;
-                                        fsl,voltage = <1>;
-                                        fsl,pull-up = <1>;
-                                };
                                lcdif_18bit_pins_cfa10057: lcdif-18bit@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
@@ -164,6 +145,8 @@
                reg_usb1_vbus: usb1_vbus {
                        compatible = "regulator-fixed";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&usb_pins_cfa10057>;
                        regulator-name = "usb1_vbus";
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
diff --git a/arch/arm/boot/dts/imx28-cfa10058.dts b/arch/arm/boot/dts/imx28-cfa10058.dts
new file mode 100644
index 000000000000..64c64c55a82a
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-cfa10058.dts
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2013 Crystalfontz America, Inc.
+ * Copyright 2013 Free Electrons
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/*
+ * The CFA-10058 is an expansion board for the CFA-10036 module, thus we
+ * need to include the CFA-10036 DTS.
+ */
+/include/ "imx28-cfa10036.dts"
+/ {
+        model = "Crystalfontz CFA-10058 Board";
+        compatible = "crystalfontz,cfa10058", "crystalfontz,cfa10036", "fsl,imx28";
+        apb@80000000 {
+                apbh@80000000 {
+                        pinctrl@80018000 {
+                                usb_pins_cfa10058: usb-10058@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                                lcdif_pins_cfa10058: lcdif-10058@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
+                                                0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
+                                                0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
+                                                0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                        };
+                        lcdif@80030000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&lcdif_24bit_pins_a
+                                                 &lcdif_pins_cfa10058>;
+                                display = <&display>;
+                                status = "okay";
+                                display: display {
+                                        bits-per-pixel = <32>;
+                                        bus-width = <24>;
+                                        display-timings {
+                                                native-mode = <&timing0>;
+                                                timing0: timing0 {
+                                                        clock-frequency = <30000000>;
+                                                        hactive = <800>;
+                                                        vactive = <480>;
+                                                        hback-porch = <40>;
+                                                        hfront-porch = <40>;
+                                                        vback-porch = <13>;
+                                                        vfront-porch = <29>;
+                                                        hsync-len = <8>;
+                                                        vsync-len = <8>;
+                                                        hsync-active = <0>;
+                                                        vsync-active = <0>;
+                                                        de-active = <1>;
+                                                        pixelclk-active = <1>;
+                                                };
+                                        };
+                                };
+                        };
+                };
+                apbx@80040000 {
+                        lradc@80050000 {
+                                fsl,lradc-touchscreen-wires = <4>;
+                                status = "okay";
+                        };
+                        pwm: pwm@80064000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pwm3_pins_b>;
+                                status = "okay";
+                        };
+                        usbphy1: usbphy@8007e000 {
+                                status = "okay";
+                        };
+                };
+        };
+        ahb@80080000 {
+                usb1: usb@80090000 {
+                        vbus-supply = <&reg_usb1_vbus>;
+                        pinctrl-0 = <&usbphy1_pins_a>;
+                        pinctrl-names = "default";
+                        status = "okay";
+                };
+        };
+        regulators {
+                compatible = "simple-bus";
+                reg_usb1_vbus: usb1_vbus {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&usb_pins_cfa10058>;
+                        compatible = "regulator-fixed";
+                        regulator-name = "usb1_vbus";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        gpio = <&gpio0 7 1>;
+                };
+        };
+        ahb@80080000 {
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        phy-reset-gpios = <&gpio2 21 0>;
+                        phy-reset-duration = <100>;
+                        status = "okay";
+                };
+        };
+        backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm 3 5000000>;
+                brightness-levels = <0 4 8 16 32 64 128 255>;
+                default-brightness-level = <6>;
+        };
+};
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 44d9da57736e..0d322a2bebaf 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -235,6 +235,12 @@
                                pinctrl-0 = <&auart2_2pins_b>;
                                status = "okay";
                        };
+                        pwm: pwm@80064000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pwm4_pins_a>;
+                                status = "okay";
+                        };
                };
        };
@@ -270,6 +276,13 @@
                };
        };
+        backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm 4 5000000>;
+                brightness-levels = <0 4 8 16 32 64 128 255>;
+                default-brightness-level = <6>;
+        };
        regulators {
                compatible = "simple-bus";
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 9524a0571281..7363fded95ee 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -15,6 +15,8 @@
        interrupt-parent = <&icoll>;
        aliases {
+                ethernet0 = &mac0;
+                ethernet1 = &mac1;
                gpio0 = &gpio0;
                gpio1 = &gpio1;
                gpio2 = &gpio2;
@@ -27,8 +29,8 @@
                serial2 = &auart2;
                serial3 = &auart3;
                serial4 = &auart4;
-                ethernet0 = &mac0;
+                spi0 = &ssp1;
-                ethernet1 = &mac1;
+                spi1 = &ssp2;
        };
        cpus {
@@ -62,9 +64,9 @@
                                reg = <0x80000000 0x2000>;
                        };
-                        hsadc@80002000 {
+                        hsadc: hsadc@80002000 {
                                reg = <0x80002000 0x2000>;
-                                interrupts = <13 87>;
+                                interrupts = <13>;
                                dmas = <&dma_apbh 12>;
                                dma-names = "rx";
                                status = "disabled";
@@ -86,25 +88,24 @@
                                clocks = <&clks 25>;
                        };
-                        perfmon@80006000 {
+                        perfmon: perfmon@80006000 {
                                reg = <0x80006000 0x800>;
                                interrupts = <27>;
                                status = "disabled";
                        };
-                        gpmi-nand@8000c000 {
+                        gpmi: gpmi-nand@8000c000 {
                                compatible = "fsl,imx28-gpmi-nand";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
                                reg-names = "gpmi-nand", "bch";
-                                interrupts = <88>, <41>;
+                                interrupts = <41>;
-                                interrupt-names = "gpmi-dma", "bch";
+                                interrupt-names = "bch";
                                clocks = <&clks 50>;
                                clock-names = "gpmi_io";
                                dmas = <&dma_apbh 4>;
                                dma-names = "rx-tx";
-                                fsl,gpmi-dma-channel = <4>;
                                status = "disabled";
                        };
@@ -112,11 +113,10 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0x80010000 0x2000>;
-                                interrupts = <96 82>;
+                                interrupts = <96>;
                                clocks = <&clks 46>;
                                dmas = <&dma_apbh 0>;
                                dma-names = "rx-tx";
-                                fsl,ssp-dma-channel = <0>;
                                status = "disabled";
                        };
@@ -124,11 +124,10 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0x80012000 0x2000>;
-                                interrupts = <97 83>;
+                                interrupts = <97>;
                                clocks = <&clks 47>;
                                dmas = <&dma_apbh 1>;
                                dma-names = "rx-tx";
-                                fsl,ssp-dma-channel = <1>;
                                status = "disabled";
                        };
@@ -136,11 +135,10 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0x80014000 0x2000>;
-                                interrupts = <98 84>;
+                                interrupts = <98>;
                                clocks = <&clks 48>;
                                dmas = <&dma_apbh 2>;
                                dma-names = "rx-tx";
-                                fsl,ssp-dma-channel = <2>;
                                status = "disabled";
                        };
@@ -148,15 +146,14 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0x80016000 0x2000>;
-                                interrupts = <99 85>;
+                                interrupts = <99>;
                                clocks = <&clks 49>;
                                dmas = <&dma_apbh 3>;
                                dma-names = "rx-tx";
-                                fsl,ssp-dma-channel = <3>;
                                status = "disabled";
                        };
-                        pinctrl@80018000 {
+                        pinctrl: pinctrl@80018000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx28-pinctrl", "simple-bus";
@@ -521,6 +518,18 @@
                                        fsl,pull-up = <1>;
                                };
+                                saif0_pins_b: saif0@1 {
+                                        reg = <1>;
+                                        fsl,pinmux-ids = <
+                                                0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
+                                                0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
+                                                0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
+                                        >;
+                                        fsl,drive-strength = <2>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
                                saif1_pins_a: saif1@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
@@ -639,6 +648,19 @@
                                        fsl,pull-up = <0>;
                                };
+                                lcdif_sync_pins_a: lcdif-sync@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
+                                                0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
+                                                0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
+                                                0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
                                can0_pins_a: can0@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
@@ -674,6 +696,21 @@
                                        fsl,pull-up = <1>;
                                };
+                                spi3_pins_a: spi3@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x3082 /* MX28_PAD_AUART2_RX__SSP3_D4 */
+                                                0x3092 /* MX28_PAD_AUART2_TX__SSP3_D5 */
+                                                0x2180 /* MX28_PAD_SSP3_SCK__SSP3_SCK */
+                                                0x2190 /* MX28_PAD_SSP3_MOSI__SSP3_CMD */
+                                                0x21A0 /* MX28_PAD_SSP3_MISO__SSP3_D0 */
+                                                0x21B0 /* MX28_PAD_SSP3_SS0__SSP3_D3 */
+                                        >;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
                                usbphy0_pins_a: usbphy0@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
@@ -705,14 +742,14 @@
                                };
                        };
-                        digctl@8001c000 {
+                        digctl: digctl@8001c000 {
                                compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
                                reg = <0x8001c000 0x2000>;
                                interrupts = <89>;
                                status = "disabled";
                        };
-                        etm@80022000 {
+                        etm: etm@80022000 {
                                reg = <0x80022000 0x2000>;
                                status = "disabled";
                        };
@@ -733,19 +770,19 @@
                                clocks = <&clks 26>;
                        };
-                        dcp@80028000 {
+                        dcp: dcp@80028000 {
                                reg = <0x80028000 0x2000>;
                                interrupts = <52 53 54>;
                                compatible = "fsl-dcp";
                        };
-                        pxp@8002a000 {
+                        pxp: pxp@8002a000 {
                                reg = <0x8002a000 0x2000>;
                                interrupts = <39>;
                                status = "disabled";
                        };
-                        ocotp@8002c000 {
+                        ocotp: ocotp@8002c000 {
                                compatible = "fsl,ocotp";
                                reg = <0x8002c000 0x2000>;
                                status = "disabled";
@@ -756,10 +793,10 @@
                                status = "disabled";
                        };
-                        lcdif@80030000 {
+                        lcdif: lcdif@80030000 {
                                compatible = "fsl,imx28-lcdif";
                                reg = <0x80030000 0x2000>;
-                                interrupts = <38 86>;
+                                interrupts = <38>;
                                clocks = <&clks 55>;
                                dmas = <&dma_apbh 13>;
                                dma-names = "rx";
@@ -784,41 +821,41 @@
                                status = "disabled";
                        };
-                        simdbg@8003c000 {
+                        simdbg: simdbg@8003c000 {
                                reg = <0x8003c000 0x200>;
                                status = "disabled";
                        };
-                        simgpmisel@8003c200 {
+                        simgpmisel: simgpmisel@8003c200 {
                                reg = <0x8003c200 0x100>;
                                status = "disabled";
                        };
-                        simsspsel@8003c300 {
+                        simsspsel: simsspsel@8003c300 {
                                reg = <0x8003c300 0x100>;
                                status = "disabled";
                        };
-                        simmemsel@8003c400 {
+                        simmemsel: simmemsel@8003c400 {
                                reg = <0x8003c400 0x100>;
                                status = "disabled";
                        };
-                        gpiomon@8003c500 {
+                        gpiomon: gpiomon@8003c500 {
                                reg = <0x8003c500 0x100>;
                                status = "disabled";
                        };
-                        simenet@8003c700 {
+                        simenet: simenet@8003c700 {
                                reg = <0x8003c700 0x100>;
                                status = "disabled";
                        };
-                        armjtag@8003c800 {
+                        armjtag: armjtag@8003c800 {
                                reg = <0x8003c800 0x100>;
                                status = "disabled";
                        };
-                };
+                };
                apbx@80040000 {
                        compatible = "simple-bus";
@@ -836,16 +873,15 @@
                        saif0: saif@80042000 {
                                compatible = "fsl,imx28-saif";
                                reg = <0x80042000 0x2000>;
-                                interrupts = <59 80>;
+                                interrupts = <59>;
                                #clock-cells = <0>;
                                clocks = <&clks 53>;
                                dmas = <&dma_apbx 4>;
                                dma-names = "rx-tx";
-                                fsl,saif-dma-channel = <4>;
                                status = "disabled";
                        };
-                        power@80044000 {
+                        power: power@80044000 {
                                reg = <0x80044000 0x2000>;
                                status = "disabled";
                        };
@@ -853,15 +889,14 @@
                        saif1: saif@80046000 {
                                compatible = "fsl,imx28-saif";
                                reg = <0x80046000 0x2000>;
-                                interrupts = <58 81>;
+                                interrupts = <58>;
                                clocks = <&clks 54>;
                                dmas = <&dma_apbx 5>;
                                dma-names = "rx-tx";
-                                fsl,saif-dma-channel = <5>;
                                status = "disabled";
                        };
-                        lradc@80050000 {
+                        lradc: lradc@80050000 {
                                compatible = "fsl,imx28-lradc";
                                reg = <0x80050000 0x2000>;
                                interrupts = <10 14 15 16 17 18 19
@@ -869,15 +904,15 @@
                                status = "disabled";
                        };
-                        spdif@80054000 {
+                        spdif: spdif@80054000 {
                                reg = <0x80054000 0x2000>;
-                                interrupts = <45 66>;
+                                interrupts = <45>;
                                dmas = <&dma_apbx 2>;
                                dma-names = "tx";
                                status = "disabled";
                        };
-                        rtc@80056000 {
+                        mxs_rtc: rtc@80056000 {
                                compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
                                reg = <0x80056000 0x2000>;
                                interrupts = <29>;
@@ -888,11 +923,10 @@
                                #size-cells = <0>;
                                compatible = "fsl,imx28-i2c";
                                reg = <0x80058000 0x2000>;
-                                interrupts = <111 68>;
+                                interrupts = <111>;
                                clock-frequency = <100000>;
                                dmas = <&dma_apbx 6>;
                                dma-names = "rx-tx";
-                                fsl,i2c-dma-channel = <6>;
                                status = "disabled";
                        };
@@ -901,11 +935,10 @@
                                #size-cells = <0>;
                                compatible = "fsl,imx28-i2c";
                                reg = <0x8005a000 0x2000>;
-                                interrupts = <110 69>;
+                                interrupts = <110>;
                                clock-frequency = <100000>;
                                dmas = <&dma_apbx 7>;
                                dma-names = "rx-tx";
-                                fsl,i2c-dma-channel = <7>;
                                status = "disabled";
                        };
@@ -918,7 +951,7 @@
                                status = "disabled";
                        };
-                        timrot@80068000 {
+                        timer: timrot@80068000 {
                                compatible = "fsl,imx28-timrot", "fsl,timrot";
                                reg = <0x80068000 0x2000>;
                                interrupts = <48 49 50 51>;
@@ -928,10 +961,9 @@
                        auart0: serial@8006a000 {
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x8006a000 0x2000>;
-                                interrupts = <112 70 71>;
+                                interrupts = <112>;
                                dmas = <&dma_apbx 8>, <&dma_apbx 9>;
                                dma-names = "rx", "tx";
-                                fsl,auart-dma-channel = <8 9>;
                                clocks = <&clks 45>;
                                status = "disabled";
                        };
@@ -939,7 +971,7 @@
                        auart1: serial@8006c000 {
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x8006c000 0x2000>;
-                                interrupts = <113 72 73>;
+                                interrupts = <113>;
                                dmas = <&dma_apbx 10>, <&dma_apbx 11>;
                                dma-names = "rx", "tx";
                                clocks = <&clks 45>;
@@ -949,7 +981,7 @@
                        auart2: serial@8006e000 {
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x8006e000 0x2000>;
-                                interrupts = <114 74 75>;
+                                interrupts = <114>;
                                dmas = <&dma_apbx 12>, <&dma_apbx 13>;
                                dma-names = "rx", "tx";
                                clocks = <&clks 45>;
@@ -959,7 +991,7 @@
                        auart3: serial@80070000 {
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x80070000 0x2000>;
-                                interrupts = <115 76 77>;
+                                interrupts = <115>;
                                dmas = <&dma_apbx 14>, <&dma_apbx 15>;
                                dma-names = "rx", "tx";
                                clocks = <&clks 45>;
@@ -969,7 +1001,7 @@
                        auart4: serial@80072000 {
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x80072000 0x2000>;
-                                interrupts = <116 78 79>;
+                                interrupts = <116>;
                                dmas = <&dma_apbx 0>, <&dma_apbx 1>;
                                dma-names = "rx", "tx";
                                clocks = <&clks 45>;
@@ -1026,7 +1058,7 @@
                        status = "disabled";
                };
-                dflpt@800c0000 {
+                dflpt: dflpt@800c0000 {
                        reg = <0x800c0000 0x10000>;
                        status = "disabled";
                };
@@ -1049,10 +1081,9 @@
                        status = "disabled";
                };
-                switch@800f8000 {
+                etn_switch: switch@800f8000 {
                        reg = <0x800f8000 0x8000>;
                        status = "disabled";
                };
        };
 };
diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi
index f9d92da86783..83bb0eff697b 100644
--- a/arch/arm/boot/dts/pxa3xx.dtsi
+++ b/arch/arm/boot/dts/pxa3xx.dtsi
@@ -28,5 +28,16 @@
                        marvell,intc-priority;
                        marvell,intc-nr-irqs = <56>;
                };
+                gpio: gpio@40e00000 {
+                        compatible = "intel,pxa3xx-gpio";
+                        reg = <0x40e00000 0x10000>;
+                        interrupt-names = "gpio0", "gpio1", "gpio_mux";
+                        interrupts = <8 9 10>;
+                        gpio-controller;
+                        #gpio-cells = <0x2>;
+                        interrupt-controller;
+                        #interrupt-cells = <0x2>;
+                };
        };
 };
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
index f603c6946c29..e657a9db1666 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
@@ -50,3 +50,25 @@
                };
        };
 };
+&i2c5 {
+        vdd_dvfs: max8973@1b {
+                compatible = "maxim,max8973";
+                reg = <0x1b>;
+                regulator-min-microvolt = <935000>;
+                regulator-max-microvolt = <1200000>;
+                regulator-boot-on;
+                regulator-always-on;
+        };
+};
+&cpu0 {
+        cpu0-supply = <&vdd_dvfs>;
+        operating-points = <
+                /* kHz  uV */
+                1950000 1115000
+                1462500  995000
+        >;
+        voltage-tolerance = <1>; /* 1% */
+};
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 4ff2019c0e30..6c26caa880f2 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -85,4 +85,137 @@
                interrupt-parent = <&gic>;
                interrupts = <0 69 4>;
        };
+        i2c0: i2c@e6500000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6500000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 174 0x4>;
+        };
+        i2c1: i2c@e6510000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6510000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 175 0x4>;
+        };
+        i2c2: i2c@e6520000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6520000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 176 0x4>;
+        };
+        i2c3: i2c@e6530000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6530000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 177 0x4>;
+        };
+        i2c4: i2c@e6540000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6540000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 178 0x4>;
+        };
+        i2c5: i2c@e60b0000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe60b0000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 179 0x4>;
+        };
+        i2c6: i2c@e6550000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6550000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 184 0x4>;
+        };
+        i2c7: i2c@e6560000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6560000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 185 0x4>;
+        };
+        i2c8: i2c@e6570000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "renesas,rmobile-iic";
+                reg = <0 0xe6570000 0 0x428>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 173 0x4>;
+        };
+        mmcif0: mmcif@ee200000 {
+                compatible = "renesas,sh-mmcif";
+                reg = <0 0xee200000 0 0x80>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 169 0x4>;
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+        mmcif1: mmcif@ee220000 {
+                compatible = "renesas,sh-mmcif";
+                reg = <0 0xee220000 0 0x80>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 170 0x4>;
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+        pfc: pfc@e6050000 {
+                compatible = "renesas,pfc-r8a73a4";
+                reg = <0 0xe6050000 0 0x9000>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
+        sdhi0: sdhi@ee100000 {
+                compatible = "renesas,r8a73a4-sdhi";
+                reg = <0 0xee100000 0 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 165 4>;
+                cap-sd-highspeed;
+                status = "disabled";
+        };
+        sdhi1: sdhi@ee120000 {
+                compatible = "renesas,r8a73a4-sdhi";
+                reg = <0 0xee120000 0 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 166 4>;
+                cap-sd-highspeed;
+                status = "disabled";
+        };
+        sdhi2: sdhi@ee140000 {
+                compatible = "renesas,r8a73a4-sdhi";
+                reg = <0 0xee140000 0 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 167 4>;
+                cap-sd-highspeed;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 09ea22c26359..366f72989dc3 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -10,6 +10,7 @@
 /dts-v1/;
 /include/ "r8a7740.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 / {
        model = "armadillo 800 eva reference";
@@ -33,6 +34,21 @@
                regulator-boot-on;
        };
+        leds {
+                compatible = "gpio-leds";
+                led1 {
+                        gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
+                };
+                led2 {
+                        gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
+                };
+                led3 {
+                        gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
+                };
+                led4 {
+                        gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
+                };
+        };
 };
 &i2c0 {
@@ -41,5 +57,23 @@
                reg = <0x55>;
                interrupt-parent = <&irqpin1>;
                interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
+                pinctrl-0 = <&st1232_pins>;
+                pinctrl-names = "default";
+                gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
+        };
+};
+&pfc {
+        pinctrl-0 = <&scifa1_pins>;
+        pinctrl-names = "default";
+        scifa1_pins: scifa1 {
+                renesas,groups = "scifa1_data";
+                renesas,function = "scifa1";
+        };
+        st1232_pins: st1232 {
+                renesas,groups = "intc_irq10";
+                renesas,function = "intc";
        };
 };
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 24e930643821..e18a195b55f3 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -139,4 +139,12 @@
                              0 72 0x4
                              0 73 0x4>;
        };
+        pfc: pfc@e6050000 {
+                compatible = "renesas,pfc-r8a7740";
+                reg = <0xe6050000 0x8000>,
+                      <0xe605800c 0x20>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
 };
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 474373559bdc..45ac404ab6d8 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -32,4 +32,70 @@
                reg = <0xfe438000 0x1000>,
                      <0xfe430000 0x100>;
        };
+        gpio0: gpio@ffc40000 {
+                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+                reg = <0xffc40000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 103 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 0 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio1: gpio@ffc41000 {
+                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+                reg = <0xffc41000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 103 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 32 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio2: gpio@ffc42000 {
+                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+                reg = <0xffc42000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 103 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 64 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio3: gpio@ffc43000 {
+                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+                reg = <0xffc43000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 103 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 96 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio4: gpio@ffc44000 {
+                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+                reg = <0xffc44000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 103 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 128 27>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        pfc: pfc@fffc0000 {
+                compatible = "renesas,pfc-r8a7778";
+                reg = <0xfffc000 0x118>;
+                #gpio-range-cells = <3>;
+        };
 };
diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
index 72be4c87cfb5..b64705be258d 100644
--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
@@ -11,6 +11,7 @@
 /dts-v1/;
 /include/ "r8a7779.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 / {
        model = "marzen";
@@ -37,6 +38,9 @@
        lan0@18000000 {
                compatible = "smsc,lan9220", "smsc,lan9115";
                reg = <0x18000000 0x100>;
+                pinctrl-0 = <&lan0_pins>;
+                pinctrl-names = "default";
                phy-mode = "mii";
                interrupt-parent = <&gic>;
                interrupts = <0 28 0x4>;
@@ -44,4 +48,49 @@
                vddvario-supply = <&fixedregulator3v3>;
                vdd33a-supply = <&fixedregulator3v3>;
        };
+        leds {
+                compatible = "gpio-leds";
+                led2 {
+                        gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+                };
+                led3 {
+                        gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+                };
+                led4 {
+                        gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+                };
+        };
+};
+&pfc {
+        pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
+        pinctrl-names = "default";
+        lan0_pins: lan0 {
+                intc {
+                        renesas,groups = "intc_irq1_b";
+                        renesas,function = "intc";
+                };
+                lbsc {
+                        renesas,groups = "lbsc_ex_cs0";
+                        renesas,function = "lbsc";
+                };
+        };
+        scif2_pins: scif2 {
+                renesas,groups = "scif2_data_c";
+                renesas,function = "scif2";
+        };
+        scif4_pins: scif4 {
+                renesas,groups = "scif4_data";
+                renesas,function = "scif4";
+        };
+        sdhi0_pins: sdhi0 {
+                renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
+                                 "sdhi0_wp";
+                renesas,function = "sdhi0";
+        };
 };
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 7f146c6bf756..e9fbe3d572d7 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -48,6 +48,90 @@
                      <0xf0000100 0x100>;
        };
+        gpio0: gpio@ffc40000 {
+                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+                reg = <0xffc40000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 141 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 0 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio1: gpio@ffc41000 {
+                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+                reg = <0xffc41000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 142 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 32 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio2: gpio@ffc42000 {
+                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+                reg = <0xffc42000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 143 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 64 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio3: gpio@ffc43000 {
+                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+                reg = <0xffc43000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 144 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 96 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio4: gpio@ffc44000 {
+                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+                reg = <0xffc44000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 145 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 128 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio5: gpio@ffc45000 {
+                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+                reg = <0xffc45000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 146 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 160 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio6: gpio@ffc46000 {
+                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+                reg = <0xffc46000 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 147 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 192 9>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
        irqpin0: irqpin@fe780010 {
                compatible = "renesas,intc-irqpin";
                #interrupt-cells = <2>;
@@ -101,6 +185,12 @@
                interrupts = <0 81 0x4>;
        };
+        pfc: pfc@fffc0000 {
+                compatible = "renesas,pfc-r8a7779";
+                reg = <0xfffc0000 0x23c>;
+                #gpio-range-cells = <3>;
+        };
        thermal@ffc48000 {
                compatible = "renesas,rcar-thermal";
                reg = <0xffc48000 0x38>;
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 339d9b11721c..3b879e7c697c 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -38,6 +38,78 @@
                interrupts = <1 9 0xf04>;
        };
+        gpio0: gpio@ffc40000 {
+                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+                reg = <0 0xffc40000 0 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 4 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 0 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio1: gpio@ffc41000 {
+                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+                reg = <0 0xffc41000 0 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 5 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 32 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio2: gpio@ffc42000 {
+                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+                reg = <0 0xffc42000 0 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 6 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 64 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio3: gpio@ffc43000 {
+                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+                reg = <0 0xffc43000 0 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 7 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 96 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio4: gpio@ffc44000 {
+                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+                reg = <0 0xffc44000 0 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 8 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 128 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
+        gpio5: gpio@ffc45000 {
+                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+                reg = <0 0xffc45000 0 0x2c>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 9 0x4>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                gpio-ranges = <&pfc 0 160 32>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+        };
        timer {
                compatible = "arm,armv7-timer";
                interrupts = <1 13 0xf08>,
@@ -54,4 +126,64 @@
                interrupt-parent = <&gic>;
                interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
        };
+        mmcif0: mmcif@ee200000 {
+                compatible = "renesas,sh-mmcif";
+                reg = <0 0xee200000 0 0x80>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 169 0x4>;
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+        mmcif1: mmcif@ee220000 {
+                compatible = "renesas,sh-mmcif";
+                reg = <0 0xee220000 0 0x80>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 170 0x4>;
+                reg-io-width = <4>;
+                status = "disabled";
+        };
+        pfc: pfc@e6060000 {
+                compatible = "renesas,pfc-r8a7790";
+                reg = <0 0xe6060000 0 0x250>;
+                #gpio-range-cells = <3>;
+        };
+        sdhi0: sdhi@ee100000 {
+                compatible = "renesas,r8a7790-sdhi";
+                reg = <0 0xee100000 0 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 165 4>;
+                cap-sd-highspeed;
+                status = "disabled";
+        };
+        sdhi1: sdhi@ee120000 {
+                compatible = "renesas,r8a7790-sdhi";
+                reg = <0 0xee120000 0 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 166 4>;
+                cap-sd-highspeed;
+                status = "disabled";
+        };
+        sdhi2: sdhi@ee140000 {
+                compatible = "renesas,r8a7790-sdhi";
+                reg = <0 0xee140000 0 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 167 4>;
+                cap-sd-highspeed;
+                status = "disabled";
+        };
+        sdhi3: sdhi@ee160000 {
+                compatible = "renesas,r8a7790-sdhi";
+                reg = <0 0xee160000 0 0x100>;
+                interrupt-parent = <&gic>;
+                interrupts = <0 168 4>;
+                cap-sd-highspeed;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index a1d5e25a6698..ff63fbbd18ab 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -48,6 +48,11 @@
                };
        };
+        pmu {
+                compatible = "arm,cortex-a5-pmu";
+                interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
+        };
        memory {
                reg = <0x20000000 0x8000000>;
        };
diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
index 7bf020ecadf5..249f65be2a50 100644
--- a/arch/arm/boot/dts/sh7372.dtsi
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -23,4 +23,12 @@
                        reg = <0x0>;
                };
        };
+        pfc: pfc@e6050000 {
+                compatible = "renesas,pfc-sh7372";
+                reg = <0xe6050000 0x8000>,
+                      <0xe605801c 0x1c>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
 };
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index b6f759e830ed..b99e890def54 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -13,6 +13,7 @@
 /dts-v1/;
 /include/ "sh73a0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 / {
        model = "KZM-A9-GT";
@@ -58,6 +59,24 @@
                regulator-boot-on;
        };
+        vmmc_sdhi0: regulator@2 {
+                compatible = "regulator-fixed";
+                regulator-name = "SDHI0 Vcc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&pfc 15 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+        vmmc_sdhi2: regulator@3 {
+                compatible = "regulator-fixed";
+                regulator-name = "SDHI2 Vcc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&pfc 14 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
        lan9220@10000000 {
                compatible = "smsc,lan9220", "smsc,lan9115";
                reg = <0x10000000 0x100>;
@@ -70,6 +89,22 @@
                vddvario-supply = <&reg_1p8v>;
                vdd33a-supply = <&reg_3p3v>;
        };
+        leds {
+                compatible = "gpio-leds";
+                led1 {
+                        gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
+                };
+                led2 {
+                        gpios = <&pfc 21 GPIO_ACTIVE_LOW>;
+                };
+                led3 {
+                        gpios = <&pfc 22 GPIO_ACTIVE_LOW>;
+                };
+                led4 {
+                        gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
+                };
+        };
 };
 &i2c0 {
@@ -145,20 +180,71 @@
        };
 };
+&i2c3 {
+        pinctrl-0 = <&i2c3_pins>;
+        pinctrl-names = "default";
+};
 &mmcif {
+        pinctrl-0 = <&mmcif_pins>;
+        pinctrl-names = "default";
        bus-width = <8>;
        vmmc-supply = <&reg_1p8v>;
        status = "okay";
 };
+&pfc {
+        pinctrl-0 = <&scifa4_pins>;
+        pinctrl-names = "default";
+        i2c3_pins: i2c3 {
+                renesas,groups = "i2c3_1";
+                renesas,function = "i2c3";
+        };
+        mmcif_pins: mmcif {
+                mux {
+                        renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
+                        renesas,function = "mmc0";
+                };
+                cfg {
+                        renesas,groups = "mmc0_data8_0";
+                        renesas,pins = "PORT279";
+                        bias-pull-up;
+                };
+        };
+        scifa4_pins: scifa4 {
+                renesas,groups = "scifa4_data", "scifa4_ctrl";
+                renesas,function = "scifa4";
+        };
+        sdhi0_pins: sdhi0 {
+                renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
+                renesas,function = "sdhi0";
+        };
+        sdhi2_pins: sdhi2 {
+                renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+                renesas,function = "sdhi2";
+        };
+};
 &sdhi0 {
-        vmmc-supply = <&reg_3p3v>;
+        pinctrl-0 = <&sdhi0_pins>;
+        pinctrl-names = "default";
+        vmmc-supply = <&vmmc_sdhi0>;
        bus-width = <4>;
        status = "okay";
 };
 &sdhi2 {
-        vmmc-supply = <&reg_3p3v>;
+        pinctrl-0 = <&sdhi2_pins>;
+        pinctrl-names = "default";
+        vmmc-supply = <&vmmc_sdhi2>;
        bus-width = <4>;
        broken-cd;
        status = "okay";
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b97750256003..86e79feb7560 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -222,4 +222,12 @@
                cap-sd-highspeed;
                status = "disabled";
        };
+        pfc: pfc@e6050000 {
+                compatible = "renesas,pfc-sh73a0";
+                reg = <0xe6050000 0x8000>,
+                      <0xe605801c 0x1c>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
 };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index bee62a2cf6d6..e273fa993b8c 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -476,25 +476,25 @@
                };
                timer0: timer0@ffc08000 {
-                        compatible = "snps,dw-apb-timer-sp";
+                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 167 4>;
                        reg = <0xffc08000 0x1000>;
                };
                timer1: timer1@ffc09000 {
-                        compatible = "snps,dw-apb-timer-sp";
+                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 168 4>;
                        reg = <0xffc09000 0x1000>;
                };
                timer2: timer2@ffd00000 {
-                        compatible = "snps,dw-apb-timer-osc";
+                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 169 4>;
                        reg = <0xffd00000 0x1000>;
                };
                timer3: timer3@ffd01000 {
-                        compatible = "snps,dw-apb-timer-osc";
+                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 170 4>;
                        reg = <0xffd01000 0x1000>;
                };
diff --git a/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi b/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
new file mode 100644
index 000000000000..e0799966bc25
--- /dev/null
+++ b/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
@@ -0,0 +1,196 @@
+/*
+ * Copyright 2012 ST-Ericsson
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include "ste-nomadik-pinctrl.dtsi"
+/ {
+        soc {
+                pinctrl {
+                        uart0 {
+                                uart0_default_mux: uart0_mux {
+                                        default_mux {
+                                                ste,function = "u0";
+                                                ste,pins = "u0_a_1";
+                                        };
+                                };
+                                uart0_default_mode: uart0_default {
+                                        default_cfg1 {
+                                                ste,pins = "GPIO0", "GPIO2";
+                                                ste,config = <&in_pu>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO1", "GPIO3";
+                                                ste,config = <&out_hi>;
+                                        };
+                                };
+                                uart0_sleep_mode: uart0_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO0", "GPIO2";
+                                                ste,config = <&slpm_in_pu>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins = "GPIO1", "GPIO3";
+                                                ste,config = <&slpm_out_hi>;
+                                        };
+                                };
+                        };
+                        uart2 {
+                                uart2_default_mode: uart2_default {
+                                        default_mux {
+                                                ste,function = "u2";
+                                                ste,pins = "u2txrx_a_1";
+                                        };
+                                        default_cfg1 {
+                                                ste,pins = "GPIO120";
+                                                ste,config = <&in_pu>;
+                                        };
+                                        default_cfg2 {
+                                                ste,pins = "GPIO121";
+                                                ste,config = <&out_hi>;
+                                        };
+                                };
+                                uart2_sleep_mode: uart2_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO120";
+                                                ste,config = <&slpm_in_pu>;
+                                        };
+                                        sleep_cfg2 {
+                                                ste,pins = "GPIO121";
+                                                ste,config = <&slpm_out_hi>;
+                                        };
+                                };
+                        };
+                        i2c0 {
+                                i2c0_default_mux: i2c_mux {
+                                        default_mux {
+                                                ste,function = "i2c0";
+                                                ste,pins = "i2c0_a_1";
+                                        };
+                                };
+                                i2c0_default_mode: i2c_default {
+                                        default_cfg1 {
+                                                ste,pins = "GPIO147", "GPIO148";
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+                                i2c0_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO147", "GPIO148";
+                                                ste,config = <&slpm_in_pu>;
+                                        };
+                                };
+                        };
+                        i2c1 {
+                                i2c1_default_mux: i2c_mux {
+                                        default_mux {
+                                                ste,function = "i2c1";
+                                                ste,pins = "i2c1_b_2";
+                                        };
+                                };
+                                i2c1_default_mode: i2c_default {
+                                        default_cfg1 {
+                                                ste,pins = "GPIO16", "GPIO17";
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+                                i2c1_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO16", "GPIO17";
+                                                ste,config = <&slpm_in_pu>;
+                                        };
+                                };
+                        };
+                        i2c2 {
+                                i2c2_default_mux: i2c_mux {
+                                        default_mux {
+                                                ste,function = "i2c2";
+                                                ste,pins = "i2c2_b_2";
+                                        };
+                                };
+                                i2c2_default_mode: i2c_default {
+                                        default_cfg1 {
+                                                ste,pins = "GPIO10", "GPIO11";
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+                                i2c2_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO11", "GPIO11";
+                                                ste,config = <&slpm_in_pu>;
+                                        };
+                                };
+                        };
+                        i2c4 {
+                                i2c4_default_mux: i2c_mux {
+                                        default_mux {
+                                                ste,function = "i2c4";
+                                                ste,pins = "i2c4_b_2";
+                                        };
+                                };
+                                i2c4_default_mode: i2c_default {
+                                        default_cfg1 {
+                                                ste,pins = "GPIO122", "GPIO123";
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+                                i2c4_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO122", "GPIO123";
+                                                ste,config = <&slpm_in_pu>;
+                                        };
+                                };
+                        };
+                        i2c5 {
+                                i2c5_default_mux: i2c_mux {
+                                        default_mux {
+                                                ste,function = "i2c5";
+                                                ste,pins = "i2c5_c_2";
+                                        };
+                                };
+                                i2c5_default_mode: i2c_default {
+                                        default_cfg1 {
+                                                ste,pins = "GPIO118", "GPIO119";
+                                                ste,config = <&in_pu>;
+                                        };
+                                };
+                                i2c5_sleep_mode: i2c_sleep {
+                                        sleep_cfg1 {
+                                                ste,pins = "GPIO118", "GPIO119";
+                                                ste,config = <&slpm_in_pu>;
+                                        };
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/ste-ccu8540.dts b/arch/arm/boot/dts/ste-ccu8540.dts
new file mode 100644
index 000000000000..7f3baf51a3a9
--- /dev/null
+++ b/arch/arm/boot/dts/ste-ccu8540.dts
@@ -0,0 +1,86 @@
+/*
+ * Copyright 2013 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/dts-v1/;
+#include "ste-dbx5x0.dtsi"
+#include "ste-ccu8540-pinctrl.dtsi"
+/ {
+        model = "ST-Ericsson U8540 platform with Device Tree";
+        compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";
+        memory@0 {
+                reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>;
+        };
+        soc {
+                pinctrl {
+                        compatible = "stericsson,db8540-pinctrl";
+                };
+                prcmu@80157000 {
+                        reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x3000>;
+                        reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
+                };
+                uart@80120000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
+                        pinctrl-1 = <&uart0_sleep_mode>;
+                        status = "okay";
+                };
+                uart@80121000 {
+                        status = "okay";
+                };
+                uart@80007000 {
+                        pinctrl-names = "default", "sleep";
+                        pinctrl-0 = <&uart2_default_mode>;
+                        pinctrl-1 = <&uart2_sleep_mode>;
+                        status = "okay";
+                };
+                i2c0: i2c@80004000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
+                        pinctrl-1 = <&i2c0_sleep_mode>;
+                };
+                i2c1: i2c@80122000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
+                        pinctrl-1 = <&i2c1_sleep_mode>;
+                };
+                i2c2: i2c@80128000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c2_default_mux>, <&i2c2_default_mode>;
+                        pinctrl-1 = <&i2c2_sleep_mode>;
+                };
+                i2c3: i2c@80110000 {
+                        status = "disabled";
+                };
+                i2c4: i2c@8012a000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c4_default_mux>, <&i2c4_default_mode>;
+                        pinctrl-1 = <&i2c4_sleep_mode>;
+                };
+                i2c5: i2c@80001000 {
+                        pinctrl-names = "default","sleep";
+                        pinctrl-0 = <&i2c5_default_mux>, <&i2c5_default_mode>;
+                        pinctrl-1 = <&i2c5_sleep_mode>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/ccu9540.dts b/arch/arm/boot/dts/ste-ccu9540.dts
index ed29ec7288e4..229508750890 100644
--- a/arch/arm/boot/dts/ccu9540.dts
+++ b/arch/arm/boot/dts/ste-ccu9540.dts
@@ -10,7 +10,7 @@
 */
 /dts-v1/;
-#include "dbx5x0.dtsi"
+#include "ste-dbx5x0.dtsi"
 / {
        model = "ST-Ericsson CCU9540 platform with Device Tree";
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index a1529455f081..1c1091eedade 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -245,7 +245,7 @@
                                             <22 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
                                status = "disabled";
-                         };
+                        };
                        db8500-prcmu-regulators {
                                compatible = "stericsson,db8500-prcmu-regulator";
@@ -457,8 +457,36 @@
                                        stericsson,earpeice-cmv = <950>; /* Units in mV. */
                                };
+                                ext_regulators: ab8500-ext-regulators {
+                                        compatible = "stericsson,ab8500-ext-regulator";
+                                        ab8500_ext1_reg: ab8500_ext1 {
+                                                regulator-compatible = "ab8500_ext1";
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+                                                regulator-boot-on;
+                                                regulator-always-on;
+                                        };
+                                        ab8500_ext2_reg: ab8500_ext2 {
+                                                regulator-compatible = "ab8500_ext2";
+                                                regulator-min-microvolt = <1360000>;
+                                                regulator-max-microvolt = <1360000>;
+                                                regulator-boot-on;
+                                                regulator-always-on;
+                                        };
+                                        ab8500_ext3_reg: ab8500_ext3 {
+                                                regulator-compatible = "ab8500_ext3";
+                                                regulator-min-microvolt = <3400000>;
+                                                regulator-max-microvolt = <3400000>;
+                                                regulator-boot-on;
+                                        };
+                                };
                                ab8500-regulators {
                                        compatible = "stericsson,ab8500-regulator";
+                                        vin-supply = <&ab8500_ext3_reg>;
                                        // supplies to the display/camera
                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/ste-href.dtsi
index 9db41b9d8358..370e03f5e7b2 100644
--- a/arch/arm/boot/dts/href.dtsi
+++ b/arch/arm/boot/dts/ste-href.dtsi
@@ -10,7 +10,7 @@
 */
 #include <dt-bindings/interrupt-controller/irq.h>
-#include "dbx5x0.dtsi"
+#include "ste-dbx5x0.dtsi"
 / {
        memory {
diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/ste-hrefprev60.dts
index c6bb07df2d1d..d8d3b99ab007 100644
--- a/arch/arm/boot/dts/hrefprev60.dts
+++ b/arch/arm/boot/dts/ste-hrefprev60.dts
@@ -10,9 +10,9 @@
 */
 /dts-v1/;
-#include "dbx5x0.dtsi"
+#include "ste-dbx5x0.dtsi"
-#include "href.dtsi"
+#include "ste-href.dtsi"
-#include "stuib.dtsi"
+#include "ste-stuib.dtsi"
 / {
        model = "ST-Ericsson HREF (pre-v60) platform with Device Tree";
diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/ste-hrefv60plus.dts
index 3d580d6447f9..6e52ebbf113f 100644
--- a/arch/arm/boot/dts/hrefv60plus.dts
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dts
@@ -10,9 +10,9 @@
 */
 /dts-v1/;
-#include "dbx5x0.dtsi"
+#include "ste-dbx5x0.dtsi"
-#include "href.dtsi"
+#include "ste-href.dtsi"
-#include "stuib.dtsi"
+#include "ste-stuib.dtsi"
 / {
        model = "ST-Ericsson HREF (v60+) platform with Device Tree";
diff --git a/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi b/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
new file mode 100644
index 000000000000..efddee9403c4
--- /dev/null
+++ b/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2012 ST-Ericsson
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/pinctrl/nomadik.h>
+/ {
+        in_nopull: in_nopull {
+                ste,input = <INPUT_NOPULL>;
+        };
+        in_pu: input_pull_up {
+                ste,input = <INPUT_PULLUP>;
+        };
+        in_pd: input_pull_down {
+                ste,input = <INPUT_PULLDOWN>;
+        };
+        out_hi: output_high {
+                ste,output = <OUTPUT_HIGH>;
+        };
+        out_lo: output_low {
+                ste,output = <OUTPUT_LOW>;
+        };
+        gpio_out_lo: gpio_output_low {
+                ste,gpio = <GPIOMODE_ENABLED>;
+                ste,output = <OUTPUT_LOW>;
+        };
+        slpm_in_pu: slpm_in_pu {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-input = <SLPM_INPUT_PULLUP>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+        };
+        slpm_in_wkup_pdis: slpm_in_wkup_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-input = <SLPM_DIR_INPUT>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+        slpm_out_lo: slpm_out_lo {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-output = <SLPM_OUTPUT_LOW>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+        };
+        slpm_out_hi: slpm_out_hi {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-output = <SLPM_OUTPUT_HIGH>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+        };
+        slpm_out_hi_wkup_pdis: slpm_out_hi_wkup_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-output = <SLPM_OUTPUT_HIGH>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+        slpm_out_wkup_pdis: slpm_out_wkup_pdis {
+                ste,sleep = <SLPM_ENABLED>;
+                ste,sleep-output = <SLPM_DIR_OUTPUT>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+        in_wkup_pdis: in_wkup_pdis {
+                ste,sleep-input = <SLPM_DIR_INPUT>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+        out_hi_wkup_pdis: out_hi_wkup_pdis {
+                ste,sleep-output = <SLPM_OUTPUT_HIGH>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+        out_wkup_pdis: out_wkup_pdis {
+                ste,sleep-output = <SLPM_DIR_OUTPUT>;
+                ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
+                ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
+        };
+};
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index a3acfa7b3dc9..9169d3025f39 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -140,18 +140,30 @@
                        };
                };
                i2c0 {
+                        i2c0_default_mux: i2c0_mux {
+                                i2c0_default_mux {
+                                        ste,function = "i2c0";
+                                        ste,pins = "i2c0_a_1";
+                                };
+                        };
                        i2c0_default_mode: i2c0_default {
                                i2c0_default_cfg {
                                        ste,pins = "GPIO62_D3", "GPIO63_D2";
-                                        ste,input = <1>;
+                                        ste,input = <0>;
                                };
                        };
                };
                i2c1 {
+                        i2c1_default_mux: i2c1_mux {
+                                i2c1_default_mux {
+                                        ste,function = "i2c1";
+                                        ste,pins = "i2c1_a_1";
+                                };
+                        };
                        i2c1_default_mode: i2c1_default {
                                i2c1_default_cfg {
                                        ste,pins = "GPIO53_L4", "GPIO54_L3";
-                                        ste,input = <1>;
+                                        ste,input = <0>;
                                };
                        };
                };
@@ -159,7 +171,7 @@
                        i2c2_default_mode: i2c2_default {
                                i2c2_default_cfg {
                                        ste,pins = "GPIO73_C21", "GPIO74_C20";
-                                        ste,input = <1>;
+                                        ste,input = <0>;
                                };
                        };
                };
@@ -682,13 +694,17 @@
        /* I2C0 connected to the STw4811 power management chip */
        i2c0 {
-                compatible = "i2c-gpio";
+                compatible = "st,nomadik-i2c", "arm,primecell";
-                gpios = <&gpio1 31 0>, /* sda */
+                reg = <0x101f8000 0x1000>;
-                        <&gpio1 30 0>; /* scl */
+                interrupt-parent = <&vica>;
+                interrupts = <20>;
+                clock-frequency = <100000>;
                #address-cells = <1>;
                #size-cells = <0>;
+                clocks = <&i2c0clk>, <&pclki2c0>;
+                clock-names = "mclk", "apb_pclk";
                pinctrl-names = "default";
-                pinctrl-0 = <&i2c0_default_mode>;
+                pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
                stw4811@2d {
                           compatible = "st,stw4811";
@@ -698,13 +714,17 @@
        /* I2C1 connected to various sensors */
        i2c1 {
-                compatible = "i2c-gpio";
+                compatible = "st,nomadik-i2c", "arm,primecell";
-                gpios = <&gpio1 22 0>, /* sda */
+                reg = <0x101f7000 0x1000>;
-                        <&gpio1 21 0>; /* scl */
+                interrupt-parent = <&vica>;
+                interrupts = <21>;
+                clock-frequency = <100000>;
                #address-cells = <1>;
                #size-cells = <0>;
+                clocks = <&i2c1clk>, <&pclki2c1>;
+                clock-names = "mclk", "apb_pclk";
                pinctrl-names = "default";
-                pinctrl-0 = <&i2c1_default_mode>;
+                pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
                camera@2d {
                           compatible = "st,camera";
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index 49824be66845..f1fc128e249d 100644
--- a/arch/arm/boot/dts/snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -10,7 +10,7 @@
 */
 /dts-v1/;
-#include "dbx5x0.dtsi"
+#include "ste-dbx5x0.dtsi"
 / {
        model = "Calao Systems Snowball platform with device tree";
@@ -165,34 +165,6 @@
                        status = "okay";
                };
-                i2c@80004000 {
-                        tc3589x@42 {
-                                //compatible = "tc3589x";
-                                reg = <0x42>;
-                                gpios = <&gpio6 25 0x4>;
-                                interrupt-parent = <&gpio6>;
-                        };
-                        tps61052@33 {
-                                //compatible = "tps61052";
-                                reg = <0x33>;
-                        };
-                };
-                i2c@80128000 {
-                        lp5521@33 {
-                                // compatible = "lp5521";
-                                reg = <0x33>;
-                        };
-                        lp5521@34 {
-                                // compatible = "lp5521";
-                                reg = <0x34>;
-                        };
-                        bh1780@29 {
-                                // compatible = "rohm,bh1780gli";
-                                reg = <0x33>;
-                        };
-                };
                cpufreq-cooling {
                        status = "okay";
                };
@@ -310,6 +282,20 @@
                                        compatible = "stericsson,ab8500-gpio";
                                };
+                                ext_regulators: ab8500-ext-regulators {
+                                        ab8500_ext1_reg: ab8500_ext1 {
+                                                regulator-name = "ab8500-ext-supply1";
+                                        };
+                                        ab8500_ext2_reg_reg: ab8500_ext2 {
+                                                regulator-name = "ab8500-ext-supply2";
+                                        };
+                                        ab8500_ext3_reg_reg: ab8500_ext3 {
+                                                regulator-name = "ab8500-ext-supply3";
+                                        };
+                                };
                                ab8500-regulators {
                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
                                                regulator-name = "V-DISPLAY";
diff --git a/arch/arm/boot/dts/stuib.dtsi b/arch/arm/boot/dts/ste-stuib.dtsi
index 524e33240ad4..524e33240ad4 100644
--- a/arch/arm/boot/dts/stuib.dtsi
+++ b/arch/arm/boot/dts/ste-stuib.dtsi
diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
new file mode 100644
index 000000000000..eb4d73b6a090
--- /dev/null
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -0,0 +1,101 @@
+/*
+ * Copyright 2013 Emilio López
+ *
+ * Emilio López <emilio@elopez.com.ar>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/dts-v1/;
+/include/ "sun4i-a10.dtsi"
+/ {
+        model = "Mele A1000";
+        compatible = "mele,a1000", "allwinner,sun4i-a10";
+        aliases {
+                serial0 = &uart0;
+        };
+        soc@01c00000 {
+                emac: ethernet@01c0b000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&emac_pins_a>;
+                        phy = <&phy1>;
+                        status = "okay";
+                };
+                mdio@01c0b080 {
+                        phy-supply = <&reg_emac_3v3>;
+                        status = "okay";
+                        phy1: ethernet-phy@1 {
+                                reg = <1>;
+                        };
+                };
+                pinctrl@01c20800 {
+                        emac_power_pin_a1000: emac_power_pin@0 {
+                                allwinner,pins = "PH15";
+                                allwinner,function = "gpio_out";
+                                allwinner,drive = <0>;
+                                allwinner,pull = <0>;
+                        };
+                        led_pins_a1000: led_pins@0 {
+                                allwinner,pins = "PH10", "PH20";
+                                allwinner,function = "gpio_out";
+                                allwinner,drive = <0>;
+                                allwinner,pull = <0>;
+                        };
+                };
+                uart0: serial@01c28000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&uart0_pins_a>;
+                        status = "okay";
+                };
+                i2c0: i2c@01c2ac00 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&i2c0_pins_a>;
+                        status = "okay";
+                };
+        };
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pins_a1000>;
+                red {
+                        label = "a1000:red:usr";
+                        gpios = <&pio 7 10 0>;
+                };
+                blue {
+                        label = "a1000:blue:usr";
+                        gpios = <&pio 7 20 0>;
+                };
+        };
+        regulators {
+                compatible = "simple-bus";
+                reg_emac_3v3: emac-3v3 {
+                        compatible = "regulator-fixed";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&emac_power_pin_a1000>;
+                        regulator-name = "emac-3v3";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        enable-active-high;
+                        gpio = <&pio 7 15 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 757c4cd900ee..425a7db898c5 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -26,7 +26,7 @@
                bootargs = "earlyprintk console=ttyS0,115200";
        };
-        soc@01c20000 {
+        soc@01c00000 {
                emac: ethernet@01c0b000 {
                        pinctrl-names = "default";
                        pinctrl-0 = <&emac_pins_a>;
@@ -76,12 +76,12 @@
                pinctrl-0 = <&led_pins_cubieboard>;
                blue {
-                        label = "cubieboard::blue";
+                        label = "cubieboard:blue:usr";
                        gpios = <&pio 7 21 0>; /* LED1 */
                };
                green {
-                        label = "cubieboard::green";
+                        label = "cubieboard:green:usr";
                        gpios = <&pio 7 20 0>; /* LED2 */
                        linux,default-trigger = "heartbeat";
                };
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index 3514b37d66bc..b3ae51fa9372 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -22,7 +22,7 @@
                bootargs = "earlyprintk console=ttyS0,115200";
        };
-        soc@01c20000 {
+        soc@01c00000 {
                emac: ethernet@01c0b000 {
                        pinctrl-names = "default";
                        pinctrl-0 = <&emac_pins_a>;
diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
index 078ed7f618d7..0c1447c68059 100644
--- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
@@ -22,7 +22,7 @@
                bootargs = "earlyprintk console=ttyS0,115200";
        };
-        soc@01c20000 {
+        soc@01c00000 {
                uart0: serial@01c28000 {
                        pinctrl-names = "default";
                        pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index b2bd6e124250..c32770a28acf 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -160,11 +160,10 @@
                };
        };
-        soc@01c20000 {
+        soc@01c00000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
-                reg = <0x01c20000 0x300000>;
                ranges;
                emac: ethernet@01c0b000 {
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index 64dc0c42c43a..3c9f8b3cd3e3 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -18,7 +18,7 @@
        model = "Olimex A10s-Olinuxino Micro";
        compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s";
-        soc@01c20000 {
+        soc@01c00000 {
                emac: ethernet@01c0b000 {
                        pinctrl-names = "default";
                        pinctrl-0 = <&emac_pins_a>;
@@ -60,6 +60,31 @@
                        pinctrl-0 = <&uart3_pins_a>;
                        status = "okay";
                };
+                i2c0: i2c@01c2ac00 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&i2c0_pins_a>;
+                        status = "okay";
+                };
+                i2c1: i2c@01c2b000 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&i2c1_pins_a>;
+                        status = "okay";
+                        at24@50 {
+                                compatible = "at,24c16";
+                                pagesize = <16>;
+                                reg = <0x50>;
+                                read-only;
+                        };
+                };
+                i2c2: i2c@01c2b400 {
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&i2c2_pins_a>;
+                        status = "okay";
+                };
        };
        leds {
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 2307ce827ae0..ee0ff9ba1bca 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -157,11 +157,10 @@
                };
        };
-        soc@01c20000 {
+        soc@01c00000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
-                reg = <0x01c20000 0x300000>;
                ranges;
                emac: ethernet@01c0b000 {
@@ -229,6 +228,27 @@
                                allwinner,drive = <0>;
                                allwinner,pull = <0>;
                        };
+                        i2c0_pins_a: i2c0@0 {
+                                allwinner,pins = "PB0", "PB1";
+                                allwinner,function = "i2c0";
+                                allwinner,drive = <0>;
+                                allwinner,pull = <0>;
+                        };
+                        i2c1_pins_a: i2c1@0 {
+                                allwinner,pins = "PB15", "PB16";
+                                allwinner,function = "i2c1";
+                                allwinner,drive = <0>;
+                                allwinner,pull = <0>;
+                        };
+                        i2c2_pins_a: i2c2@0 {
+                                allwinner,pins = "PB17", "PB18";
+                                allwinner,function = "i2c2";
+                                allwinner,drive = <0>;
+                                allwinner,pull = <0>;
+                        };
                };
                timer@01c20c00 {
@@ -282,5 +302,38 @@
                        clocks = <&apb1_gates 19>;
                        status = "disabled";
                };
+                i2c0: i2c@01c2ac00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "allwinner,sun4i-i2c";
+                        reg = <0x01c2ac00 0x400>;
+                        interrupts = <7>;
+                        clocks = <&apb1_gates 0>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+                i2c1: i2c@01c2b000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "allwinner,sun4i-i2c";
+                        reg = <0x01c2b000 0x400>;
+                        interrupts = <8>;
+                        clocks = <&apb1_gates 1>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+                i2c2: i2c@01c2b400 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "allwinner,sun4i-i2c";
+                        reg = <0x01c2b400 0x400>;
+                        interrupts = <9>;
+                        clocks = <&apb1_gates 2>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
        };
 };
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 80497e376706..9e508dcc4245 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -22,7 +22,7 @@
                bootargs = "earlyprintk console=ttyS0,115200";
        };
-        soc@01c20000 {
+        soc@01c00000 {
                pinctrl@01c20800 {
                        led_pins_olinuxino: led_pins@0 {
                                allwinner,pins = "PG9";
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 7363211daf84..f6091dc0936c 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -150,11 +150,10 @@
                };
        };
-        soc@01c20000 {
+        soc@01c00000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
-                reg = <0x01c20000 0x300000>;
                ranges;
                intc: interrupt-controller@01c20400 {
diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts
new file mode 100644
index 000000000000..99c4b1847cab
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/dts-v1/;
+/include/ "sun6i-a31.dtsi"
+/ {
+        model = "WITS A31 Colombus Evaluation Board";
+        compatible = "wits,colombus", "allwinner,sun6i-a31";
+        chosen {
+                bootargs = "earlyprintk console=ttyS0,115200";
+        };
+        soc@01c00000 {
+                uart0: serial@01c28000 {
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
new file mode 100644
index 000000000000..4d076ec24885
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -0,0 +1,156 @@
+/*
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/include/ "skeleton.dtsi"
+/ {
+        interrupt-parent = <&gic>;
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cpu@0 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+                cpu@1 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+                cpu@2 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <2>;
+                };
+                cpu@3 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <3>;
+                };
+        };
+        memory {
+                reg = <0x40000000 0x80000000>;
+        };
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                osc: oscillator {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <24000000>;
+                };
+        };
+        soc@01c00000 {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                timer@01c20c00 {
+                        compatible = "allwinner,sun4i-timer";
+                        reg = <0x01c20c00 0xa0>;
+                        interrupts = <0 18 1>,
+                                     <0 19 1>,
+                                     <0 20 1>,
+                                     <0 21 1>,
+                                     <0 22 1>;
+                        clocks = <&osc>;
+                };
+                wdt1: watchdog@01c20ca0 {
+                        compatible = "allwinner,sun6i-wdt";
+                        reg = <0x01c20ca0 0x20>;
+                };
+                uart0: serial@01c28000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28000 0x400>;
+                        interrupts = <0 0 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc>;
+                        status = "disabled";
+                };
+                uart1: serial@01c28400 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28400 0x400>;
+                        interrupts = <0 1 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc>;
+                        status = "disabled";
+                };
+                uart2: serial@01c28800 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28800 0x400>;
+                        interrupts = <0 2 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc>;
+                        status = "disabled";
+                };
+                uart3: serial@01c28c00 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28c00 0x400>;
+                        interrupts = <0 3 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc>;
+                        status = "disabled";
+                };
+                uart4: serial@01c29000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c29000 0x400>;
+                        interrupts = <0 4 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc>;
+                        status = "disabled";
+                };
+                uart5: serial@01c29400 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c29400 0x400>;
+                        interrupts = <0 5 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc>;
+                        status = "disabled";
+                };
+                gic: interrupt-controller@01c81000 {
+                        compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+                        reg = <0x01c81000 0x1000>,
+                              <0x01c82000 0x1000>,
+                              <0x01c84000 0x2000>,
+                              <0x01c86000 0x2000>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        interrupts = <1 9 0xf04>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
new file mode 100644
index 000000000000..d3395846491c
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/dts-v1/;
+/include/ "sun7i-a20.dtsi"
+/ {
+        model = "Olimex A20-Olinuxino Micro";
+        compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
+        soc@01c00000 {
+                uart0: serial@01c28000 {
+                        status = "okay";
+                };
+                uart6: serial@01c29800 {
+                        status = "okay";
+                };
+                uart7: serial@01c29c00 {
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
new file mode 100644
index 000000000000..33391517118c
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -0,0 +1,172 @@
+/*
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+/include/ "skeleton.dtsi"
+/ {
+        interrupt-parent = <&gic>;
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cpu@0 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+                cpu@1 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+        };
+        memory {
+                reg = <0x40000000 0x80000000>;
+        };
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                osc24M: osc24M@01c20050 {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <24000000>;
+                };
+                osc32k: osc32k {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <32768>;
+                };
+        };
+        soc@01c00000 {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                timer@01c20c00 {
+                        compatible = "allwinner,sun4i-timer";
+                        reg = <0x01c20c00 0x90>;
+                        interrupts = <0 22 1>,
+                                     <0 23 1>,
+                                     <0 24 1>,
+                                     <0 25 1>,
+                                     <0 67 1>,
+                                     <0 68 1>;
+                        clocks = <&osc24M>;
+                };
+                wdt: watchdog@01c20c90 {
+                        compatible = "allwinner,sun4i-wdt";
+                        reg = <0x01c20c90 0x10>;
+                };
+                uart0: serial@01c28000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28000 0x400>;
+                        interrupts = <0 1 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                uart1: serial@01c28400 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28400 0x400>;
+                        interrupts = <0 2 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                uart2: serial@01c28800 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28800 0x400>;
+                        interrupts = <0 3 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                uart3: serial@01c28c00 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28c00 0x400>;
+                        interrupts = <0 4 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                uart4: serial@01c29000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c29000 0x400>;
+                        interrupts = <0 17 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                uart5: serial@01c29400 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c29400 0x400>;
+                        interrupts = <0 18 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                uart6: serial@01c29800 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c29800 0x400>;
+                        interrupts = <0 19 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                uart7: serial@01c29c00 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c29c00 0x400>;
+                        interrupts = <0 20 1>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&osc24M>;
+                        status = "disabled";
+                };
+                gic: interrupt-controller@01c81000 {
+                        compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+                        reg = <0x01c81000 0x1000>,
+                              <0x01c82000 0x1000>,
+                              <0x01c84000 0x2000>,
+                              <0x01c86000 0x2000>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        interrupts = <1 9 0xf04>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index cb640eb6c932..60230288884b 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -791,7 +791,7 @@
                                        regulator-boot-on;
                                };
-                                dcdc3 {
+                                tps65090_dcdc3_reg: dcdc3 {
                                        regulator-name = "vdd-ao";
                                        regulator-always-on;
                                        regulator-boot-on;
@@ -836,6 +836,182 @@
                                };
                        };
                };
+                palmas: tps65913 {
+                        compatible = "ti,palmas";
+                        reg = <0x58>;
+                        interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>;
+                        #interrupt-cells = <2>;
+                        interrupt-controller;
+                        ti,system-power-controller;
+                        palmas_gpio: gpio {
+                                compatible = "ti,palmas-gpio";
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                        };
+                        pmic {
+                                compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
+                                smps1-in-supply = <&tps65090_dcdc3_reg>;
+                                smps3-in-supply = <&tps65090_dcdc3_reg>;
+                                smps4-in-supply = <&tps65090_dcdc2_reg>;
+                                smps7-in-supply = <&tps65090_dcdc2_reg>;
+                                smps8-in-supply = <&tps65090_dcdc2_reg>;
+                                smps9-in-supply = <&tps65090_dcdc2_reg>;
+                                ldo1-in-supply = <&tps65090_dcdc2_reg>;
+                                ldo2-in-supply = <&tps65090_dcdc2_reg>;
+                                ldo3-in-supply = <&palmas_smps3_reg>;
+                                ldo4-in-supply = <&tps65090_dcdc2_reg>;
+                                ldo5-in-supply = <&vdd_ac_bat_reg>;
+                                ldo6-in-supply = <&tps65090_dcdc2_reg>;
+                                ldo7-in-supply = <&tps65090_dcdc2_reg>;
+                                ldo8-in-supply = <&tps65090_dcdc3_reg>;
+                                ldo9-in-supply = <&palmas_smps9_reg>;
+                                ldoln-in-supply = <&tps65090_dcdc1_reg>;
+                                ldousb-in-supply = <&tps65090_dcdc1_reg>;
+                                regulators {
+                                        smps12 {
+                                                regulator-name = "vddio-ddr";
+                                                regulator-min-microvolt = <1350000>;
+                                                regulator-max-microvolt = <1350000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        palmas_smps3_reg: smps3 {
+                                                regulator-name = "vddio-1v8";
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        smps45 {
+                                                regulator-name = "vdd-core";
+                                                regulator-min-microvolt = <900000>;
+                                                regulator-max-microvolt = <1400000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        smps457 {
+                                                regulator-name = "vdd-core";
+                                                regulator-min-microvolt = <900000>;
+                                                regulator-max-microvolt = <1400000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        smps8 {
+                                                regulator-name = "avdd-pll";
+                                                regulator-min-microvolt = <1050000>;
+                                                regulator-max-microvolt = <1050000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        palmas_smps9_reg: smps9 {
+                                                regulator-name = "sdhci-vdd-sd-slot";
+                                                regulator-min-microvolt = <2800000>;
+                                                regulator-max-microvolt = <2800000>;
+                                                regulator-always-on;
+                                        };
+                                        ldo1 {
+                                                regulator-name = "avdd-cam1";
+                                                regulator-min-microvolt = <2800000>;
+                                                regulator-max-microvolt = <2800000>;
+                                        };
+                                        ldo2 {
+                                                regulator-name = "avdd-cam2";
+                                                regulator-min-microvolt = <2800000>;
+                                                regulator-max-microvolt = <2800000>;
+                                        };
+                                        ldo3 {
+                                                regulator-name = "avdd-dsi-csi";
+                                                regulator-min-microvolt = <1200000>;
+                                                regulator-max-microvolt = <1200000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        ldo4 {
+                                                regulator-name = "vpp-fuse";
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <1800000>;
+                                        };
+                                        ldo6 {
+                                                regulator-name = "vdd-sensor-2v85";
+                                                regulator-min-microvolt = <2850000>;
+                                                regulator-max-microvolt = <2850000>;
+                                        };
+                                        ldo7 {
+                                                regulator-name = "vdd-af-cam1";
+                                                regulator-min-microvolt = <2800000>;
+                                                regulator-max-microvolt = <2800000>;
+                                        };
+                                        ldo8 {
+                                                regulator-name = "vdd-rtc";
+                                                regulator-min-microvolt = <900000>;
+                                                regulator-max-microvolt = <900000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                                ti,enable-ldo8-tracking;
+                                        };
+                                        ldo9 {
+                                                regulator-name = "vddio-sdmmc-2";
+                                                regulator-min-microvolt = <1800000>;
+                                                regulator-max-microvolt = <3300000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        ldoln {
+                                                regulator-name = "hvdd-usb";
+                                                regulator-min-microvolt = <3300000>;
+                                                regulator-max-microvolt = <3300000>;
+                                        };
+                                        ldousb {
+                                                regulator-name = "avdd-usb";
+                                                regulator-min-microvolt = <3300000>;
+                                                regulator-max-microvolt = <3300000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        regen1 {
+                                                regulator-name = "rail-3v3";
+                                                regulator-max-microvolt = <3300000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                        regen2 {
+                                                regulator-name = "rail-5v0";
+                                                regulator-max-microvolt = <5000000>;
+                                                regulator-always-on;
+                                                regulator-boot-on;
+                                        };
+                                };
+                        };
+                        rtc {
+                                compatible = "ti,palmas-rtc";
+                                interrupt-parent = <&palmas>;
+                                interrupts = <8 0>;
+                        };
+                };
        };
        spi@7000da00 {
@@ -850,6 +1026,13 @@
        pmc {
                nvidia,invert-interrupt;
+                nvidia,suspend-mode = <1>;
+                nvidia,cpu-pwr-good-time = <500>;
+                nvidia,cpu-pwr-off-time = <300>;
+                nvidia,core-pwr-good-time = <641 3845>;
+                nvidia,core-pwr-off-time = <61036>;
+                nvidia,core-power-req-active-high;
+                nvidia,sys-clock-req-active-high;
        };
        ahub {
@@ -870,6 +1053,15 @@
                non-removable;
        };
+        usb@7d008000 {
+                status = "okay";
+        };
+        usb-phy@7d008000 {
+                status = "okay";
+                vbus-supply = <&usb3_vbus_reg>;
+        };
        clocks {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -883,6 +1075,35 @@
                };
        };
+        gpio-keys {
+                compatible = "gpio-keys";
+                home {
+                        label = "Home";
+                        gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
+                        linux,code = <102>; /* KEY_HOME */
+                };
+                power {
+                        label = "Power";
+                        gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+                        linux,code = <116>; /* KEY_POWER */
+                        gpio-key,wakeup;
+                };
+                volume_down {
+                        label = "Volume Down";
+                        gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
+                        linux,code = <114>; /* KEY_VOLUMEDOWN */
+                };
+                volume_up {
+                        label = "Volume Up";
+                        gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
+                        linux,code = <115>; /* KEY_VOLUMEUP */
+                };
+        };
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -951,6 +1172,16 @@
                        gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
                        vin-supply = <&tps65090_dcdc1_reg>;
                };
+                vdd_cam_1v8_reg: regulator@6 {
+                        compatible = "regulator-fixed";
+                        reg = <6>;
+                        regulator-name = "vdd_cam_1v8_reg";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        enable-active-high;
+                        gpio = <&palmas_gpio 6 0>;
+                };
        };
        sound {
@@ -964,7 +1195,9 @@
                        "Speakers", "SPORP",
                        "Speakers", "SPORN",
                        "Speakers", "SPOLP",
-                        "Speakers", "SPOLN";
+                        "Speakers", "SPOLN",
+                        "Mic Jack", "MICBIAS1",
+                        "IN2P", "Mic Jack";
                nvidia,i2s-controller = <&tegra_i2s1>;
                nvidia,audio-codec = <&rt5640>;
diff --git a/arch/arm/boot/dts/tegra114-pluto.dts b/arch/arm/boot/dts/tegra114-pluto.dts
deleted file mode 100644
index d5f8d3e0bde2..000000000000
--- a/arch/arm/boot/dts/tegra114-pluto.dts
+++ /dev/null
@@ -1,33 +0,0 @@
-/dts-v1/;
-#include "tegra114.dtsi"
-/ {
-        model = "NVIDIA Tegra114 Pluto evaluation board";
-        compatible = "nvidia,pluto", "nvidia,tegra114";
-        memory {
-                reg = <0x80000000 0x40000000>;
-        };
-        serial@70006300 {
-                status = "okay";
-        };
-        pmc {
-                nvidia,invert-interrupt;
-        };
-        clocks {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-                clk32k_in: clock {
-                        compatible = "fixed-clock";
-                        reg=<0>;
-                        #clock-cells = <0>;
-                        clock-frequency = <32768>;
-                };
-        };
-};
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index abf6c40d28c6..2905145d8e59 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -430,6 +430,68 @@
                status = "disable";
        };
+        usb@7d000000 {
+                compatible = "nvidia,tegra30-ehci", "usb-ehci";
+                reg = <0x7d000000 0x4000>;
+                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA114_CLK_USBD>;
+                nvidia,phy = <&phy1>;
+                status = "disabled";
+        };
+        phy1: usb-phy@7d000000 {
+                compatible = "nvidia,tegra30-usb-phy";
+                reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA114_CLK_USBD>,
+                         <&tegra_car TEGRA114_CLK_PLL_U>,
+                         <&tegra_car TEGRA114_CLK_USBD>;
+                clock-names = "reg", "pll_u", "utmi-pads";
+                nvidia,hssync-start-delay = <0>;
+                nvidia,idle-wait-delay = <17>;
+                nvidia,elastic-limit = <16>;
+                nvidia,term-range-adj = <6>;
+                nvidia,xcvr-setup = <9>;
+                nvidia,xcvr-lsfslew = <0>;
+                nvidia,xcvr-lsrslew = <3>;
+                nvidia,hssquelch-level = <2>;
+                nvidia,hsdiscon-level = <5>;
+                nvidia,xcvr-hsslew = <12>;
+                status = "disabled";
+        };
+        usb@7d008000 {
+                compatible = "nvidia,tegra30-ehci", "usb-ehci";
+                reg = <0x7d008000 0x4000>;
+                interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA114_CLK_USB3>;
+                nvidia,phy = <&phy3>;
+                status = "disabled";
+        };
+        phy3: usb-phy@7d008000 {
+                compatible = "nvidia,tegra30-usb-phy";
+                reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA114_CLK_USB3>,
+                         <&tegra_car TEGRA114_CLK_PLL_U>,
+                         <&tegra_car TEGRA114_CLK_USBD>;
+                clock-names = "reg", "pll_u", "utmi-pads";
+                nvidia,hssync-start-delay = <0>;
+                nvidia,idle-wait-delay = <17>;
+                nvidia,elastic-limit = <16>;
+                nvidia,term-range-adj = <6>;
+                nvidia,xcvr-setup = <9>;
+                nvidia,xcvr-lsfslew = <0>;
+                nvidia,xcvr-lsrslew = <3>;
+                nvidia,hssquelch-level = <2>;
+                nvidia,hsdiscon-level = <5>;
+                nvidia,xcvr-hsslew = <12>;
+                status = "disabled";
+        };
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index 5592be6f2f7a..d5c9bca01232 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -363,7 +363,7 @@
        };
        pmc {
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <5000>;
                nvidia,cpu-pwr-off-time = <5000>;
                nvidia,core-pwr-good-time = <3845 3845>;
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index d9f89cd879a7..e156ab30e763 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -335,7 +335,7 @@
                                        regulator-always-on;
                                };
-                                ldo0 {
+                                pci_clk_reg: ldo0 {
                                        regulator-name = "vdd_ldo0,vddio_pex_clk";
                                        regulator-min-microvolt = <3300000>;
                                        regulator-max-microvolt = <3300000>;
@@ -417,7 +417,7 @@
        pmc {
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <5000>;
                nvidia,cpu-pwr-off-time = <5000>;
                nvidia,core-pwr-good-time = <3845 3845>;
@@ -425,6 +425,20 @@
                nvidia,sys-clock-req-active-high;
        };
+        pcie-controller {
+                pex-clk-supply = <&pci_clk_reg>;
+                vdd-supply = <&pci_vdd_reg>;
+                status = "okay";
+                pci@1,0 {
+                        status = "okay";
+                };
+                pci@2,0 {
+                        status = "okay";
+                };
+        };
        usb@c5000000 {
                status = "okay";
        };
@@ -643,7 +657,7 @@
                        enable-active-high;
                };
-                regulator@3 {
+                pci_vdd_reg: regulator@3 {
                        compatible = "regulator-fixed";
                        reg = <3>;
                        regulator-name = "vdd_1v05";
@@ -651,8 +665,6 @@
                        regulator-max-microvolt = <1050000>;
                        gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
                        enable-active-high;
-                        /* Hack until board-harmony-pcie.c is removed */
-                        status = "disabled";
                };
                regulator@4 {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index cfd12763b1b2..8d71fc9d8a2f 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -417,7 +417,7 @@
        pmc {
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <2000>;
                nvidia,cpu-pwr-off-time = <0>;
                nvidia,core-pwr-good-time = <3845 3845>;
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index c8242533268f..315aae26c3cd 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -518,7 +518,7 @@
        pmc {
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <5000>;
                nvidia,cpu-pwr-off-time = <5000>;
                nvidia,core-pwr-good-time = <3845 3845>;
@@ -828,7 +828,7 @@
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
                        enable-active-high;
-                        gpio = <&gpio 24 0>; /* PD0 */
+                        gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
                        regulator-always-on;
                        regulator-boot-on;
                };
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index c54faae7cfb3..7726dab3d08d 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -366,7 +366,7 @@
                                        regulator-always-on;
                                };
-                                ldo0 {
+                                pci_clk_reg: ldo0 {
                                        regulator-name = "vdd_ldo0,vddio_pex_clk";
                                        regulator-min-microvolt = <3300000>;
                                        regulator-max-microvolt = <3300000>;
@@ -459,7 +459,7 @@
        pmc {
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <5000>;
                nvidia,cpu-pwr-off-time = <5000>;
                nvidia,core-pwr-good-time = <3845 3845>;
@@ -467,6 +467,11 @@
                nvidia,sys-clock-req-active-high;
        };
+        pcie-controller {
+                pex-clk-supply = <&pci_clk_reg>;
+                vdd-supply = <&pci_vdd_reg>;
+        };
        usb@c5008000 {
                status = "okay";
        };
@@ -509,5 +514,15 @@
                        regulator-max-microvolt = <5000000>;
                        regulator-always-on;
                };
+                pci_vdd_reg: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "vdd_1v05";
+                        regulator-min-microvolt = <1050000>;
+                        regulator-max-microvolt = <1050000>;
+                        gpio = <&pmic 2 0>;
+                        enable-active-high;
+                };
        };
 };
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts
index c572c43751b1..3ada3cb67f07 100644
--- a/arch/arm/boot/dts/tegra20-tec.dts
+++ b/arch/arm/boot/dts/tegra20-tec.dts
@@ -32,6 +32,14 @@
                };
        };
+        pcie-controller {
+                status = "okay";
+                pci@1,0 {
+                        status = "okay";
+                };
+        };
        sound {
                compatible = "ad,tegra-audio-wm8903-tec",
                             "nvidia,tegra-audio-wm8903";
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 1e9d33adb925..78deea5c0d21 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -302,7 +302,7 @@
        };
        pmc {
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <5000>;
                nvidia,cpu-pwr-off-time = <5000>;
                nvidia,core-pwr-good-time = <3845 3845>;
@@ -310,6 +310,16 @@
                nvidia,sys-clock-req-active-high;
        };
+        pcie-controller {
+                status = "okay";
+                pex-clk-supply = <&pci_clk_reg>;
+                vdd-supply = <&pci_vdd_reg>;
+                pci@1,0 {
+                        status = "okay";
+                };
+        };
        usb@c5000000 {
                status = "okay";
        };
@@ -410,10 +420,28 @@
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
                        enable-active-high;
-                        gpio = <&gpio 170 0>; /* PV2 */
+                        gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
                        regulator-always-on;
                        regulator-boot-on;
                };
+                pci_clk_reg: regulator@3 {
+                        compatible = "regulator-fixed";
+                        reg = <3>;
+                        regulator-name = "pci_clk";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+                pci_vdd_reg: regulator@4 {
+                        compatible = "regulator-fixed";
+                        reg = <4>;
+                        regulator-name = "pci_vdd";
+                        regulator-min-microvolt = <1050000>;
+                        regulator-max-microvolt = <1050000>;
+                        regulator-always-on;
+                };
        };
        sound {
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 7f8c28d1121f..aab872cd0530 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -494,7 +494,7 @@
        pmc {
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <2000>;
                nvidia,cpu-pwr-off-time = <100>;
                nvidia,core-pwr-good-time = <3845 3845>;
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index c703197dca6e..d33a73cf167c 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -497,7 +497,7 @@
        pmc {
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <2000>;
                nvidia,cpu-pwr-off-time = <1000>;
                nvidia,core-pwr-good-time = <0 3845>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index e4570834512e..df40b54fd8bc 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -455,6 +455,61 @@
                #size-cells = <0>;
        };
+        pcie-controller {
+                compatible = "nvidia,tegra20-pcie";
+                device_type = "pci";
+                reg = <0x80003000 0x00000800   /* PADS registers */
+                       0x80003800 0x00000200   /* AFI registers */
+                       0x90000000 0x10000000>; /* configuration space */
+                reg-names = "pads", "afi", "cs";
+                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH   /* controller interrupt */
+                              GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
+                interrupt-names = "intr", "msi";
+                bus-range = <0x00 0xff>;
+                #address-cells = <3>;
+                #size-cells = <2>;
+                ranges = <0x82000000 0 0x80000000 0x80000000 0 0x00001000   /* port 0 registers */
+                          0x82000000 0 0x80001000 0x80001000 0 0x00001000   /* port 1 registers */
+                          0x81000000 0 0          0x82000000 0 0x00010000   /* downstream I/O */
+                          0x82000000 0 0xa0000000 0xa0000000 0 0x08000000   /* non-prefetchable memory */
+                          0xc2000000 0 0xa8000000 0xa8000000 0 0x18000000>; /* prefetchable memory */
+                clocks = <&tegra_car TEGRA20_CLK_PEX>,
+                         <&tegra_car TEGRA20_CLK_AFI>,
+                         <&tegra_car TEGRA20_CLK_PCIE_XCLK>,
+                         <&tegra_car TEGRA20_CLK_PLL_E>;
+                clock-names = "pex", "afi", "pcie_xclk", "pll_e";
+                status = "disabled";
+                pci@1,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>;
+                        reg = <0x000800 0 0 0 0>;
+                        status = "disabled";
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        ranges;
+                        nvidia,num-lanes = <2>;
+                };
+                pci@2,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>;
+                        reg = <0x001000 0 0 0 0>;
+                        status = "disabled";
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        ranges;
+                        nvidia,num-lanes = <2>;
+                };
+        };
        usb@c5000000 {
                compatible = "nvidia,tegra20-ehci", "usb-ehci";
                reg = <0xc5000000 0x4000>;
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 87c5f7b7c271..08cad696e89f 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -10,6 +10,40 @@
                reg = <0x80000000 0x7ff00000>;
        };
+        pcie-controller {
+                status = "okay";
+                pex-clk-supply = <&sys_3v3_pexs_reg>;
+                vdd-supply = <&ldo1_reg>;
+                avdd-supply = <&ldo2_reg>;
+                pci@1,0 {
+                        status = "okay";
+                        nvidia,num-lanes = <2>;
+                };
+                pci@2,0 {
+                        nvidia,num-lanes = <2>;
+                };
+                pci@3,0 {
+                        status = "okay";
+                        nvidia,num-lanes = <2>;
+                };
+        };
+        host1x {
+                hdmi {
+                        status = "okay";
+                        vdd-supply = <&sys_3v3_reg>;
+                        pll-supply = <&vio_reg>;
+                        nvidia,hpd-gpio =
+                                <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
+                        nvidia,ddc-i2c-bus = <&hdmiddc>;
+                };
+        };
        pinmux {
                pinctrl-names = "default";
                pinctrl-0 = <&state_default>;
@@ -76,6 +110,11 @@
                                nvidia,pull = <0>;
                                nvidia,tristate = <0>;
                        };
+                        pex_l1_prsnt_n_pdd4 {
+                                nvidia,pins =   "pex_l1_prsnt_n_pdd4",
+                                                "pex_l1_clkreq_n_pdd6";
+                                nvidia,pull = <2>;
+                        };
                        sdio3 {
                                nvidia,pins = "drive_sdio3";
                                nvidia,high-speed-mode = <0>;
@@ -85,6 +124,10 @@
                                nvidia,slew-rate-rising = <1>;
                                nvidia,slew-rate-falling = <1>;
                        };
+                        gpv {
+                                nvidia,pins = "drive_gpv";
+                                nvidia,pull-up-strength = <16>;
+                        };
                };
        };
@@ -107,7 +150,7 @@
                clock-frequency = <100000>;
        };
-        i2c@7000c700 {
+        hdmiddc: i2c@7000c700 {
                status = "okay";
                clock-frequency = <100000>;
        };
@@ -262,7 +305,7 @@
        pmc {
                status = "okay";
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <2000>;
                nvidia,cpu-pwr-off-time = <200>;
                nvidia,core-pwr-good-time = <3845 3845>;
@@ -285,6 +328,15 @@
                non-removable;
        };
+        usb@7d008000 {
+                status = "okay";
+        };
+        usb-phy@7d008000 {
+                vbus-supply = <&usb3_vbus_reg>;
+                status = "okay";
+        };
        clocks {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -357,7 +409,7 @@
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
                        enable-active-high;
-                        gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
+                        gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
                        gpio-open-drain;
                        vin-supply = <&vdd_5v_in_reg>;
                };
@@ -369,7 +421,7 @@
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
                        enable-active-high;
-                        gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
+                        gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
                        gpio-open-drain;
                        vin-supply = <&vdd_5v_in_reg>;
                };
@@ -421,7 +473,9 @@
                nvidia,audio-routing =
                        "Headphones", "HPOR",
-                        "Headphones", "HPOL";
+                        "Headphones", "HPOL",
+                        "Mic Jack", "MICBIAS1",
+                        "IN2P", "Mic Jack";
                nvidia,i2s-controller = <&tegra_i2s1>;
                nvidia,audio-codec = <&rt5640>;
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index f65b53d32416..e19dbf238e5c 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -31,6 +31,26 @@
                reg = <0x80000000 0x40000000>;
        };
+        pcie-controller {
+                status = "okay";
+                pex-clk-supply = <&pex_hvdd_3v3_reg>;
+                vdd-supply = <&ldo1_reg>;
+                avdd-supply = <&ldo2_reg>;
+                pci@1,0 {
+                        nvidia,num-lanes = <4>;
+                };
+                pci@2,0 {
+                        nvidia,num-lanes = <1>;
+                };
+                pci@3,0 {
+                        status = "okay";
+                        nvidia,num-lanes = <1>;
+                };
+        };
        pinmux {
                pinctrl-names = "default";
                pinctrl-0 = <&state_default>;
@@ -173,19 +193,6 @@
                        gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
                };
-                tps62361 {
-                        compatible = "ti,tps62361";
-                        reg = <0x60>;
-                        regulator-name = "tps62361-vout";
-                        regulator-min-microvolt = <500000>;
-                        regulator-max-microvolt = <1500000>;
-                        regulator-boot-on;
-                        regulator-always-on;
-                        ti,vsel0-state-high;
-                        ti,vsel1-state-high;
-                };
                pmic: tps65911@2d {
                        compatible = "ti,tps65911";
                        reg = <0x2d>;
@@ -286,6 +293,26 @@
                                };
                        };
                };
+                nct1008 {
+                        compatible = "onnn,nct1008";
+                        reg = <0x4c>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
+                };
+                tps62361 {
+                        compatible = "ti,tps62361";
+                        reg = <0x60>;
+                        regulator-name = "tps62361-vout";
+                        regulator-min-microvolt = <500000>;
+                        regulator-max-microvolt = <1500000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                        ti,vsel0-state-high;
+                        ti,vsel1-state-high;
+                };
        };
        spi@7000da00 {
@@ -307,7 +334,7 @@
        pmc {
                status = "okay";
                nvidia,invert-interrupt;
-                nvidia,suspend-mode = <2>;
+                nvidia,suspend-mode = <1>;
                nvidia,cpu-pwr-good-time = <2000>;
                nvidia,cpu-pwr-off-time = <200>;
                nvidia,core-pwr-good-time = <3845 3845>;
@@ -330,6 +357,15 @@
                non-removable;
        };
+        usb@7d008000 {
+                status = "okay";
+        };
+        usb-phy@7d008000 {
+                vbus-supply = <&usb3_vbus_reg>;
+                status = "okay";
+        };
        clocks {
                compatible = "simple-bus";
                #address-cells = <1>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index d8783f0fae63..0022c127e1d9 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -16,6 +16,76 @@
                serial4 = &uarte;
        };
+        pcie-controller {
+                compatible = "nvidia,tegra30-pcie";
+                device_type = "pci";
+                reg = <0x00003000 0x00000800   /* PADS registers */
+                       0x00003800 0x00000200   /* AFI registers */
+                       0x10000000 0x10000000>; /* configuration space */
+                reg-names = "pads", "afi", "cs";
+                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH   /* controller interrupt */
+                              GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
+                interrupt-names = "intr", "msi";
+                bus-range = <0x00 0xff>;
+                #address-cells = <3>;
+                #size-cells = <2>;
+                ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000   /* port 0 configuration space */
+                          0x82000000 0 0x00001000 0x00001000 0 0x00001000   /* port 1 configuration space */
+                          0x82000000 0 0x00004000 0x00004000 0 0x00001000   /* port 2 configuration space */
+                          0x81000000 0 0          0x02000000 0 0x00010000   /* downstream I/O */
+                          0x82000000 0 0x20000000 0x20000000 0 0x08000000   /* non-prefetchable memory */
+                          0xc2000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
+                clocks = <&tegra_car TEGRA30_CLK_PCIE>,
+                         <&tegra_car TEGRA30_CLK_AFI>,
+                         <&tegra_car TEGRA30_CLK_PCIEX>,
+                         <&tegra_car TEGRA30_CLK_PLL_E>,
+                         <&tegra_car TEGRA30_CLK_CML0>;
+                clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml";
+                status = "disabled";
+                pci@1,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>;
+                        reg = <0x000800 0 0 0 0>;
+                        status = "disabled";
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        ranges;
+                        nvidia,num-lanes = <2>;
+                };
+                pci@2,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>;
+                        reg = <0x001000 0 0 0 0>;
+                        status = "disabled";
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        ranges;
+                        nvidia,num-lanes = <2>;
+                };
+                pci@3,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>;
+                        reg = <0x001800 0 0 0 0>;
+                        status = "disabled";
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        ranges;
+                        nvidia,num-lanes = <2>;
+                };
+        };
        host1x {
                compatible = "nvidia,tegra30-host1x", "simple-bus";
                reg = <0x50000000 0x00024000>;
@@ -561,6 +631,92 @@
                status = "disabled";
        };
+        usb@7d000000 {
+                compatible = "nvidia,tegra30-ehci", "usb-ehci";
+                reg = <0x7d000000 0x4000>;
+                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA30_CLK_USBD>;
+                nvidia,needs-double-reset;
+                nvidia,phy = <&phy1>;
+                status = "disabled";
+        };
+        phy1: usb-phy@7d000000 {
+                compatible = "nvidia,tegra30-usb-phy";
+                reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA30_CLK_USBD>,
+                         <&tegra_car TEGRA30_CLK_PLL_U>,
+                         <&tegra_car TEGRA30_CLK_USBD>;
+                clock-names = "reg", "pll_u", "utmi-pads";
+                nvidia,hssync-start-delay = <9>;
+                nvidia,idle-wait-delay = <17>;
+                nvidia,elastic-limit = <16>;
+                nvidia,term-range-adj = <6>;
+                nvidia,xcvr-setup = <51>;
+                nvidia.xcvr-setup-use-fuses;
+                nvidia,xcvr-lsfslew = <1>;
+                nvidia,xcvr-lsrslew = <1>;
+                nvidia,xcvr-hsslew = <32>;
+                nvidia,hssquelch-level = <2>;
+                nvidia,hsdiscon-level = <5>;
+                status = "disabled";
+        };
+        usb@7d004000 {
+                compatible = "nvidia,tegra30-ehci", "usb-ehci";
+                reg = <0x7d004000 0x4000>;
+                interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                phy_type = "ulpi";
+                clocks = <&tegra_car TEGRA30_CLK_USB2>;
+                nvidia,phy = <&phy2>;
+                status = "disabled";
+        };
+        phy2: usb-phy@7d004000 {
+                compatible = "nvidia,tegra30-usb-phy";
+                reg = <0x7d004000 0x4000>;
+                phy_type = "ulpi";
+                clocks = <&tegra_car TEGRA30_CLK_USB2>,
+                         <&tegra_car TEGRA30_CLK_PLL_U>,
+                         <&tegra_car TEGRA30_CLK_CDEV2>;
+                clock-names = "reg", "pll_u", "ulpi-link";
+                status = "disabled";
+        };
+        usb@7d008000 {
+                compatible = "nvidia,tegra30-ehci", "usb-ehci";
+                reg = <0x7d008000 0x4000>;
+                interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA30_CLK_USB3>;
+                nvidia,phy = <&phy3>;
+                status = "disabled";
+        };
+        phy3: usb-phy@7d008000 {
+                compatible = "nvidia,tegra30-usb-phy";
+                reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
+                phy_type = "utmi";
+                clocks = <&tegra_car TEGRA30_CLK_USB3>,
+                         <&tegra_car TEGRA30_CLK_PLL_U>,
+                         <&tegra_car TEGRA30_CLK_USBD>;
+                clock-names = "reg", "pll_u", "utmi-pads";
+                nvidia,hssync-start-delay = <0>;
+                nvidia,idle-wait-delay = <17>;
+                nvidia,elastic-limit = <16>;
+                nvidia,term-range-adj = <6>;
+                nvidia,xcvr-setup = <51>;
+                nvidia.xcvr-setup-use-fuses;
+                nvidia,xcvr-lsfslew = <2>;
+                nvidia,xcvr-lsrslew = <2>;
+                nvidia,xcvr-hsslew = <32>;
+                nvidia,hssquelch-level = <2>;
+                nvidia,hsdiscon-level = <5>;
+                status = "disabled";
+        };
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
diff --git a/arch/arm/boot/dts/u9540.dts b/arch/arm/boot/dts/u9540.dts
deleted file mode 100644
index 95892ec6c342..000000000000
--- a/arch/arm/boot/dts/u9540.dts
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright 2012 ST-Ericsson AB
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-/dts-v1/;
-/include/ "dbx5x0.dtsi"
-/ {
-        model = "ST-Ericsson U9540 platform with Device Tree";
-        compatible = "st-ericsson,u9540";
-        memory {
-                reg = <0x00000000 0x20000000>;
-        };
-        soc-u9500 {
-                uart@80120000 {
-                        status = "okay";
-                };
-                uart@80121000 {
-                        status = "okay";
-                };
-                uart@80007000 {
-                        status = "okay";
-                };
-                // External Micro SD slot
-                sdi0_per1@80126000 {
-                        arm,primecell-periphid = <0x10480180>;
-                        max-frequency = <100000000>;
-                        bus-width = <4>;
-                        mmc-cap-sd-highspeed;
-                        mmc-cap-mmc-highspeed;
-                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
-                        cd-gpios  = <&gpio7 6 0x4>; // 230
-                        cd-inverted;
-                        status = "okay";
-                };
-                // WLAN SDIO channel
-                sdi1_per2@80118000 {
-                        arm,primecell-periphid = <0x10480180>;
-                        max-frequency = <50000000>;
-                        bus-width = <4>;
-                        status = "okay";
-                };
-                // On-board eMMC
-                sdi4_per2@80114000 {
-                        arm,primecell-periphid = <0x10480180>;
-                        max-frequency = <100000000>;
-                        bus-width = <8>;
-                        mmc-cap-mmc-highspeed;
-                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
-                        status = "okay";
-                };
-        };
-};
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 6f54a64850eb..e32b92b949d2 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -41,8 +41,8 @@
                L2: cache-controller {
                        compatible = "arm,pl310-cache";
                        reg = <0xF8F02000 0x1000>;
-                        arm,data-latency = <2 3 2>;
+                        arm,data-latency = <3 2 2>;
-                        arm,tag-latency = <2 3 2>;
+                        arm,tag-latency = <2 2 2>;
                        cache-unified;
                        cache-level = <2>;
                };
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index 5981c3db9b41..4d42da49753c 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -27,6 +27,7 @@ config MACH_NOMADIK_8815NHK
        select NOMADIK_8815
        select I2C
        select I2C_ALGOBIT
+        select I2C_NOMADIK
 endmenu
 endif
diff --git a/arch/arm/mach-pxa/pxa-dt.c b/arch/arm/mach-pxa/pxa-dt.c
index 3835979a0dd3..f6a2c4b1c1dc 100644
--- a/arch/arm/mach-pxa/pxa-dt.c
+++ b/arch/arm/mach-pxa/pxa-dt.c
@@ -28,7 +28,7 @@ static const struct of_dev_auxdata pxa3xx_auxdata_lookup[] __initconst = {
        OF_DEV_AUXDATA("mrvl,pxa-uart",         0x40700000, "pxa2xx-uart.2", NULL),
        OF_DEV_AUXDATA("mrvl,pxa-uart",         0x41600000, "pxa2xx-uart.3", NULL),
        OF_DEV_AUXDATA("marvell,pxa-mmc",       0x41100000, "pxa2xx-mci.0", NULL),
-        OF_DEV_AUXDATA("mrvl,pxa-gpio",         0x40e00000, "pxa-gpio", NULL),
+        OF_DEV_AUXDATA("intel,pxa3xx-gpio",     0x40e00000, "pxa3xx-gpio", NULL),
        OF_DEV_AUXDATA("marvell,pxa-ohci",      0x4c000000, "pxa27x-ohci", NULL),
        OF_DEV_AUXDATA("mrvl,pxa-i2c",          0x40301680, "pxa2xx-i2c.0", NULL),
        OF_DEV_AUXDATA("mrvl,pwri2c",           0x40f500c0, "pxa3xx-i2c.1", NULL),
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 3912ce91fee4..cdefd7dcca79 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -1,3 +1,41 @@
+config ARCH_SHMOBILE_MULTI
+        bool "SH-Mobile Series" if ARCH_MULTI_V7
+        depends on MMU
+        select CPU_V7
+        select GENERIC_CLOCKEVENTS
+        select HAVE_ARM_SCU if SMP
+        select HAVE_ARM_TWD if LOCAL_TIMERS
+        select HAVE_SMP
+        select ARM_GIC
+        select MIGHT_HAVE_CACHE_L2X0
+        select NO_IOPORT
+        select PINCTRL
+        select ARCH_REQUIRE_GPIOLIB
+        select CLKDEV_LOOKUP
+if ARCH_SHMOBILE_MULTI
+comment "SH-Mobile System Type"
+config ARCH_EMEV2
+        bool "Emma Mobile EV2"
+comment "SH-Mobile Board Type"
+config MACH_KZM9D_REFERENCE
+        bool "KZM9D board - Reference Device Tree Implementation"
+        depends on ARCH_EMEV2
+        select REGULATOR_FIXED_VOLTAGE if REGULATOR
+        ---help---
+           Use reference implementation of KZM9D board support
+           which makes a greater use of device tree at the expense
+           of not supporting a number of devices.
+           This is intended to aid developers
+comment "SH-Mobile System Configuration"
+endif
 if ARCH_SHMOBILE
 comment "SH-Mobile System Type"
@@ -156,6 +194,18 @@ config MACH_KZM9D
        select REGULATOR_FIXED_VOLTAGE if REGULATOR
        select USE_OF
+config MACH_KZM9D_REFERENCE
+        bool "KZM9D board - Reference Device Tree Implementation"
+        depends on ARCH_EMEV2
+        select REGULATOR_FIXED_VOLTAGE if REGULATOR
+        select USE_OF
+        ---help---
+           Use reference implementation of KZM9D board support
+           which makes a greater use of device tree at the expense
+           of not supporting a number of devices.
+           This is intended to aid developers
 config MACH_KZM9G
        bool "KZM-A9-GT board"
        depends on ARCH_SH73A0
@@ -186,6 +236,15 @@ config CPU_HAS_INTEVT
        bool
        default y
+config SH_CLK_CPG
+        bool
+source "drivers/sh/Kconfig"
+endif
+if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
 menu "Timer and clock configuration"
 config SHMOBILE_TIMER_HZ
@@ -220,9 +279,4 @@ config EM_TIMER_STI
 endmenu
-config SH_CLK_CPG
-        bool
-source "drivers/sh/Kconfig"
 endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 6165a517f580..b150c4508237 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -2,18 +2,33 @@
 # Makefile for the linux kernel.
 #
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/mach-shmobile/include
 # Common objects
-obj-y                           := timer.o console.o clock.o
+obj-y                           := timer.o console.o
 # CPU objects
-obj-$(CONFIG_ARCH_SH7372)       += setup-sh7372.o clock-sh7372.o intc-sh7372.o
+obj-$(CONFIG_ARCH_SH7372)       += setup-sh7372.o intc-sh7372.o
-obj-$(CONFIG_ARCH_SH73A0)       += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
+obj-$(CONFIG_ARCH_SH73A0)       += setup-sh73a0.o intc-sh73a0.o
-obj-$(CONFIG_ARCH_R8A73A4)      += setup-r8a73a4.o clock-r8a73a4.o
+obj-$(CONFIG_ARCH_R8A73A4)      += setup-r8a73a4.o
-obj-$(CONFIG_ARCH_R8A7740)      += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7740)      += setup-r8a7740.o intc-r8a7740.o
-obj-$(CONFIG_ARCH_R8A7778)      += setup-r8a7778.o clock-r8a7778.o
+obj-$(CONFIG_ARCH_R8A7778)      += setup-r8a7778.o
-obj-$(CONFIG_ARCH_R8A7779)      += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o
+obj-$(CONFIG_ARCH_R8A7779)      += setup-r8a7779.o intc-r8a7779.o
-obj-$(CONFIG_ARCH_R8A7790)      += setup-r8a7790.o clock-r8a7790.o
+obj-$(CONFIG_ARCH_R8A7790)      += setup-r8a7790.o
-obj-$(CONFIG_ARCH_EMEV2)        += setup-emev2.o clock-emev2.o
+obj-$(CONFIG_ARCH_EMEV2)        += setup-emev2.o
+# Clock objects
+ifndef CONFIG_COMMON_CLK
+obj-y                           += clock.o
+obj-$(CONFIG_ARCH_SH7372)       += clock-sh7372.o
+obj-$(CONFIG_ARCH_SH73A0)       += clock-sh73a0.o
+obj-$(CONFIG_ARCH_R8A73A4)      += clock-r8a73a4.o
+obj-$(CONFIG_ARCH_R8A7740)      += clock-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7778)      += clock-r8a7778.o
+obj-$(CONFIG_ARCH_R8A7779)      += clock-r8a7779.o
+obj-$(CONFIG_ARCH_R8A7790)      += clock-r8a7790.o
+obj-$(CONFIG_ARCH_EMEV2)        += clock-emev2.o
+endif
 # SMP objects
 smp-y                           := platsmp.o headsmp.o
@@ -46,6 +61,7 @@ obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
 obj-$(CONFIG_MACH_ARMADILLO800EVA)      += board-armadillo800eva.o
 obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)    += board-armadillo800eva-reference.o
 obj-$(CONFIG_MACH_KZM9D)        += board-kzm9d.o
+obj-$(CONFIG_MACH_KZM9D_REFERENCE)      += board-kzm9d-reference.o
 obj-$(CONFIG_MACH_KZM9G)        += board-kzm9g.o
 obj-$(CONFIG_MACH_KZM9G_REFERENCE)      += board-kzm9g-reference.o
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 84c6868580f0..7785c52b5cfd 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -7,6 +7,7 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
 loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
 loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
 loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
+loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
 loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
 loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
 loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 8f677df2d4c4..fd2446d995ad 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -24,7 +24,6 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <linux/io.h>
-#include <linux/pinctrl/machine.h>
 #include <mach/common.h>
 #include <mach/r8a7740.h>
 #include <asm/mach/arch.h>
@@ -119,12 +118,6 @@
 *      usbhsf_power_ctrl()
 */
-static const struct pinctrl_map eva_pinctrl_map[] = {
-        /* SCIFA1 */
-        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
-                                  "scifa1_data", "scifa1"),
-};
 static void __init eva_clock_init(void)
 {
        struct clk *system      = clk_get(NULL, "system_clk");
@@ -165,27 +158,18 @@ clock_error:
 */
 static void __init eva_init(void)
 {
        r8a7740_clock_init(MD_CK0 | MD_CK2);
        eva_clock_init();
-        pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
-        r8a7740_pinmux_init();
        r8a7740_meram_workaround();
-        /*
-         * Touchscreen
-         * TODO: Move reset GPIO over to .dts when we can reference it
-         */
-        gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
 #ifdef CONFIG_CACHE_L2X0
        /* Early BRESP enable, Shared attribute override enable, 32K*8way */
        l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
 #endif
        r8a7740_add_standard_devices_dt();
        r8a7740_pm_init();
 }
diff --git a/arch/arm/mach-shmobile/board-kzm9d-reference.c b/arch/arm/mach-shmobile/board-kzm9d-reference.c
new file mode 100644
index 000000000000..8f8bb2fab076
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-kzm9d-reference.c
@@ -0,0 +1,47 @@
+/*
+ * kzm9d board support - Reference DT implementation
+ *
+ * Copyright (C) 2013  Renesas Solutions Corp.
+ * Copyright (C) 2013  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <mach/emev2.h>
+#include <mach/common.h>
+#include <asm/mach/arch.h>
+static void __init kzm9d_add_standard_devices(void)
+{
+        if (!IS_ENABLED(CONFIG_COMMON_CLK))
+                emev2_clock_init();
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+static const char *kzm9d_boards_compat_dt[] __initdata = {
+        "renesas,kzm9d-reference",
+        NULL,
+};
+DT_MACHINE_START(KZM9D_DT, "kzm9d")
+        .smp            = smp_ops(emev2_smp_ops),
+        .map_io         = emev2_map_io,
+        .init_early     = emev2_init_delay,
+        .init_machine   = kzm9d_add_standard_devices,
+        .init_late      = shmobile_init_late,
+        .dt_compat      = kzm9d_boards_compat_dt,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 15900f1f8af7..30c2cc695b12 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -86,8 +86,6 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
        .smp            = smp_ops(emev2_smp_ops),
        .map_io         = emev2_map_io,
        .init_early     = emev2_init_delay,
-        .nr_irqs        = NR_IRQS_LEGACY,
-        .init_irq       = emev2_init_irq,
        .init_machine   = kzm9d_add_standard_devices,
        .init_late      = shmobile_init_late,
        .dt_compat      = kzm9d_boards_compat_dt,
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index 41092bb01ee5..a66a808db012 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -21,66 +21,19 @@
 */
 #include <linux/delay.h>
-#include <linux/gpio.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/input.h>
 #include <linux/of_platform.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf-generic.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-static unsigned long pin_pullup_conf[] = {
-        PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
-};
-static const struct pinctrl_map kzm_pinctrl_map[] = {
-        PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "pfc-sh73a0",
-                                  "i2c3_1", "i2c3"),
-        /* MMCIF */
-        PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-                                  "mmc0_data8_0", "mmc0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-                                  "mmc0_ctrl_0", "mmc0"),
-        PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-                                    "PORT279", pin_pullup_conf),
-        PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-                                      "mmc0_data8_0", pin_pullup_conf),
-        /* SCIFA4 */
-        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
-                                  "scifa4_data", "scifa4"),
-        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
-                                  "scifa4_ctrl", "scifa4"),
-        /* SDHI0 */
-        PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-                                  "sdhi0_data4", "sdhi0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-                                  "sdhi0_ctrl", "sdhi0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-                                  "sdhi0_cd", "sdhi0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-                                  "sdhi0_wp", "sdhi0"),
-        /* SDHI2 */
-        PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
-                                  "sdhi2_data4", "sdhi2"),
-        PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
-                                  "sdhi2_ctrl", "sdhi2"),
-};
 static void __init kzm_init(void)
 {
        sh73a0_add_standard_devices_dt();
-        pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
-        sh73a0_pinmux_init();
-        /* enable SD */
-        gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
-        gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
 #ifdef CONFIG_CACHE_L2X0
        /* Early BRESP enable, Shared attribute override enable, 64K*8way */
diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
index 480d882e42c7..3d1c439b4998 100644
--- a/arch/arm/mach-shmobile/board-marzen-reference.c
+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
@@ -19,42 +19,14 @@
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
-#include <linux/pinctrl/machine.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
-static const struct pinctrl_map marzen_pinctrl_map[] = {
-        /* SCIF2 (CN18: DEBUG0) */
-        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-r8a7779",
-                                  "scif2_data_c", "scif2"),
-        /* SCIF4 (CN19: DEBUG1) */
-        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-r8a7779",
-                                  "scif4_data", "scif4"),
-        /* SDHI0 */
-        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-                                  "sdhi0_data4", "sdhi0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-                                  "sdhi0_ctrl", "sdhi0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-                                  "sdhi0_cd", "sdhi0"),
-        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-                                  "sdhi0_wp", "sdhi0"),
-        /* SMSC */
-        PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
-                                  "intc_irq1_b", "intc"),
-        PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
-                                  "lbsc_ex_cs0", "lbsc"),
-};
 static void __init marzen_init(void)
 {
-        pinctrl_register_mappings(marzen_pinctrl_map,
-                                  ARRAY_SIZE(marzen_pinctrl_map));
-        r8a7779_pinmux_init();
        r8a7779_add_standard_devices_dt();
 }
diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
index 3e0c0441c782..b0ab4b72770a 100644
--- a/arch/arm/mach-shmobile/include/mach/emev2.h
+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
@@ -2,7 +2,6 @@
 #define __ASM_EMEV2_H__
 extern void emev2_map_io(void);
-extern void emev2_init_irq(void);
 extern void emev2_init_delay(void);
 extern void emev2_add_standard_devices(void);
 extern void emev2_clock_init(void);
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index e4b46930db52..1553af8e04ff 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -38,13 +38,6 @@
 static struct map_desc emev2_io_desc[] __initdata = {
 #ifdef CONFIG_SMP
-        /* 128K entity map for 0xe0100000 (SMU) */
-        {
-                .virtual        = 0xe0100000,
-                .pfn            = __phys_to_pfn(0xe0100000),
-                .length         = SZ_128K,
-                .type           = MT_DEVICE
-        },
        /* 2M mapping for SCU + L2 controller */
        {
                .virtual        = 0xf0000000,
@@ -182,7 +175,8 @@ static struct resource pmu_resources[] = {
 void __init emev2_add_standard_devices(void)
 {
-        emev2_clock_init();
+        if (!IS_ENABLED(CONFIG_COMMON_CLK))
+                emev2_clock_init();
        emev2_register_uart(0);
        emev2_register_uart(1);
@@ -202,20 +196,6 @@ void __init emev2_init_delay(void)
        shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
 }
-void __init emev2_init_irq(void)
-{
-        void __iomem *gic_dist_base;
-        void __iomem *gic_cpu_base;
-        /* Static mappings, never released */
-        gic_dist_base = ioremap(0xe0028000, PAGE_SIZE);
-        gic_cpu_base = ioremap(0xe0020000, PAGE_SIZE);
-        BUG_ON(!gic_dist_base || !gic_cpu_base);
-        /* Use GIC to handle interrupts */
-        gic_init(0, 29, gic_dist_base, gic_cpu_base);
-}
 #ifdef CONFIG_USE_OF
 static const char *emev2_boards_compat_dt[] __initdata = {
@@ -225,8 +205,8 @@ static const char *emev2_boards_compat_dt[] __initdata = {
 DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
        .smp            = smp_ops(emev2_smp_ops),
+        .map_io         = emev2_map_io,
        .init_early     = emev2_init_delay,
-        .nr_irqs        = NR_IRQS_LEGACY,
        .dt_compat      = emev2_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 22a05a869d25..1fcd607d64ad 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -38,9 +38,12 @@ static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
 static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
 {
+        /* setup EMEV2 specific SCU base, enable */
+        shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
        scu_enable(shmobile_scu_base);
        /* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
+        emev2_clock_init(); /* need ioremapped SMU */
        emev2_set_boot_vector(__pa(shmobile_boot_vector));
        shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
        shmobile_boot_arg = (unsigned long)shmobile_scu_base;
@@ -49,21 +52,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
        scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
 }
-static void __init emev2_smp_init_cpus(void)
-{
-        unsigned int ncores;
-        /* setup EMEV2 specific SCU base */
-        shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
-        emev2_clock_init(); /* need ioremapped SMU */
-        ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1;
-        shmobile_smp_init_cpus(ncores);
-}
 struct smp_operations emev2_smp_ops __initdata = {
-        .smp_init_cpus          = emev2_smp_init_cpus,
        .smp_prepare_cpus       = emev2_smp_prepare_cpus,
        .smp_boot_secondary     = emev2_boot_secondary,
 };
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 12eee8167525..2061b6a2a766 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -223,10 +223,10 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
        OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
        OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  NULL),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  NULL),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  NULL),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  NULL),
        /* Requires clock name bindings. */
        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
diff --git a/drivers/input/serio/altera_ps2.c b/drivers/input/serio/altera_ps2.c
index a0a2657e31ff..4777a73cd390 100644
--- a/drivers/input/serio/altera_ps2.c
+++ b/drivers/input/serio/altera_ps2.c
@@ -176,6 +176,7 @@ static int altera_ps2_remove(struct platform_device *pdev)
 #ifdef CONFIG_OF
 static const struct of_device_id altera_ps2_match[] = {
        { .compatible = "ALTR,ps2-1.0", },
+        { .compatible = "altr,ps2-1.0", },
        {},
 };
 MODULE_DEVICE_TABLE(of, altera_ps2_match);
diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c
index f38855f76536..9a64c3fee218 100644
--- a/drivers/spi/spi-altera.c
+++ b/drivers/spi/spi-altera.c
@@ -276,6 +276,7 @@ static int altera_spi_remove(struct platform_device *dev)
 #ifdef CONFIG_OF
 static const struct of_device_id altera_spi_match[] = {
        { .compatible = "ALTR,spi-1.0", },
+        { .compatible = "altr,spi-1.0", },
        {},
 };
 MODULE_DEVICE_TABLE(of, altera_spi_match);
diff --git a/drivers/tty/serial/altera_jtaguart.c b/drivers/tty/serial/altera_jtaguart.c
index 18e038fbdcdc..59b3da9bcc3f 100644
--- a/drivers/tty/serial/altera_jtaguart.c
+++ b/drivers/tty/serial/altera_jtaguart.c
@@ -473,6 +473,7 @@ static int altera_jtaguart_remove(struct platform_device *pdev)
 #ifdef CONFIG_OF
 static struct of_device_id altera_jtaguart_match[] = {
        { .compatible = "ALTR,juart-1.0", },
+        { .compatible = "altr,juart-1.0", },
        {},
 };
 MODULE_DEVICE_TABLE(of, altera_jtaguart_match);
diff --git a/drivers/tty/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c
index 6431472aeb1f..501667e3e3f5 100644
--- a/drivers/tty/serial/altera_uart.c
+++ b/drivers/tty/serial/altera_uart.c
@@ -615,6 +615,7 @@ static int altera_uart_remove(struct platform_device *pdev)
 #ifdef CONFIG_OF
 static struct of_device_id altera_uart_match[] = {
        { .compatible = "ALTR,uart-1.0", },
+        { .compatible = "altr,uart-1.0", },
        {},
 };
 MODULE_DEVICE_TABLE(of, altera_uart_match);
diff --git a/include/dt-bindings/pinctrl/nomadik.h b/include/dt-bindings/pinctrl/nomadik.h
new file mode 100644
index 000000000000..638fb321a1cb
--- /dev/null
+++ b/include/dt-bindings/pinctrl/nomadik.h
@@ -0,0 +1,36 @@
+/*
+ * nomadik.h
+ *
+ * Copyright (C) ST-Ericsson SA 2013
+ * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for ST-Ericsson.
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+#define INPUT_NOPULL            0
+#define INPUT_PULLUP            1
+#define INPUT_PULLDOWN          2
+#define OUTPUT_LOW              0
+#define OUTPUT_HIGH             1
+#define DIR_OUTPUT              2
+#define SLPM_DISABLED           0
+#define SLPM_ENABLED            1
+#define SLPM_INPUT_NOPULL       0
+#define SLPM_INPUT_PULLUP       1
+#define SLPM_INPUT_PULLDOWN     2
+#define SLPM_DIR_INPUT          3
+#define SLPM_OUTPUT_LOW         0
+#define SLPM_OUTPUT_HIGH        1
+#define SLPM_DIR_OUTPUT         2
+#define SLPM_WAKEUP_DISABLE     0
+#define SLPM_WAKEUP_ENABLE      1
+#define GPIOMODE_DISABLED       0
+#define GPIOMODE_ENABLED        1
+#define SLPM_PDIS_DISABLED      0
+#define SLPM_PDIS_ENABLED       1