1 files changed, 115 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/sbc8548-altflash.dts b/arch/powerpc/boot/dts/sbc8548-altflash.dts
new file mode 100644
index 000000000000..0b38a0defd2c
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8548-altflash.dts
@@ -0,0 +1,115 @@
+/*
+ * SBC8548 Device Tree Source
+ *
+ * Configured for booting off the alternate (64MB SODIMM) flash.
+ * Requires switching JP12 jumpers and changing SW2.8 setting.
+ *
+ * Copyright 2013 Wind River Systems Inc.
+ *
+ * Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/include/ "sbc8548-pre.dtsi"
+/{
+        localbus@e0000000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                reg = <0xe0000000 0x5000>;
+                interrupt-parent = <&mpic>;
+                ranges = <0x0 0x0 0xfc000000 0x04000000         /*64MB Flash*/
+                          0x3 0x0 0xf0000000 0x04000000         /*64MB SDRAM*/
+                          0x4 0x0 0xf4000000 0x04000000         /*64MB SDRAM*/
+                          0x5 0x0 0xf8000000 0x00b10000         /* EPLD */
+                          0x6 0x0 0xef800000 0x00800000>;       /*8MB Flash*/
+                flash@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x0 0x0 0x04000000>;
+                        compatible = "intel,JS28F128", "cfi-flash";
+                        bank-width = <4>;
+                        device-width = <1>;
+                        partition@0x0 {
+                                label = "space";
+                                /* FC000000 -> FFEFFFFF */
+                                reg = <0x00000000 0x03f00000>;
+                        };
+                        partition@0x03f00000 {
+                                label = "bootloader";
+                                /* FFF00000 -> FFFFFFFF */
+                                reg = <0x03f00000 0x00100000>;
+                                read-only;
+                        };
+                };
+                epld@5,0 {
+                        compatible = "wrs,epld-localbus";
+                        #address-cells = <2>;
+                        #size-cells = <1>;
+                        reg = <0x5 0x0 0x00b10000>;
+                        ranges = <
+                                0x0 0x0 0x5 0x000000 0x1fff     /* LED */
+                                0x1 0x0 0x5 0x100000 0x1fff     /* Switches */
+                                0x3 0x0 0x5 0x300000 0x1fff     /* HW Rev. */
+                                0xb 0x0 0x5 0xb00000 0x1fff     /* EEPROM */
+                        >;
+                        led@0,0 {
+                                compatible = "led";
+                                reg = <0x0 0x0 0x1fff>;
+                        };
+                        switches@1,0 {
+                                compatible = "switches";
+                                reg = <0x1 0x0 0x1fff>;
+                        };
+                        hw-rev@3,0 {
+                                compatible = "hw-rev";
+                                reg = <0x3 0x0 0x1fff>;
+                        };
+                        eeprom@b,0 {
+                                compatible = "eeprom";
+                                reg = <0xb 0 0x1fff>;
+                        };
+                };
+                alt-flash@6,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "intel,JS28F640", "cfi-flash";
+                        reg = <0x6 0x0 0x800000>;
+                        bank-width = <1>;
+                        device-width = <1>;
+                        partition@0x0 {
+                                label = "space";
+                                /* EF800000 -> EFF9FFFF */
+                                reg = <0x00000000 0x007a0000>;
+                        };
+                        partition@0x7a0000 {
+                                label = "bootloader";
+                                /* EFFA0000 -> EFFFFFFF */
+                                reg = <0x007a0000 0x00060000>;
+                                read-only;
+                        };
+                };
+        };
+};
+/include/ "sbc8548-post.dtsi"

diff --git a/arch/powerpc/boot/dts/sbc8548-altflash.dts b/arch/powerpc/boot/dts/sbc8548-altflash.dts new file mode 100644 index 000000000000..0b38a0defd2c --- /dev/null +++ b/arch/powerpc/boot/dts/sbc8548-altflash.dts
@@ -0,0 +1,115 @@
	1	/*
	2	* SBC8548 Device Tree Source
	3	*
	4	* Configured for booting off the alternate (64MB SODIMM) flash.
	5	* Requires switching JP12 jumpers and changing SW2.8 setting.
	6	*
	7	* Copyright 2013 Wind River Systems Inc.
	8	*
	9	* Paul Gortmaker (see MAINTAINERS for contact information)
	10	*
	11	* This program is free software; you can redistribute it and/or modify it
	12	* under the terms of the GNU General Public License as published by the
	13	* Free Software Foundation; either version 2 of the License, or (at your
	14	* option) any later version.
	15	*/
	16
	17
	18	/dts-v1/;
	19
	20	/include/ "sbc8548-pre.dtsi"
	21
	22	/{
	23	localbus@e0000000 {
	24	#address-cells = <2>;
	25	#size-cells = <1>;
	26	compatible = "simple-bus";
	27	reg = <0xe0000000 0x5000>;
	28	interrupt-parent = <&mpic>;
	29
	30	ranges = <0x0 0x0 0xfc000000 0x04000000 /64MB Flash/
	31	0x3 0x0 0xf0000000 0x04000000 /64MB SDRAM/
	32	0x4 0x0 0xf4000000 0x04000000 /64MB SDRAM/
	33	0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
	34	0x6 0x0 0xef800000 0x00800000>; /8MB Flash/
	35
	36	flash@0,0 {
	37	#address-cells = <1>;
	38	#size-cells = <1>;
	39	reg = <0x0 0x0 0x04000000>;
	40	compatible = "intel,JS28F128", "cfi-flash";
	41	bank-width = <4>;
	42	device-width = <1>;
	43	partition@0x0 {
	44	label = "space";
	45	/* FC000000 -> FFEFFFFF */
	46	reg = <0x00000000 0x03f00000>;
	47	};
	48	partition@0x03f00000 {
	49	label = "bootloader";
	50	/* FFF00000 -> FFFFFFFF */
	51	reg = <0x03f00000 0x00100000>;
	52	read-only;
	53	};
	54	};
	55
	56
	57	epld@5,0 {
	58	compatible = "wrs,epld-localbus";
	59	#address-cells = <2>;
	60	#size-cells = <1>;
	61	reg = <0x5 0x0 0x00b10000>;
	62	ranges = <
	63	0x0 0x0 0x5 0x000000 0x1fff /* LED */
	64	0x1 0x0 0x5 0x100000 0x1fff /* Switches */
	65	0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
	66	0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
	67	>;
	68
	69	led@0,0 {
	70	compatible = "led";
	71	reg = <0x0 0x0 0x1fff>;
	72	};
	73
	74	switches@1,0 {
	75	compatible = "switches";
	76	reg = <0x1 0x0 0x1fff>;
	77	};
	78
	79	hw-rev@3,0 {
	80	compatible = "hw-rev";
	81	reg = <0x3 0x0 0x1fff>;
	82	};
	83
	84	eeprom@b,0 {
	85	compatible = "eeprom";
	86	reg = <0xb 0 0x1fff>;
	87	};
	88
	89	};
	90
	91	alt-flash@6,0 {
	92	#address-cells = <1>;
	93	#size-cells = <1>;
	94	compatible = "intel,JS28F640", "cfi-flash";
	95	reg = <0x6 0x0 0x800000>;
	96	bank-width = <1>;
	97	device-width = <1>;
	98	partition@0x0 {
	99	label = "space";
	100	/* EF800000 -> EFF9FFFF */
	101	reg = <0x00000000 0x007a0000>;
	102	};
	103	partition@0x7a0000 {
	104	label = "bootloader";
	105	/* EFFA0000 -> EFFFFFFF */
	106	reg = <0x007a0000 0x00060000>;
	107	read-only;
	108	};
	109	};
	110
	111
	112	};
	113	};
	114
	115	/include/ "sbc8548-post.dtsi"