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-rw-r--r--Documentation/devicetree/bindings/dma/snps-dma.txt2
-rw-r--r--drivers/dma/dw/core.c4
-rw-r--r--drivers/dma/dw/pci.c1
-rw-r--r--drivers/dma/dw/platform.c3
-rw-r--r--drivers/tty/serial/8250/8250_lpss.c1
-rw-r--r--include/linux/platform_data/dma-dw.h3
6 files changed, 1 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt
index db757df7057d..0bedceed1963 100644
--- a/Documentation/devicetree/bindings/dma/snps-dma.txt
+++ b/Documentation/devicetree/bindings/dma/snps-dma.txt
@@ -23,8 +23,6 @@ Deprecated properties:
23 23
24 24
25Optional properties: 25Optional properties:
26- is_private: The device channels should be marked as private and not for by the
27 general purpose DMA channel allocator. False if not passed.
28- multi-block: Multi block transfers supported by hardware. Array property with 26- multi-block: Multi block transfers supported by hardware. Array property with
29 one cell per channel. 0: not supported, 1 (default): supported. 27 one cell per channel. 0: not supported, 1 (default): supported.
30- snps,dma-protection-control: AHB HPROT[3:1] protection setting. 28- snps,dma-protection-control: AHB HPROT[3:1] protection setting.
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index dc053e62f894..e25503986680 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1227,7 +1227,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
1227 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE); 1227 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE);
1228 1228
1229 /* Fill platform data with the default values */ 1229 /* Fill platform data with the default values */
1230 pdata->is_private = true;
1231 pdata->is_memcpy = true; 1230 pdata->is_memcpy = true;
1232 pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING; 1231 pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
1233 pdata->chan_priority = CHAN_PRIORITY_ASCENDING; 1232 pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
@@ -1340,8 +1339,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
1340 1339
1341 /* Set capabilities */ 1340 /* Set capabilities */
1342 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); 1341 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
1343 if (pdata->is_private) 1342 dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
1344 dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
1345 if (pdata->is_memcpy) 1343 if (pdata->is_memcpy)
1346 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); 1344 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
1347 1345
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
index 313ba10c6224..570498faadc3 100644
--- a/drivers/dma/dw/pci.c
+++ b/drivers/dma/dw/pci.c
@@ -17,7 +17,6 @@
17 17
18static struct dw_dma_platform_data mrfld_pdata = { 18static struct dw_dma_platform_data mrfld_pdata = {
19 .nr_channels = 8, 19 .nr_channels = 8,
20 .is_private = true,
21 .is_memcpy = true, 20 .is_memcpy = true,
22 .is_idma32 = true, 21 .is_idma32 = true,
23 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, 22 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 31ff8113c3de..6dd8cd1820c1 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -128,9 +128,6 @@ dw_dma_parse_dt(struct platform_device *pdev)
128 pdata->nr_masters = nr_masters; 128 pdata->nr_masters = nr_masters;
129 pdata->nr_channels = nr_channels; 129 pdata->nr_channels = nr_channels;
130 130
131 if (of_property_read_bool(np, "is_private"))
132 pdata->is_private = true;
133
134 /* 131 /*
135 * All known devices, which use DT for configuration, support 132 * All known devices, which use DT for configuration, support
136 * memory-to-memory transfers. So enable it by default. 133 * memory-to-memory transfers. So enable it by default.
diff --git a/drivers/tty/serial/8250/8250_lpss.c b/drivers/tty/serial/8250/8250_lpss.c
index 98dbc796353f..53ca9ba6ab4b 100644
--- a/drivers/tty/serial/8250/8250_lpss.c
+++ b/drivers/tty/serial/8250/8250_lpss.c
@@ -153,7 +153,6 @@ static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
153#ifdef CONFIG_SERIAL_8250_DMA 153#ifdef CONFIG_SERIAL_8250_DMA
154static const struct dw_dma_platform_data qrk_serial_dma_pdata = { 154static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
155 .nr_channels = 2, 155 .nr_channels = 2,
156 .is_private = true,
157 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, 156 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
158 .chan_priority = CHAN_PRIORITY_ASCENDING, 157 .chan_priority = CHAN_PRIORITY_ASCENDING,
159 .block_size = 4095, 158 .block_size = 4095,
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 1a1d58ebffbf..d443025c5c72 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -38,8 +38,6 @@ struct dw_dma_slave {
38/** 38/**
39 * struct dw_dma_platform_data - Controller configuration parameters 39 * struct dw_dma_platform_data - Controller configuration parameters
40 * @nr_channels: Number of channels supported by hardware (max 8) 40 * @nr_channels: Number of channels supported by hardware (max 8)
41 * @is_private: The device channels should be marked as private and not for
42 * by the general purpose DMA channel allocator.
43 * @is_memcpy: The device channels do support memory-to-memory transfers. 41 * @is_memcpy: The device channels do support memory-to-memory transfers.
44 * @is_idma32: The type of the DMA controller is iDMA32 42 * @is_idma32: The type of the DMA controller is iDMA32
45 * @chan_allocation_order: Allocate channels starting from 0 or 7 43 * @chan_allocation_order: Allocate channels starting from 0 or 7
@@ -53,7 +51,6 @@ struct dw_dma_slave {
53 */ 51 */
54struct dw_dma_platform_data { 52struct dw_dma_platform_data {
55 unsigned int nr_channels; 53 unsigned int nr_channels;
56 bool is_private;
57 bool is_memcpy; 54 bool is_memcpy;
58 bool is_idma32; 55 bool is_idma32;
59#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */ 56#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */