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-rw-r--r--arch/x86/include/asm/processor-flags.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h
index 8a6d89fc9a79..dc723b64acf0 100644
--- a/arch/x86/include/asm/processor-flags.h
+++ b/arch/x86/include/asm/processor-flags.h
@@ -34,17 +34,17 @@
34 */ 34 */
35#ifdef CONFIG_X86_64 35#ifdef CONFIG_X86_64
36/* Mask off the address space ID and SME encryption bits. */ 36/* Mask off the address space ID and SME encryption bits. */
37#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull) 37#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull)
38#define CR3_PCID_MASK 0xFFFull 38#define CR3_PCID_MASK 0xFFFull
39#define CR3_NOFLUSH (1UL << 63) 39#define CR3_NOFLUSH BIT_ULL(63)
40#else 40#else
41/* 41/*
42 * CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save 42 * CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save
43 * a tiny bit of code size by setting all the bits. 43 * a tiny bit of code size by setting all the bits.
44 */ 44 */
45#define CR3_ADDR_MASK 0xFFFFFFFFull 45#define CR3_ADDR_MASK 0xFFFFFFFFull
46#define CR3_PCID_MASK 0ull 46#define CR3_PCID_MASK 0ull
47#define CR3_NOFLUSH 0 47#define CR3_NOFLUSH 0
48#endif 48#endif
49 49
50#endif /* _ASM_X86_PROCESSOR_FLAGS_H */ 50#endif /* _ASM_X86_PROCESSOR_FLAGS_H */