10 files changed, 745 insertions, 10 deletions

diff --git a/Documentation/devicetree/bindings/i2c/i2c-omap.txt b/Documentation/devicetree/bindings/i2c/i2c-omap.txt
index 7e49839d4124..4b90ba9f31b7 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-omap.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-omap.txt
@@ -1,8 +1,12 @@
 I2C for OMAP platforms
 
 Required properties :
-- compatible : Must be "ti,omap2420-i2c", "ti,omap2430-i2c", "ti,omap3-i2c"
-  or "ti,omap4-i2c"
+- compatible : Must be
+        "ti,omap2420-i2c" for OMAP2420 SoCs
+        "ti,omap2430-i2c" for OMAP2430 SoCs
+        "ti,omap3-i2c" for OMAP3 SoCs
+        "ti,omap4-i2c" for OMAP4+ SoCs
+        "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs
 - ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
 - #address-cells = <1>;
 - #size-cells = <0>;
diff --git a/Documentation/i2c/busses/i2c-nvidia-gpu b/Documentation/i2c/busses/i2c-nvidia-gpu
new file mode 100644
index 000000000000..31884d2b2eb5
--- /dev/null
+++ b/Documentation/i2c/busses/i2c-nvidia-gpu
@@ -0,0 +1,18 @@
+Kernel driver i2c-nvidia-gpu
+
+Datasheet: not publicly available.
+
+Authors:
+        Ajay Gupta <ajayg@nvidia.com>
+
+Description
+-----------
+
+i2c-nvidia-gpu is a driver for I2C controller included in NVIDIA Turing
+and later GPUs and it is used to communicate with Type-C controller on GPUs.
+
+If your 'lspci -v' listing shows something like the following,
+
+01:00.3 Serial bus controller [0c80]: NVIDIA Corporation Device 1ad9 (rev a1)
+
+then this driver should support the I2C controller of your GPU.
diff --git a/MAINTAINERS b/MAINTAINERS
index 95e56fd128a5..0abecc528dac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6861,6 +6861,13 @@ L:	linux-acpi@vger.kernel.org
 S:      Maintained
 F:      drivers/i2c/i2c-core-acpi.c
 
+I2C CONTROLLER DRIVER FOR NVIDIA GPU
+M:      Ajay Gupta <ajayg@nvidia.com>
+L:      linux-i2c@vger.kernel.org
+S:      Maintained
+F:      Documentation/i2c/busses/i2c-nvidia-gpu
+F:      drivers/i2c/busses/i2c-nvidia-gpu.c
+
 I2C MUXES
 M:      Peter Rosin <peda@axentia.se>
 L:      linux-i2c@vger.kernel.org
@@ -10784,6 +10791,14 @@ L:	linux-omap@vger.kernel.org
 S:      Maintained
 F:      arch/arm/mach-omap2/omap_hwmod.*
 
+OMAP I2C DRIVER
+M:      Vignesh R <vigneshr@ti.com>
+L:      linux-omap@vger.kernel.org
+L:      linux-i2c@vger.kernel.org
+S:      Maintained
+F:      Documentation/devicetree/bindings/i2c/i2c-omap.txt
+F:      drivers/i2c/busses/i2c-omap.c
+
 OMAP IMAGING SUBSYSTEM (OMAP3 ISP and OMAP4 ISS)
 M:      Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 L:      linux-media@vger.kernel.org
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 56ccb1ea7da5..f2c681971201 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -224,6 +224,15 @@ config I2C_NFORCE2_S4985
           This driver can also be built as a module.  If so, the module
           will be called i2c-nforce2-s4985.
 
+config I2C_NVIDIA_GPU
+        tristate "NVIDIA GPU I2C controller"
+        depends on PCI
+        help
+          If you say yes to this option, support will be included for the
+          NVIDIA GPU I2C controller which is used to communicate with the GPU's
+          Type-C controller. This driver can also be built as a module called
+          i2c-nvidia-gpu.
+
 config I2C_SIS5595
         tristate "SiS 5595"
         depends on PCI
@@ -752,7 +761,7 @@ config I2C_OCORES
 
 config I2C_OMAP
         tristate "OMAP I2C adapter"
-        depends on ARCH_OMAP
+        depends on ARCH_OMAP || ARCH_K3
         default y if MACH_OMAP_H3 || MACH_OMAP_OSK
         help
           If you say yes to this option, support will be included for the
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 18b26af82b1c..5f0cb6915969 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_I2C_ISCH)		+= i2c-isch.o
 obj-$(CONFIG_I2C_ISMT)          += i2c-ismt.o
 obj-$(CONFIG_I2C_NFORCE2)       += i2c-nforce2.o
 obj-$(CONFIG_I2C_NFORCE2_S4985) += i2c-nforce2-s4985.o
+obj-$(CONFIG_I2C_NVIDIA_GPU)    += i2c-nvidia-gpu.o
 obj-$(CONFIG_I2C_PIIX4)         += i2c-piix4.o
 obj-$(CONFIG_I2C_SIS5595)       += i2c-sis5595.o
 obj-$(CONFIG_I2C_SIS630)        += i2c-sis630.o
diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c
new file mode 100644
index 000000000000..8822357bca0c
--- /dev/null
+++ b/drivers/i2c/busses/i2c-nvidia-gpu.c
@@ -0,0 +1,368 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nvidia GPU I2C controller Driver
+ *
+ * Copyright (C) 2018 NVIDIA Corporation. All rights reserved.
+ * Author: Ajay Gupta <ajayg@nvidia.com>
+ */
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/pm_runtime.h>
+
+#include <asm/unaligned.h>
+
+/* I2C definitions */
+#define I2C_MST_CNTL                            0x00
+#define I2C_MST_CNTL_GEN_START                  BIT(0)
+#define I2C_MST_CNTL_GEN_STOP                   BIT(1)
+#define I2C_MST_CNTL_CMD_READ                   (1 << 2)
+#define I2C_MST_CNTL_CMD_WRITE                  (2 << 2)
+#define I2C_MST_CNTL_BURST_SIZE_SHIFT           6
+#define I2C_MST_CNTL_GEN_NACK                   BIT(28)
+#define I2C_MST_CNTL_STATUS                     GENMASK(30, 29)
+#define I2C_MST_CNTL_STATUS_OKAY                (0 << 29)
+#define I2C_MST_CNTL_STATUS_NO_ACK              (1 << 29)
+#define I2C_MST_CNTL_STATUS_TIMEOUT             (2 << 29)
+#define I2C_MST_CNTL_STATUS_BUS_BUSY            (3 << 29)
+#define I2C_MST_CNTL_CYCLE_TRIGGER              BIT(31)
+
+#define I2C_MST_ADDR                            0x04
+
+#define I2C_MST_I2C0_TIMING                             0x08
+#define I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ           0x10e
+#define I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT             16
+#define I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX         255
+#define I2C_MST_I2C0_TIMING_TIMEOUT_CHECK               BIT(24)
+
+#define I2C_MST_DATA                                    0x0c
+
+#define I2C_MST_HYBRID_PADCTL                           0x20
+#define I2C_MST_HYBRID_PADCTL_MODE_I2C                  BIT(0)
+#define I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV         BIT(14)
+#define I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV         BIT(15)
+
+struct gpu_i2c_dev {
+        struct device *dev;
+        void __iomem *regs;
+        struct i2c_adapter adapter;
+        struct i2c_board_info *gpu_ccgx_ucsi;
+};
+
+static void gpu_enable_i2c_bus(struct gpu_i2c_dev *i2cd)
+{
+        u32 val;
+
+        /* enable I2C */
+        val = readl(i2cd->regs + I2C_MST_HYBRID_PADCTL);
+        val |= I2C_MST_HYBRID_PADCTL_MODE_I2C |
+                I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV |
+                I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV;
+        writel(val, i2cd->regs + I2C_MST_HYBRID_PADCTL);
+
+        /* enable 100KHZ mode */
+        val = I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ;
+        val |= (I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX
+            << I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT);
+        val |= I2C_MST_I2C0_TIMING_TIMEOUT_CHECK;
+        writel(val, i2cd->regs + I2C_MST_I2C0_TIMING);
+}
+
+static int gpu_i2c_check_status(struct gpu_i2c_dev *i2cd)
+{